Semiconductor integrated circuit device and method of measuring the same

The semiconductor integrated circuit device uses a configuration of resistance and switch elements controlled by a circuit to accurately measure internal resistance by isolating contact resistance, addressing measurement inaccuracies in existing methods.

JP2026007029APending Publication Date: 2026-01-16ROHM CO LTD
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Patent Information

Application Number
JP2024106472
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-07-01
Publication Date
2026-01-16

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Abstract

To provide a semiconductor integrated circuit device capable of accurately measuring an internal resistance value by eliminating the influence of contact resistance between a probe needle and a chip electrode, and to provide its measuring method.SOLUTION: The semiconductor integrated circuit device 200 includes the first electrode 204 and the second electrode 206, the two resistance elements 210 and 214 having the same configuration and connected in parallel or in series between the first electrode 204 and the second electrode 206, the switch elements 208 and 212 formed of MOS transistors that are selectively controlled to cause a current to flow through one of the two resistance elements 210 and 214 or to cause a current to flow through both of the two resistance elements, and the control circuit 216 that controls the switch elements 208 and 212. A voltage when a current flows through one of the two resistance elements between the first electrode 204 and the second electrode 206 and a voltage when a current flows through both of the two resistance elements are output between the first electrode 204 and the second electrode 206.SELECTED DRAWING: Figure 2A
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Description

[Technical Field]

[0001] The present invention relates to a semiconductor integrated circuit device capable of accurately measuring the internal resistance value of the semiconductor integrated circuit device without being affected by the contact resistance between the probe and the electrode, and a method for measuring the same. [Background technology]

[0002] When semiconductor integrated circuit devices are inspected at the wafer stage, a substrate with probes called a probe card is placed opposite the wafer, and the probe needles formed on the probe card are brought into contact with chip electrodes formed on the wafer.

[0003] However, this method generates contact resistance between the probe needle and the chip electrode on the order of several ohms. Therefore, when measuring the internal resistance of a semiconductor integrated circuit device on the order of several tens of ohms, a large error occurs. In particular, repeatedly pressing the probe card against the wafer, i.e., performing touchdown operations, can deteriorate the surface condition of the chip electrode, resulting in contact resistance values ​​as high as several tens of ohms. As a result, there is a concern that accurate internal resistance measurements may not be possible.

[0004] One solution to this problem is to connect two probe needles to one chip electrode and measure using separate force and sense units, i.e., the so-called four-terminal method, but this increases costs.

[0005] The following Patent Document 1 discloses a measurement method for an electronic circuit device in which a voltage monitor external terminal is connected between a transistor in an IC chip and an external terminal via a voltage monitor switch, and the voltage of the voltage monitor external terminal is measured when a current flows from the external terminal. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-170878 Summary of the Invention [Problem to be solved by the invention]

[0007] In view of the above circumstances, it is an object of the present invention to provide a semiconductor integrated circuit device capable of accurately measuring internal resistance values ​​without being affected by contact resistance between probe needles and chip electrodes, and a measurement method thereof. [Means for solving the problem]

[0008] In order to solve the above problem, a semiconductor integrated circuit device according to the present invention comprises a first electrode and a second electrode, two resistance elements of the same configuration connected in parallel or in series between the first electrode and the second electrode, a plurality of switch elements formed of MOS transistors that are selectively controlled to either pass a current through one of the two resistance elements or pass a current through both of the two resistance elements, and a control circuit that controls the plurality of switch elements, and by controlling the plurality of switch elements with the control circuit, a voltage when a current is passed through one of the two resistance elements and a voltage when a current is passed through both of the two resistance elements are output between the first electrode and the second electrode. [Brief explanation of the drawings]

[0009] [Figure 1] 10 is a schematic diagram showing a method for measuring the internal resistance of a semiconductor integrated circuit device of a comparative example. [Figure 2A] 1 is a schematic diagram showing a method for measuring the internal resistance of a semiconductor integrated circuit device according to the first embodiment. [Figure 2B] 1 is a schematic diagram showing a state in which an internal circuit is added to the semiconductor integrated circuit device of Embodiment 1. FIG. [Figure 3] 10 is a schematic diagram showing a method for measuring the internal resistance of a semiconductor integrated circuit device according to a second embodiment. FIG. [Figure 4A] 10 is a schematic diagram showing a method for measuring the internal resistance of a semiconductor integrated circuit device according to a third embodiment. FIG. [Figure 4B] FIG. 10 is a schematic diagram showing a state in which an internal circuit is added to the semiconductor integrated circuit device of the third embodiment. [Figure 5] 10 is a schematic diagram showing a method for measuring the internal resistance of a semiconductor integrated circuit device according to a fourth embodiment. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0011] [Comparative Example] First, a comparative example of a method for measuring the internal resistance of a semiconductor integrated circuit device 100 will be described with reference to Fig. 1. As shown in Fig. 1, in order to measure the resistance value R1 of an internal resistance 102 in the semiconductor integrated circuit device 100 in a wafer state, a group of measuring devices 104 and 106 with probes called a probe card are placed opposite the wafer. Then, probe needles 108 and 110 formed on the probe card are brought into contact with chip electrodes 112 and 114 formed on the wafer.

[0012] Then, a current Iforce is forcibly supplied to the tip electrode 112 from the measurement / application unit 116 of the measurement device group 104, and the voltage between the tip electrodes 112 and 114 is measured. This causes a voltage drop due to the resistance R1 of the internal resistance 102, as well as the contact resistance 118 (resistance value Rcounit) between the probe needle 108 and the tip electrode 112 and the contact resistance 120 (resistance value Rcognd) between the probe needle 110 and the tip electrode 114. This makes it impossible to measure the voltage applied between the electrodes correctly, and the measurement result shows a resistance value different from the resistance R1 of the internal resistance 102, making it impossible to measure the accurate resistance R1.

[0013] [Embodiment 1] Next, a semiconductor integrated circuit device 200 of embodiment 1 will be described with reference to FIG. 2A. The semiconductor integrated circuit device 200 of embodiment 1 includes a first electrode 204 and a second electrode 206. Two identical circuits, each including switch elements 208 and 212 formed of N-MOS transistors and resistor elements 210 and 214 connected in series, are connected in parallel between the first electrode 204 and the second electrode 206. That is, the first switch element 208 and the first resistor element 210 are connected in series, and the second switch element 212 and the second resistor element 214 are connected in series.

[0014] Specifically, a first resistor element 210 is connected between the drain node and first electrode 204 of an N-MOS transistor constituting a first switch element 208, and the source node and bulk node are connected to a second electrode 206. A second resistor element 214 is connected between the drain node and first electrode 204 of an N-MOS transistor constituting a second switch element 212, and the source node and bulk node are connected to the second electrode 206. The N-MOS transistors constituting the first switch element 208 and the second switch element 212 are assumed to have the same size, material, and characteristics. The first resistor element 210 and the second resistor element 214 are assumed to be exactly the same size, material, and have the same resistance value.

[0015] The gate node of the N-MOS transistor constituting the first switch element 208 and the gate node of the N-MOS transistor constituting the second switch element 212 are connected to a control circuit 216. The control circuit 216 turns on / off the first switch element 208 and the second switch element 212. That is, the control circuit 216 controls the conductive / non-conductive state of the first switch element 208 and the second switch element 212, thereby switching between flowing a current through either the first resistor element 210 or the second resistor element 214, or flowing a current through both.

[0016] A method for measuring the internal resistance 202 of the semiconductor integrated circuit device 200 described above will now be described. As shown in Fig. 2A, in order to measure the resistance value of the internal resistance 202 of the semiconductor integrated circuit device 200 in a wafer state, a group of measuring devices 218 and 220 with probes called a probe card is placed opposite a wafer including the semiconductor integrated circuit device 200. Then, probe needles 222 and 224 formed on the probe card are brought into contact with the first electrode 204 and the second electrode 206 formed on the wafer.

[0017] Next, the control circuit 216 sets the gate voltage of the N-MOS transistor constituting the first switch element 208 to the "H" level to turn on, i.e., to a conductive state, the first switch element 208. On the other hand, the control circuit 216 sets the gate voltage of the N-MOS transistor constituting the second switch element 212 to the "L" level to turn off, i.e., to a non-conductive state, the second switch element 212.

[0018] In this state, a current Iforce is forcibly applied from the measurement / application unit 226 of the measurement device group 218 to the first electrode 204, and a voltage Vmeas1 is measured between the measurement / application unit 226 and GND (which can also be said to be between the first electrode 204 and the second electrode 206 from the perspective of the measurement device groups 218 and 220). Then, Vmeas1 is expressed by the following equation (1).

number

[0019] Next, the control circuit 216 sets the gate voltages of the N-MOS transistors that constitute the first switch element 208 and the second switch element 212 to the “H” level, turning on both the first switch element 208 and the second switch element 212, i.e., bringing them into a conductive state.

[0020] In this state, a current Iforce is forcibly applied from the measurement / application unit 226 of the measurement device group 218 to the first electrode 204, and a voltage Vmeas2 is measured between the measurement / application unit 226 and GND (between the first electrode 204 and the second electrode 206 as viewed from the measurement device groups 218 and 220). Then, Vmeas2 is expressed by the following equation (2).

number

[0021] The first resistor element 210 and the second resistor element 214 have the same size and material, so their resistance values ​​R1 and R2 are equal. Similarly, the N-MOS transistors that respectively constitute the first switch element 208 and the second switch element 212 have the same size, material, and characteristics, so their on-resistance values ​​RN1 and RN2 are also equal. Therefore, the above formula (2) can be rewritten as the following formula (3).

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[0022] Finally, by rearranging equation (4), the measured resistance value can be calculated from the values ​​of Vmeas1, Vmeas2, and Iforce, as shown in equation (5) below.

number

[0023] According to the first embodiment, the on / off of the N-MOS transistors constituting the first switch element 208 and the second switch element 212 is controlled. Then, the voltage values ​​Vmeas1 and Vmeas2 between the measurement / application unit 226 and GND (between the first electrode 204 and the second electrode 206 when viewed from the measurement device groups 218 and 220) are measured twice. This makes it possible to measure the resistance without the influence of the resistance value Rcounit of the measurement device group 218, which includes the contact resistance between the first electrode 204 and the probe needle 222, and the resistance value Rcognd of the measurement device group 220, which includes the contact resistance between the second electrode 206 and the probe needle 224.

[0024] In an actual circuit, as shown in Fig. 2B, an internal circuit 228 is connected between the first electrode 204 and the second electrode 206. Therefore, as shown in Fig. 2B, a switch circuit 230 is connected between the first electrode 204 and the internal circuit 228, and the switch circuit 230 is controlled by the control circuit 216. When measuring the internal resistance 202, the switch circuit 230 is turned off, i.e., opened, by a control signal a from the control circuit 216, and the internal circuit 228 is disconnected. This makes it possible to measure only the internal resistance 202 without being affected by the internal circuit 228 using the method described above.

[0025] [Embodiment 2] In the above-described first embodiment, the first switch element 208 and the second switch element 212 are each configured with an N-MOS transistor. However, the present invention is not limited to the above example. For example, as in the following second embodiment, the switch elements may be configured with P-MOS transistors. A semiconductor integrated circuit device 300 of the second embodiment will be described with reference to FIG. 3.

[0026] The semiconductor integrated circuit device 300 of the second embodiment includes a first electrode 304 and a second electrode 306. Two identical circuits, each including switch elements 308 and 312 formed of P-MOS transistors and resistor elements 310 and 314 connected in series, are connected in parallel between the first electrode 304 and the second electrode 306. That is, the first switch element 308 and the first resistor element 310 are connected in series, and the second switch element 312 and the second resistor element 314 are connected in series.

[0027] Specifically, the source node and bulk node of the P-MOS transistor constituting the first switch element 308 are connected to the first electrode 304, and a first resistor element 310 is connected between the drain node and the second electrode 306. Furthermore, the source node and bulk node of the P-MOS transistor constituting the second switch element 312 are connected to the first electrode 304, and a second resistor element 314 is connected between the drain node and the second electrode 306. The P-MOS transistors constituting the first switch element 308 and the second switch element 312 are assumed to have the same size, material, and characteristics. Furthermore, the first resistor element 310 and the second resistor element 314 are assumed to be exactly the same size and material, and to have the same resistance value.

[0028] The gate node of the P-MOS transistor constituting the first switch element 308 and the gate node of the P-MOS transistor constituting the second switch element 312 are connected to a control circuit 316. The control circuit 316 turns on / off the first switch element 308 and the second switch element 312. That is, the control circuit 316 controls the conductive / non-conductive state of the first switch element 308 and the second switch element 312, thereby switching between flowing a current through either the first resistor element 310 or the second resistor element 314, or flowing a current through both.

[0029] The method for measuring the internal resistance 302 of the semiconductor integrated circuit device 300 described above is substantially the same as the method for measuring the internal resistance 202 of the semiconductor integrated circuit device 200 of the first embodiment, and therefore a detailed description thereof will be omitted.

[0030] According to the second embodiment, the P-MOS transistors constituting the first switch element 308 and the second switch element 312 are controlled to be turned on and off. Then, the voltage values ​​Vmeas1 and Vmeas2 between the measurement / application unit 326 and GND (between the first electrode 304 and the second electrode 306 when viewed from the measurement device groups 318 and 320) are measured twice. This makes it possible to measure the resistance without the influence of the resistance value Rcounit of the measurement device group 318, which includes the contact resistance between the first electrode 304 and the probe needle 322, and the resistance value Rcognd of the measurement device group 320, which includes the contact resistance between the second electrode 306 and the probe needle 324.

[0031] Furthermore, similarly to the first embodiment, in the second embodiment, an internal circuit (not shown) is actually connected between the first electrode 304 and the second electrode 306. If a switch circuit is connected between the first electrode 304 and the internal circuit, and this switch circuit is controlled by the control circuit 316 when measuring the internal resistance 302 to disconnect the internal circuit, then similarly to the first embodiment, it is possible to measure only the internal resistance 302 without being affected by the internal circuit.

[0032] [Embodiment 3] Next, a semiconductor integrated circuit device 400 of embodiment 3 will be described with reference to FIG. 4A. In the semiconductor integrated circuit device 400 of embodiment 3, two resistor elements, namely, a first resistor element 408, a second resistor element 410, and a first switch element 412, are connected in series between a first electrode 404 and a second electrode 406, and between the first electrode 404 and the second electrode 406. That is, a source node of an N-MOS transistor constituting the first switch element 412 is connected to the second electrode 406, and the first resistor element 408 and the second resistor element 410 are connected in series between the drain node and the first electrode 404. A bulk node of the N-MOS transistor constituting the first switch element 412 is connected to the second electrode 406.

[0033] Furthermore, a second switch element 414 is connected between the second electrode 406 and an intermediate node where the first resistor element 408 and the second resistor element 410 are connected in series. Specifically, the drain node of the N-MOS transistor constituting the second switch element 414 is connected to the intermediate node where the first resistor element 408 and the second resistor element 410 are connected in series, and the source node is connected to the second electrode 406. Furthermore, the bulk node of the N-MOS transistor constituting the second switch element 414 is connected to the second electrode 406.

[0034] Furthermore, a third switch element 416 is connected in parallel to the first switch element 412. That is, the drain node of the N-MOS transistor constituting the third switch element 416 is connected to the drain node of the N-MOS transistor constituting the first switch element 412. In addition, the source node of the N-MOS transistor constituting the third switch element 416 is connected to the second electrode 406. The bulk node of the N-MOS transistor constituting the third switch element 416 is also connected to the second electrode 406.

[0035] The gate nodes of the N-MOS transistors constituting the first switch element 412, the second switch element 414, and the third switch element 416 are connected to a control circuit 418. The control circuit 418 turns on / off the first switch element 412, the second switch element 414, and the third switch element 416. That is, the control circuit 418 controls the conductive / non-conductive states of the first switch element 412, the second switch element 414, and the third switch element 416. This allows switching control between flowing a current only through the first resistor element 408 and flowing a current through both the first resistor element 408 and the second resistor element 410.

[0036] The first resistor element 408 and the second resistor element 410 are assumed to be identical in size and material and have the same resistance value. The N-MOS transistors constituting the first switch element 412, the second switch element 414, and the third switch element 416 are also assumed to be identical in size, material, and characteristics.

[0037] A method for measuring the internal resistance 402 of the semiconductor integrated circuit device 400 described above will now be described. As shown in Fig. 4A, in order to measure the resistance value of the internal resistance 402 of the semiconductor integrated circuit device 400 in a wafer state, a group of measuring devices 420 and 422 with probes called a probe card are placed opposite a wafer including the semiconductor integrated circuit device 400. Then, probe needles 424 and 426 formed on the probe card are brought into contact with a first electrode 404 and a second electrode 406 formed on the wafer.

[0038] Next, the control circuit 418 sets the gate voltage of the N-MOS transistor constituting the first switch element 412 to the "H" level to turn on the first switch element 412, i.e., to a conductive state. On the other hand, the control circuit 418 sets the gate voltages of the N-MOS transistors constituting the second switch element 414 and the third switch element 416 to the "L" level to turn off the second switch element 414 and the third switch element 416, i.e., to a non-conductive state. That is, a current flows through the first resistor element 408 and the second resistor element 410, and a current flows only through the first switch element 412.

[0039] In this state, a current Iforce is forcibly applied from the measurement / application unit 428 of the measurement device group 420 to the first electrode 404, and a voltage Vmeas1 is measured between the measurement / application unit 428 and GND (between the first electrode 404 and the second electrode 406 when viewed from the measurement device groups 420 and 422). Then, Vmeas1 is expressed by the following equation (6).

number

[0040] Next, the control circuit 418 sets the gate voltages of the N-MOS transistors constituting the first switch element 412 and the third switch element 416 to the "H" level, turning on the first switch element 412 and the third switch element 416, i.e., bringing them into a conductive state. On the other hand, the control circuit 418 sets the gate voltage of the N-MOS transistor constituting the second switch element 414 to the "L" level, turning off the second switch element, i.e., bringing it into a non-conductive state. That is, a current flows through the first resistance element 408 and the second resistance element 410, and also flows through both the first switch element 412 and the third switch element 416.

[0041] In this state, a current Iforce is forcibly applied from the measurement / application unit 428 of the measurement device group 420 to the first electrode 404, and the voltage Vmeas2 between the measurement / application unit 428 and GND (between the first electrode 404 and the second electrode 406 when viewed from the measurement device groups 420 and 422) is measured. Then, Vmeas2 is expressed by the following equation (7).

number

[0042] The N-MOS transistors constituting the first switch element 412 and the third switch element 416 have the same size, material, characteristics, and on-resistance. Therefore, the above formula (7) can be rewritten as the following formula (8).

number

[0043] Subsequently, the control circuit 418 sets the gate voltage of the N-MOS transistor constituting the second switch element 414 to the "H" level to turn on, i.e., to a conductive state, the second switch element 414. On the other hand, the control circuit 418 sets the gate voltage of the N-MOS transistors constituting the first switch element 412 and the third switch element 416 to the "L" level to turn off, i.e., to a non-conductive state, the first switch element 412 and the third switch element 416.

[0044] In this state, a current Iforce is forcibly applied from the measurement / application unit 428 of the measurement device group 420 to the first electrode 404, and a voltage Vmeas3 is measured between the measurement / application unit 428 and GND (between the first electrode 404 and the second electrode 406 when viewed from the measurement device groups 420 and 422). Then, Vmeas3 is expressed by the following equation (9).

number

[0045] The size, material, and characteristics of the N-MOS transistors constituting the first switch element 412 and the second switch element 414 are the same, and therefore the on-resistance value RN1 of the N-MOS transistor constituting the first switch element 412 is equal to the on-resistance value RN2 of the N-MOS transistor constituting the second switch element 414. Therefore, the above formula (9) can be rewritten as the following formula (10).

number

[0046] Next, the measured resistance value is calculated from equations (6), (8), and (10). First, subtract both sides of equation (8) from both sides of equation (6), eliminating the terms Rcounit, Rcognd, R11, and R12, as in equation (11) below, and leaving only the term RN1.

number

[0047] Then, by rearranging equation (11), the on-resistance value RN1 of the N-MOS transistor that configures the first switch element 412 can be calculated from the values ​​of Vmeas1, Vmeas2, and Iforce, as expressed in the following equation (12).

number

[0048] Furthermore, by subtracting both sides of equation (10) from both sides of equation (6), the terms Rcounit, Rcognd, R11, and R1N can be eliminated, leaving only the term R12, as in equation (13). In other words, the value of the voltage drop across the second resistor element 410 can be found.

number

[0049] By rearranging equation (13), the resistance value R12 of the second resistor element 410 can be calculated. Furthermore, since the first resistor element 408 and the second resistor element 410 have the same size and material and have equal resistance values ​​R11 and R12, the resistance values ​​R11 and R12 can be calculated as shown in equation (14) below.

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[0050] Finally, the value of the internal resistance 402 of the semiconductor integrated circuit device 400 can be calculated from the equations (12) and (14) as in the following equation (15).

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[0051] As described above, according to the third embodiment, the N-MOS transistors constituting the first switch element 412, the second switch element 414, and the third switch element 416 are controlled to be turned on and off. Then, the voltage values ​​Vmeas1, Vmeas2, and Vmeas3 between the measurement / application unit 428 and GND (between the first electrode 404 and the second electrode 406 when viewed from the measurement device groups 420 and 422) are measured three times. This makes it possible to measure the resistance while excluding the influence of the resistance value Rcounit of the measurement device group 420, which includes the contact resistance between the first electrode 404 and the probe needle 424, and the resistance value Rcognd of the measurement device group 422, which includes the contact resistance between the second electrode 406 and the probe needle 426.

[0052] In the third embodiment, the first resistor element 408 and the second resistor element 410 can have resistance values ​​that are half the resistance values ​​of the first resistor element 210 and the second resistor element 214 of the first embodiment, respectively. This makes it possible to reduce the space occupied by the resistor elements in the semiconductor integrated circuit device.

[0053] Furthermore, in the third embodiment, the first resistor element 408 and the second resistor element 410 have been described as having the same size, material, and resistance value, but they may have different resistance values. For example, the ratio of the resistance values ​​of the first resistor element 408 and the second resistor element 410 can be set to R11:R12=1:2. In that case, the above formula (14) becomes the following formula (16). JPEG2026007029000017.jpg14164

[0054] In an actual circuit, as shown in Fig. 4B, an internal circuit 430 is connected between the first electrode 404 and the second electrode 406. Therefore, as shown in Fig. 4B, a switch circuit 432 is connected between the first electrode 404 and the internal circuit 430, and the switch circuit 432 is controlled by the control circuit 418. When measuring the internal resistance 402, the switch circuit 432 is turned off, i.e., opened, by a control signal a from the control circuit 418, and the internal circuit 430 is disconnected. This makes it possible to measure only the internal resistance 402 without being affected by the internal circuit 430 using the method described above.

[0055] [Embodiment 4] In the above-described third embodiment, the first switch element 412, the second switch element 414, and the third switch element 416 are each configured with an N-MOS transistor. However, the present invention is not limited to the above example. For example, as in the following fourth embodiment, the switch elements may be configured with P-MOS transistors. A semiconductor integrated circuit device 500 of the fourth embodiment will be described with reference to FIG. 5.

[0056] In the semiconductor integrated circuit device 500 of the fourth embodiment, two resistance elements, namely, a first resistance element 508, a second resistance element 510, and a first switch element 512, are connected in series between a first electrode 504 and a second electrode 506, and between the first electrode 504 and the second electrode 506. That is, a source node of a P-MOS transistor constituting the first switch element 512 is connected to the first electrode 504, and the first resistance element 508 and the second resistance element 510 are connected in series between the drain node and the second electrode 506. A bulk node of the P-MOS transistor constituting the first switch element 512 is connected to the first electrode 504.

[0057] Furthermore, a second switch element 514 is connected between the first electrode 504 and an intermediate node where the first resistor element 508 and the second resistor element 510 are connected in series. Specifically, a source node of a P-MOS transistor constituting the second switch element 514 is connected to the first electrode 504, and a drain node is connected to the intermediate node where the first resistor element 508 and the second resistor element 510 are connected in series. Furthermore, a bulk node of the P-MOS transistor constituting the second switch element 514 is connected to the first electrode 504.

[0058] Furthermore, a third switch element 516 is connected in parallel to the first switch element 512. That is, the source node of the P-MOS transistor constituting the third switch element 516 is connected to the first electrode 504. The bulk node of the P-MOS transistor constituting the third switch element 516 is also connected to the first electrode 504. In addition, the drain node of the P-MOS transistor constituting the first switch element 512 is connected to the drain node of the P-MOS transistor constituting the third switch element 516.

[0059] The gate nodes of the P-MOS transistors constituting the first switch element 512, the second switch element 514, and the third switch element 516 are connected to a control circuit 518. The control circuit 518 turns on / off the first switch element 512, the second switch element 514, and the third switch element 516. That is, the control circuit 518 controls the conductive / non-conductive state of the first switch element 512, the second switch element 514, and the third switch element 516, thereby switching between flowing a current through both the first resistor element 508 and the second resistor element 510 and flowing a current only through the second resistor element 510.

[0060] The first resistor element 508 and the second resistor element 510 are assumed to be identical in size and material, and have the same resistance value. The P-MOS transistors constituting the first switch element 512, the second switch element 514, and the third switch element 516 are also assumed to be identical in size, material, and characteristics.

[0061] The method for measuring the internal resistance 502 of the semiconductor integrated circuit device 400 described above is substantially the same as the method for measuring the internal resistance 402 of the semiconductor integrated circuit device 400 of the third embodiment, and therefore a detailed description thereof will be omitted.

[0062] According to the fourth embodiment, the on / off of N-MOS transistors constituting the first switch element 512, the second switch element 514, and the third switch element 516 is controlled. Then, the voltage values ​​Vmeas1, Vmeas2, and Vmeas3 between the measurement / application unit 528 and GND (between the first electrode 504 and the second electrode 506 when viewed from the measurement device groups 520 and 522) are measured three times. This makes it possible to measure the resistance without the influence of the resistance value Rcounit of the measurement device group 520, which includes the contact resistance between the first electrode 504 and the probe needle 524, and the resistance value Rcognd of the measurement device group 522, which includes the contact resistance between the second electrode 506 and the probe needle 526.

[0063] Furthermore, similarly to the third embodiment, in the fourth embodiment, an internal circuit (not shown) is actually connected between the first electrode 504 and the second electrode 506. If a switch circuit is connected between the first electrode 504 and the internal circuit, and this switch circuit is controlled by the control circuit 518 when measuring the internal resistance 502 to disconnect the internal circuit, then similarly to the third embodiment, only the internal resistance 502 can be measured without being affected by the internal circuit. [Explanation of symbols]

[0064] 100 Semiconductor integrated circuit device 102 Internal Resistance 104, 106 Measuring equipment group 108 Probe needle 110 Probe needle 112 Tip electrode 114 Tip Electrode 116 Measurement and application unit 118 Contact resistance 120 Contact resistance 200 Semiconductor integrated circuit device 202 Internal Resistance 204 1st electrode 206 2nd electrode 208 first switch element 210 first resistor element 212 second switch element 214 second resistor element 216 Control circuit 218, 220 Measuring equipment group 222, 224 Probe needle 226 Measurement and application unit 228 Internal circuit 230 Switch Circuit 300 Semiconductor integrated circuit device 302 Internal Resistance 304 1st electrode 306 2nd electrode 308 First switch element 310 first resistor element 312 Second switch element 314 Second Resistor Element 316 Control Circuit 318, 320 Measuring equipment group 322, 324 Probe needle 326 Measurement and application unit 400 Semiconductor integrated circuit device 402 Internal Resistance 404 1st electrode 406 2nd electrode 408 First Resistor Element 410 second resistor element 412 First switch element 414 Second switch element 416 Third switch element 418 Control Circuit 420, 422 Measuring equipment group 424, 426 Probe needle 428 Measurement and application unit 430 Internal circuit 432 Switch Circuit 500 Semiconductor integrated circuit device 502 Internal Resistance 504 1st electrode 506 2nd electrode 508 first resistor element 510 second resistor element 512 First switch element 514 Second switch element 516 Third switch element 518 Control Circuit 520, 522 Measuring equipment group 524, 526 Probe needle 528 Measurement and application unit

Claims

1. a first electrode and a second electrode; two resistance elements of the same configuration connected in parallel or in series between the first electrode and the second electrode; a plurality of switch elements formed of MOS transistors that are selectively controlled to either pass a current through one of the two resistance elements or pass a current through both of the two resistance elements; a control circuit for controlling the plurality of switch elements, a semiconductor integrated circuit device in which, by controlling the plurality of switch elements by the control circuit, a voltage when a current is caused to flow through one of the two resistance elements and a voltage when a current is caused to flow through both of the two resistance elements are output between the first electrode and the second electrode.

2. two circuits each having the same configuration, in which a switch element formed by a MOS transistor and a resistance element are connected in series, are connected in parallel between the first electrode and the second electrode; 2. The semiconductor integrated circuit device according to claim 1, wherein the control circuit controls the plurality of switch elements to switch between flowing a current through one of the two resistance elements and flowing a current through both of the two resistance elements.

3. 3. The semiconductor integrated circuit device according to claim 2, wherein the MOS transistors are N-MOS transistors, the resistance element is connected between the drain and the first electrode of the N-MOS transistor, and the gate of the N-MOS transistor is connected to the control circuit.

4. 3. The semiconductor integrated circuit device according to claim 2, wherein the MOS transistors are P-MOS transistors, the resistance element is connected between the drain and the second electrode of the P-MOS transistor, and the gate of the P-MOS transistor is connected to the control circuit.

5. the two resistance elements and a first MOS transistor are connected in series between the first electrode and the second electrode, a second MOS transistor is connected between an intermediate node at which the two resistance elements are connected in series and the first electrode or the second electrode, and a third MOS transistor is connected in parallel to the first MOS transistor between the two resistance elements and the first electrode or the second electrode; 2. The semiconductor integrated circuit device according to claim 1, wherein the control circuit controls the plurality of switch elements to switch between flowing a current through one of the two resistance elements and flowing a current through both of the two resistance elements, and when flowing a current through both of the two resistance elements, switches between flowing a current through one of the first MOS transistor and the third MOS transistor and flowing a current through both of them.

6. 6. The semiconductor integrated circuit device of claim 5, wherein the first MOS transistor, the second MOS transistor, and the third MOS transistor are all N-MOS transistors, the two series-connected resistance elements are connected between the drains and the first electrode of the first MOS transistor and the third MOS transistor, the drain of the second MOS transistor is connected to the intermediate node, the source is connected to the second electrode, and the gates of the first MOS transistor, the second MOS transistor, and the third MOS transistor are connected to the control circuit.

7. 6. The semiconductor integrated circuit device according to claim 5, wherein the first MOS transistor, the second MOS transistor, and the third MOS transistor are all P-MOS transistors, the two series-connected resistance elements are connected between the drains and the second electrodes of the first MOS transistor and the third MOS transistor, the drain of the second MOS transistor is connected to the intermediate node, the source is connected to the first electrode, and the gates of the first MOS transistor, the second MOS transistor, and the third MOS transistor are connected to the control circuit.

8. a first electrode and a second electrode; two resistance elements of the same configuration connected in parallel or in series between the first electrode and the second electrode; a plurality of switch elements formed of MOS transistors that are selectively controlled to either pass a current through one of the two resistance elements or pass a current through both of the two resistance elements; a control circuit for controlling the plurality of switch elements, A measurement method in which, by controlling the plurality of switch elements using the control circuit, a voltage value when a current is passed through one of the two resistive elements between the first electrode and the second electrode and a voltage value when a current is passed through both of the two resistive elements are measured, and the measured values ​​are used to obtain a resistance value between the first electrode and the second electrode.

9. two circuits each having the same configuration, in which a switch element formed by a MOS transistor and a resistance element are connected in series, are connected in parallel between the first electrode and the second electrode; 9. The measurement method according to claim 8, wherein the control circuit controls the plurality of switch elements to switch between flowing a current through one of the two resistance elements and flowing a current through both of the two resistance elements.

10. the two resistance elements and a first MOS transistor are connected in series between the first electrode and the second electrode, a second MOS transistor is connected between an intermediate node at which the two resistance elements are connected in series and the first electrode or the second electrode, and a third MOS transistor is connected in parallel to the first MOS transistor between the two resistance elements and the first electrode or the second electrode; 9. The measurement method according to claim 8, wherein the control circuit controls the plurality of switch elements to switch between flowing a current through one of the two resistance elements and flowing a current through both of the two resistance elements, and when flowing a current through both of the two resistance elements, switches between flowing a current through one of the first MOS transistor and the third MOS transistor and flowing a current through both of them.

Citation Information

Patent Citations

  • Electronic circuit device, and measuring method therefor

    JP2006170878A