FSK demodulator

Abstract

To provide an FSK demodulator that can obtain a demodulation signal with a low BER just after a signal is received and demodulate the signal without being affected by an offset caused in a frequency amplitude conversion section.SOLUTION: A low-pass filter configured to remove a high frequency component of an output of the frequency-amplitude conversion unit; a delay unit configured to delay an output of the low-pass filter; A difference calculation unit configured to output a difference signal, a peak hold unit configured to output a peak hold value of an absolute value of a positive number and a peak hold value of an absolute value of a negative number from the difference signal, a threshold setting unit configured to set a first threshold and a second threshold based on the peak hold values, a first comparator configured to compare the difference signal with the first threshold, and a second comparator configured to compare a signal obtained by inverting a sign of the difference signal with the second threshold; And a latch means for inverting an output by using the output signal of the first comparator and the output signal of the second comparator as a trigger.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an FSK (Frequency Shift Keying) demodulator that demodulates a received FSK modulated signal, and particularly to an FSK demodulator that is suitable for use in demodulating a GFSK modulated signal. [Background technology]

[0002] There are a wide variety of FSK demodulators, both analog and digital. Figure 4 is a block diagram showing the configuration of a conventional quadrature FSK demodulator. This FSK demodulator consists of a pre-lowpass filter 21, a multiplier 22, a phase shifter 23, a post-lowpass filter 24, a threshold value setting unit 31, and a comparator 32.

[0003] An FSK-modulated signal, which is a voltage pulse signal, has frequency components higher than the fundamental frequency attenuated by a pre-low-pass filter 21 and is input to a subsequent multiplier 22 and phase shifter 23. The output signal of the pre-low-pass filter 21 is multiplied by the output of the phase shifter 23 in the multiplier 22, resulting in a DC component corresponding to the amount of phase change in the phase shifter 23. With this configuration, it is possible to convert a change in frequency into a change in amplitude by changing the amount of phase rotation α in the phase shifter 23 according to the frequency. In other words, the frequency-amplitude conversion unit is made up of the block included in the reference numeral 20 enclosed by the dotted line in the figure.

[0004] Generally, in the quadrature system, by setting the amount of phase rotation α in phase shifter 23 to an odd multiple of 90 degrees at the center frequency of the FSK modulated signal, when a signal of the center frequency of the FSK modulated signal is input, the output of post-low pass filter 24 becomes zero (cos α = 0). In this case, when signals of frequencies above and below the center frequency of the FSK modulated signal are input, positive and negative values ​​are obtained at the output of post-low pass filter 24, and if the threshold of threshold setter 31 is set to zero, the output is binarized by comparator 32 to obtain an FSK demodulated signal.

[0005] In the above configuration, if the phase at the center frequency deviates from 90 degrees due to errors in the phase shifter, manufacturing variations, or environmental fluctuations, an offset occurs in the DC component of the output signal. When an offset occurs, an error occurs in the signal binarized by the comparator, resulting in a problem of a deterioration in the bit error rate (BER). To address this problem, the invention disclosed in Patent Document 1 uses an FSK center frequency signal and frequency amplitude conversion to provide a threshold value that is the center value of the amplitude to a comparator to determine whether to binarize it. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 5033065 Summary of the Invention [Problem to be solved by the invention]

[0007] The invention of the above-mentioned Patent Document 1 has high noise sensitivity because it uses only a threshold extracted from the center of the waveform for judgment, and the BER deteriorates when the noise of the input signal is large. In addition, because the time constant is relatively large, it takes time for the signal to reach the desired threshold after input, and there is a problem that the BER deteriorates during that time. The former has a particularly large effect on BER deterioration in GFSK, where the signal transition is gradual. The present invention aims to solve the above problems and improve the BER when noise is large, and further improve the BER immediately after signal input. [Means for solving the problem]

[0008] According to the first embodiment of the present invention, there are provided a frequency amplitude conversion unit that receives an FSK modulated signal and converts it into an amplitude signal corresponding to the frequency, a low pass filter that extracts frequency components equal to or lower than a cutoff frequency from the output of the frequency amplitude conversion unit based on the cutoff frequency corresponding to the bit rate of the input signal, delay means that delays the output of the low pass filter by a delay time that is the reciprocal of the bit rate, difference calculation means that calculates the difference between the output of the low pass filter and the output of the delay means and outputs a difference signal, and first peak hold means that outputs a peak hold value that is a positive absolute value from the output of the difference signal. There is provided an FSK demodulator comprising: second peak hold means for outputting a peak hold value of an absolute value of a negative number from the output of the difference signal; threshold setting means for setting a first threshold and a second threshold of the same or different values ​​based on the peak hold value of the absolute value of the positive number and / or the peak hold value of the absolute value of the negative number; a first comparator for comparing the difference signal with the first threshold; a second comparator for comparing a signal obtained by inverting the sign of the difference signal with the second threshold; and latch means for inverting the output using the output signal of the first comparator and the output signal of the second comparator as a trigger.

[0009] The threshold setting means sets the difference between a pre-stored peak hold value of the absolute value of a positive number and the output value of the first peak hold means as the first threshold, and sets the difference between a pre-stored peak hold value of the absolute value of a negative number and the output value of the second peak hold means as the second threshold, and the pre-stored peak hold value of the absolute value of a positive number and the pre-stored peak hold value of the absolute value of a negative number may be obtained by passing a signal that creates an input signal state in which the signal-to-noise ratio of the output signal of the frequency amplitude conversion unit is high to the first and second peak hold means, respectively.

[0010] In addition, in a second embodiment of the present invention, the first and second peak hold means each output at least one peak hold value under a first input signal condition in which the ratio of the output signal of the frequency amplitude conversion unit to the output noise is a first predetermined value, and each output at least one peak hold value under a second input signal condition in which the ratio of the output signal of the frequency amplitude conversion unit to the output noise is a second predetermined value that is smaller than the first predetermined value. In this case, the threshold setting means may be configured to calculate the difference between the maximum peak hold value under the first input signal condition and the maximum peak hold value under the second input signal condition, and may set this difference as the threshold value of the first and second comparators. Alternatively, the threshold setting means may calculate a difference between the peak hold value of the first peak hold means under the first input signal condition and the peak hold value under the second input signal condition, and set the threshold of the first comparator based on this difference, and may calculate a difference between the peak hold value of the second peak hold means under the first input signal condition and the peak hold value under the second input signal condition, and set the threshold of the second comparator based on this difference. This configuration allows the threshold to be preset.

[0011] Furthermore, by making the FSK demodulator also function as a GFSK demodulator for demodulating a GFSK signal, it becomes possible to demodulate with high precision even a signal that has a gradual transition at the shoulder of the signal. [Effects of the Invention]

[0012] According to one aspect of the present invention, a demodulated signal with a low BER can be obtained immediately after signal input, and demodulation can be performed without being affected by offsets occurring in the frequency amplitude conversion section. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a diagram illustrating an FSK demodulator according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a timing chart of the FSK demodulator shown in FIG. [Figure 3] FIG. 10 is a conceptual diagram illustrating threshold setting for an FSK demodulator according to a second embodiment of the present invention. [Figure 4] FIG. 1 is a diagram showing a conventional example. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the following embodiments, parts that are identical or equivalent to each other will be denoted by the same reference numerals.

[0015] (First embodiment) The first embodiment will be described in detail with reference to FIGS. <Overall structure> FIG. 1 is a diagram showing the overall configuration of an FSK demodulator according to a first embodiment. In this embodiment, demodulation of a GFSK signal will be described as an example. The frequency amplitude converter 1 in this embodiment is the frequency amplitude converter 20 shown in FIG. 4 minus the pre-low-pass filter 21 and post-low-pass filter 24. The low-pass filter 2 removes high-frequency signals and extracts the modulated signal. The delay unit 3 outputs a delayed signal with a delay time corresponding to the reciprocal of the bit rate of the GFSK modulated signal. The difference calculator 4 calculates and outputs the difference between the output of the low-pass filter 2 and the output of the delay unit 3. The first comparator 5 compares the output of the difference calculator 4 with a threshold and outputs the result. The sign inverter 6 inverts the sign (+ / -) of the output signal of the difference calculator 4 and outputs the result. The second comparator 7 compares the output signal of the sign inverter 6 with a threshold and outputs the result. The differential absolute value peak hold unit 8 outputs the peak hold value of the output of the differential calculation unit 4, and is equipped with a first peak hold unit and a second peak hold unit (not shown), with the first peak hold unit outputting the peak hold value of the absolute value of the positive number of the differential calculation output, and the second peak hold unit outputting the peak hold value of the absolute value of the negative number of the differential calculation output. The threshold setting unit 9 calculates a threshold value from the two output values ​​of the differential absolute value peak hold unit 8, and sets the calculation result as the threshold for each of the first comparator 5 and the second comparator 7. The latch unit 10 outputs the result of a latch triggered by inputting the output of the first comparator 5 as a set signal and the output of the second comparator 7 as a reset signal.

[0016] <Explanation of operation> Fig. 2 is a timing chart of the FSK demodulator shown in Fig. 1. In this diagram, S1 to S6 indicate signal waveforms at the various parts shown in Fig. 1, and S0 indicates transmission data before modulation. The input GFSK-modulated signal is converted by frequency-amplitude converter 1 into an amplitude signal corresponding to the frequency of the GFSK-modulated signal. Low-pass filter 2 then extracts the modulated signal and removes high-frequency noise, resulting in waveform S1. The cutoff frequency of low-pass filter 2 is set to at least half the bit rate of the GFSK-modulated signal. The output of low-pass filter 2 is then branched: one branch is directly applied to differential calculator 4, and the other branch is delayed by delay unit 3 for a predetermined time before being applied to differential calculator 4. The delay time in delay unit 3 is set to the reciprocal of the bit rate of the GFSK-modulated signal in order to detect noise generated per bit. Differential calculator 4 calculates the difference between amplitude signal (S1) and a delayed signal (S2) of the amplitude signal, and outputs a differential value (S3). This differential calculation removes DC noise (direct-current components caused by offset) contained in the modulated signal.

[0017] The first comparator 5 and the second comparator 7 compare the difference value (S3) with a threshold value set by the threshold setting unit 9. The first comparator 5 compares the difference value (S3) with the threshold value set by the threshold setting unit 9, and outputs a high-level voltage (H) if the difference value (S3) is equal to or greater than the threshold, and outputs a low-level voltage (L) if the difference value (S3) is less than the threshold. The second comparator 7 compares the sign-inverted signal of the difference value (S3) with a threshold value set by the threshold setting unit 9 (to be described later), and outputs a high-level voltage (H) if the sign-inverted signal of the difference value (S3) is equal to or greater than the threshold, and outputs a low-level voltage (L) if the sign-inverted signal is less than the threshold. In other words, these comparators determine that the difference value is H if it exceeds 0 and its absolute value is equal to or greater than the threshold, and determine that the difference value is L if it is less than 0 and its absolute value is equal to or greater than the threshold.

[0018] The latch unit 10 outputs a demodulated signal (S6) by outputting H if the output (S4) of the first comparator 5 is H, and by outputting L if the output (S5) of the second comparator 7 is H. This latch unit 10 may operate in the same way as an RS flip-flop.

[0019] The first peak hold unit of the absolute difference peak hold unit 8 outputs a peak hold value of the absolute value of the positive difference value, and the second peak hold unit outputs a peak hold value of the absolute value of the negative difference value. Peak hold is performed over a time period, e.g., a delay time plus 1 or 2 bits, which is appropriately selected depending on the encoding format (e.g., RZ, NRZ, etc.) of the signal being handled. The threshold setting unit 9 calculates thresholds from the peak hold values ​​output from the first and second peak hold units and sets the thresholds for the first comparator 5 and the second comparator 7. In this embodiment, a pseudo signal with little or no noise is used to output the peak hold value of the absolute value of the positive difference value and the peak hold value of the absolute value of the negative difference value to the first and second peak hold units, respectively, and store these values ​​in registers. The threshold setting unit 9 then calculates the difference between these stored peak hold values ​​and the signal actually input by operating the demodulator, and sets these as the thresholds for the first comparator 5 and the second comparator 7. The pre-stored peak hold values ​​are one for the absolute value of the positive difference value and one for the absolute value of the negative difference value. The difference between the former and the peak hold value of the absolute value of the positive difference value between the signal (actual measurement value) actually input by operating the demodulator is set as the threshold of the first comparator 5, and the difference between the latter and the peak hold value of the absolute value of the negative difference value between the actual measurement value is set as the threshold of the second comparator 7. The pseudo signal is a signal that creates an input signal state in which the ratio of the output signal to output noise (signal-to-noise ratio S / N) of the frequency amplitude conversion unit 1 is 20 dB or more; for example, a signal with such a ratio of 30 dB is used. The peak hold values ​​pre-stored using this pseudo signal are stored in a register (not shown) before shipping a product equipped with the demodulator or during calibration of the demodulator. In this way, by comparing the difference value with a fixed threshold, a demodulated signal with a low BER can be obtained immediately after signal input, making it possible to create an FSK demodulator that is not affected by the offset generated in the frequency amplitude conversion unit 1.

[0020] (Second embodiment) <Configuration overview> The second embodiment will be described with reference to FIG. 3. FIG. 3 is a conceptual diagram illustrating signal processing in the differential absolute value peak hold unit 8 and threshold setting unit 9 of the FSK demodulator shown in FIG. 1. The second embodiment differs from the first embodiment only in the signal processing in these blocks, and is otherwise similar to the first embodiment. In this embodiment, the threshold setting is performed using a preset based on two peak hold values ​​of two types of pseudo signals prepared in advance. The two types of pseudo signals are generated by changing the signal level using a software module or an external signal generator, and represent a signal with high noise and a signal with low noise. That is, in this embodiment, the difference between the peak hold value when the input signal has high noise and the peak hold value when the input signal has low noise is calculated, and the calculated result is set as the threshold value for the first comparator 5 and the second comparator 7. The threshold setting is performed before shipping a product equipped with the demodulator or when calibrating the demodulator.

[0021] <Explanation of operation> The reciprocal of the bit rate of the GFSK modulated signal is set as the delay time of the delay unit 3, and a first pseudo signal and a second pseudo signal are prepared. The first pseudo signal is a signal that creates an input signal state in which the ratio of the output signal to the output noise (S / N) of the frequency amplitude conversion unit 1 is 12 dB, and the second pseudo signal is a signal that creates an input signal state in which the S / N ratio is 20 dB or higher. Figure 3(a) shows the output waveform of the low-pass filter 2 when the first pseudo signal (S / N ratio 12 dB) is input, and Figure 3(b) shows the output waveform of the low-pass filter 2 when the second pseudo signal (S / N ratio 30 dB) is input. Figure 3(c) conceptually shows the difference between these pseudo signals.

[0022] First, a first pseudo signal is input to frequency-amplitude converter 1, and the signal shown in Figure 3(a) is directly applied to difference calculator 4, while the signal is delayed by delay unit 3 by the reciprocal of the bit rate of the GFSK modulated signal and applied to difference calculator 4. The difference value of these applied signals is output from difference calculator 4 and applied to absolute difference peak hold unit 8. The first peak hold unit of absolute difference peak hold unit 8 outputs a first peak hold value, which is the absolute value of the positive difference value, and the second peak hold unit outputs a second peak hold value, which is the absolute value of the negative difference value. These peak hold values ​​are stored in a register (not shown). Next, the second pseudo signal is input to the frequency-amplitude converter 1, and the signal shown in Figure 3(b) is applied directly to the difference calculator 4, while the signal is delayed by the delay unit 3 by the reciprocal of the bit rate of the GFSK modulated signal and applied to the difference calculator 4. The difference value of these applied signals is output from the difference calculator 4 and applied to the difference absolute value peak hold unit 8. The first peak hold unit of the difference absolute value peak hold unit 8 outputs a third peak hold value, which is the absolute value of the positive difference value, and the second peak hold unit outputs a fourth peak hold value, which is the absolute value of the negative difference value. These peak hold values ​​are stored in a register (not shown).

[0023] When the first to fourth peak hold values ​​are stored in the register in this manner, the threshold setting unit 9 calculates the difference between these peak hold values ​​and sets the calculation result as a threshold value in the first comparator 5 and the second comparator 7. The calculation conditions and threshold values ​​to be set at this time are either of the following: (1) The difference between the larger of the first peak hold value and the third peak hold value and the larger of the second peak hold value and the fourth peak hold value is calculated, and this difference is provided as the same threshold value to the first comparator 5 and the second comparator 7. (2) The difference between the first peak hold value and the third peak hold value is given to the first comparator 5 as a threshold value, and the difference between the second peak hold value and the fourth peak hold value is given to the second comparator 7 as a threshold value. As mentioned above, Figure 3(c) shows the difference in the peak hold value of the pseudo signal, with TH1 on the upper side of the signal waveform corresponding to the threshold set in the first comparator 5, and TH2 on the lower side corresponding to the threshold set in the second comparator 7. TH2 is an absolute value, but is shown with a minus sign to make the figure easier to understand. In this embodiment, since Fig. 3(b) does not contain noise that may cause malfunction, and the DC offset is also removed by the differential processing performed by the differential calculation unit 4, substantially the same threshold value can be obtained whether the calculation (1) or the calculation (2) is adopted. However, either (1) or (2) may be selected as appropriate depending on the environment in which the demodulator is used. In this embodiment, the difference absolute value peak hold unit 8 can extract noise that occurs per bit time, and by setting a threshold based on this, the first comparator 5 and the second comparator 7 do not respond to noise that occurs per bit time. In other words, noise sensitivity can be reduced, and signals with gradual transitions such as GFSK signals can be correctly determined even when there is a lot of noise.

[0024] The above-described embodiments of the present invention have been described, but the FSK demodulator may be implemented in hardware, or may be implemented as a software module, or may be realized by a combination of these.Furthermore, it may be constructed using an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit), or may be realized by a combination of these. In addition, the delay amount in the delay section may be configured so that an optimal value corresponding to the bit rate of the input signal is stored in a memory means, and the stored delay amount is set in the delay section according to the selected bit rate when the demodulator is used. Also, although the latch section operates in the same way as an RS flip-flop, it may operate in the same way as a toggle circuit. Furthermore, although an asynchronous type has been described, a synchronous type may also be used. In short, any latch means that operates such that one comparator output becomes an ON signal and the other comparator output becomes an OFF signal, resulting in the formation of a demodulated signal, can be used as a replacement. In addition, in the first embodiment, a register is used as the means for storing the peak hold value to be stored in advance, but it is also possible to use other storage means, such as utilizing RAM implemented in the receiving device or integrated circuit. It is also possible to set the threshold by storing a coefficient according to the reception strength instead of the peak hold value in a lookup table in advance, extracting the coefficient according to the reception strength, and multiplying it by the actually measured peak hold value, but this is inferior to the first embodiment in terms of speed and accuracy. Furthermore, in setting the threshold, a signal with a high signal-to-noise ratio of 20 dB or more was used as a reference, and the difference between this and the actually measured signal or pseudo signal was calculated, but this is a value that takes into account the performance of a general receiver and is not limited to this. Needless to say, a person skilled in the art with ordinary creative ability could use a different value as an appropriate reference. Furthermore, although the embodiment has been described taking the demodulation of a GFSK signal as an example, the present invention can also be used to demodulate an FSK signal, and can be used for both demodulation of both. [Explanation of symbols]

[0025] 1 Frequency-to-amplitude converter 2 Low-pass filter 3 Delay section 4 Difference calculation section 5 First Comparator 6 Sign inversion section 7 Second Comparator 8. Differential absolute value peak hold section 9 Threshold setting section 10 Latch section

Claims

1. An FSK demodulator for demodulating an FSK modulated signal, a frequency amplitude conversion unit that receives an FSK modulated signal and converts it into an amplitude signal according to the frequency; a low-pass filter that extracts frequency components equal to or lower than a cutoff frequency from the output signal of the frequency amplitude converter based on a cutoff frequency corresponding to a bit rate of the input signal; delay means for delaying the output of the low-pass filter by a delay time equal to the reciprocal of the bit rate; a difference calculation means for calculating a difference between the output of the low-pass filter and the output of the delay means and outputting a difference signal; a first peak hold means for outputting a peak hold value of an absolute value of a positive number from the output of the differential signal; a second peak hold means for outputting a peak hold value of the absolute value of a negative number from the output of the differential signal; a threshold value setting means for setting a first threshold value and a second threshold value, which may be the same or different, based on the peak hold value of the absolute value of the positive number and / or the peak hold value of the absolute value of the negative number; a first comparator that compares the difference signal with the first threshold; a second comparator that compares a signal obtained by inverting the sign of the difference signal with the second threshold; and a latch means for inverting an output using the output signal of said first comparator and the output signal of said second comparator as a trigger.

2. the threshold value setting means sets the difference between a peak hold value of an absolute value of a positive number stored in advance and the output value of the first peak hold means as the first threshold value; a difference between a peak hold value of an absolute value of a negative number stored in advance and an output value of the second peak hold means is set as the second threshold value; 2. The FSK demodulator according to claim 1, wherein the pre-stored peak hold value of the absolute value of a positive number and the pre-stored peak hold value of the absolute value of a negative number are obtained by passing a signal that creates an input signal state in which the signal-to-noise ratio of the output signal of the frequency amplitude conversion unit is high into the first and second peak hold means, respectively.

3. the first and second peak hold means each output at least one peak hold value under a first input signal condition under which the signal-to-noise ratio of the output signal of the frequency amplitude conversion unit is a first predetermined value, and each output at least one peak hold value under a second input signal condition under which the signal-to-noise ratio of the output signal of the frequency amplitude conversion unit is a second predetermined value that is smaller than the first predetermined value; 2. The FSK demodulator according to claim 1, wherein the threshold setting means calculates a difference between the largest peak hold value under the first input signal condition and the largest peak hold value under the second input signal condition, and sets the thresholds of the first comparator and the second comparator based on the difference.

4. the first and second peak hold means output peak hold values ​​under a first input signal condition where the signal-to-noise ratio of the output signal of the frequency amplitude conversion unit is a first predetermined value, and output peak hold values ​​under a second input signal condition where the signal-to-noise ratio of the output signal of the frequency amplitude conversion unit is a second predetermined value; the threshold value setting means calculates a difference between a peak hold value of the first peak hold means under the first input signal condition and a peak hold value under the second input signal condition, and sets a threshold value of the first comparator based on the difference; 2. The FSK demodulator according to claim 1, wherein a difference between a peak hold value of the second peak hold means under the first input signal condition and a peak hold value under the second input signal condition is calculated, and a threshold value of the second comparator is set based on the difference.

5. 2. The FSK demodulator according to claim 1, wherein the FSK demodulator also serves as a GFSK demodulator used for demodulating a GFSK signal.

Images