Sic substrate, sic epitaxial wafer, and method for manufacturing sic device
By controlling the density of metallic foreign matter in the edge region of the SiC substrate and employing precise polishing and cleaning methods, the surface roughness of the SiC epitaxial layer is minimized, improving the quality and efficiency of SiC device production.
Patent Information
- Application Number
- JP2024109661
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-08
- Publication Date
- 2026-01-21
AI Technical Summary
The surface roughness of the SiC epitaxial layer becomes locally rough near the outer edge, leading to defects and a reduced effective area in SiC devices, particularly as the layer thickness increases.
The SiC substrate is processed to achieve a low density of metallic foreign matter in the edge region, with specific density limits and polishing techniques to minimize surface roughness, followed by thorough cleaning to prevent metal impurities.
The SiC substrate and epitaxial wafer exhibit reduced edge roughness and increased effective area, enhancing the quality and efficiency of SiC device production.
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Figure 2026009642000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a method for manufacturing a SiC substrate, a SiC epitaxial wafer, and a SiC device. [Background technology]
[0002] Silicon carbide (SiC) has an electric breakdown field that is one order of magnitude larger than that of silicon (Si) and a band gap that is three times larger. Silicon carbide (SiC) also has a thermal conductivity that is about three times higher than that of silicon (Si). Therefore, silicon carbide (SiC) is expected to be applied to power devices, high-frequency devices, high-temperature operating devices, etc. For this reason, SiC epitaxial wafers have recently come to be used in these types of semiconductor devices.
[0003] SiC epitaxial wafers are obtained by stacking a SiC epitaxial layer on the surface of a SiC substrate. Hereinafter, the substrate before the SiC epitaxial layer is stacked will be referred to as the SiC substrate, and the substrate after the SiC epitaxial layer is stacked will be referred to as the SiC epitaxial wafer. SiC substrates are cut from SiC ingots. Transistors and wiring are formed in the SiC epitaxial layer of the SiC epitaxial wafer, and the SiC epitaxial wafer is then cut into chips to become a SiC device.
[0004] The SiC substrate cut from the SiC ingot is ground and polished by lapping to adjust the thickness, parallelism, and surface roughness.
[0005] Patent Document 1 describes chemical mechanical polishing (CMP) of the main surface of a SiC substrate on which a SiC epitaxial layer is to be formed. The slurry used for CMP may contain a metal oxidizing agent. If cleaning after CMP is insufficient, the metal oxidizing agent may remain as metal impurities. Patent Document 1 also describes that impurities remaining on the main surface can be removed by cleaning with aqua regia.
[0006] Furthermore, Patent Document 2 describes that metal impurities on the main surface of a SiC substrate cause deterioration of the electrical characteristics of the device. Patent Document 3 describes a cleaning method that can reduce metal impurities remaining on the main surface of a SiC substrate.
[0007] Furthermore, Patent Document 4 describes grinding the end faces of the SiC substrate in order to suppress the occurrence of edge defects. [Prior art documents] [Patent documents]
[0008] [Patent Document 1] Patent No. 7095765 [Patent Document 2] International Publication No. 2020 / 235225 [Patent Document 3] Japanese Patent Publication No. 2022-51689 [Patent Document 4] Patent No. 6481790 Summary of the Invention [Problem to be solved by the invention]
[0009] The surface roughness of the epitaxial layer may become locally rough near the outer edge of the SiC epitaxial layer. This tendency becomes more pronounced as the SiC epitaxial layer becomes thicker. This rough surface area can cause defects in SiC devices. In other words, if the surface roughness of the epitaxial layer becomes rough near the outer edge, the effective area of the SiC epitaxial wafer becomes smaller.
[0010] The present disclosure has been made in view of the above-mentioned problems, and aims to provide a SiC substrate and a SiC epitaxial wafer having a reduced amount of metallic foreign matter in the edge region, and a method for manufacturing a SiC device using the SiC substrate and the SiC epitaxial wafer. [Means for solving the problem]
[0011] In order to solve the above problems, the present invention provides the following means.
[0012] (1) In the SiC substrate according to the first aspect, the density of metallic foreign matter detected by a scanning electron microscope in the edge region within 5 mm from the outer peripheral edge is 1.5 pieces / mm 2 The following is the result.
[0013] (2) In the SiC substrate according to the above aspect, the density of the metallic foreign matter in the edge region is 1 piece / mm 2 The following is also acceptable.
[0014] (3) In the SiC substrate according to the above aspect, the density of the metallic foreign matter in the edge region is 0.6 pieces / mm 2 The following is also acceptable.
[0015] (4) In the SiC substrate according to the above aspect, the density of the chromium-containing metallic particles in the edge region of the metallic particles is 0.5 particles / mm 2 The following is also acceptable.
[0016] (5) In the SiC substrate according to the above aspect, the density of the calcium-containing metallic foreign particles in the edge region of the metallic foreign particles is 1 particle / mm 2 The following is also acceptable.
[0017] (6) In the SiC substrate according to the above aspect, the average number of metallic foreign matters may be 3 or less. The average number is the average value of the number of metallic foreign matters in a first area, a second area, and a third area of 0.18 mm × 10 mm under a scanning electron microscope. The first area, the second area, and the third area are located in the [1-100] direction from the center. The second area and the third area are adjacent to the first area.
[0018] (7) In the SiC substrate according to the above aspect, the average number may be 2 or less.
[0019] (8) The SiC substrate according to the above aspect may have a diameter of 149 mm or more.
[0020] (9) The SiC substrate according to the above aspect may have a diameter of 199 mm or more.
[0021] (10) The SiC substrate according to the above aspect may have a notch cut into the inside of the SiC substrate.
[0022] (11) A SiC epitaxial wafer according to a second aspect includes the SiC substrate according to the above aspect and a SiC epitaxial layer formed on one surface of the SiC substrate.
[0023] (12) A method for manufacturing a SiC device according to a third aspect includes a step of forming a device in the SiC epitaxial layer of the SiC epitaxial wafer according to the above aspect. [Effects of the Invention]
[0024] The SiC substrate according to the above aspect has few metallic foreign matters in the edge region, and is less likely to cause surface roughness near the edge region of the SiC epitaxial layer. The SiC epitaxial wafer according to the above aspect has a large effective area from which devices can be obtained. The SiC device manufacturing method according to the above aspect can increase the efficiency of obtaining high-quality devices. [Brief explanation of the drawings]
[0025] [Figure 1] FIG. 1 is a plan view of a SiC substrate according to an embodiment of the present invention. [Figure 2] 1 is a photograph of a metallic foreign substance observed in an edge region of a SiC substrate according to an embodiment of the present invention. [Figure 3] FIG. 2 is a cross-sectional view of an end region of the SiC substrate according to the embodiment. [Figure 4] FIG. 1 is a cross-sectional view of a SiC epitaxial wafer according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0026] The SiC substrate and the like according to this embodiment will be described in detail below with reference to the drawings as appropriate. The drawings used in the following description may show characteristic portions enlarged for the sake of convenience in order to make the features of this embodiment easier to understand, and the dimensional ratios of each component may differ from the actual ones. The materials, dimensions, and the like exemplified in the following description are merely examples, and the present invention is not limited thereto and can be appropriately modified and implemented within the scope that does not change the gist of the present invention.
[0027] In this specification, individual orientations are indicated by [ ] and collective orientations by < >. For negative indices, a "-" (bar) is placed above the number in crystallography, but in this specification, a negative sign is placed before the number.
[0028] In this specification, with respect to the center of the SiC substrate, the [11-20] direction is defined as the +x direction, the [-1-120] direction is defined as the -x direction, the [-1100] direction is defined as the +y direction, the [1-100] direction is defined as the -y direction, the
[0001] direction is defined as the +z direction, and the [000-1] direction is defined as the -z direction.
[0029] 1 is a plan view of a SiC substrate 1 according to this embodiment. The SiC substrate 1 is made of, for example, n-type SiC. The polytype of the SiC substrate 1 is not particularly limited and may be any of 2H, 3C, 4H, and 6H. The SiC substrate 1 is, for example, 4H—SiC.
[0030] The SiC substrate 1 has a substantially circular shape in plan view. The SiC substrate 1 may have an orientation flat or notch 4 for determining the direction of the crystal axis. The diameter of the SiC substrate 1 is 145 mm or more, preferably 149 mm or more. The diameter of the SiC substrate 1 may be 155 mm or less, preferably 151 mm or less. The diameter of the SiC substrate 1 may be 195 mm or more, preferably 199 mm or more. The diameter of the SiC substrate 1 may be 205 mm or less, preferably 201 mm or less. The diameter of the SiC substrate 1 may be 295 mm or more, preferably 299 mm or more. The diameter of the SiC substrate 1 may be 305 mm or less, preferably 301 mm or less.
[0031] The SiC substrate 1 has a substantially circular shape in a plan view. The SiC substrate has a notch 4 for determining the direction of the crystal axis when viewed from the +z direction. The notch 4 is a groove formed by cutting out a part of the SiC substrate 1 from the outer periphery toward the inside of the SiC substrate 1. The notch 4 is located, for example, in the -y direction from the center of the SiC substrate 1. The SiC substrate 1 may have an orientation flat instead of the notch 4.
[0032] The SiC substrate 1 has a main region 2 and an edge region 3. The main region 2 is a region that constitutes the main surface of the SiC substrate 1, and is located more inward of the SiC substrate 1 than the edge region 3. The edge region 3 is a region within 5 mm from the outer peripheral edge of the SiC substrate 1. The edge region 3 includes an edge exclusion region. The edge exclusion region is a region of the SiC substrate 1 that is excluded from the area where a SiC device is obtained. The edge region 3 and the edge exclusion region do not necessarily coincide, and it is preferable that the edge exclusion region be narrower than the edge region 3.
[0033] Metallic foreign matter may be present in the edge region 3. The metallic foreign matter may cause abnormal growth when the SiC epitaxial layer grows crystals on the SiC substrate 1. Figure 2 is a photograph of metallic foreign matter observed in the edge region 3.
[0034] Metallic foreign matter can be observed using a scanning electron microscope (SEM). An example of a scanning electron microscope is the JSM-IT510 manufactured by JEOL Ltd. As shown in FIG. 2, metallic foreign matter is observed as a white spot that has a higher contrast than the surrounding area. Furthermore, whether a white spot confirmed in an SEM image is a metallic foreign matter can be determined using an energy dispersive X-ray analyzer (EDX). EDX is capable of elemental analysis and is attached to the SEM. Metallic foreign matter includes, for example, Na, Ca, Fe, Cr, Ni, and Cu.
[0035] The density of metallic foreign matter in the edge region 3 is 1.5 pieces / mm 2 1 piece / mm or less 2 It is preferable that the number of particles is 0.6 or less per mm. 2 It is more preferable that the density of metallic foreign matter in the edge region 3 is 0 pieces / mm 2 The metallic foreign matter in the edge region 3 can be reduced by polishing the outer periphery of the SiC substrate 1 and then cleaning the outer periphery of the SiC substrate 1 with a predetermined cleaning solution. If the density of metallic foreign matter in the edge region 3 is low, abnormal growth of the SiC epitaxial layer can be suppressed.
[0036] The density of metallic particles in the edge region 3 is determined by the following procedure. First, a position on the opposite side of the notch 4 from the center of the SiC substrate 1 in the edge region 3 (i.e., a position in the +y direction from the center of the SiC substrate 1) is observed using an SEM. The observation point is an arbitrary position within the edge region 3, which is 5 mm wide. Observation is performed within an area of 0.18 mm × 10 mm. This area is evaluated entirely using the SEM. The density of metallic particles in a given area can be calculated by dividing the number of metallic particles measured within the area by the area of the area. The density of metallic particles in each of three adjacent areas in the x direction (first area, second area, and third area) is determined, and the average value of these is considered to be the density of metallic particles in the edge region 3. The SiC substrate 1 is polished while rotating. Therefore, the result of measuring the density of metallic particles at a given position in the edge region 3 does not differ significantly from the average value for the entire edge region 3.
[0037] The density of metallic foreign matter containing chromium (Cr) in the edge region 3 is 0.5 pieces / mm 2 It is preferable that the number of particles is 0.3 or less per mm. 2 It is more preferable that the number is 0.1 or less per mm. 2 It is more preferable that the density of the metallic foreign particles containing chromium in the edge region 3 is 0 particles / mm 2 That's fine too.
[0038] The density of the metallic foreign particles containing calcium (Ca) in the edge region 3 is 1 particle / mm 2 It is preferable that the number of particles is 0.3 or less per mm. 2 It is more preferable that the number is 0.1 or less per mm. 2 It is more preferable that the density of calcium-containing metallic foreign particles in the edge region 3 is 0 particles / mm 2 That's fine too.
[0039] The density of metallic foreign matter containing chromium and metallic foreign matter containing calcium can be determined using the same procedure as for the density of the entire metallic foreign matter. Metallic foreign matter containing chromium or calcium can be extracted using EDX.
[0040] Metallic foreign particles containing chromium, when incorporated into SiC epitaxial films, can reduce the carrier life and other characteristics of SiC devices. Metallic foreign particles containing chromium are one of the reasons why SiC devices do not exhibit characteristics close to the theoretical values. Metallic foreign particles containing calcium can also cause degradation of the oxide film formed during the fabrication of SiC devices. Metallic foreign particles containing Ca can cause degradation of the oxide film. Therefore, SiC substrates with fewer of these metallic foreign particles are of higher quality.
[0041] The average number of metallic foreign objects in the edge region 3 is, for example, 3, preferably 2, and more preferably 1 or less. This average number of metallic foreign objects is the average value of the number of metallic foreign objects in the first, second, and third ranges of the scanning electron microscope. The average number of metallic foreign objects is calculated by dividing the total number of metallic foreign objects in the first, second, and third ranges by the number of ranges. The first, second, and third ranges used to count the number of metallic foreign objects are the same as the ranges used to calculate the density of the metallic foreign objects. The first, second, and third ranges are located in the +y direction from the center. The second and third ranges are each adjacent to the first range.
[0042] FIG. 3 is a cross-sectional view of an edge region 3 of a SiC substrate 1 according to this embodiment. The edge region 3 has, for example, a bevel portion 5 and a flat portion 6. The bevel portion 5 is located on the outer periphery of the edge region 3 and is formed by rounding off the corners of the edge of the SiC substrate 1. The radial width of the bevel portion 5 may be, for example, 76 μm or more and 508 μm or less. The bevel portion 5 prevents cracking and chipping of the SiC substrate 1. The flat portion 6 is a portion of the edge region 3 located more inward of the SiC substrate 1 than the bevel portion 5.
[0043] The first main surface S1 of the flat portion 6 is continuous with the first main surface S7 of the main region 2. The first main surface S7 of the main region 2 is one surface of the SiC substrate 1. The first main surface S1 and the first main surface S7 are, for example, Si surfaces. For example, a SiC epitaxial layer can be formed on the first main surface S1 and the first main surface S7, and a device can be formed on the SiC epitaxial layer. The first main surface S1 and the first main surface S7 each have a surface roughness of 0.1 nm or less. The surface roughness is the arithmetic mean roughness (Ra). The surface roughness can be measured using a laser microscope (for example, an OPTELICS HYBRID+ manufactured by Lasertec Corporation). The same applies to the second main surface S2, end surface S3, first chamfered surface S4, and second chamfered surface S5 described below.
[0044] The second main surface S2 of the flat portion 6 is continuous with the second main surface S8 of the main region 2. The second main surface S8 of the main region 2 is one surface of the SiC substrate 1. The second main surface S2 and the second main surface S8 are, for example, C-planes. The second main surface S2 and the second main surface S8 each have a surface roughness of 0.5 nm or less.
[0045] Bevel portion 5 has, for example, an end surface S3, a first chamfered surface S4, and a second chamfered surface S5. Bevel portion 5 may be a curved surface connecting first main surface S1 and second main surface S2.
[0046] The end face S3 is a surface that forms the outermost periphery of the SiC substrate 1. The end face S3 has a surface roughness greater than that of the first main face S1 and the second main face S2. In particular, the end face S3 that forms the notch 4 has a surface roughness greater than that of the first main face S1 and the second main face S2, and a surface roughness greater than that of the end face S3 other than the notch 4. The surface roughness of the end face S3 is, for example, 20 nm or less, preferably 15 nm or less, more preferably 10 nm or less, and even more preferably 6 nm or less. The surface roughness of the end face S3 may be, for example, 1 nm or more. The surface roughness of the end face S3 is the average value of the surface roughness at a first measurement point located in the +x direction from the center of the SiC substrate 1, a second measurement point located in the -x direction from the center of the SiC substrate 1, a third measurement point located in the +y direction from the center of the SiC substrate 1, and a fourth measurement point located in the -y direction from the center of the SiC substrate 1.
[0047] The first chamfer surface S4 is a surface connecting one side of the end surface S3 and one side of the first main surface S1. While the first chamfer surface S4 shown in FIG. 3 is an inclined surface, the first chamfer surface S4 may be a curved surface. The first chamfer surface S4 has a surface roughness greater than that of the first main surface S1. In particular, the first chamfer surface S4 forming the notch 4 has a surface roughness greater than that of the first main surface S1, and a surface roughness greater than that of the first chamfer surface S4 other than the notch 4. The surface roughness of the first chamfer surface S4 is, for example, preferably 15 nm or less, more preferably 10 nm or less, even more preferably 8 nm or less, and particularly preferably 6 nm or less. The surface roughness of the first chamfer surface S4 may be, for example, 1 nm or more. The surface roughness of the first chamfer surface S4 is the average value of the first, second, third, and fourth measurement points.
[0048] The second chamfer surface S5 is a surface connecting one side of the end surface S3 and one side of the second main surface S2. While the second chamfer surface S5 shown in FIG. 3 is an inclined surface, the second chamfer surface S5 may be a curved surface. The second chamfer surface S5 has a surface rougher than the second main surface S2. In particular, the second chamfer surface S5 forming the notch 4 has a surface rougher than the second main surface S2, and a surface rougher than the second chamfer surface S5 other than the notch 4. The surface roughness of the second chamfer surface S5 is, for example, preferably 15 nm or less, more preferably 10 nm or less, even more preferably 8 nm or less, and particularly preferably 6 nm or less. The surface roughness of the second chamfer surface S5 may be, for example, 1 nm or more. The surface roughness of the second chamfer surface S5 is the average value of the first, second, third, and fourth measurement points.
[0049] The main region 2 preferably does not contain metallic foreign matter. The main region 2 may contain metallic foreign matter at a density lower than that of the edge region 3. The density of metallic foreign matter in the main region 2 is 0.007 pieces / mm 2 less than 0.003 pieces / mm 2The density of metallic foreign particles in the main region 2 is determined by observing three fields of view at positions located half the radius in the +y direction from the center of the SiC substrate 1 using an SEM. The method for determining the density of metallic foreign particles is the same as that for the edge region 3.
[0050] It is preferable to evaluate and observe the SiC substrate 1 in a clean environment. For example, the SiC substrate 1 after cleaning is placed in a wafer case in a clean room, and the wafer case is then packed. Transporting the SiC substrate 1 in this state prevents foreign matter from adhering to the SiC substrate 1 during transport. When evaluating and observing the SiC substrate 1, the SiC substrate 1 is removed from the wafer case in the clean room, and the SiC substrate 1 is then evaluated and observed. There is no significant difference in the evaluation and observation results between the SiC substrate 1 immediately after cleaning and the SiC substrate 1 that was transported using the above procedure and removed in the clean room.
[0051] An example of a method for manufacturing the SiC substrate 1 according to this embodiment will be described. The method for manufacturing the SiC substrate 1 according to this embodiment includes an edge polishing step, a first cleaning step, a main surface polishing step, and a second cleaning step.
[0052] First, a SiC ingot is sliced, and the outer periphery of each sliced substrate is chamfered to obtain a SiC substrate 1 having a bevel portion 5 formed thereon.
[0053] Next, the bevel portion 5 is ground, and then an edge polishing step is carried out. The edge polishing may be performed by slurry polishing using a slurry or tape polishing using a lapping film.
[0054] For example, when the first chamfer surface S4 and the second chamfer surface S5 are subjected to slurry polishing, a polishing pad is applied to the first chamfer surface S4 or the second chamfer surface S5 while the slurry is being applied. For example, a cylinder is pressed so that the first chamfer surface S4 of the vacuum-adsorbed SiC substrate 1 comes into contact with the polishing pad, and the first chamfer surface S4 is polished. The rotation speed of the polishing pad is, for example, 200 rpm or more and 400 rpm or less. The rotation speed of the SiC substrate 1 is, for example, 5 rpm or more and 30 rpm or less. The load of the polishing pad on the SiC substrate 1 is 5 kg or more and 30 kg or less. The polishing time is, for example, 15 minutes.
[0055] For example, when polishing the end surface S3 with slurry, a polishing pad is applied to the end surface S3 while the slurry is being applied. The polishing pad is attached to a drum divided into four sections and arranged around the vacuum-adsorbed SiC substrate 1. By rotating the drum and the SiC substrate, the SiC substrate 1 comes into contact with the polishing pad by centrifugal force, and the end surface S3 is polished. The rotation speed of the drum is, for example, 200 rpm or more and 400 rpm or less. The rotation speed of the SiC substrate 1 is, for example, 5 rpm or more and 30 rpm or less. The polishing time is, for example, 15 minutes.
[0056] Grinding the edge of the notch 4 is difficult. The notch 4 is polished using a low-grit grindstone. For example, the notch 4 is polished by pressing a rotating disc-shaped polishing pad against the notch 4. The rotation speed of the polishing pad is, for example, 10,000 rpm or more and 15,000 rpm or less. The load with which the polishing pad is pressed against the notch 4 is, for example, 5 kg or more and 30 kg or less. The polishing time is, for example, 5 minutes.
[0057] The abrasives used for polishing include, for example, colloidal silica, aluminum oxide, diamond, etc. The abrasives contain metal impurities as oxidizing agents, and these metal impurities are thought to be the cause of metal foreign matter.
[0058] The bevel portion 5 is preferably polished in multiple stages using different sizes of abrasive grains. For example, polishing is performed using diamond abrasive grains with a median diameter (D50) of 10 μm, followed by polishing using diamond abrasive grains with a median diameter (D50) of 5 μm, and then finish polishing using diamond abrasive grains with a median diameter (D50) of 1 μm. The surface roughness of the first chamfer surface S4, the second chamfer surface S5, and the end surface S3 after polishing is 1 nm or more and 15 nm or less.
[0059] Next, after the edge polishing step, a first cleaning step is performed. In the first cleaning step, the SiC substrate 1 is ultrasonically cleaned using a predetermined cleaning solution. The predetermined cleaning solution is a combination of an acid and a chelating agent. The acid is hydrochloric acid or oxalic acid. The chelating agent is, for example, ethylenediaminetetraacetic acid. This cleaning solution does not contain hydrogen peroxide, so it does not excessively etch the SiC substrate 1. Therefore, the surface roughness of the SiC substrate is hardly increased by this cleaning.
[0060] Once dried, the metallic foreign matter adheres to the SiC substrate 1 and becomes difficult to remove. By cleaning with a cleaning liquid in the first cleaning step before the metallic foreign matter adheres to the SiC substrate 1, the metallic foreign matter in the edge region 3 can be significantly reduced. In addition, the chelating agent contained in the cleaning liquid prevents the metallic foreign matter from re-adhering. Note that, since cleaning after main surface polishing, which will be described later, is performed with a cleaning liquid, the first cleaning step has generally been performed with pure water, but in this embodiment, a cleaning liquid is used to remove the metallic foreign matter in the edge region 3.
[0061] Ultrasonic cleaning is performed, for example, in a high-frequency band of 200 kHz to 500 kHz. Ultrasonic cleaning may be performed using a combination of a high-frequency band and a frequency band called megasonic, which is 1 MHz to 2 MHz. Ultrasonic cleaning at each frequency band is performed for 10 minutes or more. Ultrasonic cleaning at each frequency band may be performed multiple times, for example, with each unit being 10 minutes.
[0062] Next, a main surface polishing step is performed. In the main surface polishing step, the main surface of the SiC substrate 1 is polished. The main surface of the SiC substrate 1 is polished, for example, by CMP. The SiC substrate 1 may be polished one side at a time, or both sides may be polished. For example, in the case of single-side polishing, one side of the SiC substrate 1 is attached to a pressure head, and the opposite side of the SiC substrate 1 is pressed against a polishing cloth. The SiC substrate 1 is rotated while an abrasive is supplied to the polishing cloth. The SiC substrate 1 may rotate on its own axis while revolving around the pressure head. The directions of revolution and rotation may be the same or opposite. The abrasive is the same as in the edge polishing step.
[0063] Next, a second cleaning step is performed. In the second cleaning step, the SiC substrate 1 after the main surface is polished is cleaned. Cleaning is performed by immersing the substrate in a cleaning solution filled in a cleaning tank. The cleaning solution is circulated by a pump while being filtered using a filter. The temperature of the cleaning solution is controlled. The temperature of the cleaning solution is, for example, 50°C. Ultrasonic cleaning can also be performed in the second cleaning step.
[0064] In the second cleaning step, acid cleaning is performed using ultrasonic waves of multiple frequencies. Furthermore, alkaline cleaning may be performed before the acid cleaning. The acid cleaning is performed using the same cleaning solution as in the first cleaning step. The alkaline cleaning is performed using, for example, potassium hydroxide and a surfactant. The alkaline cleaning removes abrasive grains and some of the organic matter adhering to the SiC substrate 1. The alkaline cleaning is performed, for example, at room temperature for 10 minutes or more. After the acid cleaning and alkaline cleaning, pure water cleaning may be performed.
[0065] The SiC substrate 1 according to this embodiment can be fabricated by the above-described procedure. By performing the edge polishing step and the first cleaning step, it is possible to prevent metal foreign matter from adhering to the edge region 3. Furthermore, by not performing RCA cleaning in the first and second cleaning steps, it is possible to prevent the SiC substrate 1 from being etched during cleaning, thereby preventing the surface roughness of the SiC substrate 1 from increasing. Note that RCA cleaning is a cleaning method using hydrogen peroxide.
[0066] In the SiC substrate 1 according to this embodiment, the density of metallic foreign matter contained in the edge region 3 is equal to or less than a predetermined value. Since there is little metallic foreign matter in the edge region 3, abnormal growth of the SiC epitaxial layer near the edge region 3 can be suppressed. As a result, the SiC substrate 1 according to this embodiment is less likely to suffer from localized surface roughness of the SiC epitaxial layer. The SiC substrate 1 according to this embodiment has a wide effective area that can be used to obtain SiC devices.
[0067] FIG. 4 is a cross-sectional view of a SiC epitaxial wafer 10 according to this embodiment. The SiC epitaxial wafer 10 is fabricated by forming a SiC epitaxial layer 11 on a SiC substrate 1 according to this embodiment. The SiC epitaxial wafer 10 shown in FIG. 4 includes the above-described SiC substrate 1 and a SiC epitaxial layer 11. The SiC substrate 1 has few metallic foreign matters in the edge region 3, so localized surface roughness on the surface of the SiC epitaxial layer 11 is suppressed. The thickness of the SiC epitaxial layer 11 is, for example, 1 μm to 100 μm. Since the thicker the SiC epitaxial layer 11, the greater the surface roughness. Therefore, when the thickness of the SiC epitaxial layer 11 is 25 μm or more, the effect of the present disclosure is significant.
[0068] An SiC device can be obtained from, for example, an SiC epitaxial wafer 10 shown in FIG. 4. An SiC device can be produced by forming elements such as transistors on the SiC epitaxial layer 11 of the SiC epitaxial wafer 10 and then chipping the resulting product. The SiC epitaxial wafer 10 is divided into rectangular sections, and elements are formed on each section to produce an SiC device. An SiC device may also be produced by forming elements such as transistors on the SiC epitaxial wafer 10 after chipping it. An SiC device includes a chipped SiC substrate and an SiC epitaxial layer on one side of the chipped SiC substrate, in which elements are formed.
[0069] Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as set forth in the claims. [Example]
[0070] "Example 1" An 8-inch SiC substrate with a 4° off-angle was prepared. First, the outer peripheral edge of this SiC substrate was ground using a #600 polishing wheel. Next, the outer peripheral edge of the SiC substrate was edge-polished using a slurry. The notch portion of the SiC substrate was also polished with a grinding wheel.
[0071] Slurry polishing was performed in three stages, varying the median diameter of the abrasive grains (diamond grains) in the polishing compound. The median diameter of the abrasive grains in the first stage was 10 μm, the median diameter of the abrasive grains in the second stage was 5 μm, and the median diameter of the abrasive grains in the third stage was 1 μm. After each of the first, second, and third stages of polishing, the surface roughness of the first chamfer surface S4, end face S3, and second chamfer surface S5 was measured. The surface roughness was measured using an OPTELICS HYBRID+ manufactured by Lasertec Corporation. The measurement results are shown in Table 1 below. In Table 1, the measurement results before polishing are also listed as "initial."
[0072] [Table 1]
[0073] Next, the SiC substrate after edge polishing was ultrasonically cleaned using a mixed solution of hydrochloric acid and ethylenediaminetetraacetic acid. The temperature of the cleaning solution was set to 50°C. The ultrasonic cleaning was performed in two stages. The first ultrasonic cleaning was performed using ultrasonic waves with a high frequency band of 200 kHz to 500 kHz. The ultrasonic frequency was not set to a constant frequency within this frequency band, but was changed periodically. The second ultrasonic cleaning was performed using ultrasonic waves with a frequency known as megasonics, with a frequency of 1 MHz to 2 MHz. Each ultrasonic cleaning period was 10 minutes.
[0074] Next, both sides of the SiC substrate were polished by CMP using colloidal silica as an abrasive.
[0075] Next, the polished SiC substrate was subjected to alkaline cleaning. The alkaline cleaning was performed at room temperature for 10 minutes using potassium hydroxide and sodium alkyl ether sulfate. Next, the SiC substrate was subjected to ultrasonic cleaning using a mixed solution of hydrochloric acid and ethylenediaminetetraacetic acid. The cleaning conditions were the same as those used after edge polishing.
[0076] The SiC substrate was then removed from the cleaned state and dried. The edge region of the SiC substrate was then observed using an SEM. The observation point was edge region 3, which was located in the +y direction from the center of SiC substrate 1. Three adjacent regions measuring 0.18 mm x 10 mm were measured. The density of metallic foreign matter in the edge region was then calculated. The average number of metallic foreign matter in the three regions of edge region 3 was also calculated.
[0077] "Comparative Example 1" Comparative Example 1 differs from Example 1 in that the edge polishing and the first cleaning step were not performed. The other conditions were the same as those of Example 1.
[0078] "Comparative Example 2" Comparative Example 2 differs from Example 1 in that edge polishing and the first cleaning process were not performed, and RCA cleaning was performed in the second cleaning process. The RCA cleaning was performed using a mixed solution of 98% sulfuric acid and 30% hydrogen peroxide in a 1:1 ratio. The sulfuric acid / hydrogen peroxide cleaning was performed at 100°C for 10 minutes. The other conditions were the same as Example 1.
[0079] Table 2 below summarizes the densities of metallic foreign matter in the edge regions of Example 1, Comparative Example 1, and Comparative Example 2. Note that the notation Fe, Cr indicates that peaks of Fe and Cr were detected within one foreign matter.
[0080] [Table 2]
[0081] Table 3 below shows the average number of metallic foreign matter particles in the three regions of the end region in Example 1, Comparative Example 1, and Comparative Example 2.
[0082] [Table 3]
[0083] Table 4 below shows the total number of metallic foreign matter particles in the entire range of the edge region (entire periphery of the substrate) in Example 1, Comparative Example 1, and Comparative Example 2.
[0084] [Table 4]
[0085] "Example 2" Example 2 differs from Example 1 in that a 6-inch SiC substrate was used. The other conditions were the same as those of Example 1.
[0086] "Comparative Example 3" Comparative Example 3 differs from Comparative Example 1 in that a 6-inch SiC substrate was used. The other conditions were the same as those of Comparative Example 1.
[0087] "Comparative Example 4" Comparative Example 4 differs from Comparative Example 2 in that a 6-inch SiC substrate was used. The other conditions were the same as those of Comparative Example 2.
[0088] Table 5 below summarizes the total number of metallic foreign matter in the entire range of the edge region (entire periphery of the substrate) in Example 2, Comparative Example 3, and Comparative Example 4. The average number of metallic foreign matter in the three ranges in Example 2, Comparative Example 3, and Comparative Example 4 was the same as that in Example 1, Comparative Example 1, and Comparative Example 2, respectively.
[0089] [Table 5]
[0090] As shown in Tables 2 to 5, cleaning with a specified cleaning solution after edge polishing reduced metallic contaminants in the edge region. Furthermore, the effect of reducing metallic contaminants was greater than with RCA cleaning. It is believed that the metallic contaminants were adhered to the SiC substrate and could not be sufficiently removed by RCA cleaning alone. [Explanation of symbols]
[0091] 1...SiC substrate, 2...main region, 3...edge region, 4...notch, 5...bevel portion, 6...flat portion, 10...SiC epitaxial wafer, 11...SiC epitaxial layer, S1, S7...first main surface, S2, S8...second main surface, S3...edge, S4...first chamfer surface, S5...second chamfer surface
Claims
1. In the edge region within 5 mm from the outer periphery, the density of metallic foreign matter detected by a scanning electron microscope is 1.5 pieces / mm 2 The following is a SiC substrate.
2. In the end region, the density of the metallic foreign matter is 1 piece / mm 2 The SiC substrate of claim 1 , wherein:
3. In the edge region, the density of the metallic foreign matter is 0.6 pieces / mm 2 The SiC substrate of claim 1 , wherein:
4. The density of the metallic foreign particles containing chromium in the end region is 0.5 particles / mm 2 The SiC substrate of claim 1 , wherein:
5. The density of calcium-containing metallic foreign particles in the end region is 1 particle / mm 2 The SiC substrate of claim 1 , wherein:
6. the average number of the metallic foreign matters in the edge region is 3 or less, the average number is an average value of the number of the metallic foreign matter in each of a first area, a second area, and a third area of 0.18 mm × 10 mm under a scanning electron microscope; the first range, the second range, and the third range are in a [1-100] direction from a center, The SiC substrate according to claim 1 , wherein the second area and the third area are each adjacent to the first area.
7. The SiC substrate according to claim 6 , wherein the average number in the edge region is 2 or less.
8. The SiC substrate according to claim 1 , having a diameter of 149 mm or more.
9. The SiC substrate according to claim 1 , having a diameter of 199 mm or more.
10. The SiC substrate of claim 1 having a notch cut into the interior of the SiC substrate.
11. The SiC substrate according to any one of claims 1 to 10, a SiC epitaxial layer formed on one surface of the SiC substrate.
12. A method for manufacturing a SiC device, comprising forming a device in the SiC epitaxial layer of the SiC epitaxial wafer of claim 11.
Citation Information
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