Semiconductor device and communication system

Abstract

To provide a semiconductor device capable of achieving a configuration capable of effectively detecting abnormality related to a communication bus.SOLUTION: A semiconductor device (1) includes a receiver (11) configured to receive reception data (RX) as serial data from the outside, a frame counter (13C) configured to count up a count value based on the reception data when it is determined that there is no abnormality, a register (13A), and a transmitter (12) configured to transmit first response data (RF1) including the count value read from the register to the outside when write / read information included in the reception data indicates write.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] Semiconductor devices having a serial communication function are used in a variety of applications.

[0003] An example of circuit technology relating to serial communication is disclosed in Patent Document 1. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2017-224946

[0005] [overview] However, in serial communication, abnormalities can occur in the communication bus, and abnormality detection is particularly important for the functional safety of in-vehicle devices.

[0006] A semiconductor device according to one aspect of the present disclosure includes: a receiving unit configured to receive received data as serial data from an external device; a frame counter configured to count up a count value when it is determined that there is no abnormality based on the received data; A register and The configuration includes a transmitting unit configured to transmit first reply data including the count value of the frame counter read from the register to the outside when the Write / Read information included in the received data indicates Write. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram illustrating a configuration of a communication system according to an exemplary embodiment of the present disclosure. [Figure 2]FIG. 2 is a diagram showing a configuration related to communication control in the semiconductor device. [Figure 3] FIG. 3 is a diagram showing an example of received data and transmitted data in a write process. [Figure 4] FIG. 4 is a diagram showing an example of received data and transmitted data in a write process. [Figure 5] FIG. 5 is a diagram showing an example of the structure of reply data including an abnormal state. [Figure 6] FIG. 6 is a diagram showing an example of received data and transmitted data in a write process. [Figure 7] FIG. 7 is a diagram showing an example of received data and transmitted data in a write process. [Figure 8A] FIG. 8A illustrates a watchdog timer in timeout mode. [Figure 8B] FIG. 8B is a diagram illustrating a watchdog timer in window mode. [Figure 9] FIG. 9 is an external view showing an example of a vehicle.

[0008] [Detailed explanation] Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the drawings.

[0009] <1. Communication Systems> 1 is a diagram illustrating a configuration of a communication system 101 according to an exemplary embodiment of the present disclosure. The communication system 101 includes n (n is an integer equal to or greater than 2) semiconductor devices 1, an MCU 2, a CAN (Controller Area Network) transceiver 3, a CAN bus 4, and a CAN transceiver 5. As an example, the communication system 101 is for use in a vehicle. Note that the number of semiconductor devices 1 may be one.

[0010] Communication between the MCU 2 and the CAN transceiver 3 is performed using UART (Universal Asynchronous Receiver / Transmitter). UART is a protocol for exchanging serial data between two devices. With UART, bidirectional communication is performed between the sender and receiver using two lines.

[0011] Communication between the CAN transceivers 3 and 5 is carried out via a CAN bus 4. CAN is a serial communication standard standardized in international standards such as ISO 11898. CAN uses a differential voltage method that transmits data based on the level of the voltage difference generated between two communication lines.

[0012] The CAN transceiver 3 has a TXD (transmit data input) terminal 3A and an RXD (receive data output) terminal 3B. The CAN transceiver 3 outputs data input to the TXD terminal 3A to the CAN bus 4, and outputs data input from the CAN bus 4 from the RXD terminal 3B.

[0013] The CAN transceiver 5 has an RXD terminal 5A and a TXD terminal 5B. The CAN transceiver 5 outputs data input to the TXD terminal 5B to the CAN bus 4, and outputs data input from the CAN bus 4 from the RXD terminal 5A.

[0014] The semiconductor device 1 is an IC (integrated circuit) in which circuits with predetermined functions are integrated, and is configured as, for example, an LED (light emitting diode) driver IC. Note that the n semiconductor devices 1 are not necessarily all devices with the same functions.

[0015] The semiconductor device 1 has an RX (received data input) terminal 1A and a TX (transmitted data output) terminal 1B. The n RX terminals 1A are commonly connected to an RXD terminal 5A. The n TX terminals 1B are commonly connected to a TXD terminal 5B.

[0016] Since the n semiconductor devices 1 support the same protocol, the n semiconductor devices 1 can be commonly connected to the same CAN transceiver 5. Received data RX output from the RXD terminal 5A is input to n RX terminals 1A. The received data RX specifies the device address of one of the n semiconductor devices 1. Transmitted data TX output from the TX terminal 1B is input to the TXD terminal 5B.

[0017] <2. Semiconductor Devices> Fig. 2 is a diagram showing a configuration related to communication control in the semiconductor device 1. Note that Fig. 2 does not show configurations other than those related to communication control, and for example, when the semiconductor device 1 is an LED driver IC, the semiconductor device 1 has a configuration related to LED driving, etc.

[0018] The semiconductor device 1 includes a receiving unit 11, a transmitting unit 12, and a control unit 13. The receiving unit 11 receives reception data RX via an RX terminal 1A and performs reception processing.

[0019] The control unit 13 has a register 13A and a CRC (Cyclic Redundancy Check) check unit 13B. The CRC check unit 13B performs error detection using CRC data included in the received data RX. The register 13A can store various types of data, and can write data to and read data from the register 13A.

[0020] The transmitter 12 transmits the transmission data TX via the TX terminal 1B.

[0021] The frame counter 13C included in the control unit 13 will be described later.

[0022] <3. Structure of received data> Here, the data structure of the received data RX will be described with reference to Fig. 3. Fig. 3 is a timing chart showing an example of a write process, which will be described later.

[0023] In UART, communication is carried out in data units called frames. A frame consists of bit data from a start bit to a stop bit. The start bit is low level, and the stop bit is high level. A certain number of bits of data are placed between the start bit and the stop bit. In this example, the certain number of bits is set to 8 bits, and one frame consists of 10 bits of bit data.

[0024] 3, the received data RX includes, in order from the beginning, a synchronization frame SYN, a device frame DV, a data number frame ND, a register address frame AD, a data frame DT, and CRC frames CRL and CRH. Note that the 16-bit CRC data is divided into two frames: CRL (lower 8 bits) and CRH (upper 8 bits).

[0025] The synchronization frame SYN is bit data for setting a baud rate (unit: bps) in the semiconductor device 1. Sampling of each frame after the synchronization frame SYN is performed according to the set baud rate, and the bit value (0 or 1) of each bit is acquired.

[0026] The device frame DV includes a device address and a Read / Write bit. The device address is bit data indicating the address of the target device (semiconductor device 1). The Read / Write bit is bit data indicating Read or Write. Read indicates reading data from the semiconductor device 1, and Write indicates writing data to the semiconductor device 1.

[0027] The data number frame ND is bit data indicating the number of frames of the data frame DT. In Fig. 3, the number of frames of the data frame DT is 1 as an example, but it may be 2 or more.

[0028] The register address frame AD is bit data indicating an address in the register 13A. The data frame DT is bit data indicating data to be written. The CRC frames CRL and CRH are bit data indicating an error detection code added to the data frame DT.

[0029] <4. Write processing> Next, the write process will be described with reference to Fig. 3. For convenience, it is assumed that n=2 for the n semiconductor devices 1.

[0030] As shown in Fig. 3, for example, the device address in the device frame DV of the received data RX indicates device #1 of the two semiconductor devices 1. In other words, device #1 is the target device. This also applies to Figs. 4, 6, and 7, which will be described later.

[0031] 3, while the reception data RX is being received, the transmission data TX (TX#1, TX#2) output from the TX terminals 1B of the devices #1 and #2 are both in a high impedance state (Hi-z). Since the Read / Write bit in the received reception data RX is set to Write, the control unit 13 in the semiconductor device 1, which is the device #1, recognizes that this is a Write process.

[0032] Then, when the receiving unit 11 receives the CRC frames CRL and CRH, the CRC check unit 13B performs a CRC check on the write data included in the data frame DT using the CRC data included in the CRC frames CRL and CRH. If the CRC check results in no abnormality, the control unit 13 writes the write data to the address in the register 13A indicated by the register address frame AD. At this time, the frame counter 13C increments its count value. On the other hand, if an abnormality is detected by the CRC check, the frame counter 13C does not increment its count value. The count value by the frame counter 13C is stored in the register 13A.

[0033] By providing a frame counter in this way, it is possible to provide a safety mechanism for the communication bus as specified in ISO26262, which relates to the functional safety of in-vehicle equipment.

[0034] As described above, count control may be performed by the frame counter 13C when the device frame DV indicates its own device (semiconductor device 1), but a CRC check may be performed each time reception data RX is received, regardless of the device address indicated in the device frame DV, and count control may be performed by the frame counter 13C. That is, even when device #1 receives reception data RX intended for device #2 (a device different from itself), count control may be performed by the frame counter 13C.

[0035] The count value of the frame counter 13C may be automatically repeated by counting up from the minimum value to the maximum value and then returning to the minimum value. For example, if the count value is 8 bits, it may be 0 → 1 →... → 254 → 255 → 0 → 1...

[0036] <5.Returning the count value> 3, in the case of a write process, after the receive data RX has been received up to the CRC frames CRL and CRH, the transmitter 12 transmits the count value of the frame counter 13C read from the register 13A as a reply frame RF1 by the transmit data TX. The reply frame RF1 transmitted from device #1 is transmitted to MCU2 via the CAN transceiver 5, CAN bus 4, and CAN transceiver 3. This allows MCU2 to obtain the count value of device #1.

[0037] As described above, according to this embodiment, the count value can be returned for each write process without having to send a read command with the Read / Write bit in the received data RX set to Read from the MCU 20 and read the count value from the register 13 A. Since write commands are issued more frequently than read commands, the count value can be transmitted to the MCU 20 more frequently.

[0038] <6. Abnormal condition reply> In this embodiment, it is also possible to return not only the count value of the frame counter 13C as described above, but also an abnormal state in the semiconductor device 1. Fig. 4 is a diagram showing a write process corresponding to Fig. 3, and after the CRC frames CRL and CRH have been received, a reply frame RF2 including the abnormal state read from the register 13A is transmitted as transmission data TX by the transmitter 12.

[0039] FIG. 5 is a diagram showing an example of the configuration of a reply frame RF2. The upper part of FIG. 5 shows a case where no abnormal state is detected, and the lower part shows a case where an abnormal state is detected. The reply frame RF2 includes a start bit S, a stop bit P, and 8 bits of data between the start bit S and the stop bit P. The 8 bits of data include 7 bits (b0 to b6) of abnormal bit data and a parity bit PT added to the abnormal bit data. If no abnormal state is detected, the abnormal bit data is at a high level, and if an abnormal state is detected, the abnormal bit data is at a low level. The abnormal bit data remains at a constant level across the 7 bits.

[0040] In this embodiment, each time a Write command is received by the received data RX, either a reply frame RF1 indicating a count value or a reply frame RF2 indicating an abnormal state is returned. For example, the reply frame RF1 may be returned once every several times. For example, if RF1 is returned once every four times, the order will be RF2 → RF2 → RF2 → RF1 → RF2 →...

[0041] 6, a reply frame RF2 indicating an abnormal state may be returned with CRC frames CRL2 and CRH2 added. In this case, in the reply frame RF2, for example, eight bits of abnormal bit data between the start bit S and the stop bit P may be arranged so that each bit indicates a different type of abnormal state.

[0042] <7. Watchdog Timer> In this embodiment, the semiconductor device 1 may have a watchdog timer function, which allows a safety mechanism for monitoring the program sequence as defined in ISO26262 to be provided.

[0043] The semiconductor device 1 may be provided with a watchdog timer in Q&A mode. In this case, as shown in FIG. 7 corresponding to FIG. 3 for the Write process, after the CRC frames CRL and CRH have been received, a reply frame RF3 including a Question is transmitted as transmission data TX by the transmitter 12. The Question is random data (e.g., 8 bits). When the reply frame RF3 is transmitted to the MCU 20, the MCU 20 includes a data frame DT including an Answer in the received data RX and transmits this to the semiconductor device 1 as a Write process. If the received Answer is the expected data, the controller 13 in the semiconductor device 1 determines that there is no abnormality, and if not, determines that there is an abnormality.

[0044] In this way, a question is returned in response to a write command, so the MCU 20 can obtain the question without reading the question from the register 13A using a read command. For each write command, one of the following can be returned: a reply frame RF1 indicating the count value of the frame counter 13C, a reply frame RF2 indicating an abnormal state, or a reply frame RF3 indicating a question. For example, the reply can be: abnormal state → count value → question → ... In this way, by combining the frame counter and watchdog timer, the diagnostic coverage of the communication bus under ISO 26262 can be set to "high."

[0045] A watchdog timer in timeout mode for the Answer may be provided. In this case, as shown in Fig. 8A, if the control unit 13 does not receive the next Answer A2 within a predetermined timeout period Tout1 after receiving Answer A1, the control unit 13 determines that an abnormality has occurred.

[0046] A window mode watchdog timer may be provided for the Answer. In this case, as shown in Fig. 8B, the control unit 13 determines that an abnormality has occurred if it does not receive the next Answer A2 within a predetermined timeout time Tout1 after receiving Answer A1, or if it receives the next Answer A2 within a predetermined detection time DET (shorter than Tout1) after receiving Answer A1.

[0047] <8. Vehicles> 9 is an external view showing an example of the configuration of a vehicle X. The vehicle X of this example is equipped with various electronic devices X11 to X18 that operate by receiving power supply from a battery (not shown). Note that the installation positions of the electronic devices X11 to X18 in FIG. 9 may differ from the actual positions for convenience of illustration.

[0048] The electronic device X11 is an engine control unit that performs engine-related controls (injection control, electronic throttle control, idling control, oxygen sensor heater control, auto-cruise control, etc.).

[0049] The electronic device X12 is a lamp control unit that controls the turning on and off of HID (high intensity discharged lamp) and DRL (daytime running lamp).

[0050] The electronic device X13 is a transmission control unit that controls transmission-related functions.

[0051] The electronic device X14 is a body control unit that performs control related to the movement of the vehicle X (ABS [anti-lock brake system] control, EPS [electric power steering] control, electronic suspension control, etc.).

[0052] The electronic device X15 is a security control unit that controls the operation of door locks, burglar alarms, and other devices.

[0053] The electronic device X16 is an electronic device that is installed in the vehicle X at the time of shipment from the factory as a standard equipment or a manufacturer option, such as a wiper, an electric door mirror, a power window, a damper (shock absorber), an electric sunroof, and an electric seat.

[0054] The electronic device X17 is an electronic device that is optionally installed in the vehicle X as a user option, such as an in-vehicle A / V (audio / visual) device, a car navigation system, and an ETC (electronic toll collection system).

[0055] The electronic device X18 is an electronic device equipped with a high-voltage motor, such as an in-vehicle blower, oil pump, water pump, or battery cooling fan.

[0056] The communication system 101 including the above-described MCU 20 and semiconductor device 1 may be applied to any of the electronic devices X11 to X18.

[0057] <9.Other> In addition to the above-described embodiments, various modifications can be made to the various technical features disclosed in this specification without departing from the spirit of the technical creation. In other words, the above-described embodiments should be considered to be illustrative and not restrictive in all respects, and the technical scope of the present disclosure should not be limited to the above-described embodiments, but should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0058] <10. Notes> As described above, the semiconductor device (1) according to one embodiment of the present disclosure is a receiving unit (11) configured to receive received data (RX) as serial data from an external device; a frame counter (13C) configured to count up a count value when it is determined that there is no abnormality based on the received data; A register (13A) and The configuration includes a transmitting unit (12) configured to transmit first reply data (RF1) including the count value of the frame counter read from the register to the outside when the Write / Read information included in the received data indicates Write (first configuration).

[0059] With this configuration, it is possible to realize a configuration that can effectively detect abnormalities related to the communication bus.

[0060] In the first configuration, the frame counter may be configured to count up the count value when device address data included in the received data indicates the semiconductor device itself (second configuration).

[0061] In the first configuration, the frame counter may be configured to count up the count value regardless of the device indicated by device address data included in the received data (third configuration).

[0062] In addition, in any of the above first to third configurations, the transmitting unit may be configured to transmit either the first reply data or other reply data each time the received data is received when the Write / Read information indicates Write (fourth configuration).

[0063] In the fourth configuration, the first reply data may be transmitted less frequently than the other reply data (fifth configuration).

[0064] In the fourth or fifth configuration, the other reply data may be second reply data (RF2) including an abnormal state of the semiconductor device (sixth configuration).

[0065] In the sixth configuration, the second reply data includes a start bit (S), a stop bit (P), and bit data between the start bit and the stop bit, The bit data may include data (b0 to b6) that are at a constant level across multiple bits depending on whether or not there is an abnormality, and a parity bit (PT) (seventh configuration).

[0066] In the sixth or seventh configuration, data for CRC check (CRL2, CRH2) may be added to the second reply data before it is transmitted (eighth configuration).

[0067] In addition, in any one of the fourth to eighth configurations, the other reply data may be third reply data (RF3) including a question in the watchdog timer in Q&A mode (ninth configuration).

[0068] Furthermore, the ninth configuration may also be configured to include a judgment unit (13) that judges that there is an abnormality if there is no next answer within a predetermined timeout period (Tout1) after an answer to the question is given (tenth configuration).

[0069] In addition, in the above-mentioned tenth configuration, the judgment unit may be configured to judge that there is an abnormality if the next answer is received within a predetermined detection time (DET) that is shorter than the timeout time after the answer to the question is received (eleventh configuration).

[0070] In any of the first to eleventh configurations, the count value may be counted up from a minimum value, and when it reaches a maximum value, it may be returned to the minimum value (twelfth configuration).

[0071] Furthermore, one aspect of the present disclosure is a semiconductor device having any one of the first to twelfth configurations described above; A communication system (101) includes a transmitting device (20) configured to transmit the received data and receive the first reply data (thirteenth configuration).

[0072] Moreover, the thirteenth configuration may be configured to be mounted on a vehicle (fourteenth configuration). [Industrial Applicability]

[0073] The present disclosure can be used, for example, in communication systems for various applications. [Explanation of symbols]

[0074] 1. Semiconductor device 1A RX terminal 1B TX terminal 3 CAN transceivers 3A TXD terminal 3B RXD terminal 4. CAN bus 5 CAN transceivers 5A RXD terminal 5B TXD terminal 11 Receiving unit 12 Transmitter 13 Control Unit 13A Resistor 13B Check section 13B CRC check section 13C Frame Counter 101 Communication Systems X vehicle X11~X18 Electronic equipment

Claims

1. a receiving unit configured to receive received data as serial data from an external device; a frame counter configured to count up a count value when it is determined that there is no abnormality based on the received data; A register and a transmitting unit configured to transmit first reply data including the count value of the frame counter read from the register to an external device when Write / Read information included in the received data indicates Write.

2. 2. The semiconductor device according to claim 1, wherein said frame counter counts up said count value when device address data included in said received data indicates said semiconductor device itself.

3. 2. The semiconductor device according to claim 1, wherein said frame counter counts up said count value regardless of a device indicated by device address data included in said received data.

4. 2. The semiconductor device according to claim 1, wherein said transmitting section transmits either said first reply data or another reply data each time said reception data is received when said Write / Read information indicates Write.

5. The semiconductor device according to claim 4 , wherein the first reply data is transmitted less frequently than the other reply data.

6. The semiconductor device according to claim 4 , wherein the other reply data is second reply data including an abnormal state of the semiconductor device.

7. the second reply data includes a start bit, a stop bit, and bit data between the start bit and the stop bit, 7. The semiconductor device according to claim 6, wherein said bit data includes data having a constant level across a plurality of bits depending on whether or not the data is abnormal, and a parity bit.

8. 7. The semiconductor device according to claim 6, wherein data for CRC check is added to said second reply data before transmission.

9. 5. The semiconductor device according to claim 4, wherein the other reply data is third reply data including a question in the watchdog timer in the Q&A mode.

10. 10. The semiconductor device according to claim 9, further comprising a determination unit that determines that an abnormality has occurred if a next answer is not received within a predetermined timeout period after an answer to the question has been received.

11. 11. The semiconductor device according to claim 10, wherein the determining unit also determines that an abnormality has occurred if a next answer is received within a predetermined detection time that is shorter than the timeout time after an answer to the question is received.

12. 2. The semiconductor device according to claim 1, wherein said count value is counted up from a minimum value, and when it reaches a maximum value, it returns to said minimum value.

13. A semiconductor device according to any one of claims 1 to 12; a transmitting device configured to transmit the received data and to receive the first reply data.

14. The communication system of claim 13, wherein the communication system is for use in a vehicle.

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