Display device

Abstract

An object is to provide a highly reliable thin film transistor device including semiconductors having stable electric characteristics. Another object is to manufacture a highly reliable semiconductor device at low cost with high productivity.SOLUTION: In a manufacturing method of a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed to increase the purity of the oxide semiconductor layer and reduce impurities such as moisture.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor device using an oxide semiconductor. [Background technology]

[0002] In recent years, semiconductor thin films (thickness of several to several hundred nm) formed on substrates with insulating surfaces have been used. The technology of constructing thin film transistors (TFTs) is attracting attention. It is widely used in electronic devices such as C and electro-optical devices, especially in switching of image display devices. Development is being rushed as a semiconductor device.

[0003] There are many types of metal oxides and they are used for various purposes. Indium oxide is well known as It is a material that has been developed and is used as a transparent electrode material required for liquid crystal displays, etc. do.

[0004] Some metal oxides exhibit semiconducting properties. Metal oxides that exhibit semiconducting properties include: For example, tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. Thin film transistors using metal oxides with excellent semiconductor properties as the channel formation region are already known. (See Patent Documents 1 to 4 and Non-Patent Document 1.)

[0005] Incidentally, metal oxides include not only single-component oxides but also multi-component oxides. For example, InGaO3(ZnO)m (m: natural number) has a homologous phase and is composed of In, Ga, and Zn. It is known as a multi-component oxide semiconductor having the above structure (see Non-Patent Documents 2 to 4).

[0006] Then, the oxide semiconductor composed of the above-mentioned In-Ga-Zn-based oxide is used as a thin film transistor. ジスタのチャネルlayer としてApplicable であることがConfirmationされている(Patented document 5, Non-patented document See 5 and 6 for reference. ). [Preliminary Technology Documents] [License]

[0007] [License 1] Special Announcement No. 60-198861 [License 2] Special Announcement No. 8-264794 [License 3] Special Notice No. 11-505377 [License 4] Special Announcement No. 2000-150900 [Patent Document 5] Special Announcement No. 2004-103957 [Non-licensed literature]

[0008] [Non-licensed Document 1] MW Prins, KO Grosse-Holz, G. Muller, JFM Cillessen, JB Giesbers, RP Weening, and RM Wolf, "A ferroelectric transparent thin-film transistor", Appl. Phys. Lett., 17 June 1996, Vol.68 p.3650-3652 [Non-licensed Document 2] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, p.298-315 [Non-licensed Document 3] N. Kimizuka, M. Isobe, and M. Nakamura, “Syntheses and Single-Crystal Data of Homologous Compounds, In2O3(ZnO)m(m=3,4, and 5), InGaO3(ZnO)3, and Ga2O3(ZnO)m(m=7,8,9, and 16) in the In2O3-ZnGa2O4-ZnO System”, J. Solid State Chem., 1995, Vol.116, p.170-178 [Non-patent document 4] Masaaki Nakamura, Noboru Kimizuka, Takahiko Mohri, Mitsumasa Isobe, "Synthesis and Crystal Structure of Homologous Phase, InFeO3(ZnO)m (m: natural number) and Its Isomorphic Compounds," Solid State Physics, 1993, Vol. 28, No. 5, pp. 317-327 [Non-Patent Document 5] K. Nomura, H. Ohta, K. Ueda, T. Kamiya, M. Hirano, and H. Hosono, "Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor", SCIENCE, 2003, Vol.300, p.1269-1272 [Non-patent document 6] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, "Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors", NATURE, 2004, Vol.432 p.488-492 Summary of the Invention [Problem to be solved by the invention]

[0009] To manufacture a highly reliable semiconductor device having a thin film transistor with stable electrical characteristics. One of our goals is to provide [Means for solving the problem]

[0010] A semiconductor layer including a channel forming region, a semiconductor layer including a source region and a drain region, In the method for manufacturing a semiconductor device having a thin film transistor formed of an oxide semiconductor layer, Heat treatment (dehydration or In addition, the oxide semiconductor layer is also heated to a temperature of 1000°C. and reducing impurities such as moisture present in the oxide semiconductor layer. Reduces impurities such as moisture present at the interface.

[0011] In this specification, an oxide semiconductor film used for a semiconductor layer including a channel formation region is oxide semiconductor film (first oxide semiconductor layer), oxide semiconductor used in the source region and the drain region The conductive film is called a second oxide semiconductor film (second oxide semiconductor layer).

[0012] In order to reduce impurities such as moisture, a first oxide semiconductor film and a second oxide semiconductor film are formed. After the deposition, nitrogen or rare earth metal is introduced into the first oxide semiconductor film and the second oxide semiconductor film in an exposed state. 200℃ or higher under an inert gas atmosphere (argon, helium, etc.) or reduced pressure Preferably, heat treatment is performed at a temperature higher than or equal to 400° C. and lower than or equal to 600° C. to form the first oxide semiconductor film and the second oxide semiconductor film. After heating, the oxide semiconductor film is heated to a temperature above room temperature for 10 minutes in an inert gas atmosphere. Cool slowly to below 0°C.

[0013] The film is formed by heat treatment under an inert gas atmosphere such as nitrogen or argon, or under reduced pressure. A thin oxide semiconductor film is formed by using a first oxide semiconductor film and a second oxide semiconductor film in which moisture content is reduced. The electrical properties of thin film transistors have been improved, and the thin film transistors have both mass productivity and high performance. To realize a transistor.

[0014] The heating temperature conditions were varied, and multiple samples that had been heat-treated under a nitrogen atmosphere were analyzed using a thermal desorption analyzer. Measured by TDS (Thermal Desorption Spectroscopy) The results are shown in Figure 29.

[0015] The thermal desorption analyzer measures the gas components that are desorbed and generated from the sample while the sample is heated and heated in a high vacuum. This device detects and identifies gases desorbed from the surface and interior of a sample using a quadrupole mass spectrometer. The molecules can be observed using a thermal desorption analyzer manufactured by Electronic Science Co., Ltd. (product name: EMD-WA10 The measurement conditions were a temperature rise of approximately 10°C / min, and a temperature of approximately 1×10 -7 (Pa) The vacuum level is 1500 V, and the dwell time is 0.2 [sec], and the number of channels used is 23. Note that the ionization coefficient of H2O is 1.0 , H2O fragmentation coefficient 0.805, H2O through-pass coefficient 1.56 , and the pumping rate of H2O is 1.0.

[0016] Figure 29 shows a 50 nm thick In-Ga-Zn-O non-single crystal film formed on a glass substrate. The sample (Sample 1) was heated at 250°C in a nitrogen atmosphere for 1 hour. The sample (sample 3) was heated at 350°C for 1 hour in a nitrogen atmosphere. The sample (Sample 2) was heated at 450°C for 1 hour in a nitrogen atmosphere. The treated sample (sample 4) was heated at 350°C for 10 hours in a nitrogen atmosphere. The comparison is with the sample (Sample 5) that was subjected to the heat treatment of 1. 29 is a graph showing the results of S measurement. From the results of FIG. 29, it can be seen that the temperature of the heat treatment in the nitrogen atmosphere is high. The higher the temperature, the more moisture (H2O) is released from the In-Ga-Zn-O non-single crystal film. It can be seen that the impurities are reduced.

[0017] In addition, from the graph in Figure 29, moisture (H2O) and other substances can be seen at around 200℃ to 250℃. The first peak indicates the desorption of impurities, and the second peak indicates the desorption of impurities such as water (H2O) at temperatures above 300°C. A second peak indicating the desorption of the substance can be confirmed.

[0018] The sample that was heat-treated at 450°C in a nitrogen atmosphere was then left in the air at room temperature for one week. Even after leaving it for a while, no moisture was observed to desorb at temperatures above 200°C. It has been found that Ga-Zn-O based non-single crystal films are stabilized.

[0019] In addition, TDS measurements revealed that in addition to H2O, H, O, OH, H2, O2, N, N2, and Ar Measurements were carried out for each of these, and H2O, H, O, and OH showed clear peaks. Peaks were observed for H2, O2, N, N2, and Ar, but no peaks were observed for H2, O2, N, N2, or Ar. The substrate used was a glass substrate with a 50 nm thick In-Ga-Zn-O non-single crystal film. The heating conditions were 250°C for 1 hour under nitrogen atmosphere, 350°C for 1 hour under nitrogen atmosphere, and Heat treatment was performed under a nitrogen atmosphere at 350°C for 10 hours and under a nitrogen atmosphere at 450°C for 1 hour. The In-Ga-Zn-O based non-single crystal film without the glass substrate and the glass substrate alone were measured. Figure 30 shows the TDS results for H, Figure 31 shows the TDS results for O, and Figure 32 shows the TDS results for OH. Figure 33 shows the TDS results for H2. The concentration is below 20 ppm.

[0020] From the above results, by heat treatment of In-Ga-Zn-O based non-single crystal film, In other words, the heat treatment causes the In-Ga-Zn-O system The main cause of desorption of water (H2O) from the non-single crystal film is H shown in Figure 30 and H shown in Figure 31. The measured values ​​of TDS for O and OH shown in Figure 32 are affected by substances generated by the decomposition of water molecules. It is believed that In-Ga-Zn-O non-single crystal films also contain hydrogen and OH. Therefore, these are also released concomitantly by the heat treatment.

[0021] In this specification, under an inert gas atmosphere of nitrogen or a rare gas (argon, helium, etc.), Alternatively, heat treatment under reduced pressure is referred to as heat treatment for dehydration or dehydrogenation. The term "dehydrogenation" refers only to the process of desorption of hydrogen as H2 by this heat treatment. For convenience, this term is used to refer to dehydration or dehydrogenation, including the elimination of H, OH, etc. Let's say.

[0022] By performing heat treatment under an inert gas atmosphere, impurities (H After reducing the amount of ions (O, H, OH, etc.) to increase the carrier concentration, the material is slowly cooled. Then, an oxide insulating film is formed in contact with the oxide semiconductor layer to form a carrier of the oxide semiconductor layer. Reducing the concentration leads to improved reliability.

[0023] The first oxide semiconductor film and the second oxide semiconductor film are formed by heat treatment in a nitrogen atmosphere. This results in lower resistance (increased carrier concentration, preferably 1×10 18 / cm 3 (or more) and low resistance The first oxide semiconductor film and the second oxide semiconductor film can be made to have low resistance. The first oxide semiconductor film and the second oxide semiconductor film are processed by an etching process, A first oxide semiconductor layer and a second oxide semiconductor layer are formed, and then an etching process is performed. Processing is performed to form a semiconductor layer, a source region, and a drain region.

[0024] Then, an oxide insulating film is formed in contact with the first oxide semiconductor layer having a low resistance. In the first oxide semiconductor layer, at least a region in contact with the oxide insulating film is made to have high resistance ( The carrier concentration is reduced, preferably to 1×10 18 / cm 3 (less than 1000kJ / s) and high resistance oxide semiconductor During the manufacturing process of the semiconductor device, the semiconductor device is The first oxide semiconductor film and the second oxide semiconductor film are formed by heating under reduced pressure, slowly cooling, and forming an oxide insulating film. It is important to increase or decrease the carrier concentration of the second oxide semiconductor film. By subjecting the oxide semiconductor film and the second oxide semiconductor film to heat treatment for dehydration or dehydrogenation, As a result, the first oxide semiconductor film and the second oxide semiconductor film become oxygen deficient and N-type (N - , N + Then, an oxide insulating film is formed to form a first oxide semiconductor layer. It can be said that the excess oxygen makes it I-type. This results in good electrical properties. Therefore, it is possible to manufacture and provide a semiconductor device having a thin film transistor with high reliability. do.

[0025] Note that the oxide insulating film formed in contact with the first oxide semiconductor layer having low resistance is resistant to moisture and water. elementary ions, OH - It uses an inorganic insulating film that blocks impurities such as silicon oxide. A silicon nitride oxide film or a silicon nitride oxide film is used.

[0026] Furthermore, an oxide insulating film is formed on the semiconductor layer, the source region, and the drain region as a protective film. A second heating step may be performed after the first heating step. After forming the oxide insulating film, the second heating step is performed. The variation in characteristics can be reduced.

[0027] In one embodiment of the structure of the invention disclosed in this specification, a gate electrode layer is formed, and a gate insulating film is formed on the gate electrode layer. a gate insulating layer is formed, a first oxide semiconductor film is formed on the gate insulating layer, and the first oxide semiconductor A second oxide semiconductor film is formed on the conductive film, and the first oxide semiconductor film and the second oxide semiconductor film are The membrane is heated to dehydrate or dehydrogenate it, and then the dehydrated or dehydrogenated first oxidation The first oxide semiconductor layer and the second oxide semiconductor layer are selectively etched. and a second oxide semiconductor layer are formed on the first oxide semiconductor layer and the second oxide semiconductor layer. A conductive film is formed, and the first oxide semiconductor layer, the second oxide semiconductor layer, and the conductive film are selectively etched. The semiconductor layer, the source region, the drain region, the source electrode layer, and the drain electrode layer are formed by etching. The semiconductor layer is formed of a gate insulating layer, a source region, a drain region, a source electrode layer, and a drain electrode layer. An oxide insulating film is formed on the semiconductor electrode layer so as to be in contact with a part of the semiconductor layer, thereby reducing the carrier concentration.

[0028] In one embodiment of the structure of the invention disclosed in this specification, a gate electrode layer is formed, and a gate insulating film is formed on the gate electrode layer. a gate insulating layer is formed, a first oxide semiconductor film is formed on the gate insulating layer, and the first oxide semiconductor A second oxide semiconductor film is formed on the conductive film, and the first oxide semiconductor film and the second oxide semiconductor film are The film was heated in an inert atmosphere to increase the carrier concentration, and then the carrier concentration was increased. The first oxide semiconductor film and the second oxide semiconductor film are selectively etched to form the first oxide semiconductor film. forming a first oxide semiconductor layer and a second oxide semiconductor layer; A conductive film is formed on the conductive layer, and a first oxide semiconductor layer, a second oxide semiconductor layer, and a conductive film are selected. The semiconductor layer, the source region, the drain region, the source electrode layer, and the drain region are selectively etched. An electrode layer is formed, and a gate insulating layer, a semiconductor layer, a source region, a drain region, a source electrode layer, and forming an oxide insulating film on the drain electrode layer in contact with a part of the semiconductor layer to increase the carrier concentration. Reduce.

[0029] In one embodiment of the structure of the invention disclosed in this specification, a gate electrode layer is formed, and a gate insulating film is formed on the gate electrode layer. a gate insulating layer is formed, a first oxide semiconductor film is formed on the gate insulating layer, and the first oxide semiconductor A second oxide semiconductor film is formed on the conductive film, and the first oxide semiconductor film and the second oxide semiconductor film are The film was heated under reduced pressure to increase the carrier concentration, and then the first acid with the increased carrier concentration was added. the first oxide semiconductor layer and the second oxide semiconductor layer are selectively etched to form a first oxide semiconductor layer. and a second oxide semiconductor layer are formed on the first oxide semiconductor layer and the second oxide semiconductor layer. a conductive film formed on the first oxide semiconductor layer, the second oxide semiconductor layer, and the conductive film; The semiconductor layer, the source region, the drain region, the source electrode layer, and the drain electrode layer are formed by etching. A gate insulating layer, a semiconductor layer, a source region, a drain region, a source electrode layer, and a drain electrode layer are formed. An oxide insulating film is formed on the in-electrode layer so as to be in contact with a part of the semiconductor layer, thereby reducing the carrier concentration.

[0030] As an oxide semiconductor layer that can be used as a semiconductor layer, a source region, and a drain region, For example, an oxide material having semiconductor properties may be used. O) m A thin film represented by (m>0) is formed, and the thin film is used as a semiconductor layer, a source region, and a drain region. A thin film transistor was fabricated using this as the in-region. M is Ga, Fe, Ni, or M It represents one or more metal elements selected from n and Co. For example, M is Ga In addition, there are cases where the above metal elements other than Ga are included, such as Ga and Ni or Ga and Fe. In addition to the metal element contained as M in the oxide semiconductor, Impurity elements include Fe, Ni, and other transition metal elements, or oxides of these transition metals. In this specification, InMO3(ZnO) m (m>0) Among oxide semiconductors with this structure, oxide semiconductors with a structure containing Ga as M are called In-Ga-Z This is called an In-Ga-Zn-O-based oxide semiconductor, and its thin film is also called an In-Ga-Zn-O-based non-single-crystal film.

[0031] In addition to the above, oxide semiconductors that can be used for the oxide semiconductor layer include In-Sn-Zn- O-based, In-Al-Zn-O-based, Sn-Ga-Zn-O-based, Al-Ga-Zn-O-based, S n-Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In In addition, the above oxide semiconductors can be used. The oxide semiconductor layer may contain silicon oxide. By including SiOx (X>0), the formation of an oxide semiconductor layer during the manufacturing process When a heat treatment is subsequently performed, crystallization can be suppressed. The conductor layer is preferably in an amorphous state, and may be partially crystallized.

[0032] The oxide semiconductor is preferably an oxide semiconductor containing In, more preferably an oxide semiconductor containing In and In order to make the oxide semiconductor layer i-type (intrinsic), dehydration is performed. It is effective to subject the product to a hydrogenation or dehydrogenation process.

[0033] The source and drain regions of the thin film transistor (n + layer, also called buffer layer) The oxide semiconductor layer used has a higher conductivity than the oxide semiconductor layer used as a channel formation region. (electrical conductivity).

[0034] In addition, thin film transistors are easily damaged by static electricity, so the gate line or source It is preferable to provide a protection circuit for protecting the driver circuit on the same substrate as the line. is preferably configured using a nonlinear element using an oxide semiconductor.

[0035] In addition, the gate insulating layer, the first oxide semiconductor film, and the second oxide semiconductor film are exposed to the air. Continuous processing (also known as continuous processing, in-situ process, or continuous film formation) By performing the process continuously without exposing the gate insulating layer and the first The interface between the first oxide semiconductor film and the second oxide semiconductor film is free from large amounts of water, hydrocarbons, etc. The interfaces of each layer can be formed without being contaminated by gas components or impurity elements floating in the air. Therefore, variations in the characteristics of the thin film transistors can be reduced.

[0036] In this specification, continuous processing refers to a process from the first processing step performed by PCVD or sputtering to PC During the series of processes up to the second processing step performed by the VD method or sputtering method, the substrate to be processed is placed The atmosphere is always in a vacuum or inert gas without coming into contact with contaminated atmospheres such as the air. This refers to the atmosphere (nitrogen or rare gas) being controlled. This prevents re-adhesion of moisture and the like on the cleaned substrate to be processed, and allows for processing such as film formation. It is possible.

[0037] A series of processes from the first process to the second process are carried out in the same chamber. is considered to be within the scope of continuous processing in this specification.

[0038] In addition, a series of processes from the first process to the second process are carried out in different chambers. In this case, after the first processing step is completed, the substrate is transported between chambers without being exposed to the atmosphere. The application of a second treatment is also considered to be within the scope of the continuous treatment in this specification.

[0039] Between the first and second processing steps, a substrate transfer step, an alignment step, and a slow cooling step are performed. a step of heating or cooling the substrate to a temperature required for the first step or the second step, Even if the process is performed in a continuous manner, it is still considered to be within the scope of continuous processing in this specification.

[0040] However, processes that use liquids, such as cleaning, wet etching, and resist formation, are the first If the processing step is between the first processing step and the second processing step, it does not fall within the scope of continuous processing as referred to in this specification. Let's say that doesn't happen.

[0041] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of processes or stacking. Furthermore, the specific names used in this specification are not intended to identify the invention. This does not indicate

[0042] In addition to liquid crystal display devices, display devices having a driving circuit include light-emitting devices using light-emitting elements. display devices, and display devices that use electrophoretic display elements and are also called electronic paper. .

[0043] In a light-emitting display device using a light-emitting element, a plurality of thin film transistors are provided in a pixel portion, and a pixel In the element part, the gate electrode of a thin film transistor and the source wiring of another transistor, The light-emitting device has a portion to which a drain wiring is connected. In the driving circuit of the thin film transistor, the gate electrode of the thin film transistor and the source The gate electrode has a portion for connecting a wiring or a drain wiring.

[0044] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Effects of the Invention]

[0045] A thin film transistor having stable electrical characteristics can be manufactured and provided. It is possible to provide a semiconductor device having a thin film transistor with good electrical characteristics and high reliability. Cut. [Brief explanation of the drawings]

[0046] [Figure 1]1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 2] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 3] 1A to 1C illustrate a semiconductor device. [Figure 4] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 5] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C illustrate a semiconductor device. [Figure 8] 1A to 1C illustrate a semiconductor device. [Figure 9] 1A to 1C illustrate a semiconductor device. [Figure 10] 1A to 1C illustrate a semiconductor device. [Figure 11] 1A to 1C illustrate a semiconductor device. [Figure 12] 1A and 1B are diagrams illustrating pixel equivalent circuits of a semiconductor device. [Figure 13] 1A to 1C illustrate a semiconductor device. [Figure 14] FIG. 1 is a block diagram illustrating a semiconductor device. [Figure 15] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 16] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 17] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 18] FIG. 2 is a diagram illustrating the configuration of a shift register. [Figure 19] FIG. 19 is a diagram for explaining the connection configuration of the flip-flop shown in FIG. 18. [Figure 20] 1A to 1C illustrate a semiconductor device. [Figure 21] 10A and 10B are diagrams illustrating calculation results of oxygen density in oxide semiconductor layers. [Figure 22] FIG. 1 is an external view showing an example of an electronic book. [Figure 23] FIG. 1 is an external view showing an example of a television device and a digital photo frame. [Figure 24]FIG. 1 is an external view showing an example of a gaming machine. [Figure 25] FIG. 1 is an external view showing an example of a portable computer and a mobile phone. [Figure 26] 1A to 1C illustrate a semiconductor device. [Figure 27] 1A to 1C illustrate a semiconductor device. [Figure 28] FIG. [Figure 29] 1 is a graph showing the results of TDS measurement. [Figure 30] 1 is a graph showing the TDS results of H. [Figure 31] 1 is a graph showing the TDS results of O. [Figure 32] 1 is a graph showing the TDS results of OH. [Figure 33] 1 is a graph showing the TDS results of H2. [Figure 34] 1A and 1B are diagrams illustrating the structure of an oxide semiconductor layer used in calculations. DETAILED DESCRIPTION OF THE INVENTION

[0047] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. Those skilled in the art will recognize that various changes in form and details may be made without departing from the spirit and scope of the present invention. Therefore, the present invention should be interpreted as being limited to the following description of the embodiments. In the configuration described below, parts that have the same parts or similar functions are not included. The same reference numerals are used in common between different drawings for corresponding parts, and repeated explanations thereof will be omitted.

[0048] (Embodiment 1) A semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS.

[0049] FIG. 3A is a plan view of a thin film transistor 470 included in the semiconductor device, and FIG. 3A. The thin film transistor 470 is an inverted staggered type. The thin film transistor is a gate electrode layer on a substrate 400 having an insulating surface. 401, a gate insulating layer 402, a semiconductor layer 403, a source region or a drain region 404a, 404b, and source and drain electrode layers 405a and 405b. An oxide insulating film 407 is provided to cover the transistor 470 and to be in contact with the semiconductor layer 403. do.

[0050] At least the semiconductor layer 403 and the source or drain regions 404a and 404b are formed. After the first oxide semiconductor film and the second oxide semiconductor film are formed, impurities such as moisture are reduced. Heat treatment (heat treatment for dehydration or dehydrogenation) is performed to reduce the resistance (carrier The concentration is increased, preferably to 1 x 10 18 / cm 3 After the above-described treatment, the oxide insulating film 407 By forming the second oxide semiconductor film in contact with the first oxide semiconductor layer, Resistivity (carrier concentration decreases, preferably 1×10 18 / cm 3 Less than, preferably is 1 x 10 14 / cm 3 The first oxide semiconductor layer (hereinafter referred to as "oxide semiconductor layer") is used as a channel formation region. You can be there.

[0051] Furthermore, impurities such as water (H2O) are removed by heat treatment for dehydration or dehydrogenation. After the desorption process, it is preferable to slowly cool the mixture in an inert atmosphere. After heat treatment for hydrogenation and gradual cooling, an oxide insulating film was formed in contact with the first oxide semiconductor layer. The carrier concentration of the first oxide semiconductor layer can be reduced by forming a thin film transistor. This will lead to improved reliability of the Zista 470.

[0052] In addition, not only in the semiconductor layer 403 and the source or drain regions 404a and 404b, , the gate insulating layer 402, and the films provided above and below the gate insulating layer 402 and the semiconductor oxide semiconductor layer. The interface between the gate insulating layer 402 and the semiconductor layer 403, specifically, the interface between the gate insulating layer 402 and the semiconductor layer 403, and the oxide insulating layer The amount of impurities such as moisture present at the interface between the insulating film 407 and the semiconductor layer 403 is reduced.

[0053] The semiconductor layer 403, which is an oxide semiconductor layer, the source and drain regions 404a and 404b, The source and drain electrode layers 405a and 405b in contact with each other are made of titanium, aluminum, or the like. Aluminum, manganese, magnesium, zirconium, or beryllium, or The material is selected from several materials. Also, alloy films combining the above elements are laminated. Good too.

[0054] The semiconductor layer 403 including the channel formation region and the source or drain region 404a, 40 For 4b, an oxide material having semiconductor properties may be used. For example, InMO3(Z nO) m (m>0) can be used, and in particular, an oxide semiconductor having an In- It is preferable to use a Ga-Zn-O-based oxide semiconductor. M represents gallium (Ga), One selected from iron (Fe), nickel (Ni), manganese (Mn) and cobalt (Co) It indicates a metal element or multiple metal elements. For example, M can be Ga, or G In some cases, the above metal elements other than Ga may be contained, such as Ga and Ni or Ga and Fe. In the oxide semiconductor, in addition to the metal element contained as M, Fe, N are contained as impurity elements. Other transition metal elements such as iodine, or oxides of said transition metals are included. In the book, InMO3(ZnO) m Oxide semiconductor with a structure represented by (m>0) Specifically, oxide semiconductors with a structure containing at least Ga as M are called In-Ga-Zn-O oxides. The thin film is also called an In-Ga-Zn-O based non-single crystal film.

[0055] In addition to the above, oxide semiconductors that can be used for the oxide semiconductor layer include In-Sn-Zn- O-based, In-Al-Zn-O-based, Sn-Ga-Zn-O-based, Al-Ga-Zn-O-based, S n-Al-Zn-O series, In-Zn-O series, In-Ga-O series, Sn-Zn-O series, Al -Zn-O, In-O, Sn-O, and Zn-O oxide semiconductors can be used. The oxide semiconductor may contain silicon oxide.

[0056] A source region is formed between the semiconductor layer (also referred to as a first oxide semiconductor layer) and the source electrode layer. The drain region is formed between the source and drain electrode layers. An oxide semiconductor layer (also referred to as a second oxide semiconductor layer) exhibiting a conductivity type of 1 can be used. do.

[0057] It is also used as the source region or drain region 404a, 404b of the thin film transistor. The second oxide semiconductor layer has a thickness greater than that of the first oxide semiconductor layer used as a channel formation region. It is preferable that the thickness of the insulating film is thinner than that of the insulating film and that the insulating film has a higher electrical conductivity.

[0058] The first oxide semiconductor layer used as a channel forming region has an amorphous structure, and the source region The second oxide semiconductor layer used as the drain region has an amorphous structure with crystal grains (nanocrystals). The second oxide layer used as the source and drain regions may contain a silicon dioxide film. The crystal grains (nanocrystals) in the semiconductor layer have a diameter of 1 nm to 10 nm, typically 2 nm to It is about 4nm.

[0059] In this embodiment, the semiconductor layer 403 including the channel formation region and the source or drain region n area (n + In-Ga-Zn-O layers (also called buffer layers) 404a and 404b A non-single crystal film based on silicon is used.

[0060] 1A to 1C show cross-sectional views of a manufacturing process of a thin film transistor 470. FIG.

[0061] A gate electrode layer 401 is provided over a substrate 400 having an insulating surface. An insulating film may be provided between the substrate 400 and the gate electrode layer 401. These films have the function of preventing the diffusion of impurity elements, and are used for silicon nitride films, silicon oxide films, and silicon nitride oxide films. or a silicon oxynitride film. The material of the gate electrode layer 401 is molybdenum, titanium, chromium, tantalum, tungsten, or the like. Metallic materials such as stainless steel, aluminum, copper, neodymium, scandium, etc., or materials containing these as the main components The insulating film 10 can be formed as a single layer or a stacked layer using an alloy material.

[0062] For example, the gate electrode layer 401 may have a two-layer laminate structure, such as a molybdenum layer on an aluminum layer. Two-layer structure with a layer stacked on top of a copper layer, or a two-layer structure with a molybdenum layer stacked on top of a copper layer, or The titanium nitride layer and the tantalum nitride layer are laminated on the copper layer. It is preferable to use a two-layer structure in which a titanium layer is laminated with a titanium layer. a tungsten layer or a tungsten nitride layer and an aluminum-silicon alloy layer or an aluminum It is preferable to use a laminated layer in which an alloy layer of titanium and titanium is laminated with a titanium nitride layer or a titanium layer. It's nice.

[0063] A gate insulating layer 402 is formed on the gate electrode layer 401 .

[0064] The gate insulating layer 402 is formed by depositing a silicon oxide layer using a plasma CVD method, a sputtering method, or the like. A silicon nitride layer, a silicon oxynitride layer, or a silicon nitride oxide layer may be formed as a single layer or a stacked layer. For example, the plasma CVD method can be performed using SiH4, oxygen, and nitrogen as the deposition gas. Alternatively, an organic silane layer may be formed as the gate insulating layer 402. It is also possible to form a silicon oxide layer by the CVD method using organosilane gas. The following compounds are used: ethyl silicate (TEOS: chemical formula Si(OC2H5)4), tetramethylsilane (T MS: Chemical formula Si(CH3)4, tetramethylcyclotetrasiloxane (TMCTS) , octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HM DS), triethoxysilane (SiH(OC2H5)3), trisdimethylaminosilane Silicon-containing compounds such as (SiH(N(CH3)2)3) can be used.

[0065] A first oxide semiconductor film 430 and a second oxide semiconductor film 433 are formed over the gate insulating layer 402. The first oxide semiconductor film 430 is a channel forming film. The second oxide semiconductor film 433 is a semiconductor layer that functions as a source region and a drain region. It becomes an area.

[0066] Before forming the oxide semiconductor film by a sputtering method, argon gas was introduced to form a plasma. Reverse sputtering is performed to generate a mask, and dust adhering to the surface of the gate insulating layer 402 is removed. Reverse sputtering is a method in which a target is sputtered in an argon atmosphere without applying a voltage to the target. A voltage is applied to the substrate side using an RF power supply under atmospheric pressure to form plasma near the substrate and modify the surface. It is to be noted that nitrogen, helium, or the like may be used in place of the argon atmosphere. Alternatively, the treatment may be carried out in an argon atmosphere to which oxygen, N2O, etc. has been added. It may be performed in an atmosphere containing Cl2, CF4, etc.

[0067] An In-Ga-Zn-O based non-single-crystal film is used as the oxide semiconductor film. The film is formed by sputtering using an In-Ga-Zn-O oxide semiconductor target. The oxide semiconductor film is formed under a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a rare It can be formed by sputtering in an atmosphere of gas (typically argon) and oxygen. can.

[0068] The gate insulating layer 402, the first oxide semiconductor film 430, and the second oxide semiconductor film 433 are The films may be formed successively without being exposed to the atmosphere. By doing so, the interface is free from atmospheric components such as water and hydrocarbons, as well as impurities floating in the air. Since each layer interface can be formed without being contaminated by elements, thin film transistors, in particular, This can reduce the variation in sex.

[0069] The first oxide semiconductor film 430 and the second oxide semiconductor film 433 are placed in an inert gas atmosphere (nitrogen , or helium, neon, argon, etc.) or under reduced pressure, The resulting mixture is slowly cooled in an inert atmosphere (see FIG. 1B). The second oxide semiconductor film 433 is subjected to heat treatment under the above atmosphere, whereby the first oxide semiconductor film Impurities such as hydrogen and water contained in the oxide semiconductor film 430 and the second oxide semiconductor film 433 are removed. This can be done.

[0070] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain hydrogen or the like. The purity of rare gases such as helium, neon, and argon is preferably 6N (99.9999%) or higher. or 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, preferably It is preferable to keep the concentration below 0.1 ppm.

[0071] Heat treatment is carried out using an electric furnace or a GRTA (Gas Rapid Thermal Annealing (LRTA) method or lamp light Use instantaneous heating methods such as the mp Rapid Thermal Anneal method. It is possible.

[0072] Here, one form of heat treatment of the first oxide semiconductor film 430 and the second oxide semiconductor film 433 is As an example, a heating method using an electric furnace 601 will be described with reference to FIG.

[0073] Figure 28 is a schematic diagram of an electric furnace 601. A heater 603 is installed outside a chamber 602. The chamber 602 is provided with a heating element for heating the chamber 602. A susceptor 605 for mounting a substrate 604 is provided in the chamber 602. The chamber 602 is provided with a gas supply means 606 and an exhaust means 608. 7. Gas is introduced into the chamber 602 by a gas supply means 606. Also, the inside of the chamber 602 is evacuated by the exhaust means 607, or the chamber 602 is The pressure inside the electric furnace 601 is reduced. The temperature rise rate of the electric furnace 601 is set to 0.1°C / min or more and 20°C / min or less. It is preferable that the temperature drop rate of the electric furnace 601 is 0.1°C / min or more and 15 ° C. / min or less is preferable.

[0074] The gas supply means 606 includes a gas supply source 611, a pressure adjusting valve 612, a purifier 613, and a mass flow controller. In this embodiment, the gas supply source It is preferable to provide a purifier 613 between 611 and the chamber 602. By providing the gas supply source 611, the amount of water, hydrogen, etc., introduced into the chamber 602 can be reduced. The purifier 613 can remove impurities such as 2, it is possible to reduce the penetration of water, hydrogen, etc. into the interior.

[0075] In this embodiment, nitrogen or a rare gas is introduced into the chamber 602 from a gas supply source 611. The chamber is filled with nitrogen or rare gas atmosphere, and the temperature is preferably 200°C or higher and 600°C or lower. The film is formed on a substrate 604 in a chamber 602 heated to 400° C. or higher and 450° C. or lower. The first oxide semiconductor film 430 and the second oxide semiconductor film 433 are heated. The first oxide semiconductor film 430 and the second oxide semiconductor film 433 are dehydrated or dehydrogenated. It can be done.

[0076] Alternatively, the temperature is 200°C or higher and 600°C or lower, preferably 400°C or higher, under reduced pressure by an exhaust means. In a chamber 602 heated to 450° C. or less, a first The oxide semiconductor film 430 and the second oxide semiconductor film 433 are heated to form the first oxide semiconductor film 430 and the second oxide semiconductor film 433. The semiconductor film 430 and the second oxide semiconductor film 433 can be dehydrated or dehydrogenated. do.

[0077] The heater is then turned off and the chamber 602 of the heating device is allowed to cool gradually. The semiconductor film is subjected to a heat treatment under an inert gas atmosphere or under reduced pressure and then gradually cooled to a low resistance. (The carrier concentration increases, preferably 1×10 18 / cm 3 (above) and the low resistance The first oxide semiconductor film 434 and the second oxide semiconductor film 435 can be formed.

[0078] As a result, the reliability of the thin film transistors to be formed later can be improved.

[0079] If the heat treatment is carried out under reduced pressure, an inert gas should be passed through the container to return it to atmospheric pressure after heating and then cooled. Just dismiss it.

[0080] After the substrate 604 in the chamber 602 of the heating device was cooled to 300° C., 4 may be moved to a room temperature atmosphere, which may result in a shorter cooling time for the substrate 604. can.

[0081] In addition, if the heating device is a multi-chamber device, the heating process and the cooling process are performed in different chambers. Typically, nitrogen or a rare gas is filled and the temperature is 200°C to 600°C. In the first chamber, which is preferably heated to 400°C or higher and 450°C or lower, The oxide semiconductor film on the plate is heated. Then, the oxide semiconductor film is transferred to a transfer chamber into which nitrogen or a rare gas is introduced. A second chamber filled with nitrogen or a noble gas and at a temperature below 100°C, preferably at room temperature. The substrate that has been subjected to the heat treatment is then moved to the next stage and cooled. This can improve the performance.

[0082] After heat treatment under an inert gas atmosphere or reduced pressure, the material is slowly cooled to above room temperature and below 100°C. The substrate on which the first oxide semiconductor film 434 and the second oxide semiconductor film 435 were provided was The substrate is removed from the heating device and subjected to a photolithography process.

[0083] The first oxide semiconductor film 434 and the second oxide semiconductor film 435 after heat treatment under an inert gas atmosphere or reduced pressure The second oxide semiconductor film 435 is preferably amorphous, but may be partially crystalline. It may also be made into

[0084] The first oxide semiconductor film 434 and the second oxide semiconductor film 435 are formed by a photolithography process. The first oxide semiconductor layer 431 and the second oxide semiconductor layer 432 are island-shaped oxide semiconductor layers. Process it into 436 (see Figure 1(C)).

[0085] Over the gate insulating layer 402, the first oxide semiconductor layer 431, and the second oxide semiconductor layer 436 A conductive film is formed on the substrate.

[0086] The conductive film material is an element selected from Al, Cr, Ta, Ti, Mo, and W, or Examples of the alloy include alloys containing the above elements as components, and alloys of combinations of the above elements.

[0087] In addition, when a heat treatment is performed after the formation of the conductive film, the conductive film is required to have heat resistance to withstand this heat treatment. It is preferable to use aluminum alone because it has poor heat resistance and is prone to corrosion. Therefore, it is formed by combining it with a heat-resistant conductive material. Heat-resistant conductive material combined with Al Materials include titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (M o), chromium (Cr), neodymium (Nd), scandium (Sc), or or an alloy containing the above elements as components, or an alloy film of a combination of the above elements, or It is formed from nitrides containing the elements.

[0088] The first oxide semiconductor layer 431, the second oxide semiconductor layer 436, and the conductive film are removed by etching. The first oxide semiconductor layer 432 and the source or drain region are etched by the etching process. 404a and 404b, and source and drain electrode layers 405a and 405b are formed. (See FIG. 2A.) Note that the first oxide semiconductor layer 431 is only partly etched. As a result, the first oxide semiconductor layer 432 has a groove (a depression).

[0089] A silicon oxide film is formed in contact with the first oxide semiconductor layer 432 by a sputtering method as an oxide insulating film 407. The oxide insulating film 407 formed in contact with the low-resistance oxide semiconductor layer is Water, hydrogen ions, and OH - It does not contain impurities such as A blocking inorganic insulating film is used, specifically a silicon oxide film or a silicon nitride oxide film. .

[0090] In this embodiment, a silicon oxide film is formed as the oxide insulating film 407 to a thickness of 300 nm. The substrate temperature during film formation may be set to room temperature or higher and 300° C. or lower, and in this embodiment, it is set to 100° C. The silicon oxide film is formed by sputtering under a rare gas (typically argon) atmosphere. It can be carried out under an oxygen atmosphere or under an atmosphere of a rare gas (typically argon) and oxygen. In addition, it is possible to use a silicon oxide target as the target. For example, a silicon target may be used to form an oxide film by sputtering in an oxygen and nitrogen atmosphere. A silicon dioxide film can be formed.

[0091] A thin film is formed on the first oxide semiconductor layer 432 by a sputtering method, a PCVD method, or the like. When the oxide insulating film 407 is formed, the resistance of the first oxide semiconductor layer 432 is reduced. At least the region in contact with the oxide insulating film 407 is made to have a high resistance (the carrier concentration is reduced, preferably 1×10 18 / cm 3 less than 1×10 14 / cm 3 (below) and high resistance During the manufacturing process of the semiconductor device, an inert gas atmosphere is used. Oxide semiconductors are formed by heating under atmospheric pressure (or reduced pressure), slow cooling, and forming an oxide insulating film. It is important to increase or decrease the carrier concentration of the oxide semiconductor layer. A semiconductor layer 403 having a resistive oxide semiconductor region is formed, and a thin film transistor 470 is fabricated. This can be done (see Figure 2(B)).

[0092] By performing the heat treatment for the dehydration treatment or the dehydrogenation treatment, the first oxide semiconductor impurities (such as H2O, H, and OH) contained in the oxide semiconductor film and the second oxide semiconductor film are reduced. After increasing the oxide concentration, the first oxide semiconductor film is gradually cooled. The first oxide semiconductor layer is processed into a second oxide semiconductor layer, and an oxide insulating film is formed in contact with the first oxide semiconductor layer. By performing this process, the carrier concentration of the first oxide semiconductor layer is reduced and the first oxide semiconductor layer is used as a semiconductor layer. Therefore, the reliability of the thin film transistor 470 can be improved.

[0093] After the oxide insulating film 407 is formed, Then, the thin film transistor 470 is subjected to a heat treatment (preferably at 150° C. or higher and lower than 350° C.). For example, heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. Then, the semiconductor layer 403 is heated in contact with the oxide insulating film 407, and a thin film This heat treatment (preferably The temperature is not particularly limited as long as it is after the oxide insulating film 407 is formed. This is not the case in other processes, such as heat treatment during resin film formation and for reducing the resistance of the transparent conductive film. By combining this with heat treatment, the number of steps can be reduced.

[0094] (Embodiment 2) A semiconductor device and a manufacturing method thereof will be described with reference to FIGS. The parts or parts having similar functions and steps can be performed in the same manner as in embodiment 1, Repetitive explanation will be omitted.

[0095] The thin film transistor 471 shown in FIG. 26 has a gate electrode layer 401 and a channel of a semiconductor layer 403. In this example, a conductive layer 408 is provided so as to overlap with the insulating film.

[0096] 26 is a cross-sectional view of a thin film transistor 471 included in the semiconductor device. 471 is a bottom gate type thin film transistor, and a substrate 4 00, a gate electrode layer 401, a gate insulating layer 402, a semiconductor layer 403, a source region or The drain regions 404a and 404b and the source or drain electrode layers 405a and 405b are 5b, including a conductive layer 408. The conductive layer 408 is formed by oxidizing the conductive layer 408 so as to overlap the gate electrode layer 401. It is provided on the insulating film 407 .

[0097] The conductive layer 408 is formed by stacking the gate electrode layer 401, the source and drain electrode layers 405a, 40 When a pixel electrode layer is provided, it can be formed by using the same material and method as that of 5b. The conductive layer 408 may be formed using the same material and method as those for the electrode layer. A stack of a titanium film, an aluminum film, and a titanium film is used as the insulating film.

[0098] The conductive layer 408 may have a potential that is the same as or different from that of the gate electrode layer 401. The conductive layer 408 can also function as a gate electrode layer of the floating gate electrode 404. It may be in a state.

[0099] By providing the conductive layer 408 in a position overlapping with the semiconductor layer 403, In the bias-thermal stress test (hereinafter referred to as BT test) to check reliability, B The amount of change in the threshold voltage of the thin film transistor 471 before and after the T test can be reduced. In particular, after the substrate temperature is raised to 150°C, the voltage applied to the gate is set to -20V. This can suppress the fluctuation of the threshold voltage in the BT test.

[0100] This embodiment mode can be implemented in appropriate combination with Embodiment Mode 1.

[0101] (Embodiment 3) A semiconductor device and a manufacturing method thereof will be described with reference to FIGS. The parts or parts having similar functions and steps can be performed in the same manner as in embodiment 1, Repetitive explanation will be omitted.

[0102] The thin film transistor 472 shown in FIG. 27 has a gate electrode layer 401 and a channel of a semiconductor layer 403. A conductive layer 409 is provided to overlap the insulating layer 410 with the oxide insulating film 407 and the insulating layer 410 interposed therebetween. This is an example.

[0103] 27 is a cross-sectional view of a thin film transistor 472 included in the semiconductor device. 472 is a bottom gate type thin film transistor, and the substrate 4 is a substrate having an insulating surface. 00, a gate electrode layer 401, a gate insulating layer 402, a semiconductor layer 403, a source region or The drain regions 404a and 404b and the source or drain electrode layers 405a and 405b are 5b, includes a conductive layer 409. The conductive layer 409 is formed by oxidizing the conductive layer 409 so as to overlap the gate electrode layer 401. It is provided on the insulating film 407 and the insulating layer 410 .

[0104] In this embodiment, an insulating layer 410 functioning as a planarizing film is stacked over the oxide insulating film 407. The oxide insulating film 407 and the insulating layer 410 are connected to the source or drain electrode layer 405b. The opening and the insulating layer 410 are formed in the oxide insulating film 407 and the insulating layer 410. A conductive film is formed over the layer 410 and etched into a desired shape. In this way, in the process of forming the pixel electrode layer 411, the same materials and methods are used. The conductive layer 409 can be formed using the above. In this embodiment mode, The conductive layer 409 is made of an indium oxide tin oxide alloy containing silicon oxide (In- Sn-O oxides are used.

[0105] The conductive layer 409 is formed on the gate electrode layer 401 and the source or drain electrode layer 405a. , 405b may be formed using the same material and method.

[0106] The conductive layer 409 may have a potential that is the same as or different from that of the gate electrode layer 401. The conductive layer 409 can also function as a gate electrode layer of the floating gate electrode 402. It may be in a state.

[0107] By providing the conductive layer 409 in a position overlapping with the semiconductor layer 403, In the bias-thermal stress test (hereinafter referred to as BT test) to check reliability, B The amount of change in the threshold voltage of the thin film transistor 472 before and after the T test can be reduced. Cut.

[0108] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0109] (Fourth embodiment) A manufacturing process of a semiconductor device including a thin film transistor will be described with reference to FIGS. .

[0110] In FIG. 4(A), a light-transmitting substrate 100 is made of barium borosilicate glass or aluminum. A glass substrate such as borosilicate glass can be used.

[0111] Next, a conductive layer is formed on the entire surface of the substrate 100, and then a first photolithography process is performed. A resist mask is formed, and unnecessary parts are removed by etching to form wiring and electrodes (gate A gate wiring including an electrode layer 101, a capacitance wiring 108, and a first terminal 121 are formed. At this time, etching is performed so that at least the end of the gate electrode layer 101 is tapered. do.

[0112] The gate wiring including the gate electrode layer 101, the capacitance wiring 108, and the first terminal 121 of the terminal portion are Heat-resistant conductive materials such as titanium (Ti), tantalum (Ta), tungsten (W), and molybdenum Mo, chromium (Cr), neodymium (Nd), and scandium (Sc). or alloys containing the above elements or combinations of the above elements, It is desirable to form the insulating film from a nitride containing the above-mentioned elements. When forming the wiring using low-resistance conductive materials such as Al (Al) or copper (Cu), the wiring is made of Al alone or Cu alone. Since the heat resistance of the body is poor and it is prone to corrosion, it is necessary to combine it with the above heat-resistant conductive material. Combine and form.

[0113] Next, a gate insulating layer 102 is formed over the entire surface of the gate electrode layer 101 (see FIG. 4(A)). The gate insulating layer 102 is formed by sputtering, PCVD, or the like, with a thickness of 50 to 250 nm. Let m.

[0114] For example, a silicon oxide film is used as the gate insulating layer 102 by sputtering to a thickness of 100 nm. Of course, the gate insulating layer 102 is not limited to such a silicon oxide film. Other insulating films such as silicon oxynitride film, silicon nitride film, aluminum oxide film, and tantalum oxide film are also used. Films may be used and may be formed as single layer or laminate structures made of these materials.

[0115] Next, a first oxide semiconductor film 131 (first In—Ga—Zn After the plasma treatment, the first oxide semiconductor is deposited without being exposed to the atmosphere. The deposition of the semiconductor film 131 prevents dust and moisture from adhering to the interface between the gate insulating layer and the semiconductor film. Here, an oxide semiconductor containing In, Ga, and Zn with a diameter of 8 inches is used. Using a target (In2O3:Ga2O3:ZnO=1:1:1), the substrate and target were The distance between the nozzles was 170 mm, the pressure was 0.4 Pa, the DC power was 500 W, and the nozzle was argon or The film is formed in an oxygen atmosphere. If a pulsed direct current (DC) power supply is used, dust can be reduced. This is preferable because the film thickness distribution is uniform. The first oxide semiconductor film 131 is an In—Ga—Zn—O-based oxide film. A 50 nm thick In-Ga-Zn-O system non-metallic semiconductor target was sputtered. A single crystal film is formed.

[0116] Next, the second oxide semiconductor film 136 (second In—Ga—Zn— In this example, In2O3 The film was formed using a target of Ga2O3:ZnO=1:1:1 under the following conditions: pressure 0.4 The pressure was set to 100 Pa, the power was set to 500 W, the film formation temperature was set to room temperature, and the argon gas flow rate was set to 40 sccm. The substrate is then introduced and sputtered. Even though a target was used, the I film immediately after deposition contained crystal grains of 1 nm to 10 nm in size. In some cases, n-Ga-Zn-O based non-single crystal films may be formed. Film formation pressure (0.1 Pa to 2.0 Pa), power (250 W to 3000 W: 8 inch diameter), temperature The effectiveness of the crystal grains can be controlled by appropriately adjusting the temperature (room temperature to 100°C) and the film formation conditions of the reactive sputtering. The density and diameter of the crystal grains can be adjusted in the range of 1 nm to 10 nm. The thickness of the second In-Ga-Zn-O based non-single crystal film is 5 nm to 20 nm. If crystal grains are contained in the film, the size of the contained crystal grains must not exceed the film thickness. The thickness of the second In—Ga—Zn—O based non-single-crystal film is set to 5 nm.

[0117] The first In-Ga-Zn-O based non-single-crystal film is For example, the film formation conditions for the second In-Ga-Zn-O based non-single crystal film are different from those for the first In-Ga-Zn-O based non-single crystal film. The ratio of the oxygen gas flow rate to the argon gas flow rate in the first In-Ga-Zn-O system non-single The conditions for forming the crystal film are such that the oxygen gas flow rate accounts for a large proportion. The deposition conditions for the In-Ga-Zn-O non-single crystal film in 2 are: rare gas (argon or helium) etc.) atmosphere (or oxygen gas 10% or less, argon gas 90% or more), and The conditions for forming the n-Ga-Zn-O non-single crystal film were an oxygen-mixed atmosphere (oxygen gas flow rate was 100%). (greater than the gas flow rate).

[0118] The second In-Ga-Zn-O non-single crystal film was deposited in the chamber where the reverse sputtering was performed previously. The same chamber as the previous reverse sputtering may be used, or a different chamber may be used. The film may be formed using a bar.

[0119] There are two types of sputtering methods: RF sputtering, which uses a high frequency power supply for the sputtering power source, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used to deposit insulating films, while the DC sputtering method is mainly used to deposit metal films. It is used for.

[0120] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of materials in the same chamber. It is also possible to simultaneously discharge and deposit the same materials.

[0121] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There are sputtering devices that use this method.

[0122] In addition, in the film formation method using the sputtering method, the target material and the sputtering gas component are mixed during film formation. Reactive sputtering is used to form thin films of these compounds by chemically reacting them with each other. There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0123] Next, the first oxide semiconductor film 131 and the second oxide semiconductor film 136 are subjected to dehydration or dehydration. Heat treatment is performed for oxidation. 36 under an inert gas atmosphere (nitrogen, helium, neon, argon, etc.) or under reduced pressure After the heat treatment is performed at , the mixture is slowly cooled in an inert atmosphere.

[0124] Heat treatment is preferably carried out at 200°C or higher. For example, heat treatment at 450°C for 1 hour in a nitrogen atmosphere. By this heat treatment in a nitrogen atmosphere, the first oxide semiconductor film 131 and the The oxide semiconductor film 136 in No. 2 has a low resistance (high carrier concentration, preferably 1×10 1 8 / cm 3 As a result, the first oxide semiconductor film 133 and the second oxide semiconductor film 134 are reduced in resistance. A first oxide semiconductor film 137 and a second oxide semiconductor film 138 are formed (see FIG. 4C). The electrical conductivity of the film 133 and the second oxide semiconductor film 137 is 1×10 -1 S / cm or more 1× 10 2 S / cm or less is preferable.

[0125] Next, a second photolithography step is performed to form a resist mask, and the first oxide semiconductor The conductive film 133 and the second oxide semiconductor film 137 are etched using, for example, phosphoric acid, acetic acid, and nitric acid. Wet etching using an acid solution removes the unwanted parts and leaves the first oxide. The semiconductor layer 134 and the second oxide semiconductor layer 138 are formed. The etching method is not limited to wet etching, and dry etching may also be used.

[0126] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, for example For example, chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), carbon tetrachloride (CC l4) etc.) are preferred.

[0127] In addition, gases containing fluorine (fluorine-based gases, such as carbon tetrafluoride (CF4) and sulfur fluoride (SF 6), nitrogen fluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr ), oxygen (O2), and rare gases such as helium (He) and argon (Ar) Additive gases, etc. can be used.

[0128] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing) method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired processed shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were determined as follows: The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0129] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0130] In addition, after wet etching, the etching solution is washed away together with the etched material. The waste etching solution containing the removed material is purified to remove the contained material. The indium and the like contained in the oxide semiconductor layer may be recycled from the waste liquid after etching. By recovering and reusing materials, resources can be used more effectively and costs can be reduced. .

[0131] The etching conditions (etching) are adjusted to suit the material so that the desired processing shape can be etched. The etching conditions (liquid, etching time, temperature, etc.) are adjusted appropriately.

[0132] Next, a metal film made of a metal material is formed on the first oxide semiconductor layer 134 and the second oxide semiconductor layer 138. The conductive film 132 is formed by sputtering or vacuum evaporation (see FIG. 5(B)).

[0133] The material of the conductive film 132 is an element selected from Al, Cr, Ta, Ti, Mo, and W, or or alloys containing the above elements or alloys combining the above elements. .

[0134] When a heat treatment is performed after the formation of the conductive film 132, the conductive film should have heat resistance to withstand the heat treatment. It is preferable to have it.

[0135] Next, a third photolithography process is performed to form a resist mask, and then etching is performed. The unnecessary portions are removed to form the source electrode layer 105a, the drain electrode layer 105b, and the first oxide film. The oxide semiconductor layer 135, the source or drain regions 104a, 104b, and the second terminal 122 is formed (see FIG. 5(C)). The etching method used here is wet etching. For example, the conductive film 132 may be an aluminum film or When using an aluminum alloy film, wet etching is performed using a solution of phosphoric acid, acetic acid, and nitric acid. Also, etching can be performed using ammonia hydrogen peroxide (hydrogen peroxide: ammonia: water = 5 The conductive film 132 is etched by wet etching using a SiO 2 ... In this etching step, a gate electrode layer 105a and a drain electrode layer 105b may be formed. The exposed region of the first oxide semiconductor layer 134 is also partially etched, and the first oxide semiconductor layer 134 is Therefore, the second insulating layer 135 is formed between the source electrode layer or the drain electrode layer 105a and the drain electrode layer 105b. 5C, the oxide semiconductor layer 135 of the source electrode 1 is a thin region. the drain electrode layers 105a and 105b, the first oxide semiconductor layer 135, the source region or The etching for forming the drain regions 104a and 104b is performed by dry etching. Since the first oxide film is formed on the source electrode layer or the drain electrode layer 105a, 105b, The edges of the compound semiconductor layer 135 and the source or drain regions 104a and 104b are aligned. , which has a continuous structure.

[0136] In this third photolithography step, the source electrode layer or the drain electrode layer 1 The second terminal 122 made of the same material as the terminals 105a and 105b is left in the terminal portion. 122 is a source wiring (a source electrode layer including the source and drain electrode layers 105a and 105b). It is electrically connected to the wiring.

[0137] Also, a resist having regions of multiple thicknesses (typically two types) formed by a multi-tone mask is used. By using a resist mask, the number of resist masks can be reduced, which simplifies the process and reduces Cost reduction is possible.

[0138] Next, the resist mask is removed, and the gate insulating layer 102, the first oxide semiconductor layer 135, and the silicon dioxide film 136 are removed. source or drain regions 104a and 104b, a source or drain electrode layer 105 A protective insulating layer 107 is formed to cover the layers 105a and 105b. The protective insulating layer 107 is formed by the PCVD method. The source and drain electrode layers 105a and 105b are formed using a silicon oxynitride film. The exposed region of the first oxide semiconductor layer 135 and the oxide semiconductor layer 107 are provided between the exposed region and the protective insulating layer 107. The silicon nitride film is provided in contact with the first oxide semiconductor layer 107. The region of the conductor layer 135 becomes highly resistive (the carrier concentration decreases, preferably 1×10 18 / cm 3 less than 1×10 14 / cm 3 (See below) and the high-resistance channel formation region The semiconductor layer 103 can be formed to have a region.

[0139] Through the above steps, the thin film transistor 170 can be fabricated.

[0140] Next, a fourth photolithography step is performed to form a resist mask, and a protective insulating layer 10 7 and the gate insulating layer 102 are etched to form the source electrode layer or the drain electrode layer 105b A contact hole 125 is formed that reaches the second end by etching. a contact hole 127 reaching the first terminal 122; a contact hole 128 reaching the first terminal 121; The cross section at this stage is shown in FIG.

[0141] Next, the resist mask is removed, and then a transparent conductive film is formed. are indium oxide (In2O3) and indium oxide tin oxide alloy (In2O3-SnO 2, abbreviated as ITO) is formed using a sputtering method or a vacuum deposition method. Etching of such materials is done with a hydrochloric acid solution. However, etching of ITO in particular Residues tend to be generated, so indium oxide zinc oxide alloy is used to improve etching processability. Gold (In2O3-ZnO) may also be used. Indium oxide containing silicon oxide may also be used. A zinc alloy (In—Sn—O-based oxide containing silicon oxide) may also be used.

[0142] When a reflective electrode layer is used as the pixel electrode layer, tungsten (W), molybdenum (W), Mo, Zirconium (Zr), Hafnium (Hf), Vanadium (V), Niobium ( Nb), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Metals such as tungsten (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag) or its alloy, or its metal nitride. can.

[0143] Next, a fifth photolithography step is performed to form a resist mask, and then etching is performed. The pixel electrode layer 110 is formed by removing unnecessary portions.

[0144] In this fifth photolithography step, the gate insulating layer 102 in the capacitance section The protective insulating layer 107 serves as a dielectric, and the capacitor wiring 108 and the pixel electrode layer 110 form a storage capacitor. The plan view at this stage corresponds to Figure 7.

[0145] In addition, in this fifth photolithography step, the first terminal 121 and the second terminal 1 22 is covered with a resist mask, and the transparent conductive films 128 and 129 formed on the terminal portions are left. The conductive films 128 and 129 serve as electrodes or wiring used for connection with the FPC. The transparent conductive film 128 formed on the gate electrode 121 is a connecting film that functions as an input terminal of the gate wiring. The transparent conductive film 129 formed on the second terminal 122 serves as a terminal electrode of the source line. This is a connection terminal electrode that functions as an input terminal.

[0146] Next, the resist mask is removed, and the cross-sectional view at this stage is shown in FIG. 6(B).

[0147] After the protective insulating layer 107 or the pixel electrode layer 110 is formed, heat treatment may be performed. The treatment may be carried out in an air atmosphere or a nitrogen atmosphere at a temperature of 150°C or higher and lower than 350°C. When the heat treatment is performed, the semiconductor layer 103 is heated in a state where the semiconductor layer 103 is in contact with the protective insulating layer 107. This further increases the resistance of the semiconductor layer 103, thereby improving the electrical characteristics of the transistor. This heat treatment (preferably at 150°C or higher) can reduce variations in electrical properties. The temperature (up to 350° C.) is not particularly limited as long as it is after the formation of the protective insulating layer 107, and can be used in other processes, e.g. For example, it can be used for the heat treatment when forming a resin film or for the heat treatment to reduce the resistance of a transparent conductive film. This can be done without increasing the number of steps.

[0148] 8(A1) and 8(A2) are a cross-sectional view and a plan view of the gate wiring terminal portion at this stage. 8(A1) is a cross section taken along line E1-E2 in FIG. 8(A2). 8A. In FIG. 8A, a transparent conductive film 15 is formed on a protective insulating film 154. 5 is a terminal electrode for connection that functions as an input terminal. In the terminal section, a first terminal 151 made of the same material as the gate wiring and a second terminal 152 made of the same material as the source wiring are provided. The connection electrode layer 153 made of a transparent conductive film is overlapped with the gate insulating layer 152 via the gate insulating layer 152. The transparent conductive film 128 and the first terminal 155 shown in FIG. The portion where the transparent conductive film 155 and the first terminal 151 are in contact with each other is the portion where the transparent conductive film 155 and the first terminal 151 are in contact with each other in FIG. It corresponds to the part you are touching.

[0149] 8(B1) and 8(B2) show a source line terminal portion different from that shown in FIG. 6(B). 8(B1) shows a cross-sectional view and a plan view of the source wiring terminal portion. This corresponds to a cross-sectional view taken along the line F1-F2 in FIG. 8(B2). The transparent conductive film 155 formed on the insulating film 154 is a connection terminal that functions as an input terminal. In FIG. 8(B1), the terminal portion is made of the same material as the gate wiring. The electrode layer 156 is formed on the gate electrode 152 below the second terminal 150 which is electrically connected to the source line. The electrode layer 156 is electrically connected to the second terminal 150 via the insulating layer 152. The electrode layer 156 may be set to a potential different from that of the second terminal 150, for example, floating, GND, If you set it to 0V, it will form a capacitance for noise prevention or static electricity prevention. The second terminal 150 is connected to the transparent conductive film 15 via a protective insulating film 154. 5 is electrically connected.

[0150] A plurality of gate wirings, source wirings, and capacitance wirings are provided depending on the pixel density. In addition, in the terminal section, a first terminal has the same potential as the gate wiring, a second terminal has the same potential as the source wiring, and The second terminal, the third terminal with the same potential as the capacitance wiring, and so on are arranged in a row. The number of terminals may be any number and may be determined appropriately by the implementer.

[0151] In this way, five photolithography processes were performed using five photomasks to create the bottom A pixel thin film transistor having a thin film transistor 170 which is a gate-type staggered thin film transistor. The film transistor part and storage capacitor can be completed. Then, these are connected to individual pixels. By arranging the pixels in a matrix, an active matrix type It can be one of the substrates for manufacturing a display device. Such a substrate is called an active matrix substrate.

[0152] When manufacturing an active matrix liquid crystal display device, an active matrix substrate a liquid crystal layer is provided between the active matrix substrate and an opposing substrate on which an opposing electrode is provided; The common electrode is electrically connected to the counter electrode provided on the counter substrate. A fourth terminal electrically connected to the common electrode is provided on the active matrix substrate. This fourth terminal is used to set the common electrode to a fixed potential, such as GND or 0V. This is a terminal for connecting the

[0153] In addition, the capacitance wiring is not provided, and the pixel electrode is connected to the gate wiring of the adjacent pixel, the protective insulating film, and the gate A storage capacitor may be formed by stacking the layers with an insulating layer interposed therebetween.

[0154] In an active matrix liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected pixels, a display pattern is formed on the screen. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode. The liquid crystal layer disposed between the electrode and the counter electrode is optically modulated, and this optical modulation produces a display pattern. is perceived by the observer as

[0155] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, which can cause afterimages. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0156] In addition, video characteristics can be improved by increasing the normal vertical synchronization frequency by 1.5 or 2 times or more. A driving technique called double speed driving may be used.

[0157] In addition, in order to improve the video characteristics of the LCD display, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame period. Therefore, three or more types of LEDs may be used, or white-emitting LEDs may be used. Since multiple LEDs can be controlled, the LE can be switched in accordance with the timing of the optical modulation of the liquid crystal layer. This driving technology can also synchronize the timing of the LEDs to be turned off. This is especially useful when displaying images with a large proportion of black areas occupying the entire screen. This can reduce power consumption.

[0158] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. can be improved compared to the past.

[0159] The n-channel transistor disclosed in this specification has an oxide semiconductor film as a channel formation region. These drive technologies can be combined due to their good dynamic characteristics. do.

[0160] In addition, when a light-emitting display device is manufactured, one electrode (also called a cathode) of the organic light-emitting element is In order to set the low power supply potential, for example, GND or 0V, the cathode is connected to the terminal. A fourth terminal is provided for setting the voltage level, for example, GND, 0V, etc. When manufacturing a device, a power supply line is provided in addition to a source line and a gate line. Therefore, the terminal section is provided with a fifth terminal that is electrically connected to the power supply line.

[0161] In addition, when manufacturing a light-emitting display device, a partition wall using an organic resin layer is provided between each organic light-emitting element. In this case, the organic resin layer is heated, so the semiconductor layer 103 is This heat treatment improves the electrical characteristics of the transistor and reduces the variations in electrical characteristics. It can be done both ways.

[0162] By forming the thin film transistor using an oxide semiconductor, the manufacturing cost can be reduced. In particular, the heat treatment for dehydration or dehydrogenation removes the impurity moisture. In order to reduce the dew point in the deposition chamber and increase the purity of the oxide semiconductor film, Excellent electrical properties without using special sputtering equipment or ultra-high purity oxide semiconductor targets Therefore, a semiconductor device having a highly reliable thin film transistor can be manufactured.

[0163] Since the semiconductor layer in the channel formation region is a high resistance region, the electrical characteristics of the thin film transistor are This stabilizes the device and prevents an increase in off-state current. This results in good electrical characteristics and reliability. It is possible to provide a semiconductor device having a thin film transistor with good performance.

[0164] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0165] (Embodiment 5) In a display device, which is an example of a semiconductor device, at least a part of a driver circuit and a An example of manufacturing a thin film transistor disposed in a pixel portion will be described below.

[0166] The thin film transistors disposed in the pixel portion are formed according to any one of Embodiments 1 to 4. The thin film transistors shown in the first to fourth embodiments are n-channel TFTs, so that the Among them, part of the driver circuit can be configured with n-channel TFTs. It is formed on the same substrate as the resistor.

[0167] FIG. 1 shows an example of a block diagram of an active matrix liquid crystal display device, which is an example of a semiconductor device. The display device shown in FIG. 14(A) is a display device having a display element on a substrate 5300. A pixel portion 5301 having a plurality of pixels, a scanning line driver circuit 5302 for selecting each pixel, and a scanning line driver circuit 5303 for selecting each pixel. and a signal line driver circuit 5303 for controlling input of a video signal to the pixel.

[0168] The pixel portion 5301 is a signal line driver circuit 5303. The signal line driver circuit 5303 is arranged to extend in the column direction. The signal line driver circuit 5303 is connected to the signal line driver circuit 5303 by lines S1 to Sm (not shown). A plurality of scanning lines G1 to Gn (not shown) are arranged extending from 5302 in the row direction. The scanning line driver circuit 5302 is connected to the signal lines S1 to Sm and the scanning lines G1 to Gn. The image sensor has a plurality of pixels (not shown) arranged in a matrix. signal line Sj (one of the signal lines S1 to Sm), scanning line Gi (one of the scanning lines G1 to Gn), (either one) is connected.

[0169] The thin film transistors described in Embodiments 1 to 4 are n-channel TFTs. A signal line driver circuit configured with channel type TFTs will be described with reference to FIG.

[0170] The signal line driver circuit shown in FIG. 15 includes a driver IC 5601 and a group of switches 5602_1 to 5602_56. 02_M, a first wiring 5611, a second wiring 5612, a third wiring 5613 and a wiring 56 Each of the switch groups 5602_1 to 5602_M includes: A first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor It has a transistor 5603c.

[0171] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, and a third wiring 5613. and are connected to the wirings 5621_1 to 5621_M. 5602_M are connected to the first wiring 5611, the second wiring 5612, and the third wiring 561 3 and wiring 5621_1 to 5621_5 corresponding to the switch groups 5602_1 to 5602_M, respectively. Each of the wirings 5621_1 to 5621_M is connected to the first A thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor For example, the wiring 5621 in the Jth column is connected to three signal lines via a resistor 5603c. _J (one of the wirings 5621_1 to 5621_M) is connected to the switch group 5602 The first thin film transistor 5603a, the second thin film transistor 5603b, and and the third thin film transistor 5603c, the signal line Sj-1, the signal line Sj, the signal line S j+1 is connected to the

[0172] The first wiring 5611, the second wiring 5612, and the third wiring 5613 are each connected to a signal line. The number is entered.

[0173] It is desirable that the driver IC 5601 be formed on a single crystal substrate. The switch groups 5602_1 to 5602_M are formed on the same substrate as the pixel section. Therefore, the driver IC 5601 and the switch group 5602_1 to 5602_ It is recommended to connect to M via an FPC or similar.

[0174] Next, the operation of the signal line driver circuit shown in FIG. 15 will be described with reference to the timing chart of FIG. The timing chart in FIG. 16 is explained with reference to the timing chart when the i-th scanning line Gi is selected. Furthermore, the timing chart shows the selection period of the i-th scanning line Gi. is divided into a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, when a scanning line of another row is selected, the signal line driving circuit of FIG. In this case, the same operation as in FIG. 16 is performed.

[0175] In the timing chart of FIG. 16, the wiring 5621_J in the Jth column is connected to the first thin-film transistor. a second thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor 560 When connected to signal line Sj-1, signal line Sj, and signal line Sj+1 via 3c It shows.

[0176] In the timing chart of FIG. 16, the timing at which the i-th scanning line Gi is selected, The on / off timing 5703a of the first thin film transistor 5603a, The on / off timing 5703b of the third thin film transistor 56 The on / off timing of 03c is input to 5703c and the J-th row wiring 5621_J. Signal 5721_J is shown.

[0177] The wirings 5621_1 to 5621_M are connected to the first sub-selection period T1 and the second sub-selection period T2. In the first sub-selection period T2 and the third sub-selection period T3, different video signals are input. For example, the video signal input to the wiring 5621_J in the first sub-selection period T1 is The signal is input to the signal line Sj-1 and input to the wiring 5621_J in the second sub-selection period T2. The video signal to be output is input to the signal line Sj, and the signal is output to the wiring 5621 during the third sub-selection period T3. The video signal input to the first sub-selection period is input to the signal line Sj+1. During the period T1, the second sub-selection period T2, and the third sub-selection period T3, the wiring 5621_ The video signals input to J are Data_j-1, Data_j, and Data_j+ Let's say it's 1.

[0178] As shown in FIG. 16, in the first sub-selection period T1, the first thin film transistor 5603 a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c At this time, Data_j-1 input to the wiring 5621_J is turned off. The signal is input to the signal line Sj-1 via the transistor 5603a. Second sub-selection period T2 In this case, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a The third thin film transistor 5603c is turned off. The output Data_j is input to the signal line Sj via the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on, and the first The first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j+1 input to the wiring 5621_J is input to the third thin film transistor 56 It is input to the signal line Sj+1 via 03c.

[0179] From the above, the signal line driver circuit in FIG. 15 can achieve the following by dividing one gate selection period into three. During one gate selection period, a video signal is input from one wiring 5621 to three signal lines. Therefore, the signal line driver circuit of FIG. The number of connections between the substrate on which the display is mounted and the substrate on which the pixel section is formed is reduced to about one-third of the number of signal lines. By reducing the number of connections to about one-third, the signal line driver circuit of FIG. This can improve productivity and yield.

[0180] As shown in Figure 15, one gate selection period is divided into multiple sub-selection periods, and multiple sub-selection periods are During each selection period, a video signal is input from one line to each of multiple signal lines. As long as this can be achieved, there are no limitations on the arrangement, number, driving method, etc. of the thin film transistors.

[0181] For example, three or more signal lines are connected to one wiring in each of three or more sub-selection periods. When a video signal is input to each, a thin film transistor and a thin film transistor are controlled. However, it is necessary to divide one gate selection period into four or more sub-selection periods. Therefore, one gate selection period is divided into two or Preferably, it is divided into three sub-selection periods.

[0182] As another example, as shown in the timing chart of FIG. 17, the selection period of one gate can be set to pre-selection. The charge period Tp, the first sub-selection period T1, the second sub-selection period T2, the third sub-selection period T3, Furthermore, the timing chart of FIG. is selected, and the timing of turning on and off the first thin film transistor 5603a. 5803a, the on / off timing 5803b of the second thin film transistor 5603b, The on / off timing 5803c of the third thin film transistor 5603c and the arrangement of the J-th column 17 shows a signal 5821_J input to a line 5621_J. During the charge period Tp, the first thin film transistor 5603a and the second thin film transistor The third thin film transistor 5603b and the third thin film transistor 5603c are turned on. The precharge voltage Vp input to the first thin film transistor 5603a and the second thin film transistor 5603b is and a third thin film transistor 5603b and a third thin film transistor 5603c. The signal is input to the signal line Sj−1, the signal line Sj, and the signal line Sj+1. The first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and The third thin film transistor 5603c is turned off. At this time, Data_j-1 is input to the signal line Sj-1 via the first thin film transistor 5603a. In the second sub-selection period T2, the second thin film transistor 5603b is turned on, The first thin film transistor 5603a and the third thin film transistor 5603c are turned off. At this time, Data_j input to the wiring 5621_J is input to the second thin film transistor 56 During the third sub-selection period T3, the third thin-film transistor The first thin film transistor 5603a and the second thin film transistor 5603c are turned on. At this time, the Data_j+ input to the wiring 5621_J 1 is input to the signal line Sj+1 via the third thin film transistor 5603c.

[0183] From the above, the signal line driver circuit of FIG. 15 to which the timing chart of FIG. 17 is applied By providing a precharge period before the block selection period, the signal line can be precharged. Therefore, the video signal can be written to the pixel at high speed. 16 are denoted by the same reference numerals, and the same parts or parts having similar functions are shown. A detailed description of the relevant parts will be omitted.

[0184] The configuration of the scanning line driver circuit will be described. The scanning line driver circuit has a shift register. In some cases, a level shifter or a buffer may be included. In the circuit, a clock signal (CLK) and a start pulse signal (SP) are input to the shift register. ) is input, the selection signal is generated. The generated selection signal is The signal is buffered and amplified in the scanning line and then supplied to the corresponding scanning line. The gate electrodes of the transistors are connected. Since they must all be turned on at the same time, the buffer must be able to pass a large current. It is used.

[0185] One form of a shift register used as part of a scanning line driving circuit will be explained with reference to FIGS. 18 and 19. I will explain.

[0186] The circuit configuration of the shift register is shown in Figure 18. The shift register shown in Figure 18 is a flip-flop. It consists of multiple flip-flops 5701_1 to 5701_n. A first clock signal, a second clock signal, a start pulse signal, and a reset signal are input. It works as it is.

[0187] The connection relationship of the shift register in Fig. 18 will be explained. The shift register in Fig. 18 has i-stage Flip-flop 5701_i (flip-flop 5701_1~5701_n) In either case, the first wiring 5501 shown in FIG. 19 is connected to the seventh wiring 5717_i-1. 19 is connected to the seventh wiring 5717_i+1. 19 is connected to the seventh wiring 5717_i, and The sixth wiring 5506 is connected to the fifth wiring 5715 .

[0188] In addition, the fourth wiring 5504 shown in FIG. 19 is the second wiring in the odd-numbered flip-flops. 5712, and in the even-numbered flip-flops, it is connected to the third wiring 5713. The fifth wiring 5505 shown in FIG.

[0189] However, the first wiring 5501 shown in FIG. 19 of the first-stage flip-flop 5701_1 is 19 of the n-th stage flip-flop 5701_n. The second wiring 5502 is connected to the sixth wiring 5716 .

[0190] The first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 5714 and the fifth wiring 5715 are respectively connected to the first power supply line and the This may also be called the power line 2.

[0191] Next, the details of the flip-flop shown in FIG. 18 are shown in FIG. 19. The flip-flop includes a first thin film transistor 5571, a second thin film transistor 5572, A third thin film transistor 5573, a fourth thin film transistor 5574, a fifth thin film transistor a sixth thin film transistor 5575, a sixth thin film transistor 5576, a seventh thin film transistor 5577, and and an eighth thin film transistor 5578. A second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor a fifth thin film transistor 5574, a fifth thin film transistor 5575, a sixth thin film transistor 5576, The seventh thin film transistor 5577 and the eighth thin film transistor 5578 are n-channel A transistor in which the gate-source voltage (Vgs) exceeds the threshold voltage (Vth) When this occurs, the device is in a conductive state.

[0192] Next, the connection configuration of the flip-flop shown in FIG. 19 will be described below.

[0193] A first electrode (either a source electrode or a drain electrode) of the first thin film transistor 5571 is connected to a fourth wiring 5504, and a second electrode (source) of the first thin film transistor 5571 is connected to a The other of the source electrode and the drain electrode is connected to a third wiring 5503 .

[0194] A first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506, and A second electrode of the thin film transistor 5572 is connected to a third wiring 5503 .

[0195] A first electrode of the third thin film transistor 5573 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5573 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. will be done.

[0196] A first electrode of the fourth thin film transistor 5574 is connected to a sixth wiring 5506, and The second electrode of the thin film transistor 5574 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the fourth thin film transistor 5574 is connected to the first thin film transistor 5 It is connected to the gate electrode of 571.

[0197] A first electrode of the fifth thin film transistor 5575 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5575 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. will be done.

[0198] A first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5576 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the sixth thin film transistor 5576 is connected to the second thin film transistor 5 It is connected to the gate electrode of 572.

[0199] A first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5577 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502. A first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506. The second electrode of the eighth thin film transistor 5578 is connected to the gate of the second thin film transistor 5572. The gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 550. Connected to 1.

[0200] The gate electrode of the first thin film transistor 5571 and the gate electrode of the fourth thin film transistor 5574 the gate electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor The connection point of the second electrode of the seventh thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 is Further, the gate electrode of the second thin film transistor 5572, the gate electrode of the third thin film transistor 5573, and the gate electrode of the third thin film transistor 5574 are connected to the gate electrode of the second thin film transistor 5575. a second electrode of the fourth thin film transistor 5573; a second electrode of the fourth thin film transistor 5574; The gate electrode of the sixth thin film transistor 5576 and the gate electrode of the eighth thin film transistor 5578 The connection point of the two electrodes is designated as node 5544.

[0201] The first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5504 are 504 are referred to as the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wiring 5505 may be connected to a first power supply line, and the sixth wiring 5506 may be connected to a second power supply line. It can also be called a line.

[0202] In addition, the signal line driver circuit and the scanning line driver circuit are formed by using the n-channel TF The n-channel TFTs shown in Embodiments 1 to 4 can be fabricated using only T. The high mobility of the transistor allows the driving frequency of the driving circuit to be increased. In addition, the n-channel TFTs shown in Embodiments 1 to 4 have reduced parasitic capacitance, and therefore, For example, the n-channel T shown in the first to fourth embodiments has a high frequency characteristic (called f characteristic). The scanning line driver circuit using FT can operate at high speed, so the frame frequency can be It is also possible to increase the image quality or to insert a black screen.

[0203] Furthermore, the channel width of the transistor of the scanning line driving circuit can be increased, and multiple scanning lines can be formed. By arranging the drive circuit, it is possible to achieve an even higher frame frequency. When multiple scanning line driving circuits are arranged, the scanning line driving circuits for driving the even-numbered scanning lines are The circuit for driving the odd-numbered scanning lines is placed on one side, and the scanning line driving circuit for driving the odd-numbered scanning lines is placed on the other side. By placing multiple If signals are output to the same scanning line by the scanning line driving circuit, it is advantageous for increasing the size of the display device. do.

[0204] In addition, when an active matrix light-emitting display device, which is an example of a semiconductor device, is manufactured, At least one pixel is provided with a plurality of thin film transistors, so that multiple scanning line driving circuits are required. An example of a block diagram of an active matrix light emitting display device is shown in FIG. 4(B).

[0205] The light-emitting display device shown in FIG. 14B has a plurality of pixels each having a display element over a substrate 5400. A pixel portion 5401 for selecting each pixel, a first scanning line driver circuit 5402 for selecting each pixel, and a second scanning line driver circuit 5403 for selecting each pixel. A driver circuit 5404 and a signal line driver circuit 5405 for controlling the input of a video signal to a selected pixel 403 and

[0206] In the case where a video signal input to a pixel of the light-emitting display device shown in FIG. 14(B) is in a digital format, When a pixel is turned on, it emits light or does not emit light by switching the transistor on or off. Therefore, gray scale display can be performed using area gray scale or time gray scale. The stacked gray scale method divides one pixel into multiple sub-pixels, and each sub-pixel is independently driven based on a video signal. The time gray scale method is a driving method that displays gray scales by moving the pixel. This is a driving method that displays gradation by controlling the period during which the light is turned on.

[0207] Light-emitting elements have a higher response speed than liquid crystal elements, making them more suitable for time gray scale modulation than liquid crystal elements. Specifically, when displaying using the time gray scale method, one frame period is divided into multiple subframes. Then, in accordance with the video signal, the light emitting element of the pixel is By dividing the period into multiple subframes, The total length of the period during which pixels actually emit light during one frame is controlled by the video signal. It is possible to control the brightness and display gradation.

[0208] In the light-emitting display device shown in FIG. 14B, two switching TFTs are provided for one pixel. When the first scanning line is connected to the gate of one of the switching TFTs, The signal to be output is generated by the first scanning line driver circuit 5402, and the gate of the other switching TFT is A signal input to the second scanning line, which is a wiring, is generated by a second scanning line driver circuit 5404. The example shows a signal input to the first scanning line and a signal input to the second scanning line. Both of these may be generated by one scanning line driving circuit. The number of switching TFTs in a device determines the operation of the switching element. It is possible that a plurality of scanning lines are used for each pixel. The signals input to the scanning line driver circuit 100 may all be generated by one scanning line driver circuit, or may be generated by a plurality of scanning line drivers. It may be generated by an automatic circuit.

[0209] In addition, in the light-emitting display device, the driver circuit may be configured with an n-channel TFT. A part of the driver circuit can be formed on the same substrate as the thin film transistor of the pixel portion. In addition, the signal line driver circuit and the scanning line driver circuit may be formed by using the n-channel TFTs shown in Embodiments 1 to 4. It is also possible to produce it using only FT.

[0210] Through the above steps, a highly reliable display device can be manufactured as a semiconductor device.

[0211] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0212] (Sixth embodiment) A thin film transistor is manufactured, and the thin film transistor is used in a pixel portion and further in a driver circuit. A semiconductor device (also called a display device) having a display function can be manufactured. A part or the whole of the driver circuit is formed on the same substrate as the pixel portion using transistors, A stem-on panel can be formed.

[0213] The display device includes a display element. The display element includes a liquid crystal element (also called a liquid crystal display element), a light-emitting element, A light-emitting element (also called a light-emitting display element) can be used. This category includes elements whose brightness is controlled by the light emitted from the light source, specifically inorganic EL (Electroluminescent) luminescence element), organic EL element, etc. Also, electronic ink A display medium whose contrast changes due to an electrical effect can also be applied.

[0214] The display device also includes a panel in which a display element is sealed, and a controller for the panel. Furthermore, one aspect of the present invention includes a module in which an IC or the like including the above is mounted. In the process of manufacturing a display device, the element substrate corresponds to one form before the display element is completed. The element substrate includes means for supplying a current to the display element for each of the plurality of pixels. Specifically, the sub-substrate may be in a state where only the pixel electrodes of the display element are formed, or The state after the conductive film that will become the element electrode is formed, but before etching to form the pixel electrode. It can be any form.

[0215] In this specification, the term "display device" refers to an image display device, a display device, or an optical device. It also refers to connectors, such as FPC (Flexible Printed Circuit) integrated circuit) or TAB (Tape Automated Bon ding) tape or TCP (Tape Carrier Package) Modules with printed wiring boards attached to the end of TAB tape or TCP or the display element is mounted on an IC (integrated circuit) by the COG (Chip On Glass) method. The display device also includes all modules in which the display device (circuit) is directly mounted.

[0216] The appearance and cross section of a liquid crystal display panel, which is one mode of a semiconductor device, will be described with reference to FIG. 10(A1) and 10(A2) show the structure of the fourth embodiment formed on the first substrate 4001. Highly reliable thin film transistors 4010 and 4011 including oxide semiconductor layers as shown in and a liquid crystal element 4013 is disposed between the first substrate 4001 and the second substrate 4006 by a sealing material. 10(A1)(B) is a plan view of the panel sealed with 4005. A2) corresponds to the cross section at MN.

[0217] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this way, a sealing material 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driver circuit 4004 is made up of a first substrate 4001, a sealing material 4005, and a second substrate 4006. The first substrate 4001 is sealed together with the liquid crystal layer 4008. In a region different from the region surrounded by the material 4005, a single crystal is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film or a polycrystalline semiconductor film is mounted.

[0218] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, Wire bonding or TAB method can be used. is an example of mounting a signal line driver circuit 4003 by the COG method, and FIG. 10(A2) is This is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0219] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In FIG. 10B, the thin film transistor included in the pixel portion 4002 A transistor 4010 and a thin film transistor 4011 included in the scanning line driver circuit 4004 Insulating layers 4020 and 4022 are formed on the thin film transistors 4010 and 4011. 1 is provided.

[0220] The thin film transistors 4010 and 4011 each include an oxide semiconductor layer as described in Embodiment 4. A highly reliable thin film transistor including the above-mentioned thin film transistor can be applied. The thin film transistor shown in the third embodiment may be applied. The transistors 4010 and 4011 are n-channel thin film transistors.

[0221] The pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin film transistor 4010. The counter electrode layer 4031 of the liquid crystal element 4013 is electrically connected to the second substrate 40. 06. The pixel electrode layer 4030, the counter electrode layer 4031, and the liquid crystal layer 4008 are The overlapping portion corresponds to the liquid crystal element 4013. The electrode layer 4031 is provided with insulating layers 4032 and 4033 which function as alignment films. A liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033 .

[0222] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film or acrylic resin film Aluminum foil can also be used with PVF film or polyester film. A sheet sandwiched between films can also be used.

[0223] 4035 is a columnar spacer obtained by selectively etching the insulating film. To control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 A spherical spacer may be used. is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion is used to connect the opposing electrode layer 40 via conductive particles disposed between the pair of substrates. The conductive particles can electrically connect the sealing material 40 to the common potential line. Included in 05.

[0224] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a response speed of 1 msec. Since it is optically isotropic, no alignment treatment is required and the viewing angle dependency is small.

[0225] In addition to transmissive LCD devices, this can also be applied to reflective LCD devices and semi-transmissive LCD devices. can.

[0226] In addition, in a liquid crystal display device, a polarizing plate is provided on the outer side (viewing side) of the substrate, and a colored layer and a display element are provided on the inner side. In this example, the polarizing plate is provided on the inner side of the substrate. In addition, the laminated structure of the polarizing plate and the colored layer is not limited to that of the present embodiment, and the materials of the polarizing plate and the colored layer and The conditions may be appropriately set depending on the manufacturing process conditions. A light film may also be provided.

[0227] The thin film transistors 4010 and 4011 are semiconductor transistors including a channel forming region as a protective insulating film. An insulating layer 4020 is formed in contact with the body layer. The insulating film 404 may be formed using a material and a method similar to those of the oxide insulating film 407. In order to reduce the surface irregularities, the substrate is covered with an insulating layer 4021 that functions as a planarizing insulating film. There are.

[0228] Here, an insulating layer 4020 having a stacked structure is formed as a protective film. As the first layer of the silicon dioxide film, a silicon dioxide film is formed by sputtering. By using the above, it is possible to prevent hillocks in the aluminum film used as the source electrode layer and the drain electrode layer. It is effective in stopping

[0229] In addition, an insulating layer is formed as the second layer of the protective film. Then, a silicon nitride film is formed by sputtering. When a silicon nitride film is used as a protective film, Mobile ions such as thorium penetrate into the semiconductor region and change the electrical properties of the TFT. can be suppressed.

[0230] After forming the protective film, heat treatment (300°C or higher) is performed in a nitrogen atmosphere or in the air. (below) may also be performed.

[0231] An insulating layer 4021 is formed as a planarization insulating film. Heat-resistant organic compounds such as amide, acrylic, benzocyclobutene, polyamide, and epoxy. In addition to the above organic materials, low-k materials can also be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. In addition, by stacking multiple insulating films made of these materials, it is possible to obtain an insulating layer. 4021 may be formed.

[0232] Siloxane-based resin is a Si-OS compound formed using siloxane-based materials as starting materials. The siloxane resin corresponds to a resin containing an i bond. Alternatively, an organic group having a fluoro group may be used. That's fine.

[0233] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen Printing, offset printing, etc.), doctor knife, roll coater, curtain coater, etc. A baking machine, knife coater, etc. can be used. By combining this with annealing, it becomes possible to efficiently manufacture a semiconductor device.

[0234] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material can be used.

[0235] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer (conductive polymer The conductive composition can be used to form the conductive film. The pixel electrode has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. It is preferable that the electrical conductivity is 0.1 Ω·cm or less.

[0236] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0237] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials applied to 002 are supplied from FPC4018.

[0238] The connection terminal electrode 4015 is made of the same conductive film as the pixel electrode layer 4030 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the source electrode layers of the thin film transistors 4010 and 4011. The drain electrode layer is formed of the same conductive film as the drain electrode layer.

[0239] The connection terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. are electrically connected.

[0240] In FIG. 10, a signal line driver circuit 4003 is formed separately and mounted on the first substrate 4001. The present invention is not limited to this configuration. Alternatively, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be separately formed. It may be implemented.

[0241] FIG. 20 shows a semiconductor device using a TFT substrate manufactured by the manufacturing method disclosed in this specification. 1 shows an example of a liquid crystal display module.

[0242] FIG. 20 shows an example of a liquid crystal display module, in which a substrate 2600 and an opposing substrate 2601 are made of a sealing material. 2602, and a pixel portion 2603 including a TFT and the like, a display element including a liquid crystal layer, and A color layer 2604 and a colored layer 2605 are provided to form a display area. - In the case of the RGB method, coloring corresponding to each color of red, green, and blue is required for display. The polarizing layer is provided on the outside of the substrate 2600 and the counter substrate 2601. A plate 2606, a polarizing plate 2607, and a diffusion plate 2613 are provided. 0 and a reflector 2611, and the circuit board 2612 is a flexible wiring board 260 9 is connected to the wiring circuit section 2608 of the substrate 2600, and a control circuit, a power supply circuit, etc. The external circuit is built in. Also, there is a retardation plate between the polarizer and the liquid crystal layer. It may be laminated in this manner.

[0243] The LCD module is available in TN (Twisted Nematic) mode, IPS (In-Plane Switching) mode, n-Plane-Switching mode, FFS (Fringe Field Switching) Switching mode, MVA (Multi-domain Vertical A alignment) mode, PVA(Patterned Vertical Alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optical Compensated B) refrigeration mode, FLC (Ferroelectric Liquid d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0244] By the above steps, a highly reliable liquid crystal display panel can be manufactured as a semiconductor device. do.

[0245] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0246] (Embodiment 7) An example of the semiconductor device is electronic paper.

[0247] The semiconductor device may be used in electronic paper. It is also called a dynamic display, and has the same readability as paper and consumes less power than other display devices. This has the advantage that it can be made thin and light.

[0248] Electrophoretic displays can take various forms, and include first particles having a positive charge; The microcapsules containing the negatively charged second particles are dispersed in a solvent or solute. By applying an electric field to the microcapsules, The particles in the tube are moved in opposite directions to display only the color of the particles that have gathered on one side. The first particles or the second particles contain a dye and do not move in the absence of an electric field. The color of the first particle and the color of the second particle are different (including colorless). Let's say.

[0249] Thus, electrophoretic displays allow materials with high dielectric constants to migrate to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect. There is no need for a polarizing plate, which is required for display devices.

[0250] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0251] Furthermore, the microphone is appropriately placed on the active matrix substrate so as to be sandwiched between two electrodes. By arranging multiple microcapsules, an active matrix display device is completed. By applying an electric field to the cell, display can be performed. An active matrix substrate obtained by using transistors can be used.

[0252] The first particles and the second particles in the microcapsules may be made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from magnetochromic materials, magnetophoretic materials, or a composite material thereof Just use it.

[0253] FIG. 9 shows an active matrix electronic paper as an example of a semiconductor device. The thin film transistor 581 used in the device is the thin film transistor shown in Embodiment 1. The thin film transistor can be fabricated in the same manner as in the above, and is highly reliable and includes an oxide semiconductor layer. The thin film transistors shown in the second to fourth embodiments are also thin film transistors 58 of this embodiment. It can also be applied as 1.

[0254] The electronic paper in Figure 9 is an example of a display device that uses the twisting ball display method. The ball display method is an electrode layer that uses spherical particles painted in black and white as display elements. A potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying by controlling the orientation of the spherical particles that are generated.

[0255] The thin film transistor 581 sealed between the substrate 580 and the substrate 596 has a bottom gate structure. It is a thin film transistor, and is covered with an insulating film 583 that is in contact with the semiconductor layer. The first electrode layer 587 is formed by the source electrode layer or the drain electrode layer of the gate electrode 581, and the insulating film 5 The first electrode layer 83 and the insulating layer 585 are in contact with each other through an opening formed in the insulating layer 585 and are electrically connected. 587 and the second electrode layer 588 have black areas 590a and white areas 590b, a spherical particle 589 having a liquid-filled cavity 594 therearound; The spherical particles 589 are filled with a filler 595 such as a resin (see FIG. 9). The electrode layer 587 corresponds to a pixel electrode, and the second electrode layer 588 corresponds to a common electrode. The electrode layer 588 is a common potential line provided on the same substrate 580 as the thin film transistor 581. The common connection is used to connect the conductors disposed between the substrate 580 and the substrate 596. The second electrode layer 588 can be electrically connected to a common potential line via conductive particles.

[0256] Also, instead of the twist ball, an electrophoretic element can be used. and a diameter of 10 μm to 20 μm that contains positively charged white particles and negatively charged black particles. Microcapsules of about 0 μm in size are used. When an electric field is applied by the first and second electrode layers, the microcapsules turn white. White particles and black particles move in opposite directions, allowing the display to be white or black. The display element that applies this principle is an electrophoretic display element, which is generally called electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display unit, the image that has been displayed can be retained. Therefore, the semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The ability to preserve the displayed image even when the device (also known as a semiconductor device) is moved away This becomes possible.

[0257] Through the above steps, electronic paper with high reliability as a semiconductor device can be manufactured. .

[0258] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0259] (Embodiment 8) An example of a light-emitting display device is shown as a semiconductor device. is shown using a light-emitting element that utilizes electroluminescence. The light-emitting element that uses the light-emitting material is classified into two types depending on whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element and the latter an inorganic EL element.

[0260] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into the layers containing the light-emitting organic compounds, causing a current to flow. The recombination of the electrons and holes creates an excited state in the light-emitting organic compound. The excited state is then converted to the ground state, at which point light is emitted. Such a light-emitting element is called a current-excited light-emitting element.

[0261] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0262] FIG. 12 shows an example of a pixel configuration to which digital time gray scale driving can be applied as an example of a semiconductor device. This is a diagram.

[0263] The configuration and operation of a pixel to which digital time gray scale driving can be applied will be described. The figure shows an n-channel transistor using an oxide semiconductor layer as a channel formation region in one pixel. Here is an example of using two of them.

[0264] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, It has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate.

[0265] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. Then, in order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or greater than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0266] The capacitor element 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. The gate capacitance of the driving transistor 6402 is determined by the channel region A capacitance may be formed between the gate electrode and the transistor.

[0267] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is connected to The driving transistor 6402 is either fully on or off. A video signal is input, that is, the driving transistor 6402 is operated in a linear region. The driving transistor 6402 is operated in a linear region, so that the voltage of the driving transistor 6402 is higher than the voltage of the power supply line 6407. A high voltage is applied to the gate of the driving transistor 6402. The signal line 6405 is connected to A voltage equal to or greater than (power supply line voltage+Vth of the driving transistor 6402) is applied.

[0268] Furthermore, when analog grayscale driving is performed instead of digital time grayscale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 12 can be used.

[0269] When analog gradation driving is performed, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or greater than the forward voltage of the light emitting element 64 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and is at least It should be noted that the driving transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The potential of the light emitting element is made higher than the gate potential of the capacitor 6402. A current corresponding to a video signal is passed through 6404, enabling analog gradation driving.

[0270] Note that the pixel configuration shown in Fig. 12 is not limited to this. For example, A switch, a resistor, a capacitor, a transistor, a logic circuit, or the like may be added.

[0271] Next, the configuration of the light emitting element will be described with reference to FIG. 13. Here, the driving TFT is The cross-sectional structure of a pixel will be explained using the example of the type shown in Figures 13(A), (B), and (C). The TFTs 7001, 7011, and 7021, which are driving TFTs used in semiconductor devices, are actually The thin film transistor can be fabricated in the same manner as in the first embodiment, and has high reliability including an oxide semiconductor layer. In addition, the thin film transistors shown in Embodiments 2 to 4 The TFT can also be applied as TFT7001, 7011, and 7021.

[0272] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. Top emission, bottom emission, and top emission. There are light-emitting elements with a double-sided emission structure that emits light from the side, and the pixel configuration is It can also be applied to optical elements.

[0273] A light emitting element with a top emission structure will be described with reference to FIG.

[0274] In FIG. 13(A), a TFT 7001 which is a driving TFT is an n-type, and a light emitting element 7002 emits light. FIG. 13(A) shows a cross-sectional view of a pixel when incident light exits the anode 7005 side. A cathode 7003 of the light emitting element 7002 and a TFT 7001 which is a driving TFT are electrically connected. A light-emitting layer 7004 and an anode 7005 are stacked in this order on a cathode 7003. 7003 uses various materials as long as they have a small work function and are conductive films that reflect light. For example, Ca, Al, MgAg, AlLi, etc. are preferable. 004 may be composed of a single layer or multiple layers stacked together. When the cathode 7003 is configured with multiple layers, an electron injection layer, an electron transport layer, and the like are provided on the cathode 7003. The light-transmitting layer, the light-emitting layer, the hole transport layer, and the hole injection layer are laminated in this order. The anode 7005 is formed using a light-transmitting conductive material. Examples include indium oxide containing tungsten oxide, indium zinc containing tungsten oxide, Lead oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide, Indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, and silicon oxide are added. A light-transmitting conductive film such as a doped indium tin oxide film may also be used.

[0275] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 is the light-emitting element 7002. In the case of the pixel shown in FIG. 13(A), the light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as shown by the mark.

[0276] Next, a light emitting element with a bottom emission structure will be described with reference to FIG. When 011 is n-type and light emitted from the light emitting element 7012 is emitted to the cathode 7013 side, 13B shows a cross-sectional view of the pixel. A cathode 7013 of a light-emitting element 7012 is formed on a light-transmitting conductive film 7017. On the cathode 7013, a light-emitting layer 7014 and an anode 7015 are laminated in this order. When the 015 has a light-transmitting property, a shielding layer for reflecting or blocking light is applied to cover the anode. The cathode 7013 may have a film 7016 formed thereon, as in the case of FIG. Various conductive materials with small electrical conductivity can be used. The thickness is set to a level that allows light to pass through (preferably, about 5 nm to 30 nm). For example, a 20 nm film An aluminum film having a thickness of 700 nm can be used as the cathode 7013. 014 is composed of a single layer, as in FIG. 13(A), but multiple layers are laminated. The anode 7015 does not need to transmit light, but as shown in FIG. As in the case of 13(A), it can be formed using a light-transmitting conductive material. The shielding film 7016 may be made of, for example, a metal that reflects light, but is not limited to a metal film. For example, a resin containing a black pigment may be used.

[0277] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 7012. In the case of the pixel shown in FIG. 13B, light emitted from the light-emitting element 7012 corresponds to The light is emitted toward the cathode 7013 as shown by the arrow.

[0278] Next, a light emitting element with a dual emission structure will be described with reference to FIG. Then, on the conductive film 7027 having light-transmitting properties and electrically connected to the driving TFT 7021, A cathode 7023 of the light-emitting element 7022 is formed as a film. A light-emitting layer 7024 is formed on the cathode 7023. The cathode 7023 is laminated in the same manner as in FIG. Various conductive materials with small electrical conductivity can be used. For example, an aluminum film having a thickness of 20 nm is used as the cathode 70. 23. The light-emitting layer 7024 can be formed by a single It may be composed of one layer or a plurality of layers stacked together. The anode 7025 is made of a light-transmitting conductive material, similar to that shown in FIG. It can be formed by

[0279] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 is the light-emitting element 70. In the case of the pixel shown in FIG. 13C, the light emitted from the light emitting element 7022 is emitted to both the anode 7025 side and the cathode 7023 side as shown by the arrows.

[0280] Although organic EL elements have been described as light-emitting elements here, inorganic EL elements can also be used as light-emitting elements. It is also possible to provide an L element.

[0281] The thin film transistor (driving TFT) that controls the driving of the light emitting element and the light emitting element are electrically However, the current control TFT is connected between the driving TFT and the light emitting element. The configuration may be such that the power supply is connected to the power supply.

[0282] The semiconductor device is not limited to the configuration shown in FIG. 13, and may be any of the semiconductor devices disclosed in this specification. Various modifications based on the technical concept are possible.

[0283] Next, the appearance and structure of a light-emitting display panel (also referred to as a light-emitting panel), which is one mode of a semiconductor device, will be described. The cross section will be explained with reference to FIG. 11. FIG. 11(A) shows a thin film formed on a first substrate. A panel in which a film transistor and a light-emitting element are sealed between a second substrate and the panel by a sealant. 11(B) is a plan view of the device, and FIG. 11(B) corresponds to a cross-sectional view taken along line HI in FIG. 11(A).

[0284] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. 3b and the scanning line driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealing material 4505, and a second substrate 4506. In this way, at least the pixel portion is sealed together with the filler 4507. Highly airtight and low outgassing protective film (lamination film, It is preferable to package (enclose) the product in an ultraviolet curable resin film or a cover material.

[0285] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b have a plurality of thin film transistors. In FIG. 11B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45 shows an example of a thin film transistor 4509 included in a line driver circuit 4503a.

[0286] The thin film transistors 4509 and 4510 are the signal transistors including the oxide semiconductor layer described in Embodiment 3. In addition, a highly reliable thin film transistor can be applied. Thin film transistors 4509 and 4510 are n-channel thin film transistors. It is a thin film transistor.

[0287] Further, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 The layer 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The light-emitting element 4511 is configured by a first electrode layer 4517, an electroluminescent layer The light emitting element 4512 and the second electrode layer 4513 are stacked together, but the structure is not limited to the one shown. The configuration of the light emitting element 4511 can be changed appropriately according to the direction of the light extracted from the element 4511. It is possible.

[0288] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable to form the inclined surface so that the inclined surface has a continuous curvature.

[0289] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0290] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511. A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be a silicon nitride film, A silicon nitride oxide film, a DLC film, or the like can be formed.

[0291] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are transmitted through the FPC 4518a, 4518b, and It is supplied by b.

[0292] The connection terminal electrode 4515 is formed of the same conductive film as the first electrode layer 4517 of the light-emitting element 4511. The terminal electrode 4516 is formed from the source of the thin film transistors 4509 and 4510. The source electrode layer and the drain electrode layer are formed from the same conductive film.

[0293] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. are electrically connected to each other.

[0294] The second substrate 4506 located in the direction of light extraction from the light emitting element 4511 must be light-transmitting. In this case, glass plates, plastic plates, polyester films or A light-transmitting material such as an acrylic film is used.

[0295] In addition to inert gases such as nitrogen and argon, filler 4507 can also be used as UV-curable resin. It can be made of oil or thermosetting resin, and PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. For example, nitrogen can be used as a filler. That's fine.

[0296] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0297] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Alternatively, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted, and the configuration is not limited to that of FIG.

[0298] By the above process, a highly reliable light-emitting display panel (light-emitting panel) is manufactured as a semiconductor device. It is possible.

[0299] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0300] (Embodiment 9) The semiconductor device disclosed in this specification can be applied as electronic paper. Par can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, trains, etc. It can be used for in-car advertising, displaying on various cards such as credit cards, etc. An example of an electronic device is shown in Figure 22.

[0301] 22 shows an example of an electronic book 2700. For example, the electronic book 2700 includes: It consists of two housings, housing 2701 and housing 2703. The body 2703 is integrated with a shaft 2711, and the opening and closing movement is performed around the shaft 2711. This configuration allows the device to operate like a paper book. This becomes:

[0302] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a sentence is displayed on the right display unit (display unit 2705 in FIG. 22) and An image can be displayed on the display unit 2707 in FIG.

[0303] 22 shows an example in which the housing 2701 is provided with an operation unit. 701, a power switch 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The surface may be provided with a keyboard or a pointing device. If there are external connection terminals (earphone jack, USB terminal, AC adapter, etc.) on the back or side of the It is equipped with a terminal that can be connected to various cables such as a USB cable, a recording medium insertion port, etc. Furthermore, the electronic book 2700 may have a function as an electronic dictionary. This may also be configured as follows.

[0304] The electronic book 2700 may also be configured to be able to send and receive information wirelessly. The desired book data can be purchased and downloaded from the e-book server. is also possible.

[0305] (Embodiment 10) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television receivers), computer monitors, digital cameras, digital video cameras cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), ), portable game machines, personal digital assistants, audio playback devices, large game machines such as pachinko machines, etc. Examples include:

[0306] FIG. 23A shows an example of a television device 9600. The display unit 9603 is incorporated in the housing 9601. In this case, the housing 9601 is supported by a stand 9605. This shows a configuration in which the above is supported.

[0307] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the information displayed on the display 9603 is In addition, the remote control operation device 9610 can operate the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0308] The television device 9600 is configured to include a receiver, a modem, and the like. It can receive more general TV broadcasts and can also receive them via wired or wireless modems. By connecting to a communication network, it can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0309] FIG. 23B shows an example of a digital photo frame 9700. The photo frame 9700 has a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example, images taken with a digital camera. By displaying the image data, it can function like a normal photo frame.

[0310] The Digital Photo Frame 9700 has an operation panel, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section. These components may be incorporated on the same surface as the display unit, but they may be incorporated on the side or back. It is desirable to have it because it improves the design. For example, the Digital Photo Frame 9700 Insert a memory that stores image data taken with a digital camera into the recording medium insertion section of the Image data can be captured and displayed on the display unit 9703. do.

[0311] The digital photo frame 9700 may also be configured to be capable of transmitting and receiving information wirelessly. It is also possible to configure the device so that desired image data can be wirelessly acquired and displayed.

[0312] FIG. 24(A) shows a portable gaming machine, which is composed of two cabinets, a cabinet 9881 and a cabinet 9891. The housing 9881 is connected to a connector 9893 so as to be openable and closable. A display unit 9883 is incorporated in the housing 9891. The portable gaming machine shown in 24(A) also includes a speaker unit 9884, a recording medium insertion unit 988 6, LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, Chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration (including functions for measuring movement, smell, or infrared rays), microphone 9889) Of course, the configuration of the portable gaming machine is not limited to the above, and It is sufficient if the semiconductor device disclosed in the above is included, and other auxiliary equipment is appropriately provided. The portable gaming machine shown in FIG. 24(A) can be The function of reading out programs or data and displaying them on the display, and wireless communication with other portable gaming machines The portable gaming machine shown in FIG. 24(A) has the function of sharing information by performing the above. The functions are not limited to these, and various functions can be provided.

[0313] FIG. 24(B) shows an example of a slot machine 9900, which is a large gaming machine. The machine 9900 has a display unit 9903 built into a housing 9901. Machine 9900 also has other operating means such as a start lever and stop switch, coin It is equipped with an insertion slot, a speaker, etc. Of course, the configuration of the slot machine 9900 is The present invention is not limited to the above, and may be configured to include at least the semiconductor device disclosed in this specification. , and other auxiliary equipment may be provided as appropriate.

[0314] FIG. 25(A) is a perspective view showing an example of a portable computer.

[0315] The portable computer of FIG. 25(A) has an upper housing 9301 and a lower housing 9302 connected to each other. The hinge unit is closed to form an upper housing 9301 having a display portion 9303 and a keyboard. The lower housing 9302 having the card 9304 can be stacked on top of each other, making it easy to carry. This is convenient, and when the user wants to input data on the keyboard, the hinge unit can be opened. The user can perform input operations by looking at the display portion 9303.

[0316] The lower housing 9302 also includes a keyboard 9304 and a pointing device for inputting data. If the display portion 9303 is a touch input panel, Input operations can be performed by touching the lower housing 9302. The lower housing 9302 has a computing function unit such as a hard disk. It has an external connection port 9305 into which a communication cable conforming to the SB communication standard is inserted. There are.

[0317] The upper housing 9301 further includes a display unit 93 that can be slid into the upper housing 9301 and stored therein. 07, which allows for a wide display screen. The orientation of the screen of the 9307 can be adjusted by the user. If it is a panel, input operations can be performed by touching a part of the retractable display section.

[0318] The display portion 9303 or the storable display portion 9307 may be a liquid crystal display panel, an organic light emitting element, or The display device uses a light-emitting display panel made of inorganic light-emitting elements.

[0319] The portable computer shown in FIG. 25(A) is configured with a receiver and the like, and is also It is possible to receive broadcasts and display images on the display unit. The display unit 9307 is slid open while the hinge unit connecting the display unit 9307 to the body 9302 is kept closed. The entire screen is exposed by tilting the screen, and the user can watch TV broadcasts by adjusting the screen angle. In this case, the hinge unit is opened to prevent the display unit 9303 from displaying anything. It only activates the circuitry to display the TV broadcast, so it consumes the minimum amount of power. This is useful in portable computers with limited battery capacity.

[0320] FIG. 25(B) shows a portable telephone that can be worn on the user's arm like a wristwatch. FIG. 10 is a perspective view showing an example of a story.

[0321] This mobile phone includes a main body having at least a communication device with a telephone function and a battery, The band part 9204 for attaching the body to the arm and the band part 92040 for attaching the body to the arm are fixed. From the adjusting unit 9205, the display unit 9201, the speaker 9207, and the microphone 9208 It is composed of:

[0322] The main body also has an operation switch 9203, which is used for power input and display switching. In addition to the switch to start the image capture, there are also switches that start programs for the Internet, for example. Each function can be associated with another function by using an operation switch 9203 such as a switch.

[0323] Input operations of this mobile phone are performed by touching the display portion 9201 with a finger or an input pen, or by operating the display portion 9201. This is done by operating a switch 9203 or by inputting voice into a microphone 9208. 25(B) shows a display button 9202 displayed on a display unit 9201, and Input can be made by touching the screen.

[0324] The main body also contains an imaging device that converts the subject image formed through the photographic lens into an electronic image signal. It has a camera unit 9206 with a step. Note that it is not necessary to provide a camera unit.

[0325] The mobile phone shown in FIG. 25(B) is configured with a television broadcast receiver and the like. It can receive TV broadcasts and display the images on the display unit 9201, and can also store data in memory etc. It is possible to record television broadcasts in memory by using a storage device. The mobile phone shown in B) may have a function capable of collecting location information such as GPS.

[0326] The display unit 9201 is a light-emitting display panel such as a liquid crystal display panel, an organic light-emitting element, or an inorganic light-emitting element. The mobile phone shown in Figure 25(B) is small and lightweight. Therefore, the battery capacity is limited, and the display device used for the display portion 9201 is a low-power display device. It is preferable to use a force-actuable panel.

[0327] Although FIG. 25(B) illustrates an electronic device that is worn on the arm, it is not limited to this. It is sufficient that the device has a portable shape. [Example]

[0328] Here, in the oxide semiconductor layer having a region with a high oxygen density and a region with a low oxygen density, The results of calculations of the change in oxygen density before and after heat treatment were obtained using Figures 34 and 21. Here, the software used for calculation is Fujitsu Ltd.'s Mater ials Explorer 5.0 was used.

[0329] 34 shows a model of the oxide semiconductor layer used in the calculation. 1 was made to have a structure in which a layer 703 with a low oxygen density and a layer 705 with a high oxygen density were stacked.

[0330] Here, the low oxygen density layer 703 is made of 15 In atoms, 15 Ga atoms, and 15 The amorphous structure consisted of 10 Zn atoms and 54 O atoms.

[0331] The oxygen-rich layer 705 is made of 15 In atoms, 15 Ga atoms, and 15 The amorphous structure consisted of Zn atoms and 66 O atoms.

[0332] The density of the oxide semiconductor layer 701 is set to 5.9 g / cm 3 It was decided.

[0333] Next, the oxide semiconductor layer 701 was subjected to aging under the conditions of NVT ensemble and temperature of 250°C. A typical MD (molecular dynamics) calculation was performed. The time step width was set to 0.2 fs, and the total calculation time was 200 ps. In addition, Born was used as the potential for the metal-oxygen bond and the oxygen-oxygen bond. A Mayer-Huggins potential was applied to the oxide semiconductor layer 70. The motion of the atoms at the top and bottom of 1 is fixed.

[0334] Next, the calculation results are shown in Figure 21. The area from 0 nm to 1.15 nm on the z-axis coordinate is the layer with low oxygen density. 703, and the region from 1.15 nm to 2.3 nm on the z-axis coordinate is the oxygen-rich layer 705. The oxygen density distribution before the MD calculation is shown by the solid line 707, and the oxygen density distribution after the MD calculation is shown by the dashed line Shown as 709.

[0335] The solid line 707 indicates that the oxide semiconductor layer 701 is in contact with the layer 703 having a low oxygen density. The oxygen density is higher on the side of the layer 705 with high oxygen density than on the interface with the layer 705 with high oxygen density. On the other hand, the broken line 709 indicates that the oxygen density is low in the layer 703 and high in the layer 705. It can be seen that the oxygen density is uniform.

[0336] From the above, it is assumed that the layer with low oxygen density 703 and the layer with high oxygen density 705 are stacked together. If there is a bias in the distribution of oxygen density, the heat treatment will cause diffusion from high oxygen density to low oxygen density. It can be seen that the oxygen density becomes homogeneous.

[0337] That is, as described in Embodiment 1, the oxide insulating film 407 is formed over the first oxide semiconductor layer 432. By forming the above, the first oxide semiconductor layer 432 and the oxide insulating film 407 Since the oxygen density increases, the oxygen diffuses to a region of the first oxide semiconductor layer 432 where the oxygen density is low. As a result, the resistance of the first oxide semiconductor layer 432 increases. The reliability of the system can be improved.

Claims

1. A display device having a transistor and a pixel electrode, an oxide semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, a first insulating layer, and a second insulating layer; the first conductive layer functions as a gate electrode of the transistor, the first insulating layer has a region located above the first conductive layer and functions as a gate insulating layer of the transistor; the oxide semiconductor layer has a region located above the first insulating layer and has a channel formation region of the transistor; the second conductive layer has a region located above the oxide semiconductor layer and functions as one of a source electrode and a drain electrode of the transistor; the third conductive layer has a region located above the oxide semiconductor layer and functions as the other of the source electrode and the drain electrode of the transistor; the second insulating layer has a region located above the second conductive layer and a region located above the third conductive layer; the fourth conductive layer has a region located above the second insulating layer, is electrically connected to the third conductive layer, and functions as the pixel electrode; the first insulating layer has a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the fifth conductive layer; the second insulating layer has a region in contact with an upper surface of the second conductive layer, a region in contact with an upper surface of the third conductive layer, and a region in contact with an upper surface of the sixth conductive layer; the seventh conductive layer has the same material as the fourth conductive layer; the sixth conductive layer is disposed to overlap the fifth conductive layer; the seventh conductive layer has a region in contact with an upper surface of the fifth conductive layer; A display device, wherein the fifth conductive layer is floating.

2. A display device having a transistor and a pixel electrode, an oxide semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, a first insulating layer, and a second insulating layer; the first conductive layer functions as a gate electrode of the transistor, the first insulating layer has a region located above the first conductive layer and functions as a gate insulating layer of the transistor; the oxide semiconductor layer has a region located above the first insulating layer and has a channel formation region of the transistor; the second conductive layer has a region located above the oxide semiconductor layer and functions as one of a source electrode and a drain electrode of the transistor; the third conductive layer has a region located above the oxide semiconductor layer and functions as the other of the source electrode and the drain electrode of the transistor; the second insulating layer has a region located above the second conductive layer and a region located above the third conductive layer; the fourth conductive layer has a region located above the second insulating layer, is electrically connected to the third conductive layer, and functions as the pixel electrode; the fifth conductive layer is disposed in the same layer as the first conductive layer, the sixth conductive layer is disposed in the same layer as the second conductive layer, the seventh conductive layer is disposed in the same layer as the fourth conductive layer, the sixth conductive layer is disposed to overlap the fifth conductive layer; the seventh conductive layer has a region in contact with an upper surface of the fifth conductive layer; A display device, wherein the fifth conductive layer is floating.

3. In claim 1 or claim 2, The oxide semiconductor layer includes an In—O-based oxide semiconductor.

Images