Semiconductor device

Abstract

To suppress variation in electrical characteristics and to improve reliability in a transistor including an oxide semiconductor.SOLUTION: The transistor includes an oxide semiconductor film over the first insulating film, a second insulating film over the oxide semiconductor film, a metal oxide film over the second insulating film, a gate electrode over the metal oxide film, and a third insulating film over the oxide semiconductor film and the gate electrode, the oxide semiconductor film includes a channel region overlapping with the gate electrode, a source region in contact with the third insulating film, and a drain region in contact with the third insulating film, and the source region and the drain region contain one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a rare gas.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film and a display device including the semiconductor device. Regarding the device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. Process, Machine, Manufacture, or Composition of Matter In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] A transistor (field-effect transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology that makes up the field-effect transistor (FET) or thin-film transistor (TFT) is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (display devices). It is widely used in electronic devices. Silicon is a semiconductor thin film that can be used in transistors. Semiconductor materials, such as silicon, are widely known, but oxide semiconductors are also attracting attention. It is being watched.

[0005] For example, amorphous oxides containing In, Zn, Ga, Sn, etc. are used as oxide semiconductors. A technique for fabricating a transistor using self-aligned transistors has been disclosed (see Patent Document 1). A technique for fabricating a transistor using an oxide thin film having a top gate structure has been disclosed (Patent (See patent document 2).

[0006] In addition, a base insulating layer of the oxide semiconductor layer in which a channel is formed is heated to release oxygen. A semiconductor device is disclosed in which an insulating layer is used to reduce oxygen vacancies in the oxide semiconductor layer (Patent Document 1). (See Patent Document 3). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-165529 [Patent Document 2] Japanese Patent Application Laid-Open No. 2009-278115 [Patent Document 3] Japanese Patent Application Laid-Open No. 2012-009836 Summary of the Invention [Problem to be solved by the invention]

[0008] As a transistor including an oxide semiconductor film, for example, an inverted staggered type (bottom gate structure) The oxide semiconductors are of the staggered type (also called top gate structure) and the staggered type (also called top gate structure). When a transistor having a thin film is applied to a display device, it is preferable to use an inverted type transistor rather than a staggered type transistor. The manufacturing process of staggered transistors is relatively simple and the manufacturing cost can be reduced. However, as the screen size of display devices increases, Higher resolution image quality (for example, 4K x 2K (horizontal pixel count = 3840 pixels, vertical pixel count = 2160 pixels) or 8K x 4K (horizontal pixel count = 7680 pixels, vertical pixel count = As high-resolution display devices (represented by 4320 pixels) advance, inverted staggered transistors In this case, parasitic capacitance may occur between the gate electrode and the source and drain electrodes. Depending on the size of the parasitic capacitance, signal delays may increase, deteriorating the image quality of the display device. Therefore, a staggered transistor including an oxide semiconductor film has been developed. It is desirable to develop a structure with stable semiconductor properties and high reliability.

[0009] In addition, when a transistor is manufactured using an oxide semiconductor film for a channel region, Oxygen vacancies formed in the channel region of the conductive film affect transistor characteristics. For example, when oxygen vacancies are formed in the channel region of the oxide semiconductor film, the oxygen Carriers are generated due to electron vacancies. Carriers are generated in the channel region of the oxide semiconductor film. When the oxide semiconductor film is formed, the electrical characteristics of a transistor having a channel region including the oxide semiconductor film change. Typically, a shift in threshold voltage occurs. In addition, the electrical characteristics vary from transistor to transistor. Therefore, in the channel region of the oxide semiconductor film, oxygen vacancies are formed. On the other hand, in a transistor using an oxide semiconductor film for a channel region, In the present invention, the oxide semiconductor film in contact with the source electrode and the drain electrode includes a In order to reduce the contact resistance with the drain electrode, it is preferable that the oxygen deficiency is large and the resistance is low.

[0010] In view of the above problems, one embodiment of the present invention is to provide a transistor including an oxide semiconductor. One of the objectives is to suppress fluctuations in thermal characteristics and improve reliability. An object of one embodiment of the present invention is to provide a staggered transistor including an oxide semiconductor. Alternatively, one embodiment of the present invention is a transistor having an oxide semiconductor and a large on-state current. Another object of one embodiment of the present invention is to provide a transistor including an oxide semiconductor. Another object of the present invention is to provide a transistor having a low off-state current. An object of one embodiment of the present invention is to provide a semiconductor device with reduced power consumption. Another object of one embodiment of the present invention is to provide a novel semiconductor device.

[0011] The above description of the problem does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. Problems other than those mentioned above can be solved by the specification. It is clear from the description of the specification, etc. that the problems other than those mentioned above cannot be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0012] One embodiment of the present invention is a semiconductor device including a transistor, the transistor comprising: an oxide semiconductor film on the insulating film; a second insulating film on the oxide semiconductor film; a metal oxide film, a gate electrode on the metal oxide film, an oxide semiconductor film, and a third layer on the gate electrode; the oxide semiconductor film has a channel region overlapping with the gate electrode and a third insulating film. a source region in contact with the insulating film and a drain region in contact with the third insulating film, and the drain region is doped with hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, Or it is a semiconductor device containing one or more rare gases.

[0013] Another embodiment of the present invention is a semiconductor device including a transistor, The substrate includes a conductive film, a first insulating film on the conductive film, an oxide semiconductor film on the first insulating film, and an oxide semiconductor film. a second insulating film on the semiconductor film; a metal oxide film on the second insulating film; and a gate on the metal oxide film. an electrode, an oxide semiconductor film, and a third insulating film over the gate electrode; The gate electrode is overlapped with a channel region, a source region is in contact with the third insulating film, and a gate electrode is in contact with the third insulating film. and a drain region in contact with the insulating film, the source region and the drain region being doped with hydrogen, boron, Semiconductors containing one or more of carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, or a rare gas It is a device.

[0014] Another embodiment of the present invention is a semiconductor device including a transistor, The substrate includes a conductive film, a first insulating film on the conductive film, an oxide semiconductor film on the first insulating film, and an oxide semiconductor film. a second insulating film on the semiconductor film; a metal oxide film on the second insulating film; and a gate on the metal oxide film. the gate electrode, the oxide semiconductor film, and the third insulating film over the gate electrode; The oxide semiconductor film is electrically connected to the gate electrode, and the oxide semiconductor film has a channel region overlapping with the gate electrode and a first a source region in contact with the third insulating film, and a drain region in contact with the third insulating film, The source and drain regions are doped with hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, and titanium. A semiconductor device having one or more of the following:

[0015] In the above embodiment, the transistor further includes a fourth insulating film on the third insulating film; a source electrode connected to the source region through an opening provided in the insulating film and the fourth insulating film; The drain region is connected to the electrode through an opening provided in the third insulating film and the fourth insulating film. and a drain electrode connected thereto.

[0016] In the above embodiment, the metal oxide film is selected from the group consisting of In, Zn, Al, Ga, Y, and Sn. It is preferable to have one or more.

[0017] In the above embodiment, the rare gas is helium, neon, argon, krypton, xenon, or the like. It is preferred to have one or more of the following:

[0018] In the above embodiment, the third insulating film preferably contains one or more of nitrogen, hydrogen, and fluorine. I wish.

[0019] In the above embodiment, the oxide semiconductor film contains In, Zn, and M (M is Al, Ga, In the above embodiment, the oxide semiconductor film preferably contains It is preferable that the crystal portion has a c-axis orientation.

[0020] Another embodiment of the present invention is a semiconductor device and a display element according to any one of the above embodiments. Another embodiment of the present invention is a display device including the display device and a touch sensor. Another aspect of the present invention is a display module having any of the above aspects. a semiconductor device, the display device, or the display module according to one of the above; and an operation key or and a battery. [Effects of the Invention]

[0021] According to one embodiment of the present invention, a transistor including an oxide semiconductor can be prevented from fluctuating in electrical characteristics. Further, according to one embodiment of the present invention, A staggered transistor including an oxide semiconductor can be provided. According to one embodiment, a transistor including an oxide semiconductor and having high on-state current can be provided. According to one embodiment of the present invention, a transistor having an oxide semiconductor and low off-state current can be obtained. Alternatively, according to one embodiment of the present invention, a transistor with reduced power consumption can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. can be provided.

[0022] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other effects from the descriptions in the aspects and claims. [Brief explanation of the drawings]

[0023] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 2] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 3] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 4] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 5] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 6] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 7] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 8] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 9] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 10] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 11] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 12] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 13] 1 is a cross-sectional view illustrating a semiconductor device. [Figure 14] FIG. 1 is a diagram illustrating a band structure. [Figure 15] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 16] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 17] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 18] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 19] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 20] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 21] FIG. 1 is a diagram illustrating a model for forming oxygen vacancies. [Figure 22] FIG. 1 is a diagram illustrating a model for forming oxygen vacancies. [Figure 23] FIG. 1 is a diagram illustrating a model used in calculations. [Figure 24] FIG. 10 is a diagram illustrating the calculation results of the density of states of the VOF model. [Figure 25] FIG. 1 is a diagram illustrating a model used in calculations. [Figure 26] FIG. 1 is a diagram illustrating a model used in calculations. [Figure 27] FIG. 10 is a diagram illustrating the calculation results of the density of states of a crystal model. [Figure 28] FIG. 10 is a diagram illustrating the calculation results of the formation energies of VO and VOF. [Figure 29] FIG. 10 is a diagram illustrating the calculation results of the formation energies of Fint and Oint. [Figure 30] FIG. 1 is a diagram illustrating the calculation results of the formation energy and energy difference between the reactant and product systems. [Figure 31] FIG. 1 is a diagram illustrating a model used in calculations. [Figure 32]A diagram explaining a model of the stable arrangement of impurities (F or H) between the lattices of an InGaZnO4 crystal model. [Figure 33] A diagram explaining a model of the diffusion path of F in an InGaZnO4 crystal. [Figure 34] FIG. 10 is a diagram illustrating the calculation results of the change in energy corresponding to the diffusion path of F. [Figure 35] A diagram explaining a model of the diffusion path of H in an InGaZnO4 crystal. [Figure 36] 1 is a diagram illustrating the calculation results of the change in energy corresponding to the diffusion path of H. [Figure 37] 1A and 1B are diagrams illustrating structural analysis of a CAAC-OS and a single-crystal oxide semiconductor by XRD, and a selected-area electron diffraction pattern of a CAAC-OS. [Figure 38] Cross-sectional TEM image of CAAC-OS, as well as planar TEM image and its image analysis. [Figure 39] Electron diffraction pattern of nc-OS and cross-sectional TEM image of nc-OS. [Figure 40] Cross-sectional TEM image of a-like OS. [Figure 41] FIG. 1 shows the change in the crystalline part of an In-Ga-Zn oxide due to electron irradiation. [Figure 42] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 43] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 44] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 45] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 46] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 47] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 48] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 49] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 50] FIG. 1 illustrates a circuit configuration of a semiconductor device. [Figure 51] 2A and 2B are a diagram for explaining the configuration of a pixel circuit and a timing chart for explaining the operation of the pixel circuit; [Figure 52] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 53] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 54] 1A and 1B are graphs and circuit diagrams illustrating one embodiment of the present invention. [Figure 55] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 56] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 57] FIG. 1 is a cross-sectional view showing an example of an input / output device. [Figure 58] FIG. 2 is a diagram illustrating a display module. [Figure 59] 1A to 1C illustrate electronic devices. [Figure 60] FIG. DETAILED DESCRIPTION OF THE INVENTION

[0024] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be embodied in various different forms without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0025] Also, in the drawings, the size, thickness of layers, or areas are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0026] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the number of components. It should be noted that this is added to avoid confusion and is not intended to limit the number.

[0027] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used to indicate the position of components. The positional relationship is used for convenience in describing the structure with reference to the drawings. The relationship between the two components changes depending on the direction in which each component is depicted. The terms are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0028] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal The semiconductor device has a channel region therein, and a current flows through the drain, the channel region, and the source. In this specification and the like, the channel region is a region where a current mainly flows. The flow area.

[0029] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0030] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "of" is not subject to any particular restrictions as long as it allows the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. It has various functions such as switching elements, resistors, inductors, capacitors, etc. This includes elements such as:

[0031] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes cases where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0032] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer" It may be possible to change the term to

[0033] Unless otherwise specified, in this specification and the like, the off-state current refers to the current that flows when a transistor is off. This refers to the drain current when the device is in a non-conducting state (also known as a cut-off state). Unless otherwise specified, for an n-channel transistor, the voltage V between the gate and source When gs is lower than the threshold voltage Vth, the gate and This refers to the state in which the voltage Vgs between the n-channel and n-channel transistors is higher than the threshold voltage Vth. The off-state current of a transistor is the voltage between the gate and source, Vgs, that is, the threshold voltage, Vt It may refer to the drain current when it is lower than h.

[0034] The off-state current of a transistor may depend on Vgs. The off-state current is I or less if there is a Vgs value at which the off-state current of the transistor is I or less. The off-state current of a transistor is the current that flows through it in the off state at a given Vgs. , an off-state at Vgs within a predetermined range or a sufficiently reduced off-current is obtained. It may refer to the off-state current at Vgs.

[0035] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The on-current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -1 3 A, and the drain current at Vgs = -0.5 V is 1 × 10 -19 A and Vg The drain current at s = -0.8V is 1×10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: , or 1×10 when Vgs is in the range of -0.5V to -0.8V -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 It may be said that it is below A. The drain current of the transistor is 1×10 -22 A or less Vgs exists. Therefore, the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0036] In this specification and the like, the off-state current of a transistor having a channel width W is calculated based on the It is sometimes expressed as the current value that flows per watt. In the latter case, the unit of the off-state current is current / length. It may be expressed in units with an element (e.g., A / μm).

[0037] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the values ​​are measured at room temperature, 60°C, 85°C, 95°C, or 125°C. It may also represent the current that is generated when the reliability of a semiconductor device that includes the transistor is guaranteed. or the temperature at which a semiconductor device containing the transistor is used (e.g. For example, the off-state current at any temperature between 5°C and 35°C. The off-state current of the transistor is I or less at room temperature, 60°C, 85°C, 95°C, 125°C, The temperature at which the reliability of a semiconductor device including the transistor is guaranteed, or The temperature at which the semiconductor device containing the transistor is used (for example, between 5°C and 35°C) There exists a value of Vgs at which the off-state current of the transistor is I or less at It may refer to.

[0038] The off-state current of a transistor can depend on the voltage Vds between the drain and source In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or In some cases, the value represents the off-state current at 20 V. Alternatively, the value represents the off-state current of the semiconductor containing the transistor. Vds that guarantees the reliability of semiconductor devices, or semiconductor devices that include the transistor The off-state current of a transistor at Vds is sometimes used in The current is I or less when Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, transistors included Vds that guarantees the reliability of the semiconductor device, etc. that contains the transistor, or The off-state current of a transistor at Vds used in semiconductor devices is I or less. It may refer to the existence of a Vgs value.

[0039] In the above description of the off-state current, the drain may be read as the source. Current may also refer to the current through the source when the transistor is in the off state.

[0040] In this specification and the like, the term "leak current" may be used to mean the same thing as "off-state current." In this specification, the off-state current is, for example, the current when a transistor is in an off state. , may refer to the current flowing between the source and drain.

[0041] In this specification, impurities in semiconductors refer to substances other than the main components that make up the semiconductor. For example, elements with a concentration of less than 0.1 atomic percent are impurities. , DOS (Density of State) is formed in the semiconductor, and carrier The mobility and crystallinity may decrease. In the case of a compound semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements. , Group 2 elements, Group 14 elements, Group 15 elements, transition metals other than the main component, etc., especially, Hydrogen (also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen In the case of oxide semiconductors, for example, oxygen vacancies are formed due to the inclusion of impurities such as hydrogen. In addition, if the semiconductor contains silicon, there may be some defects that change the properties of the semiconductor. The pure substances include, for example, oxygen, Group 1 elements excluding hydrogen, Group 2 elements, Group 13 elements, and Group 1 elements. Group 5 elements, etc.

[0042] (Embodiment 1) In this embodiment, a semiconductor device including a transistor and a manufacturing method of the semiconductor device will be described. An example of this will be described with reference to FIGS.

[0043] <1-1. Configuration example 1 of semiconductor device> 1A, 1B, and 1C show examples of semiconductor devices including transistors. The transistors shown in 1(A), (B), and (C) are staggered (top-gate structure).

[0044] 1A is a top view of a transistor 100, and FIG. 1B is a dot-and-dash diagram of FIG. 1A. 1(C) is a cross-sectional view taken along line X1-X2, and FIG. 1(C) is a cross-sectional view taken along line Y1-Y2 in FIG. 1(A). In FIG. 1(A), for clarity, components such as an insulating film 110 are omitted. In the top view of the transistor, the same as in FIG. 1( As with A), some of the components may be omitted. The two directions are called the channel length (L) direction, and the dashed line Y1-Y2 direction is called the channel width (W) direction. This may occur.

[0045] The transistor 100 shown in FIGS. 1A, 1B, and 1C includes an insulating film 104 on a substrate 102 and a , an oxide semiconductor film 108 on the insulating film 104, and an insulating film 110 on the oxide semiconductor film 108. , a metal oxide film 112 on the insulating film 110, a conductive film 114 on the metal oxide film 112, and an insulating film 104, the oxide semiconductor film 108, and the insulating film 116 over the conductive film 114. The oxide semiconductor film 108 has a channel region 108i overlapping with the conductive film 114 and an insulating film 11 6 and a drain region 108d in contact with the insulating film 116. do.

[0046] The insulating film 116 contains one or more of nitrogen, hydrogen, and fluorine. The source region 108s and the drain region 108d are in contact with each other, so that the nitrogen in the insulating film 116, One or more of hydrogen and fluorine are added to the source region 108s and the drain region 108d. The source region 108s and the drain region 108d are doped with the above-mentioned elements. In particular, the source region 108s and the drain region 108d are It is preferable that the source region 108s and the drain region 108d contain fluorine. When the oxide semiconductor contains fluorine, the carrier density can be stably increased. The configuration will be described in detail in the second embodiment.

[0047] The transistor 100 also includes an insulating film 118 on the insulating film 116 and a layer between the insulating films 116 and 11. A conductive layer electrically connected to the source region 108s is formed through an opening 141a in the semiconductor substrate 108. The drain region is connected to the insulating film 120a through an opening 141b formed in the insulating films 116 and 118. and a conductive film 120b electrically connected to the region 108d.

[0048] In this specification and the like, the insulating film 104 is referred to as a first insulating film, and the insulating film 110 is referred to as a second insulating film. The insulating film 116 is referred to as the third insulating film, and the insulating film 118 is referred to as the fourth insulating film. In addition, the conductive film 114 functions as a gate electrode, and the conductive film 120 The conductive film 120a functions as a source electrode, and the conductive film 120b functions as a drain electrode. Has.

[0049] The metal oxide film 112 also has a function of supplying oxygen to the insulating film 110. 112 has a function of supplying oxygen to the insulating film 110, and thus excess oxygen is not present in the insulating film 110. The insulating film 110 has an excess oxygen region, which allows the formation of an oxygen-rich region. Excess oxygen can be supplied into the channel region 108i of the compound semiconductor film 108. Therefore, oxygen vacancies that may be formed in the channel region 108i can be compensated for by excess oxygen. Therefore, a highly reliable semiconductor device can be provided.

[0050] In order to supply excess oxygen into the oxide semiconductor film 108, Excess oxygen may be supplied to the insulating film 104 formed below the insulating film 8. The excess oxygen contained in the insulating film 104 is used to form the source region 108s of the oxide semiconductor film 108. , and drain region 108d. When excess oxygen is supplied to the source region 108s and the drain region 108d, The resistance may be high.

[0051] On the other hand, in the structure in which the insulating film 110 formed above the oxide semiconductor film 108 contains excess oxygen, By forming the film, it is possible to selectively supply excess oxygen only to the channel region 108i. Alternatively, the channel region 108i, the source region 108s, and the drain region 10 After supplying excess oxygen to the source region 108s and the drain region 108d, All you need to do is selectively increase rear density.

[0052] Note that the metal oxide film 112 only needs to have a function of supplying oxygen to the insulating film 110. The metal oxide film 112 may be in the form of an insulator, a semiconductor, or a conductor. In the case of an insulator or a semiconductor, the metal oxide film 112 functions as a gate insulating film, and the insulating film 11 The gate insulating film of the transistor 100 can be formed by the metal oxide film 112 and the silicon dioxide film 110 . In addition, when the metal oxide film 112 is a semiconductor or a conductor, the metal oxide film 112 is a gate electrode. The conductive film 114 and the metal oxide film 112 function as a gate electrode of the transistor 100. It can be configured.

[0053] The metal oxide film 112 contains one or more of In, Zn, Al, Ga, Y, and Sn. For example, when the metal oxide film 112 is used as an insulator or a semiconductor, 2 may be aluminum oxide, gallium oxide, or yttrium oxide. In addition, when the metal oxide film 112 is used as a semiconductor or a conductor, the metal oxide film 112 and Examples of the oxide include indium oxide, tin oxide, zinc oxide, and In-Ga-Zn oxide. That's fine.

[0054] The metal oxide film 112 is made of an oxide semiconductor such as In-Ga-Zn oxide. When the metal oxide film 112 is used, oxygen is supplied to the insulating film 110, and then the conductive film 114 is formed. The contact increases the carrier density, or nitrogen, hydrogen, or fluorine is introduced from the insulating film 116. In other words, the oxide semiconductor is an oxide It functions as an OC (Oxide Conductor). The oxide film 112 can be used as a part of the gate electrode.

[0055] The source region 108s and the drain region 108d of the oxide semiconductor film 108 are and each preferably has an element that forms an oxygen vacancy or an element that bonds to an oxygen vacancy. Representative elements that form oxygen vacancies or elements that bond with oxygen vacancies include: Examples include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and rare gases. Representative examples of rare gases include helium, neon, argon, krypton, and xenon. When the element that forms the oxygen vacancy is contained in the insulating film 116, the insulating film The constituent elements of 116 diffuse into the source region 108s and the drain region 108d. The elements that form the oxygen vacancies are added to the source region 108s and the drain region 108s by an impurity addition process. The dopant is added to the gate region 108d.

[0056] When an impurity element is added to an oxide semiconductor film, a bond between a metal element and oxygen in the oxide semiconductor film forms. Alternatively, an impurity element is added to the oxide semiconductor film, and oxygen vacancies are formed. When this occurs, oxygen that has been bonded to a metal element in the oxide semiconductor film is bonded to an impurity element, and the metal element As a result, oxygen is released from the oxide semiconductor film, and oxygen vacancies are formed. The carrier density increases and the conductivity increases.

[0057] As described above, in the semiconductor device of one embodiment of the present invention, By supplying excess oxygen to the insulating film 110, the channel region of the oxide semiconductor film 108 Excess oxygen can be selectively supplied into the insulating film 108i. The source region 108s in contact with the insulating film 116 includes one or more of silicon and fluorine. In addition, it is possible to selectively increase the carrier density in the drain region 108d. As a result, a semiconductor device with excellent electrical characteristics can be provided.

[0058] Next, the components of the semiconductor device shown in FIGS. 1(A), 1(B), and 1(C) will be described in detail.

[0059] [substrate] The substrate 102 can be made of various substrates and is not limited to a specific one. Examples of the substrate include a semiconductor substrate (for example, a single crystal substrate or a silicon substrate), a SO I substrate, glass substrate, quartz substrate, plastic substrate, metal substrate, stainless steel substrate , Stainless steel foil substrate, Tungsten substrate, Tungsten foil a substrate having a fibrous material, a flexible substrate, a laminated film, a paper containing a fibrous material, or a base film Examples of glass substrates include barium borosilicate glass and aluminophore. silicate glass or soda lime glass. Flexible substrate, lamination film Examples of the film and base material are as follows: For example, polyethylene Polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone Plastics such as acrylic are also used. Synthetic resins are also available. Examples include polypropylene, polyester, and polyfluoride. Examples include polyvinyl chloride, polyvinyl chloride, etc. Also, examples include polyamide, polyimide, etc. , aramid, epoxy, inorganic vapor deposition film, paper, etc. In particular, semiconductor substrates, By manufacturing transistors using single crystal substrates or SOI substrates, Small size transformers with low variations in size, shape, and current capability When a circuit is constructed using such transistors, This allows for lower power consumption and higher circuit integration.

[0060] In addition, a flexible substrate is used as the substrate 102, and a transistor is formed directly on the flexible substrate. Alternatively, a separation layer may be provided between the substrate 102 and the transistor. After completing a part or all of the semiconductor device thereon, the semiconductor device is separated from the substrate 102 and In this case, the transistor can be transferred to a substrate with poor heat resistance or a flexible substrate. It can also be transferred onto a flexible substrate. The above-mentioned release layer may be formed of, for example, a tungsten film and an oxide silicon film. Layered structure of inorganic film with silicon film, or organic resin film such as polyimide formed on the substrate The above-described configuration can be used.

[0061] An example of a substrate on which a transistor is transferred is a substrate on which the above-mentioned transistor is formed. In addition to the substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, Lum substrate, stone substrate, wood substrate, fabric substrate (natural fibers (silk, cotton, linen), synthetic fibers (nylon) , polyurethane, polyester) or regenerated fiber (acetate, cupra, rayon, These substrates include recycled polyester, leather substrates, and rubber substrates. By using this, it is possible to form transistors with good characteristics and low power consumption. It can be used to create devices that are less prone to breakage, heat resistant, lightweight, or thin. .

[0062] [First insulating film] The insulating film 104 can be formed by sputtering, CVD, evaporation, pulsed laser deposition ( The insulating film 104 can be formed by appropriately using a photo-induced laser deposition (PLD) method, a printing method, a coating method, or the like. For example, an oxide insulating film or a nitride insulating film may be formed as a single layer or a stacked layer. Note that in order to improve the interface characteristics with the oxide semiconductor film 108, In this case, at least a region in contact with the oxide semiconductor film 108 is preferably formed using an oxide insulating film. It is also preferable to use an oxide insulating film that releases oxygen by heating as the insulating film 104. Then, oxygen contained in the insulating film 104 is transferred to the oxide semiconductor film 108 by heat treatment. It is possible.

[0063] The thickness of the insulating film 104 is 50 nm or more, or 100 nm or more and 3000 nm or less, or The thickness of the insulating film 104 can be set to 200 nm or more and 1000 nm or less. This can increase the amount of oxygen released from the insulating film 104 and also increase the The interface state at the interface with the conductor film 108 and the channel region 1 of the oxide semiconductor film 108 It is possible to reduce the oxygen vacancies contained in 08i.

[0064] The insulating film 104 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide The insulating film may be formed as a single layer or a stacked layer. The layer structure 104 is a stack of a silicon nitride film and a silicon oxynitride film. The insulating film 104 has a laminated structure, with a silicon nitride film on the lower layer and an oxynitride film on the upper layer. By using a silicon film, oxygen can be efficiently introduced into the oxide semiconductor film 108. Cut.

[0065] [Oxide semiconductor film] The oxide semiconductor film 108 is an In-M-Zn oxide (M is Al, Ga, Y, or Sn). The oxide semiconductor film 108 is formed of a metal oxide such as In—Ga oxide, In-Zn oxide may also be used.

[0066] When the oxide semiconductor film 108 is an In-M-Zn oxide, the atomic ratio of In to M is When the sum of In and M is 100 atomic %, In is higher than 25 atomic % , M is less than 75 atomic %, or In is higher than 34 atomic %, and M is 66a less than otomic%.

[0067] The oxide semiconductor film 108 has an energy gap of 2 eV or more, or 2.5 eV or more. It is preferably 3 eV or more.

[0068] The thickness of the oxide semiconductor film 108 is greater than or equal to 3 nm and less than or equal to 200 nm, preferably greater than or equal to 3 nm and less than or equal to 100 nm. 00 nm or less, and more preferably 3 nm or more and 60 nm or less.

[0069] When the oxide semiconductor film 108 is an In-M-Zn oxide, the In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used for this purpose is In≧M, Zn≧M. It is preferable that the atomic ratio of the metal elements in such a sputtering target and In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn =2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2:1:3, I n:M:Zn=3:1:2, In:M:Zn=4:2:4.1, In:M:Zn=5:1 The atomic ratio of the oxide semiconductor film 108 to be formed is preferably 1:7 or the like. Approximately plus or minus 40% of the atomic ratio of the metal elements contained in the sputtering target For example, the atomic ratio of In:Ga is When In:Zn=4:2:4.1 is used, the atomic ratio of the deposited oxide semiconductor film is The Ga:Zn ratio may be approximately 4:2:3. When the atomic ratio of In:Ga:Zn=5:1:7 is used, the oxide semiconductor film to be formed has a thickness of 1000 nm. The atomic ratio may be approximately In:Ga:Zn=5:1:6.

[0070] In addition, the oxide semiconductor film 108 contains silicon or carbon, which is one of the Group 14 elements. When the oxide semiconductor film 108 is filled with oxygen, oxygen vacancies increase and the oxide semiconductor film 108 may become n-type. , especially in the channel region 108i, the concentration of silicon or carbon is set to 2×10 18 a toms / cm 3 or less, or 2 x 10 17 atoms / cm 3 It can be As a result, the transistor has electrical characteristics in which the threshold voltage is positive (normally off characteristics). The concentration of silicon or carbon mentioned above is, for example, Secondary Ion Mass Spectroscopy (SIMS) It can be measured by iontophoresis.

[0071] In addition, in the channel region 108i, alkali metal ions obtained by secondary ion mass spectrometry are The concentration of metal or alkaline earth metal is 1×10 18 atoms / cm 3 Less than or equal to 2 x1016 atoms / cm 3 They can be: alkali metals and alkaline earths When a metal bonds with an oxide semiconductor, it can generate carriers, which can cause the transistor to turn off. Therefore, the current may increase. It is preferable to reduce the concentration of alkaline earth metals. It has electrical characteristics in which low voltages become positive (also called normally-off characteristics).

[0072] Furthermore, if nitrogen is contained in the channel region 108i, electrons, which act as carriers, are generated. The carrier density increases and the semiconductor may become n-type. Therefore, the transistor using the thin film tends to be normally on. In the 08i, it is preferable to reduce nitrogen as much as possible. For example, secondary ions The nitrogen concentration obtained by mass spectrometry was 5 × 10 18 atoms / cm 3 If we do the following, stomach.

[0073] In addition, by reducing the impurity elements in the channel region 108i, Therefore, in the channel region 108i, the carrier density can be reduced. Carrier density is 1×10 17 / cm 3 or less, or 1 x 10 15 / cm 3 Less than or equal to 1 x10 13 / cm 3 or less, or 1 x 10 11 / cm 3 It can be as follows:

[0074] The channel region 108i is an oxide semiconductor film having a low impurity concentration and a low density of defect states. By using the above, a transistor with better electrical characteristics can be manufactured. Here, a low impurity concentration and a low defect level density (few oxygen vacancies) are referred to as high purity pure silicon. Alternatively, it is called genuine or substantially genuine. A highly intrinsic or substantially highly purified intrinsic oxide semiconductor has few carrier generation sources, Therefore, the carrier density can be reduced in the oxide semiconductor film. The transistor in which the hole region is formed has electrical characteristics in which the threshold voltage is positive (normal Also known as off-state characteristics.) Also, high purity intrinsic or substantially high purity intrinsic Since the oxide semiconductor film has a low density of defect states, the oxide semiconductor film may also have a low density of trap states. Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a significantly low off-state current. Therefore, a channel region is formed in the oxide semiconductor film, and a small characteristic can be obtained. Such a transistor may have little fluctuation in electrical characteristics and may be a highly reliable transistor. do.

[0075] On the other hand, the source region 108s and the drain region 108d are in contact with the insulating film 116. The source region 108s and the drain region 108d are in contact with the insulating film 116. 116 to the source region 108s and the drain region 108d, and one or more of hydrogen, nitrogen, and fluorine are The carrier density is increased because of the addition of the above.

[0076] The oxide semiconductor film 108 may have a non-single-crystal structure. CAAC-OS (C Axis Aligned Crystalline Oxide) ide Semiconductor), polycrystalline structure, microcrystalline structure (described later), or amorphous Among non-single crystal structures, the amorphous structure has the highest defect level density, -OS has the lowest defect level density.

[0077] Note that the oxide semiconductor film 108 may have an amorphous structure, a microcrystalline structure, or a polycrystalline structure. a monolayer film having two or more of a CAAC-OS region, a CAAC-OS region, and a single-crystal structure region, or The film may have a laminated structure.

[0078] In the oxide semiconductor film 108, the channel region 108i and the source region 108s The crystallinity of the oxide semiconductor film 108c may be different from that of the drain region 108d. 108, the source region 108s and the drain region 108i are closer to each other than the channel region 108i. The source region 108s and the drain region 108d may have lower crystallinity. When an impurity element is added to the source region 108s and the drain region 108d, This is because damage occurs and the crystallinity decreases.

[0079] [Second insulating film] The insulating film 110 functions as a gate insulating film of the transistor 100. 10 has a function of supplying oxygen to the oxide semiconductor film 108, particularly to the channel region 108i. For example, the insulating film 110 may be a single layer or a stacked layer of an oxide insulating film or a nitride insulating film. In order to improve the interface characteristics with the oxide semiconductor film 108, In the insulating film 110, a region in contact with the oxide semiconductor film 108 is at least an oxide insulating film. The insulating film 110 is preferably formed using a film such as silicon oxide or oxynitride. Silicon oxide, silicon nitride, silicon nitride, or the like may be used.

[0080] The thickness of the insulating film 110 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less. The thickness can be 10 nm or less, or 10 nm or more and 250 nm or less.

[0081] Furthermore, it is preferable that the insulating film 110 has few defects. The signal observed by ESR (Electron Spin Resonance) For example, the signal above is observed at a g value of 2.001. The signal caused by the E' center is shown. The insulating film 110 is caused by the spin of the signal caused by the E' center. The density is 3×10 17 spins / cm 3 Less than or equal to 5 x 10 16 spins / cm 3 A silicon oxide film or a silicon oxynitride film as described below may be used.

[0082] In addition to the above signals, the insulating film 110 also contains signals due to nitrogen dioxide (NO2). The signal is divided into three signals depending on the nuclear spin of N. The g value of each is between 2.037 and 2.039 (first signal). , g value is 2.001 or more and 2.003 or less (second signal), and g value is 1.96 It is observed between 4 and 1.966 (referred to as the third signal).

[0083] For example, the insulating film 110 may be a film having a spin density of a signal caused by nitrogen dioxide (NO2). But 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 Less than It is preferable to use a velum.

[0084] In addition, nitrogen oxides (NO x , x is greater than 0 and less than or equal to 2, or 1 or more and 2 or less, typically NO or NO2) forms a level in the insulating film 110. The level is located within the energy gap of the oxide semiconductor film 108. When nitrogen oxide diffuses to the interface between the insulating film 110 and the oxide semiconductor film 108, the level Electrons may be trapped on the insulating film 110 side. However, the oxide semiconductor film 108 is not formed in the oxide semiconductor film 108. This shifts the low voltage in the positive direction.

[0085] Therefore, a film containing a small amount of nitrogen oxide is used as the insulating film 110. Therefore, if a film that releases less nitrogen oxide is used as the insulating film 110, the threshold of the transistor This can reduce the shift in the low voltage.

[0086] As an insulating film that emits a small amount of nitrogen oxide, for example, a silicon oxynitride film may be used. The silicon oxynitride film can be analyzed by thermal desorption spectroscopy (TDS). Desorption Spectroscopy (DSE) showed that the amount of nitrogen oxides released was This membrane releases a large amount of ammonia, typically 1×10 18 pieces / cm 3 5x10 or more 19 pieces / cm 3 The amount of ammonia released is as follows: The temperature of the heat treatment in TDS is 50°C or more and 650°C or less, or 50°C or more and 550°C or less. The total amount is within the range below.

[0087] Nitrogen oxides react with ammonia and oxygen during the heat treatment, resulting in the release of ammonia. By using an insulating film with a high elution amount, nitrogen oxides are reduced.

[0088] When the insulating film 110 was measured by SIMS, the nitrogen concentration in the film was 6×10 20 ato ms / cm 3 It is preferable that the following is true:

[0089] The insulating film 110 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate (HfAl x O y N z ), and high-k materials such as hafnium oxide can be used to The gate leakage of the transistor can be reduced.

[0090] [Metal oxide film] The metal oxide film 112 contains one or more of In, Zn, Al, Ga, Y, and Sn. Specific examples of materials that can be used for the metal oxide film 112 include indium oxide and zinc oxide. , aluminum oxide, gallium oxide, yttrium oxide, tin oxide, In-Zn oxide, Examples of the oxide include In-Ga oxide, In-Sn oxide, and In-Ga-Zn oxide. When an insulator or a semiconductor is used as the metal oxide film 112, aluminum oxide Furthermore, when a semiconductor or a conductor is used as the metal oxide film 112, In this case, it is preferable to use In-Ga-Zn oxide.

[0091] The metal oxide film 112 may be formed by sputtering or atomic layer deposition (ALD). It is preferable to use a film forming method. After the metal oxide film 112 is formed, oxygen addition treatment is performed. By the oxygen addition treatment, excess oxygen is added to the metal oxide film 112 and the insulating film 110. The oxygen addition process may be carried out by ion implantation, ion doping, or the like. The method may be a ion implantation method, a plasma immersion ion implantation method, a plasma treatment, or the like.

[0092] [Third insulating film] The insulating film 116 contains one or more of nitrogen, hydrogen, and fluorine. For example, a nitride insulating film can be used. Examples of the nitride insulating film include silicon nitride and silicon nitride oxide. The insulating layer can be formed using silicon nitride, silicon fluoride, silicon fluoride nitride, or the like. The hydrogen concentration in the film 116 is 1×10 22 atoms / cm 3 It is preferable that it is more than The insulating film 116 covers the source region 108s and the drain region 108s of the oxide semiconductor film 108. Therefore, the source region 108s and the drain region 108d are in contact with the insulating film 116. The impurity (nitrogen, hydrogen, or fluorine) concentration in the source region 108d becomes high, This can increase the carrier density in the drain region 108s and the drain region 108d.

[0093] In this embodiment, the insulating film 116 is made of a material containing silicon tetrafluoride (SiF4) and nitrogen ( N2) is used as a raw material gas to form a silicon fluoride nitride film. Silicon fluoride oxide (SiF4) and dinitrogen monoxide (N2O) are used as raw material gases. A coating film may also be formed.

[0094] [Fourth insulating film] The insulating film 118 is formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. The insulating film 118 can be made of, for example, silicon oxide, silicon oxynitride, or silicon nitride. Silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide or G The film may be made of α-Zn oxide or the like, and may be provided as a single layer or a multilayer.

[0095] The insulating film 118 functions as a barrier film against hydrogen, water, and the like from the outside. It is preferable that

[0096] The thickness of the insulating film 118 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm or less. m or less.

[0097] [Conductive film] The conductive films 114, 120a, and 120b can be formed by sputtering, vacuum deposition, pulse deposition, or the like. It can be formed by using a laser deposition (PLD) method, a thermal CVD method, etc. 114, 120a, 120b may be, for example, aluminum, chromium, copper, tantalum, Metal elements selected from titanium, molybdenum, nickel, iron, cobalt, and tungsten, or or an alloy containing the above-mentioned metal elements as components, or an alloy combining the above-mentioned metal elements, etc. It can also be formed from one or more of manganese and zirconium. A selected metal element may be used. For example, a silicon-containing aluminum film may be used. Single layer structure, single layer structure of copper film containing manganese, two layer structure with titanium film laminated on aluminum film Structure: Two-layer structure with titanium film stacked on titanium nitride film, tungsten film on titanium nitride film a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film; Two-layer structure with copper film on top of manganese-containing copper film, two-layer structure with copper film on top of titanium film A two-layer structure, a titanium film and an aluminum film laminated on top of the titanium film, A three-layer structure in which a titanium film is formed on top, a copper film is layered on top of a copper film containing manganese, and There are also three-layer structures in which a copper film containing manganese is formed on the aluminum. One or more metals selected from the group consisting of tantalum, tungsten, molybdenum, chromium, neodymium, and scandium Alternatively, an alloy film or a nitride film made by combining a plurality of layers may be used.

[0098] The conductive films 114, 120a, and 120b are made of indium tin oxide (InT in Oxide (ITO), indium oxide containing tungsten oxide, tungsten oxide Indium zinc oxide containing titanium dioxide, indium oxide containing titanium dioxide, Indium tin oxide containing silicon, indium zinc oxide, indium tin oxide containing silicon (I By using a conductive material with light transmission such as n-Sn-Si oxide (also called ITSO), Furthermore, it is possible to form a laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element. It can also be done as follows.

[0099] Alternatively, the conductive film 114 may be formed using the above-described oxide conductor (OC). The conductive film 114 may have a single layer structure of an oxide conductor (OC), a single layer structure of a metal film, or Examples include a laminated structure of an oxide conductor (OC) and a metal film.

[0100] Note that the conductive film 114 may have a single layer structure of a metal film having a light-shielding property or an oxide conductor ( When a laminated structure of an OC and a metal film having a light-shielding property is used, a layer formed below the conductive film 114 This is preferable because the channel region 108i can be shielded from light.

[0101] The thickness of the conductive films 114, 120a, and 120b is 30 nm or more and 500 nm or less. Alternatively, it can be 100 nm or more and 400 nm or less.

[0102] <1-2. Configuration example 2 of semiconductor device> Next, regarding the configuration different from the semiconductor device shown in FIGS. 1(A), 1(B), and 1(C), the semiconductor device shown in FIG. Explain using B)(C).

[0103] 2A is a top view of a transistor 100A, and FIG. 2B is a cross-sectional view of a point in FIG. 2A. 2(C) is a cross-sectional view taken along the dashed line X1-X2, and FIG. 2(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 2(A). FIG.

[0104] The transistor 100A shown in FIGS. 2(A), 2(B), and 2(C) is a conductive layer formed on a substrate 102. The conductive film 106, the insulating film 104 on the conductive film 106, and the oxide semiconductor film 10 on the insulating film 104. 8, an insulating film 110 on the oxide semiconductor film 108, and a metal oxide film 112 on the insulating film 110. , the conductive film 114 on the metal oxide film 112, the insulating film 104, the oxide semiconductor film 108, and the conductive film 114 on the metal oxide film 112. The oxide semiconductor film 108 has an insulating film 116 on the conductive film 114. 4, a channel region 108i that overlaps with the insulating film 116, a source region 108s that contacts with the insulating film 116, and and a drain region 108d in contact with the film 116.

[0105] The transistor 100A has the same structure as the transistor 100 described above, but also has a conductive film 106 and a , and an opening 143.

[0106] The opening 143 is provided in the insulating films 104 and 110 and the metal oxide film 112 . In addition, the conductive film 106 is electrically connected to the conductive film 114 through the opening 143 . Therefore, the same potential is applied to the conductive film 106 and the conductive film 114. Alternatively, different potentials may be applied to the conductive films 106 and 114 without providing the potential difference. The conductive film 106 may be used as a light-shielding film without providing the opening 143. By forming the 06 from a light-shielding material, the channel region 108i is irradiated from below. Note that the conductive film 106 can be formed by using the conductive film 114. The same materials as those capable of being used can be used.

[0107] In the case of the transistor 100A, the conductive film 106 is a first gate electrode ( The conductive film 114 functions as a second gate electrode ( The insulating film 104 functions as a first gate electrode. The insulating film 110 functions as a first gate insulating film. do.

[0108] In this way, the transistor 100A shown in FIGS. 2(A), 2(B), and 2(C) has the same structure as the transistor 100A described above. Unlike the transistor 100, the oxide semiconductor film 108 has conductive layers above and below it that function as gate electrodes. As shown in the transistor 100A, the semiconductor The device may be provided with multiple gate electrodes.

[0109] As shown in FIG. 2C, the oxide semiconductor film 108 functions as a first gate electrode. and a conductive film 114 functioning as a second gate electrode. The gate electrode is sandwiched between two conductive films that function as gate electrodes.

[0110] The length of the conductive film 114 in the channel width direction is equal to that of the oxide semiconductor film 108. The length of the oxide semiconductor film 108 in the channel width direction is longer than the length of the insulating film 110. The conductive film 114 is covered with the metal oxide film 112. The opening 106 is formed in the insulating film 104, the insulating film 110, and the metal oxide film 112. 43, one of the side surfaces of the oxide semiconductor film 108 in the channel width direction is It faces the conductive film 114 via the insulating film 110 .

[0111] In other words, in the channel width direction of the transistor 100A, the conductive film 106 and the conductive film 108 are The film 114 is formed in the opening 111 provided in the insulating film 104, the insulating film 110, and the metal oxide film 112. 43 and through the insulating film 104, the insulating film 110, and the metal oxide film 112. The oxide semiconductor film 108 is surrounded by the insulating film 104 .

[0112] With this configuration, the oxide semiconductor film 10 included in the transistor 100A 8 is a conductive film 106 functioning as a first gate electrode and a conductive film 108 functioning as a second gate electrode. The transistor 100A can be electrically surrounded by the electric field of the conductive film 114. As described above, a channel region is formed by the electric fields of the first gate electrode and the second gate electrode. The device structure of the transistor that electrically surrounds the oxide semiconductor film is called the Surround This can be called an ed channel (S-channel) structure.

[0113] Since the transistor 100A has an S-channel structure, the conductive film 106 or The conductive film 114 effectively applies an electric field for inducing a channel to the oxide semiconductor film 108. This improves the current driving capability of the transistor 100A, resulting in a high on-state current. It is also possible to increase the on-current, which allows The transistor 100A can be miniaturized. The semiconductor film 108 is surrounded by the conductive film 106 and the conductive film 114. Therefore, the mechanical strength of the transistor 100A can be increased.

[0114] Note that the opening in the oxide semiconductor film 108 in the channel width direction of the transistor 100A An opening different from opening 143 may be formed on the side where portion 143 is not formed.

[0115] As shown in the transistor 100A, a transistor is formed with a semiconductor film sandwiched therebetween. When a pair of gate electrodes are present, one gate electrode is connected to signal A and the other gate is connected to signal B. A fixed potential Vb may be applied to the gate electrodes. A signal B may be applied to one of the gate electrodes. A fixed potential V a, and the other gate electrode may be given a fixed potential Vb.

[0116] The signal A is, for example, a signal for controlling the conductive state or the non-conductive state. It is a digital signal that takes two types of potential: potential V1 or potential V2 (V1>V2). For example, the potential V1 may be a high power supply potential and the potential V2 may be a low power supply potential. Signal A may be an analog signal.

[0117] The fixed potential Vb is, for example, a potential for controlling the threshold voltage VthA of a transistor. The fixed potential Vb may be the potential V1 or the potential V2. This is preferable because it is not necessary to provide a separate potential generating circuit for generating the potential Vb. The fixed potential Vb may be a potential different from the potential V1 or the potential V2. As a result, the gate-source voltage V The drain current when gs is 0V is reduced, and the leakage current of the circuit having the transistor is reduced. For example, the fixed potential Vb may be set lower than the low power supply potential. In some cases, the threshold voltage VthA can be lowered by increasing the fixed potential Vb. As a result, the drain current is improved when the gate-source voltage Vgs is at a high power supply potential, For example, the fixed potential Vb can be set to a low voltage. It may be higher than the source potential.

[0118] The signal B is, for example, a signal for controlling the conductive state or the non-conductive state. It is a digital signal that takes two types of potential: potential V3 or potential V4 (V3>V4). For example, the potential V3 may be a high power supply potential and the potential V4 may be a low power supply potential. Signal B may be an analog signal.

[0119] If signal A and signal B are both digital signals, signal B will have the same digital value as signal A. In this case, the on-current of the transistor is improved, and the transistor In this case, the potential V1 and the potential V2 of the signal A can be increased. The potential V2 may be different from the potentials V3 and V4 in the signal B. For example, The gate insulating film corresponding to the gate to which signal B is input is the gate insulating film corresponding to the gate to which signal A is input. If the gate insulating film is thicker than the gate insulating film, the potential amplitude of signal B (V3-V4) is It may be set larger than (V1-V2). By doing so, the transistor conduction state or The influence of signal A on the non-conducting state is set to the same degree as the influence of signal B on the non-conducting state. It may be possible to do this.

[0120] If signal A and signal B are both digital signals, signal B has a different digital value than signal A. In this case, the control of the transistor is divided into signals A and B. For example, if a transistor is In the case of a channel type, when signal A is at potential V1 and signal B is at potential V3, When only signal A is in a conducting state, or when signal B is at potential V4, If only one transistor is non-conductive, it is possible to use a single transistor to perform functions such as a NAND circuit or a NOR circuit. In addition, the signal B is a signal for controlling the threshold voltage VthA. For example, signal B may be a signal during which a circuit having a transistor is operating. The signal B may be a signal whose potential is different between the period when the circuit is in operation and the period when the circuit is not in operation. In this case, signal B may be a signal with a different potential depending on the operating mode of the circuit. In some cases, the potential may not be switched as frequently as

[0121] If both signal A and signal B are analog signals, signal B is an analog signal with the same potential as signal A. analog signal obtained by multiplying the potential of signal A by a constant, or by adding a constant to the potential of signal A Alternatively, it may be an analog signal obtained by subtracting the signal. In this case, the on-current of the transistor is The signal B is a signal A may be a different analog signal. In this case, the transistor control is performed by signal A and signal B can be performed separately, which may result in higher functionality.

[0122] Signal A may be a digital signal and signal B may be an analog signal. Signal B may be an analog signal and signal B may be a digital signal.

[0123] When a fixed potential is applied to both gate electrodes of a transistor, the transistor is connected to a resistor element. For example, a transistor can function as an n-channel transistor. In the case of a transistor type, the fixed potential Va or the fixed potential Vb can be increased (decreased). In some cases, the effective resistance of the resistor can be lowered (or raised). By making both Vb high (low), a transistor with only one gate In some cases, a lower (higher) effective resistance may be obtained.

[0124] The other configurations of the transistor 100A are the same as those of the transistor 100 shown above. and has the same effect.

[0125] <1-3. Configuration example 3 of semiconductor device> Next, regarding the semiconductor device having a different structure from that shown in FIGS. 2(A), 2(B), and 2(C), the semiconductor device shown in FIGS. 3 to 9 will be described. This will be explained using:

[0126] 3A and 3B are cross-sectional views of the transistor 100B, and FIGS. 4A and 4B are cross-sectional views of the transistor 100B. 5(A)(B), 6(A)(B), and 7(B) are cross-sectional views of the transistor 100C. 8A and 8B are cross-sectional views of the transistor 100D, and FIG. 9(A) and 9(B) are cross-sectional views of the transistor 100F. In addition, the transistor 100B, the transistor 100C, the transistor 100D, The top view of the transistor 100E and the transistor 100F is similar to that of the transistor shown in FIG. Since it is the same as the resistor 100A, the explanation will be omitted here.

[0127] The transistor 100B shown in FIGS. 3A and 3B is similar to the transistor 100A shown above. The shapes of the conductive film 114, the metal oxide film 112, and the insulating film 110 are different. The transistor 100A has a conductive film 114, a metal oxide film 112, and an insulating film 110 that are tapered. On the other hand, the transistor 100B has a conductive film 114, a metal oxide film 112, and an insulating film 114. The insulating film 110 is rectangular. In the cross section in the panel length (L) direction, the upper end of the conductive film 114 is closer to the lower end of the insulating film 110 than the In other words, the side edge of the insulating film 110 is formed on the inner side than the side edge of the conductive film 114. On the other hand, the transistor 100B is located on the outside in the direction of the channel length (L) of the transistor. In the cross section in the direction perpendicular to the plane, the upper end of the conductive film 114 and the lower end of the insulating film 110 are at approximately the same position. is formed.

[0128] For example, the conductive film 114, the metal oxide film 112, and the insulating film 110 are processed using the same mask. Then, the structure of the transistor 100B is obtained by processing them all at once using a dry etching method. It can be said that:

[0129] The structure of the transistor 100A improves the coverage of the insulating film 116. On the other hand, by adopting a configuration like the transistor 100B, the source region 10 The ends of the 8s and drain regions 108d and the conductive film 114 are formed at approximately the same positions. This is preferable.

[0130] The transistor 100C shown in FIGS. 4A and 4B is similar to the transistor 100A shown above. The shapes of the conductive film 114, the metal oxide film 112, and the insulating film 110 are different. The transistor 100C has a conductive film 114, a metal oxide film 112, and an insulating film 110 that are inversely tapered. In other words, the transistor 100C has a channel length (L) direction In the cross section, the upper end of the conductive film 114 is formed outside the lower end of the insulating film 110. .

[0131] For example, the conductive film 114, the metal oxide film 112, and the insulating film 110 are processed using the same mask. Then, the structure of the transistor 100C is formed by processing them all at once using a wet etching method. It can be constructed as follows.

[0132] In addition, by configuring the transistor 100C, a conductive layer that functions as a gate electrode can be formed. A part of the source region 108s and the drain region 108d is provided inside the conductive film 114. Note that the conductive film 114 and the source region 108s overlap with each other, and the conductive film 114 and the The region where the drain region 108d overlaps is called an overlap region (also called an LOV region). The Lov region is a region overlapping the conductive film 114 that functions as a gate electrode. The resistance of the LOV region is lower than that of the channel region 108i. By doing so, the channel region 108i, the source region 108s, and the drain region 108d Since no high-resistance region is formed between the become.

[0133] The transistor 100D shown in FIGS. 5(A) and 5(B) is similar to the transistor 100A shown above. The shapes of the conductive film 114, the metal oxide film 112, and the insulating film 110 are different. The transistor 100D has a conductive film 114 in a cross section in the channel length (L) direction of the transistor. The lower end of the conductive film 114 is located at a different position from the upper end of the metal oxide film 112. It is formed inside the upper end of the metal oxide film 112 .

[0134] For example, the structure of the transistor 100D includes a conductive film 114, a metal oxide film 112, and The conductive film 110 and the insulating film 110 can be processed using the same mask. A mask is formed on the conductive film 114, and the conductive film 114 is etched by wet etching using the mask. Thereafter, the metal oxide film 112 and the insulating film 110 are processed by dry etching. This results in the structure of the transistor 100D.

[0135] In addition, by using the structure of the transistor 100D, the region 1 The region 108f may be formed between the channel region 108i and the source region 108i. 108s and between the channel region 108i and the drain region 108d.

[0136] The region 108f functions as either a high resistance region or a low resistance region. The resistance region has a resistance equivalent to that of the channel region 108i and is a conductive region that functions as a gate electrode. This is the region where the film 114 does not overlap. When the region 108f is a high resistance region, the region 108f is This functions as a so-called offset region. When the region 108f functions as an offset region, In order to suppress a decrease in the on-state current of the transistor 100D, the channel length (L ) direction, the region 108f may be set to 1 μm or less.

[0137] The low resistance region is a region having a resistance lower than that of the channel region 108i and a resistance lower than that of the source region 10 The region 108f is a low-resistance region. In this case, the region 108f is a so-called LDD (Lightly Doped Drain) region. When the region 108f functions as an LDD region, the drain This allows for the relaxation of the electric field in the drain region, thereby reducing the threshold voltage of the transistor due to the electric field in the drain region. This can reduce fluctuations in the value voltage.

[0138] When the region 108f is used as an LDD region, for example, the insulating film 116 is 8f is supplied with one or more of nitrogen, hydrogen, and fluorine, or the insulating film 110 and the metal oxide film By using 112 as a mask, impurity elements are added from above the metal oxide film 112, The impurity element is added to the oxide semiconductor film 108 through the metal oxide film 112 and the insulating film 110. As a result, a region 108f is formed.

[0139] The transistor 100D shown in FIGS. 6A and 6B has the same structure as the transistors shown in FIGS. The transistor 100D shown in FIGS. In the cross section of the transistor in the channel length (L) direction, the lower end of the conductive film 114 and the metal oxide The lower end of the conductive film 114 is located at a different position from the lower end of the insulating film 110. , is formed inside the upper end of the metal oxide film 112, and the lower end of the metal oxide film 112 is an insulating It is formed inside the upper end of the film 110 .

[0140] The transistor 100D shown in FIGS. 7A and 7B has the same structure as the transistors shown in FIGS. The transistor 100D shown in FIGS. In the cross section of the transistor in the channel length (L) direction, the lower end of the conductive film 114 and the metal oxide The metal oxide film 112 is formed at approximately the same position as the upper end of the insulating film 11. It is formed inside the upper end of 0.

[0141] The transistor 100E shown in FIGS. 8A and 8B is the same as the transistor 100A shown above. The metal oxide film 112 and the insulating film 110 have different shapes. In the cross section of the transistor in the channel length (L) direction, the lower end of the conductive film 114 is made of gold. It is formed outside the upper end of the metal oxide film 112 .

[0142] For example, the structure of the transistor 100E includes a conductive film 114, a metal oxide film 112, and , and the insulating film 110 can be formed by processing them using the same mask. A mask is formed on the conductive film 114, and the conductive film 114 is removed by dry etching using the mask. Then, the upper surface of the metal oxide film 112 and the insulating film 110 is processed using an etchant or the like. By etching the transistor 1 and etching the side surface (side etching), 00E structure.

[0143] In addition, by configuring the transistor 100E, the same A Lov region can be provided in the

[0144] The transistor 100F shown in FIGS. 9A and 9B has a characteristic similar to that of the transistor 100A shown previously. In contrast, the insulating film 122 that functions as a planarizing insulating film is provided on the insulating film 118. The other configurations are the same as those of the transistor 100A shown above. , has a similar effect.

[0145] The insulating film 122 has a function of planarizing unevenness caused by transistors and the like. The film 122 may be made of an inorganic or organic material as long as it is insulating. The inorganic material may be a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a nitride film, or the like. Examples of the organic material include a silicon film, an aluminum oxide film, and an aluminum nitride film. Examples of the material include photosensitive resin materials such as acrylic resin and polyimide resin. .

[0146] In addition, in FIGS. 9A and 9B, the shape of the opening in the insulating film 122 is However, the present invention is not limited to this. For example, the opening 141 The openings 141a and 141b may have the same shape as the openings 141a and 141b, or may have a shape smaller than the openings 141a and 141b. stomach.

[0147] 9(A) and 9(B), conductive films 120a and 120b are provided on an insulating film 122. However, the present invention is not limited to this example. For example, a conductive film 120 may be formed on an insulating film 118. Alternatively, an insulating film 122 may be provided on the conductive films 120a and 120b. good.

[0148] <1-4. Configuration example 4 of semiconductor device> Next, regarding the configuration different from that of the semiconductor device shown in FIGS. 2(A), 2(B), and 2(C), FIGS. 10 to 13 are described. 13 will be used to explain.

[0149] 10(A) and 10(B) are cross-sectional views of the transistor 100G, and FIGS. 11(A) and 11(B) are cross-sectional views of the transistor 100G. 12A and 12B are cross-sectional views of the transistor 100J. 13A and 13B are cross-sectional views of the transistor 100K. Transistor 100G, transistor 100H, transistor 100J, and transistor The top view of the transistor 100K is the same as that of the transistor 100A shown in FIG. , the explanation here will be omitted.

[0150] Transistor 100G, transistor 100H, transistor 100J, and transistor The transistor 100K differs from the transistor 100A described above in the structure of the oxide semiconductor film 108. The other configurations are the same as those of the transistor 100A shown above, and This has the effect of:

[0151] The oxide semiconductor film 108 included in the transistor 100G illustrated in FIGS. The oxide semiconductor film 108_1 on the insulating film 104 and the oxide semiconductor film 108_1 on the oxide semiconductor film 108_1 an oxide semiconductor film 108_2 and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2; The channel region 108i, the source region 108s, and the drain region 108d are The oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 108_3 are respectively It has a three-layer laminated structure of 108_3.

[0152] The oxide semiconductor film 108 included in the transistor 100H illustrated in FIGS. The oxide semiconductor film 108_2 on the insulating film 104 and the oxide semiconductor film 108_2 The semiconductor layer 108_3 includes a channel region 108i, a source region 108s, and The drain region 108d is formed by the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3. It has a two-layer laminated structure of 08_3.

[0153] The oxide semiconductor film 108 included in the transistor 100J illustrated in FIGS. 12A and 12B is an insulating film. The oxide semiconductor film 108_1 on the insulating film 104 and the oxide semiconductor film 108_1 on the oxide semiconductor film 108_1 an oxide semiconductor film 108_2 and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2; The channel region 108i is formed by the oxide semiconductor film 108_1 and the oxide semiconductor film 108 The source region 108s and the oxide semiconductor film 108_2 are stacked. The drain region 108d is formed of the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2, respectively. The transistor 100J has a two-layer stack structure of 108_2. In the cross section in the direction perpendicular to the plane, the oxide semiconductor film 108_3 is It covers the side surface of the semiconductor film 108_2.

[0154] The oxide semiconductor film 108 included in the transistor 100K illustrated in FIGS. The oxide semiconductor film 108_2 on the insulating film 104 and the oxide semiconductor film 108_2 The channel region 108i includes the oxide semiconductor film 108_3. 2 and an oxide semiconductor film 108_3, and The drain region 108d has a single-layer structure of the oxide semiconductor film 108_2. In the cross section of the transistor 100K in the channel width (W) direction, the oxide semiconductor film 108 The oxide semiconductor film 108_3 covers the side surface of the oxide semiconductor film 108_2.

[0155] The side surface or the vicinity of the channel region 108i in the channel width (W) direction is processed. Damage in the Therefore, even if the channel region 108i is substantially intrinsic, When stress such as an electric field is applied, the channel width ( The side surface or its vicinity in the W direction is activated and tends to become a low-resistance (n-type) region. When the side surface of the channel region 108i in the channel width (W) direction or its vicinity is an n-type region, Since the n-type region serves as a path for carriers, a parasitic channel may be formed.

[0156] Therefore, in the transistor 100J and the transistor 100K, the channel region The channel region 108i has a stacked structure, and the side surface of the channel region 108i in the channel width (W) direction is By using this structure, the side surface of the channel region 108i is covered with one of the layers. or suppressing defects on or near the side of the channel region 108i. This makes it possible to reduce the adhesion of impurities to the substrate.

[0157] <1-5. Band structure> Here, the insulating film 104, the oxide semiconductor films 108_1, 108_2, and 108_3, and the insulating film 104 The band structure of the insulating film 110, the insulating film 104, the oxide semiconductor films 108_2 and 108_ The band structure of the insulating film 110 will be described with reference to FIG. , the band structure in the channel region 108i.

[0158] FIG. 14A shows the insulating film 104, the oxide semiconductor films 108_1, 108_2, and 108_3. 1 and the insulating film 110. 4(B) shows the insulating film 104, the oxide semiconductor films 108_2 and 108_3, and the insulating film 110. This is an example of a band structure in the film thickness direction of a laminated structure having the following structure. For ease of understanding, the insulating film 104, the oxide semiconductor films 108_1, 108_2, and 108_3, and The energy level (Ec) of the bottom of the conduction band of the insulating film 110 is shown.

[0159] In addition, in FIG. 14(A), silicon oxide films are used as the insulating films 104 and 110, and oxide semiconductor films are used. The metal oxide film 108_1 has an atomic ratio of In:Ga:Zn=1:3:2. An oxide semiconductor film formed using a metal target was used as the oxide semiconductor film 108_2. A metal oxide target with an atomic ratio of In:Ga:Zn=4:2:4.1 was used. The oxide semiconductor film 108_3 is formed by using an oxide semiconductor film formed by adding an atom of a metal element. Oxide formed using a metal oxide target with a numerical ratio of In:Ga:Zn=1:3:2 FIG. 1 is a band diagram of a configuration using a semiconductor film.

[0160] In addition, in FIG. 14(B), silicon oxide films are used as the insulating films 104 and 110, and oxide semiconductor films are used. The conductor film 108_2 is made of a metal having an atomic ratio of In:Ga:Zn=4:2:4.1. The oxide semiconductor film 108_3 is formed using an oxide semiconductor film formed using an oxide target. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:3:2 was used. FIG. 10 is a band diagram of a structure using an oxide semiconductor film formed by

[0161] As shown in FIG. 14A, in the oxide semiconductor films 108_1, 108_2, and 108_3, The energy level at the bottom of the conduction band changes gradually as shown in Figure 14(B). As shown, the energy level of the conduction band minimum in the oxide semiconductor films 108_2 and 108_3 is In other words, it can be said that the change is continuous or that the connection is continuous. In order to have such a band structure, the oxide semiconductor film 108_1 and the oxide semiconductor the interface between the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3, or At the interface, impurities that form defect levels such as trap centers and recombination centers Assume it does not exist.

[0162] In order to form a continuous junction in the oxide semiconductor films 108_1, 108_2, and 108_3, A multi-chamber deposition system (sputtering system) equipped with a load lock chamber was used. It is necessary to laminate each film successively without exposing it to the atmosphere.

[0163] By using the structure shown in FIGS. 14A and 14B, the oxide semiconductor film 108_2 is formed as a well. ) and in the transistor using the above stacked structure, the channel region is an oxide semiconductor film It can be seen that it is formed at 108_2.

[0164] Note that by providing the oxide semiconductor films 108_1 and 108_3, the trap states can be reduced to oxide. The insulating layer 108 can be placed away from the nitride semiconductor film 108_2.

[0165] In addition, the trap states are in the conduction band of the oxide semiconductor film 108_2 which functions as a channel region. The energy level at the bottom (Ec) can be farther from the vacuum level, and the trap level The accumulation of electrons in the trap level makes it easier for negative electrons to accumulate. This results in a constant charge, and the threshold voltage of the transistor shifts in the positive direction. The trap level is higher than the energy level (Ec) of the conduction band minimum of the oxide semiconductor film 108_2. It is preferable to configure the trap level so that it is closer to the vacuum level. This makes it difficult for electrons to accumulate at the gate electrode, which makes it possible to increase the on-state current of the transistor. Together, the field effect mobility can be increased.

[0166] The oxide semiconductor films 108_1 and 108_3 are more conductive than the oxide semiconductor film 108_2. The energy level of the bottom of the conduction band is close to the vacuum level. The energy levels of the conduction band minimums of the oxide semiconductor films 108_1 and 108_3 are The difference between the energy levels is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, That is, the electron affinity of the oxide semiconductor films 108_1 and 108_3 is The difference between the electron affinity of the oxide semiconductor film 108_2 and the electron affinity of the oxide semiconductor film 108_2 is 0.15 eV or more, or 0. It is 5 eV or more and 2 eV or less, or 1 eV or less.

[0167] With such a structure, the oxide semiconductor film 108_2 serves as a main current path. That is, the oxide semiconductor film 108_2 functions as a channel region. The films 108_1 and 108_3 function as oxide insulating films. The films 108_1 and 108_3 constitute the oxide semiconductor film 108_2 in which a channel region is formed. It is preferable to use an oxide semiconductor film formed of one or more metal elements. By using such a structure, the interface between the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2, Alternatively, the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3 may be diffused at the interface between them. Therefore, the movement of carriers is not hindered at the interface, and therefore, The field effect mobility of the transistor increases.

[0168] The oxide semiconductor films 108_1 and 108_3 function as part of a channel region. To prevent this, a material with sufficiently low electrical conductivity must be used. The conductive films 108_1 and 108_3 are each made of oxide insulating material in view of their physical properties and / or functions. Alternatively, the oxide semiconductor films 108_1 and 108_3 may be formed by using a material having a high electron affinity (vacuum the energy level difference between the conduction band minimum and the conduction band minimum) is smaller than that of the oxide semiconductor film 108_2, The energy level of the conduction band minimum is the same as that of the oxide semiconductor film 108_2. The material with a difference (band offset) is used. In order to suppress the difference in threshold voltage depending on the thickness of the oxide semiconductor film 108, The energy levels of the conduction band minimums of the oxide semiconductor film 108_1 and 108_3 are higher than the conduction band minimum of the oxide semiconductor film 108_2. It is preferable to use a material whose energy level is closer to the vacuum level than the lower energy level. For example, oxide The energy level of the conduction band minimum of the semiconductor film 108_2 and the oxide semiconductor films 108_1 and 108_2 are The difference in energy level between the conduction band minimum of 8_3 and the It is preferable that the above is set.

[0169] The oxide semiconductor films 108_1 and 108_3 each contain a spinel crystal structure. It is preferable that the oxide semiconductor films 108_1 and 108_3 do not contain spinel-type crystals. When the spinel type crystal structure is included, the conductive film 120 The constituent elements of the oxide semiconductor film 108_2 may diffuse into the oxide semiconductor film 108_2. When the oxide semiconductor films 108_1 and 108_3 are CAAC-OS, the conductive film 120a , 120b, for example, copper element, has a high blocking property, which is preferable.

[0170] In this embodiment, the oxide semiconductor films 108_1 and 108_3 are made of a metal The atomic ratio of the elements was In:Ga:Zn=1:3:2. However, the present invention is not limited to this. The compound semiconductor films 108_1 and 108_3 are made of In:Ga:Zn=1:1:1 [atomic ratio] ], In:Ga:Zn=1:1:1.2[atomic ratio], In:Ga:Zn=1:3:4[ atomic ratio], In:Ga:Zn=1:3:6 [atomic ratio], or In:Ga:Zn=1 The oxide semiconductor film was formed using a metal oxide target with an atomic ratio of 1:10:1. Alternatively, the oxide semiconductor films 108_1 and 108_3 may contain atoms of a metal element. Oxide semiconductor film formed using a metal oxide target with a numerical ratio of Ga:Zn=10:1 In this case, the oxide semiconductor film 108_2 may be formed by using a metal element having an atomic ratio of In : An oxide semiconductor film formed using a metal oxide target of Ga:Zn=1:1:1 When the oxide semiconductor film 108_2 is used, the energy level of the conduction band minimum of the oxide semiconductor film 108_2 and the energy level of the oxide semiconductor film 108_3 are The difference between the energy levels of 108_1 and 108_3 at the bottom of the conduction band is 0.6 eV or more. This is preferable because it allows

[0171] Note that the oxide semiconductor films 108_1 and 108_3 are made of In:Ga:Zn=1:1:1 When a metal oxide target having an atomic ratio of 108 is used, the oxide semiconductor films 108_1 and 108 _3 is the case where In:Ga:Zn=1:β1(0<β1≦2):β2(0<β2≦2) In addition, the oxide semiconductor films 108_1 and 108_3 may be formed of In:Ga:Zn=1 When a metal oxide target having an atomic ratio of 1:3:4 is used, the oxide semiconductor film 108_1 , 108_3 is In:Ga:Zn=1:β3(1≦β3≦5):β4(2≦β4≦6) In addition, the oxide semiconductor films 108_1 and 108_3 may be formed of In:Ga: When a metal oxide target with an atomic ratio of Zn=1:3:6 is used, the oxide semiconductor film 1 08_1 and 108_3 are In:Ga:Zn=1:β5(1≦β5≦5):β6(4≦β 6≦8).

[0172] <1-6. Manufacturing method 1 of semiconductor device> Next, an example of a method for manufacturing the transistor 100 shown in FIG. 1 will be described with reference to FIGS. 15 to 17. 15 to 17 illustrate a method for manufacturing the transistor 100. 1 is a cross-sectional view in the channel length (L) direction and the channel width (W) direction.

[0173] First, an insulating film 104 is formed on a substrate 102. Then, an oxide semiconductor is formed on the insulating film 104. Then, the oxide semiconductor film is processed into an island shape to form an oxide semiconductor film. 107 is formed (see FIG. 15(A)).

[0174] The insulating film 104 can be formed by sputtering, CVD, evaporation, pulsed laser deposition ( The film can be formed by appropriately using a PLD method, a printing method, a coating method, or the like. In this case, a silicon nitride film having a thickness of 400 nm was deposited as the insulating film 104 using a PECVD apparatus. Then, a silicon oxynitride film having a thickness of 50 nm is formed.

[0175] After the insulating film 104 is formed, oxygen may be added to the insulating film 104. The oxygen added to 4 can be oxygen radicals, oxygen atoms, oxygen atomic ions, or oxygen molecular ions. The addition method includes ion doping, ion implantation, plasma treatment, etc. Furthermore, a method is also available in which a film that suppresses oxygen desorption is formed on an insulating film, and then an insulating film is formed through the film. The film 104 may be doped with oxygen.

[0176] As the film for suppressing the desorption of the above-mentioned oxygen, indium, zinc, gallium, tin, aluminum, Aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten The insulating film can be formed using a conductive film or a semiconductor film having one or more of the following groups:

[0177] In addition, when oxygen is added in plasma treatment, the oxygen is excited by microwaves to form high-density oxygen. By generating oxygen plasma, the amount of oxygen added to the insulating film 104 can be increased. .

[0178] The oxide semiconductor film 107 can be formed by a sputtering method, a coating method, a pulsed laser deposition method, or It can be formed by a laser ablation method, a thermal CVD method, etc. To process the conductive film 107, a mask is formed on the oxide semiconductor film by a lithography process. After that, part of the oxide semiconductor film is etched using the mask. Alternatively, the oxide semiconductor film 107 may be directly formed by using a printing method. stomach.

[0179] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma is used. The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like. In the case of forming an oxide semiconductor film, a sputtering gas is a rare gas (typically, argon ), oxygen, a rare gas, and a mixed gas of oxygen are used as appropriate. In this case, it is preferable to increase the gas ratio of oxygen to rare gas.

[0180] Note that when the oxide semiconductor film is formed by, for example, a sputtering method, The temperature is set to 150°C or higher and 750°C or lower, or 150°C or higher and 450°C or lower, or 200°C or higher. The crystallinity of the oxide semiconductor film can be improved by depositing the film at a temperature of 350° C. or lower. Therefore, it is preferable.

[0181] In this embodiment, the oxide semiconductor film 107 is deposited by a sputtering apparatus. The sputtering target was In-Ga-Zn metal oxide (In:Ga:Zn =4:2:4.1 [atomic ratio]) to form a 35-nm-thick oxide semiconductor film.

[0182] After the oxide semiconductor film 107 is formed, heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher. Below the strain point, or 250°C to 450°C, or 300°C to 450°C .

[0183] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or It can be carried out in an inert gas atmosphere containing nitrogen. Alternatively, it can be heated in an inert gas atmosphere. After that, heating may be performed in an oxygen atmosphere. It is preferable that the treatment time does not include the above. The treatment time may be from 3 minutes to 24 hours.

[0184] The heat treatment can be carried out using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. The processing time can be reduced.

[0185] The oxide semiconductor film is formed while being heated, or the oxide semiconductor film is formed and then subjected to heat treatment. By performing the process, the hydrogen concentration in the oxide semiconductor film obtained by SIMS was increased to 5×10 19 atoms / cm 3 or less, or 1 x 10 19 atoms / cm 3 Below, 5 x 10 1 8 atoms / cm 3 or less, or 1 x 10 18 atoms / cm 3 or less, or 5×1 0 17 atoms / cm 3 or less, or 1 x 10 16 atoms / cm 3 The following shall be done: can be done.

[0186] Next, an insulating film 110_0 is formed over the insulating film 104 and the oxide semiconductor film 107 (FIG. 1 5(B)).

[0187] The insulating film 110_0 is a silicon oxide film or a silicon oxynitride film formed by PECVD. In this case, the source gas is a deposition gas containing silicon. It is preferable to use a gas containing silicon and an oxidizing gas. Examples of oxidizing gases include silane, disilane, trisilane, and fluorinated silane. , ozone, nitrous oxide, nitrogen dioxide, etc.

[0188] In addition, for the insulating film 110_0, the flow rate of the oxidizing gas is set to 20 times the flow rate of the deposition gas. The pressure in the processing chamber is set to 100P or more but less than 100 times, or 40 times or more but less than 80 times. By using the PECVD method at a pressure of less than a or 50 Pa or less, nitroxide with a small amount of defects can be obtained. A silicon dioxide film can be formed.

[0189] Also, as the insulating film 110_0, a film is placed in the evacuated processing chamber of the PECVD apparatus. The substrate is maintained at a temperature of 280°C or higher and 400°C or lower, and raw material gas is introduced into the processing chamber. The pressure in the air is set to 20 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 250 Pa or less. The insulating film 110 is formed by supplying high frequency power to an electrode provided in the processing chamber. 0, a dense silicon oxide film or silicon oxynitride film can be formed. .

[0190] In addition, the insulating film 110_0 may be formed by using a plasma CVD method using microwaves. Microwaves refer to the frequency range from 300MHz to 300GHz. Microwaves are The electron temperature is low and the electron energy is small. Also, the electron acceleration is low for the supplied power. The proportion of the ionized gas used for dissociation and ionization of molecules is small, so that it can be used for dissociation and ionization of more molecules. This allows for the excitation of high density plasma. The insulating film 110_0 is formed with less defects due to less plasma damage to the surface and deposits. It is possible.

[0191] The insulating film 110_0 can be formed by a CVD method using organic silane gas. The organic silane gas is ethyl silicate (TEOS: chemical formula Si(OC2H5)4 ), tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetramethylsilane cyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), Hexamethyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), Silicon-containing compounds such as trisdimethylaminosilane (SiH(N(CH3)2)3) By using the CVD method using organic silane gas, it is possible to obtain a highly coated film. An insulating film 110_0 can be formed.

[0192] In this embodiment, a PECVD apparatus is used to form the insulating film 110_0, and a thickness of 100 nm is formed. A silicon oxynitride film is formed.

[0193] Next, a metal oxide film 112_0 is formed on the insulating film 110_0. During the formation of the insulating film 110_0, oxygen is added from the metal oxide film 112_0 to the insulating film 110_0. (See FIG. 15(C)).

[0194] The metal oxide film 112_0 is formed by sputtering, and oxygen gas is not used during the formation. It is preferable to form the metal oxide film in an atmosphere containing oxygen gas. By forming 112_0, oxygen can be suitably added to the insulating film 110_0. The method for forming the metal oxide film 112_0 is not limited to the sputtering method. Other methods, such as ALD, may also be used.

[0195] In FIG. 15C, oxygen added to the insulating film 110_0 is indicated by an arrow. It represents.

[0196] In this embodiment, the metal oxide film 112_0 is formed by sputtering. An aluminum oxide film having a thickness of 10 nm is formed. After the metal oxide film 112_0 is formed, Oxygen addition treatment may be performed after the insulating film 104 is formed. The addition of oxygen can be carried out in the same manner as in the case of the conventional method.

[0197] Next, a conductive film 114_0 is formed on the metal oxide film 112_0. A mask 140 is formed at a desired position on the substrate 10 by a lithography process (FIG. 15(D)). reference).

[0198] In this embodiment, the conductive film 114_0 is formed by a sputtering method. A 100 nm thick tungsten film is deposited.

[0199] Next, etching is performed from above the mask 140 to remove the conductive film 114_0 and the metal oxide film 112 Then, the mask 140 is removed to remove the insulating film 110_0. The island-shaped conductive film 114, the island-shaped metal oxide film 112, and the island-shaped insulating film 110 are formed (see FIG. 16(A)).

[0200] In this embodiment, the conductive film 114_0, the metal oxide film 112_0, and the insulating film 11 The 0_0 processing is performed using a dry etching method.

[0201] When processing the conductive film 114_0, the metal oxide film 112_0, and the insulating film 110_0, In this case, the thickness of the oxide semiconductor film 107 in a region where the conductive film 114 does not overlap might be thin. Alternatively, when processing the conductive film 114_0, the metal oxide film 112_0, and the insulating film 110_0, In this case, the thickness of the insulating film 104 in a region where the oxide semiconductor film 107 does not overlap might be thin. In addition, when processing the conductive film 114_0, the metal oxide film 112_0, and the insulating film 110_0, An etchant or an etching gas (for example, chlorine) is added to the oxide semiconductor film 107. or the conductive film 114_0, the metal oxide film 112_0, or the insulating film 110_0 The constituent elements may be added to the oxide semiconductor film 107 in some cases.

[0202] Next, an impurity element 1 was added from above the insulating film 104, the oxide semiconductor film 107, and the conductive film 114. Add 45 (see Figure 16(B)).

[0203] The impurity element 145 can be added by ion doping, ion implantation, plasma In the case of plasma treatment, the plasma is heated in a gas atmosphere containing the impurity element to be added. By generating a plasma and performing a plasma treatment, impurity elements can be added. The plasma generating device may be a dry etching device, an ashing device, A plasma CVD apparatus, a high density plasma CVD apparatus, or the like can be used.

[0204] The source gases for the impurity element 145 are B2H6, PH3, CH4, N2, and NH3 , AlH3, AlCl3, SiH4, Si2H6, F2, HF, H2 and one or more of the rare gases Alternatively, B2H6, PH3, N2, NH3 diluted with rare gases can be used. One or more of AlH3, AlCl3, F2, HF, and H2 can be used. Diluted B2H6, PH3, N2, NH3, AlH3, AlCl3, F2, HF, and The impurity element 145 is added to the oxide semiconductor film 107 using one or more of H2, oxide semiconductor containing one or more of silicon, hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, and chlorine It can be added to the film 107.

[0205] Or, after adding rare gases, B2H6, PH3, CH4, N2, NH3, AlH3, One or more of AlCl3, SiH4, Si2H6, F2, HF, and H2 is added to the oxide semiconductor film 1 07. Alternatively, B2H6, PH3, CH4, N2, NH3, AlH3, After adding one or more of AlCl3, SiH4, Si2H6, F2, HF, and H2, The oxide semiconductor film 107 may be doped with silicon.

[0206] The addition of the impurity element 145 is controlled by appropriately setting implantation conditions such as acceleration voltage and dose amount. For example, when argon is added by ion implantation, the acceleration voltage is 10 kV or more. 00kV or less, dose 1×10 13 ions / cm 2 More than 1×10 16 ions / c m 2 For example, 1×10 14 ions / cm 2 In addition, When adding phosphorus ions by the ion implantation method, the acceleration voltage is 30 kV and the dose is 1 × 10 13 ions / cm 2 5x10 or more 16 ions / cm 2 For example, 1×1 0 15 ions / cm 2 This can be done as follows.

[0207] In this embodiment, the mask 140 is removed and then the impurity element 145 is added. However, the present invention is not limited to this. For example, the mask 140 may be left in place. The impurity element 145 may be added in this state.

[0208] In this embodiment, the impurity element 145 is introduced using a doping device. Argon is added to the oxide semiconductor film 107. However, this is not limiting. For example, The step of adding the impurity element 145 may be omitted. Since the process of forming the semiconductor substrate is not performed, the manufacturing process can be simplified.

[0209] Next, an insulating film 116 is formed over the insulating film 104, the oxide semiconductor film 107, and the conductive film 114. Note that by forming the insulating film 116, the oxide semiconductor film 1 The insulating film 116 is connected to the source region 108s and the drain region 108d. In other words, the oxide semiconductor film 107 in contact with the insulating film 110 This forms the channel region 108i. and the oxide semiconductor film 108 having the drain region 108d is formed (FIG. 16(C) reference).

[0210] In this embodiment, the insulating film 116 is made of a material that can be used for the insulating film 116. In this embodiment, the insulating film 116 can be formed by selecting a film formed by PECVD. Using this device, a silicon nitride fluoride film with a thickness of 100 nm is formed. The silicon film is formed using, for example, SiF4 and N2 as raw material gases. Alternatively, it can be formed using SiF4, N2, and SiH4 as source gases. do.

[0211] By using a silicon nitride fluoride film as the insulating film 116, the surface of the insulating film 116 is The source region 108s and the drain region 108d are provided with nitrogen, hydrogen, and the like in the silicon nitride fluoride film. Fluorine may be provided in one or more of the source and drain regions 108s and 108s. It is preferable that fluorine is supplied to the source region 108s and the drain region 108d. The carrier density in the rain region 108d can be stably increased.

[0212] Next, the insulating film 118 is formed on the insulating film 116 (see FIG. 16(D)).

[0213] In this embodiment, the insulating film 118 is made of a material that can be used for the insulating film 118. In this embodiment, the insulating film 118 can be formed by selecting a film formed by PECVD. Using this apparatus, a silicon oxynitride film with a thickness of 300 nm is formed.

[0214] Next, a mask is formed by lithography at a desired position on the insulating film 118, and then the insulating film By etching a part of the insulating film 118 and the insulating film 116, an opening reaching the source region 108s is formed. An opening 141a and an opening 141b reaching the drain region 108d are formed (FIG. 17). (See (A)).

[0215] The insulating film 118 and the insulating film 116 are etched by wet etching. Either one or both of the dry etching method and the dry etching method may be used. In this case, the insulating film 118 and the insulating film 116 are processed by dry etching.

[0216] Next, a conductive film 120 is formed on the insulating film 118 so as to cover the openings 141a and 141b. (See FIG. 17(B)).

[0217] For the conductive film 120, a material that can be used for the conductive films 120a and 120b is selected. In this embodiment, the conductive film 120 can be formed by sputtering. Using this device, a laminated film of a tungsten film with a thickness of 50 nm and a copper film with a thickness of 400 nm is formed. do.

[0218] Next, a mask is formed at a desired position on the conductive film 120 by a lithography process, and then: By etching a part of the conductive film 120, conductive films 120a and 120b are formed (FIG. 17(C)).

[0219] The conductive film 120 can be processed by either wet etching or dry etching. In this embodiment, copper is removed by wet etching. After etching the film, the tungsten film is etched by dry etching. The conductive film 120 is processed to form conductive films 120a and 120b.

[0220] Through the above steps, the transistor 100 shown in FIG. 1 can be manufactured.

[0221] Note that the films constituting the transistor 100 (insulating film, metal oxide film, oxide semiconductor film, conductive film, In addition to the above-mentioned forming methods, the film may be formed by sputtering, chemical vapor deposition (CVD), It can be formed using vacuum evaporation, pulsed laser deposition (PLD), or ALD. Alternatively, it can be formed by a coating method or a printing method. Typical examples of the method include a coating method and a plasma enhanced chemical vapor deposition (PECVD) method, but a thermal CVD method may also be used. An example of the thermal CVD method is MOCVD (metal organic chemical vapor deposition).

[0222] In the thermal CVD method, the pressure in the chamber is atmospheric or reduced, and the source gas and oxidant are simultaneously mixed. The reaction is carried out in the chamber near or on the substrate, where it is deposited on the substrate to form a film. As described above, the thermal CVD method is a film formation method that does not generate plasma. This has the advantage that defects are not generated due to damage.

[0223] Thermal CVD methods such as MOCVD can be used to form the above-mentioned conductive films, insulating films, oxide semiconductor films, and metal It is possible to form films such as oxide films. For example, when forming an In-Ga-Zn-O film, trimethylindium (In(CH3)3), trimethylgallium (Ga(CH3 )3) and dimethylzinc (Zn(CH3)2). Instead of trimethylgallium, triethylgallium (Ga(C2H5)3) is used. Dimethyl zinc can also be replaced by diethyl zinc (Zn(C2H5)2). can.

[0224] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and a liquid containing a hafnium precursor (hafnium alkoxide or tetrakisdimethylamide) Hafnium (TDMAH, Hf[N(CH3)2]4) and tetrakis(ethylmethylamine) Hafnium amide (e.g. hafnium amide) is vaporized as a raw material gas, and ozone is used as an oxidizer. Two types of gases are used:

[0225] For example, when forming an aluminum oxide film using an ALD film forming device, A liquid containing a catalyst and an aluminum precursor (trimethylaluminum (TMA, Al(CH3) 3) and other) are used as a raw material gas and as an oxidizing agent, H2O. Materials include tris(dimethylamido)aluminum, triisobutylaluminum, Aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate) There are some.

[0226] For example, when forming a silicon oxide film using a film forming device that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, and the radicals of oxidizing gases (O2, nitrous oxide) are removed. The adsorbate is reacted with the adsorbate.

[0227] For example, when forming a tungsten film using an ALD deposition system, WF6 The initial tungsten film is formed by sequentially introducing WF6 gas and B2H6 gas. The tungsten film is formed using H2 gas. Note that SiH4 gas is used instead of B2H6 gas. A sachet may also be used.

[0228] For example, an oxide semiconductor film, such as In-Ga-Zn- When forming an O film, an In-O layer is formed using In(CH3)3 gas and O3 gas. Then, a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then Z The ZnO layer is formed using n(CH3)2 gas and O3 gas. The order of these layers is The present invention is not limited to this example. In addition, it is possible to form an In-Ga-O layer or an In-Zn-O layer using these gases. Alternatively, a mixed compound layer such as a Ga-Zn-O layer may be formed. H2O gas obtained by bubbling water with an inert gas such as HCl may be used, but It is preferable to use O3 gas, which is less oxidative.

[0229] <1-7. Manufacturing method of semiconductor device 2> Next, an example of a method for manufacturing the transistor 100A shown in FIG. 2 will be described with reference to FIGS. 18 to 20. 18 to 20 illustrate a method for manufacturing the transistor 100A. 1 is a cross-sectional view of the channel length (L) direction and the channel width (W) direction.

[0230] First, the conductive film 106 is formed on the substrate 102. Next, the substrate 102 and the conductive film 106 are An insulating film 104 is formed thereon, and an oxide semiconductor film is formed thereon. The oxide semiconductor film is processed into an island shape to form an oxide semiconductor film 107 (FIG. 18(A) )reference).

[0231] The conductive film 106 is formed using a material and a method similar to those of the conductive films 112a and 112b. In this embodiment, the conductive film 106 can be formed by a 100 nm thick film. A tungsten film having a thickness of 1000 nm is formed by sputtering.

[0232] Next, the insulating film 110_0 is formed over the insulating film 104 and the oxide semiconductor film 107. Thereafter, a metal oxide film 112_0 is formed on the insulating film 110_0 (see FIG. 18(B)).

[0233] When the metal oxide film 112_0 is formed, oxygen is added to the insulating film 110_0. In FIG. 18(B), the oxygen is schematically represented by an arrow.

[0234] Next, a mask was formed by lithography at a desired position on the metal oxide film 112_0. Thereafter, the metal oxide film 112_0, the insulating film 110_0, and a part of the insulating film 104 are etched. By this, an opening 143 reaching the conductive film 106 is formed (see FIG. 18C).

[0235] The opening 143 can be formed by wet etching or dry etching. In this embodiment, the dry etching method is used. The opening 143 is formed using the etchant.

[0236] Next, a conductive film 114_0 is formed on the metal oxide film 112_0 so as to cover the opening 143. (See FIG. 18(D)).

[0237] Note that the conductive film 114_0 is formed so as to cover the opening 143, thereby and the conductive film 114_0 are electrically connected to each other.

[0238] Next, a mask 140 is formed at a desired position on the conductive film 114_0 by a lithography process. (See FIG. 19(A)).

[0239] Next, etching is performed from above the mask 140 to remove the conductive film 114_0 and the metal oxide film 112 The conductive film 114_0, the metal oxide film 112_0, and the insulating film 110_0 are processed. By processing the insulating film 110_0, the island-shaped conductive film 114, the island-shaped metal oxide film 112, And an island-shaped insulating film 110 is formed (see FIG. 19(B)).

[0240] In this embodiment, a dry etching method is used to remove the conductive film 114_0 and the metal oxide film 112_0 and the insulating film 110_0 are processed.

[0241] Next, the mask 140 is removed, and then the insulating film 104, the oxide semiconductor film 107, and the conductive film An impurity element 145 is added from above 114 (see FIG. 19(C)).

[0242] In this embodiment, the impurity element 145 is doped using a doping device. Argon is added to the oxide semiconductor film 107.

[0243] Next, an insulating film 116 is formed over the insulating film 104, the oxide semiconductor film 107, and the conductive film 114. Note that by forming the insulating film 116, the oxide semiconductor film 1 The insulating film 116 is connected to the source region 108s and the drain region 108d. In other words, the oxide semiconductor film 107 in contact with the insulating film 110 This forms the channel region 108i. and the oxide semiconductor film 108 having the drain region 108d is formed (FIG. 19(D)). reference).

[0244] Next, an insulating film 118 is formed on the insulating film 116 (see FIG. 20A).

[0245] Next, a mask is formed by lithography at a desired position on the insulating film 118, and then the insulating film By etching a part of the insulating film 118 and the insulating film 116, an opening reaching the source region 108s is formed. An opening 141a and an opening 141b reaching the drain region 108d are formed (FIG. 20 (See (B)).

[0246] Next, a conductive film 120 is formed on the insulating film 118 so as to cover the openings 141a and 141b. (See Figure 20(C)).

[0247] Next, a mask is formed at a desired position on the conductive film 120 by a lithography process, and then: By etching a part of the conductive film 120, conductive films 120a and 120b are formed (FIG. 20(D)).

[0248] Through the above steps, the transistor 100A shown in FIG. 2 can be manufactured.

[0249] In addition, in this embodiment, an example in which a transistor includes an oxide semiconductor film is shown. However, one embodiment of the present invention is not limited thereto. For example, the channel region of a transistor may not have a nitride semiconductor film. In the vicinity of the gate region, source region, or drain region, Si (silicon), Ge (germanium) rumanium), SiGe (silicon germanium), GaAs (gallium arsenide), etc. It may be formed of a material having such a property.

[0250] As described above, the structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiments. They can be used in combination.

[0251] (Embodiment 2) In this embodiment, oxygen vacancies (V O ), and the oxygen The case where an impurity (fluorine or hydrogen) enters the defect will be described in detail.

[0252] <2-1. Oxygen vacancies (V) formed in oxide semiconductors O ) Model First, oxygen vacancies (V O ) model is explained. In semiconductors, oxygen vacancies form deep levels (also called dDOS). This can cause deterioration of the electrical characteristics of a transistor including an oxide semiconductor. Here, we consider the aggregation of oxygen vacancies (V O Also called a cluster.) is of the form We will explain the results of verifying the model created.

[0253] Figure 21(A) shows the InGaZnO4 crystal model in its initial state (before oxygen vacancies are formed). 21(B), 21(C), 22(A), 22(B), and 22(C) are diagrams showing the same. C) shows the initial state of the InGaZnO4 crystal model shown in Figure 21(A) with oxygen vacancies. 21(A), 21(B), 21(C), and 22(A) are diagrams showing the model. 22(B) and 22(C), white circles represent metal atoms, and the element name is written inside the white circle. The black circles represent oxygen atoms, and the dotted circles represent V atoms. O Represents.

[0254] [V O Formation of First, from the initial state shown in FIG. 21(A), as shown in FIG. 21(B), V at the oxygen site O is formed.

[0255] [Vzn formation 1] Next, from the model shown in FIG. 21(B), as shown in FIG. 21(C), V O The nearby Zn This releases Zn and forms Zn deficiency (Vzn).

[0256] [V O Formation of Next, from the model shown in FIG. 21(C), as shown in FIG. 22(A), V is attached to the oxygen site with low coordination number with Ga. O is formed.

[0257] [Vzn formation 2] Next, from the model shown in FIG. 22(A), as shown in FIG. 22(B), V O The nearby Zn is released and Vzn is formed.

[0258] [V O Formation of Next, from the model shown in FIG. 22(B), as shown in FIG. 22(C), V O is formed.

[0259] As described above, one oxygen vacancy is formed in the oxide semiconductor, and New oxygen vacancies are formed near the oxygen vacancies, resulting in multiple oxygen vacancies or clusters of oxygen vacancies. Body (V O Therefore, when oxygen vacancies are formed, stable bonds It is important to terminate the oxygen vacancies by

[0260] <2-2.V O Regarding the F termination of Next, oxygen vacancies (V O ) to terminate the oxide semiconductor, First, V O F termination (hereinafter referred to as V O Check whether F) is likely to occur Therefore, F is V O Models that exist outside of V O Two models of the model that entered We performed calculations to determine which model is more energetically stable.

[0261] The model diagrams used for the calculations are shown in Figure 23(A)(B), and the calculation conditions are shown in Table 1. In Figures 23(A) and 23(B), the large black circles represent oxygen atoms, and the white circles, small black circles, and The gray circles represent metal atoms (In, Ga, and Zn, respectively), and the dotted circles represent V. O represents the arrow The circle indicated by represents F.

[0262] [Table 1]

[0263] The model used for the calculation was an InGaZnO4 crystal model (112 atoms). Also, in Figure 23(A), F is V O Models that exist outside of V O +F int Mo (Del), and Figure 23(B) shows that F is V O The model entered (hereinafter referred to as V O F+bulk model (L).

[0264] In addition, V O and V O The formation sites of F are three In atoms and one In atom bonded to Zn. The oxygen site of the O2 layer was set as the oxygen site. O For models outside the lattice, F is the interstitial exists (F int Therefore, F atoms were placed at possible interstitial sites, and The most energy-stable site was chosen.

[0265] Also, V shown in FIG. O +F int The model is V O and F int What is the impact? In this case, F is assumed to be located so far away that there is no V O The model entered in Figure 2 V shown in 3(A) O +F int To compare the energies of the models, the number of atoms must be the same. So, V O +F int The energy of the model (E tot (V O +F int ) to V O The energy of the model (E(V O )) and F int Model (E(F int )) energy - is the sum of V O F model energy (Etot (V O F)) to V O F model energy Ghee(E(V O F) and the defect-free bulk model energy (E(bulk)) It was decided.

[0266] The formula that satisfies the above relationship is shown below.

[0267]

number

[0268]

number

[0269] The relative energy calculated using the formulas (1) and (2) is shown in Table 2. Shown below.

[0270] [Table 2]

[0271] From the results shown in Table 2, V O F is more V O +F int The relative energy is lower than This shows that V O and F int V exists farther away than O In the shape of F This suggests that the V O When there is in the IGZO film, Probably F. int V O Fill in the V O Form F.

[0272] <2-3.V O F-model density of states Next, V OThe density of states of the F model was calculated. O Figure 2 shows the calculation results of the density of states of the F model. Shown in 4.

[0273] In addition, V O To calculate the density of states of the F model, the functional GGA (Generalized Gaussian Algorithm) is used. In addition, in Figure 24, The upper half shows an up spin, and the lower half shows a down spin. The axis represents energy, and the position of 0 eV on the horizontal axis corresponds to the top of the valence band.

[0274] From the results shown in Figure 24, V O When F is formed, an electron is released into the conduction band. This is suggested to be due to the difference in ionic valence between O and F. If so, V O When F enters the InGaZnO4 crystal model, electrons are released and the InGaZnO4 crystal model becomes n-type. Ugh.

[0275] <2-4.V O Regarding the O-termination of Next, the V O To compare with the F termination of V O The calculation was performed for the O-terminus of In addition, V O The O termination of V O Restoration and V O After the O termination, there is no defect. , O is V O Models that exist outside of V O Energy ratio with the repaired (defect-free) model A comparison was made.

[0276] The model diagrams used for the calculation are shown in Figure 25(A)(B). The calculation conditions are as shown above. SuV O Same as F.

[0277] The model used for the calculation was an InGaZnO4 crystal model (112 atoms). Also, in Figure 25(A), O is V O Models that exist outside of V O +O int Mo Figure 25(B) shows the bulk model without defects (hereafter referred to as bulk+bulk In Figures 25(A) and 25(B), the large black circles represent oxygen atoms, and the white circles represent oxygen atoms. The circles, small black circles, and gray circles represent metal atoms (In, Ga, and Zn, respectively), and the dotted circles is V O The circle indicated by the arrow represents O. int Represents.

[0278] Also, V shown in FIG. O +O int The model is V O and O int What is the impact? In this case, O shown in Figure 25(B) is V O Enter The model without defects and the V shown in Figure 25(A) O +O int Compare with the model To achieve this, the number of atoms must be uniform. O +O int Model As a rule, V O +O int The energy of the model (E tot (V O +O int )) to V O The energy of the model (E(V O )) and O int Model (E(O int Energy with -, and V shown in Figure 25(B) O The energy of the repaired (defect-free) model (E to t(cure)) is twice the energy of the defect-free bulk model (E(bulk)). It was decided.

[0279] The formula that satisfies the above relationship is shown below.

[0280]

number

[0281]

number

[0282] The relative energy calculated using the formulas (3) and (4) is shown in Table 3. Shown below.

[0283] [Table 3]

[0284] From the results shown in Table 3, V O The repair is V O +O int The relative energy is lower than This shows that V O and O int V exists farther away than O Repair This suggests that the V O was in the IGZO film If, perhaps, O int V O Fill in the V O Repair. V O Carrier for repair There is no generation of

[0285] <2-5.V O Regarding the F termination of Next, V calculated using a different method from the above OThe above calculation explains the F-terminus. In the previous section, the GGA functional was used, whereas in the following section, the hybrid functional was used. The calculation conditions are shown in Table 4.

[0286] [Table 4]

[0287] In the calculation conditions shown in Table 4, the lattice constants and atomic positions of the initially defect-free crystal model are The atomic configuration was then optimized, and each defect model was then created and only the atomic configuration was optimized.

[0288] In this case, calculations were performed for the four models shown in Figure 26(A)(B)(C)(D). went.

[0289] Figure 26(A) shows the oxygen vacancy (V O ) is a model diagram showing the V O F The structure filled with (V O F), and Figure 26(C) shows the case where F is inserted between the lattices. The structure (F int ) and Fig. 26(D) shows a structure in which O is inserted between the lattices. Construction (O int ) is a model diagram showing the , the large black circles represent oxygen atoms, and the white circles, small black circles, and gray circles represent metal atoms (I, n, Ga, Zn), and the dotted circle represents V O The white circle indicated by the arrow represents F int represents the arrow The black circle indicated by the mark is O int Represents.

[0290] Also, in FIG. 26(A), V O The formation position of the InO2 layer is O, and the adjacent The site was O. That is, V OThe formation position is a site surrounded by three In atoms and one Zn atom. In addition, in FIG. 26(B), V O The formation position of F is O in the InO2 layer, and Zn and The adjacent site was O. That is, V O The F formation position is surrounded by three In atoms and one Zn atom. In addition, in Figure 26(C), F int The formation position of the InO2 layer, The interstitial sites were between the (Ga,Zn)O layer and the F int The formation position of I The site is surrounded by n3, Ga2, and Zn1. int The formation position was the interstitial site between the InO2 layer and the (Ga, Zn)O layer. Nawa, O int The formation site is a site surrounded by three In atoms, two Ga atoms, and one Zn atom. .

[0291] In addition, for the model diagrams shown in Figure 26(A)(B)(C)(D), the following formula is used to calculate the missing The formation energy of the recession model (E form (D) was calculated. Energy (E form The smaller the value of (D), the easier it is for defects to form.

[0292]

number

[0293] In equation (5), E(defect,q) is the charge of a lattice with a defect D at q. is the total energy of the crystal without defects, E(bulk) is the total energy of the crystal without defects, and Δn(X) is the total energy of the crystal without defects. μ(X) is the number of atoms X removed (added) from the system, and μ(X) is the number of atoms X removed (added) from the system. is the chemical potential with respect to the defect, q is the charge valence of the system with defects, and μ(e) is the chemical potential of the electron potential (Fermi level from the top of the valence band) is E VBM is the upper edge of the valence band (VBM ) and ΔV represents the correction to the electrostatic potential energy.

[0294] FIG. 27 shows the calculation results of the density of states for a defect-free crystal model (perfect crystal).

[0295] In FIG. 27, the Fermi level represents the highest electron occupied level. In the calculation, the calculation is performed only at the Γ point, so the levels are discrete. All the electrons are in the valence band, and there are no levels in the gap. The band gap was 3.10 eV.

[0296] Next, V O The calculated formation energy of is shown in Figure 28(A), and V O The formation energy of F The calculation results are shown in Figure 28(B). int The calculated formation energy of is shown in Figure 29(A). int The calculation results of the formation energies of the above are shown in FIG. 29(B). ) (B), and in Figures 29(A) and (B), the vertical axis represents the formation energy calculated using formula (5). The horizontal axis represents the energy, and the horizontal axis represents the Fermi level. On the horizontal axis of 29(A)(B), 0.0 eV corresponds to the top of the valence band (VBM), and 3. 10 eV corresponds to the conduction band edge (CBM).

[0297] In addition, in Figs. 28(A)(B) and 29(A)(B), X represents the type of defect (V O , V O F, F int, or O int ), q is the charge valence of the system, and Y is the unit cell equivalent The number of spins per electron is (number of up spin electrons - number of down spin electrons), and X q (Y) It is written in the form of

[0298] From the results shown in Figure 28(A), V O The charge state of is 2.29 from the VBM. Up to 2.29 eV, the charge was +2, and above 2.29 eV it was 0 (neutral).

[0299] From the results shown in Figure 28(B), V O The charge state of F is at a Fermi level of 2.9 from the VBM. Up to 4 eV, it is +1, and above 2.94 eV it is -1. The charge state changes Since the Fermi energy is 2.94 eV, which is close to the CBM, V O F is the donor source (n (cause)

[0300] From the results shown in Figure 29(A), F int The charge state of is the Fermi level 0. Up to 54 eV or less, it was +1, and from 0.54 eV to the CBM, it was -1. i nt Since it tends to assume a negatively charged state, it traps electrons.

[0301] From the results shown in Figure 29(B), O int The charge state of is the Fermi level 1. Up to 99 eV, it is +1 valence, and from 1.99 eV to 2.18 eV, it is 0 valence (neutral). and from 2.18 eV to the CBM, it was -2.

[0302] <2-6.V O 3>About the F termination of Next, <2-5.V OFor the F termination, using the formation energy of each defect described in 2> The following reaction formulas (A) and (B) were verified. Reaction formula (A): V O + F → V O F Reaction formula (B): V O F + ex.O → V by F(+ex.O) O repair)

[0303] In addition, in reaction formula (A), V O F is more V O + More energetically stable than F If there is excess oxygen, F termination is likely to occur. Also, in reaction formula (B), ex.O represents excess oxygen. In addition, the left side of reaction formula (A) and reaction formula (B) are the reactant system, and the right side is the product system. This may occur.

[0304] The following formula (6) was used to verify reaction formula (A), and the following formula (6) was used to verify reaction formula (B). The following formula (7) was used.

[0305]

number

[0306]

number

[0307] In formula (6), ΔE A is the generating system (V O From the formation energy of F, the reactant ( V O +F int ) is the difference in formation energy.

[0308] Also, in formula (7), ΔE B is the generating system (F int ) from the formation energy of Ohara system (V O F+O int ) is the difference in formation energy.

[0309] In the calculation, we assumed a model in which the defects are so far apart that they do not interact with each other. -Difference (ΔE A and ΔE B ) is positive, the reactant system is more stable, and the Energy difference (ΔE A and ΔE B ) is negative, the product system is more stable. Also, <2-5.V O As described in 2> for the F-terminus of It depends on the Fermi level. A and ΔE B of each defect used in calculating The formation energy was determined as the most stable charge state at each Fermi level.

[0310] In reaction equation (A), the formation energy of the reactant and the product system and the energy difference (ΔE A The calculation results of (A) are shown in FIG. 30. From the results shown in FIG. 30, it can be seen that is ΔE A is negative, so V O If and F exist, then V O Fill in the blank with F and get V O It was confirmed that F is easily produced.

[0311] In addition, in reaction formula (B), the formation energy and energy difference between the reactant and product systems ( ΔE B ) is shown in FIG. 30(B). From the results shown in FIG. 30(B), the Fermi level When is 1.31 eV or less, O int By V O F release from F is unlikely (i.e., The reactant is more stable), and above 1.31 eV, Oint is V O F emits F into the lattice Shi(F int ), V O It is more stable to repair the

[0312] Therefore, V O The film on which F is formed is V O There is enough excess oxygen that the F of F is released. When the electrons are released, the emitted F exists in the interstitial space, i.e., F int and the F int is an electron may be trapped in the gap.

[0313] In this way, oxygen vacancies (V O ) has F between lattices (F int ) if V O Form F and V O F generates electrons, i.e., V O F The oxide semiconductor can be n-type. O F is when there is excess oxygen (ex. O) In this case, F is released between the lattices and V O And the V O undergoes repair of excess oxygen. , F int It becomes an oxide semiconductor with F int traps electrons and creates a fixed negative charge Form.

[0314] <2-7.V O Regarding the stability of structures containing impurities Next, V O We calculated the stability of the structure containing impurities. was set to fluorine and hydrogen. O The structure with fluorine in it is V O F, V O Hydrogen enters The structure is V O Let's call it H.

[0315] First, V O The stable configuration of the impurity emitted from V O The radiation emitted from In the calculation of the stable configuration of the pure substance, the charge of the entire model was assumed to be neutral.

[0316] Figure 31 shows the model used in the calculation, and Table 5 shows the calculation conditions.

[0317] [Table 5]

[0318] Note that Figure 31 shows a model of an InGaZnO4 crystal (112 atoms). A model containing impurities (F or H) was created.

[0319] Figure 32(A)(B) shows the interstitial impurities (F or The figure shows a model of the stable configuration of InGaZnO4 crystal. Fig. 32(B) shows the InGaZnO4 crystal model. This is a model diagram of a stable arrangement of hydrogen atoms between the lattices of a silicon dioxide particle.

[0320] In Figure 32(A), F is located at the center of an octahedron with six oxygen atoms at its vertices. In addition, in Figure 32(B), H is an InGaZnO4 crystal. The state in which the O bonded to the center was energetically stable.

[0321] Here, Pauling's electronegativity relationships are shown in Table 6.

[0322] [Table 6]

[0323] As shown in Table 6, the electronegativity of H is smaller than that of O, and the difference in electronegativity is large. Therefore, H mixed into the InGaZnO4 crystal, which maintains the stoichiometric ratio, is probably ionized with O. They exist in a bonded state, i.e., the O with the H bonded to it is negatively charged, and the H is positively charged.

[0324] On the other hand, the electronegativity of F is greater than that of O, so it tends to be negative relative to O. However, the difference in electronegativity is smaller than that of H, so the contribution of covalent bonding is probably greater. Therefore, in the IGZO crystal, F has a bonding strength with the metal in the (Ga,Zn)O layer and They tend to exist in positions (interstitial spaces) where the repulsive force of O is balanced.

[0325] Next, V O with impurities (F or H) and V O There are impurities (F or H) outside To thermodynamically evaluate the change between the state of the reaction and the state of the reaction, we used NEB ( Using the Nudged Elastic Band method, impurities (F or H) are measured to determine whether V O to The energy required to enter and exit and the diffusion frequency were calculated.

[0326] The NEB method was used to evaluate the diffusion barrier (Ea) required to estimate the diffusion frequency. In addition, a model corresponding to the initial and final states of the diffusion path was prepared. (F or H) is V O The final state is the state where the impurity (F or H) is in V O mosquito That is, the light was emitted from the InGaZnO4 crystal (112 Using the atomic model, we created a model containing impurities (F or H), and V O Conclusion For the crystal model, impurities (F or H) are VO Model (V O F and V O H) The initial state is V O Models located outside of the O + interstitial F, and V O + interstitial H) was taken as the final state.

[0327] In addition, the charge of the entire model is set to +1, and the calculation conditions are the same as those shown in Table 5. It was damp.

[0328] [V O Regarding the stability of F] First, V O V, which is a structure containing F O The calculation results of the stability of F are explained below. The model of the diffusion path of F in the InGaZnO4 crystal is shown in Figure 33. The calculation results of the energy change are shown in Figure 34. The arrows in Figure 33 indicate the V O The diffusion pathway of F from F is shown.

[0329] As shown in Figures 33 and 34, there is at least one diffusion barrier in the diffusion path of F. In addition, in Figure 33, V O The state where F is entered is V O F and the state where F exists between the lattices F int In addition, in Figure 34, V O The state where F is entered is V O F and V O The state where F is emitted from F is V O +F int and are written as follows. In 34, V O From F to the right is V O corresponds to the emission of F from F, and V O +F int From left Side is VO This corresponds to the entry of F into (also called a trap).

[0330] From the results shown in Figure 34, V O Energy required for F to be released from F (diffusion barrier) is 4.59 eV, V O The energy required for F to penetrate into the , 0.90 eV. Therefore, V O The energy required to release F from F is , V O Since the energy at which F enters is higher than that at which V O Once F gets into the It is suggested that

[0331] [V O On the stability of H] Next, V O V, which is a structure with H in it O The calculation results for the stability of H are explained below. The model of the diffusion path of H in the InGaZnO4 crystal is shown in Figure 35. The calculation results of the energy changes are shown in FIG.

[0332] As shown in Figures 35 and 36, there is at least one diffusion barrier in the diffusion path of H. In addition, in Figure 35, V O The state where H is entered is V O This is written as H. Also, Figure 3 In 6, V O The state where H is entered is V O H and V O The state in which H is released from H is V O + In Figure 36, V O V is to the right of H O corresponds to the release of H from H, and V O +H complex to the left is V O H's entry into This corresponds to a trap (also called a trap).

[0333] From the results shown in Figure 36, V O Energy required to release H from H (diffusion barrier) is 1.85 eV, V O The energy required for H to penetrate into the (diffusion barrier) is , 1.01 eV. Therefore, V O The energy required to release H from H is , V O Since the energy required for H to enter is higher than the energy required for V O Once H gets into the It is suggested that

[0334] [V O F and V O Comparison of stability with H] As a result of the above calculation, V O The energy required to release F from F (diffusion barrier), V O When comparing the energy required to release H from H (diffusion barrier), the following I know it's going to be a relationship. F(4.59eV) > H(1.85eV)

[0335] Next, from the diffusion barrier shown above, the diffusion frequency Γ of the impurity (F or H) is calculated using the following formula ( 8) was used for the calculation.

[0336]

number

[0337] In equation (8), ν is the frequency factor, Ea is the diffusion barrier, and k B is the Boltzmann constant, T represents the absolute temperature. Also, ν=1.0×10 13 S -1 It was decided.

[0338] The results of calculations using formula (8) are shown in Table 7. In Table 7, the imperfections at 350°C are Diffusion frequency of pure substances (F or H) and diffusion barrier of impurities (F or H) at 350℃ The impurity (F or H) pathway is V O Emissions from V O Trap and There were two types.

[0339] [Table 7]

[0340] As described above, V that can be formed in oxide semiconductors O F and the oxide semiconductor RuV O When comparing H and V O F is more V O It exists more stably than H. Therefore, The source and drain regions that function as n-type regions are made of oxide semiconductors containing hydrogen. The change in resistance of the n-type region is smaller and reliability is improved by using an oxide semiconductor containing fluorine rather than a silicon dioxide. Therefore, a highly reliable semiconductor device can be obtained.

[0341] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0342] (Embodiment 3) In this embodiment, the structure of an oxide semiconductor will be described with reference to FIGS. I will explain.

[0343] <3-1. Structure of oxide semiconductors> Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- like oxide semiconductor) and amorphous oxide semiconductor be.

[0344] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxides. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC -OS, polycrystalline oxide semiconductor, and nc-OS.

[0345] Amorphous structures are generally isotropic and have no heterogeneous structure, and are characterized by the arrangement of atoms in a metastable state. The position is not fixed, the bond angle is flexible, and there is short-range order but no long-range order. It is said that there is no such thing.

[0346] That is, a stable oxide semiconductor is transformed into a completely amorphous In addition, it is not isotropic (for example, in a microscopic region, An oxide semiconductor having a periodic structure cannot be called a completely amorphous oxide semiconductor. -like OS is not isotropic but has an unstable structure with voids. In terms of instability, a-like OS is physically an amorphous oxide semiconductor. Close to.

[0347] <3-2.CAAC-OS> First, let me explain about CAAC-OS.

[0348] CAAC-OS is an oxide having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0349] CAAC-OS was analyzed by X-ray diffraction (XRD). For example, InGaZnO4, which is classified into the space group R-3m, The structure of CAAC-OS with crystal structure was analyzed by the out-of-plane method. As shown in FIG. 37(A), a peak appears at a diffraction angle (2θ) of approximately 31°. The peak is attributed to the (009) plane of the InGaZnO4 crystal, so it is In this case, the crystal has a c-axis orientation, and the c-axis is the surface on which the CAAC-OS film is to be formed (also referred to as the surface on which the film is to be formed). It can be confirmed that the direction is perpendicular to the surface, or approximately perpendicular to the upper surface. In addition to the peak around 2θ of 36°, a peak may also appear around 2θ of 36°. The nearby peak is due to a crystal structure classified into the space group Fd-3m. It is preferable that the C-OS does not exhibit such a peak.

[0350] On the other hand, in-pl, X-rays are incident on the CAAC-OS from a direction parallel to the surface to be formed. When structural analysis is performed using the ane method, a peak appears at 2θ around 56°. This peak is It is attributed to the (110) plane of the InGaZnO4 crystal. And, 2θ is fixed at around 56°. The sample is then rotated around the normal vector of the sample surface as the axis (φ axis) for analysis (φ scan). Even if this is done, no clear peak appears as shown in Figure 37(B). When 2θ is fixed at around 56° and φ is scanned for ZnO4, the As shown, six peaks attributable to the crystal plane equivalent to the (110) plane are observed. Structural analysis using XRD revealed that the orientation of the a-axis and b-axis of CAAC-OS is irregular. It can be confirmed that:

[0351] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, the process was performed parallel to the surface on which the CAAC-OS was formed. When an electron beam with a probe diameter of 300 nm is incident, a diffraction pattern ( This diffraction pattern may contain I The spots due to the (009) plane of the nGaZnO4 crystal are included. Diffraction also shows that the pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is formed On the other hand, for the same sample, the direction of the sample surface is perpendicular to the sample surface. The diffraction pattern when an electron beam with a probe diameter of 300 nm was incident perpendicularly to the ) is shown. From Figure 37(E), a ring-shaped diffraction pattern is confirmed. Electron diffraction using an electron beam with a beam diameter of 300 nm also revealed that the pea contained in CAAC-OS It can be seen that the a-axis and b-axis of the lattice do not have any orientation. The first ring is due to the (010) and (100) planes of the InGaZnO4 crystal. The second ring in FIG. 37(E) is due to the (110) plane, etc.

[0352] In addition, a transmission electron microscope (TEM) Combined analysis of bright-field images and diffraction patterns of CAAC-OS using a microscope When observing the image (also called a high-resolution TEM image), multiple pellets can be confirmed. On the other hand, even in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries (grain boundaries), are not clearly visible. It may not be possible to clearly identify the boundary. It can be said that C-OS is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0353] Figure 38(A) shows a high-resolution image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. The TEM image is shown. For high-resolution TEM observation, spherical aberration correction (SCA) was used. The spherical aberration correction function was used. A high-resolution TEM image is specifically called a Cs-corrected high-resolution TEM image. For example, an atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. Therefore, it can be observed.

[0354] From Figure 38(A), it is possible to confirm the pellet, which is the region where metal atoms are arranged in layers. The size of a single pellet can be over 1 nm or over 3 nm. Therefore, the pellets can be called nanocrystals (nc). CAAC-OS can also be used as a C-Axis Aligned Navigator (CANC). The pellets can also be called oxide semiconductors with CAA It reflects the unevenness of the surface on which the C-OS is formed or the top surface, and the unevenness of the surface on which the CAAC-OS is formed or It is parallel to the top surface.

[0355] 38(B) and 38(C) show CAA images observed from a direction approximately perpendicular to the sample surface. Figures 38(D) and 38(E) show Cs-corrected high-resolution TEM images of the C-OS surface. 38(B) and 38(C) are processed images, respectively. First, the processing method of FIG. 38(B) is performed using a fast Fourier transform (FFT). Then, the FFT image is obtained by Fourier Transform (FFT). In the acquired FFT image, the origin is used as the reference point, and the -1 to 5.0 nm -1 The range between Next, the masked FFT image is subjected to inverse fast Fourier transform (IFFT) : Inverse Fast Fourier Transform) processing The image thus obtained is called an FFT filtered image. The filtered image is an image in which periodic components are extracted from a Cs-corrected high-resolution TEM image. This shows the child array.

[0356] In Figure 38(D), the area where the lattice arrangement is disturbed is indicated by a dashed line. The area indicated by the broken line is the connection between the pellets. The broken line indicates the hexagonal shape of the pellet. The shape of the let is not limited to a regular hexagon, but is often a non-regular hexagon.

[0357] In FIG. 38(E), a grid is formed between an area with a uniform lattice arrangement and an area with a different uniform lattice arrangement. The dotted lines indicate the changes in the orientation of the child array, and the dashed lines indicate the changes in the orientation of the lattice array. Even near the dotted line, no clear grain boundaries can be seen. When you connect the surrounding lattice points around the center, you get a distorted hexagon, distorted pentagon, or distorted heptagon. In other words, the formation of grain boundaries is suppressed by distorting the lattice arrangement. This is because the atomic arrangement of CAAC-OS is not close-packed in the ab-plane direction. The substitution of metal elements causes changes in the bond distance between atoms, which can lead to distortion. This is thought to be because it can be tolerated.

[0358] As described above, the CAAC-OS has a c-axis orientation and is Multiple pellets (nanocrystals) are connected to form a distorted crystal structure. AAC-OS, CAA crystal(c-axis-aligned abp It can also be called an oxide semiconductor with lane-anchored crystals. Cut.

[0359] CAAC-OS is an oxide semiconductor with high crystallinity. CAAC-OS is designed to be free from impurities and defects. It can also be said to be an oxide semiconductor with few defects (such as oxygen vacancies).

[0360] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon are more oxidative than metal elements that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0361] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or For example, oxygen vacancies in oxide semiconductors can act as carrier traps. In some cases, the SiO 2 traps hydrogen and becomes a carrier generation source.

[0362] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. There is. Specifically, 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than, More preferably, 1 × 10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than Such an oxide semiconductor can be a high-purity intrinsic or The CAAC-OS is essentially a highly pure intrinsic oxide semiconductor. The density of recessed states is low, which means that the oxide semiconductor has stable characteristics.

[0363] <3-3.nc-OS> Next, we will explain nc-OS.

[0364] We will explain the analysis of nc-OS by XRD. However, when structural analysis was performed using the out-of-plane method, no peaks indicating orientation appeared. That is, the crystals of the nc-OS do not have any orientation.

[0365] For example, an nc-OS having InGaZnO4 crystals was thinned to a thickness of 34 nm. When an electron beam with a probe diameter of 50 nm is incident parallel to the surface to be formed on the region m, the A ring-shaped diffraction pattern (nanobeam electron diffraction pattern) as shown in Figure 9(A) was observed. In addition, the diffraction pattern ( The nanobeam electron diffraction pattern is shown in Figure 39(B). Therefore, the nc-OS probe diameter is 50 nm. However, when an electron beam with a probe diameter of 1 nm is incident, the order is not observed. Order is confirmed by injecting light.

[0366] In addition, when an electron beam with a probe diameter of 1 nm is incident on an area with a thickness of less than 10 nm, As shown in FIG. 39(C), an electron diffraction pattern was observed in which the spots were arranged in a substantially regular hexagonal shape. Therefore, it is possible to assume that the nc-OS is ordered in the range of thickness less than 10 nm. It can be seen that the crystals have highly ordered regions, i.e., crystals. Therefore, there are some areas where a regular electron diffraction pattern is not observed.

[0367] FIG. 39(D) shows the Cs-corrected height of the cross section of the nc-OS observed from a direction approximately parallel to the surface on which the film is formed. The nc-OS is shown in the high-resolution TEM image, with the areas indicated by the auxiliary lines. How to identify the crystal areas and areas where no clear crystal areas can be identified The crystal parts contained in the nc-OS have a size of 1 nm to 10 nm. The size of the crystal is often between 1 nm and 3 nm. An oxide semiconductor with a size of greater than 10 nm and less than 100 nm is called a microcrystalline oxide semiconductor (microcrystalline oxide semiconductor). It is called a crystalline oxide semiconductor. In the case of nc-OS, for example, the grain boundaries cannot be clearly identified in high-resolution TEM images. It is possible that the nanocrystals originate from the same source as the pellets in CAAC-OS. Therefore, the crystalline part of nc-OS may be referred to as a pellet below.

[0368] In this way, nc-OS can be used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially The atomic arrangement has periodicity in the region of 1 nm to 3 nm. In the case of the SiO2 film, there is no regularity in the crystal orientation between different pellets. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous OS. In some cases, it may be difficult to distinguish them from solid oxide semiconductors.

[0369] In addition, since there is no regularity in the crystal orientation between the pellets (nanocrystals), nc-OS , oxidation with RANC (Random Aligned nanocrystals) semiconductors or NANC (Non-Aligned nanocrystals) The oxide semiconductor may also be called an oxide semiconductor.

[0370] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, in nc-OS, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0371] <3-4.a-like OS> The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor.

[0372] Figure 40 shows a high-resolution cross-sectional TEM image of the a-like OS. is a high-resolution cross-sectional TEM image of the a-like OS at the start of electron irradiation. B) is 4.3 x 10 8 e - / nm 2 electrons (e - ) a-like OS after irradiation These are high-resolution cross-sectional TEM images. Figures 40(A) and 40(B) show that a-like O It can be seen that striped bright regions extending in the vertical direction are observed in S from the start of electron irradiation. It can also be seen that the shape of the bright regions changes after electron irradiation. It is assumed to be a density region.

[0373] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the structural changes caused by electron irradiation.

[0374] As samples, a-like OS, nc-OS, and CAAC-OS were prepared. Both samples are In-Ga-Zn oxides.

[0375] First, high-resolution cross-sectional TEM images of each sample are acquired. All of the materials have crystalline parts.

[0376] The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn It is known that the structure has a total of nine layers, six of which are -O layers, stacked in layers along the c-axis. The distance between these adjacent layers is determined by the lattice spacing (also called the d value) of the (009) plane. The value is about the same, and is calculated to be 0.29 nm from crystal structure analysis. In the following, the area where the lattice spacing is 0.28 nm or more and 0.30 nm or less is referred to as InGaZ. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal. do.

[0377] Figure 41 shows an example of investigating the average size of the crystal parts (22 to 30 locations) of each sample. The length of the lattice fringes mentioned above is the size of the crystal part. e The crystal part of the OS grows in size according to the cumulative amount of electron irradiation used to obtain the TEM image. From Figure 41, it can be seen that in the early stages of TEM observation, the size of the particles is about 1.2 nm. The part of the crystal that was left behind (also called the initial nucleus) is filled with electrons (e - ) cumulative exposure is 4.2 × 10 8 e - / nm 2 On the other hand, it can be seen that the size of the crystals grows to about 1.9 nm in the case of n For c-OS and CAAC-OS, the cumulative electron irradiation dose was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of Fig. 41. Therefore, the size of the crystalline parts of nc-OS and CAAC-OS is constant regardless of the cumulative electron irradiation dose. , and are approximately 1.3 nm and 1.8 nm, respectively. The Hitachi transmission electron microscope H-9000NAR was used for the TEM observations. The conditions were an acceleration voltage of 300 kV and a current density of 6.7 × 10 5 e - / (nm 2 ·s), irradiation area The diameter of the region was set to 230 nm.

[0378] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in nc-OS and CAAC-OS, the growth of the crystals by electron irradiation is almost nonexistent. In other words, a-like OS is not seen in comparison with nc-OS and CAAC-OS. , it is clear that this is an unstable structure.

[0379] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal of the same composition. The density of the nc-OS is 78.6% or more and less than 92.3% of that of the nc-OS. The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0380] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 That is it. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0 g / cm 3 More than 5.9g / cm 3 It is less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 is less than.

[0381] If single crystals of the same composition do not exist, single crystals of different compositions can be combined in any ratio. By combining these, it is possible to estimate the density equivalent to a single crystal of a desired composition. The density corresponding to a single crystal of a desired composition is calculated based on the ratio of the single crystals of different compositions combined. However, the density can be estimated by using as few types of single crystals as possible. It is preferable to estimate them together.

[0382] As described above, oxide semiconductors have various structures, each of which has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the above-mentioned compounds.

[0383] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. You can be there.

[0384] (Fourth embodiment) In this embodiment, a display device including the transistor described in the previous embodiment will be described. An example will be described below with reference to FIGS.

[0385] 42 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 is provided on the first substrate 701, and a source driver 703 is provided on the second substrate 701. The pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, a sealant 712 disposed to surround the path portion 704 and the gate driver circuit portion 706; and a second substrate 705 provided so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 seal the entire structure. Although not shown in FIG. 42, a display element is provided between the first substrate 701 and the second substrate 705. It can be done.

[0386] The display device 700 is surrounded by a sealant 712 on the first substrate 701. The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are arranged in a region different from the region. and a flexible printed circuit (FPC) terminal 708 (FPC: Flex Also, an FPC terminal portion 708 An FPC 716 is connected to the pixel section 702 and the source driver circuit. Various signals are supplied to the path section 704 and the gate driver circuit section 706. 702, a source driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section Signal lines 710 are connected to the respective terminals 708. Various signals are supplied by an FPC 716. Signals are transmitted through signal lines 710 to the pixel section 702, the source driver circuit section 704, the gate driver The driver circuit portion 706 and the FPC terminal portion 708 are connected to the wiring board 704 .

[0387] Furthermore, the display device 700 may be provided with a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit etc. is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is mounted on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead of COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0388] The display device 700 also includes a pixel section 702, a source driver circuit section 704, and a gate The driver circuit portion 706 includes a plurality of transistors. A transistor having a specific position can be applied.

[0389] The display device 700 can also include various elements, such as: For example, electroluminescence (EL) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (which emit light according to the current) transistors), electron emission elements, liquid crystal elements, electronic ink elements, electrophoretic elements, Low-wetting element, plasma display panel (PDP), MEMS (micro- Electro-mechanical systems) displays (e.g., grating light bulbs) GLV (Glass Laser Diode), Digital Micromirror Device (DMD), Digital Microshaft Distributed Modulation System (DMS) elements, Interference Modulation (IMOD) elements, etc. ), piezoelectric ceramic displays, etc.

[0390] An example of a display device using an EL element is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat panel display (SED: Surface-conductive n Electron-emitter Display) etc. An example of such a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). Displays, reflective LCD displays, direct-view LCD displays, projection LCD displays Examples of display devices using electronic ink elements or electrophoretic elements include: There are also semi-transmissive LCD displays and reflective LCD displays. In this case, a part or all of the pixel electrode should function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM may be provided under the reflective electrode. This can further reduce power consumption.

[0391] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying colors include R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a B pixel, and a W (white) pixel. As in the column, two colors of RGB make up one color element, and different two You can also select a color and configure it by adding one or more colors such as yellow, cyan, magenta, etc. to RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, but also to monochrome display devices. It can also be applied to a display device.

[0392] Also, white light is emitted from the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) In order to display full color using (W), a colored layer (also called a color filter) is used. The colored layer may be, for example, red (R), green (G), blue (B), or the like. ), yellow (Y), etc. can be used in combination as appropriate. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a colored layer and a region not having a colored layer, The white light in the region may be directly used for display. By placing the color layer in the display, the decrease in brightness caused by the color layer can be reduced during bright display, and power consumption can be reduced by 2. However, it may be possible to reduce the emission by approximately 100% to 30%. When using optical elements to display full color, R, G, B, Y, and W are emitted by each color. By using a self-luminous element, it is possible to make the light emitted from a colored layer. In some cases, power consumption can be further reduced.

[0393] In addition, as a colorization method, a part of the light emitted from the above-mentioned white light is passed through a color filter. In addition to the color filter method, which converts red, green, and blue by filtering, A method that uses each color of light (three-color method), or a method that uses part of the light emitted from the blue light to emit red or A method of converting to green (color conversion method, quantum dot method) may also be applied.

[0394] In this embodiment, a liquid crystal element and an EL element are used as display elements. 43 and 44. Note that FIG. 43 shows the area indicated by the dashed line QR in FIG. 44 is a cross-sectional view of the liquid crystal display device shown in FIG. 42 is a cross-sectional view taken along the dashed line QR, and shows a configuration in which an EL element is used as a display element. is.

[0395] First, the common parts shown in Figures 43 and 44 will be explained, and then the different parts will be explained. This will be explained below.

[0396] <4-1. Explanation of common parts of display devices> The display device 700 shown in FIGS. 43 and 44 includes a wiring portion 711, a pixel portion 702, and , a source driver circuit section 704, and an FPC terminal section 708. The line portion 711 includes a signal line 710. The pixel portion 702 includes a transistor 750 and The source driver circuit portion 704 includes a transistor 752. Has.

[0397] Transistor 750 and transistor 752 are similar to transistor 100 shown above. The structures of the transistors 750 and 752 are the same as those described above. Any of the other transistors shown in the embodiment modes may be used.

[0398] The transistor used in this embodiment is made of a highly purified oxide in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. The off-state current of the transistor can be reduced. This allows for longer retention times for electrical signals such as signals, and the write interval can also be extended when the power is on. Therefore, the frequency of refresh operations can be reduced, resulting in reduced power consumption. It has the effect of suppressing force.

[0399] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed driving can be used in a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section can be In other words, the driver transistor can be formed on the same substrate as a separate driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, high quality images can be provided.

[0400] The capacitor 790 is formed using the same oxide semiconductor film as that of the transistor 750. The lower electrode formed through a process of processing the body film and the source electrode of the transistor 750 The conductive film that functions as the electrode and drain electrode is formed through a process of processing the same conductive film. and an upper electrode connected to the lower electrode. The third insulating film and the fourth insulating film are formed through a process of forming the same insulating film. That is, the capacitor 790 functions as a dielectric between the pair of electrodes. It has a laminated structure in which an insulating film is sandwiched between the insulating film and the substrate.

[0401] 43 and 44, the transistor 750, the transistor 752, and the capacitor A planarization insulating film 770 is provided on the capacitor 790 .

[0402] The planarization insulating film 770 may be made of a polyimide resin, an acrylic resin, or a polyimide amide resin. Heat-resistant organic materials such as benzocyclobutene resin, polyamide resin, and epoxy resin It should be noted that by stacking multiple insulating films made of these materials, Alternatively, the planarization insulating film 770 may be formed. That's fine.

[0403] 43 and 44, the transistor 750 and the The transistor 752 in the source driver circuit portion 704 has the same structure as the transistor 752 in the source driver circuit portion 704. However, the present invention is not limited to this. For example, the pixel section 702 and the source A transistor different from that used in the driver circuit section 704 may be used.

[0404] Note that different transistors are used for the pixel portion 702 and the source driver circuit portion 704. In this case, the staggered transistor and the inverted staggered transistor described in Embodiment 1 may be used. Specifically, a staggered transistor may be used in the pixel portion 702. a configuration in which an inverted staggered transistor is used in the source driver circuit portion 704; Alternatively, an inverted staggered transistor is used in the pixel portion 702, and a source driver circuit portion 704 is used. A configuration using staggered transistors is also possible. The path section 704 may be read as a gate driver circuit section.

[0405] Here, a reverse switch that can be used in the pixel portion 702 or the source driver circuit portion 704 is A hoop-type transistor is shown in FIGS.

[0406] FIG. 45(A) is a top view of the transistor 300A, and FIG. 45(B) is a top view of the transistor 300A. 45(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 5(A) along the dashed line Y1-Y2 in FIG. In (A), in order to avoid complication, some of the components of the transistor 300A are The insulating film (which functions as a gate insulating film, etc.) is omitted in the illustration. When the -X2 direction is called the channel length direction and the dashed dotted line Y1-Y2 direction is called the channel width direction Note that the top views of the transistors shown in FIG. Similarly, some of the components may be omitted in the drawings.

[0407] The transistor 300A includes a conductive film 304 over a substrate 302, which functions as a gate electrode, and An insulating film 306 on the substrate 302 and the conductive film 304, an insulating film 307 on the insulating film 306, and an insulating film The oxide semiconductor film 308 on the insulating film 307 and the solder joints electrically connected to the oxide semiconductor film 308 are The conductive film 312a serving as a source electrode and the oxide semiconductor film 308 and a conductive film 312b functioning as a drain electrode. More specifically, an insulating film 3 is formed on the conductive films 312a and 312b and the oxide semiconductor film 308. The insulating films 314, 316, and 318 are provided. It functions as a protective insulating film for the transistor 300A.

[0408] FIG. 46(A) is a top view of the transistor 300B, and FIG. 46(B) is a top view of the transistor 300B. 46(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 6(A) along the dashed line Y1-Y2.

[0409] The transistor 300B includes a conductive film 304 over a substrate 302, which functions as a gate electrode, and An insulating film 306 on the substrate 302 and the conductive film 304, an insulating film 307 on the insulating film 306, and an insulating film The oxide semiconductor film 308 on the insulating film 307, the insulating film 314 on the oxide semiconductor film 308, The insulating film 316 on the insulating film 314 and the opening 34 provided in the insulating film 314 and the insulating film 316 A conductive film serving as a source electrode electrically connected to the oxide semiconductor film 308 through the conductive film 1a. The oxide film 312a is oxidized through the opening 341b provided in the insulating film 314 and the insulating film 316. a conductive film 312b functioning as a drain electrode electrically connected to the compound semiconductor film 308; In addition, the transistor 300B, more specifically, the conductive films 312a, 312b, An insulating film 318 is provided on the insulating film 316. The insulating films 314 and 316 are The insulating film 318 functions as a protective insulating film for the oxide semiconductor film 308. It functions as a protective insulating film for the capacitor 300B.

[0410] The transistor 300A has a channel-etched structure, whereas the transistor 300B has a channel-etched structure. The transistor 300B shown in (A), (B), and (C) has a channel protection structure.

[0411] FIG. 47(A) is a top view of the transistor 300C, and FIG. 47(B) is a top view of the transistor 300C. 47(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 7(A) along the dashed line Y1-Y2.

[0412] The transistor 300C is insulated from the transistor 300B shown in FIGS. The insulating films 314 and 316 of the transistor 300C have different shapes. The insulating film 316 is provided in an island shape on the channel region of the oxide semiconductor film 308. The structure is similar to that of the transistor 300B.

[0413] FIG. 48(A) is a top view of the transistor 300D, and FIG. 48(B) is a top view of the transistor 300D. 48(C) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 8(A) along the dashed line Y1-Y2.

[0414] The transistor 300D has a conductive film 300A on a substrate 302, which functions as a first gate electrode. 4, an insulating film 306 on the substrate 302 and the conductive film 304, and an insulating film 307 on the insulating film 306. an oxide semiconductor film 308 on the insulating film 307; and an insulating film 314 on the oxide semiconductor film 308. and an insulating film 316 over the insulating film 314 and a source electrode electrically connected to the oxide semiconductor film 308. The conductive film 312a serving as a gate electrode and the gate electrode electrically connected to the oxide semiconductor film 308 are The conductive film 312b functions as a drain electrode, and the conductive films 312a and 312b and the insulating film 31 6, and conductive films 320a and 320b on the insulating film 318.

[0415] In the transistor 300D, the insulating films 314, 316, and 318 are It also functions as a second gate insulating film for the transistor 300D. In this case, the conductive film 320a functions as a pixel electrode used in the display device. The conductive film 320a is connected to the insulating films 314, 316, and 318 through openings 342c. In the transistor 300D, the conductive film 320b is connected to the conductive film 312b. , which functions as a second gate electrode (also called a back gate electrode).

[0416] As shown in FIG. 48(C), the conductive film 320b is formed on the insulating films 306, 307, 314, In the openings 342a and 342b formed in the gate electrodes 316 and 318, Therefore, the conductive film 320b and the conductive film 304 are connected to each other. The same potential is applied.

[0417] In the transistor 300D, openings 342a and 342b are provided, and the conductive film 3 Although the configuration in which 20b and the conductive film 304 are connected has been exemplified, the present invention is not limited to this. , only one of the openings 342a and 342b is formed, and the conductive film 3 20b and the conductive film 304 are connected, or openings 342a and 342b are provided. In this case, the conductive film 320b and the conductive film 304 may not be connected to each other. In the case where the conductive film 320b is not connected to the conductive film 304, the conductive film 320b and the conductive film 304 are Each of the electrodes can be given a different potential.

[0418] The transistor 300D has the S-channel structure described above.

[0419] In addition, the oxide semiconductor film included in the transistor 300A shown in FIGS. 308 may have a multi-layer structure. An example of this case is shown in Figure 49(A)(B)(C)(D) ) shown.

[0420] 49(A) and (B) are cross-sectional views of the transistor 300E, and FIGS. 49(C) and (D) are cross-sectional views of the transistor 300E. 1 and 2 are cross-sectional views of the transistor 300F. The diagram is similar to the transistor 300A shown in FIG.

[0421] The oxide semiconductor film 308 included in the transistor 300E shown in FIGS. 49A and 49B is an oxide semiconductor film. an oxide semiconductor film 308_1, an oxide semiconductor film 308_2, and an oxide semiconductor film 308_3 49(C)(D) has an oxide semiconductor The oxide semiconductor film 308 includes an oxide semiconductor film 308_2 and an oxide semiconductor film 308_3.

[0422] Note that the conductive film 304, the insulating film 306, the insulating film 307, the oxide semiconductor film 308, and the conductive film 3 12a, a conductive film 312b, an insulating film 314, an insulating film 316, an insulating film 318, and a conductive film 32 320a and 320b are the conductive film 114 and the insulating film 11 described in the first embodiment, respectively. 6, insulating film 110, oxide semiconductor film 108, conductive film 120a, conductive film 120b, insulating film 1 04, the insulating film 118, the insulating film 116, and the conductive film 114. good.

[0423] In addition, the structures of the transistors 300A to 300F can be freely combined. They may also be used in combination.

[0424] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed through the same process as the conductive film that functions as the transistor. A conductive film formed through a process different from that of the source electrode and drain electrode of 750, 752, e.g. For example, an oxide semiconductor film formed through the same process as an oxide semiconductor film functioning as a gate electrode may be used. For example, when a material containing copper is used as the signal line 710, There is little signal delay caused by line resistance, making it possible to display on a large screen.

[0425] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed through the same process as the conductive film that functions as the drain electrode. , and is electrically connected to a terminal of the FPC 716 via an anisotropic conductive film 780 .

[0426] The first substrate 701 and the second substrate 705 may be made of, for example, glass. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0427] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. The distance (cell gap) between the first substrate 701 and the second substrate 705 is controlled. It should be noted that the structures 778 may be spherical spacers.

[0428] On the second substrate 705 side, there is a light-shielding film 738 that functions as a black matrix, A colored film 736 that functions as a color filter, a light-shielding film 738, and a film that contacts the colored film 736 An insulating film 734 is provided.

[0429] <4-2. Configuration example of a display device using a liquid crystal element> The display device 700 shown in FIG. 43 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film The conductive film 774 is formed on the second substrate 705. The display device 700 shown in FIG. The alignment state of the liquid crystal layer 776 changes depending on the voltage applied to the conductive film 772 and the conductive film 774. This controls whether light is transmitted or not, allowing images to be displayed.

[0430] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is connected to a conductive film that functions as a pixel electrode. The conductive film 772 functions as a reflective electrode, that is, one of the electrodes of the display element. The display device 700 shown in FIG. 43 uses external light and emits light through a conductive film 772. and displays the reflected light through the colored film 736, which is a so-called reflective color liquid crystal display device.

[0431] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a light-transmitting property in visible light can be used. For example, a material containing one of the elements selected from indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum In this embodiment, the conductive film 772 may be formed using a material containing silver or silver. A conductive film that is reflective in visible light is used.

[0432] In the display device 700 shown in FIG. 43, the planarization insulating film 770 of the pixel section 702 The unevenness is formed in a part of the surface. For example, the planarization insulating film 770 is made of a resin film. The resin film can be formed by providing irregularities on the surface thereof. The conductive film 772 is formed along the irregularities. When light is incident on the conductive film 772, the light can be diffused on the surface of the conductive film 772. It can improve the performance.

[0433] The display device 700 shown in FIG. 43 is a reflective color liquid crystal display device. However, the conductive film 772 is not limited to this. For example, the conductive film 772 may be a conductive film that transmits visible light. A transmissive color liquid crystal display device may be formed by using the above. In this case, the unevenness provided in the planarization insulating film 770 does not necessarily have to be provided.

[0434] Although not shown in FIG. 43, the conductive films 772 and 774 are in contact with the liquid crystal layer 776. Although not shown in FIG. Optical members (optical substrates) such as optical members, phase difference members, and anti-reflection members may be provided as appropriate. For example, circularly polarized light produced by a polarizing substrate and a retardation substrate may be used. Critters, sidelights, etc. may also be used.

[0435] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, The liquid crystals that can be used include polymer dispersed liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, the liquid crystal material can be in a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0436] In addition, when the in-plane switching method is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. Therefore, in order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. Since the liquid crystal display has a short rotational speed and is optically isotropic, no alignment treatment is required. Since the rubbing process is unnecessary, electrostatic damage caused by the rubbing process is prevented. This can prevent defects and damage to the liquid crystal display device during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have little viewing angle dependency.

[0437] When a liquid crystal element is used as a display element, a TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero) lectric Liquid Crystal) mode, AFLC (AntiFerr It can be used in dielectric liquid crystal mode. .

[0438] Furthermore, normally black type liquid crystal display devices, such as those employing vertical alignment (VA) mode, The vertical alignment mode may be a transmission type liquid crystal display device. For example, MVA (Multi-Domain Vertical Alignment) ) mode, PVA (Patterned Vertical Alignment) mode Mode, ASV mode, etc. can be used.

[0439] <4-3. Display devices using light-emitting elements> The display device 700 shown in FIG. 44 includes a light-emitting element 782. The light-emitting element 782 includes a conductive film The display device 700 shown in FIG. The EL layer 786 of the light element 782 emits light, thereby displaying an image. The EL layer 786 includes an organic compound or an inorganic compound such as quantum dots.

[0440] Materials that can be used for the organic compound include fluorescent materials and phosphorescent materials. In addition, materials that can be used for quantum dots include colloidal quantum dots. materials, alloy-type quantum dot materials, core-shell-type quantum dot materials, core-type quantum dot materials, Also, the elements of the 12th and 16th families, the 13th and 15th families, or the 14th and 16th families Materials containing the element group may also be used. Alternatively, cadmium (Cd), selenium (Se), Zinc (Zn), sulfur (S), phosphorus (P), indium (In), tellurium (Te), lead (P b) Quantum atoms with elements such as gallium (Ga), arsenic (As), and aluminum (Al). Dot material may also be used.

[0441] The conductive film 784 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 784 is connected to a conductive film that functions as a pixel electrode. The conductive film 784 functions as an electrode, that is, one electrode of the display element. In this case, a conductive film that is light-transmitting or a conductive film that is reflective to visible light can be used. Examples of conductive films that are transparent to visible light include indium (In) and zinc (Zn). It is recommended to use a material containing one of the following elements: (Zn) and tin (Sn). As the reflective conductive film, for example, a material containing aluminum or silver is preferably used. stomach.

[0442] 44, the display device 700 has an insulating film over the planarization insulating film 770 and the conductive film 784. An insulating film 730 is provided. The insulating film 730 covers part of the conductive film 784. 782 has a top emission structure. Therefore, the conductive film 788 has a light transmitting property, and It transmits light emitted by the L layer 786. In this embodiment, the top emission The structure is exemplified, but is not limited to, for example, a bottom emission structure in which light is emitted to both the conductive film 784 and the conductive film 788; It can also be applied to al-emission structures.

[0443] A colored film 736 is provided at a position overlapping the light-emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided in the position where the light-shielding film 738 is to be drawn, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display device 700 shown in FIG. 1, a configuration in which a colored film 736 is provided is exemplified. For example, when the EL layer 786 is formed by coloring, The film 736 may not be provided.

[0444] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0445] (Embodiment 5) In this embodiment, it is possible to retain the stored contents even when power is not supplied, and writing is possible. An example of a circuit configuration of a semiconductor device with no limit on the number of times of reading will be described with reference to FIG.

[0446] <5-1. Circuit configuration> FIG. 50 is a diagram illustrating the circuit configuration of a semiconductor device. In FIG. 50, the first wiring ( 1st Line) and the source electrode or drain electrode of the p-type transistor 1280a The other side is electrically connected to the source electrode of the p-type transistor 1280a. The other of the source and drain electrodes of the n-type transistor 1280b is connected to the source or drain electrode of the n-type transistor 1280c. The source voltage of the n-type transistor 1280b is electrically connected to one of the electrodes. The other of the electrode or drain electrode of the n-type transistor 1280c is connected to the source electrode or drain electrode of the n-type transistor 1280d. The electrode is electrically connected to one of the electrodes.

[0447] Also, the second wiring (2nd Line) and the source electrode of the transistor 1282 or The source electrode of the transistor 1282 is electrically connected to one of the drain electrodes. The other of the source electrode or drain electrode, one of the electrodes of the capacitor element 1281, and the n-type transistor The gate electrode of the capacitor 1280c is electrically connected to the gate electrode of the capacitor 1280a.

[0448] Also, a third wiring (3rd Line), a p-type transistor 1280a, and an n-type transistor The gate electrode of the transistor 1280b is electrically connected to the fourth wiring (4 th Line) and the gate electrode of the transistor 1282 are electrically connected. In addition, the fifth wiring (5th Line), the other electrode of the capacitor element 1281, and the n-type transistor The other of the source electrode and the drain electrode of the transistor 1280c is electrically connected. Also, the sixth line (6th Line) and the source of the p-type transistor 1280a The other of the electrode or drain electrode of the n-type transistor 1280b is It is electrically connected to one of the inner electrodes.

[0449] Note that the transistor 1282 is made of an oxide semiconductor (OS). Therefore, in FIG. 50, the transistor The symbol "OS" is added to the transistor 1282. Note that the transistor 1282 is made of an oxide semiconductor. It may be formed from materials other than those.

[0450] In addition, in FIG. 50, the other of the source electrode and the drain electrode of the transistor 1282 and one of the electrodes of the capacitor element 1281 and the gate electrode of the n-type transistor 1280c. The connection point is labeled as a floating node (FN). By turning it off, the floating node, one of the electrodes of the capacitor 1281, and the n The potential applied to the gate electrode of the transistor 1280c can be maintained.

[0451] In the circuit configuration shown in FIG. 50, the potential of the gate electrode of the n-type transistor 1280c can be maintained. By taking advantage of this feature, it is possible to write, store, and read information as follows: do.

[0452] <5-2. Writing and storing information> First, writing and holding of data will be described. The potential is set to turn on the transistor 1282, and the transistor 1282 is turned on. As a result, the potential of the second wiring is applied to the gate electrode of the n-type transistor 1280c and the capacitor 12 That is, a predetermined voltage is applied to the gate electrode of the n-type transistor 1280c. After that, the potential of the fourth wiring is applied to the transistor 1282. The transistor 1282 is turned off by applying a potential to the n-type transistor 1281. The charge applied to the gate electrode of transistor 1280c is retained (retention).

[0453] Since the off-state current of the transistor 1282 is extremely small, the The charge on the gate electrode is retained for a long time.

[0454] <5-3. Reading information> Next, the reading of information will be explained. At this time, the p-type transistor 1280a is turned on and the n-type transistor 1280b is turned off. At this time, the potential of the first wiring is applied to the sixth wiring. When the potential is set to a high level potential, the p-type transistor 1280a is turned off, and the n The transistor 1280b is turned on. At this time, the floating node (FN) The sixth wire has a different potential depending on the amount of charge stored. By looking at the position, the stored information can be read (read).

[0455] In addition, the transistor 1282 has an oxide semiconductor for a channel formation region. The transistor 1282 using an oxide semiconductor has a low off-state current. The off-state current is less than 1 / 100,000 of that of transistors made of silicon semiconductors. Since the transistor 1282 is a It is possible to ignore the loss of the stored charge. A non-volatile memory circuit that can retain information even without power supply using transistor 1282 It is possible to achieve the following.

[0456] Furthermore, a semiconductor device using such a circuit configuration may be used as a register, a cache memory, or the like. By using it in a storage device, it is possible to prevent the loss of data in the storage device due to a power supply interruption. In addition, after the supply of power voltage is resumed, the state before the power supply was stopped can be restored in a short time. Therefore, the entire storage device or one or more components constituting the storage device can be In logic circuits, power can be stopped even for a short time when in standby mode, so power consumption is reduced. It is possible to reduce power consumption.

[0457] As described above, the configurations, methods, etc. shown in this embodiment may be different from the configurations, methods, etc. shown in other embodiments. They can be used in appropriate combinations.

[0458] (Embodiment 6) In this embodiment, a configuration of a pixel circuit that can be used in a semiconductor device of one embodiment of the present invention will be described. This will be explained below with reference to FIG. 51(A).

[0459] <6-1. Pixel circuit configuration> FIG. 51(A) is a diagram illustrating the configuration of a pixel circuit. The circuit shown in FIG. an electric conversion element 1360, a transistor 1351, a transistor 1352, and a transistor 13 53 and transistor 1354.

[0460] The anode of the photoelectric conversion element 1360 is connected to the wiring 1316, and the cathode is connected to the transistor The source electrode or the drain electrode of the transistor 1351 is connected to the The other of the source electrode and the drain electrode is connected to the charge storage section (FD), and the gate electrode is The source electrode or drain electrode of the transistor 1352 is connected to the line 1312 (TX). One of the electrodes is connected to the wiring 1314 (GND), and the other of the source electrode or drain electrode is The gate electrode is connected to one of the source electrode and the drain electrode of the transistor 1354. The source electrode or drain electrode of the transistor 1353 is connected to the charge storage portion (FD). One of the electrodes is connected to the charge storage section (FD), and the other is the source electrode or drain electrode. The gate electrode is connected to the wiring 1311 (RS). The other of the source electrode or drain electrode of 354 is connected to the wiring 1315 (OUT). The port electrode is connected to the wiring 1313 (SE). Note that all of the above connections are electrical connections. do.

[0461] The wiring 1314 may be supplied with a potential such as GND, VSS, or VDD. Here, potential and voltage are relative. Therefore, the magnitude of the GND potential is always However, it is not necessarily 0 volts.

[0462] The photoelectric conversion element 1360 is a light receiving element that generates a current according to the light incident on the pixel circuit. The transistor 1353 functions as a charge storage portion (F The transistor 1354 has a function of controlling charge accumulation in the charge accumulation unit (FD The transistor 1352 has a function of outputting a signal according to the potential of the charge storage portion ( The transistor 1352 has a function of resetting the potential of the pixel It has the function of controlling the selection of the circuit.

[0463] The charge storage unit (FD) is a charge holding node, and the photoelectric conversion element 1360 receives It holds an electrical charge that changes depending on the amount of light.

[0464] The transistor 1352 and the transistor 1354 are connected to the wiring 1315 and the wiring 131 4. Therefore, the wiring 1314 and the transistor 13 52, the transistor 1354, and the wiring 1315 may be arranged in this order. The transistor 1354, the transistor 1352, and the wiring 1315 may be arranged in this order.

[0465] The wiring 1311 (RS) functions as a signal line for controlling the transistor 1353. The wiring 1312 (TX) serves as a signal line for controlling the transistor 1351. The wiring 1313 (SE) is a signal line for controlling the transistor 1354. The wiring 1314 (GND) functions as a reference potential (for example, GND). The wiring 1315 (OUT) functions as a signal line for determining whether the The wiring 1316 functions as a signal line for reading out a signal output from the As a signal line for outputting charges from the storage unit (FD) through the photoelectric conversion element 1360 The wiring 1317 has a charge function and is a low potential line in the circuit of FIG. It has a function as a signal line for resetting the potential of the storage section (FD), and In the circuit, it is a high potential line.

[0466] Next, the configuration of each element shown in FIG. 51(A) will be described.

[0467] <6-2. Photoelectric conversion element> The photoelectric conversion element 1360 contains selenium or a compound containing selenium (hereinafter referred to as a selenium-based material). or silicon-based devices (e.g., devices in which pin-type junctions are formed) In addition, a transistor using an oxide semiconductor and a transistor using selenium can be used. By combining it with a photoelectric conversion element using a material containing preferable.

[0468] <6-3.Transistors> Transistor 1351, transistor 1352, transistor 1353, and transistor Dista 1354 is suitable for amorphous silicon, microcrystalline silicon, polycrystalline silicon, and monocrystalline silicon. Although it is possible to form the transistor using a silicon semiconductor such as an oxide semiconductor, It is preferable to form the transistor having a channel formation region made of an oxide semiconductor. The transistor has the characteristic of showing extremely low off-state current. As a transistor in which a channel formation region is formed, for example, the transistor shown in Embodiment 1 may be used. A star can be used.

[0469] In particular, the transistor 1351 connected to the charge storage unit (FD) and the transistor If the leakage current of 1353 is large, the charge stored in the charge storage section (FD) can be maintained for a long time. Therefore, at least the two transistors should contain an oxide semiconductor. By using a transistor with this structure, unnecessary charge leakage from the charge storage section (FD) is prevented. It can be stopped.

[0470] Furthermore, the transistor 1352 and the transistor 1354 also have a large leakage current. If the voltage is too high, unnecessary charge will be output to the wiring 1314 or wiring 1315. A transistor in which a channel formation region is formed using an oxide semiconductor is used as the transistor. It is preferable.

[0471] FIG. 51A illustrates a transistor having one gate electrode. However, the present invention is not limited to this, and for example, a configuration having a plurality of gate electrodes may be used. As a transistor having a gate electrode, for example, a semiconductor in which a channel forming region is formed is used. a first gate electrode and a second gate electrode (also called a back gate electrode) overlapping the body membrane; The back gate electrode may have, for example, a first gate electrode and The same potential, floating potential, or a potential different from that of the first gate electrode may be applied.

[0472] <6-4. Circuit operation timing chart> Next, an example of the circuit operation of the circuit shown in FIG. 51(A) will be explained with reference to the timing shown in FIG. 51(B). This will be explained using a diagram.

[0473] For the sake of simplicity, in FIG. 51(B), the potential of each wiring is given as a signal that changes between two values. However, since each potential is an analog signal, it is not limited to binary values ​​and may be various values ​​depending on the situation. Note that the signal 1401 shown in FIG. 51B is the potential of the wiring 1311 (RS). The signal 1402 is the potential of the wiring 1312 (TX), and the signal 1403 is the potential of the wiring 1313 (SE). The potential of the charge storage unit (FD) is the signal 1404, and the potential of the wiring 1315 (OUT The potential of the wiring 1316 is always "Low" and the potential of the wiring 1317 is always "Low". is always set to "High".

[0474] At time A, the potential of the wiring 1311 (signal 1401) is set to “High” and the potential of the wiring 1312 When the potential (signal 1402) of the charge storage section (FD) is set to "High", the potential (signal 14 04) is initialized to the potential of the wiring 1317 ("High"), and the reset operation begins. The potential of the wiring 1315 (signal 1405) is precharged to "High". .

[0475] At time B, when the potential of the wiring 1311 (signal 1401) is set to "Low", the reset The operation ends and the accumulation operation begins. As a result, the potential (signal 1404) of the charge storage section (FD) is When the photoelectric conversion element 1360 is irradiated with light, the reverse current increases, The rate at which the potential (signal 1404) of the charge storage section (FD) drops varies depending on the amount of light irradiated. That is, the transistor 135 The channel resistance between the source and drain of 4 changes.

[0476] At time C, when the potential of the wiring 1312 (signal 1402) is set to "Low", the accumulation operation The potential (signal 1404) of the charge storage unit (FD) becomes constant. is determined by the amount of charge generated by the photoelectric conversion element 1360 during the accumulation operation. It changes depending on the amount of light that is irradiated onto the conversion element 1360. Also, the transistor 135 1 and a transistor 1353 are transistors each having a channel formation region formed of an oxide semiconductor. Since it is composed of transistors with extremely low It is possible to keep the potential of the charge storage section (FD) constant until

[0477] When the potential of the wiring 1312 (signal 1402) is set to "Low", The potential of the charge storage section (FD) changes due to the parasitic capacitance between the charge storage section (FD) and the FD. If the change in the potential is large, the photoelectric conversion element 136 may Therefore, the amount of charge generated by 0 cannot be accurately obtained. , the gate electrode-source electrode (or gate electrode-drain electrode) of the transistor 1351 ) capacitance, increasing the gate capacitance of the transistor 1352, and ) is an effective measure. The change in potential is assumed to be negligible due to the measures taken.

[0478] At time D, when the potential of the wiring 1313 (signal 1403) is set to "High", the transistor The transistor 1354 becomes conductive, and the selection operation starts. The wiring 1314 and the wiring 1315 become conductive. The potential of the wiring 1315 ( The signal 1405) decreases. Note that the precharge of the wiring 1315 is completed before time D. Here, the rate at which the potential of the wiring 1315 (signal 1405) decreases is It depends on the current between the source and drain electrodes of transistor 1352. It changes depending on the amount of light irradiated onto the photoelectric conversion element 1360 during operation.

[0479] At time E, when the potential of the wiring 1313 (signal 1403) is set to "Low", the transistor The resistor 1354 is cut off, and the selection operation is completed. The potential of the wiring 1315 (signal 1405) , becomes a constant value. Here, the constant value is determined by the amount of light irradiated onto the photoelectric conversion element 1360. Therefore, by acquiring the potential of the wiring 1315, The amount of light irradiated onto the photoelectric conversion element 1360 can be known.

[0480] More specifically, when the light irradiating the photoelectric conversion element 1360 is strong, the charge accumulation portion (F D), i.e., the gate voltage of transistor 1352, drops. The current flowing between the source electrode and the drain electrode of the transistor 1352 becomes small, and the wiring 1315 Therefore, the potential of the signal 1405 is relatively low from the wiring 1315. A high potential can be read out.

[0481] Conversely, when the light irradiating the photoelectric conversion element 1360 is weak, the potential of the charge storage section (FD) , that is, the gate voltage of transistor 1352 becomes high. The current flowing between the source electrode and the drain electrode of 352 increases, and the potential of the wiring 1315 ( Therefore, a relatively low potential is read from the wiring 1315. You can put it out.

[0482] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiment modes. It is Noh.

[0483] (Embodiment 7) In this embodiment, a display device including a semiconductor device of one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0484] 7. Circuit configuration of display device The display device shown in FIG. 52(A) has a region having pixels of a display element (hereinafter referred to as a pixel portion 502). ) and a circuit section ( hereinafter referred to as a drive circuit section 504), and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 50 6) and a terminal portion 507. Note that the protection circuit 506 is not provided in the configuration. That's fine.

[0485] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or all of the pixel portion 502 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 504 is COG or TAB (Tape Automated Bearing). It can be implemented by

[0486] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter referred to as a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a), for supplying signals (data signals) for driving the display elements of the pixels. The source driver 504b includes a driving circuit such as the circuit (hereinafter referred to as a source driver 504b).

[0487] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is inputted through the terminal section 507, and a signal for outputting the shift register is outputted. For example, the gate driver 504a receives a start pulse signal, a clock signal, etc. The gate driver 504a receives a scanning signal and outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 504a are provided, and the plurality of gate drivers 504a drive the scanning lines GL_1 to Alternatively, the gate driver 504a may control the GL_X by dividing it into the initialization signal However, the gate driver 50 has a function of supplying 4a may also provide other signals.

[0488] The source driver 504b includes a shift register and the like. Through the terminal section 507, signals for driving the shift register as well as the source of the data signal are transmitted. The source driver 504b receives a signal (image signal) that is to be output from the pixel circuit The source driver 504b has a function of generating a data signal to be written to the source driver 501. A data signal is generated in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The data lines DL_1 to DL_Y are connected to the data lines DL_2 through DL_Y. Alternatively, the source driver 504b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may also supply other signals. It is possible.

[0489] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a plurality of analog switches, The image signal can be time-divided and output as a data signal. The source driver 504b may be configured using the same.

[0490] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is input via the data line DL, and a data signal is given via one of the data lines DL. Each of the pixel circuits 501 is connected to a gate driver 504a controls writing and holding of data of the data signal. The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or less than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via the input terminal 504a (n is a natural number equal to or less than Y).

[0491] The protection circuit 506 shown in FIG. 52(A) is, for example, a gate driver 504a and a pixel circuit 5 01. Alternatively, the protection circuit 506 is connected to the scanning line GL, which is the wiring between the source driver The data line DL is connected between the driver 504b and the pixel circuit 501. The protection circuit 506 can be connected to the wiring between the gate driver 504a and the terminal section 507. Alternatively, the protection circuit 506 may be formed by wiring between the source driver 504b and the terminal section 507. The terminal section 507 can be connected to a power supply and a line from an external circuit to the display device. This refers to the part where terminals for inputting control signals and image signals are provided.

[0492] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit 506 This is a circuit that brings one wire into electrical continuity with another wire.

[0493] As shown in FIG. 52(A), a pixel section 502 and a driver circuit section 504 are provided with a protection circuit 50. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrents caused by electrostatic discharges and the like. However, the configuration of the protection circuit 506 is not limited to this. For example, A configuration in which a protection circuit 506 is connected, or a configuration in which the protection circuit 506 is connected to the source driver 504b Alternatively, a configuration in which a protection circuit 506 is connected to the terminal portion 507 may be used. It can also be done as follows.

[0494] In FIG. 52(A), the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is implemented. It may also be configured to be equipped with

[0495] Furthermore, the plurality of pixel circuits 501 shown in FIG. 52(A) may be, for example, a configuration shown in FIG. 52(B). It can be said that:

[0496] The pixel circuit 501 shown in FIG. 52B includes a liquid crystal element 570, a transistor 550, and a capacitor. The transistor 550 may be any of the transistors described in the previous embodiments. can be applied.

[0497] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 included in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. One of the electrodes may be given a different potential.

[0498] For example, the display device including the liquid crystal element 570 can be driven in a TN mode, an STN mode, or the like. Mode, VA mode, ASM (Axially Symmetric Aligned Mode) Micro-cell mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liquid Crystal id Crystal) mode, AFLC (AntiFerroelectric Li Quid Crystal) mode, MVA mode, PVA (Patterned Ve Vertical Alignment mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode may also be used. In addition to the above-mentioned driving method, the display device can also be driven by an ECB (Electric Carrier Board) or the like. Ally Controlled Birefringence mode, PDLC (P Polymer Dispersed Liquid Crystal (PNLC) mode (Polymer Network Liquid Crystal) mode, guest However, there are various types of liquid crystal elements and their driving methods, and they are not limited to these. A variety of materials can be used.

[0499] In the pixel circuit 501 in the mth row and the nth column, the source electrode or the drain electrode of the transistor 550 One of the electrodes is electrically connected to the data line DL_n, and the other is connected to a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the electrodes of the scan line G. L_m. The transistor 550 can be turned on or off. This provides a function of controlling the writing of data signals.

[0500] One of the pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

[0501] For example, in a display device having the pixel circuit 501 of FIG. 52(B), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a shown in FIG. 550 is turned on to write data of the data signal.

[0502] The pixel circuit 501 in which data has been written is turned off by turning off the transistor 550. By repeating this process for each row, an image can be displayed.

[0503] Furthermore, the plurality of pixel circuits 501 shown in FIG. 52(A) may be, for example, a configuration shown in FIG. 52(C). It can be said that:

[0504] The pixel circuit 501 shown in FIG. 52C includes transistors 552 and 554 and a capacitor. The transistor 552 and the transistor 554 The transistor described in the above embodiment can be used for either one or both of the above. .

[0505] One of the source and drain electrodes of the transistor 552 is supplied with a data signal. The transistor 5 is electrically connected to a wiring (hereinafter referred to as a data line DL_n). The gate electrode 52 is connected to a wiring (hereinafter referred to as a scanning line GL_m) to which a gate signal is applied. electrically connected.

[0506] Transistor 552 is turned on or off to transfer the data of the data signal. It has the function of controlling the writing of data.

[0507] One of the pair of electrodes of the capacitor 562 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL _a), and the other is electrically connected to the source electrode and drain electrode of the transistor 552. The second electrode is electrically connected to the other of the first and second electrodes.

[0508] The capacitor 562 functions as a storage capacitor for holding written data.

[0509] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. Furthermore, the gate electrode of transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0510] One of the anode and cathode of the light emitting element 572 is electrically connected to the potential supply line VL_b. The other is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0511] The light emitting element 572 may be, for example, an organic electroluminescence element (also known as an organic EL element). However, the light emitting element 572 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0512] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0513] In a display device having the pixel circuit 501 of FIG. 52(C), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0514] The pixel circuit 501 to which the data has been written is turned off by turning off the transistor 552. Furthermore, the potential of the transistor 554 changes depending on the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted at a brightness that corresponds to the flow rate. By repeating this process row by row, an image can be displayed.

[0515] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0516] (Embodiment 8) In this embodiment, the transistors described in the above embodiments can be applied to a circuit configuration. An example will be described with reference to FIGS.

[0517] Note that in this embodiment, the transistor including the oxide semiconductor described in the above embodiment In the following description, the OS transistor is referred to as an OS transistor.

[0518] <8. Inverter circuit configuration example> FIG. 53(A) shows a circuit that can be applied to a shift register, a buffer, etc. included in a driver circuit. 8 shows a circuit diagram of an inverter 800 that can convert the logic of a signal applied to an input terminal IN. The inverter 800 outputs an inverted signal to the output terminal OUT. Signal S BG is a signal for varying the electrical characteristics of the OS transistor .

[0519] 53(B) is a circuit diagram showing an example of the inverter 800. The inverter 800 includes: The inverter 800 includes an OS transistor 810 and an OS transistor 820. It can be fabricated as an n-channel type, and can have a so-called unipolar circuit configuration. Therefore, it can be manufactured at a lower cost than a CMOS inverter.

[0520] The OS transistors 810 and 820 have a first gate that functions as a front gate and a back gate. The second gate acts as a lock gate and the first gate acts as either a source or a drain. It has one terminal, the second terminal functioning as the other of the source or drain.

[0521] The first gate of OS transistor 810 is connected to the second terminal. The second gate of 10 is the signal S BG The OS transistor 810 is connected to a wiring that transmits The first terminal of the OS transistor 810 is connected to a wiring that supplies a voltage VDD. is connected to the output terminal OUT.

[0522] A first gate of the OS transistor 820 is connected to the input terminal IN. The second gate of the OS transistor 820 is connected to the input terminal IN. The second terminal of the OS transistor 820 is connected to the output terminal OUT. is connected to the wiring that gives

[0523] FIG. 53(C) is a timing chart for explaining the operation of the inverter 800. In the timing chart of Figure 53(C), the signal waveform of the input terminal IN and the signal waveform of the output terminal OUT are Signal waveform, signal S BG The signal waveform and the operating state of the OS transistor 810 (FET 810) are shown in FIG. The change in threshold voltage is shown.

[0524] signal S BG is applied to the second gate of the OS transistor 810, 810 threshold voltage (V TH ) can be controlled.

[0525] signal S BG is V TH Voltage V to shift the voltage to the negative side BG_A , V TH Plus Voltage to shift V BG_B The second gate has a voltage V BG_A giving The OS transistor 810 has a threshold voltage V TH_A can be shifted negatively to Also, the second gate is connected to a voltage V BG_B By providing Threshold voltage V TH_B can be shifted positively to

[0526] That is, the OS transistor 810 has a second gate as shown in the graph of FIG. Increasing the voltage can shift the curve to the dashed line 840. By reducing the voltage of the second gate, the curve can be shifted to the solid line 841. can.

[0527] Threshold voltage V TH_B By shifting the voltage to the positive side, the OS transistor 810 As shown in Figure 54(B), the flowing current I B Therefore, when the signal applied to the input terminal IN is high, When the OS transistor 820 is in an ON state (ON), the voltage at the output terminal OUT is Therefore, in the timing chart shown in FIG. In addition, when the voltage VDD is applied, the signal waveform 831 at the output terminal can be made to change sharply. This reduces the through current that flows between the wiring that supplies the voltage VSS and the wiring that supplies the voltage VSS. Therefore, it is possible to operate with low power consumption.

[0528] Also, the threshold voltage V TH_A By shifting it negatively, the OS transistor 81 0 can be made a state in which current flows easily. As shown in Figure 54(C), The current I A At least the current I B Therefore, the input When the signal applied to the terminal IN is at a low level, the OS transistor 820 is in an off state (OFF). Therefore, the voltage at the output terminal OUT can be increased sharply. In the timing chart shown in FIG. 1, the signal waveform 832 at the output terminal can be made to change sharply. can.

[0529] In addition, signal S BG V of the OS transistor 810 TH Control is OS transistor 8 It is preferable to perform this before the state of 20 is switched, that is, before time T1 or T2. For example, as shown in Figure 53(C), when the signal applied to the input terminal IN is switched to high level, Before the time T1 at which the threshold voltage V TH_AFrom the threshold voltage V TH_B To O It is preferable to switch the threshold voltage of the S transistor 810. Also, FIG. As shown in the figure, the signal applied to the input terminal IN is switched to low level at time T2. Before, the threshold voltage V TH_B to threshold voltage V TH_A The OS transistor 810 It is preferable to switch the threshold voltage.

[0530] In the timing chart of FIG. 53(C), the signal changes depending on the signal applied to the input terminal IN. No. S BG However, other configurations may be used. For example, the threshold voltage The control voltage is applied to the second gate of the OS transistor 810 in a floating state. An example of a circuit configuration that can realize this configuration is shown in FIG. Shown in (A).

[0531] In FIG. 55A, in addition to the circuit configuration shown in FIG. 53B, an OS transistor 850 The first terminal of OS transistor 850 is connected to the second gate of OS transistor 810. The second terminal of the OS transistor 850 is connected to a voltage V BG_B (or electricity Pressure V BG_A The first gate of the OS transistor 850 is connected to a wiring that provides a signal No. S F The second gate of the OS transistor 850 is connected to a line that supplies a voltage V BG _B (or voltage V BG_A ) is connected to the wire that gives

[0532] The operation of FIG. 55(A) will be explained using the timing chart of FIG. 55(B).

[0533] As in FIG. 53C, the voltage for controlling the threshold voltage of the OS transistor 810 is The OS transistor is turned on before time T3 when the signal applied to the input terminal IN is switched to high level. The signal S is supplied to the second gate of the transistor 810. F OS transaction at a high level Transistor 850 is turned on, and node N BG Voltage V to control the threshold voltage B G_B Give.

[0534] Node N BG is the voltage V BG_B After this, the OS transistor 850 is turned off. The OS transistor 850 has an extremely small off-state current and can be kept in an off state. So, once node N BG The voltage V BG_B Therefore, The second gate of the OS transistor 850 is connected to a voltage V BG_B Because the number of actions to give is reduced, Voltage V BG_B Therefore, the power consumption required for rewriting the data can be reduced.

[0535] In the circuit configurations of FIGS. 53B and 55A, the second We have shown a configuration in which the voltage applied to the gate is controlled externally, but we will also consider other configurations. For example, a voltage for controlling the threshold voltage may be applied to the input terminal IN. and may be provided to the second gate of the OS transistor 810. An example of a circuit configuration that can realize this configuration is shown in FIG.

[0536] In Fig. 56(A), the input terminal IN and the OS transistor are connected in the circuit configuration shown in Fig. 53(B). A CMOS inverter 860 is provided between the second gate of the transistor 810 and the CMOS inverter 860. The input terminal of the CMOS inverter 860 is connected to the input terminal IN. The output terminal is connected to the second gate of OS transistor 810 .

[0537] The operation of FIG. 56(A) will be explained using the timing chart of FIG. 56(B). In the timing chart of Figure 56(B), the signal waveform of the input terminal IN and the signal waveform of the output terminal OUT are 8, the output waveform IN_B of the CMOS inverter 860, and the output waveform IN_B of the OS transistor 810 ( FET 810).

[0538] The output waveform IN_B, which is the signal obtained by inverting the logic of the signal applied to the input terminal IN, is shown in Figure 53( As in C), the threshold voltage of the OS transistor 810 can be controlled. As described in FIGS. 4(A) to 54(C), the threshold voltage of the OS transistor 810 is For example, at time T4 in FIG. 56(B), the voltage applied to the input terminal IN is When the signal is at a high level, the OS transistor 820 is turned on. Therefore, the OS transistor 810 is in a state where it is difficult for a current to flow. This allows the voltage at the output terminal OUT to drop sharply.

[0539] At time T5 in FIG. 56(B), the signal applied to the input terminal IN becomes low level. At this time, the OS transistor 820 is turned off. Therefore, the OS transistor 810 can be made to be in a state where current easily flows. This allows the voltage at the output terminal OUT to rise sharply.

[0540] As described above, in the configuration of this embodiment, the inverter having the OS transistor The back gate voltage is switched according to the logic of the signal at the input terminal IN. By using this configuration, the threshold voltage of the OS transistor can be controlled. The threshold voltage of the OS transistor is controlled by the signal given to IN. This makes it possible to make the OUT voltage change steeper. This allows for a reduction in current, thereby enabling lower power consumption.

[0541] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0542] (Embodiment 9) In this embodiment, an input / output device of one embodiment of the present invention will be described with reference to FIGS.

[0543] <9. Example of input / output device configuration> The input / output device of one embodiment of the present invention has a function of displaying an image, a function as a touch sensor, and , and is an in-cell type touch panel having the same structure.

[0544] The display element included in the input / output device of one embodiment of the present invention is not limited to a liquid crystal element, a MEMS (Metal-Electro-Mechanical Systems), or the like. Optical elements using micro electromechanical systems , organic EL (Electro Luminescence) elements and light-emitting diodes (LE D: Light Emitting Diode), electrophoretic element, etc. Various elements can be applied as display elements.

[0545] In this embodiment, a transmissive liquid crystal display device using a lateral electric field type liquid crystal element is taken as an example. explain.

[0546] There is no limitation on the type of detector element (also referred to as a sensor element) included in the input / output device of one embodiment of the present invention. Various sensors that can detect the proximity or contact of a sensing object such as a finger or stylus, It can be used as a sensing element.

[0547] For example, the sensor types include capacitance type, resistive film type, surface acoustic wave type, and infrared type. Various methods can be used, such as a pressure-sensitive method, an optical method, or the like.

[0548] In this embodiment, an input / output device having a capacitance type detection element will be described as an example. .

[0549] The capacitance type includes the surface capacitance type and the projected capacitance type. The shadow capacitance method includes the self-capacitance method and the mutual capacitance method. This is preferable because it enables simultaneous multi-point detection.

[0550] Representative in-cell touch panels are the hybrid in-cell type and the full in-cell type. The hybrid in-cell type has both a substrate that supports the display element and an opposing substrate. Alternatively, it refers to a configuration in which electrodes constituting the detection element are provided only on the opposing substrate. The cancel-type has a structure in which electrodes that constitute the detection element are provided only on the substrate that supports the display element. The input / output device of one embodiment of the present invention is a full-in-cell touch panel. A cell-type touch panel is preferable because it can simplify the configuration of the opposing substrate.

[0551] In the input / output device of one embodiment of the present invention, an electrode that constitutes a display element may be a sensor element. Since the electrode also serves as the electrode, the manufacturing process can be simplified and the manufacturing cost can be reduced, which is preferable.

[0552] Furthermore, by applying one embodiment of the present invention, a display panel and a sensing element that are separately manufactured can be used. Compared to a structure in which the detector element is fabricated on the opposing substrate, the input / output device is thinner. It is possible to reduce the size and weight of the input / output device, or to reduce the number of parts in the input / output device. Cut.

[0553] Furthermore, the input / output device according to one embodiment of the present invention includes an FPC that supplies a signal for driving a pixel, and a detection Both the FPC that supplies the signals that drive the elements are placed on one of the boards. It is easy to incorporate into electronic devices and it is possible to reduce the number of parts. The FPC may provide signals to drive the pixels and signals to drive the detector elements.

[0554] The configuration of the input / output device of one embodiment of the present invention will be described below.

[0555] [Example 1 of cross-sectional configuration of input / output device] FIG. 57(A) shows a cross-sectional view of two adjacent sub-pixels of an input / output device. The two subpixels shown are subpixels that belong to different pixels.

[0556] As shown in FIG. 57(A), the input / output device includes a transistor 201, a transistor 202, a transistor 203, a transistor 204, a transistor 205, a transistor 206, a transistor 207, a transistor 208, a transistor 209, a transistor 210, a transistor 211, a transistor 212, a transistor 213, a transistor 214, a transistor 215, a transistor 21 The substrate 211 has a transistor 203, a liquid crystal element 207a, etc. 12, insulating films such as insulating film 213, insulating film 215, insulating film 219, etc. are provided.

[0557] For example, a red sub-pixel, a green sub-pixel, and a blue sub-pixel may be used. By configuring one pixel, full color display can be performed on the display unit. The colors of the sub-pixels are not limited to red, green, and blue. For example, the pixels may be white, yellow, magenta, etc. Alternatively, sub-pixels that exhibit colors such as black, red, or cyan may be used.

[0558] The transistors 201 and 203 included in the subpixel may be the same as those described in the above embodiment. A standard can be applied.

[0559] The liquid crystal element 207a is in FFS (Fringe Field Switching) mode. The liquid crystal element 207a is a liquid crystal element to which a conductive film 251, a conductive film 252, and The electric field generated between the conductive film 251 and the conductive film 252 causes the liquid crystal 249 to The conductive film 251 can function as a pixel electrode. The conductive film 252 can function as a common electrode.

[0560] By using a conductive material that transmits visible light for the conductive films 251 and 252, The device can function as a transmissive liquid crystal display device. A conductive material that reflects visible light is used for the conductive film 251, and a conductive material that transmits visible light is used for the conductive film 252. This allows the input / output device to function as a reflective liquid crystal display device.

[0561] Examples of conductive materials that transmit visible light include indium (In), zinc (Zn), It is preferable to use a material containing one selected from tin (Sn). Indium tin oxide (ITO), indium zinc Lead oxide, indium oxide with tungsten oxide, indium oxide with tungsten oxide Indium zinc oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide Indium tin oxide doped with silicon oxide, zinc oxide, zinc oxide doped with gallium It is also possible to use a film containing graphene. The film can be formed, for example, by reducing a film containing graphene oxide formed in a film form. .

[0562] It is preferable to use an oxide conductive film for the conductive film 251. The oxide conductive film is preferably a metal element contained in the oxide semiconductor film 223. For example, the conductive film 251 may contain indium. is preferred, and In-M-Zn oxide (M is Al, Ga, Y, or Sn) is more preferred. Similarly, the conductive film 252 preferably contains indium, and is preferably In-M- Zn oxide is more preferred.

[0563] Note that at least one of the conductive films 251 and 252 is formed using an oxide semiconductor. As described above, an oxide semiconductor having the same metal element may be used to construct an input / output device. By using it in two or more layers of the layers that make up the manufacturing equipment (for example, film formation equipment, processing equipment, etc.), It can be used in two or more processes, which reduces manufacturing costs. .

[0564] For example, the insulating film 253 is made of a silicon nitride film containing hydrogen, and the conductive film 251 is made of an oxide semiconductor. When the insulating film 253 is used, the conductivity of the oxide semiconductor is increased by hydrogen supplied from the insulating film 253. It is possible.

[0565] Examples of conductive materials that reflect visible light include aluminum, silver, and metals thereof. Examples of suitable materials include alloys containing the material.

[0566] The conductive film 251 functioning as a pixel electrode is connected to the source or drain of the transistor 203. are electrically connected.

[0567] The conductive film 252 has a comb-like top surface (also referred to as a planar shape) or a slit-like An insulating film 253 is provided between the conductive film 251 and the conductive film 252. The conductive film 251 partially overlaps with the conductive film 252 with the insulating film 253 interposed therebetween. In the region where the conductive film 251 and the colored film 241 overlap, the conductive film 252 is formed on the conductive film 251. It has an undisposed portion.

[0568] A conductive film 255 is provided over the insulating film 253. The conductive film 255 is and can function as an auxiliary wiring for the conductive film 252. By providing auxiliary wiring that electrically connects to the electrode, the voltage drop caused by the resistance of the common electrode is reduced. In this case, the conductive film containing the metal oxide and the conductive film containing the metal can be suppressed. When a laminated structure is used, it is formed by a patterning technique using a halftone mask. This is preferable because it simplifies the process.

[0569] The conductive film 255 may be a film having a lower resistance value than the conductive film 252. For example, molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, silver A single layer is formed using a metal material such as neodymium, scandium, or an alloy material containing these elements. The film may be formed by laminating or stacking.

[0570] The conductive film 255 overlaps with the light-shielding film 243 etc. so as not to be visible to the user of the input / output device. It is preferable that the sensor is provided at a position.

[0571] The colored film 241 has a portion overlapping with the liquid crystal element 207a. The stalk 201 has a portion overlapping with at least one of the stalks 201 and 203.

[0572] The insulating film 245 prevents impurities contained in the colored film 241, the light-shielding film 243, etc. from diffusing into the liquid crystal 249. It is preferable that the insulating film 245 has a function as an overcoat to prevent the If not required, it need not be provided.

[0573] An alignment film is provided on either or both of the upper and lower surfaces of the liquid crystal 249. The alignment film can control the alignment of the liquid crystal 249. For example, as shown in FIG. ), an alignment film may be formed to cover the conductive film 252. An alignment film may be provided between the insulating film 245 and the liquid crystal 249. The layer may have both a function as an alignment film and a function as an overcoat.

[0574] The input / output device also includes a spacer 247. The spacer 247 is provided between the substrate 211 and the substrate It has the function of preventing the distance from approaching 261 more than a certain amount.

[0575] In FIG. 57(A), the spacer 247 is provided on the insulating film 253 and the conductive film 252. However, one embodiment of the present invention is not limited to this example. It may be provided on the insulating film 261 side or on the substrate 261 side. A spacer 247 may be formed on the substrate 45. In FIG. 57(A), the spacer 247 253 and the insulating film 245, the insulating film 253 is in contact with the insulating film 245. It is not necessary for the structure to be in contact with any of the structures.

[0576] Granular spacers may be used as the spacers 247. Granular spacers may be made of silicon. Although materials such as rubber can be used, materials with elasticity such as resin and rubber should be used. At this time, the granular spacers may be crushed in the vertical direction.

[0577] The substrate 211 and the substrate 261 are bonded together by an adhesive layer (not shown). 11, a liquid crystal 249 is sealed in the area surrounded by the substrate 261 and the adhesive layer.

[0578] When the input / output device is made to function as a transmissive liquid crystal display device, the polarizing plate is The light from the backlight placed outside the polarizing plate is polarized. At this time, the voltage applied between the conductive film 251 and the conductive film 252 The orientation of the liquid crystal 249 can be controlled by the polarizer, and the optical modulation of light can be controlled. The intensity of the light emitted through the colored film 241 can be controlled. Therefore, light outside a specific wavelength range is absorbed, and the emitted light is, for example, red, blue, or The light is green.

[0579] In addition to the polarizing plate, for example, a circular polarizing plate can be used. For example, a laminate of a linear polarizer and a quarter-wave retardation plate can be used. This makes it possible to reduce the viewing angle dependency of the display of the input / output device.

[0580] In this example, an element to which the FFS mode is applied is used as the liquid crystal element 207a. Liquid crystal elements using various modes can be used, for example, VA ( Vertical Alignment mode, TN (Twisted Neutrality) c) mode, IPS (In-Plane-Switching) mode, ASM (Axi ally Symmetric aligned Micro-cell) mode, OC B (Optically Compensated Birefringence) mode FLC (Ferroelectric Liquid Crystal) mode, A FLC (AntiFerroelectric Liquid Crystal) mode A liquid crystal element to which the above is applied can be used.

[0581] In addition, normally black type liquid crystal display devices, such as vertical alignment (VA) models, are used as input / output devices. A transmissive liquid crystal display device using a vertical alignment mode may be used. A (Multi-Domain Vertical Alignment) mode, PV A (Patterned Vertical Alignment) mode, ASV mode etc. can be used.

[0582] The liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal. The optical modulation effect of liquid crystal is due to the electric field applied to the liquid crystal (horizontal electric field, vertical electric field The liquid crystal used in the liquid crystal element is , thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, polymer dispersed liquid crystal (PDLC:Po lymer Dispersed Liquid Crystal), ferroelectric liquid crystal, anti- Ferroelectric liquid crystals can be used. These liquid crystal materials can be cholesteric depending on the conditions. These phases include smectic phase, cubic phase, chiral nematic phase, and isotropic phase.

[0583] As the liquid crystal material, either a positive type liquid crystal or a negative type liquid crystal may be used. The optimum liquid crystal material may be selected depending on the mode and design to be used.

[0584] In addition, when the in-plane switching method is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. Therefore, in order to improve the temperature range, a liquid crystal composition containing 5% by weight or more of a chiral agent was used. The liquid crystal composition containing the liquid crystal exhibiting a blue phase and the chiral agent is used as the liquid crystal 249. The response speed is short and the liquid crystal is optically isotropic. The crystal composition does not require alignment treatment and has little viewing angle dependency. Since the rubbing process is unnecessary, electrostatic damage caused by the rubbing process is eliminated. This can prevent defects and damage to the liquid crystal display device during the manufacturing process. .

[0585] Here, a substrate that is directly in contact with a detection object such as a finger or a stylus is located above the substrate 261. In this case, a polarizing plate or a circular polarizing plate may be provided between the substrate 261 and the substrate. In this case, it is preferable to provide a protective layer (ceramic coating, etc.) on the substrate. The protective layer is preferably made of, for example, silicon oxide, aluminum oxide, yttrium oxide, Inorganic insulating materials such as yttria-stabilized zirconia (YSZ) can be used. The substrate may be made of tempered glass. The tempered glass may be made by an ion exchange method, an air-cooling tempering method, or the like. The material is subjected to physical or chemical treatment and has compressive stress applied to its surface. can be done.

[0586] In FIG. 57A, the conductive film 252 of the left subpixel and the conductive film 253 of the right subpixel are By utilizing the capacitance formed between the sensor 52 and the sensor, the proximity or contact of the object to be detected can be detected. That is, in the input / output device of one embodiment of the present invention, the conductive film 252 is a common film for the liquid crystal element. The electrode serves as both the electrode and the electrode of the detection element.

[0587] In this manner, in the input / output device of one embodiment of the present invention, the electrode constituting the liquid crystal element is Since the electrode also serves as a constituent electrode, the manufacturing process can be simplified and the manufacturing cost can be reduced. In addition, the input / output device can be made thinner and lighter.

[0588] The conductive film 252 is electrically connected to a conductive film 255 that functions as an auxiliary wiring. By providing the conductive film 255, the resistance of the electrodes of the sensing element can be reduced. The time constant of the electrodes of the detection element can be reduced by reducing the resistance of the electrodes. The smaller the time constant of the electrodes of the sensing element, the higher the detection sensitivity can be. The degree can be increased.

[0589] In addition, if the capacitance between the electrode of the detection element and the signal line is too large, the time constant of the electrode of the detection element Therefore, a planarization mechanism is installed between the transistor and the electrode of the detector element. It is preferable to provide an insulating film having a function to reduce the capacitance between the electrode of the detection element and the signal line. For example, in FIG. 57(A), an insulating film 219 is used as an insulating film having a planarizing function. By providing the insulating film 219, the capacitance between the conductive film 252 and the signal line can be reduced. This makes it possible to reduce the time constant of the electrodes of the detection element. The smaller the time constant of the element electrodes, the higher the detection sensitivity and, further, the higher the detection accuracy. can be increased.

[0590] For example, the time constant of the electrodes of the sensing element is greater than 0 seconds and is 1×10 -4 seconds or less, preferably 0 seconds or more and 5 x 10 -5 seconds or less, more preferably greater than 0 seconds and 5×10 -6 seconds or less , more preferably greater than 0 seconds and 5 x 10 -7 seconds or less, more preferably greater than 0 seconds and 2 x10 -7 It is preferable that the time constant is 1×10 seconds or less. -6 By setting the time to less than 2 seconds, noise This makes it possible to achieve high detection sensitivity while suppressing the influence of noise.

[0591] [Example of cross-sectional configuration of input / output device 2] FIG. 57(B) shows a cross-sectional view of two adjacent pixels, which is different from FIG. 57(A). The two sub-pixels shown in 7(B) are sub-pixels that belong to different pixels.

[0592] The second structural example shown in FIG. 57B includes a conductive film 251, a conductive film 252, an insulating film 253, and a conductive film 254. The stacking order of the conductive film 255 is different from that of the configuration example 1 shown in FIG. For the same parts as in Configuration Example 1, please refer to the above.

[0593] Specifically, in the second configuration example, a conductive film 255 is provided on the insulating film 219, and a conductive film 255 is provided on the conductive film 255. The conductive film 252 has an insulating film 253 on it, and the conductive film 25 1.

[0594] As shown in FIG. 57B, a liquid crystal element 207b is provided in the upper layer, and a comb-shaped or slit-shaped The conductive film 251 having a shaped upper surface is used as a pixel electrode, and the conductive film 252 provided in the lower layer is used as a common electrode. In this case, the conductive film 251 can be used as a conductive electrode of the transistor 203. It is sufficient if it is electrically connected to the source or drain.

[0595] In FIG. 57B, the conductive film 252 of the left subpixel and the conductive film 253 of the right subpixel are By utilizing the capacitance formed between the sensor 52 and the sensor, the proximity or contact of the object to be detected can be detected. That is, in the input / output device of one embodiment of the present invention, the conductive film 252 is a common film for the liquid crystal element. The electrode serves as both the electrode and the electrode of the detection element.

[0596] In the configuration example 1 (FIG. 57(A)), the conductive film 25 which serves as both the electrode of the detection element and the common electrode 2 is located closer to the display surface (closer to the object to be detected) than the conductive film 251 that functions as a pixel electrode. As a result, the conductive film 251 is positioned closer to the display surface than the conductive film 252 in the configuration example 2. However, in configuration example 1, the detection sensitivity may be improved.

[0597] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0598] (Embodiment 10) In this embodiment, a display module and an electronic device including a semiconductor device according to one embodiment of the present invention will be described. This will be explained using FIGS. 58 to 60.

[0599] <10-1. Display module> The display module 8000 shown in FIG. 58 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003 and Display panel 8006, backlight 8007, frame 8009, printed circuit board 801 0, has battery 8011.

[0600] The semiconductor device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0601] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as needed to fit the size of the 8006.

[0602] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of 006 to make it an optical touch panel.

[0603] The backlight 8007 has a light source 8008. In FIG. Although the configuration in which the light source 8008 is disposed on the base 8007 has been illustrated, the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 8007 may not be provided.

[0604] The frame 8009 has a function of protecting the display panel 8006 and also a function of preventing the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the The frame 8009 may also function as a heat sink.

[0605] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. This can be omitted if a commercial power source is used.

[0606] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided in addition.

[0607] <10-2.Electronic equipment> 59(A) to 59(G) are diagrams showing electronic devices. These electronic devices are A body 9000, a display unit 9001, a speaker 9003, operation keys 9005 (power switch, includes an operation switch), a connection terminal 9006, a sensor 9007 (force, displacement, position, speed, Acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electricity Measures field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared It may have a microphone 9008, etc.

[0608] The electronic devices shown in FIGS. 59(A) to 59(G) can have various functions. For example, functions to display various information (still images, videos, text images, etc.) on the display, Touch panel function, calendar, date or time display function, various software ( It has the function of controlling processing by using a program, wireless communication function, and various functions using wireless communication function. Functions for connecting to computer networks, transmitting various data using wireless communication functions, or receiving the program or data recorded on the recording medium, and It is possible to have a function to display the information on the display unit. The functions that the electronic device shown in the figure can have are not limited to these, and it may have various functions. Although not shown in Figures 59(A) to 59(G), the electronic device may have the following features: The electronic device may have a plurality of display units. The function to take pictures, take videos, and save the images to a recording medium (external or built-in to the camera) ) and a function to display the captured image on the display unit.

[0609] The electronic devices shown in FIGS. 59(A) to 59(G) will be described in detail below.

[0610] FIG. 59(A) is a perspective view showing a television device 9100. 100 is a display unit 9001 having a large screen, for example, 50 inches or more, or 100 inches or more. It is possible to incorporate a display unit 9001 such as the one shown in FIG.

[0611] 59(B) is a perspective view showing a portable information terminal 9101. For example, the device has one or more functions selected from a telephone, a notebook, an information viewing device, etc. Specifically, it can be used as a smartphone. A speaker, a connection terminal, a sensor, and the like may be provided. Image information can be displayed on multiple sides of the screen. For example, three operation buttons 9050 ( Operation icons (also referred to as "icons") can be displayed on one side of the display unit 9001. Also, information 9051 shown in a dashed rectangle can be displayed on the other side of the display unit 9001. Examples of information 9051 include emails and social networking sites (SNS). Display to notify you of incoming calls, e-mails, SNS, etc. Subject, sender name of email or SNS, date and time, time, remaining battery level, antenna reception Or, instead of the information 9051, Alternatively, operation buttons 9050 and the like may be displayed.

[0612] 59(C) is a perspective view showing a portable information terminal 9102. The portable information terminal 9102 is , and has the function of displaying information on three or more surfaces of the display unit 9001. An example is shown in which information 9053 and information 9054 are displayed on different sides. The user of the portable information terminal 9102 stores the portable information terminal 9102 in the breast pocket of the clothes. In this state, the display (information 9053 in this case) can be confirmed. The telephone number or name of the caller is displayed in a position that can be observed from above the mobile information terminal 9102. The user can view the display without taking the mobile information terminal 9102 out of his pocket. You can check the call and decide whether to accept it or not.

[0613] 59(D) is a perspective view showing a wristwatch-type portable information terminal 9200. The 9200 is suitable for mobile phone calls, e-mail, document browsing and writing, music playback, and internet communications. It is possible to run various applications such as computer games. The display surface of the display unit 9001 is curved, and the display is performed along the curved display surface. In addition, the portable information terminal 9200 can perform short-distance wireless communication according to a communication standard. For example, by communicating with a wireless headset, handset The mobile information terminal 9200 also has a connection terminal 9006. It has a connector and can directly exchange data with other information terminals. Charging can also be performed via the connection terminal 9006. It may also be possible to supply power wirelessly without going through 6.

[0614] 59(E), (F), and (G) are perspective views showing a foldable portable information terminal 9201. FIG. 59(E) is a perspective view of the portable information terminal 9201 in an unfolded state, and FIG. (F) shows the mobile information terminal 9201 being changed from one of the unfolded state and the folded state to the other. 59(G) is a perspective view of the portable information terminal 9201 in a folded state. The portable information terminal 9201 is highly portable when folded, and is easily portable when unfolded. When the display is turned on, the seamless, wide display area provides excellent visibility of the display. The display unit 9001 of the display device 01 is made up of three housings 9000 connected by hinges 9055. The two housings 9000 are supported by the hinge 9055. This allows the portable information terminal 9201 to be reversibly transformed from an unfolded state to a folded state. For example, the portable information terminal 9201 can be bent with a radius of curvature of 1 mm or more and 150 mm or less. It can be done.

[0615] 60(A) and 60(B) are perspective views of a display device having a plurality of display panels. FIG. 60(A) is a perspective view of a state in which a plurality of display panels are rolled up, and FIG. 60(B) is a perspective view of a state in which a plurality of display panels are rolled up. ) is a perspective view of a state in which a plurality of display panels are unfolded.

[0616] The display device 9500 shown in FIGS. 60(A) and 60(B) includes a plurality of display panels 9501 and a shaft portion 9 511 and a bearing portion 9512. The plurality of display panels 9501 have a display area 9502 and a light-transmitting region 9503.

[0617] The display panels 9501 are flexible. The filters 9501 are arranged so that they partially overlap each other. The light-transmitting region 9503 of the display panel 9501 can be overlapped. By using the display panel 9501, a large screen display device can be provided. The display panel 9501 can be rolled up depending on the situation, making it a versatile display. It can be a display device.

[0618] 60(A) and 60(B), the display area 9502 is located on the adjacent display panel 950. 1 shows a state in which the display panels are spaced apart, but this is not limited to this. For example, the display panels 9 By overlapping the display areas 9502 of the 501 without any gaps, a continuous display area 9502 is created. You may do so.

[0619] The electronic device described in this embodiment has a display unit for displaying some information. However, the semiconductor device of one embodiment of the present invention is an electronic device that does not have a display portion. It can also be applied to vessels.

[0620] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done. [Explanation of symbols]

[0621] 100 transistors 100A transistor 100B transistor 100C transistor 100D transistor 100E transistor 100F transistor 100G transistor 100H transistor 100J transistor 100K transistors 102 Circuit Board 104 insulating film 106 Conductive film 107 Oxide semiconductor film 108 Oxide semiconductor film 108_1 Oxide semiconductor film 108_2 Oxide semiconductor film 108_3 Oxide semiconductor film 108d Drain region 108f area 108i Channel Area 108s Source Area 110 insulating film 110_0 Insulating film 112 Metal oxide film 112_0 Metal oxide film 112a Conductive film 112b Conductive film 114 Conductive film 114_0 Conductive film 116 Insulating film 118 insulating film 120 Conductive film 120a Conductive film 120b Conductive film 122 insulating film 140 Mask 141a opening 141b opening 143 Opening 145 Impurity elements 201 Transistor 203 Transistor 207a Liquid crystal element 207b Liquid crystal element 211 Substrate 212 insulating film 213 Insulating film 215 insulating film 219 Insulating Film 223 Oxide semiconductor film 241 Colored film 243 Light-shielding film 245 insulating film 247 Spacer 249 LCD 251 Conductive film 252 Conductive film 253 Insulating Film 255 Conductive Film 261 Circuit Board 300A transistor 300B transistor 300C transistor 300D transistor 300E transistor 300F transistor 302 Substrate 304 Conductive film 306 Insulating film 307 Insulating Film 308 Oxide semiconductor film 308_1 Oxide semiconductor film 308_2 Oxide semiconductor film 308_3 Oxide semiconductor film 312a Conductive film 312b Conductive film 314 Insulating film 316 Insulating Film 318 Insulating Film 320a Conductive film 320b Conductive film 341a opening 341b opening 342a opening 342b opening 342c opening 501 pixel circuit 502 pixel section 504 Drive circuit section 504a Gate Driver 504b source driver 506 Protection circuit 507 Terminal section 550 transistors 552 transistor 554 Transistor 560 Capacitor 562 Capacitor 570 Liquid Crystal Devices 572 Light-emitting element 700 Display device 701 PCB 702 pixel section 704 Source driver circuit section 705 PCB 706 Gate driver circuit section 708 FPC terminal section 710 Signal Line 711 Wiring section 712 Sealing material 716 FPC 730 insulating film 732 Sealing film 734 Insulating Film 736 Colored film 738 Light-shielding film 750 transistors 752 transistors 760 connecting electrode 770 Planarization insulating film 772 Conductive film 774 Conductive film 775 Liquid Crystal Elements 776 Liquid Crystal Layer 778 Structure 780 Anisotropic Conductive Film 782 Light-emitting element 784 Conductive Film 786 EL layer 788 Conductive Film 790 Capacitor 800 inverter 810 OS transistor 820 OS transistor 831 Signal Waveform 832 signal waveform 840 dashed line 841 solid line 850 OS transistor 860 CMOS inverter 1280a p-type transistor 1280b n-type transistor 1280c n-type transistor 1281 Capacitor 1282 transistor 1311 Wiring 1312 Wiring 1313 Wiring 1314 Wiring 1315 Wiring 1316 Wiring 1317 Wiring 1351 transistor 1352 transistor 1353 Transistor 1354 transistor 1360 Photoelectric conversion element 1401 Signal 1402 Signal 1403 Signal 1404 Signal 1405 Signal 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery 9000 chassis 9001 Display section 9003 Speaker 9005 Operation key 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Operation button 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9100 Television equipment 9101 Mobile Information Terminal 9102 Mobile Information Terminal 9200 Mobile Information Terminal 9201 Mobile Information Terminal 9500 display device 9501 Display Panel 9502 Display area 9503 area 9511 Shaft 9512 Bearing section

Claims

[Claim 1] A semiconductor device having a transistor, a first insulating film; an oxide semiconductor film on the first insulating film; a second insulating film on the oxide semiconductor film; a metal oxide film on the second insulating film; a gate electrode on the metal oxide film; a third insulating film over the oxide semiconductor film and the gate electrode; the oxide semiconductor film has a channel region overlapping with the gate electrode, a source region in contact with the third insulating film, and a drain region in contact with the third insulating film; The semiconductor device, wherein each of the source region and the drain region comprises one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, or a rare gas.

Images