Abnormality determination device, power conversion device, abnormality determination method, and temperature calculation device

Abstract

To provide a power conversion device capable of improving accuracy of abnormality determination in a heat radiation member.SOLUTION: An abnormality determination device includes an acquisition unit configured to acquire a first loss in a first semiconductor element, a second loss in a second semiconductor element, a first temperature in the first semiconductor element, and a second temperature in a cooling unit in which the first semiconductor element and the second semiconductor element are mounted with a heat dissipation member interposed therebetween, and a determination unit configured to determine whether or not the heat dissipation member is abnormal based on a first set and a second set different from each other among sets of the first loss, the second loss, the first temperature, and the second temperature.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present disclosure relates to an abnormality determination device, a power conversion device, an abnormality determination method, and a temperature calculation device. [Background technology]

[0002] As an abnormality detection device for detecting abnormalities in a power supply device, it is known to determine an abnormality in the heat dissipation path between a semiconductor element and a heat dissipation section based on the power consumption of the semiconductor element, the temperature of the semiconductor element, and the temperature of the heat dissipation section (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-193409 Summary of the Invention [Problem to be solved by the invention]

[0004] In a structure in which a plurality of semiconductor elements are mounted on a cooling section, the accuracy of determining abnormalities in the heat dissipation member between the semiconductor chips and the cooling section may decrease.

[0005] The present disclosure provides an abnormality determination device, a power conversion device, an abnormality determination method, and a temperature calculation device that can improve the accuracy of abnormality determination in a heat dissipation member. [Means for solving the problem]

[0006] According to an embodiment of the present disclosure, an abnormality determination device includes an acquisition unit that acquires a first loss in a first semiconductor element, a second loss in a second semiconductor element, a first temperature in the first semiconductor element, and a second temperature in a cooling unit that mounts the first semiconductor element and the second semiconductor element with a heat dissipation member sandwiched therebetween, and a determination unit that determines whether the heat dissipation member is abnormal based on different first and second sets of the first loss, the second loss, the first temperature, and the second temperature.

[0007] According to an embodiment of the present disclosure, a power conversion device includes a first semiconductor element and a second semiconductor element, a cooling unit that mounts the first semiconductor element and the second semiconductor element with a heat dissipation member sandwiched therebetween, and a determination unit that determines whether the heat dissipation member is abnormal based on different first and second sets of a first loss of power generated in the first semiconductor element, a second loss of power generated in the second semiconductor element, a first temperature in the first semiconductor element, and a second temperature in the cooling unit.

[0008] According to an embodiment of the present disclosure, an abnormality determination method acquires a first loss in a first semiconductor element, a second loss in a second semiconductor element, a first temperature in the first semiconductor element, and a second temperature in a cooling section that mounts the first semiconductor element and the second semiconductor element with a heat dissipation member sandwiched therebetween, and determines whether the heat dissipation member is abnormal based on different first and second sets of the first loss, the second loss, the first temperature, and the second temperature.

[0009] According to an embodiment of the present disclosure, a temperature calculation device includes an average number calculation unit that calculates a number to be averaged based on a first frequency for sampling the temperature of a semiconductor module and a second frequency of a current or voltage supplied to a load, and an averaging unit that calculates an average value of the number of consecutive sampled temperatures in time. [Effects of the Invention]

[0010] According to the present disclosure, the accuracy of determining an abnormality in a heat dissipation member can be improved. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a circuit diagram showing a main circuit section in the first embodiment. [Figure 2] FIG. 2 is a circuit diagram illustrating an example of a semiconductor module according to the first embodiment. [Figure 3] FIG. 3 is a circuit diagram illustrating an example of a semiconductor module according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view of the semiconductor module according to the first embodiment. [Figure 5] FIG. 5 is an equivalent circuit showing the thermal network of the semiconductor module in the first embodiment. [Figure 6] FIG. 6 is a block diagram of the power conversion device according to the first embodiment. [Figure 7] FIG. 7 is a flowchart showing an abnormality determination method executed by the processing unit in the first embodiment. [Figure 8] FIG. 8 is a schematic diagram showing the output, temperature, and loss with respect to time in the second embodiment. [Figure 9] FIG. 9 is a schematic diagram showing the output, temperature, and loss with respect to time in the second embodiment. [Figure 10] FIG. 10 is a block diagram of a power conversion device according to the second embodiment. [Figure 11] FIG. 11 is a flowchart showing a calculation method executed by the processing unit in the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0013] In a structure in which a semiconductor element is mounted on a cooling unit, if an abnormality occurs in the heat dissipation path between the semiconductor element and the cooling unit, such as a portion of the heat dissipation member peeling off, the temperature of the semiconductor element will rise. As disclosed in Patent Document 1, an abnormality in the heat dissipation path can be determined by calculating the thermal resistance of the heat dissipation path. However, in a structure in which multiple semiconductor elements are mounted on a cooling unit, the heat dissipation paths from two semiconductor elements to the cooling unit may merge in the heat dissipation member between the semiconductor element and the cooling unit. In such a case, it is not possible to accurately determine an abnormality in the heat dissipation member. In the following embodiment, an abnormality in the heat dissipation member can be accurately determined.

[0014] (First embodiment) An inverter circuit that converts direct current into three-phase alternating current will be described as an example of the power conversion device. Fig. 1 is a circuit diagram showing a main circuit unit 20 in a first embodiment. The main circuit unit 20 includes a plurality of semiconductor modules 51 to 56, and terminals TP, TN, TU, TV, and TW.

[0015] Semiconductor module 51 is connected between terminals TP and TU and is provided on the upper arm of the u-phase. Semiconductor module 52 is connected between terminals TN and TU and is provided on the lower arm of the u-phase. Semiconductor module 53 is connected between terminals TP and TV and is provided on the upper arm of the v-phase. Semiconductor module 54 is connected between terminals TN and TV and is provided on the lower arm of the v-phase. Semiconductor module 55 is connected between terminals TP and TW and is provided on the upper arm of the w-phase. Semiconductor module 56 is connected between terminals TN and TW and is provided on the lower arm of the w-phase.

[0016] The semiconductor modules 51 to 56 include switching elements Q1 to Q6, respectively, and diodes D1 to D6, respectively. The switching elements Q1 to Q6 and the diodes D1 to D6 are connected in parallel, respectively.

[0017] Terminals TP and TN are supplied with a positive voltage and a negative voltage, respectively, of a DC power supply. Terminals TU, TV, and TW are connected to u-phase, v-phase, and w-phase terminals of a load, respectively. Main circuit unit 20 converts the DC output of the DC power supply supplied between terminals TP and TN into three-phase AC power that is supplied to the load connected to terminals TU, TV, and TW.

[0018] Fig. 2 is a circuit diagram showing an example of a semiconductor module according to the first embodiment. A semiconductor module 50 corresponds to the semiconductor modules 51 to 56 in Fig. 1, a switch element Q0 corresponds to the switch elements Q1 to Q6 in Fig. 1, and a diode D0 corresponds to the diodes D1 to D6 in Fig. 1.

[0019] As shown in Fig. 2, the semiconductor module 50 has a switch element Q0 and a diode D0. The switch element Q0 is, for example, an IGBT (Insulated Gate Bipolar Transistor). The emitter E of the IGBT is connected to the anode of the diode D0, and the collector C of the IGBT is connected to the cathode of the diode D0. A control signal for turning the IGBT on and off is input to the gate G of the IGBT. Because the IGBT does not have an internal diode, a freewheeling diode D0 is provided in addition to the switch element Q1.

[0020] FIG. 3 is a circuit diagram illustrating an example of a semiconductor module according to the first embodiment. As illustrated in FIG. 3, the semiconductor module 50 includes a switch element Q0 and a diode D0. The switch element Q0 is, for example, a silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET). The switch element Q0 includes an FET and an internal diode D0′ connected in parallel. The FET is an N-channel FET. The source S of the FET is connected to the anode of the internal diode D0′, and the drain D of the FET is connected to the cathode of the internal diode D0′. A control signal is input to the gate G of the FET. The diode D0 is connected in parallel to the FET and the internal diode D0′. When the internal diode D0′ is insufficient as a freewheeling diode, as in the case of a SiC MOSFET, a diode D0 is provided in addition to the switch element Q0.

[0021] 2 and 3 are merely examples, and a semiconductor element that functions as a freewheeling diode may be provided in addition to the semiconductor element that functions as the switch element Q0.

[0022] 4 is a cross-sectional view of the semiconductor module according to the first embodiment. As shown in FIG. 4, the semiconductor module 50 includes semiconductor elements 10 and 12, a heat dissipation member 11, a cooling section 18, and a case 19.

[0023] The semiconductor element 10 (first semiconductor element) has a switch element Q0 shown in FIGS. 2 and 3 and has a switching function. The semiconductor element 10 has a temperature detection unit 10A. The temperature detection unit 10A is, for example, a diode that detects the temperature of the semiconductor element 10. The semiconductor element 12 (second semiconductor element) has a diode D0 shown in FIGS. 2 and 3 and has a free wheeling diode function connected in parallel to the semiconductor element 10. The semiconductor elements 10 and 12 are semiconductor chips having a semiconductor substrate such as a SiC substrate or a Si (silicon) substrate.

[0024] The heat dissipation member 11 conducts heat from the semiconductor elements 10 and 12 to the cooling portion 18. The heat dissipation member 11 includes bonding materials 13A, 13B, and 15, an insulating substrate 14, a base substrate 16, and a heat dissipation bonding material 17.

[0025] The bonding materials 13A and 13B bond the lower surfaces (e.g., surfaces to be cooled) of the semiconductor elements 10 and 12 to the upper surface of the conductive layer 14C of the insulating substrate 14. The bonding materials 13A and 13B are, for example, solder. The insulating substrate 14 has conductive layers 14A and 14C and an insulating layer 14B. The insulating layer 14B is sandwiched between the conductive layers 14A and 14C. The conductive layers 14A and 14C are, for example, metal foils made of a conductive metal such as copper. The insulating layer 14B is, for example, a ceramic plate. The insulating substrate 14 conducts heat flow in the thickness direction but does not conduct electric current in the thickness direction.

[0026] The bonding material 15 bonds the lower surface of the conductive layer 14A of the insulating substrate 14 to the upper surface of the base substrate 16. The bonding material 15 is, for example, solder. The base substrate 16 is a substrate with high thermal conductivity, such as a copper substrate or an aluminum silicon carbide composite substrate. The heat dissipation bonding material 17 bonds the lower surface of the base substrate 16 to the upper surface of the cooling unit 18. The heat dissipation bonding material 17 is, for example, a TIM (Thermal Interface Material) and has high thermal conductivity.

[0027] The cooling unit 18 carries the semiconductor elements 10 and 12 with the heat dissipation member 11 sandwiched therebetween. The cooling unit 18 dissipates heat generated in the semiconductor elements 10 and 12, for example, into the air. The cooling unit 18 may include a cooling fin. The cooling unit 18 is a substrate with high thermal conductivity, such as a copper substrate or an aluminum silicon carbide composite substrate. The temperature detection unit 18A detects the temperature of the cooling unit 18. The case 19 is a housing that protects the base substrate 16 and the semiconductor elements 10 and 12 mounted on the base substrate 16. The cooling unit 18 may be provided for each semiconductor module 51 to 56, or may be provided in common to at least two or more of the semiconductor modules 51 to 56.

[0028] Heat generated in the semiconductor element 10 is conducted downward through the bonding material 13A, insulating substrate 14, and bonding material 15, as in heat dissipation path 61A, to reach the base substrate 16. Heat generated in the semiconductor element 12 is conducted downward through the bonding material 13B, insulating substrate 14, and bonding material 15, as in heat dissipation path 61B, to reach the base substrate 16. The heat conducted through the heat dissipation paths 61A and 61B is combined in the base substrate 16 and conducted through the heat dissipation bonding material 17, as in heat dissipation path 62, to reach the cooling unit 18. One reason that heat is conducted in parallel to the base substrate 16 as in heat dissipation paths 61A and 61B is that the thicknesses of the bonding materials 13A, 13B, and 15 and the insulating substrate 14 are smaller than the thickness of the base substrate 16.

[0029] 5 is an equivalent circuit showing the thermal network of the semiconductor module in the first embodiment. As shown in FIG. 5, a thermal resistance RA is connected between a heat flow source 64A and a node N1. A thermal resistance RB is connected between a heat flow source 64B and the node N1. Thermal resistances RC and R18 are connected between the node N1 and an ambient temperature 65.

[0030] Ground corresponds to 0° C. Heat flow source 64A corresponds to semiconductor element 10 and generates a heat flow due to heat generated in semiconductor element 10. Heat flow source 64B corresponds to semiconductor element 12 and generates a heat flow due to heat generated in semiconductor element 12.

[0031] The thermal resistance RA has thermal resistances R13A to R16A connected in series between the heat flow source 64A and the node N1. The thermal resistances R13A to R16A correspond to the thermal resistances of the bonding material 13A, the insulating substrate 14, the bonding material 15, and the base substrate 16 in the heat dissipation path 61A, respectively. The thermal resistance RB has thermal resistances R13B to R16B connected in series between the heat flow source 64B and the node N1. The thermal resistances R13B to R16B correspond to the thermal resistances of the bonding material 13B, the insulating substrate 14, the bonding material 15, and the base substrate 16 in the heat dissipation path 61B, respectively. The thermal resistance RC is thermal resistance R17, which corresponds to the thermal resistance of the heat dissipation bonding material 17. The thermal resistance R18 corresponds to the thermal resistance of the cooling unit 18.

[0032] Temperature T1 (first temperature) is the temperature between heat flow source 64A and thermal resistance RA, and corresponds to the temperature at semiconductor element 10. Temperature T2 (second temperature) is the temperature between thermal resistances RC and R18, and corresponds to the temperature at cooling unit 18. Thermal resistances RA, RB, and RC are not limited to the examples in FIGS. 4 and 5. Node N1 may be located at any position, and thermal resistances RA and RB may be connected in parallel between heat flow sources 64A and 64B and node N1, and thermal resistance RC may be connected between node N1 and temperature T2. When semiconductor elements 10 and 12 are mounted on cooling unit 18 with heat dissipation member 11 sandwiched therebetween, an equivalent circuit is formed as shown in FIG. 5, which is represented by thermal resistances RA to RC.

[0033] Assuming a thermal steady state, the power loss occurring in the semiconductor element 10, which is the heat flow source 64A, is defined as loss P1 (first loss), and the power loss occurring in the semiconductor element 12, which is the heat flow source 64B, is defined as loss P2 (second loss). The amounts of heat generated in the heat flow sources 64A and 64B are considered to be losses P1 and P2, respectively. The thermal resistance values ​​of the thermal resistors RA to RC are defined as RA to RC. At this time, the temperature T1 of the semiconductor element 10 is expressed by Equation 1.

[0034] T1=RA×P1+RC×(P1+P2)+T2 Formula 1

[0035] In order to determine whether there is an abnormality in the heat dissipation member 11 between the semiconductor element 10 and the cooling unit 18, an abnormality in the thermal resistance R0 between the semiconductor element 10 and the cooling unit 18 is determined. The thermal resistance R0 is expressed by Equation 2.

[0036] R0=RA+RC Equation 2 Substituting equation 1 into equation 2 gives equation 3.

[0037] R0=(T1-T2-RC×P2) / P1 Equation 3 The temperatures T1 and T2 can be detected by the temperature detectors 10A and 18A. The losses P1 and P2 can be estimated. The unknown values ​​in Equation 3 are the thermal resistances R0 and RC. If there are two or more sets of T1, T2, P1, and P2 in different steady states, the thermal resistance R0 can be calculated.

[0038] Let T1_1, T2_1, P1_1, and P2_1 be T1, T2, P1, and P2, respectively, of set S1 in steady state 1. Let T1, T2, P1, and P2, respectively, of set S2 in steady state 2, T1_2, T2_2, P1_2, and P2_2. Equation 3 becomes Equation 4 and Equation 5 below.

[0039] R0=(T1_1-T2_1-RC×P2_1) / P1_1 Equation 4 R0=(T1_2-T2_2-RC×P2_2) / P1_2 Equation 5

[0040] By solving the simultaneous equations of Equation 4 and Equation 5, the thermal resistance R0 can be calculated using Equation 6.

[0041] R0=[(T1_2-T2_2)×P2_1-(T1_1-T2_1)×P2_2] / (P1_2×P2_1-P1_1×P2_2) Equation 6

[0042] Fig. 6 is a block diagram of a power conversion device according to the first embodiment. The power conversion device 100 includes a main circuit unit 20, a control unit 24, a voltage detection unit 25, a current detection unit 26, and a processing unit 30. The main circuit unit 20 is the inverter circuit shown in Fig. 1. The main circuit unit 20 converts DC power from a power source 21 into three-phase AC power and supplies it to a load 22. The voltage detection unit 25 detects the DC voltage supplied from the power source to the main circuit unit 20. The current detection unit 26 detects the AC current supplied from the main circuit unit 20 to the load.

[0043] The control unit 24 acquires a voltage value from the voltage detection unit 25, a current value from the current detection unit 26, and temperatures T1 and T2 from the main circuit unit 20. Based on the acquired voltage values, current values, etc., the control unit 24 outputs control signals to the main circuit unit 20 to turn on and off the switch elements Q1 to Q6. The control signals are, for example, PMW (Pulse Width Modulation) signals. The control unit 24 calculates losses P1 and P2 using a known method based on the acquired current values, voltage values, temperatures T1 and T2, carrier frequency, etc., and the PWM method.

[0044] The processing unit 30 includes an acquisition unit 31 and a determination unit 32. The acquisition unit 31 acquires temperatures T1, T2, and losses P1 and P2 from the control unit 24. The determination unit 32 determines whether there is an abnormality in the heat dissipation member 11 based on the acquired temperatures T1, T2, and losses P1 and P2. The determination unit 32 outputs abnormality information for the heat dissipation member 11.

[0045] The control unit 24 and the processing unit 30 are control devices including a processor such as a CPU (Central Processing Unit) and a memory. The functions of the control unit 24 and the processing unit 30 (for example, the functions of the acquisition unit 31 and the determination unit 32) are realized by the operation of the processor in cooperation with a program stored in the memory. The functions of the control unit 24 and the processing unit 30 may be realized by an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

[0046] The control unit 24 and the processing unit 30 may be one control device or separate control devices. For example, the processing unit 30 may function as an abnormality determination device provided inside or outside the power conversion device 100. For example, the processing unit 30 may be a computer or the like external to the power conversion device 100.

[0047] 7 is a flowchart showing an abnormality determination method executed by the processing unit in the first embodiment. As shown in FIG. 7, the acquisition unit 31 acquires temperatures T1 and T2 and losses P1 and P2 (step S10A). Next, the determination unit 32 determines whether or not the state is steady (step S11A). For example, the determination unit 32 determines Yes if the amount of change in at least one of the temperatures T1 and T2 within a predetermined period is equal to or less than a predetermined value, and determines No if the amount of change is greater than the predetermined value. If No, the process returns to step S10A.

[0048] If the result of step S11A is Yes, the determination unit 32 sets the temperatures T1, T2, and the losses P1 and P2 to a set S1 including the temperatures T1_1, T2_1, and the losses P1_1 and P2_1 (step S12A). Next, the determination unit 32 determines whether the loss P2 is equal to or smaller than a first value TH1 (step S13).

[0049] When the result is Yes, for example, the power factor is almost 1, and almost no current flows through the diode D0. There is almost no power loss due to the semiconductor element 12, and the heat flow source 64B in FIG. 5 generates almost no heat flow. Therefore, if loss P2=0 in Equation 3, the thermal resistance R0 can be calculated. Furthermore, if P2_1 and P2_2 are both 0 in Equation 6, the thermal resistance R0 cannot be calculated using Equation 6. Therefore, the determination unit 32 calculates the thermal resistance R0 using the set S1 (step S15A). The determination unit 32 calculates the thermal resistance R0 using, for example, Equation 3. The determination unit 32 may also calculate the thermal resistance R0 using an equation other than Equation 3. Then, the process proceeds to step S16.

[0050] If the result in step S13 is No, the acquisition unit 31 acquires temperatures T1, T2, and losses P1 and P2 (step S10B). Next, the determination unit 32 determines whether or not the state is steady (step S11B). For example, the determination unit 32 determines Yes if the amount of change in at least one of temperatures T1 and T2 within a predetermined period is equal to or less than a predetermined value, and determines No if the amount of change is greater than the predetermined value. If the result is No, the process returns to step S10B.

[0051] If the result of step S11B is Yes, the determination unit 32 sets the temperatures T1, T2, and the losses P1 and P2 to a set S2 including the temperatures T1_2, T2_2, and the losses P1_2 and P2_2 (step S12B). The determination unit 32 determines whether the difference ΔT1 between the temperatures T1_1 and T1_2, the difference ΔP1 between the losses P1_1 and P1_2, and the difference ΔP2 between the losses P2_1 and P2_2 are all equal to or less than a second value TH2 (step S14). Note that the second value TH2 may be different for each of ΔT1, ΔP1, and ΔP2.

[0052] If the answer is Yes, ΔT1, ΔP1, and ΔP2 are all small. In this case, the power factor and load factor are both approximately the same in steady state 1 and steady state 2. It is not possible to accurately calculate thermal resistance R0 using Equation 6. Therefore, the process returns to step S10B. Steps S10B to S12B are repeated until at least one of the differences ΔT1, ΔP1, and ΔP2 becomes greater than the second value TH2.

[0053] If the result of step S14 is No, the determination unit 32 calculates the thermal resistance R0 using the sets S1 and S2 (step S15B). The determination unit 32 calculates the thermal resistance R0 using, for example, Equation 6. The determination unit 32 may calculate the thermal resistance R0 using an equation other than Equation 6.

[0054] Next, the determination unit 32 determines whether the heat dissipation member 11 is abnormal based on the calculated thermal resistance R0 (step S16). For example, if the thermal resistance R0 of the heat dissipation member 11 is higher than normal, there is a possibility that a portion of the heat dissipation member 11 has peeled off in the heat dissipation path. Therefore, for example, the determination unit 32 determines Yes when the calculated thermal resistance R0 is equal to or greater than a third value, and determines No when the thermal resistance R0 is smaller than the third value. If the determination is Yes, the determination unit 32 sets the abnormality information to abnormal (step S17A). If the determination is No, the determination unit 32 sets the abnormality information to normal (step S17B).

[0055] The determination unit 32 outputs the abnormality information (step S18). For example, the determination unit 32 outputs the abnormality information to a display unit or an external device (for example, an information processing device). Note that steps S13 and S15A do not have to be performed. Also, step S14 does not have to be performed. None of steps S13, S15A, and S14 does not have to be performed.

[0056] 7 and Equation 6, the determination unit 32 determines whether or not the heat dissipation member 11 is abnormal based on different sets S1 (first set) and S2 (second set) of the sets of losses P1, P2, and temperatures T1 and T2. This allows the thermal resistance R0 to be calculated with high accuracy even when the semiconductor elements 10 and 12 are mounted on the cooling unit 18 with the heat dissipation member 11 sandwiched therebetween, thereby enabling the determination of an abnormality in the heat dissipation member 11 with high accuracy.

[0057] As in step S15B and equation 6, the determination unit 32 uses the sets S1 and S2 to calculate the thermal resistance R0 of at least a part of the heat dissipation member 11, and determines whether or not the heat dissipation member 11 is abnormal based on the thermal resistance R0. By calculating the thermal resistance R0 in this manner, an abnormality in the heat dissipation member 11 can be determined with higher accuracy.

[0058] As in steps S12A, S13, and S15A, when the determination unit 32 acquires the set S1 and the loss P2 in the set S1 is equal to or less than the first value TH1, the determination unit 32 determines whether the heat dissipation member 11 is abnormal based on the set S1 without acquiring the set S2. This allows the thermal resistance R0 to be easily calculated using Equation 3. From the viewpoint of improving the accuracy of the calculation of the thermal resistance R0, the first value TH1 is preferably equal to or less than 0.1 times the maximum value that the loss P1 can take, and more preferably equal to or less than 0.05 times. The first value TH1 may be a predetermined constant value, or may be determined each time based on the loss P1 in the set S1.

[0059] As in steps S10B to S14, when any of the differences between the loss P1 difference ΔP1, the loss P2 difference ΔP2, and the temperature T1 difference ΔT1 between the sets S1 and S2 is equal to or less than the second value TH2, the set S2 is acquired again. This prevents a decrease in the calculation accuracy of the thermal resistance R0 in Equation 6. The second value TH2 is preferably determined for each of the differences ΔP1, ΔP2, and ΔT1. From the viewpoint of improving the calculation accuracy of the thermal resistance R0, the second value TH2 of the difference ΔP1 is preferably equal to or less than 0.1 times, more preferably equal to or less than 0.05 times, the maximum value that the loss P1 can take. The second value TH2 of the difference ΔT1 is preferably equal to or less than 0.1 times, more preferably equal to or less than 0.05 times, the maximum value that the loss P2 can take. The second value TH2 of the difference ΔT1 is preferably equal to or less than 0.1 times, more preferably equal to or less than 0.05 times, the maximum value that the temperature T1 can take. The second value TH2 may be a predetermined constant value, or may be determined each time based on the differences ΔP1, ΔP2, ΔT1, and the like.

[0060] In the above example, semiconductor element 10 has a switch function, and semiconductor element 12 has a free wheel diode function connected in parallel to semiconductor element 10. Semiconductor elements 10 and 12 may have other functions. Three or more semiconductor elements may be mounted on cooling unit 18 with heat dissipation member 11 sandwiched therebetween.

[0061] (Second embodiment) FIG. 8 is a schematic diagram showing the output, temperature, and loss over time in the second embodiment. The actual output OUT, temperature T, and loss P are distorted waveforms affected by the carrier frequency, but have a constant period. Therefore, for simplification, FIG. 8 shows the output OUT, temperature T, and loss P as trigonometric function waves. The output OUT corresponds to the current or voltage of the u-phase, v-phase, or w-phase output from the main circuit unit 20. The output OUT has a period TP2 corresponding to the load frequency f2 output by the main circuit unit 20.

[0062] The temperature T and loss P correspond to temperatures T1, T2 and losses P1 and P2, and are correlated with the power of the output OUT. For example, the period TP3 at temperature T and loss P is 0.5 times the period TP2, and the frequency f3 is twice the frequency f2. The temperature T and loss P produce ripple components and the like related to power pulsation.

[0063] Sampling points 66 indicate the points at which the temperature T and loss P are sampled. The interval between the sampling points 66 is a sampling period TP1, and the frequency of the sampling points 66 is a sampling frequency f1. A rip component is superimposed on the temperature T and loss P. Therefore, if the sampled temperature T and loss P are used, the accuracy of calculating the thermal resistance R0 decreases, and the accuracy of determining an abnormality in the heat dissipation member 11 decreases. Therefore, the values ​​of the sampling points 66 are averaged in a range A corresponding to the period TP3. This makes it possible to suppress a decrease in the accuracy of calculating the thermal resistance R0 due to the rip component.

[0064] FIG. 9 is a schematic diagram showing output, temperature, and loss over time in the second embodiment. As shown in FIG. 9, the load frequency f2' is higher and the period TP2' is shorter than in FIG. 8. As a result, the frequency f3' of the temperature T and loss P is higher and the period TP3' is shorter. In Example 1, the sampling frequency f1 and period TP1 are the same as in FIG. 8. In this case, the number N' of sampling points 66 within the range A' corresponding to the period TP3' is smaller than the number N in FIG. 8. This reduces the calculation accuracy of the thermal resistance R0.

[0065] Therefore, the sampling frequency f1' is set higher than the sampling frequency f1, and the period TP1' is set shorter than the period TP1. For example, the sampling frequency f1 is adjusted so that the ratio of frequencies f1' to f2' is the same as the ratio of frequencies f1 to f2. This prevents the number N of sampling points 66 within range A' from decreasing even if the load frequency f2 changes, and prevents a decrease in the calculation accuracy of thermal resistance R0.

[0066] 10 is a block diagram of a power conversion device according to the second embodiment. A power conversion device 102 according to the second embodiment includes a processing unit 30A in addition to the power conversion device 100 of the first embodiment.

[0067] The control unit 24 has ADCs (analog-digital converters) 34A to 34C. The ADC 34A samples the voltage value of a DC voltage, which is an analog signal, and converts it into a digital signal. The ADC 34B samples temperatures T1' and T2', which are analog signals, and converts them into digital signals of temperatures T01 and T02, respectively. The temperature T1' is the temperature at the semiconductor element 10, and the temperature T2' is the temperature at the cooling unit 18. The ADC 34C samples the current value of a load current, which is an analog signal, and converts it into a digital signal. The sampling frequency is sampling frequency f1. The sampling frequency f1 may be the carrier frequency at which the control unit 24 switches the switch elements Q1 to Q6, or it may be different from the carrier frequency. Furthermore, the sampling frequency f1 of the ADCs 34A and 34C and the sampling frequency f1 of the ADC 34B may be different.

[0068] The processing unit 30A functions as a loss calculation unit 35, averaging units 36A and 36B, an average number calculation unit 37, and a frequency adjustment unit 38. The processing unit 30A is, for example, a control device including a processor such as a CPU and a memory. The functions of the processing unit 30A (for example, the functions of the loss calculation unit 35, averaging units 36A and 36B, the average number calculation unit 37, and the frequency adjustment unit 38) are realized by the processor operating in cooperation with a program stored in the memory. The functions of the processing unit 30A may be realized by an FPGA or an ASIC.

[0069] The control unit 24 and the processing unit 30A may be a single control device or separate control devices. The processing units 30 and 30A may be a single processor or separate processors. The processing unit 30A may function as a temperature calculation device or a loss calculation device provided inside or outside the power conversion device 100. For example, the processing unit 30A may be a computer or the like external to the power conversion device 102.

[0070] 11 is a flowchart showing a calculation method executed by the processing unit 30A in the second embodiment. The average number calculation unit 37 acquires frequencies f1 and f2 from the control unit 24 (step S20). When the frequency adjustment unit 38 adjusts the frequency f1, the average number calculation unit 37 may acquire the frequency f1 from the frequency adjustment unit 38.

[0071] Next, the average number calculation unit 37 calculates the number N (step S21). The number N is calculated by f1 / (2×f2). If f1 / (2×f2) is not an integer, f1 / (2×f2) is rounded to make it an integer. The rounding method may be, for example, rounding off, rounding down, or rounding up.

[0072] Next, the loss calculation unit 35 acquires information such as the sampled DC voltage, load current, and temperatures T01 and T02 from the control unit 24 (step S22). Next, the loss calculation unit 35 calculates losses P01 and P02 based on the acquired sampling information (step S23). The loss calculation unit 35 calculates the losses P01 and P02 at a sampling frequency f1, for example.

[0073] Next, the averaging unit 36A calculates losses P1 and P2 by taking a moving average of the calculated losses P01 and P02 (step S24). The averaging unit 36A calculates losses P1 (and P2) by averaging, for example, the temporally consecutive losses P01 (and P02) in Fig. 8. The averaging unit 36A may calculate losses P1 and P2 for each cycle TP1 in Fig. 8, or may calculate losses P1 and P2 for each multiple of the cycle TP1.

[0074] Next, the averaging unit 36B calculates temperatures T1 and T2 by taking a moving average of the sampled temperatures T01 and T02 (step S25). The averaging unit 36B calculates temperatures T1 (and T2) by averaging, for example, N consecutive temperatures T01 (and T02) in Fig. 8. The averaging unit 36B may calculate temperatures T1 and T2 for each period TP1 in Fig. 8, or may calculate temperatures T1 and T2 for each multiple of the period TP1.

[0075] Next, the averaging units 36A and 36B output the calculated temperatures T1, T2 and losses P1 and P2 to the processing unit 30 (step S26). Next, the processing unit 30A determines whether to end (step S27). If No, the processing returns to step S20, and if Yes, the processing ends. The processing unit 30A may not perform steps S23 and S24, and may not perform step S25.

[0076] According to the second embodiment, as in step S21, the average number calculation unit 37 calculates the number N (first number) to be averaged based on the sampling frequency f1 (first frequency) and frequency f2 (second frequency) of temperatures T1' and T2'. The averaging unit 36B sets the average value of the number N of consecutive samples of the sampled temperature T01 as the temperature T1 of the set S1 or S2, and sets the average value of the number N of consecutive samples of the sampled temperature T02 as the temperature T2 of the set S1 or S2. This makes it possible to prevent temperatures T1 and T2 from being affected by frequency f3 due to rip components, etc., as shown in FIG. 8. This improves the accuracy of detecting abnormalities.

[0077] The average number calculation unit 37 integrally multiplies the value obtained by dividing the frequency f1 by twice the frequency f2, and then rounds the integrally multiplied value to obtain an integer as the number N. This averages the range of integral multiples of the period TP1 in FIG. 8, thereby preventing the temperatures T1 and T2 from being affected by the frequency f3 due to the lip component, etc. This improves the accuracy of detecting anomalies. From the viewpoint of not increasing the number N, it is preferable that the integral multiple be 1 or 2.

[0078] When frequency f1 is much greater than frequency f2, the error in the moving average is small even if frequency f1 is not an integer multiple of twice frequency f2. However, when frequency f1 is several times frequency f2, the error in the moving average tends to become large. Therefore, it is preferable to set frequency f1 to an integer multiple of twice frequency f2 (i.e., an even multiple). This makes it possible to reduce the error caused by the moving average.

[0079] The average number calculation unit 37 calculates the number N (second number) to be averaged based on the frequency f1 (third frequency) and frequency f2 at which the losses P01 and P02 are calculated. The averaging unit 36A determines the average value of the number N of consecutive losses in time among the calculated losses P01 as the loss P1 for set S1 or S2, and determines the average value of the number N of consecutive losses in time among the calculated losses P02 as the loss P2 for set S1 or S2. This makes it possible to prevent the losses P1 and P2 from being affected by the frequency f3 due to the rip component, etc., as shown in FIG. 8. This improves the accuracy of detecting anomalies.

[0080] If the number N of samples to be averaged is too small, the accuracy of the temperatures T1, T2, and losses P1 and P2 will decrease. From this perspective, the number N is preferably 5 or more, and more preferably 10 or more. If the number N of samples to be averaged is too large, it will take a long time to calculate the temperatures T1, T2, and losses P1 and P2. From this perspective, the number N is preferably 1000 or less. From the perspective of increasing the number N, the frequency f1 is higher than the frequency f2. The frequency f1 is preferably 10 times or more, and more preferably 20 times or more, the frequency f2.

[0081] When the control unit 24 changes the frequency f2, the frequency f1 may be constant as long as the frequency f1 is sufficiently higher than the highest frequency among the frequencies f2 that change. If the frequency f1 is not sufficiently higher than the highest frequency among the frequencies f2 that change, the number N' within the range A' will be reduced, as shown in Figure 9. This will reduce the accuracy of the temperatures T1, T2, and the losses P1 and P2.

[0082] Therefore, when frequency f2 increases, frequency adjuster 38 increases frequency f1. This increases the number N of sampling points 66 within range A' in FIG. 9. This reduces the accuracy of temperatures T1, T2, and losses P1 and P2. When frequency f2 decreases, frequency adjuster 38 decreases frequency f1. This prevents the number N within range A' in FIG. 9 from increasing too much.

[0083] The frequency adjuster 38 may adjust the frequency f1 so that the ratio between the frequencies f1 and f2 is constant. The frequency adjuster 38 may change the frequency f1 in stages in response to a change in the frequency f2.

[0084] The average number calculation unit 37 and the averaging unit 36B in the processing unit 30A in the second embodiment may function as a calculation device that calculates the temperature T1 or T2 of the semiconductor element 10 or the cooling unit 18. In this case, the calculated temperature T1 or T2 may be used for processing other than abnormality determination.

[0085] In the first and second embodiments, an inverter that converts DC power to AC power has been described as an example of a power conversion device, but the power conversion device may also be a converter that converts AC power to DC power, or a converter that converts a DC voltage to a different DC voltage.

[0086] Although the embodiments have been described above, the present invention is not limited to the above-described embodiments, and various modifications and improvements are possible, such as combinations with or substitutions for part or all of other embodiments. [Explanation of symbols]

[0087] 10, 12 Semiconductor elements 10A, 18A temperature detection unit 11 Heat dissipation material 18 Cooling section 20 Main circuit section 21 Power supply 22 Load 24 Control Unit 25 Voltage detection section 26 Current detection section 30, 30A processing section 31 Acquisition Department 32 Judgment section 34A, 34B, 34C ADC 35 Loss calculation section 36A, 36B average part 37 Average number calculation part 38 Frequency adjustment unit 50, 51, 52, 53, 54, 55, 56 Semiconductor modules 61A, 61B, 62 Heat dissipation path

Claims

1. an acquisition unit that acquires a first loss in a first semiconductor element, a second loss in a second semiconductor element, a first temperature in the first semiconductor element, and a second temperature in a cooling unit that mounts the first semiconductor element and the second semiconductor element with a heat dissipation member therebetween; a determination unit that determines whether or not the heat dissipation member is abnormal based on different first and second sets of the first loss, the second loss, the first temperature, and the second temperature; An abnormality determination device comprising:

2. 2. The abnormality determination device according to claim 1, wherein the determination unit calculates a thermal resistance of at least a part of the heat dissipation member using the first set and the second set, and determines whether or not the heat dissipation member is abnormal based on the thermal resistance.

3. 3. The abnormality determination device according to claim 1, wherein when the determination unit acquires the first set and the second loss in the first set is equal to or less than a first value, the determination unit determines whether the heat dissipation member is abnormal based on the first set without acquiring the second set.

4. 3. The abnormality determination device according to claim 1, wherein the second set is acquired again when any of the differences in the first loss, the second loss, and the first temperature between the first set and the second set is less than or equal to a second value.

5. an average number calculation unit that calculates a first number to be averaged based on a first frequency at which the first temperature and the second temperature are sampled and a second frequency of a current or a voltage supplied to a load; an averaging unit that sets the average value of the first number of sampled first temperatures that are consecutive in time as the first temperature of the set, and sets the average value of the first number of sampled second temperatures that are consecutive in time as the second temperature of the set; The abnormality determination device according to claim 1 or 2, comprising:

6. 6. The abnormality determination device according to claim 5, wherein the average number calculation unit calculates the first number by multiplying a value obtained by dividing the first frequency by twice the second frequency by a positive integer and rounding the integer-multiplied value to an integer.

7. The abnormality determination device according to claim 5 , wherein the first frequency is an integer multiple of twice the second frequency.

8. the average number calculation unit calculates a second number to be averaged based on a third frequency at which the first loss and the second loss are calculated and the second frequency; 6. The abnormality determination device according to claim 5, wherein the averaging unit determines the first loss of the set as an average value of the second number of the calculated first losses that are consecutive in time, and determines the second loss of the set as an average value of the second number of the calculated second losses that are consecutive in time.

9. The abnormality determination device according to claim 5 , further comprising a frequency adjustment unit that increases the first frequency when the second frequency increases.

10. the first semiconductor element has a switching function; 3. The abnormality determination device according to claim 1, wherein the second semiconductor element has a function as a free wheel diode connected in parallel to the first semiconductor element.

11. a first semiconductor element and a second semiconductor element; a cooling unit on which the first semiconductor element and the second semiconductor element are mounted with a heat dissipation member sandwiched therebetween; a determination unit that determines whether or not the heat dissipation member is abnormal based on different first and second sets of a first loss of power generated in the first semiconductor element, a second loss of power generated in the second semiconductor element, a first temperature in the first semiconductor element, and a second temperature in the cooling unit; A power conversion device comprising:

12. acquiring a first loss in a first semiconductor element, a second loss in a second semiconductor element, a first temperature in the first semiconductor element, and a second temperature in a cooling unit on which the first semiconductor element and the second semiconductor element are mounted with a heat dissipation member sandwiched therebetween; determining whether or not the heat dissipation member is abnormal based on different first and second sets of the first loss, the second loss, the first temperature, and the second temperature; Abnormality determination method.

13. an average number calculation unit that calculates the number to be averaged based on a first frequency at which the temperature of the semiconductor module is sampled and a second frequency of the current or voltage supplied to the load; an averaging unit that calculates an average value of the number of consecutive samples of the temperature that are sampled in time; A temperature calculation device comprising:

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