Linear power supply

Abstract

To improve the load response characteristic of a linear power supply.SOLUTION: The linear power source 1 includes, for example, an output transistor M0 connected between an application terminal of an input voltage VIN and an application terminal of an output voltage VOUT, a first transistor Q1 and a second transistor Q2 each having a base connected to an application terminal of a feedback voltage VREF corresponding to an output voltage VOUT and configured to generate a voltage difference Δ Vbe between emitters thereof, a drive circuit 20 generating a drive signal V2 of the output transistor M0 in accordance with a control signal V1 output from a collector of one of the first transistor Q1 and the second transistor Q2, and a detection circuit 40 controlling the drive circuit 20 to decrease an on-resistance value of the output transistor M0 when the feedback voltage VREF is lower than a threshold voltage Vth.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to linear power supplies. [Background technology]

[0002] Conventionally, linear power supplies such as LDO (low drop out) regulators have been used as power sources for various devices.

[0003] An example of the related prior art is Patent Document 1 proposed by the applicant of the present application. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2018-112963

[0005] [overview] Conventional linear power supplies have room for improvement in terms of load response characteristics.

[0006] The linear power supply according to the present disclosure comprises an output transistor configured to be connected between an input voltage application terminal and an output voltage application terminal, a first transistor and a second transistor configured to have their respective bases or gates connected to an application terminal of the output voltage or a feedback voltage corresponding thereto so that a voltage difference occurs between their respective emitters or sources, a drive circuit configured to generate a drive signal for the output transistor in response to a control signal output from the collector or drain of either the first transistor or the second transistor, and a detection circuit configured to control the drive circuit to reduce the on-resistance value of the output transistor when the output voltage or the feedback voltage is lower than a threshold voltage. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing a first comparative example of a linear power supply. [Figure 2] FIG. 2 is a diagram showing the load response characteristics (small fluctuations) of the first comparative example. [Figure 3] FIG. 3 is a diagram showing the load response characteristics (large fluctuation) of the first comparative example. [Figure 4] FIG. 4 is a diagram showing a first embodiment of a linear power supply. [Figure 5] FIG. 5 is a diagram showing the load response characteristics of the first embodiment. [Figure 6] FIG. 6 shows a second embodiment of a linear power supply. [Figure 7] FIG. 7 shows a third embodiment of a linear power supply. [Figure 8] FIG. 8 is a diagram showing a fourth embodiment of a linear power supply. [Figure 9] FIG. 9 is a diagram showing a fifth embodiment of a linear power supply. [Figure 10] FIG. 10 is a diagram showing a sixth embodiment of a linear power supply. [Figure 11] FIG. 11 is a diagram showing the load response characteristics of the sixth embodiment. [Figure 12] FIG. 12 is a diagram showing a seventh embodiment of a linear power supply. [Figure 13] FIG. 13 is a diagram showing a second comparative example of a linear power supply. [Figure 14] FIG. 14 is a diagram showing an eighth embodiment of a linear power supply. [Figure 15] FIG. 15 is a diagram showing a ninth embodiment of a linear power supply.

[0008] [Detailed explanation] <First Comparative Example> 1 is a diagram showing a first comparative example of a linear power supply 1 (= a circuit configuration to be compared with the first to seventh embodiments described below). The linear power supply 1 of this comparative example is a type of power supply device that generates a desired output voltage VOUT from an input voltage VIN and supplies it to a load Z. The linear power supply 1 can be understood as, for example, an LDO (low drop out) regulator.

[0009] Referring to the figure, the linear power supply 1 includes an output transistor M0, a feedback control circuit 10, a drive circuit 20, and a voltage divider circuit 30. Some or all of these components may be integrated into the semiconductor device 2.

[0010] The semiconductor device 2 includes an input terminal T1, an output terminal T2, and a ground terminal T3 as means for establishing electrical connection with the outside of the device. The input terminal T1 is connected to an application terminal of an input voltage VIN. The output terminal T2 is connected to an application terminal of an output voltage VOUT. In addition to a load Z, a smoothing and phase compensation capacitor Co may be externally connected between the output terminal T2 and the ground terminal GND. The ground terminal T3 is connected to the ground terminal GND.

[0011] The output transistor M0 is connected between the input terminal T1 and the output terminal T2. The output transistor M0 may be a P-channel type. Referring to this diagram, the source of the output transistor M0 is connected to the input terminal T1. The drain of the output transistor M0 is connected to the output terminal T2. The gate of the output transistor M0 is connected to the application terminal of the drive signal V2. The lower the drive signal V2, the lower the on-resistance value of the output transistor M0, and the higher the drive signal V2, the higher the on-resistance value.

[0012] The feedback control circuit 10 controls the drive circuit 20 so that the output voltage VOUT matches a target value. Referring to the figure, the feedback control circuit 10 includes transistors Q1 and Q2, transistors M1 and M2, and resistors R1 and R2. The transistors Q1 and Q2 may be npn-type transistors. The transistors M1 and M2 may be p-channel-type transistors.

[0013] The sources of the transistors M1 and M2 are connected to the input terminal T1. The gates of the transistors M1 and M2 are connected to the drain of the transistor M1. The drain of the transistor M1 is connected to the collector of the transistor Q1. The drain of the transistor M2 is connected to the collector of the transistor Q2.

[0014] Transistors M1 and M2 are connected between the input terminal T1 and the collectors of transistors Q1 and Q2 respectively, and function as a current mirror that replicates the drain current of transistor M1 to generate the drain current of transistor M2.

[0015] The bases of transistors Q1 and Q2 are connected to the application terminal of the feedback voltage VREF. When the voltage dividing circuit 30 is omitted, the bases of transistors Q1 and Q2 may be connected to the application terminal of the output voltage VOUT, that is, the output terminal T2.

[0016] The emitter of transistor Q1 is connected to the first end of resistor R1. The emitter of transistor Q2 is connected to the second end of resistor R1 and the first end of resistor R2. The second end of resistor R2 is connected to the ground terminal T3. Transistors Q1 and Q2 may have an emitter area ratio of N:1 (where N>1). That is, the emitter of transistor Q1 may have a larger area than the emitter of transistor Q2.

[0017] The voltage VR1 across resistor R1 can be understood as the voltage difference ΔVbe generated between the emitters of transistors Q1 and Q2 respectively. The voltage difference ΔVbe is represented by Vt×lnN. Here, Vt = kT / q, where k is the Boltzmann constant, T is the temperature (absolute temperature), and q is the electron charge. A current I0 flows through resistors R1 and R2. The current I0 is represented by ΔVbe / R1. A voltage VR2 is generated across resistor R2. The voltage VR2 across both ends is represented by ΔVbe×R2 / R1.

[0018] The control signal V1 output from the collector of transistor Q2 is controlled such that VREF = Vbe2 + VR2. For example, when VREF < Vbe2 + VR2, the control signal V1 rises. On the other hand, when VREF ≧ Vbe2 + VR2, the control signal V1 falls.

[0019] In this way, the feedback control circuit 10 can be understood as an error amplifier integrated with a reference voltage generation circuit. Therefore, the feedback control circuit 10 makes it possible to independently set the output voltage VOUT without requiring a separate reference voltage generation circuit.

[0020] The drive circuit 20 generates a drive signal V2 for the output transistor M0 in response to a control signal V1. Referring to the figure, the drive circuit 20 includes a transistor M3 and a current source CS1. The transistor M3 may be a P-channel type.

[0021] The gate of transistor M3 is connected to the application terminal of control signal V1. The source of transistor M3 is connected to input terminal T1. The drain of transistor M3 and a first terminal of current source CS1 are connected to the application terminal of drive signal V2, i.e., the gate of output transistor M0. The second terminal of current source CS1 is connected to ground terminal T3.

[0022] The on-resistance value of transistor M3 is reduced as the control signal V1 decreases, and is increased as the control signal V1 increases. Meanwhile, current source CS1 flows current I1 from the application terminal of drive signal V2 toward ground terminal T3. Therefore, the drive signal V2 output from the drain of transistor M3 increases as the control signal V1 decreases, and decreases as the control signal V1 increases. As a result, the drive circuit 20 increases the on-resistance value of output transistor M0 as the control signal V1 decreases. Conversely, the drive circuit 20 decreases the on-resistance value of output transistor M0 as the control signal V1 increases.

[0023] The voltage divider circuit 30 includes resistors R3 and R4 connected in series between the output terminal T2 and the ground terminal T3. The voltage divider circuit 30 divides the output voltage VOUT to generate a feedback voltage VREF (=VOUT×R4 / (R3+R4)). In this case, the output voltage VOUT is expressed as VREF×(R3+R4) / R4.

[0024] 2 is a diagram showing the load response characteristics (small fluctuation) of the first comparative example. The upper part depicts the output current IOUT flowing through the load Z. The lower part depicts the output voltage VOUT and the feedback voltage VREF.

[0025] As shown in this figure, when the increase in the output current IOUT during a sudden change is not so large, the output feedback control suppresses the decrease in the output voltage VOUT. Therefore, the feedback voltage VREF can be maintained at a voltage value higher than the on-threshold voltage Vf1 of the transistor Q1.

[0026] 3 is a diagram showing the load response characteristics (large fluctuation) of the first comparative example. As with the above-mentioned FIG. 2, the upper part depicts the output current IOUT flowing through the load Z. The lower part depicts the output voltage VOUT and the feedback voltage VREF.

[0027] As shown in this figure, when the output current IOUT suddenly changes by a large amount, the output feedback control cannot keep up, causing a large drop in the output voltage VOUT and, ultimately, the feedback voltage VREF. If the feedback voltage VREF falls below the on-threshold voltage Vf1 of transistor Q1, transistors Q1 and Q2 cannot be driven. This can cause unstable gate control of transistor M3. In particular, if transistor M3 remains on, the drive signal V2 will be stuck at a high level. This prevents the output transistor M0 from being turned on, potentially leading to a further drop in the output voltage VOUT.

[0028] First Embodiment 4 is a diagram showing a first embodiment of the linear power supply 1. The linear power supply 1 of this embodiment is based on the first comparative example (FIG. 1) described above, and further includes a detection circuit 40.

[0029] The detection circuit 40 controls the drive circuit 20 to reduce the on-resistance of the output transistor M0 when the feedback voltage VREF is lower than the threshold voltage Vth. Referring to the figure, the detection circuit 40 includes transistors M4 and M5, a transistor Q3, and resistors R5 and R6. The transistors M4 and M5 may be P-channel transistors. The transistor Q3 may be an NPN type.

[0030] The sources of transistors M4 and M5 and a first end of resistor R5 are connected to input terminal T1. The gate of transistor M4 and a second end of resistor R5 are connected to the collector of transistor Q3. The drain of transistor M4 and the gate of transistor M5 are connected to a first end of resistor R6. The emitter of transistor Q3 and a second end of resistor R6 are connected to ground terminal T3. The drain of transistor M5 is connected to the gate of transistor M3, i.e., the application terminal of control signal V1. The base of transistor Q3 is connected to the bases of transistors Q1 and Q2, i.e., the application terminal of feedback voltage VREF.

[0031] The on-threshold voltage Vf3 of the transistor Q3 corresponds to the threshold voltage Vth compared with the feedback voltage VREF. In particular, the threshold voltage Vth (=Vf3) is preferably set in accordance with the on-threshold voltage Vf1 of the transistor Q1. For example, the threshold voltage Vth may be equal to the on-threshold voltage Vf1 of the transistor Q1, or may be slightly higher than the on-threshold voltage Vf1.

[0032] When the feedback voltage VREF is higher than the threshold voltage Vth, the transistor Q3 is turned on. At this time, the transistor M4 is turned on and the transistor M5 is turned off. Therefore, the connection between the application terminal of the control signal V1 and the input terminal T1 is cut off, and the control signal V1 is not pulled up. As a result, the drive signal V2 is not pulled down, and the on-resistance value of the output transistor M0 is not pulled down. In other words, the detection circuit 40 has no effect on the drive circuit 20 unless the feedback voltage VREF falls below the threshold voltage Vth.

[0033] On the other hand, when the feedback voltage VREF is lower than the threshold voltage Vth, the transistor Q3 is turned off. At this time, the transistor M4 is turned off and the transistor M5 is turned on. Therefore, the connection between the application terminal of the control signal V1 and the input terminal T1 is conductive, and the control signal V1 is pulled up to approximately the input voltage VIN. As a result, the drive signal V2 is pulled down, and the on-resistance of the output transistor M0 is pulled down. In other words, when the feedback voltage VREF falls below the threshold voltage Vth, the detection circuit 40 controls the drive circuit 20 to pull down the on-resistance of the output transistor M0.

[0034] 5 is a diagram showing the load response characteristics of the first embodiment. As with the above-mentioned FIGS. 2 and 3, the upper part depicts the output current IOUT flowing through the load Z. The lower part depicts the output voltage VOUT and the feedback voltage VREF.

[0035] As shown in this figure, when a load fluctuation occurs to the extent that the feedback voltage VREF falls below the on-threshold voltage Vf1 of the transistor Q1, the detection circuit 40 functions to suppress the decrease in the output voltage VOUT and, in turn, the decrease in the feedback voltage VREF.

[0036] Second Embodiment Figure 6 is a diagram showing a second embodiment of the linear power supply 1. The linear power supply 1 of this embodiment is based on the first embodiment (Figure 4) described above, but the output transistor M0 and transistors M1 to M3 are replaced with output transistor Q0 and transistors Q4 to Q6, respectively. For example, the output transistor M0 and transistors Q4 to Q6 may each be a pnp type.

[0037] Thus, the field-effect transistor and the bipolar transistor may be interchanged arbitrarily. For example, although not explicitly shown in the figure, the transistors Q1 and Q2 may be interchanged with N-channel transistors. When interchangeable, the gate, source, and drain in this specification may be understood as the base, emitter, and collector, respectively.

[0038] Third Embodiment Figure 7 shows a third embodiment of the linear power supply 1. The linear power supply 1 of this embodiment is based on the first embodiment (Figure 4) described above, but transistor Q3 is replaced with transistor M6. Transistor M6 may be, for example, an N-channel type.

[0039] In this way, if the feedback voltage VREF is received at the gate of transistor M6, no gate current flows from the terminal to which the feedback voltage VREF is applied to the gate of transistor M6. This makes it possible to reduce the error in the output voltage VOUT. The element size of transistor M6 should be adjusted so that the on-threshold voltage Vth(M6) of transistor M6 is the same as or approximately the same as the on-threshold voltage Vf1 of transistor Q1.

[0040] <Fourth embodiment> FIG. 8 shows a fourth embodiment of the linear power supply 1. The linear power supply 1 of this embodiment is based on the first embodiment (FIG. 4) described above, with a modification made to the detection circuit 40. Referring to this figure, the detection circuit 40 further includes a transistor M7. The transistor M7 may be, for example, a P-channel type.

[0041] With the introduction of transistor M7, the drain of transistor M5 is connected to the source of transistor M7 instead of the application terminal of control signal V1. The gate and drain of transistor M7 are connected to the application terminal of control signal V1. In this way, transistor M7 is so-called diode-connected. That is, the source of transistor M7 corresponds to the anode, and the drain of transistor M7 corresponds to the cathode. Diode-connected transistor M7 may be replaced with a diode.

[0042] The transistor M7 functions as a clamp element that limits the control signal V1 to an upper limit value or less. The upper limit value of the control signal V2 may be set to a voltage value that prevents the gate-source voltage Vgs(M3) of the transistor M3 from exceeding the on-threshold voltage Vth(M3), for example.

[0043] By introducing transistor M7, even when the feedback voltage VREF falls below the threshold voltage Vth, the control signal V1 is not pulled up to the input voltage VIN, preventing transistor M3 from turning off completely. Therefore, once the feedback voltage VREF exceeds the threshold voltage Vth, transistor M3 returns to the on state without delay. As a result, the linear power supply 1 quickly transitions to stable operation.

[0044] From another perspective, the transistor M7 can be understood as an element that forms a current mirror in combination with the transistor M3. The element sizes of the transistors M3 and M6 may be the same or different.

[0045] Fifth Embodiment FIG. 9 is a diagram showing a fifth embodiment of the linear power supply 1. The linear power supply 1 of this embodiment is based on the fourth embodiment (FIG. 8) described above, but transistor M7 is replaced with transistor Q7. Transistor Q7 may be, for example, a pnp type. This embodiment also provides the same functions and effects as those described above.

[0046] Sixth Embodiment FIG. 10 shows a sixth embodiment of the linear power supply 1. The linear power supply 1 of this embodiment is based on the first embodiment (FIG. 4) described above, with a modification made to the drive circuit 20. Referring to this figure, the drive circuit 20 further includes a transistor M8. The transistor M8 may be, for example, an N-channel type.

[0047] The drain of the transistor M8 is connected to the gate of the output transistor M0, i.e., the application terminal of the drive signal V2, the source of the transistor M8 is connected to the ground terminal T3, and the gate of the transistor M8 is connected to the collector of the transistor Q3.

[0048] When the feedback voltage VREF is higher than the threshold voltage Vth, the transistor Q3 is turned on. At this time, the transistor M8 is turned off. Therefore, the path through which the current I2 flows is blocked. On the other hand, when the feedback voltage VREF is lower than the threshold voltage Vth, the transistor Q3 is turned off. At this time, the transistor M8 is turned on. Therefore, the path through which the current I2 flows is made conductive. In this way, the transistor M8 functions as a switch element that makes the path through which the current I2 flows conductive / blocks it depending on the detection result of the detection circuit 40.

[0049] In the linear power supply 1 of this embodiment, the drive current Id for switching the drive signal V2 from high to low can be understood as the sum of the currents I1 and I2, i.e., Id = I1 + I2. However, when the transistor M8 is in the off state, the current I2 does not flow, so Id = I1. On the other hand, when the transistor M8 is in the on state, the current I2 flows, so Id = I1 + I2.

[0050] In this way, the detection circuit 40 controls the drive circuit 20 to increase the drive current Id when the feedback voltage VREF is lower than the threshold voltage Vth.

[0051] 11 is a diagram showing the load response characteristics of the sixth embodiment. As in the above-mentioned FIGS. 2, 3, and 5, the upper part depicts the output current IOUT flowing through the load Z. The lower part depicts the output voltage VOUT and the feedback voltage VREF.

[0052] As mentioned above, the introduction of transistor M8 increases the drive current Id when the feedback voltage VREF is lower than the threshold voltage Vth. Therefore, compared to the first embodiment (FIGS. 4 and 5), the recovery time of the output voltage VOUT and therefore the recovery time of the feedback voltage VREF during load fluctuations is shortened. Note that transistor M8 does not turn on unless the feedback voltage VREF falls below the threshold voltage Vth. Therefore, transistor M8 does not affect circuit operation when the output is stable.

[0053] Seventh Embodiment 12 is a diagram showing a seventh embodiment of the linear power supply 1. In this embodiment, the linear power supply 1 has a modification in the drive circuit 20. Referring to this figure, the drive circuit 20 further includes a current source CS2.

[0054] The current source CS2 is inserted, for example, between the application terminal of the drive signal V2 and the drain of the transistor M8. The current source CS2 may also be inserted, for example, between the source of the transistor M8 and the ground terminal T3. By introducing the current source CS2, the current I2 can be arbitrarily adjusted. Note that if the purpose is to limit the current I2, the current source CS2 may be replaced with a resistor.

[0055] <Second Comparative Example> FIG. 13 is a diagram showing a second comparative example of the linear power supply 1 (= a circuit configuration to be compared with the eighth and ninth embodiments described later). The linear power supply 1 of this comparative example is based on the first comparative example (FIG. 1) described above, but the output transistor M0 is replaced with an output transistor M0'. The output transistor M0' may be an N-channel type. In addition, in accordance with this replacement, changes have also been made to the drive circuit 20. Referring to this figure, the drive circuit 20 further includes a transistor M9 and a current source CS3. The transistor M9 may be an N-channel type.

[0056] The drain of the output transistor M0' and a first terminal of the current source CS3 are connected to the input terminal T1. The second terminal of the current source CS3 and the drain of the transistor M9 are connected to the gate of the output transistor M0', i.e., the application terminal of the drive signal V2'. The gate of the transistor M9 is connected to the application terminal of the drive signal V2. The sources of the output transistor M0' and the transistor M9 are connected to the output terminal T2. The current source CS3 causes a current I3 to flow from the input terminal T1 to the application terminal of the drive signal V2'.

[0057] As shown in this figure, even when an N-channel output transistor M0' is used, there is room for improvement in the load response characteristics, as in the first comparative example (FIG. 1) mentioned above.

[0058] Eighth Embodiment Figure 14 is a diagram showing an eighth embodiment of the linear power supply 1. The linear power supply 1 of this embodiment is based on the previously described second comparative example (Figure 13), and includes a detection circuit 40 similar to the previously described first embodiment (Figure 4).

[0059] When the feedback voltage VREF is higher than the threshold voltage Vth, transistor Q3 is turned on. At this time, transistor M4 is turned on and transistor M5 is turned off. Therefore, the connection between the application terminal of the control signal V1 and the input terminal T1 is cut off, and the control signal V1 is not pulled up. As a result, the drive signal V2 is not pulled down, and the drive signal V2' is not pulled up, and the on-resistance value of the output transistor M0 is not pulled down. In other words, the detection circuit 40 has no effect on the drive circuit 20 unless the feedback voltage VREF falls below the threshold voltage Vth.

[0060] On the other hand, when the feedback voltage VREF is lower than the threshold voltage Vth, the transistor Q3 is turned off. At this time, the transistor M4 is turned off and the transistor M5 is turned on. Therefore, the connection between the application terminal of the control signal V1 and the input terminal T1 is conductive, and the control signal V1 is pulled up to approximately the input voltage VIN. As a result, the drive signal V2 is pulled down, which pulls up the drive signal V2', thereby lowering the on-resistance of the output transistor M0. In other words, when the feedback voltage VREF falls below the threshold voltage Vth, the detection circuit 40 controls the drive circuit 20 to lower the on-resistance of the output transistor M0'.

[0061] In this way, when a load fluctuation occurs to the extent that the feedback voltage VREF falls below the on-threshold voltage Vf1 of the transistor Q1, the detection circuit 40 functions to suppress the decrease in the output voltage VOUT and, in turn, the decrease in the feedback voltage VREF.

[0062] Ninth Embodiment FIG. 15 is a diagram showing a ninth embodiment of the linear power supply 1. The linear power supply 1 of this embodiment is based on the eighth embodiment (FIG. 14) described above, and, like the sixth embodiment (FIG. 10) described above, includes a transistor M8 as a component of the drive circuit 20. In addition, with the introduction of transistor M8, the previously described transistor M9 and current source CS3 are replaced with a transistor M10 and current source CS4. Transistor M10 may be a P-channel type.

[0063] The source of the transistor M10 is connected to the input terminal T1. The gate of the transistor M10 is connected to the application terminal of the drive signal V2. The drain of the transistor M10 and a first terminal of the current source CS4 are connected to the gate of the output transistor M0', i.e., the application terminal of the drive signal V2'. The second terminal of the current source CS4 is connected to the ground terminal T3. The current source CS4 flows a current I4 from the application terminal of the drive signal V2' to the ground terminal T3.

[0064] As in the sixth embodiment (FIG. 10), the detection circuit 40 controls the drive circuit 20 to increase the drive current Id when the feedback voltage VREF is lower than the threshold voltage Vth. Therefore, compared to the eighth embodiment (FIG. 14), the recovery time of the output voltage VOUT during a load fluctuation, and therefore the recovery time of the feedback voltage VREF, is shortened.

[0065] <Combination of embodiments> The various embodiments described above may be applied in any combination within a range that is consistent. For example, the eighth embodiment (FIG. 14) may be used as a base, and the output transistor M0′ may be replaced with an npn type, as in the second embodiment (FIG. 6). Furthermore, the eighth embodiment (FIG. 14) may be used as a base, and any of the third embodiment (FIG. 7), fourth embodiment (FIG. 8), fifth embodiment (FIG. 9), and seventh embodiment (FIG. 12) may be combined.

[0066] <Additional Notes> The linear power supply according to the present disclosure can improve load response characteristics.

[0067] [Appendix 1] output transistors (M0, M0', Q0) configured to be connected between an application terminal (T1) of an input voltage (VIN) and an application terminal (T2) of an output voltage (VOUT); a first transistor (Q1) and a second transistor (Q2), each of whose base or gate is connected to a terminal to which the output voltage (VOUT) or a feedback voltage (VREF) corresponding thereto is applied, so that a voltage difference (ΔVbe) occurs between the emitters or sources of the first transistor (Q1) and the second transistor (Q2); a drive circuit (20) configured to generate drive signals (V2, V2') for the output transistors (M0, M0', Q0) in response to a control signal (V1) output from the collector or drain of either the first transistor (Q1) or the second transistor (Q2); a detection circuit (40) configured to control the drive circuit (20) to reduce the on-resistance of the output transistors (M0, M0', Q0) when the output voltage (VOUT) or the feedback voltage (VREF) is lower than a threshold voltage (Vth); A linear power supply (1).

[0068] [Appendix 2] 2. The linear power supply (1) according to claim 1, wherein the emitter or source of the first transistor (Q1) has a larger area than the emitter or source of the second transistor (Q2).

[0069] [Appendix 3] 3. The linear power supply (1) according to claim 1 or 2, wherein the threshold voltage (Vth) is set in accordance with an on-threshold voltage (Vf1) of the first transistor (Q1).

[0070] [Appendix 4] The detection circuit (40) includes a third transistor (Q3, M6) whose base or gate is connected to the base or gate of each of the first transistor (Q1) and the second transistor (Q2), and pulls up the control signal (V1) when the third transistor (Q3, M6) is in an off state; 4. The linear power supply (1) according to any one of appendices 1 to 3, wherein the drive circuit (20) reduces the on-resistance value of the output transistors (M0, M0', Q0) as the control signal (V1) increases.

[0071] [Appendix 5] 5. The linear power supply (1) of claim 4, wherein the detection circuit (40) further comprises a clamping element (M7, Q7) configured to limit the control signal (V1) below an upper limit value.

[0072] [Appendix 6] The linear power supply (1) according to any one of appendices 1 to 5, wherein the detection circuit (40) controls the drive circuit (20) to increase a drive current (Id) for switching the logic level of the drive signal (V2, V2') when the output voltage (VOUT) or the feedback voltage (VREF) is lower than the threshold voltage (Vth).

[0073] [Appendix 7] The drive current (Id) is a sum current of a first current (I1) and a second current (I2), The linear power supply (1) described in Appendix 6, wherein the drive circuit (20) includes a switch element (M8) configured to conduct / cut off a path through which the second current (I2) flows depending on the detection result of the detection circuit (40).

[0074] [Appendix 8] The linear power supply (1) according to any one of appendices 1 to 7, further comprising a current mirror (M1, M2) configured to be connected between an application terminal of the input voltage (VIN) and the collector or drain of each of the first transistor (Q1) and the second transistor (Q2).

[0075] [Appendix 9] a first resistor (R1) configured to be connected between the emitter or source of the first transistor (Q1) and the emitter or source of the second transistor (Q2); a second resistor (R2) configured to be connected between the emitter or source of the second transistor (Q2) and a ground terminal (GND); The linear power supply (1) according to any one of appendices 1 to 8, further comprising:

[0076] [Appendix 10] 10. The linear power supply (1) according to any one of appendices 1 to 9, further comprising a voltage divider circuit (30) configured to divide the output voltage (VOUT) to generate the feedback voltage (VREF).

[0077] <Other> In addition to the above-described embodiments, the various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation. In other words, the above-described embodiments should be considered to be illustrative and not restrictive in all respects. Furthermore, the technical scope of the present disclosure is defined by the claims, and should be understood to include all modifications that fall within the meaning and scope equivalent to the claims. [Explanation of symbols]

[0078] 1 Linear Power Supply 2. Semiconductor Devices 10 Feedback control circuit 20 Drive circuit 30 Voltage divider circuit 40 Detection circuit Co capacitor CS1~CS4 current source M0, M0' output transistors M1~M10 transistors Q0 output transistor Q1~Q7 transistors R1~R6 resistance T1 input terminal T2 output terminal T3 ground terminal Z load

Claims

1. an output transistor configured to be connected between an input voltage application terminal and an output voltage application terminal; a first transistor and a second transistor, each having a base or a gate connected to a terminal to which the output voltage or a feedback voltage corresponding thereto is applied, so that a voltage difference is generated between the emitters or the sources of the first transistor and the second transistor; a drive circuit configured to generate a drive signal for the output transistor in response to a control signal output from the collector or drain of either the first transistor or the second transistor; a detection circuit configured to control the drive circuit to reduce an on-resistance value of the output transistor when the output voltage or the feedback voltage is lower than a threshold voltage; A linear power supply comprising:

2. 2. The linear power supply of claim 1, wherein the emitter or source of said first transistor has a larger area than the emitter or source of said second transistor.

3. 2. The linear power supply of claim 1, wherein the threshold voltage is set according to an on-threshold voltage of the first transistor.

4. the detection circuit includes a third transistor having a base or a gate connected to the base or the gate of each of the first transistor and the second transistor, and pulling up the control signal when the third transistor is in an off state; 2. The linear power supply according to claim 1, wherein the drive circuit reduces the on-resistance of the output transistor as the control signal becomes higher.

5. 5. The linear power supply of claim 4, wherein said detection circuit further comprises a clamping element configured to limit said control signal below an upper limit value.

6. 2. The linear power supply of claim 1, wherein the detection circuit controls the drive circuit to increase a drive current for switching the logic level of the drive signal when the output voltage or the feedback voltage is lower than the threshold voltage.

7. the drive current is a sum of a first current and a second current, 7. The linear power supply according to claim 6, wherein the drive circuit includes a switch element configured to connect / disconnect a path through which the second current flows in response to a detection result of the detection circuit.

8. 2. The linear power supply of claim 1, further comprising a current mirror configured to be connected between an application terminal of the input voltage and a collector or a drain of each of the first transistor and the second transistor.

9. a first resistor configured to be connected between the emitter or source of the first transistor and the emitter or source of the second transistor; a second resistor configured to be connected between the emitter or source of the second transistor and a ground terminal; 10. The linear power supply of claim 1 further comprising:

10. 10. The linear power supply of claim 1, further comprising a voltage divider circuit configured to divide the output voltage to generate the feedback voltage.

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