Display system

Abstract

A display device with a novel structure or a display system with a novel structure is provided.SOLUTION: The display device includes a first display device and a second display device, each of the first display device and the second display device has a wireless communication function, and the second display device includes a region having a higher pixel density than the first display device and has a function of displaying a screen of the first display device or part of a screen of the first display device on the second display device by using the wireless communication function. The screen ratio of the second display device is preferably 1:1, 4:3, or 16:9.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a display device and a display system including the display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. Examples of the technical field of one embodiment of the present invention disclosed in this specification and the like include a semiconductor device, an imaging device, a display device, a light-emitting device, a power storage device, a memory device, a display system, an electronic device, a lighting device, an input device, an input / output device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. Display devices (liquid crystal display devices, light-emitting display devices, etc.), projection devices, lighting devices, electro-optical devices, power storage devices, memory devices, semiconductor circuits, imaging devices, electronic devices, etc. may be referred to as semiconductor devices. Alternatively, they may be referred to as including semiconductor devices. [Background technology]

[0004] Wearable electronic devices and stationary electronic devices are becoming popular as electronic devices equipped with display devices for Augmented Reality (AR) or Virtual Reality (VR). Examples of wearable electronic devices include head-mounted displays (HMDs) and eyeglass-type electronic devices. Examples of stationary electronic devices include head-up displays (HUDs).

[0005] In electronic devices such as HMDs, where the display unit is close to the user, the user can easily see the pixels, which can cause a strong sense of graininess, which can diminish the immersive and realistic feel of AR or VR. For this reason, it is preferable to provide an HMD with a display device that has fine pixels so that the pixels are not visible to the user. Patent Document 1 discloses a method for realizing an HMD with fine pixels by using transistors that can be driven at high speed. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-2856 Summary of the Invention [Problem to be solved by the invention]

[0007] By making the pixels of a display device finer, the pixel density can be increased. This allows for more pixels to be provided on the display device, resulting in a high sense of immersion or realism. To achieve a greater sense of immersion or realism, it is preferable to have fewer pixel defects (bright spots, dark spots, etc.).

[0008] Alternatively, a plurality of display devices may be used as a display device (or electronic device). In this case, it is necessary to operate each of the plurality of display devices, which poses a problem that the operation method becomes very complicated.

[0009] An object of one embodiment of the present invention is to provide a display device having a novel configuration or a display system having a novel configuration, or to provide a method for operating a display device having a novel configuration or a method for operating a display system having a novel configuration.

[0010] It should be noted that the description of multiple problems does not preclude the existence of each other's problems. It should be noted that one embodiment of the present invention does not necessarily solve all of these problems. Furthermore, problems other than those listed will become apparent from the description of the specification, drawings, claims, etc., and these problems may also be problems of one embodiment of the present invention. [Means for solving the problem]

[0011] One embodiment of the present invention is a display system including a first display device and a second display device, each of which has a wireless communication function. The second display device has an area with a higher pixel density than the first display device, and has a function of displaying a screen of the first display device or a part of the screen of the first display device on the second display device using the wireless communication function.

[0012] Alternatively, one embodiment of the present invention is a display system including a first display device and a second display device, each of which has a wireless communication function. The second display device has an area with a higher pixel density than the first display device. The wireless communication function includes a function of transmitting information to the second display device in response to an operation on the first display device and a function of transmitting information to the first display device in response to an operation on the second display device. The display system also has a function of displaying a screen of the first display device or a part of the screen of the first display device on the second display device.

[0013] In each of the above aspects, the screen ratio of the second display device is preferably 1:1, 4:3, or 16:9. The second display device may have multiple display units. In this case, the screen ratio of each of the multiple display units is preferably 1:1, 4:3, or 16:9.

[0014] In each of the above aspects, it is preferable that the long sides of the display area of ​​the second display device are 33 mm or less and the short sides are 26 mm or less. Alternatively, it is preferable that the long sides of the display area of ​​the second display device are 52 mm or less and the short sides are 33 mm or less.

[0015] In each of the above aspects, the display system preferably has one or more selected from a source driver IC, a gate driver IC, and an FPC, which are electrically connected to the second display device.

[0016] In each of the above aspects, the second display device is preferably a goggle type, or alternatively, in each of the above aspects, the second display device is preferably a eyeglass type.

[0017] In each of the above aspects, it is preferable that the second display device has a control unit and an earphone unit, and that the control unit and the earphone unit are connected to each other by wire. Alternatively, in each of the above aspects, it is preferable that the second display device has earphones, the earphones have a wireless communication function, and either or both of the first display device and the second display device have a function of transmitting information to the earphones via the wireless communication function.

[0018] In each of the above aspects, it is preferable that the first display device has first image data, the second display device has second image data, and the second image data is image data upconverted based on the first image data. Alternatively, in each of the above aspects, it is preferable that the first display device has one or both of a call function and a time display function, and the second display device has one or both of a function to display augmented reality content and a function to display virtual reality content.

[0019] In each of the above aspects, it is preferable that the second display device has a first layer, a second layer, and a third layer, where the first layer has a driving circuit and a CPU, the second layer has pixel circuits, and the third layer has a display device. Alternatively, it is preferable that the second display device has a first layer, a second layer, and a third layer, where the first layer has a driving circuit and a CPU, the second layer has pixel circuits, and the third layer has a display device, where the first layer has a first transistor having a semiconductor layer having silicon in a channel formation region, the second layer has a second transistor having a semiconductor layer having a metal oxide in a channel formation region, and the third layer has an organic EL device.

[0020] In the above embodiment, the metal oxide preferably contains In, an element M (M is Al, Ga, Y, or Sn), and Zn. In the above embodiment, the organic EL device preferably is a light-emitting device processed by photolithography.

[0021] In each of the above aspects, it is preferable that the second display device has a function of acquiring information on one or more of the user's vision, hearing, touch, taste, smell, and electroencephalogram.

[0022] Note that other aspects of the present invention will be described in the following embodiments and in the drawings. [Effects of the Invention]

[0023] According to one embodiment of the present invention, it is possible to provide a display device having a novel configuration, a display system having a novel configuration, or a method for operating a display device having a novel configuration, or a method for operating a display system having a novel configuration.

[0024] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0025] [Figure 1] 1A to 1C are diagrams showing configuration examples of a display device and a display system. [Figure 2] 2A and 2B are diagrams showing configuration examples of a display device and a display system. [Figure 3] 3A and 3B are diagrams showing configuration examples of a display device and a display system. [Figure 4] 4A and 4B are diagrams showing configuration examples of a display device and a display system. [Figure 5] 5A to 5C are diagrams showing examples of screen ratios of display devices. [Figure 6] 6A to 6F are diagrams showing examples of the size of the display area of ​​a display device. [Figure 7] 7A to 7C are diagrams showing an example of the number of display devices that can be taken per substrate. [Figure 8] 8A to 8C are diagrams showing an example of the number of display devices that can be taken per substrate. [Figure 9] FIG. 9 is a diagram showing an example of an external appearance of the display device. [Figure 10] 10A to 10D are diagrams showing an example of an image of a display device and a display system. [Figure 11] FIG. 11 is a diagram showing an example of a method of operating the display system. [Figure 12] FIG. 12 is a block diagram showing an example of the configuration of a display device. [Figure 13] FIG. 13 is a block diagram showing an example of the configuration of a display device. [Figure 14]FIG. 14 is a block diagram showing an example of the configuration of a display device. [Figure 15] 15A and 15B are circuit diagrams showing configuration examples of a display device. [Figure 16] 16A to 16C are circuit diagrams and schematic diagrams showing configuration examples of a display device. [Figure 17] FIG. 17 is a block diagram showing an example of the configuration of a display device. [Figure 18] 18A to 18C are diagrams showing configuration examples of a light-emitting device. [Figure 19] 19A to 19D are diagrams showing configuration examples of a display device. [Figure 20] 20A and 20B are diagrams showing configuration examples of a display device. [Figure 21] FIG. 21 is a cross-sectional view showing an example of the configuration of a display device. [Figure 22] FIG. 22 is a cross-sectional view showing an example of the configuration of a display device. [Figure 23] FIG. 23 is a cross-sectional view showing an example of the configuration of a display device. [Figure 24] FIG. 24 is a cross-sectional view showing an example of the configuration of a display device. [Figure 25] FIG. 25 is a cross-sectional view showing an example of the configuration of a display device. [Figure 26] FIG. 26 is a cross-sectional view showing an example of the configuration of a display device. [Figure 27] 27A is a top view illustrating an example of the structure of a transistor, and FIGS. 27B and 27C are cross-sectional views illustrating an example of the structure of a transistor. [Figure 28] Fig. 28A is a diagram explaining the classification of IGZO crystal structures, Fig. 28B is a diagram explaining the XRD spectrum of a CAAC-IGZO film, and Fig. 28C is a diagram explaining the electron microbeam diffraction pattern of a CAAC-IGZO film. [Figure 29] 29A to 29D are diagrams showing an example of an electronic device. [Figure 30] 30A and 30B are diagrams showing an example of an electronic device. DETAILED DESCRIPTION OF THE INVENTION

[0026] Hereinafter, embodiments will be described with reference to the drawings. However, it will be readily understood by those skilled in the art that the embodiments can be implemented in many different forms and that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the following description of the embodiments.

[0027] In addition, in the drawings, the size, layer thickness, or area may be exaggerated for clarity, and therefore, are not necessarily limited to the scale. Note that the drawings are schematic illustrations of ideal examples, and are not limited to the shapes, values, etc. shown in the drawings.

[0028] In this specification and the like, unless otherwise specified, the off-state current refers to the drain current when a transistor is in an off state (also called a non-conducting state or a cut-off state). Unless otherwise specified, the off-state current refers to the drain current when a transistor is in an off state (also called a non-conducting state or a cut-off state) when a voltage V between the gate and the source of an n-channel transistor is applied. gs is the threshold voltage V th (For p-channel transistors, V th This refers to a state of being (higher than)

[0029] In this specification and the like, the term "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as "oxide semiconductors" or simply as "OSs"). For example, when a metal oxide is used in the active layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. In other words, an OS transistor can be rephrased as a transistor including an oxide or an oxide semiconductor.

[0030] In addition, in this specification and the like, a display device may be read as an electronic device.

[0031] In this specification, etc., a device fabricated using a metal mask or FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. Also, in this specification, etc., a device fabricated without using a metal mask or FMM may be referred to as a device with an MML (metal maskless) structure.

[0032] (Embodiment 1) In this embodiment, a display device and a display system which are one embodiment of the present invention will be described with reference to FIGS.

[0033] <Configuration example of display device and display system> 1A to 1C illustrate examples of the configuration of a display device and a display system according to one embodiment of the present invention.

[0034] 1A, a display system according to one embodiment of the present invention includes a first display device 100A and a second display device 102A. The first display device 100A and the second display device 102A each have a wireless communication function. The second display device 102A has a region with a higher pixel density (also referred to as definition) than the first display device 100A. The second display device 102A also has a function of displaying the screen of the first display device 100A or a part of the screen of the first display device 100A on the second display device 102A by using the wireless communication function.

[0035] As shown in FIG. 1A, a display system according to one embodiment of the present invention includes a plurality of display devices. The plurality of display devices exchange data using wireless communication functions, and a portion of image data displayed on one display device can be processed by a processing method such as upconversion or downconversion and then displayed on another display device. Such a display system improves user convenience, enables each display device to display an image with optimal image quality, and reduces the power consumption of the display devices.

[0036] The first display device 100A includes a display unit 110, a housing 111, a communication unit 112, and a control unit 114. FIG. 1A shows the user's right hand 130R. The second display device 102A includes a display unit 120, a housing 121, a communication unit 122, a mounting unit 123, a control unit 124, and a camera unit 125. Wireless communication between the first display device 100A and the second display device 102A can be performed between the communication units 112 and 122, as shown in FIG. 1A. The communication unit 112 has a function of transmitting information to the second display device 102A in response to an operation on the first display device 100A. The communication unit 122 has a function of transmitting information to the first display device 100A in response to an operation on the second display device 102A. Also, although not shown in Figures 1A and 1B, the first display device 100A, 100B and the second display device 102A may have a function to receive data transmitted from each display device.

[0037] The camera unit 125 of the second display device 102A has a function of acquiring external information. For example, data acquired by the camera unit 125 can be output to the display unit 120 or the display unit 110 of the first display device 100A. The wearing unit 123 of the second display device 102A allows the user to wear the second display device 102A on the head. While FIG. 1A illustrates the wearing unit 123 as having a shape similar to the temples of glasses (also called joints or temples), the shape is not limited to this. The wearing unit 123 may be, for example, helmet-shaped or band-shaped as long as it can be worn by the user.

[0038] Although an example having a camera unit 125 has been shown here, a distance measuring sensor (hereinafter also referred to as a detection unit) capable of measuring the distance to an object may be provided. In other words, the camera unit 125 is one aspect of the detection unit. As the detection unit, for example, one or both of an image sensor and a distance image sensor such as a LIDAR (Light Detection and Ranging) can be used. By using images obtained by the camera and images obtained by the distance image sensor, more information can be obtained, enabling more accurate gesture operations.

[0039] The second display device 102A preferably further includes a lens (not shown). In this case, the display unit 120 is provided inside the housing 121 at a position where it can be viewed through the lens. The second display device 102A can be said to be an electronic device for VR. A user wearing the second display device 102A can view an image displayed on the display unit 120 through the lens. Also, by displaying different images on the pair of display units 120, a three-dimensional display using parallax can be performed.

[0040] The second display device 102A may have a vibration mechanism that functions as a bone conduction earphone. For example, a configuration having such a vibration mechanism can be applied to one or more of the display unit 120, the housing 121, and the wearing unit 123. This allows a user to enjoy video and audio simply by wearing the second display device 102A, without the need for additional audio equipment such as headphones, earphones, or speakers.

[0041] In the display system according to one embodiment of the present invention, the first display device 100A and the second display device 102A are preferably connected to a network, which allows the first display device 100A and the second display device 102A to be used independently as communication tools.

[0042] Note that the processes that can be executed by the first display device 100A and the second display device 102A described in this embodiment are just examples, and various processes can be executed depending on the application software incorporated into the first display device 100A or the second display device 102A.

[0043] Next, an example of a configuration different from the configuration shown in FIG. 1A will be described with reference to FIG. 1B.

[0044] 1B includes a display unit 110, a housing 111, a communication unit 112, a band 113, and a control unit 114. Also shown in FIG. 1B are a user's right hand 130R and a user's left hand 130L. The configuration of a second display device 102A shown in FIG. 1B is the same as the configuration shown in FIG. 1A, and therefore will not be described here.

[0045] The first display device 100A shown in FIG. 1A has the function of a so-called information terminal (typically, a smartphone, etc.), and the first display device 100B shown in FIG. 1B has the function of a so-called watch-type information terminal. The first display device 100A and the first display device 100B each have at least one or both of a call function and a time display function. The second display device 102A has one or both of a function to display augmented reality (AR) content and a function to display virtual reality (VR) content. The second display device 102A may also have the function to display substitutional reality (SR) or mixed reality (MR) content in addition to AR and VR. The second display device 102A's ability to display AR, VR, SR, MR, and other content enhances the user's sense of immersion.

[0046] Next, a display device and a display system according to one embodiment of the present invention will be described with reference to FIGS. 1C, 2A, and 2B.

[0047] 1C illustrates a display device and a display system according to one embodiment of the present invention. As illustrated in FIG. 1C, a first display device 100 includes at least a display unit 110 and a communication unit 112, and a second display device 102 includes a display unit 120 and a communication unit 122.

[0048] 2A, the first display device 100 has a display unit 110, a communication unit 112, a control unit 114, a power supply unit 116, and a sensor unit 118. Also, as shown in FIG. 2A, the second display device 102 has a display unit 120, a communication unit 122, a control unit 124, a power supply unit 126, and a sensor unit 128.

[0049] 1C and 2A illustrate a configuration in which the first display device 100 and the second display device 102 have the same functions, but the present invention is not limited to this. For example, as shown in FIG. 2B, the first display device 100 and the second display device 102 may have different functions.

[0050] In FIG. 2B, the first display device 100 includes a camera unit 115 (also referred to as a detection unit) and a second communication unit 119 in addition to the configuration shown in FIG. 2A. The second display device 102 includes a camera unit 125 and a headphone unit 129 in addition to the configuration shown in FIG. 2A. The camera unit 115 may include an imaging unit such as an image sensor. Multiple cameras may be provided to accommodate multiple angles of view, such as telephoto and wide-angle. The second communication unit 119 may have a function for performing communication with a different function from that of the communication unit 112. For example, the communication unit 112 may have a function for communicating with the communication unit 122, and the second communication unit 119 may have a function for voice calls using a third-generation mobile communication system (3G), a fourth-generation mobile communication system (4G), a fifth-generation mobile communication system (5G), or the like, or a communication means for electronic payment, etc.

[0051] Next, examples of configurations different from those shown in FIGS. 1A and 1B will be described with reference to FIGS. 3A, 3B, 4A, and 4B.

[0052] The second display device 102B shown in FIG. 3A and the second display device 102C shown in FIG. 3B each have a display unit 120, a housing 121, a communication unit 122, an attachment unit 123, a control unit 124, a camera unit 125, and a lens 132.

[0053] The second display device 102B and the second display device 102C can be said to be electronic devices for VR. A user wearing the second display device 102B or the second display device 102C can view an image displayed on the display unit 120 through the lens 132.

[0054] The second display device 102D shown in FIG. 4A and the second display device 102E shown in FIG. 4B each have a display panel 151, a housing 121, a communication unit (not shown), an attachment unit 123, a control unit (not shown), a camera unit (not shown), a pair of optical members 153, a frame 157, and a nose pad 158.

[0055] The second display device 102D and the second display device 102E can each project an image displayed on the display panel 151 onto a display area 156 of the optical member 153. Because the optical member 153 is translucent, the user can see the image displayed in the display area superimposed on a transmitted image visually recognized through the optical member 153. Therefore, the second display device 102D and the second display device 102E are each electronic devices capable of AR display.

[0056] The display system of one embodiment of the present invention may further include earphones 106. The earphones 106 include a communication unit (not shown) and have a wireless communication function. The earphones 106 can receive information (e.g., audio data) from one or both of the first display device and the second display device through the wireless communication function. For example, the second display device 102B shown in FIG. 3A has a function of transmitting information to the earphones 106 through the wireless communication function. Furthermore, for example, the second display device 102D shown in FIG. 4A has a function of transmitting information to the earphones 106 through the wireless communication function.

[0057] Furthermore, each of second display device 102C and second display device 102E further includes earphone unit 127. For example, earphone unit 127 and control unit 124 can be configured to be connected to each other by wire. Part of the wiring connecting earphone unit 127 and control unit 124 may be disposed inside housing 121 or wearing unit 123. Furthermore, earphone unit 127 and wearing unit 123 may have magnets. This allows earphone unit 127 to be fixed to wearing unit 123 by magnetic force, which is preferable as it makes storage easier.

[0058] The second display device may have an audio output terminal to which earphones or headphones can be connected. The second display device may also have either or both of an audio input terminal and an audio input mechanism. For example, a sound collection device such as a microphone can be used as the audio input mechanism. By including the audio input mechanism in the second display device, the second display device may be endowed with the functionality of a so-called headset.

[0059] As described above, in the display system of one embodiment of the present invention, either a goggle-type display device (such as the second display device 102A to the second display device 102C) or an eyeglass-type display device (such as the second display device 102D and the second display device 102E) is suitable as the second display device.

[0060] In the display system according to one embodiment of the present invention, the display device can transmit information to the earphones in a wired or wireless manner.

[0061] 1A, 1B, 1C, 2A, 2B, 3A, and 3B preferably has a higher resolution than the display unit 110. Similarly, the display panel 151 shown in FIGS. 4A and 4B preferably has a higher resolution than the display unit 110. For example, the display unit 110 may have a resolution such as HD (1280×720 pixels), FHD (1920×1080 pixels), or WQHD (2560×1440 pixels). Furthermore, the display unit 120 and the display panel 151 preferably have extremely high resolutions such as WQXGA (2560×1600 pixels), 4K2K (3840×2160 pixels), or 8K4K (7680×4320 pixels), respectively. In particular, a resolution of 4K2K, 8K4K, or higher is preferable.

[0062] Furthermore, it is preferable that the display unit 120 and the display panel 151 each have a higher pixel density (resolution) than the display unit 110. For example, the display unit 110 can have a pixel density of 100 ppi or more and less than 1000 ppi, and preferably 300 ppi or more and 800 ppi or less. The display unit 120 and the display panel 151 can each have a pixel density of 1000 ppi or more and 10000 ppi or less, preferably 2000 ppi or more and 6000 ppi or less, and more preferably 3000 ppi or more and 5000 ppi or less.

[0063] There are no particular limitations on the screen ratios (aspect ratios) of display unit 110, display panel 151, and display unit 120. For example, display unit 110, display panel 151, and display unit 120 can each support various screen ratios such as 1:1 (square), 4:3, 16:9, and 16:10.

[0064] 5A to 5C show examples of screen ratios of display devices. FIG. 5A is an example where the screen ratio of the display unit 120 is 1:1. FIG. 5B is an example where the screen ratio of the display unit 120 is 4:3. In this case, the resolution of the display unit 120 is preferably 4K2K or 8K4K. FIG. 5C is an example where the screen ratio of the display unit 120 is 16:9. In this case, the resolution of the display unit 120 is preferably 8K4K.

[0065] Here, the relationship between the size of the display unit (also referred to as the size of the display area) of a display device and the exposure area of ​​an exposure device will be explained. By considering the size of the display area of ​​the display device based on the exposure area of ​​the exposure device, a display device can be manufactured at an optimal manufacturing cost. For example, a stepper or a scanner can be used as the exposure device. Furthermore, examples of wavelengths of light sources that can be used in the exposure device include 13 nm (EUV (Extreme Ultra Violet)), 157 nm (F2), 193 nm (ArF), 248 nm (KrF), 308 nm (XeCl), 365 nm (i-line), and 436 nm (g-line). By using a light source with a short wavelength, a display device with high definition or finer details can be obtained.

[0066] Note that, as the maximum exposure area of ​​an exposure device is currently mainly 26mm x 33mm, the following explanation will use this as the standard. If the maximum exposure area of ​​an exposure device is 26mm x 33mm, the size of the display area of ​​a display device that can be achieved with one exposure (1 shot) is 26mm x 33mm. Furthermore, the size of the display area of ​​a display device that can be achieved with two exposures (2 shots) is 52mm x 33mm or 26mm x 66mm. Note that by keeping the size of the display area of ​​the display device within the range that can be achieved with one exposure, manufacturing costs can be reduced.

[0067] As mentioned above, the screen ratio (aspect ratio) of the display device is not particularly limited, but can be 1:1 (square), 4:3, 16:9, 16:10, or the like.

[0068] As shown in Figures 6A to 6C, when the maximum exposure area of ​​the exposure device is "26 mm x 33 mm," the maximum size of the display area of ​​the display device that can be produced by a single exposure is "26 mm x 26 mm" when the aspect ratio is 1:1, "33 mm x 24.75 mm" when the aspect ratio is 4:3, and "33 mm x 18.5625 mm" when the aspect ratio is 16:9.

[0069] Furthermore, as shown in Figures 6D to 6F, when the maximum exposure area of ​​the exposure device is "26 mm x 33 mm," the maximum size of the display area of ​​the display device that can be produced by performing two exposures is "33 mm x 33 mm" when the aspect ratio is 1:1, "44 mm x 33 mm" when the aspect ratio is 4:3, and "52 mm x 29.25 mm" when the aspect ratio is 16:9.

[0070] Note that the above values ​​are the maximum sizes of the display area of ​​the display device, and the actual outer size of the display device is equal to or larger than the size of the display area of ​​the display device. The aspect ratio of the outer size of the display device and the aspect ratio of the display area of ​​the display device may be the same or different. Tables 1 and 2 below show the specifications of the display portion (display area) of a display device that can be used in one embodiment of the present invention. As shown in Tables 1 and 2, the display portion has an extremely high resolution of 4K3K (3840 × 2880 pixels).

[0071] [Table 1]

[0072] [Table 2]

[0073] 7A to 7C and 8A to 8C show an example of the number of display devices that can be obtained from one substrate with a diameter Φ of 12 inches. In FIGS. 7A to 7C and 8A to 8C, estimates are made assuming that the external connection terminals are taken out from the backside using through-electrodes. This allows for a larger display area. Pads may also be provided within the exposure area. In this case, the display area becomes smaller, but this has the effect of reducing the manufacturing cost related to the configuration for taking out the external connection terminals.

[0074] Figure 7A shows an example in which a sealing region with a width of 2.0 mm is provided inside the exposure region (32 mm x 24 mm) of the exposure device. Note that the sealing region here refers to the region from the edge of the display region to the dividing position of the substrate or the position of the terminals, and is not necessarily the region to which the sealing material is applied. In this case, the size of the display region of the display device is 28 mm x 20 mm, or approximately 1.38 inches diagonally. The number of display devices that can be produced per substrate is 72. Note that if the width of the sealing region is reduced to 1.0 mm, the display region of the display device can be reduced to approximately 1.5 inches diagonally.

[0075] Figures 7B and 7C show examples in which a sealing region is provided outside the exposure region (32 mm x 24 mm) of the exposure device. In this case, a gap is left for the sealing region during exposure. A marker region is provided inside the exposure region. Figure 7B shows an example in which the width of the marker region is 0.5 mm and the width of the sealing region is 2.0 mm. In this case, the size of the display area of ​​the display device is approximately 1.53 inches diagonally. The number of display devices that can be produced per substrate is 56. If the width of the marker region is 1.0 mm, the size of the display area is approximately 1.47 inches diagonally. Figure 7C shows an example in which the width of the marker region is 0.5 mm and the width of the sealing region is 3.0 mm. In this case, the size of the display area of ​​the display device is approximately 1.53 inches diagonally, the same as the configuration in Figure 7B. The number of display devices that can be produced per substrate is 49, which is approximately 13% lower than the configuration in Figure 7B.

[0076] 8A to 8C each show an example in which the aspect ratio of the display area is 4:3.

[0077] FIG. 8A shows an example in which a sealing region is provided inside the exposure region (32 mm × 24 mm) of an exposure device. In the example of FIG. 8A, the width of the sealing region is 1.5 mm in the vertical direction and 2.0 mm in the horizontal direction. In this case, the size of the display region is 28 mm × 21 mm (aspect ratio 4:3), with a diagonal size of approximately 1.38 inches. The number of display devices that can be obtained per substrate is 72. If the width of the sealing region is 2.0 mm in the vertical direction and 2.65 mm in the horizontal direction, the size of the display region is 26.7 mm × 20 mm (aspect ratio 4:3), with a diagonal size of approximately 1.32 inches. If the width of the sealing region is 3.0 mm in the vertical direction and 4.0 mm in the horizontal direction, the size of the display region is 24 mm × 18 mm (aspect ratio 4:3), with a diagonal size of approximately 1.18 inches. In both cases, the number of display devices per substrate is 72.

[0078] Figures 8B and 8C show examples in which a sealing region is provided outside the exposure region (32 mm x 24 mm) of the exposure device. In this case, a gap is left for the sealing region during exposure. A marker region is provided inside the exposure region. Figure 8B shows an example in which the width of the marker region is 0.5 mm in the vertical direction and 0.7 mm in the horizontal direction, and the width of the sealing region is 2.0 mm. In this case, the size of the display region of the display device is approximately 1.51 inches diagonally. The number of display devices per substrate is 56. In addition, if the width of the marker region is 1.0 mm in the vertical direction and 1.3 mm in the horizontal direction, the size of the display region is approximately 1.45 inches diagonally. Figure 8C shows an example in which the width of the marker region is 1.0 mm in the vertical direction and 1.3 mm in the horizontal direction, and the width of the sealing region is 3.0 mm. In this case, the size of the display region of the display device is approximately 1.53 inches diagonally. The number of display devices that can be obtained from one substrate is 49, which is approximately 13% less than the configuration in FIG. 8B.

[0079] Note that by making the size of the display area of ​​the display device equal to or larger than the size of a human eyeball (approximately 23 to 24 mm), the display device can be arranged so as to cover the entire eye or the entire field of view. For example, by making the display area of ​​the display device equal to or larger than 1.0 inch diagonally, preferably equal to or larger than 1.4 inch, and more preferably equal to or larger than 1.5 inch, the display device can be arranged so as to cover the entire field of view of the user. Therefore, by using the display device or display system of one embodiment of the present invention, one or more of a sense of immersion, a sense of presence, and a sense of depth can be enhanced.

[0080] In order for the user to feel one or more of the sense of immersion, presence, and depth more strongly, it is preferable that the second display device has multiple display units. For example, it is preferable that the second display device has a first display unit and a second display unit, and the screen ratios of the first display unit and the second display unit are 1:1, 4:3, or 16:9, respectively, and the diagonal lengths of the display areas of the first display unit and the second display unit are 1.0 inch or more and 2.5 inches or less, respectively.

[0081] Note that the display unit 110 is preferably formed on a glass substrate, and the display unit 120 is preferably formed on a silicon substrate. Forming the display unit 110 on a glass substrate can reduce manufacturing costs. On the other hand, when the display unit 110 is formed on a glass substrate, it may be difficult to increase the pixel density of the display unit 110 (typically, 1000 ppi or more) due to the nature of a manufacturing apparatus. Therefore, in the display device and display system of one embodiment of the present invention, the display unit 120 is formed on a silicon substrate, which can increase the pixel density of the display unit 120 (typically, 1000 ppi or more). In other words, the display unit 120 can compensate for and display an image with a resolution that the display unit 110 cannot handle.

[0082] A display system according to one embodiment of the present invention includes two display devices having different resolutions or pixel densities. Image data that can be displayed on one display device can be partially or entirely compressed or decompressed to be suitable for the other display device.

[0083] By increasing the resolution or definition of the display unit 120, the user cannot recognize the pixels (e.g., they cannot see the lines that may occur between the pixels), and therefore, can feel one or more of the following enhanced sensations: immersion, presence, and depth.

[0084] 1A, the first display device 100A has a period when the display unit does not display anything, and during this period, the first display device 100A functions as an input / output unit (e.g., a controller) of the second display device 102A. Having such a function can extend the usage period of the power supply unit 116 included in the first display device 100A. That is, the display system according to one embodiment of the present invention can save power. Note that the power supply unit 116 can be, for example, a lithium-ion secondary battery.

[0085] The first display device 100A may function as a so-called power supply unit during periods when the display unit is not displaying. In other words, the first display device 100A may function as a battery or a mobile battery. For example, the first display device 100A may be connected to a second display device or another electronic device via a wired connection, and power may be supplied from the first display device 100A. Alternatively, power may be supplied from the first display device 100A to the second display device or another electronic device using a contactless power supply system. Examples of contactless power supply systems include a wireless power supply system that uses an electromagnetic induction system and does not require a charging cable, and a space-transmission type wireless power transmission system that uses a radio wave reception system and can charge contactlessly. For example, a microwave space-transmission type wireless power transmission system that uses microwaves (specifically, frequency bands such as the 920 MHz band, the 2.4 GHz band, and the 5.7 GHz band) and can charge contactlessly (for example, within a radius of 10 m) may be used.

[0086] 9 shows an external view of a display device with an external drive circuit. A display unit 161, external connection terminals 163 for gate drivers, and external connection terminals 165 for source drivers are provided on a substrate 160. The display unit 161 and external connection terminals 163 for gate drivers are electrically connected by wiring 167. Similarly, the display unit 161 and external connection terminals 165 for source drivers are electrically connected by wiring 167.

[0087] In FIG. 9, the external connection terminals 163 for the gate driver are shown in two regions, and the external connection terminals 165 for the source driver are shown in six regions, but the number and layout of the regions in which the external connection terminals 163 for the gate driver and the external connection terminals 165 for the source driver are provided are not particularly limited.

[0088] The gate driver external connection terminals 163 and the source driver external connection terminals 165 are each electrically connected to an FPC (Flexible Printed Circuit) or an integrated circuit (IC). For example, in a display device with a built-in gate driver and an external source driver IC, the gate driver external connection terminals 163 are electrically connected to the FPC, and the source driver external connection terminals 165 are electrically connected to the source driver IC. The source driver external connection terminals 165 may also be electrically connected to the FPC. When the gate driver IC is externally connected, the gate driver external connection terminals 163 are electrically connected to the gate driver IC.

[0089] Furthermore, when a substrate with a diagonal of 5 inches is used as the substrate 160, it is possible to manufacture a display device in which the size of the display section 161 is 1.57 inches diagonal, which satisfies the specifications shown in Table 2 above.

[0090] Next, the configurations of the display device and the display system according to one embodiment of the present invention shown in FIGS. 1A, 1B, 1C, 2A, 2B, 3A, 3B, 4A, and 4B will be described below.

[0091] <Display unit and display panel> The display unit 110, the display unit 120, and the display panel 151 each have a display function. For example, one or more selected from a liquid crystal display device, a light-emitting device including an organic electroluminescence (EL), and a light-emitting device including a light-emitting diode (LED) such as a micro LED can be used for the display unit 110, the display unit 120, and the display panel 151. Considering productivity and light-emitting efficiency, it is preferable to use a light-emitting device including an organic electroluminescence (EL) for the display unit 110, the display unit 120, and the display panel 151.

[0092] <Communications Department> The communication units 112 and 122 each have a function of communicating wirelessly or via a wire. It is particularly preferable that the communication units 112 and 122 have a function of communicating wirelessly, since this reduces the number of components such as cables for connection.

[0093] When the communication unit 112 and the communication unit 122 have a function of wireless communication, the communication unit 112 and the communication unit 122 can communicate via an antenna. As a communication means (communication method) between the communication unit 112 and the communication unit 122, for example, communication can be performed by connecting each device to a computer network such as the Internet, which is the foundation of the World Wide Web (WWW), an intranet, an extranet, a PAN (Personal Area Network), a LAN (Local Area Network), a CAN (Campus Area Network), a MAN (Metropolitan Area Network), a WAN (Wide Area Network), or a GAN (Global Area Network). When performing wireless communication, communication standards such as LTE (Long Term Evolution), GSM (Global System for Mobile Communication: registered trademark), EDGE (Enhanced Data Rates for GSM Evolution), CDMA2000 (Code Division Multiple Access 2000), W-CDMA (registered trademark), or IEEE communication standard specifications such as Wi-Fi (registered trademark), Bluetooth (registered trademark), and ZigBee (registered trademark) can be used as communication protocols or communication technologies.

[0094] <Control unit> The control unit 114 and the control unit 124 each have the function of controlling the display unit. The control unit 114 and the control unit 124 include, for example, a pixel circuit, a backup circuit, and an image conversion circuit. The image conversion circuit can perform an up-conversion process or a down-conversion process of image data. This makes it possible to up-convert low-resolution image data or down-convert high-resolution image data to match the resolution of the display unit, thereby enabling high-quality images to be displayed on the display unit. The pixel circuit and the backup circuit will be described in detail in embodiment 2.

[0095] <Power supply section> The power supply unit 116 and the power supply unit 126 each have the function of supplying power to the display unit. For example, a primary battery or a secondary battery can be used for the power supply unit 116 and the power supply unit 126. Note that, for example, a lithium ion secondary battery can be suitably used as the secondary battery.

[0096] <Sensor section> The sensor unit 118 and the sensor unit 128 each have a function to acquire information from one or more of the user's senses of sight, hearing, touch, taste, and smell. More specifically, the sensor unit 118 and the sensor unit 128 each have a function to measure at least one of force, displacement, position, speed, acceleration, angular velocity, number of rotations, distance, light, magnetism, temperature, sound, time, electric field, current, voltage, power, radiation, humidity, gradient, vibration, odor, and infrared light.

[0097] In addition to the above functions, the sensor unit 128 preferably has a function of measuring brain waves. For example, it may have a mechanism that has a plurality of electrodes that come into contact with the head and measures brain waves from a weak current that flows through the electrodes. By having the function of measuring brain waves, the sensor unit 128 can display an image on the display unit 110, or a part of an image on the display unit 110, on the display unit 120 wherever the user thinks. In this case, the user does not need to use both hands to operate the display device, and can therefore perform input operations and the like without holding anything in both hands (with both hands free).

[0098] Next, examples of images of the display device and the display system of one embodiment of the present invention will be described with reference to FIGS. 10A, 10B, 10C, and 10D.

[0099] <Image example> An example of an operation method that can be experienced by a user and an image that can be presented to the user by a display system according to one embodiment of the present invention will be described below.

[0100] 10A shows a state in which a user 130 is wearing a second display device 102B and operating a first display device 100A. At this time, the display unit of the first display device 100A is turned off and functions as a touchpad or the like. The user 130 can use the first display device 100A to operate images and the like provided by the second display device 102B.

[0101] FIG. 10B shows an example of an image 140 shown in FIG. 10A that appears in the field of view of a user 130 in a room. In the image 140 shown in FIG. 10B, image information 141 is displayed superimposed on an image of the actual interior scenery, such as a floor, a wall, and a door. Here, the image information 141 is an image displayed on the display unit of the first display device 100A. While wearing the second display device 102B, the user 130 can operate the first display device 100A (e.g., a smartphone) paired with the second display device 102B. Furthermore, a cursor 142 in the image 140 indicates the position information when the user 130 touches the display unit of the first display device 100A. Furthermore, at this time, the display unit of the first display device 100A is actually turned off, and therefore the first display device 100A is operating at low power consumption.

[0102] 10C shows a state in which user 130, wearing second display device 102B, is operating the display system by making gestures. At this time, first display device 100A is in a pocket of user 130's clothing, so user 130 can operate the display system with both hands free. Furthermore, because the display unit of first display device 100A is turned off, power consumption of first display device 100A can be reduced.

[0103] FIG. 10D shows an example of image 140 shown in FIG. 10C and displayed in the field of view of user 130 who is indoors. In FIG. 10D, horizontally elongated image information 141 is displayed within image 140. Also displayed within image 140 is user 130's right hand 130R. FIG. 10D shows a state in which handwritten image information is being input into image information 141. User 130 can draw letters or illustrations by following the trajectory of the fingertips of right hand 130R displayed within image 140. Note that instead of right hand 130R, a writing implement such as a pen, a stylus, or the like can also be used.

[0104] 10B and 10D show a configuration in which image information 141 is displayed within image 140, but the present invention is not limited to this. For example, the image information 141 can be moved by a user pinching the image information 141 with their fingers (for example, a gesture of grabbing the image information 141 with their thumb and index finger). Alternatively, an operation method can be used in which the image information 141 is pinched with the fingers and then moved outside of image 140 (for example, the image information 141 is pinched with the fingers and then flicked out of image 140 like a Frisbee). This operation method allows the user to arbitrarily operate the information displayed in image 140, so that only necessary information can be displayed in image 140.

[0105] In this way, the display device and the display system according to one embodiment of the present invention can be operated using a new operation method or a new operation method.

[0106] Next, an example of a method of operating the display system of one embodiment of the present invention will be described with reference to FIGS.

[0107] [Example of how the display system works] An example of an operation method of the display system will be described below with reference to a flowchart shown in FIG.

[0108] In step S01, the operation starts. At this time, it is assumed that the first display device 100A is in an activated state (a state in which it can be operated), and the second display device 102B is in a powered-on state.

[0109] In step S02, the second display device 102B is worn. The second display device 102B recognizes that it has been worn, and the system starts up. In step S02, for example, if the second display device 102B is in the form of goggles, an image from a camera in front of the display device 102B may be provided to the user, or an image of other content may be displayed.

[0110] In step S03, pairing is performed between the first display device 100A and the second display device 102B. When pairing is complete, bidirectional data exchange becomes possible between the first display device 100A and the second display device 102B.

[0111] In step S04, the first image displayed on display unit 110 of first display device 100A is displayed on display unit 120 of second display device 102B. This allows the user to see the information displayed on second display device 102B without looking at the screen of first display device 100A.

[0112] In this case, since the pixel density of the display unit differs between the first display device 100A and the second display device 102B, it is preferable to display, on the second display device 102B, a second image that has been subjected to image processing such as up-conversion or down-conversion of the first image so that the image will be of an optimal size when displayed on the display unit 120 of the second display device 102B, rather than displaying the first image as is.

[0113] In step S05, second display device 102B transmits information to first display device 100A. For example, the information includes a code indicating that the display of the first image has been completed.

[0114] In step S06, the first display device 100A turns off the display unit 110 based on the received information. At this time, the touch sensor of the display unit 110 of the first display device 100A remains active. This allows the display unit 110 of the first display device 100A to function as an input unit (touch pad) or the like.

[0115] In step S07, the first display device 100A detects a touch operation on the display unit 110 by the user.

[0116] Although touch operations are used here, the operations are not limited to these and include various operations that can be detected by sensors included in the first display device 100A. For example, an acceleration sensor can be used to obtain three-dimensional position information of the first display device 100A itself and information on the tilt (also called attitude) of the first display device 100A.

[0117] In step S08, the first display device 100A transmits touch information to the second display device 102B. Specifically, the first display device 100A transmits touch position information to the second display device 102B.

[0118] In step S09, the second display device 102B executes various processes based on the received touch information. For example, the second display device 102B can classify the gesture operation based on the change in the touch position over time, and execute a process that matches the operation and the touch position.

[0119] The process ends in step S10. Step S10 corresponds to, for example, removing the second display device 102B, turning off the power of the first display device 100A or the second display device 102B, or canceling the pairing between the first display device 100A and the second display device 102B.

[0120] The above is a description of an example of a method for operating the display system according to one embodiment of the present invention.

[0121] As described above, by using the display device and the display system of one embodiment of the present invention, a display device or a display system having a novel structure can be provided.Furthermore, by using the display device and the display system of one embodiment of the present invention, a method for operating a display device or a display system having a novel structure can be provided.

[0122] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate.

[0123] (Embodiment 2) In this embodiment, a display device and a display system which are one embodiment of the present invention will be described.

[0124] <Example of display device configuration> 12 is a block diagram schematically illustrating a structural example of a display device 10, which is a display device of one embodiment of the present invention. The display device 10 includes a layer 20 and a layer 30, and the layer 30 can be stacked, for example, above the layer 20. An interlayer insulator or a conductor for electrical connection between different layers can be provided between the layer 20 and the layer 30.

[0125] The transistors provided in the layer 20 can be, for example, transistors having silicon in their channel formation regions (also referred to as Si transistors), such as transistors having single crystal silicon in their channel formation regions. In particular, when transistors having single crystal silicon in their channel formation regions are used as the transistors provided in the layer 20, the on-state current of the transistors can be increased. Therefore, it is preferable that the circuits included in the layer 20 be driven at high speed. In addition, Si transistors can be formed by microfabrication to have a channel length of 3 nm to 10 nm, and therefore can be used in the display device 10 provided with an accelerator such as a CPU or a GPU, an application processor, or the like.

[0126] The transistor provided in the layer 30 can be, for example, an OS transistor. In particular, it is preferable to use a transistor having an oxide containing at least one of indium, an element M (the element M is aluminum, gallium, yttrium, or tin), and zinc in a channel formation region as the OS transistor. Such an OS transistor has a characteristic of having a very low off-state current. Therefore, it is preferable to use an OS transistor as a transistor provided in a pixel circuit in a display portion, because analog data written in the pixel circuit can be retained for a long period of time.

[0127] The layer 20 is provided with a driving circuit 40 and a functional circuit 50. The layer 20 is provided with Si transistors with high on-state current, so that each circuit included in the layer 20 can be driven at high speed.

[0128] The layer 30 includes a display unit 60 having a plurality of pixels 61. Each pixel 61 includes pixel circuits 62R, 62G, and 62B that control red, green, and blue light emission. The pixel circuits 62R, 62G, and 62B function as subpixels of the pixel 61. The pixel circuits 62R, 62G, and 62B each include an OS transistor, allowing analog data written to the pixel circuit to be retained for a long period of time. Each pixel 61 in the layer 30 is also provided with a backup circuit 82. The backup circuit may also be called a storage circuit or a memory circuit.

[0129] The driving circuit 40 includes a gate line driving circuit, a source line driving circuit, and the like for driving the pixels 61 (pixel circuits 62R, 62G, and 62B). By arranging the driving circuit 40 on a layer 20 different from the layer 30 on which the display unit is provided, the area occupied by the display unit in the layer 30 can be increased. The driving circuit 40 may also include an LVDS (Low Voltage Differential Signaling) circuit or a D / A (Digital to Analog) conversion circuit that functions as an interface for receiving data such as image data from outside the display device 10. The Si transistors in the layer 20 can increase their on-state current. The channel length or channel width of the Si transistors may be varied depending on the operating speed of each circuit.

[0130] The functional circuit 50 has a processor (e.g., a CPU) used for arithmetic processing of data. The CPU has multiple CPU cores. Each CPU core has a flip-flop. The flip-flop has multiple scan flip-flops. The flip-flop 80 inputs and outputs data (backup data) from the scan flip-flop to and from a backup circuit 82. In FIG. 12, backup data BD is illustrated as a data signal held in the backup circuit 82.

[0131] A memory having an OS transistor, for example, is suitable for the backup circuit 82. Using OS transistors with extremely low off-state current in a backup circuit made up of OS transistors has advantages such as the ability to retain the voltage of analog data written in the backup circuit for a long period of time and consuming almost no power to retain the data. The backup circuit 82 having OS transistors can be provided in a display unit 60 in which multiple pixels 61 are arranged. FIG. 12 illustrates how a backup circuit 82 is provided for each pixel 61.

[0132] The backup circuit 82, which is made up of OS transistors, can be stacked on the layer 20 having Si transistors. The backup circuits 82 may be arranged in a matrix, like the sub-pixels in the pixel 61, or may be arranged for each set of pixels. In other words, the backup circuits 82 can be arranged in the layer 30 without being restricted by the arrangement of the pixels 61. This increases the degree of freedom in the display unit / circuit layout, allows for arrangement without increasing the circuit area, and allows for an increase in the storage capacity of the backup circuit 82 required for arithmetic processing.

[0133] <Configuration example of pixel circuit and backup circuit> 13 and 14, a configuration example of the arrangement of the backup circuit 82 and pixel circuits 62R, 62G, and 62B, which are sub-pixels, in the display unit 60 will be described.

[0134] 13 illustrates a configuration in which a plurality of pixels 61 are arranged in a matrix in a display unit 60. Each pixel 61 includes pixel circuits 62R, 62G, and 62B as well as a backup circuit 82. As described above, the backup circuit 82 and the pixel circuits 62R, 62G, and 62B can all be configured using OS transistors, and therefore can be arranged within the same pixel.

[0135] <Block diagram of display device> 14 is a block diagram illustrating each component of the display device 10. The display device has a drive circuit 40, a functional circuit 50, and a display unit 60.

[0136] The drive circuit 40 includes, for example, a gate driver 41 and a source driver 42. The gate driver 41 has a function of driving a plurality of gate lines GL for outputting signals to the pixel circuits 62R, 62G, and 62B. The source driver 42 has a function of driving a plurality of source lines SL for outputting signals to the pixel circuits 62R, 62G, and 62B. The drive circuit 40 also supplies voltages for displaying images in the pixel circuits 62R, 62G, and 62B to the pixel circuits 62R, 62G, and 62B via a plurality of wirings.

[0137] The functional circuit 50 has a CPU 51. The CPU 51 has a CPU core 53. The CPU core 53 has a flip-flop 80 for temporarily holding data used in arithmetic processing. The flip-flop 80 has a plurality of scan flip-flops 81, and each scan flip-flop 81 is electrically connected to a backup circuit 82 provided in the display unit 60.

[0138] The display unit 60 has a plurality of pixels 61, each of which is provided with pixel circuits 62R, 62G, and 62B, and a backup circuit 82. As described in Fig. 13, the backup circuit 82 does not necessarily have to be arranged within the pixel 61, which is the repeating unit. The backup circuit 82 can be arranged freely depending on the shape of the display unit 60, the shapes of the pixel circuits 62R, 62G, and 62B, etc.

[0139] <Pixel circuit configuration example> 15A and 15B show a configuration example of a pixel circuit 62 applicable to the pixel circuits 62R, 62G, and 62B, and a light-emitting element 70 connected to the pixel circuit 62. Fig. 15A is a diagram showing the connection of each element, and Fig. 15B is a diagram schematically showing the hierarchical relationship between the drive circuit 40, pixel circuit 62, and light-emitting element 70.

[0140] In this specification and the like, the term “element” may be replaced with “device” in some cases. For example, a display element, a light-emitting element, and a liquid crystal element may be replaced with a display device, a light-emitting device, and a liquid crystal device, for example.

[0141] 15A and 15B includes a switch SW21, a switch SW22, a transistor M21, and a capacitor C21. The switch SW21, the switch SW22, and the transistor M21 can be configured as OS transistors. Each of the OS transistors, the switch SW21, the switch SW22, and the transistor M21, preferably includes a back gate electrode. In this case, the back gate electrode can be configured to receive the same signal as the gate electrode, or a signal different from the gate electrode can be applied to the back gate electrode.

[0142] The transistor M21 includes a gate electrode electrically connected to the switch SW21, a first electrode electrically connected to the light-emitting element 70, and a second electrode electrically connected to a wiring ANO. The wiring ANO is a wiring for applying a potential for supplying a current to the light-emitting element 70.

[0143] The switch SW21 has a first terminal electrically connected to the gate electrode of the transistor M21 and a second terminal electrically connected to the source line SL, and has the function of controlling the conductive state or non-conductive state based on the potential of the gate line GL1.

[0144] The switch SW22 has a first terminal electrically connected to the wiring V0 and a second terminal electrically connected to the light-emitting element 70, and has a function of controlling the conductive state or non-conductive state based on the potential of the gate line GL2. The wiring V0 is a wiring for applying a reference potential and a wiring for outputting the current flowing through the pixel circuit 62 to the drive circuit 40 or the functional circuit 50.

[0145] The capacitor C21 includes a conductive film electrically connected to the gate electrode of the transistor M21 and a conductive film electrically connected to the second electrode of the switch SW22.

[0146] The light emitting element 70 includes a first electrode electrically connected to the first electrode of the transistor M21 and a second electrode electrically connected to a wiring VCOM, to which a potential is applied for supplying a current to the light emitting element 70.

[0147] This allows the intensity of light emitted by the light-emitting element 70 to be controlled in accordance with an image signal applied to the gate electrode of the transistor M21. Furthermore, the amount of current flowing through the light-emitting element 70 can be increased by applying a reference potential to the wiring V0 via the switch SW22. Furthermore, by monitoring the amount of current flowing through the wiring V0 with an external circuit, the amount of current flowing through the light-emitting element can be estimated. This allows pixel defects and the like to be detected.

[0148] In the configuration shown in FIG. 15B as an example, the wiring electrically connecting the pixel circuits 62 and the drive circuit 40 can be shortened, thereby reducing the wiring resistance of the wiring. This allows data to be written at high speed, thereby enabling the display device 10 to be driven at high speed. This allows a sufficient frame period to be secured even when the display device 10 has a large number of pixels 61, thereby increasing the pixel density of the display device 10. Furthermore, increasing the pixel density of the display device 10 increases the resolution of the image displayed by the display device 10. For example, the pixel density of the display device 10 can be 1000 ppi or more, 5000 ppi or more, or 7000 ppi or more. Therefore, the display device 10 can be used as a display device for AR or VR, for example, and can be suitably applied to electronic devices such as HMDs, in which the display unit is close to the user.

[0149] 15B illustrates a diagram in which the gate line GL1, the gate line GL2, the wiring ANO, the wiring VCOM, the wiring V0, and the source line SL are supplied via wiring from the driver circuit 40 below the pixel circuit 62; however, one embodiment of the present invention is not limited to this. For example, wiring for supplying signals and voltages from the driver circuit 40 may be routed to the periphery of the display unit 60 and electrically connected to each pixel circuit 62 arranged in a matrix on the layer 30. In this case, it is effective to provide the gate driver 41 of the driver circuit 40 on the layer 30. That is, it is effective to use OS transistors as the transistors of the gate driver 41. It is effective to provide part of the function of the source driver 42 of the driver circuit 40 on the layer 30. For example, it is effective to provide a demultiplexer on the layer 30 that distributes signals output by the source driver 42 to each source line. It is effective to use OS transistors as the transistors of the demultiplexer.

[0150] <Example of display correction system configuration> The display system according to an embodiment of the present invention may include a display correction system. The display correction system corrects the current I EL By correcting the above, it is possible to reduce display defects caused by defective pixels such as bright spots and dark spots.

[0151] The circuit diagram shown in FIG. 16A illustrates a portion of the pixel circuit 62 shown in FIG. 15A. In the case of a defective pixel that causes a bright spot or a dark spot, the current I EL becomes extremely large or small compared to pixels in a normal display.

[0152] The CPU51 monitors the current I that flows through the switch SW23. MONI The data of the monitor current I MONIThe amount of current is converted into digital data that can be handled by the CPU 51, and the CPU 51 performs calculations using the digital data. The calculations in the CPU 51 estimate defective pixels, and the CPU 51 performs corrections to make display defects caused by defective pixels less visible. For example, when pixel 61D shown in FIG. 16B is a defective pixel, the current I flowing through the light-emitting element 70 of the adjacent pixel 61N is EL Correct the following.

[0153] The correction can be estimated by performing operations based on artificial neural networks such as deep neural networks (DNNs), convolutional neural networks (CNNs), recurrent neural networks (RNNs), autoencoders, deep Boltzmann machines (DBMs), and deep belief networks (DBNs).

[0154] By the above-mentioned correction, the current I flowing through the pixel 61N adjacent to the defective pixel EL current I EL_C As shown in FIG. 16C, by displaying pixel 61G, which is a combination of the defective pixel and pixel 61N, display defects caused by the defective pixel, such as bright spots and dark spots, become less visible, and a normal display can be achieved.

[0155] In addition, when the display correction system performs calculations to correct the current flowing through pixels, the CPU 51 can continuously store data during calculation as backup data. This is particularly effective when performing computations that require a large amount of calculations, such as calculations based on artificial neural networks. By having the CPU 51 function as an application processor, it is possible to combine calculations with driving that varies the frame frequency, thereby reducing display defects and lowering power consumption.

[0156] <Modifications of the display device> FIG. 17 shows modified examples of the components of the display device 10 described above.

[0157] The block diagram of the display device 10A shown in FIG. 17 corresponds to a configuration in which an accelerator 52 is added to the functional circuit 50 in the display device 10 of FIG.

[0158] When the display correction system described above performs calculations based on an artificial neural network, it is configured to repeatedly perform product-sum calculations. The accelerator 52 functions as a dedicated calculation circuit for the product-sum calculation process of the artificial neural network NN. Calculations using the accelerator 52 can perform corrections due to the above-mentioned display defects or processes to correct the contours of images by up-converting the display data. Power gating control of the CPU 51 can be configured to reduce power consumption while the accelerator 52 is performing calculations.

[0159] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate.

[0160] (Embodiment 3) In this embodiment, a light-emitting element (light-emitting device) that can be used for a display device that is one embodiment of the present invention will be described.

[0161] <Configuration example of light-emitting element 70> 18A, the EL layer 786 of the light-emitting element 70 can be composed of multiple layers such as a layer 4420, a light-emitting layer 4411, and a layer 4430. The layer 4420 can have, for example, a layer containing a substance with high electron-injecting properties (electron-injecting layer) and a layer containing a substance with high electron-transporting properties (electron-transporting layer). The light-emitting layer 4411 contains, for example, a light-emitting compound. The layer 4430 can have, for example, a layer containing a substance with high hole-injecting properties (hole-injecting layer) and a layer containing a substance with high hole-transporting properties (hole-transporting layer).

[0162] A structure including the layer 4420, the light-emitting layer 4411, and the layer 4430 provided between a pair of electrodes can function as a single light-emitting unit, and the structure of FIG. 18A is referred to as a single structure in this specification.

[0163] Note that a configuration in which a plurality of light-emitting layers (light-emitting layers 4411, 4412, and 4413) are provided between layer 4420 and layer 4430 as shown in FIG. 18B is also a variation of the single structure.

[0164] 18C, a configuration in which a plurality of light-emitting units (EL layers 786a, 786b) are connected in series via an intermediate layer (charge generating layer) 4440 is referred to as a tandem structure in this specification. Note that, although the configuration shown in FIG. 18C is referred to as a tandem structure in this specification, the present invention is not limited to this, and for example, the tandem structure may also be referred to as a stack structure. Note that by using a tandem structure, a light-emitting element capable of emitting light with high brightness can be obtained.

[0165] The emitted light color of the light-emitting element 70 can be red, green, blue, cyan, magenta, yellow, white, or the like, depending on the material constituting the EL layer 786. Furthermore, the color purity can be further improved by providing the light-emitting element 70 with a microcavity structure.

[0166] A light-emitting element that emits white light preferably has a structure in which two or more types of light-emitting materials are contained in the light-emitting layer. To obtain white light emission, light-emitting materials can be selected so that the respective emissions of the two or more light-emitting materials have a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary colors, a light-emitting element that emits white light as a whole can be obtained. The same applies to a light-emitting element having three or more light-emitting layers.

[0167] The light-emitting layer preferably contains two or more light-emitting materials that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), etc. Alternatively, it is preferable that the light-emitting layer contains two or more light-emitting materials, and the light emitted by each of the light-emitting materials contains spectral components of two or more colors of R, G, and B.

[0168] <Method of forming the light emitting element 70> A method for forming the light emitting element 70 provided on the pixel circuit 62 will be described below.

[0169] FIG. 19A is a schematic top view of a display device according to one embodiment of the present invention. The display unit 60 includes a plurality of light-emitting elements 70R that emit red light, a plurality of light-emitting elements 70G that emit green light, and a plurality of light-emitting elements 70B that emit blue light. In FIG. 19A, the light-emitting regions of the light-emitting elements are labeled with R, G, and B to easily distinguish between the light-emitting elements. The structure of the light-emitting element 70 shown in FIG. 19A may be referred to as a side-by-side (SBS) structure. The structure shown in FIG. 19A illustrates a structure having three colors, red (R), green (G), and blue (B), but is not limited thereto. For example, a structure having four or more colors may also be used.

[0170] The light-emitting elements 70R, 70G, and 70B are arranged in a matrix. Fig. 19A shows a so-called stripe arrangement in which light-emitting elements of the same color are arranged in one direction. Note that the arrangement of the light-emitting elements is not limited to this, and arrangements such as a delta arrangement or a zigzag arrangement may also be used, or a pentile arrangement may also be used.

[0171] As the light-emitting elements 70R, 70G, and 70B, it is preferable to use organic EL devices such as OLEDs (Organic Light Emitting Diodes) or QLEDs (Quantum-dot Light Emitting Diodes). Examples of light-emitting materials that the light-emitting elements have include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), and materials that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF materials).

[0172] FIG. 19B is a schematic cross-sectional view corresponding to the dashed dotted line A1-A2 in FIG. 19A.

[0173] 19B shows cross sections of the light-emitting elements 70R, 70G, and 70B. The light-emitting elements 70R, 70G, and 70B are each provided on an insulating layer 251 and include a conductor 772 that functions as a pixel electrode and a conductor 788 that functions as a common electrode. The insulating layer 251 can be an inorganic insulating film or an organic insulating film, or both. It is preferable to use an inorganic insulating film as the insulating layer 251. Examples of inorganic insulating films include oxide insulating films and nitride insulating films such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film.

[0174] Light-emitting element 70R has an EL layer 786R between conductor 772 and conductor 788. EL layer 786R contains a light-emitting organic compound that emits light having a peak in at least the red wavelength range. EL layer 786G of light-emitting element 70G contains a light-emitting organic compound that emits light having a peak in at least the green wavelength range. EL layer 786B of light-emitting element 70B contains a light-emitting organic compound that emits light having a peak in at least the blue wavelength range.

[0175] The EL layer 786R, the EL layer 786G, and the EL layer 786B may each have one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer in addition to a layer containing a light-emitting organic compound (light-emitting layer).

[0176] The conductor 772 is provided for each light-emitting element. The conductor 788 is provided as a continuous layer common to the light-emitting elements. A conductive film that is transparent to visible light is used for either the conductor 772 or the conductor 788, and a conductive film that is reflective is used for the other. By making the conductor 772 transparent and the conductor 788 reflective, a bottom-emission display device can be obtained. Conversely, by making the conductor 772 reflective and the conductor 788 transparent, a top-emission display device can be obtained. Note that by making both the conductor 772 and the conductor 788 light-transmitting, a dual-emission display device can also be obtained.

[0177] An insulating layer 272 is provided to cover an end portion of the conductor 772. The end portion of the insulating layer 272 preferably has a tapered shape. The insulating layer 272 can be formed using a material similar to that of the insulating layer 251.

[0178] The EL layer 786R, the EL layer 786G, and the EL layer 786B each have a region in contact with the top surface of the conductor 772 and a region in contact with the surface of the insulating layer 272. In addition, the ends of the EL layer 786R, the EL layer 786G, and the EL layer 786B are located on the insulating layer 272.

[0179] As shown in Figure 19B, a gap is provided between two EL layers between light-emitting elements that emit different colors. In this way, it is preferable that the EL layer 786R, the EL layer 786G, and the EL layer 786G are provided so as not to be in contact with each other. This makes it possible to effectively prevent current from flowing through two adjacent EL layers, which would otherwise cause unintended light emission (also known as crosstalk). This allows for increased contrast and a display device with high display quality to be realized.

[0180] The EL layer 786R, the EL layer 786G, and the EL layer 786G can be separately formed by vacuum deposition using a shadow mask such as a metal mask. Alternatively, they may be separately formed by photolithography. By using photolithography, a high-definition display device can be realized, which is difficult to achieve when using a metal mask.

[0181] In addition, a protective layer 271 is provided over the conductor 788 to cover the light-emitting elements 70R, 70G, and 70B. The protective layer 271 has a function of preventing impurities such as water from diffusing from above into each light-emitting element.

[0182] The protective layer 271 may have, for example, a single-layer structure or a stacked structure including at least an inorganic insulating film. Examples of the inorganic insulating film include oxide films or nitride films such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film. Alternatively, a semiconductor material such as indium gallium oxide or indium gallium zinc oxide (IGZO) may be used for the protective layer 271. Note that the protective layer 271 may be formed by an ALD method, a CVD method, or a sputtering method. Note that, although the protective layer 271 includes an inorganic insulating film, this is not limiting. For example, the protective layer 271 may have a stacked structure of an inorganic insulating film and an organic insulating film.

[0183] When indium gallium zinc oxide is used for the protective layer 271, it can be processed using a wet etching method or a dry etching method. For example, when IGZO is used for the protective layer 271, a chemical solution such as oxalic acid, phosphoric acid, or a mixed chemical solution (for example, a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also called a mixed acid aluminum etching solution)) can be used. The mixed acid aluminum etching solution can have a volume ratio of phosphoric acid:acetic acid:nitric acid:water of approximately 53.3:6.7:3.3:36.7.

[0184] FIG. 19C shows a different example from the above.

[0185] 19C includes a light-emitting element 70W that emits white light. The light-emitting element 70W includes an EL layer 786W that emits white light between a conductor 772 and a conductor 788.

[0186] The EL layer 786W may be configured by stacking two or more light-emitting layers selected so that the emitted colors are complementary to each other. Alternatively, a stacked EL layer may be used in which a charge generating layer is sandwiched between light-emitting layers.

[0187] FIG. 19C shows three light-emitting elements 70W lined up. A colored layer 264R is provided on the top of the left light-emitting element 70W. The colored layer 264R functions as a bandpass filter that transmits red light. Similarly, a colored layer 264G that transmits green light is provided on the top of the center light-emitting element 70W, and a colored layer 264B that transmits blue light is provided on the top of the right light-emitting element 70W. This allows the display device to display color images.

[0188] Here, the EL layer 786W and the conductor 788 are separated between two adjacent light-emitting elements 70W. This effectively prevents current from flowing through the EL layer 786W between the two adjacent light-emitting elements 70W, which would otherwise cause unintended light emission. In particular, when a light-emitting element with a tandem structure in which a charge-generating layer is provided between two light-emitting layers is used as the EL layer 786W, the higher the resolution, i.e., the smaller the distance between adjacent pixels, the more pronounced the effect of crosstalk becomes, resulting in a decrease in contrast. Therefore, by using such a configuration, a display device that combines high resolution and high contrast can be realized.

[0189] The EL layer 786W and the conductor 788 are preferably separated by photolithography, which allows the distance between the light-emitting elements to be narrowed, thereby achieving a display device with a higher aperture ratio than when a shadow mask such as a metal mask is used.

[0190] In the case of a bottom-emission light-emitting element, a colored layer may be provided between the conductor 772 and the insulating layer 251.

[0191] FIG. 19D shows an example different from the above. Specifically, FIG. 19D shows a configuration in which the insulating layer 272 is not provided between the light-emitting element 70R, the light-emitting element 70G, and the light-emitting element 70B. This configuration allows a display device with a high aperture ratio. Furthermore, the protective layer 271 covers the side surfaces of the EL layer 786R, the EL layer 786G, and the EL layer 786B. This configuration can prevent impurities (typically, water) from entering through the side surfaces of the EL layer 786R, the EL layer 786G, and the EL layer 786B. Furthermore, in the configuration shown in FIG. 19D, the top surfaces of the conductor 772, the EL layer 786R, and the conductor 788 have approximately the same shape. This structure can be formed collectively using a resist mask or the like after the conductor 772, the EL layer 786R, and the conductor 788 are formed. This process can also be called self-aligned patterning because the EL layer 786R and the conductor 788 are processed using the conductor 788 as a mask. Although the EL layer 786R has been described here, the EL layer 786G and the EL layer 786B can also have a similar configuration.

[0192] 19D shows a structure in which a protective layer 273 is further provided on the protective layer 271. For example, the protective layer 271 is formed using an apparatus (typically, an ALD apparatus) capable of depositing a film with high coverage, and the protective layer 273 is formed using an apparatus (typically, a sputtering apparatus) capable of depositing a film with lower coverage than the protective layer 271, thereby providing a gap 275 between the protective layer 271 and the protective layer 273. In other words, the gap 275 is located between the EL layer 786R and the EL layer 786G, and between the EL layer 786G and the EL layer 786B.

[0193] The voids 275 contain, for example, one or more selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically, helium, neon, argon, xenon, krypton, etc.). The voids 275 may also contain, for example, a gas used when forming the protective layer 273. For example, when the protective layer 273 is formed by a sputtering method, the voids 275 may contain one or more of the above Group 18 elements. When the voids 275 contain a gas, the gas can be identified by gas chromatography or the like. When the protective layer 273 is formed by a sputtering method, the gas used during sputtering may also be contained in the protective layer 273. In this case, elements such as argon may be detected when the protective layer 273 is analyzed by energy dispersive X-ray analysis (EDX analysis) or the like.

[0194] Furthermore, when the refractive index of the void 275 is lower than that of the protective layer 271, light emitted from the EL layer 786R, the EL layer 786G, or the EL layer 786B is reflected at the interface between the protective layer 271 and the void 275. This prevents the light emitted from the EL layer 786R, the EL layer 786G, or the EL layer 786B from entering an adjacent pixel. This prevents light of different colors from mixing, thereby improving the image quality of the display device.

[0195] 19D , the area between light-emitting element 70R and light-emitting element 70G or the area between light-emitting element 70G and light-emitting element 70B (hereinafter simply referred to as the distance between the light-emitting elements) can be narrowed. Specifically, the distance between the light-emitting elements can be set to 1 μm or less, preferably 500 nm or less, and more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the distance between the side surface of EL layer 786R and the side surface of EL layer 786G or the distance between the side surface of EL layer 786G and the side surface of EL layer 786B has an area of ​​1 μm or less, preferably 0.5 μm (500 nm) or less, and more preferably 100 nm or less.

[0196] 19D can be referred to as an air isolation structure. The air isolation structure can isolate the light emitting elements while suppressing color mixing or crosstalk of the light from each light emitting element.

[0197] FIG. 20A shows a different example. Specifically, the configuration shown in FIG. 20A differs from the configuration shown in FIG. 19D in the configuration of the insulating layer 251. The insulating layer 251 has a recess formed by removing a portion of its upper surface during processing of the light-emitting elements 70R, 70G, and 70B. A protective layer 271 is formed in the recess. In other words, the insulating layer 251 has a region where the lower surface of the protective layer 271 is located lower than the lower surface of the conductor 772 in a cross-sectional view. By providing this region, impurities (typically, water, etc.) that may enter the light-emitting elements 70R, 70G, and 70B from below can be suitably suppressed. Note that the recess can be formed when impurities (also referred to as residue) that may adhere to the side surfaces of the light-emitting elements 70R, 70G, and 70B are removed by wet etching or the like during processing. After removing the residue, the side surfaces of the light-emitting elements are covered with the protective layer 271, resulting in a highly reliable display device.

[0198] FIG. 20B shows a different example. Specifically, the configuration shown in FIG. 20B includes an insulating layer 276 and a microlens array 277 in addition to the configuration shown in FIG. 20A. The insulating layer 276 functions as an adhesive layer. If the refractive index of the insulating layer 276 is lower than that of the microlens array 277, the microlens array 277 can condense light emitted from the light-emitting elements 70R, 70G, and 70B. This improves the light extraction efficiency of the display device. This is particularly advantageous because it allows a user to view a bright image when viewing the display surface of the display device from directly in front of the display surface. The insulating layer 276 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet-curable adhesive), a reactive-curable adhesive, a thermosetting adhesive, or an anaerobic adhesive. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, materials with low moisture permeability, such as epoxy resin, are preferred. Two-component resins may also be used. Adhesive sheets may also be used.

[0199] The above is the description of the light emitting element.

[0200] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0201] (Fourth embodiment) In this embodiment, a cross-sectional structure example of a display device 10 according to one embodiment of the present invention will be described.

[0202] 21 is a cross-sectional view showing an example of the configuration of the display device 10. The display device 10 has a substrate 701 and a substrate 705, and the substrates 701 and 705 are bonded together with a sealant 712.

[0203] A single crystal semiconductor substrate such as a single crystal silicon substrate can be used as the substrate 701. Note that the substrate 701 may be a semiconductor substrate other than a single crystal semiconductor substrate.

[0204] The transistor 441 and the transistor 601 are provided over a substrate 701. The transistor 441 and the transistor 601 can be the transistors provided in the layer 20 described in Embodiment 2.

[0205] The transistor 441 includes a conductor 443 functioning as a gate electrode, an insulator 445 functioning as a gate insulator, and a part of the substrate 701, and includes a semiconductor region 447 including a channel formation region, a low-resistance region 449a functioning as one of a source region and a drain region, and a low-resistance region 449b functioning as the other of the source region and the drain region. The transistor 441 may be either a p-channel type or an n-channel type.

[0206] The transistor 441 is electrically isolated from other transistors by an element isolation layer 403. Fig. 21 shows a case where the transistor 441 and the transistor 601 are electrically isolated by the element isolation layer 403. The element isolation layer 403 can be formed by a LOCOS (LOCal Oxidation of Silicon) method, an STI (Shallow Trench Isolation) method, or the like.

[0207] 21 has a convex semiconductor region 447. A conductor 443 is provided to cover the side surfaces and the top surface of the semiconductor region 447 with an insulator 445 interposed therebetween. Note that the conductor 443 covering the side surfaces of the semiconductor region 447 is not shown in FIG. A material that adjusts the work function can be used for the conductor 443.

[0208] A transistor having a convex semiconductor region, such as the transistor 441, can be called a fin transistor because it utilizes the convex portion of a semiconductor substrate. Note that an insulator that is in contact with the top of the convex portion and functions as a mask for forming the convex portion may be provided. Also, although FIG. 21 shows a configuration in which the convex portion is formed by processing a part of the substrate 701, a semiconductor having a convex portion may be formed by processing an SOI substrate.

[0209] 21 is just an example, and the transistor 441 is not limited to this configuration and may have an appropriate configuration depending on the circuit configuration, the operation method of the circuit, etc. For example, the transistor 441 may be a planar transistor.

[0210] The transistor 601 can have a structure similar to that of the transistor 441 .

[0211] In addition to the element isolation layer 403, the transistor 441, and the transistor 601, an insulator 405, an insulator 407, an insulator 409, and an insulator 411 are provided over the substrate 701. A conductor 451 is embedded in the insulator 405, the insulator 407, the insulator 409, and the insulator 411. Here, the height of the top surface of the conductor 451 and the height of the top surface of the insulator 411 can be made approximately the same.

[0212] An insulator 421 and an insulator 214 are provided on the conductor 451 and the insulator 411. A conductor 453 is embedded in the insulator 421 and the insulator 214. Here, the height of the top surface of the conductor 453 and the height of the top surface of the insulator 214 can be made approximately the same.

[0213] An insulator 216 is provided on the conductor 453 and the insulator 214. A conductor 455 is embedded in the insulator 216. Here, the height of the top surface of the conductor 455 and the height of the top surface of the insulator 216 can be made approximately the same.

[0214] Insulators 222, 224, 254, 280, 274, and 281 are provided on conductor 455 and insulator 216. Conductor 305 is embedded in insulator 222, insulator 224, insulator 254, insulator 280, insulator 274, and insulator 281. Here, the height of the top surface of conductor 305 and the height of the top surface of insulator 281 can be made approximately the same.

[0215] An insulator 361 is provided on the conductor 305 and on the insulator 281. The conductor 317 and the conductor 337 are embedded in the insulator 361. Here, the height of the upper surface of the conductor 337 and the height of the upper surface of the insulator 361 can be made approximately the same.

[0216] An insulator 363 is provided on the conductor 337 and on the insulator 361. The conductors 347, 353, 355, and 357 are embedded in the insulator 363. Here, the height of the top surfaces of the conductors 353, 355, and 357 can be made approximately the same as the height of the top surface of the insulator 363.

[0217] Connection electrodes 760 are provided on the conductors 353, 355, 357, and insulator 363. An anisotropic conductor 780 is provided so as to be electrically connected to the connection electrodes 760, and an FPC (Flexible Printed Circuit) 716 is provided so as to be electrically connected to the anisotropic conductor 780. Various signals and the like are supplied to the display device 10 from outside the display device 10 via the FPC 716.

[0218] 21 , the low-resistance region 449b, which functions as the other of the source region and the drain region of the transistor 441, is electrically connected to the FPC 716 through the conductor 451, the conductor 453, the conductor 455, the conductor 305, the conductor 317, the conductor 337, the conductor 347, the conductor 353, the conductor 355, the conductor 357, the connection electrode 760, and the anisotropic conductor 780. Here, although FIG. 21 shows three conductors, the conductor 353, the conductor 355, and the conductor 357, as conductors having a function of electrically connecting the connection electrode 760 and the conductor 347, one embodiment of the present invention is not limited thereto. The number of conductors having a function of electrically connecting the connection electrode 760 and the conductor 347 may be one, two, or four or more. By providing a plurality of conductors having a function of electrically connecting the connection electrode 760 and the conductor 347, contact resistance can be reduced.

[0219] A transistor 750 is provided over the insulator 214. The transistor 750 can be the transistor provided in the layer 30 described in Embodiment 2. For example, the transistor 750 can be a transistor provided in the pixel circuit 62. An OS transistor can be preferably used as the transistor 750. An OS transistor has an extremely low off-state current. Therefore, the retention time of image data and the like can be extended, thereby reducing the frequency of refresh operations. Therefore, the power consumption of the display device 10 can be reduced.

[0220] The transistor 750 can be provided in the backup circuit 82. An OS transistor can be preferably used as the transistor 750. An OS transistor has an extremely low off-state current. Therefore, data stored in the flip-flop can be retained even during a period when the shared power supply voltage is stopped. This allows the CPU to operate normally (intermittently stop the power supply voltage). This reduces the power consumption of the display device 10.

[0221] Conductor 301a and conductor 301b are embedded in insulator 254, insulator 280, insulator 274, and insulator 281. Conductor 301a is electrically connected to one of the source and drain of transistor 750, and conductor 301b is electrically connected to the other of the source and drain of transistor 750. Here, the height of the top surfaces of conductor 301a and conductor 301b and the height of the top surface of insulator 281 can be made approximately the same.

[0222] The conductor 311, the conductor 313, the conductor 331, the capacitor 790, the conductor 333, and the conductor 335 are embedded in the insulator 361. The conductor 311 and the conductor 313 are electrically connected to the transistor 750 and function as wirings. The conductor 333 and the conductor 335 are electrically connected to the capacitor 790. Here, the height of the top surfaces of the conductor 331, the conductor 333, and the conductor 335 can be made approximately the same as the height of the top surface of the insulator 361.

[0223] Conductor 341, conductor 343, and conductor 351 are embedded in insulator 363. Here, the height of the top surface of conductor 351 and the height of the top surface of insulator 363 can be made approximately the same.

[0224] The insulators 405, 407, 409, 411, 421, 214, 280, 274, 281, 361, and 363 function as interlayer films and may also function as planarizing films that cover uneven shapes below them. For example, the top surface of the insulator 363 may be planarized by planarization treatment using chemical mechanical polishing (CMP) or the like to improve flatness.

[0225] 21, the capacitor 790 has a lower electrode 321 and an upper electrode 325. An insulator 323 is provided between the lower electrode 321 and the upper electrode 325. That is, the capacitor 790 has a layered structure in which the insulator 323, which functions as a dielectric, is sandwiched between a pair of electrodes. Note that while FIG. 21 shows an example in which the capacitor 790 is provided on the insulator 281, the capacitor 790 may be provided on an insulator different from the insulator 281.

[0226] FIG. 21 shows an example in which conductors 301a, 301b, and 305 are formed in the same layer. It also shows an example in which conductors 311, 313, 317, and the lower electrode 321 are formed in the same layer. It also shows an example in which conductors 331, 333, 335, and 337 are formed in the same layer. It also shows an example in which conductors 341, 343, and 347 are formed in the same layer. It also shows an example in which conductors 351, 353, 355, and 357 are formed in the same layer. Forming multiple conductors in the same layer can simplify the manufacturing process of the display device 10, thereby reducing the manufacturing cost of the display device 10. These conductors may be formed in different layers and may be made of different types of materials.

[0227] 21 includes a light-emitting element 70. The light-emitting element 70 includes a conductor 772, an EL layer 786, and a conductor 788. The EL layer 786 includes an organic compound or an inorganic compound such as quantum dots.

[0228] Examples of materials that can be used for the organic compounds include fluorescent materials and phosphorescent materials, while examples of materials that can be used for the quantum dots include colloidal quantum dot materials, alloy quantum dot materials, core-shell quantum dot materials, and core quantum dot materials.

[0229] The conductor 772 is electrically connected to the other of the source and the drain of the transistor 750 through the conductors 351, 341, 331, 313, and 301b. The conductor 772 is formed over the insulator 363 and functions as a pixel electrode.

[0230] A material that is transparent to or reflective to visible light can be used for the conductor 772. For example, an oxide material containing indium, zinc, tin, or the like can be used as the light-transmitting material. For example, a material containing aluminum, silver, or the like can be used as the reflective material.

[0231] Although not shown in FIG. 21, the display device 10 can be provided with optical members (optical substrates) such as a polarizing member, a phase difference member, an anti-reflection member, and the like.

[0232] A light-shielding layer 738 and an insulator 734 in contact with the light-shielding layer 738 are provided on the substrate 705 side. The light-shielding layer 738 has a function of blocking light emitted from an adjacent region. Alternatively, the light-shielding layer 738 has a function of blocking external light from reaching the transistor 750 and the like.

[0233] 21, an insulator 730 is provided over an insulator 363. The insulator 730 can be configured to cover part of a conductor 772. The light-emitting element 70 includes a light-transmitting conductor 788 and can be a top-emission light-emitting element. The light-emitting element 70 may have a bottom-emission structure in which light is emitted to the conductor 772 side, or a dual-emission structure in which light is emitted to both the conductor 772 and the conductor 788.

[0234] The light-shielding layer 738 is provided to have a region overlapping with the insulator 730. The light-shielding layer 738 is covered with the insulator 734. The space between the light-emitting element 70 and the insulator 734 is filled with the sealing layer 732.

[0235] Furthermore, structure 778 is disposed between insulator 730 and EL layer 786. Structure 778 is also disposed between insulator 730 and insulator 734.

[0236] 22 is a cross-sectional view including Si transistors of the drive circuit 40 included in the layer 20, OS transistors of the pixel circuit 62 included in the layer 30, Si transistors of the function circuit 50 included in the layer 20, and OS transistors of the backup circuit 82 included in the layer 30. The description of the cross-sectional view shown in FIG. 22 is the same as that of each configuration of the cross-sectional view shown in FIG.

[0237] 22, a Si transistor 91 of the drive circuit 40 and a Si transistor 94 of the function circuit 50 can be provided on the layer 20. Also, as shown in FIG. 22, an OS transistor 92 and a capacitor 93 of the pixel circuit 62 and an OS transistor 95 and a capacitor 96 of the backup circuit 82 can be provided on the layer 30. Furthermore, a light-emitting element 70 can be provided on the upper layer of the layer 30.

[0238] FIG. 23 shows a modification of the display device shown in FIG. 21. The display device 10 shown in FIG. 23 differs from the display device 10 shown in FIG. 21 in that it does not include a transistor 601. As shown in FIG. 23, the display device does not necessarily include a Si transistor and may be formed only with OS transistors. It is preferable to use an OS transistor in a pixel circuit. At least a part of a driver circuit may be formed with OS transistors. At least a part of a functional circuit may be formed with OS transistors. At least a part of a driver circuit may be external. At least a part of a functional circuit may be external. Note that FIG. 23 shows an example in which a transistor 750 is provided over a substrate 701. As described above, the substrate 701 may be a single-crystal semiconductor substrate such as a single-crystal silicon substrate or another semiconductor substrate. As the substrate 701, various insulating substrates such as a glass substrate or a sapphire substrate may be used.

[0239] FIG. 24 shows a modified example of the display device 10 shown in FIG. 21. The display device 10 shown in FIG. 24 differs from the display device 10 shown in FIG. 21 in that a colored layer 736 is provided. The colored layer 736 is provided so as to have an area overlapping with the light-emitting element 70. By providing the colored layer 736, the color purity of the light extracted from the light-emitting element 70 can be improved. This allows the display device 10 to display a high-quality image. Furthermore, since all of the light-emitting elements 70 of the display device 10 can be light-emitting elements that emit white light, it is not necessary to form the EL layer 786 by different colors, and the display device 10 can have high definition.

[0240] The light emitting element 70 can have a micro-optical resonator (microcavity) structure. This allows light of a predetermined color (e.g., RGB) to be extracted without providing a colored layer, and the display device 10 can perform color display. By configuring the display device 10 without providing a colored layer, it is possible to suppress light absorption by the colored layer. This allows the display device 10 to display high-brightness images and reduce the power consumption of the display device 10. Note that even when the EL layer 786 is formed in an island shape for each pixel or in a striped shape for each pixel column, that is, formed by coloring, it is possible to configure the display device 10 without providing a colored layer. Note that the luminance of the display device 10 can be, for example, 500 cd / m 2 or more, preferably 1000 cd / m 2 More than 10000cd / m 2 or less, more preferably 2000 cd / m 2 More than 5000cd / m 2 It can be as follows:

[0241] 21 and 24 show a structure in which the transistors 441 and 601 are provided so that channel formation regions are formed inside the substrate 701 and the OS transistors are stacked over the transistors 441 and 601; however, one embodiment of the present invention is not limited to this. A modification of FIG. 24 is shown in FIG. 25. The display device 10 shown in FIG. 25 differs from the display device 10 shown in FIG. 24 mainly in that OS transistors 602 and 603 are provided instead of the transistors 441 and 601. Furthermore, an OS transistor can be used as the transistor 750. That is, the display device 10 shown in FIG. 25 has a stack of OS transistors.

[0242] An insulator 613 and an insulator 614 are provided over a substrate 701, and a transistor 602 and a transistor 603 are provided over the insulator 614. Note that a transistor or the like may be provided between the substrate 701 and the insulator 613. For example, a transistor having a structure similar to that of the transistor 441 and the transistor 601 shown in FIG. 24 may be provided between the substrate 701 and the insulator 613.

[0243] The transistor 602 and the transistor 603 can be the transistors provided in the layer 20 described in Embodiment 2.

[0244] The transistors 602 and 603 can have a structure similar to that of the transistor 750. Note that the transistors 602 and 603 may be OS transistors with a structure different from that of the transistor 750.

[0245] In addition to the transistor 602 and the transistor 603, insulators 616, 622, 624, 654, 680, 674, and 681 are provided over the insulator 614. The conductor 461 is embedded in the insulator 654, the insulator 680, the insulator 674, and the insulator 681. Here, the height of the top surface of the conductor 461 can be made approximately the same as the height of the top surface of the insulator 681.

[0246] An insulator 501 is provided on the conductor 461 and the insulator 681. The conductor 463 is embedded in the insulator 501. Here, the height of the top surface of the conductor 463 and the height of the top surface of the insulator 501 can be made approximately the same.

[0247] An insulator 421 and an insulator 214 are provided on the conductor 463 and the insulator 501. A conductor 453 is embedded in the insulator 421 and the insulator 214. Here, the height of the top surface of the conductor 453 and the height of the top surface of the insulator 214 can be made approximately the same.

[0248] As shown in Figure 25, one of the source and drain of transistor 602 is electrically connected to FPC 716 via conductor 461, conductor 463, conductor 453, conductor 455, conductor 305, conductor 317, conductor 337, conductor 347, conductor 353, conductor 355, conductor 357, connection electrode 760, and anisotropic conductor 780.

[0249] The insulators 613, 614, 680, 674, 681, and 501 function as interlayer films and may also function as planarizing films that cover the uneven shapes below them.

[0250] 25 , the display device 10 can have a narrower frame and be smaller, and all of the transistors included in the display device 10 can be OS transistors. This allows, for example, the transistors provided in the layer 20 and the transistors provided in the layer 30 described in Embodiment 2 to be manufactured using the same device. This reduces the manufacturing cost of the display device 10, and the display device 10 can be manufactured at a low price.

[0251] 26 is a cross-sectional view illustrating a configuration example of the display device 10. The display device 10 differs from the display device 10 illustrated in FIG. 24 mainly in that a layer including a transistor 800 is provided between a layer including a transistor 750 and a layer including a transistor 601 and a transistor 441.

[0252] 26, the layer 20 described in Embodiment 2 can include a layer including the transistor 601 and the transistor 441 and a layer including the transistor 800. The transistor 750 can be the transistor provided in the layer 30 described in Embodiment 2.

[0253] An insulator 821 and an insulator 814 are provided on the conductor 451 and the insulator 411. A conductor 853 is embedded in the insulator 821 and the insulator 814. Here, the height of the top surface of the conductor 853 and the height of the top surface of the insulator 814 can be made approximately the same.

[0254] An insulator 816 is provided on the conductor 853 and the insulator 814. A conductor 855 is embedded in the insulator 816. Here, the height of the top surface of the conductor 855 and the height of the top surface of the insulator 816 can be made approximately the same.

[0255] Insulators 822, 824, 854, 880, 874, and 881 are provided on the conductor 855 and the insulator 816. The conductor 805 is embedded in the insulators 822, 824, 854, 880, 874, and 881. Here, the height of the top surface of the conductor 805 and the height of the top surface of the insulator 881 can be made approximately the same.

[0256] An insulator 421 and an insulator 214 are provided over the conductor 817 and the insulator 881 .

[0257] As shown in Figure 26, the low resistance region 449b, which functions as the other of the source region or drain region of transistor 441, is electrically connected to FPC 716 via conductor 451, conductor 853, conductor 855, conductor 805, conductor 817, conductor 453, conductor 455, conductor 305, conductor 317, conductor 337, conductor 347, conductor 353, conductor 355, conductor 357, connection electrode 760, and anisotropic conductor 780.

[0258] A transistor 800 is provided over the insulator 814. The transistor 800 can be the transistor provided in the layer 20 described in Embodiment 2. The transistor 800 is preferably an OS transistor. For example, the transistor 800 can be a transistor provided in the backup circuit 82.

[0259] Conductor 801a and conductor 801b are embedded in insulator 854, insulator 880, insulator 874, and insulator 881. Conductor 801a is electrically connected to one of the source and drain of transistor 800, and conductor 801b is electrically connected to the other of the source and drain of transistor 800. Here, the height of the top surfaces of conductor 801a and conductor 801b and the height of the top surface of insulator 881 can be made approximately the same.

[0260] The transistor 750 can be the transistor provided in the layer 30 described in Embodiment 2. For example, the transistor 750 can be a transistor provided in the pixel circuit 62. The transistor 750 is preferably an OS transistor.

[0261] Insulator 405, insulator 407, insulator 409, insulator 411, insulator 821, insulator 814, insulator 880, insulator 874, insulator 881, insulator 421, insulator 214, insulator 280, insulator 274, insulator 281, insulator 361, and insulator 363 function as interlayer films and may also function as planarizing films that cover the uneven shapes below each other.

[0262] 26 shows an example in which a conductor 801a, a conductor 801b, and a conductor 805 are formed in the same layer. Also shown is an example in which a conductor 811, a conductor 813, and a conductor 817 are formed in the same layer.

[0263] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0264] (Embodiment 5) In this embodiment, a transistor that can be used in a display device that is one embodiment of the present invention will be described.

[0265] <Transistor configuration example> 27A, 27B, and 27C are a top view and a cross-sectional view of a transistor 200A that can be used in a display device of one embodiment of the present invention and the periphery of the transistor 200A. The transistor 200A can be used in the display device of one embodiment of the present invention.

[0266] FIG. 27A is a top view of the transistor 200A. Also, FIGS. 27B and 27C are cross-sectional views of the transistor 200A. Here, FIG. 27B is a cross-sectional view of the portion indicated by the dashed-dotted line A1-A2 in FIG. 27A, and is also a cross-sectional view of the transistor 200A in the channel length direction. Also, FIG. 27C is a cross-sectional view of the portion indicated by the dashed-dotted line A3-A4 in FIG. 27A, and is also a cross-sectional view of the transistor 200A in the channel width direction. Note that in the top view of FIG. 27A, some elements are omitted for clarity.

[0267] As shown in FIG. 27B and other figures, the transistor 200A has a metal oxide 230a arranged on a substrate (not shown), a metal oxide 230b arranged on the metal oxide 230a, a conductor 242a and a conductor 242b arranged spaced apart from each other on the metal oxide 230b, an insulator 280 arranged on the conductors 242a and 242b and having an opening formed between the conductors 242a and 242b, a conductor 260 arranged in the opening, an insulator 250 arranged among the metal oxide 230b, the conductors 242a, 242b, and the insulator 280, and the conductor 260, and a metal oxide 230c arranged among the metal oxide 230b, the conductors 242a, 242b, the insulator 280, and the insulator 250. 27B and 27C, it is preferable that the top surface of the conductor 260 substantially coincides with the top surfaces of the insulators 250, 254, metal oxide 230c, and 280. Note that, hereinafter, the metal oxides 230a, 230b, and 230c may be collectively referred to as metal oxides 230. Furthermore, the conductors 242a and 242b may be collectively referred to as conductors 242.

[0268] In the transistor 200A shown in Figure 27B and other figures, the side surfaces of the conductor 242a and the conductor 242b facing the conductor 260 have a substantially vertical shape. Note that the transistor 200A shown in Figure 27B and other figures is not limited to this, and the angle formed between the side surface and the bottom surface of the conductor 242a and the conductor 242b may be 10° or more and 80° or less, preferably 30° or more and 60° or less. Furthermore, the opposing side surfaces of the conductor 242a and the conductor 242b may have multiple surfaces.

[0269] 27B and other figures, it is preferable that insulator 254 be disposed between insulator 224, metal oxide 230a, metal oxide 230b, conductor 242a, conductor 242b, and metal oxide 230c and insulator 280. Here, it is preferable that insulator 254 be in contact with the side surface of metal oxide 230c, the top and side surfaces of conductor 242a, the top and side surfaces of conductor 242b, the side surfaces of metal oxide 230a and metal oxide 230b, and the top surface of insulator 224, as shown in FIGS.

[0270] Although the transistor 200A has a three-layer structure of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c in and around a region where a channel is formed (hereinafter also referred to as a channel formation region), the present invention is not limited to this. For example, a two-layer structure of the metal oxide 230b and the metal oxide 230c or a stacked structure of four or more layers may be provided. Furthermore, the transistor 200A has a two-layer structure of the conductor 260, but the present invention is not limited to this. For example, the conductor 260 may have a single-layer structure or a stacked structure of three or more layers. Furthermore, each of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c may have a stacked structure of two or more layers.

[0271] For example, when metal oxide 230c has a layered structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has a composition similar to that of metal oxide 230b, and the second metal oxide has a composition similar to that of metal oxide 230a.

[0272] Here, the conductor 260 functions as the gate electrode of the transistor, and the conductors 242a and 242b function as the source and drain electrodes, respectively. As described above, the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and in the region sandwiched between the conductors 242a and 242b. Here, the arrangement of the conductors 260, 242a, and 242b is selected in a self-aligned manner with respect to the opening of the insulator 280. That is, in the transistor 200A, the gate electrode can be positioned between the source and drain electrodes in a self-aligned manner. Therefore, the conductor 260 can be formed without providing an alignment margin, thereby reducing the area occupied by the transistor 200A. This allows for a high-resolution display device. Furthermore, the display device can have a narrow frame.

[0273] As shown in FIG. 27B etc., it is preferable that the conductor 260 has a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a.

[0274] The transistor 200A preferably includes an insulator 214 disposed on a substrate (not shown), an insulator 216 disposed on the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed on the insulator 216 and the conductor 205, and an insulator 224 disposed on the insulator 222. A metal oxide 230a is preferably disposed on the insulator 224.

[0275] An insulator 274 functioning as an interlayer film and an insulator 281 are preferably disposed over the transistor 200A. Here, the insulator 274 is preferably disposed in contact with the top surfaces of the conductor 260, the insulator 250, the insulator 254, the metal oxide 230c, and the insulator 280.

[0276] It is preferable that the insulators 222, 254, and 274 have a function of suppressing the diffusion of at least one of hydrogen (e.g., hydrogen atoms, hydrogen molecules, etc.). For example, it is preferable that the insulators 222, 254, and 274 have lower hydrogen permeability than the insulators 224, 250, and 280. It is also preferable that the insulators 222 and 254 have a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). For example, it is preferable that the insulators 222 and 254 have lower oxygen permeability than the insulators 224, 250, and 280.

[0277] Here, the insulator 224, the metal oxide 230, and the insulator 250 are separated by the insulators 280 and 281, and the insulators 254 and 274. Therefore, impurities such as hydrogen contained in the insulators 280 and 281, and excess oxygen can be prevented from being mixed into the insulators 224, the metal oxide 230a, the metal oxide 230b, and the insulator 250.

[0278] It is preferable that a conductor 240 (conductor 240a and conductor 240b) electrically connected to the transistor 200A and functioning as a plug is provided. Note that an insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface of the conductor 240 functioning as a plug. That is, the insulator 241 is provided in contact with the inner wall of the opening of the insulators 254, 280, 274, and 281. Alternatively, a first conductor of the conductor 240 may be provided in contact with the side surface of the insulator 241, and a second conductor of the conductor 240 may be provided further inward. Here, the height of the top surface of the conductor 240 and the height of the insulator 281 can be made approximately the same. Note that, in the transistor 200A, a configuration in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are stacked is shown, but the present invention is not limited to this. For example, the conductor 240 may be configured to have a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, the layers may be distinguished by assigning ordinal numbers to indicate the order of formation.

[0279] In the transistor 200A, a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) is preferably used for the metal oxide 230 (metal oxide 230a, metal oxide 230b, and metal oxide 230c) including the channel formation region. For example, a metal oxide having a band gap of 2 eV or more, preferably 2.5 eV or more, is preferably used for the channel formation region of the metal oxide 230.

[0280] The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it is preferable that it contains indium (In) and zinc (Zn). Furthermore, it is preferable that it contains an element M in addition to these. The element M can be one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), or cobalt (Co). In particular, it is preferable that the element M is one or more of aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn). Furthermore, it is more preferable that the element M contains either or both of Ga and Sn.

[0281] 27B, the film thickness of the metal oxide 230b in the region that does not overlap with the conductor 242 may be thinner than the film thickness of the region that overlaps with the conductor 242. This is formed by removing a portion of the upper surface of the metal oxide 230b when forming the conductors 242a and 242b. When a conductive film that will become the conductor 242 is formed on the upper surface of the metal oxide 230b, a low-resistance region may be formed near the interface with the conductive film. In this way, by removing the low-resistance region located between the conductors 242a and 242b on the upper surface of the metal oxide 230b, it is possible to prevent a channel from being formed in that region.

[0282] According to one embodiment of the present invention, a display device having high definition and a small transistor can be provided. Alternatively, a display device having high luminance and a transistor with high on-state current can be provided. Alternatively, a display device having high-speed operation and a transistor with stable electrical characteristics can be provided. Alternatively, a display device having low power consumption and a transistor with low off-state current can be provided.

[0283] The detailed structure of the transistor 200A that can be used in the display device of one embodiment of the present invention will be described.

[0284] The conductor 205 is disposed so as to have an overlapping region with the metal oxide 230 and the conductor 260. The conductor 205 is preferably embedded in the insulator 216.

[0285] The conductor 205 includes conductor 205a, conductor 205b, and conductor 205c. The conductor 205a is provided in contact with the bottom surface and sidewall of an opening provided in the insulator 216. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the upper surface of the conductor 205b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. The conductor 205c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is approximately the same as the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216. In other words, the conductor 205b is configured to be enclosed by the conductors 205a and 205c.

[0286] The conductors 205a and 205c are preferably made of a conductive material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0287] By using a conductive material that can reduce hydrogen diffusion for the conductor 205a and the conductor 205c, it is possible to prevent impurities such as hydrogen contained in the conductor 205b from diffusing into the metal oxide 230 via the insulator 224 or the like. Furthermore, by using a conductive material that can reduce oxygen diffusion for the conductor 205a and the conductor 205c, it is possible to prevent the conductor 205b from being oxidized and its conductivity from decreasing. Examples of conductive materials that can reduce oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Therefore, the conductor 205a may be a single layer or a multilayer of the above conductive materials. For example, the conductor 205a may be made of titanium nitride.

[0288] The conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component, for example, tungsten.

[0289] Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. The conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In this case, the potential applied to the conductor 205 may be changed independently of the potential applied to the conductor 260, thereby controlling the V th In particular, applying a negative potential to conductor 205 can control the V th It is possible to make the off-state current smaller by making the potential greater than 0 V. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied.

[0290] The conductor 205 is preferably provided to be larger than the channel formation region of the metal oxide 230. In particular, as shown in Fig. 27C, the conductor 205 preferably extends also in a region outside the end portion intersecting with the channel width direction of the metal oxide 230. In other words, the conductor 205 and the conductor 260 preferably overlap with each other with an insulator interposed therebetween on the outside of the side surface of the metal oxide 230 in the channel width direction.

[0291] With the above structure, the channel formation region of the metal oxide 230 can be electrically surrounded by the electric field of the conductor 260 that functions as a first gate electrode and the electric field of the conductor 205 that functions as a second gate electrode.

[0292] 27C, the conductor 205 is extended to function as wiring. However, the present invention is not limited to this, and a conductor that functions as wiring may be provided below the conductor 205.

[0293] The insulator 214 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200A from the substrate side. Therefore, the insulator 214 is preferably made of an insulating material that has the function of preventing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), and copper atoms (i.e., the impurities are less likely to permeate through the insulator). Alternatively, the insulator 214 is preferably made of an insulating material that has the function of preventing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate through the insulator).

[0294] For example, it is preferable to use aluminum oxide, silicon nitride, or the like as the insulator 214. This can prevent impurities such as water or hydrogen from diffusing from the substrate side of the insulator 214 to the transistor 200A side. Alternatively, it can prevent oxygen contained in the insulator 224, etc. from diffusing toward the substrate side of the insulator 214.

[0295] The insulators 216, 280, and 281, which function as interlayer films, preferably have a lower dielectric constant than the insulator 214. Using a material with a low dielectric constant as the interlayer film can reduce parasitic capacitance between wirings. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like can be used as appropriate for the insulators 216, 280, and 281.

[0296] The insulators 222 and 224 function as gate insulators.

[0297] Here, the insulator 224 in contact with the metal oxide 230 preferably releases oxygen upon heating. In this specification, oxygen released upon heating is sometimes referred to as excess oxygen. For example, the insulator 224 may be made of silicon oxide, silicon oxynitride, or the like, as appropriate. By providing an insulator containing oxygen in contact with the metal oxide 230, oxygen vacancies in the metal oxide 230 can be reduced, and the reliability of the transistor 200A can be improved.

[0298] Specifically, it is preferable to use an oxide material from which a portion of oxygen is released by heating as the insulator 224. The oxide material from which oxygen is released by heating is an oxide material from which the amount of released oxygen converted into oxygen atoms is 1.0×10 in TDS (Thermal Desorption Spectroscopy) analysis. 18 atoms / cm 3 or more, preferably 1.0 × 10 19 atoms / cm 3 More preferably, 2.0 × 10 19 atoms / cm 3 or more, or 3.0 x 10 20 atoms / cm 3 The oxide film is one having the above properties. The surface temperature of the film during the TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0299] 27C, the thickness of the region of insulator 224 that does not overlap with insulator 254 and metal oxide 230b may be thinner than the thickness of the other region. It is preferable that the thickness of the region of insulator 224 that does not overlap with insulator 254 and metal oxide 230b is a thickness that allows sufficient diffusion of the oxygen.

[0300] Similar to the insulator 214, etc., the insulator 222 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200A from the substrate side. For example, the insulator 222 preferably has lower hydrogen permeability than the insulator 224. By surrounding the insulator 224, the metal oxide 230, the insulator 250, etc. with the insulators 222, 254, and 274, it is possible to prevent impurities such as water or hydrogen from entering the transistor 200A from the outside.

[0301] Furthermore, the insulator 222 preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate). For example, the insulator 222 preferably has lower oxygen permeability than the insulator 224. The insulator 222 preferably has a function of suppressing the diffusion of oxygen and impurities, which can reduce the diffusion of oxygen contained in the metal oxide 230 toward the substrate side. Furthermore, the conductor 205 can be prevented from reacting with oxygen contained in the insulator 224 or the metal oxide 230.

[0302] The insulator 222 may be an insulator containing an oxide of one or both of insulating materials, aluminum and hafnium. Aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) is preferably used as the insulator containing an oxide of one or both of aluminum and hafnium. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses oxygen release from the metal oxide 230 and the intrusion of impurities such as hydrogen into the metal oxide 230 from the periphery of the transistor 200A.

[0303] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulators.

[0304] The insulator 222 may be a single layer or a multilayer of an insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more highly integrated, thinning of the gate insulator can cause problems such as leakage current. Using a high-k material for the insulator that functions as the gate insulator makes it possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0305] The insulator 222 and the insulator 224 may have a stacked structure of two or more layers. In this case, the stacked structure is not limited to the stacked structure made of the same material, and may be a stacked structure made of different materials. For example, an insulator similar to the insulator 224 may be provided below the insulator 222.

[0306] The metal oxide 230 includes a metal oxide 230a, a metal oxide 230b on the metal oxide 230a, and a metal oxide 230c on the metal oxide 230b. By providing the metal oxide 230a below the metal oxide 230b, it is possible to suppress the diffusion of impurities from structures formed below the metal oxide 230a to the metal oxide 230b. Furthermore, by providing the metal oxide 230c on the metal oxide 230b, it is possible to suppress the diffusion of impurities from structures formed above the metal oxide 230c to the metal oxide 230b.

[0307] The metal oxide 230 preferably has a stacked structure of multiple oxide layers with different atomic ratios of each metal atom. For example, when the metal oxide 230 contains at least indium (In) and the element M, the ratio of the number of atoms of the element M contained in the metal oxide 230a to the number of atoms of all elements constituting the metal oxide 230a is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 230b to the number of atoms of all elements constituting the metal oxide 230b. The atomic ratio of the element M contained in the metal oxide 230a to In is also preferably higher than the atomic ratio of the element M contained in the metal oxide 230b to In. Here, the metal oxide 230c can be any metal oxide that can be used for the metal oxide 230a or the metal oxide 230b.

[0308] The energy of the conduction band minimum of the metal oxide 230a and the metal oxide 230c is preferably higher than the energy of the conduction band minimum of the metal oxide 230b. In other words, the electron affinity of the metal oxide 230a and the metal oxide 230c is preferably lower than the electron affinity of the metal oxide 230b. In this case, the metal oxide 230c is preferably a metal oxide that can be used for the metal oxide 230a. Specifically, the ratio of the number of atoms of the element M contained in the metal oxide 230c to the number of atoms of all elements constituting the metal oxide 230c is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 230b to the number of atoms of all elements constituting the metal oxide 230b. Furthermore, the atomic ratio of the element M contained in the metal oxide 230c to In is preferably higher than the atomic ratio of the element M contained in the metal oxide 230b to In.

[0309] Here, the energy level of the conduction band minimum changes smoothly at the junction between the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c. In other words, the energy level of the conduction band minimum at the junction between the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c changes continuously or can be said to be a continuous junction. To achieve this, it is advisable to reduce the defect level density of the mixed layer formed at the interface between the metal oxide 230a and the metal oxide 230b and the interface between the metal oxide 230b and the metal oxide 230c.

[0310] Specifically, the metal oxide 230a and the metal oxide 230b, and the metal oxide 230b and the metal oxide 230c, can form a mixed layer with a low defect level density by having a common element other than oxygen (as a main component). For example, when the metal oxide 230b is an In-Ga-Zn oxide, the metal oxide 230a and the metal oxide 230c may be made of an In-Ga-Zn oxide, a Ga-Zn oxide, gallium oxide, or the like. The metal oxide 230c may also have a stacked structure. For example, a stacked structure of an In-Ga-Zn oxide and a Ga-Zn oxide on the In-Ga-Zn oxide, or a stacked structure of an In-Ga-Zn oxide and a gallium oxide on the In-Ga-Zn oxide, can be used. In other words, the metal oxide 230c may have a stacked structure of an In-Ga-Zn oxide and an oxide that does not contain In.

[0311] Specifically, metal oxide 230a may be a metal oxide having an atomic ratio of In:Ga:Zn=1:3:4 or 1:1:0.5. Metal oxide 230b may be a metal oxide having an atomic ratio of In:Ga:Zn=4:2:3 or 3:1:2. Metal oxide 230c may be a metal oxide having an atomic ratio of In:Ga:Zn=1:3:4, In:Ga:Zn=4:2:3, Ga:Zn=2:1, or Ga:Zn=2:5. Specific examples of the metal oxide 230c having a layered structure include a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], and a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and gallium oxide.

[0312] In this case, the main carrier path is the metal oxide 230b. By configuring the metal oxide 230a and the metal oxide 230c as described above, the defect state density at the interface between the metal oxide 230a and the metal oxide 230b and at the interface between the metal oxide 230b and the metal oxide 230c can be reduced. This reduces the effect of interface scattering on carrier conduction, allowing the transistor 200A to achieve a high on-state current and high frequency characteristics. Note that, when the metal oxide 230c has a stacked structure, in addition to the effect of reducing the defect state density at the interface between the metal oxide 230b and the metal oxide 230c, it is expected that the diffusion of constituent elements of the metal oxide 230c toward the insulator 250 can be suppressed. More specifically, by configuring the metal oxide 230c as a stacked structure and positioning an oxide that does not contain In above the stacked structure, it is possible to suppress In diffusion toward the insulator 250. Because the insulator 250 functions as a gate insulator, the diffusion of In can cause poor transistor characteristics. Therefore, by forming the metal oxide 230c into a laminated structure, it is possible to provide a highly reliable display device.

[0313] Conductors 242 (conductors 242a and 242b) functioning as a source electrode and a drain electrode are provided on the metal oxide 230b. Conductor 242 is preferably made of a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, or lanthanum, or an alloy containing any of the above metal elements or an alloy combining any of the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel is preferably used. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or materials that maintain their conductivity even when they absorb oxygen.

[0314] By providing the conductor 242 so as to be in contact with the metal oxide 230, the oxygen concentration may decrease in the vicinity of the conductor 242 of the metal oxide 230. Furthermore, a metal compound layer containing the metal contained in the conductor 242 and components of the metal oxide 230 may be formed in the vicinity of the conductor 242 of the metal oxide 230. In such a case, the carrier concentration increases in the region of the metal oxide 230 in the vicinity of the conductor 242, and this region becomes a low-resistance region.

[0315] Here, the region between the conductor 242a and the conductor 242b is formed to overlap the opening of the insulator 280. This allows the conductor 260 to be arranged in a self-aligned manner between the conductor 242a and the conductor 242b.

[0316] The insulator 250 functions as a gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the metal oxide 230c. The insulator 250 can be made of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, or silicon oxide having vacancies. Silicon oxide and silicon oxynitride are particularly preferred because they are stable against heat.

[0317] The insulator 250 preferably has a reduced concentration of impurities such as water or hydrogen, similar to the insulator 224. The thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0318] A metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. This makes it possible to suppress oxidation of the conductor 260 due to oxygen in the insulator 250.

[0319] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, it is preferable to use a metal oxide that is a high-k material with a high dielectric constant. By forming the gate insulator into a stacked structure of the insulator 250 and the metal oxide, it is possible to achieve a stacked structure that is thermally stable and has a high dielectric constant. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator.

[0320] Specifically, it is possible to use a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. In particular, it is preferable to use an insulator containing an oxide of either or both of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0321] Although the conductor 260 is shown as having a two-layer structure in FIG. 27B etc., it may have a single-layer structure or a laminated structure of three or more layers.

[0322] The conductor 260a is preferably made of a conductor having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0323] Conductor 260a has the function of suppressing oxygen diffusion, which can suppress a decrease in conductivity due to oxidation of conductor 260b caused by oxygen contained in insulator 250. As a conductive material having the function of suppressing oxygen diffusion, it is preferable to use, for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like.

[0324] Conductor 260b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. Furthermore, since conductor 260 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. Conductor 260b may also have a layered structure, such as a layered structure of titanium or titanium nitride and the above-mentioned conductive material.

[0325] 27A and 27C, in a region of the metal oxide 230b that does not overlap with the conductor 242, in other words, in the channel formation region of the metal oxide 230, the conductor 260 is arranged to cover the side surface of the metal oxide 230. This makes it easier for the electric field of the conductor 260, which functions as the first gate electrode, to act on the side surface of the metal oxide 230. This increases the on-current of the transistor 200A and improves the frequency characteristics.

[0326] Like the insulator 214, the insulator 254 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200A from the insulator 280 side. For example, the insulator 254 preferably has lower hydrogen permeability than the insulator 224. Furthermore, as shown in FIGS. 27B and 27C , the insulator 254 preferably contacts the side surface of the metal oxide 230c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 230a and the metal oxide 230b, and the top surface of the insulator 224. This configuration can prevent hydrogen contained in the insulator 280 from entering the metal oxide 230 from the top or side surfaces of the conductor 242a, the conductor 242b, the metal oxide 230a, the metal oxide 230b, and the insulator 224.

[0327] Furthermore, it is preferable that the insulator 254 has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate). For example, it is preferable that the insulator 254 has lower oxygen permeability than the insulator 280 or the insulator 224.

[0328] The insulator 254 is preferably formed by sputtering. By forming the insulator 254 by sputtering in an oxygen-containing atmosphere, oxygen can be added to the insulator 224 near the region where the insulator 254 is in contact with the insulator 254. This allows oxygen to be supplied from this region to the metal oxide 230 through the insulator 224. The insulator 254 has a function of suppressing upward oxygen diffusion, thereby preventing oxygen from diffusing from the metal oxide 230 to the insulator 280. The insulator 222 has a function of suppressing downward oxygen diffusion, thereby preventing oxygen from diffusing from the metal oxide 230 toward the substrate. In this way, oxygen is supplied to the channel formation region of the metal oxide 230. This reduces oxygen vacancies in the metal oxide 230 and suppresses the transistor from becoming normally on.

[0329] For example, an insulator containing an oxide of one or both of aluminum and hafnium may be formed as the insulator 254. Note that as the insulator containing an oxide of one or both of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like.

[0330] The insulator 224, the insulator 250, and the metal oxide 230 are covered with the insulator 254, which has a barrier property against hydrogen, and the insulator 280 is separated from the insulator 224, the metal oxide 230, and the insulator 250 by the insulator 254. This makes it possible to prevent impurities such as hydrogen from penetrating from the outside of the transistor 200A, thereby providing the transistor 200A with good electrical characteristics and reliability.

[0331] The insulator 280 is provided over the insulator 224, the metal oxide 230, and the conductor 242 with the insulator 254 interposed therebetween. For example, the insulator 280 preferably includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having vacancies, or the like. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are particularly preferred because they can easily form a region containing oxygen that is released by heating.

[0332] It is preferable that the concentration of impurities such as water or hydrogen is reduced in the insulator 280. The top surface of the insulator 280 may be flattened.

[0333] Similar to the insulator 214, the insulator 274 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the insulator 280 from above. As the insulator 274, for example, an insulator that can be used for the insulator 214, the insulator 254, etc. may be used.

[0334] An insulator 281 functioning as an interlayer film is preferably provided over the insulator 274. Like the insulator 224, the insulator 281 preferably has a reduced concentration of impurities such as water or hydrogen.

[0335] The conductor 240a and the conductor 240b are arranged in openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 254. The conductor 240a and the conductor 240b are arranged opposite each other with the conductor 260 interposed therebetween. The height of the upper surfaces of the conductor 240a and the conductor 240b may be flush with the upper surface of the insulator 281.

[0336] Note that insulator 241a is provided in contact with the inner walls of the openings of insulators 281, 274, 280, and 254, and a first conductor of conductor 240a is formed in contact with the side surface of insulator 241a. Conductor 242a is located on at least a portion of the bottom of the openings, and conductor 240a is in contact with conductor 242a. Similarly, insulator 241b is provided in contact with the inner walls of the openings of insulators 281, 274, 280, and 254, and a first conductor of conductor 240b is formed in contact with the side surface of insulator 241b. Conductor 242b is located on at least a portion of the bottom of the openings, and conductor 240b is in contact with conductor 242b.

[0337] The conductors 240a and 240b are preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductors 240a and 240b may have a layered structure.

[0338] When the conductor 240 has a layered structure, it is preferable to use the above-mentioned conductors that have the function of suppressing the diffusion of impurities such as water or hydrogen for the conductors in contact with the metal oxide 230a, the metal oxide 230b, the conductor 242, the insulator 254, the insulator 280, the insulator 274, and the insulator 281. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Furthermore, the conductive material that has the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or a layered structure. The use of such a conductive material can suppress the absorption of oxygen added to the insulator 280 by the conductors 240a and 240b. Furthermore, it can suppress the intrusion of impurities such as water or hydrogen from layers above the insulator 281 into the metal oxide 230 through the conductors 240a and 240b.

[0339] The insulators 241a and 241b may be, for example, insulators that can be used for the insulator 254. The insulators 241a and 241b are provided in contact with the insulator 254, and therefore can prevent impurities such as water or hydrogen from the insulator 280 from being mixed into the metal oxide 230 through the conductors 240a and 240b. Furthermore, oxygen contained in the insulator 280 can be prevented from being absorbed by the conductors 240a and 240b.

[0340] Although not shown, a conductor functioning as wiring may be disposed in contact with the upper surface of the conductor 240a and the upper surface of the conductor 240b. The conductor functioning as wiring is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor may also have a layered structure, for example, a layered structure of titanium or titanium nitride and the above-mentioned conductive material. The conductor may be formed so as to be embedded in an opening provided in an insulator.

[0341] <Transistor constituent materials> The constituent materials that can be used for the transistor will be described.

[0342] [substrate] The substrate on which the transistor 200A is formed may be, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (e.g., yttria-stabilized zirconia substrates), and resin substrates. Examples of semiconductor substrates include semiconductor substrates such as silicon and germanium, and compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. Examples of semiconductor substrates having an insulating region within the semiconductor substrate, such as an SOI (Silicon-On-Insulator) substrate, are also available. Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Other examples include substrates having a metal nitride and a metal oxide. Examples of other substrates include an insulating substrate with a conductor or semiconductor provided thereon, a semiconductor substrate with a conductor or insulator provided thereon, and a conductive substrate with a semiconductor or insulator provided thereon. Alternatively, these substrates may be provided with elements. The elements provided on the substrate include a capacitor element, a resistor element, a switch element, a light-emitting element, a memory element, and the like.

[0343] [Insulator] Examples of insulators include oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides, which have insulating properties.

[0344] For example, as transistors become more miniaturized and highly integrated, thinner gate insulators can cause problems such as leakage current. Using a high-k material for the gate insulator allows for lower voltage operation of the transistor while maintaining the physical film thickness. On the other hand, using a material with a low dielectric constant for the interlayer insulator can reduce the parasitic capacitance between wiring. Therefore, it is best to select materials based on the insulator's function.

[0345] Examples of insulators with a high relative dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0346] Examples of insulators with a low dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having voids, and resin.

[0347] The electrical characteristics of a transistor including an oxide semiconductor can be stabilized by surrounding it with an insulator (such as the insulator 214, the insulator 222, the insulator 254, or the insulator 274) that has a function of suppressing the permeation of impurities such as hydrogen and oxygen. Examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include, for example, a single-layer or stacked insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum. Specifically, examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide; and metal nitrides such as aluminum nitride, aluminum titanium nitride, titanium nitride, silicon nitride oxide, and silicon nitride.

[0348] The insulator functioning as the gate insulator is preferably an insulator having a region containing oxygen that is released by heating. For example, by using a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating is in contact with the metal oxide 230, oxygen vacancies in the metal oxide 230 can be compensated for.

[0349] [conductor] As the conductor, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above metal element as a component, or an alloy combining the above metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. Furthermore, semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may also be used.

[0350] A plurality of conductors formed from the above materials may be stacked. For example, a stacked structure may be formed by combining the above-mentioned material containing a metal element and a conductive material containing oxygen. A stacked structure may also be formed by combining the above-mentioned material containing a metal element and a conductive material containing nitrogen. A stacked structure may also be formed by combining the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0351] When a metal oxide is used for the channel formation region of a transistor, a conductor functioning as a gate electrode preferably has a stacked structure of a combination of a material containing the metal element and a conductive material containing oxygen. In this case, the conductive material containing oxygen is preferably provided on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is easily supplied to the channel formation region.

[0352] In particular, as a conductor functioning as a gate electrode, it is preferable to use a conductive material containing oxygen and a metal element contained in the metal oxide in which the channel is formed. Alternatively, a conductive material containing the above-mentioned metal element and nitrogen may be used. For example, a conductive material containing nitrogen, such as titanium nitride or tantalum nitride, may be used. Alternatively, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide doped with silicon may be used. Furthermore, indium gallium zinc oxide containing nitrogen may be used. By using such a material, hydrogen contained in the metal oxide in which the channel is formed may be captured. Alternatively, hydrogen introduced from an external insulator or the like may be captured.

[0353] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0354] (Embodiment 6) In this embodiment, a metal oxide (hereinafter also referred to as an oxide semiconductor) that can be used for the OS transistor described in the above embodiment will be described.

[0355] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to Fig. 28A, which is a diagram for explaining classification of crystal structures of oxide semiconductors, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0356] As shown in FIG. 28A, oxide semiconductors are broadly classified into "amorphous," "crystalline," and "crystal." "Amorphous" includes completely amorphous. "Crystalline" includes c-axis-aligned crystalline (CAAC), nanocrystalline (nc), and cloud-aligned composite (CAC). The "Crystalline" classification excludes single crystal, polycrystal, and completely amorphous (excluding single crystal and polycrystal). "Crystal" includes single crystal and polycrystal.

[0357] The structure within the bold frame shown in Figure 28A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). In other words, this structure can be said to be completely different from the energetically unstable "Amorphous" and "Crystal."

[0358] The crystalline structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 28B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline." The GIXD method is also known as the thin-film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by GIXD measurement shown in Figure 28B will be simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 28B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 28B is 500 nm.

[0359] As shown in Figure 28B, a clear peak indicating crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. In Figure 28B, the horizontal axis represents 2θ [deg.], and the vertical axis represents intensity [au]. Specifically, a peak indicating c-axis orientation is detected near 2θ = 31° in the XRD spectrum of the CAAC-IGZO film. Note that, as shown in Figure 28B, the peak near 2θ = 31° is asymmetrical with respect to the angle at which the peak intensity is detected.

[0360] The crystalline structure of a film or substrate can be evaluated by the diffraction pattern (also called the nanobeam electron diffraction pattern) observed by nanobeam electron diffraction (NBED). The diffraction pattern of the CAAC-IGZO film is shown in Figure 28C. Figure 28C shows a diffraction pattern observed by NBED, in which an electron beam is incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 28C is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. In the nanobeam electron diffraction method, electron diffraction is performed using a probe diameter of 1 nm.

[0361] As shown in FIG. 28C, multiple spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0362] [Structure of oxide semiconductor] Note that oxide semiconductors may be classified differently from those shown in FIG. 28A when focusing on their crystal structures. For example, oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, amorphous-like oxide semiconductors (a-like OSs), amorphous oxide semiconductors, and the like.

[0363] Here, the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described in detail.

[0364] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, each with its c-axis aligned in a specific direction. The specific direction can be the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If the atomic arrangement is considered as a lattice arrangement, a crystalline region can also be a region with a uniform lattice arrangement. Furthermore, CAAC-OS has a region where multiple crystalline regions are connected in the ab-plane direction, and the region may have distortion. Note that distortion refers to a location where the lattice arrangement changes between a region with a uniform lattice arrangement and a region with a different uniform lattice arrangement in the region where multiple crystalline regions are connected. In other words, CAAC-OS is an oxide semiconductor with a c-axis aligned but no clear orientation in the ab-plane direction.

[0365] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of the crystalline region may be several tens of nm.

[0366] In an In-M-Zn oxide (wherein element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), the CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter referred to as an In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as an (M, Zn) layer) are stacked. Note that indium and element M are mutually substituted. Therefore, the (M, Zn) layer may contain indium. Furthermore, the In layer may contain element M. Furthermore, the In layer may contain Zn. The layered structure is observed as a lattice image in a high-resolution TEM image, for example.

[0367] When the CAAC-OS film is subjected to structural analysis using, for example, an XRD apparatus, a peak indicating c-axis orientation is detected at or near 2θ=31° in out-of-plane XRD measurement using θ / 2θ scan. Note that the position of the peak indicating c-axis orientation (2θ value) may vary depending on the type and composition of the metallic elements constituting the CAAC-OS.

[0368] For example, in the electron diffraction pattern of a CAAC-OS film, multiple bright spots are observed, and the spots are observed at positions that are point-symmetric with respect to the spot of the incident electron beam that has passed through the sample (also called the direct spot).

[0369] When the crystalline region is observed from the specific direction, the lattice arrangement in the crystalline region is basically a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. The distortion may also have a pentagonal, heptagonal, or other lattice arrangement. In the CAAC-OS, no clear grain boundaries can be identified even near the distortion. This indicates that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is thought to be because the CAAC-OS can tolerate distortion due to the lack of close-packed oxygen atom arrangement in the ab-plane direction and the change in interatomic bond distance caused by metal atom substitution.

[0370] A crystal structure with clear grain boundaries is called polycrystalline. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in the on-state current and field-effect mobility of a transistor. Therefore, CAAC-OS, which lacks clear grain boundaries, is one of the crystalline oxides with a crystal structure suitable for use in the semiconductor layer of a transistor. Zn is preferred for use in CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are suitable because they can suppress the generation of grain boundaries more effectively than In oxide.

[0371] The CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, it can be said that the CAAC-OS is less susceptible to a decrease in electron mobility due to grain boundaries. Furthermore, since the crystallinity of an oxide semiconductor can be reduced by the inclusion of impurities or the formation of defects, the CAAC-OS can also be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, oxide semiconductors with CAAC-OS have stable physical properties. Therefore, oxide semiconductors with CAAC-OS are heat-resistant and highly reliable. Furthermore, the CAAC-OS is stable even under high temperatures (so-called thermal budgets) during the manufacturing process. Therefore, using a CAAC-OS for an OS transistor can increase the flexibility of the manufacturing process.

[0372] [nc-OS] The nc-OS has periodic atomic arrangement in a microscopic region (e.g., a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In other words, the nc-OS has microcrystalline structures. The size of the microcrystalline structures is, for example, 1 nm to 10 nm, particularly 1 nm to 3 nm, and therefore these microcrystalline structures are also called nanocrystalline structures. Furthermore, the nc-OS exhibits no regularity in the crystal orientation between different nanocrystalline structures. Therefore, the entire film lacks orientation. Therefore, depending on the analytical method, the nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor. For example, when a structural analysis of an nc-OS film is performed using an XRD apparatus, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Furthermore, when an nc-OS film is subjected to electron diffraction (also known as selected-area electron diffraction) using an electron beam with a probe diameter larger than that of nanocrystalline structures (e.g., 50 nm or larger), a halo-like diffraction pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystals (for example, 1 nm to 30 nm), an electron diffraction pattern can be obtained in which multiple spots are observed within a ring-shaped region centered on the direct spot.

[0373] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has a pore or low-density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS. Furthermore, the a-like OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0374] [Oxide semiconductor composition] Next, the above-mentioned CAC-OS will be described in detail, which relates to the material composition.

[0375] [CAC-OS] CAC-OS is a material structure in which elements constituting a metal oxide are unevenly distributed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or a similar size range. Hereinafter, a metal oxide in which one or more metal elements are unevenly distributed and the regions containing the metal elements are mixed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or a similar size range, is also referred to as a mosaic or patch state.

[0376] Furthermore, CAC-OS has a mosaic structure in which the material is separated into first and second regions, and the first regions are distributed throughout the film (hereinafter also referred to as a cloud structure). That is, CAC-OS is a composite metal oxide having a structure in which the first and second regions are mixed.

[0377] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In-Ga-Zn oxide are represented as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the CAC-OS composition. The second region is a region where [Ga] is larger than [Ga] in the CAC-OS composition. Alternatively, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0378] Specifically, the first region is a region whose main component is indium oxide, indium zinc oxide, or the like. The second region is a region whose main component is gallium oxide, gallium zinc oxide, or the like. In other words, the first region can be rephrased as a region whose main component is In. The second region can be rephrased as a region whose main component is Ga.

[0379] It should be noted that there are cases where a clear boundary between the first region and the second region cannot be observed.

[0380] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using EDX (Energy Dispersive X-ray spectroscopy) confirms that the CAC-OS has a structure in which a region mainly composed of In (first region) and a region mainly composed of Ga (second region) are unevenly distributed and mixed.

[0381] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulating property due to the second region act in a complementary manner, thereby providing the CAC-OS with a switching function (the ability to turn on and off). In other words, CAC-OS has a conductive function in part of the material and an insulating function in part of the material, and the material as a whole functions as a semiconductor. By separating the conductive function from the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I on ), high field-effect mobility (μ), and good switching behavior can be achieved.

[0382] Oxide semiconductors have a variety of structures, each with different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0383] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0384] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility and high reliability can be realized.

[0385] For the transistor, an oxide semiconductor with a low carrier concentration is preferably used. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 Less than 1 × 10 15 cm -3 or less, more preferably 1 × 10 13 cm -3 Less than 1×10, more preferably 11 cm -3 or less, more preferably 1 × 10 10 cm -3 Less than 1 x 10 -9 cm -3 That is all. Note that in order to reduce the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced to reduce the density of defect states. In this specification and the like, a semiconductor having a low impurity concentration and a low density of defect states is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may also be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0386] A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore, the density of trap states may also be low.

[0387] Charges trapped in the trap states of an oxide semiconductor take a long time to dissipate and may behave like fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0388] Therefore, in order to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0389] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0390] When an oxide semiconductor contains one or both of silicon and carbon, which are elements of Group 14, defect levels are formed in the oxide semiconductor. Therefore, the concentrations of silicon and carbon in the oxide semiconductor and those near the interface with the oxide semiconductor (concentrations obtained by SIMS) are calculated as follows: 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0391] When an oxide semiconductor contains an alkali metal or alkaline earth metal, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or alkaline earth metal is likely to have normally-on characteristics. Therefore, when the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0392] When nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the oxide semiconductor obtained by SIMS is set to 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm3 Do the following:

[0393] Hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons serving as carriers may be generated. Furthermore, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. For this reason, it is preferable to reduce the amount of hydrogen in the oxide semiconductor as much as possible. Specifically, when the hydrogen concentration in an oxide semiconductor obtained by SIMS is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0394] When an oxide semiconductor with sufficiently reduced impurities is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0395] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0396] (Embodiment 7) In this embodiment, an electronic device including a display device and a display system according to one embodiment of the present invention will be described.

[0397] FIG. 29A is a diagram showing the appearance of the head mounted display 8200.

[0398] The head-mounted display 8200 includes a mounting portion 8201, a lens 8202, a main body 8203, a display portion 8204, and a cable 8205. The mounting portion 8201 has a built-in battery 8206.

[0399] A cable 8205 supplies power from a battery 8206 to the main body 8203. The main body 8203 is equipped with a wireless receiver or the like, and can display an image corresponding to received image data or the like on a display portion 8204. In addition, a camera provided in the main body 8203 captures the movement of the user's eyeball or eyelid, and calculates the coordinates of the user's line of sight based on the information, thereby allowing the user's line of sight to be used as an input means.

[0400] The wearing unit 8201 may be provided with a plurality of electrodes at positions that come into contact with the user. The main body 8203 may have a function of recognizing the user's line of sight by detecting a current flowing through the electrodes in accordance with the movement of the user's eyeballs. The main body 8203 may also have a function of monitoring the user's pulse by detecting the current flowing through the electrodes. The wearing unit 8201 may also have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function of displaying the user's biological information on the display unit 8204. The wearing unit 8201 may also detect the movement of the user's head, etc., and change the image displayed on the display unit 8204 in accordance with the movement.

[0401] The display device of one embodiment of the present invention can be applied to the display portion 8204. This reduces the power consumption of the head-mounted display 8200, allowing the head-mounted display 8200 to be used continuously for a long period of time. Furthermore, by reducing the power consumption of the head-mounted display 8200, the battery 8206 can be made smaller and lighter, thereby enabling the head-mounted display 8200 to be made smaller and lighter. This reduces the burden on a user of the head-mounted display 8200, making it possible for the user to feel less fatigue.

[0402] 29B, 29C, and 29D are diagrams showing the external appearance of a head mounted display 8300. The head mounted display 8300 includes a housing 8301, a display portion 8302, a band-shaped fixture 8304, and a pair of lenses 8305. A battery 8306 is built into the housing 8301, and power can be supplied from the battery 8306 to the display portion 8302 and the like.

[0403] A user can view the display on the display portion 8302 through the lens 8305. Note that it is preferable to arrange the display portion 8302 in a curved manner. By arranging the display portion 8302 in a curved manner, a user can feel a high sense of presence. Note that although the configuration in which one display portion 8302 is provided has been illustrated in this embodiment, the present invention is not limited thereto, and for example, a configuration in which two display portions 8302 are provided may be used. In this case, if one display portion is arranged at one eye of the user, three-dimensional display using parallax or the like can be performed.

[0404] Note that the display device of one embodiment of the present invention can be applied to the display portion 8302. This reduces the power consumption of the head-mounted display 8300, allowing the head-mounted display 8300 to be used continuously for a long period of time. Furthermore, reducing the power consumption of the head-mounted display 8300 allows the battery 8306 to be made smaller and lighter, thereby enabling the head-mounted display 8300 to be made smaller and lighter. This reduces the burden on a user of the head-mounted display 8300, making it possible for the user to feel less fatigue.

[0405] Next, an example of an electronic device different from the electronic device shown in FIGS. 29A to 29D is shown in FIGS. 30A and 30B.

[0406] The electronic device shown in Figures 30A and 30B has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays), and a battery 9009.

[0407] The electronic device shown in FIGS. 30A and 30B has various functions. For example, it may have a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to control processing using various software (programs), a wireless communication function, a function to connect to various computer networks using the wireless communication function, a function to send or receive various data using the wireless communication function, a function to read programs or data recorded on a recording medium and display them on a display unit, etc. Note that the functions that the electronic device shown in FIGS. 30A and 30B can have are not limited to these, and it may have various other functions. Also, although not shown in FIGS. 30A and 30B, the electronic device may be configured to have multiple display units. Furthermore, the electronic device may be equipped with a camera or the like to have functions such as taking still images, taking videos, saving the captured images to a recording medium (external or built-in to the camera), and displaying the captured images on a display unit.

[0408] The electronic device shown in FIGS. 30A and 30B will be described in detail below.

[0409] FIG. 30A is a perspective view showing a mobile information terminal 9101. The mobile information terminal 9101 has one or more functions selected from, for example, a telephone, a notebook, or an information viewing device. Specifically, it can be used as a smartphone. The mobile information terminal 9101 can display text and images on multiple surfaces. For example, five operation buttons 9050 (also referred to as operation icons or simply icons) can be displayed on one surface of the display unit 9001. Information 9051 can be displayed on the other surface of the display unit 9001. Examples of the information 9051 include a display notifying an incoming email, SNS (social networking service) message, or phone call, the title of the email or SNS message, the name of the sender of the email or SNS message, the date and time, the remaining battery level, and signal strength. Alternatively, the operation buttons 9050, etc., may be displayed in place of the information 9051 at the position where the information 9051 is displayed.

[0410] The display device of one embodiment of the present invention can be applied to the portable information terminal 9101. This reduces the power consumption of the portable information terminal 9101, allowing the portable information terminal 9101 to be used continuously for a long period of time. Furthermore, reducing the power consumption of the portable information terminal 9101 allows the battery 9009 to be made smaller and lighter, thereby enabling the portable information terminal 9101 to be made smaller and lighter. This improves the portability of the portable information terminal 9101.

[0411] FIG. 30B is a perspective view showing a wristwatch-type mobile information terminal 9200. The mobile information terminal 9200 can execute various applications such as mobile phone calls, e-mail, document browsing and creation, music playback, internet communication, and computer games. The display surface of the display unit 9001 is curved, and display can be performed along the curved display surface. FIG. 30B shows an example in which time 9251, operation buttons 9252 (also referred to as operation icons or simply icons), and content 9253 are displayed on the display unit 9001. The content 9253 can be, for example, a video.

[0412] The mobile information terminal 9200 can also perform short-distance wireless communication according to a communication standard. For example, hands-free conversation is also possible by mutual communication with a wireless headset. The mobile information terminal 9200 also has a connection terminal 9006, and can directly exchange data with other information terminals via a connector. Charging can also be performed via the connection terminal 9006. Note that charging may also be performed by wireless power supply without using the connection terminal 9006.

[0413] The display device of one embodiment of the present invention can be applied to the portable information terminal 9200. This allows the power consumption of the portable information terminal 9200 to be reduced, and therefore the portable information terminal 9200 can be used continuously for a long period of time. Furthermore, by reducing the power consumption of the portable information terminal 9200, the battery 9009 can be made smaller and lighter, and therefore the portable information terminal 9200 can be made smaller and lighter. This allows the portable information terminal 9200 to be more portable.

[0414] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0415] <Additional notes regarding the present specification etc.> The above-described embodiments and the respective components in the embodiments will be described below with additional notes.

[0416] The configurations shown in each embodiment can be combined with the configurations shown in other embodiments as appropriate to form one aspect of the present invention. Furthermore, when multiple configuration examples are shown in one embodiment, the configuration examples can be combined as appropriate.

[0417] In addition, the content (or even a part of the content) described in one embodiment can be applied to, combined with, or replaced with another content (or even a part of the content) described in that embodiment, and / or with the content (or even a part of the content) described in one or more other embodiments.

[0418] The contents described in the embodiments refer to the contents described in each embodiment using various figures or the contents described using text in the specification.

[0419] Furthermore, a figure (or even a part thereof) described in one embodiment can be combined with another part of that figure, another figure (or even a part thereof) described in that embodiment, and / or a figure (or even a part thereof) described in one or more other embodiments to form even more figures.

[0420] In addition, in the present specification and the like, in the block diagrams, components are classified by function and shown as independent blocks. However, in actual circuits, etc., it is difficult to separate components by function, and there may be cases where one circuit is involved in multiple functions, or where one function is involved across multiple circuits. Therefore, the blocks in the block diagrams are not limited to the components described in the specification, but may be rephrased appropriately depending on the situation.

[0421] In addition, in the drawings, the size, layer thickness, or region is shown at an arbitrary size for convenience of explanation. Therefore, it is not necessarily limited to the scale. Note that the drawings are shown schematically for clarity, and are not limited to the shapes or values ​​shown in the drawings. For example, it is possible to include variations in signal, voltage, or current due to noise, or variations in signal, voltage, or current due to timing deviations.

[0422] In this specification and the like, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) are used. This is because the source and drain of a transistor vary depending on the structure or operating conditions of the transistor. Note that the names of the source and drain of a transistor can be appropriately changed to source (drain) terminal or source (drain) electrode, etc., depending on the situation.

[0423] Furthermore, the terms "electrode" and "wiring" used in this specification and elsewhere do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" and "wiring" also include cases where multiple "electrodes" or "wirings" are integrally formed.

[0424] Furthermore, in this specification and the like, voltage and potential can be interchanged as appropriate. Voltage refers to the potential difference from a reference potential. For example, if the reference potential is a ground voltage (earth voltage), voltage can be interchanged with potential. Ground potential does not necessarily mean 0 V. Note that potential is relative, and the potential applied to wiring, etc. may change depending on the reference potential.

[0425] In this specification and the like, terms such as "film" and "layer" can be interchangeable depending on the circumstances. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" can be changed to the term "insulating layer."

[0426] In this specification, a switch refers to a device that has the function of controlling whether a current flows by being in a conductive state (on state) or a non-conductive state (off state), or a device that has the function of selecting and switching a path for a current to flow.

[0427] In this specification, the channel length refers to, for example, in a top view of a transistor, a region where a semiconductor (or a portion in the semiconductor through which current flows when the transistor is on) and a gate overlap, or a distance between a source and a drain in a region where a channel is formed.

[0428] In this specification, the channel width refers to, for example, the length of the region where the semiconductor (or the portion in the semiconductor through which current flows when the transistor is on) and the gate electrode overlap, or the length of the portion where the source and drain face each other in the region where the channel is formed.

[0429] In this specification, "A and B are connected" includes not only a direct connection between A and B, but also an electrical connection between A and B. Here, "A and B are electrically connected" means that when an object having some kind of electrical effect exists between A and B, transmission of an electrical signal between A and B is possible. [Explanation of symbols]

[0430] 10A: display device, 10: display device, 20: layer, 30: layer, 40: drive circuit, 41: gate driver, 42: source driver, 50: functional circuit, 51: CPU, 52: accelerator, 53: CPU core, 60: display unit, 61D: pixel, 61G: pixel, 61N: pixel, 61: pixel, 62B: pixel circuit, 62G: pixel circuit, 62R: pixel circuit, 62: pixel circuit, 70B: light-emitting element, 70G: light-emitting element, 70R: light-emitting element, 70W: light-emitting element, 70: light-emitting element, 80: flip-flop, 81: scan flip-flop, 82: backup circuit, 91: Si Transistor, 92: OS transistor, 93: Capacitor, 94: Si transistor, 95: OS transistor, 96: Capacitor, 100A: First display device, 100B: First display device, 100: First display device, 102A: Second display device, 102B: Second display device, 102C: Second display device, 102D: Second display device, 102E: Second display device, 102: Second display device, 106: Earphone, 110: Display unit, 111: Housing, 112: Communication unit, 113: Band, 114: Control unit, 115: Camera unit, 116: Power supply unit, 118: Sensor unit, 119: Second 2 communication unit, 120: display unit, 121: housing, 122: communication unit, 123: wearing unit, 124: control unit, 125: camera unit, 126: power supply unit, 127: earphone unit, 128: sensor unit, 129: headphone unit, 130L: left hand, 130R: right hand, 130: user, 132: lens, 140: image, 141: image information, 142: cursor, 151: display panel, 153: optical member, 156: display area, 157: frame, 158: nose pad, 160: substrate, 161: display unit, 163: external connection terminal for gate driver, 165: external connection terminal for source driver , 200A: transistor, 205a: conductor, 205b: conductor, 205c: conductor, 205: conductor, 214: insulator, 216: insulator, 222: insulator, 224: insulator, 230a: metal oxide, 230b: metal oxide, 230c: metal oxide, 230: metal oxide, 240a: conductor, 240b: conductor, 240: conductor, 241a: insulator, 241b: insulator, 241: insulator, 242a: conductor, 242b: conductor, 242: conductor, 250: insulator, 251: insulating layer, 254: insulator, 260a: conductor, 260b: conductor, 260: conductor,264B: colored layer, 264G: colored layer, 264R: colored layer, 271: protective layer, 272: insulating layer, 273: protective layer, 274: insulator, 275: gap, 276: insulating layer, 277: microlens array, 280: insulator, 281: insulator, 301a: conductor, 301b: conductor, 305: conductor, 311: conductor, 313: conductor, 317: conductor, 321: lower electrode, 323: insulator, 325: upper electrode, 331: conductor, 333: conductor, 335: conductor, 337: conductor, 341: conductor, 343: conductor, 347: conductor, 351: conductor, 353: Conductor, 355: Conductor, 357: Conductor, 361: Insulator, 363: Insulator, 403: Element isolation layer, 405: Insulator, 407: Insulator, 409: Insulator, 411: Insulator, 421: Insulator, 441: Transistor, 443: Conductor, 445: Insulator, 447: Semiconductor region, 449a: Low resistance region, 449b: Low resistance region, 451: Conductor, 453: Conductor, 455: Conductor, 461: Conductor, 463: Conductor, 501: Insulator, 601: Transistor, 602: Transistor, 603: Transistor, 613: Insulator, 614: Insulator, 616: Insulator , 622: insulator, 624: insulator, 654: insulator, 674: insulator, 680: insulator, 681: insulator, 701: substrate, 705: substrate, 712: sealing material, 716: FPC, 730: insulator, 732: sealing layer, 734: insulator, 736: colored layer, 738: light-shielding layer, 750: transistor, 760: connection electrode, 772: conductor, 778: structure, 780: anisotropic conductor, 786B: EL layer, 786G: EL layer, 786R: EL layer, 786W: EL layer, 786: EL layer, 788: conductor, 790: capacitor, 800: transistor, 801a: conductor, 801 b: conductor, 805: conductor, 811: conductor, 813: conductor, 814: insulator, 816: insulator, 817: conductor, 821: insulator, 822: insulator, 824: insulator, 853: conductor, 854: insulator, 855: conductor, 874: insulator, 880: insulator, 881: insulator, 4411: light-emitting layer, 4420: layer, 4430: layer, 8200: head-mounted display, 8201: attachment part, 8202: lens, 8203: main body, 8204: display part, 8205: cable, 8206: battery, 8300: head-mounted display, 8301: housing,8302: Display unit, 8304: Fixing device, 8305: Lens, 8306: Battery, 9000: Housing, 9001: Display unit, 9003: Speaker, 9005: Operation keys, 9006: Connection terminal, 9007: Sensor, 9009: Battery, 9050: Operation button, 9051: Information, 9101: Portable information terminal, 9200: Portable information terminal, 9251: Time, 9252: Operation button, 9253: Content,

Claims

1. A first display device and a second display device, the first display device has a first display unit and a first communication unit, the second display device has a second display unit, a second communication unit, and a camera unit; the second display device has a shape that can be worn on a user's head, When the second display device recognizes that the user is wearing the second display device, the first communication unit and the second communication unit are enabled to transmit and receive data bidirectionally; the second display device displays the image displayed on the first display unit on the second display unit; When the image displayed on the first display unit is completely displayed on the second display unit, the first display device turns off the first display unit; When the first display device detects a touch operation, the first communication unit transmits touch information to the second communication unit; When the second display device receives the touch information, the second display device performs a process based on the touch information; When the second display device is no longer attached, the power supply to the second display device is turned off.

2. In claim 1, the camera unit has a function of capturing an image of external information, A display system, wherein the external information is output to the first display unit or the second display unit.

3. In claim 1 or claim 2, the second display unit has a pixel circuit, The pixel circuit includes a plurality of transistors including an oxide semiconductor.

4. In claim 3, The display system, wherein the oxide semiconductor comprises indium.

Images