Semiconductor device

By using microwave and high-frequency electromagnetic wave irradiation combined with controlled heat treatment, the method addresses impurity-related issues in oxide semiconductor films, resulting in transistors with stable electrical characteristics and improved reliability.

JP2026034566APending Publication Date: 2026-02-27SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025245150
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2009-07-17
Filing Date
2025-12-11
Publication Date
2026-02-27

AI Technical Summary

Technical Problem

Existing methods for manufacturing semiconductor devices with oxide semiconductors face challenges in achieving stable electrical characteristics due to the presence of impurities such as moisture and hydrogen, which affect the reliability and performance of transistors.

Method used

The method involves reducing impurities in the oxide semiconductor film by irradiating it with microwaves and high-frequency electromagnetic waves in an inert gas atmosphere, combined with controlled heat treatment, to purify the film and maintain its stoichiometry, thereby improving the transistor's electrical characteristics.

Benefits of technology

This approach results in the production of transistors with stable electrical properties and high reliability by effectively removing moisture and hydrogen, preventing shifts in threshold voltage and reducing variations in transistor characteristics.

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Abstract

To provide a manufacturing method of a semiconductor device for manufacturing a highly reliable semiconductor device including a transistor having stable electric characteristics.SOLUTION: A method for manufacturing a semiconductor device, comprising: forming a gate electrode over a substrate having an insulating surface; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film over the gate insulating film; irradiating the oxide semiconductor film with a microwave or a high-frequency electromagnetic wave; forming a source electrode and a drain electrode over the oxide semiconductor film irradiated with the electromagnetic wave; and forming an oxide insulating film over the gate insulating film, the oxide semiconductor film, the source electrode, and the drain electrode.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor device using an oxide semiconductor. [Background technology]

[0002] A thin film transistor (TFT), which is a type of field effect transistor, is formed on an insulating surface. The active layer is a semiconductor film with a thickness of several to several hundred nm, and is used in liquid crystal displays, light-emitting devices, etc. It is widely used in flat panel displays such as LCDs and electronic devices such as ICs. .

[0003] In recent years, transistors using metal oxides as the active layer, in addition to silicon and germanium, have been developed. Metal oxides are used in a variety of applications, for example, Indium oxide, a well-known metal oxide, is used as a transparent electrode material in liquid crystal displays and other devices. Some metal oxides exhibit semiconducting properties, and are called oxide semiconductors. Examples of metal oxides that exhibit semiconducting properties include tungsten oxide and oxide Metal oxides that exhibit semiconductor properties include tin oxide, indium oxide, and zinc oxide. Transistors using a silicon nitride film in a channel formation region are already known (Patent Documents 1 to 4, Non-Patent Documents Permitted document 1).

[0004] Incidentally, metal oxides include not only single-component oxides but also multi-component oxides. For example, InGaO3(ZnO) with homologous phase m (m: natural number) is In, Ga, and Zn It is known as a multi-component oxide semiconductor having the above structure (Non-Patent Documents 2 to 4). The oxide semiconductor composed of In-Ga-Zn oxide such as The applicable layer can be confirmed by the であることがされている (patented document 5, non-patented document 5 and 6). [Preliminary Technology Documents] [License]

[0005] [License 1] Special Announcement No. 60-198861 [License 2] Special Announcement No. 8-264794 [License 3] Special Notice No. 11-505377 [License 4] Special Announcement No. 2000-150900 [Patent Document 5] Special Announcement No. 2004-103957 [Non-licensed literature]

[0006] [Non-licensed Document 1] MW Prins, KO Grosse-Holz, G. Muller, JFM Cillessen, JB Giesbers, RP Weening, and RM Wolf, "A ferroelectric transparent thin-film transistor", Appl. Phys. Lett., 17 June 1996, Vol.68 p.3650-3652 [Non-licensed Document 2] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, p.298-315 [Non-licensed Document 3] N. Kimizuka, M. Isobe, and M. Nakamura, “Syntheses and Single-Crystal Data of Homologous Compounds, In2O3(ZnO)m(m=3,4, and 5), InGaO3(ZnO)3, and Ga2O3(ZnO)m(m=7,8,9, and 16) in the In2O3-ZnGa2O4-ZnO System”, J. Solid State Chem., 1995, Vol.116, p.170-178 [Non-patent document 4] Masaaki Nakamura, Noboru Kimizuka, Takahiko Mohri, Mitsumasa Isobe, "Synthesis and Crystal Structure of Homologous Phase, InFeO3(ZnO)m (m: natural number) and Its Isomorphic Compounds," Solid State Physics, 1993, Vol. 28, No. 5, pp. 317-327 [Non-Patent Document 5] K. Nomura, H. Ohta, K. Ueda, T. Kamiya, M. Hirano, and H. Hosono, "Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor", SCIENCE, 2003, Vol.300, p.1269-1272 [Non-patent document 6] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, "Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors", NATURE, 2004, Vol.432 p.488-492 Summary of the Invention [Problem to be solved by the invention]

[0007] In order to manufacture a highly reliable semiconductor device having a transistor with stable electrical characteristics, An object of the present invention is to provide a method for manufacturing a semiconductor device for achieving the above object. [Means for solving the problem]

[0008] In manufacturing a semiconductor device having a transistor in which an oxide semiconductor is used for a channel formation region, By this, impurities including polar molecules such as moisture in the oxide semiconductor film are reduced, and the purity of the oxide semiconductor film is improved. To increase the sensitivity, microwaves, high frequency waves, and other electromagnetic waves are irradiated. It reduces impurities such as moisture present not only in the film but also in the gate insulating film, or prevents oxidation. Reduces impurities such as moisture present at the interface between the oxide semiconductor film and the films that contact the top and bottom of the oxide semiconductor film. To do this, electromagnetic waves are irradiated.

[0009] Specifically, in order to reduce impurities such as moisture, an oxide semiconductor film is formed, and then an oxide semiconductor film is formed. With the film exposed, place in an inert gas atmosphere such as nitrogen or rare gas (argon, helium, etc.) Under low or reduced pressure, electromagnetic waves of frequencies that are easily absorbed by water (microwaves have a frequency of 300 MHz to 3 THz, and for high frequencies, frequencies from 1 MHz to 300 MHz) By irradiating the semiconductor film, moisture contained in the oxide semiconductor film is reduced. The conductive film also contains hydrogen and OH, so these are also converted into oxide semiconductor film by irradiation with electromagnetic waves. It is thought that it will depart from

[0010] The irradiation of the oxide semiconductor film with the electromagnetic waves may be performed in parallel with the heat treatment. By performing the irradiation of light in parallel with the heat treatment, impurities such as moisture in the oxide semiconductor film can be removed in a short time. However, the heat treatment can be performed on the oxide semiconductor. The temperature at which metals with low melting points, such as Zn, do not easily vaporize, for example, 100°C or higher but lower than 350°C. The heating is preferably performed at a temperature higher than or equal to 150° C. and lower than 250° C. Note that the oxide semiconductor film is irradiated with electromagnetic waves at room temperature. Even if the water molecules are irradiated with electromagnetic waves, they will absorb the energy of the waves and vibrate, resulting in oxidation. The temperature of the semiconductor film is expected to be higher than room temperature. When performing the process, the temperature of the oxide semiconductor film is controlled in consideration of the temperature rise caused by the irradiation of electromagnetic waves. In addition, when using electromagnetic wave irradiation and heat treatment in combination, the setting of the heat treatment should be After the temperature of the oxide semiconductor film is increased to a certain temperature, the oxide semiconductor film is irradiated with electromagnetic waves. The oxide semiconductor film is slowly cooled to a temperature range of 100° C. or less.

[0011] In order to remove impurities such as moisture present in an oxide semiconductor film by heat treatment alone in a short time, It is more effective to heat the oxide semiconductor film to a temperature higher than the above-mentioned set temperature range. However, in one aspect of the present invention, by using electromagnetic wave irradiation, Or, even if the temperature range is lower than the above set temperature, impurities such as moisture can be efficiently removed. Therefore, when removing impurities such as moisture, This prevents the evaporation of metals such as Zn, which has low thermal conductivity, and thus prevents changes in the composition ratio of the oxide semiconductor. This can prevent deterioration of the characteristics of a transistor formed using an oxide semiconductor.

[0012] Highly purified by eliminating impurities such as water, hydrogen, and OH, which act as electron donors (donors). Oxide semiconductors (purified OS) are i-type (intrinsic semiconductors) or as close to i-type as possible. By using the oxide semiconductor in a transistor, it is possible to prevent the occurrence of impurities, such as a shift in threshold voltage. This prevents the characteristics of the transistor from deteriorating, improving reliability.

[0013] Furthermore, the oxide semiconductor film is irradiated with electromagnetic waves to remove impurities such as moisture, and then the oxide semiconductor film is oxidized. An oxide insulating film may be formed in contact with the oxide semiconductor film. The oxide semiconductor film is irradiated with oxygen by heat treatment performed in parallel with irradiation with microwaves or electromagnetic waves. Even if vacancies occur, oxygen is supplied to the oxide semiconductor film. In the region where the conductor film contacts the oxide insulating film, oxygen vacancies that act as donors are reduced, and stoichiometry is achieved. As a result, the oxide semiconductor film can be made i-type or substantially i-type. This allows the electrical characteristics of the transistor to be improved and the variations in the electrical characteristics to be reduced. This can be done.

[0014] Specifically, the highly purified oxide semiconductor is analyzed by secondary ion mass spectrometry (SIMS). The hydrogen concentration measured by General Ion Mass Spectroscopy (NDMS) , 5×10 19 / cm 3 Less than or equal to 5 x 10 18 / cm 3 Less than or equal to 5, more preferably x10 17 / cm 3 or less, more preferably 1 × 10 16 / cm 3 In addition, The carrier density of the oxide semiconductor film that can be measured by the Hall effect measurement is 1×10 14 / cm 3 Less than 1 x 10 12 / cm 3 less than 1×10 11 / cm 3 Not yet The band gap of the oxide semiconductor is 2 eV or more, preferably 2.5 eV or more. It is more preferably 3 eV or more.

[0015] Here, the analysis of the hydrogen concentration in the oxide semiconductor film will be described. The hydrogen concentration in the conductive film was measured using secondary ion mass spectrometry (SIMS). SIMS analysis is performed using ion mass spectroscopy (SIMS). It is difficult to obtain accurate data near the sample surface or near the interface between layers of different materials. Therefore, the distribution of hydrogen concentration in the film in the thickness direction was analyzed by SIMS. When analyzing, the values ​​should be almost constant without extreme fluctuations within the range where the target film exists. The average value in the area where the value is obtained is adopted as the hydrogen concentration. When the film thickness is small, the hydrogen concentration in the adjacent film affects the film thickness, and a nearly constant value is obtained. In this case, the hydrogen concentration in the area where the film exists may be The maximum or minimum value of the hydrogen concentration in the film is used. In the region, there is no mountain-shaped peak with a maximum value or a valley-shaped peak with a minimum value. If not, the value at the inflection point is used as the hydrogen concentration.

[0016] The oxide semiconductor is an In-Sn-Ga-Zn-O-based oxide semiconductor, which is a quaternary metal oxide. Conductors, ternary metal oxides such as In-Ga-Zn-O oxide semiconductors, In-Sn-Z nO-based oxide semiconductors, In-Al-Zn-O-based oxide semiconductors, Sn-Ga-Zn-O-based Oxide semiconductors, Al-Ga-Zn-O oxide semiconductors, Sn-Al-Zn-O oxide semiconductors Conductors, binary metal oxides such as In-Zn-O oxide semiconductors and Sn-Zn-O oxides semiconductors, Al-Zn-O oxide semiconductors, Zn-Mg-O oxide semiconductors, Sn-Mg -O-based oxide semiconductors, In-Mg-O-based oxide semiconductors, In-Ga-O-based oxide semiconductors, In-O based oxide semiconductors, Sn-O based oxide semiconductors, Zn-O based oxide semiconductors, etc. In this specification, for example, an In—Sn—Ga—Zn—O system Oxide semiconductors are made of indium (In), tin (Sn), gallium (Ga), and zinc (Zn). The stoichiometric ratio is not particularly important. The compound semiconductor may contain silicon.

[0017] In addition, oxide semiconductors have the chemical formula InMO3(ZnO) m (m>0) Here, M is one or more metal elements selected from Ga, Al, Mn, and Co. show.

[0018] Note that the oxide insulating film formed in contact with the oxide semiconductor film is resistant to moisture, hydrogen ions, OH ions, and the like. - Inorganic insulating film, specifically silicon oxide film or silicon nitride oxide film, that blocks impurities such as is used.

[0019] Furthermore, after forming an oxide insulating film in contact with the oxide semiconductor film, the film is again irradiated with electromagnetic waves. After forming an oxide insulating film in contact with the oxide semiconductor film, Irradiation can reduce variations in the electrical characteristics of transistors. [Effects of the Invention]

[0020] A transistor having stable electrical characteristics can be manufactured and provided. It is possible to provide a semiconductor device having a transistor with good properties and high reliability. [Brief explanation of the drawings]

[0021] [Figure 1] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 2] FIG. 1 is a top view of a fabricated transistor. [Figure 3] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 4] FIG. 1 is a top view of a fabricated transistor. [Figure 5] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 8] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 9] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 10] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 11] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 12] FIG. 1 is a top view of a fabricated transistor. [Figure 13] FIG. 1 is a cross-sectional view of a fabricated transistor. [Figure 14] FIG. [Figure 15] FIG. [Figure 16] FIG. 1 is a block diagram illustrating a display device. [Figure 17] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 18] FIG. 1 is a circuit diagram showing a configuration of a shift register. [Figure 19] 1A and 1B are a circuit diagram showing the configuration of a shift register and a timing chart explaining the operation of the shift register; [Figure 20]FIG. 1 is a diagram showing a configuration of a module of a liquid crystal display device. [Figure 21] 1A to 1C are diagrams illustrating electronic devices using semiconductor devices. [Figure 22] Cross-sectional view of a microwave plasma CVD device. [Figure 23] Graph showing the water absorption curve for electromagnetic wave frequency based on calculation results. [Figure 24] 10 is a graph showing the dielectric loss of water versus the frequency of electromagnetic waves, based on calculation results. DETAILED DESCRIPTION OF THE INVENTION

[0022] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and the embodiments and aspects thereof may be modified without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0023] The present invention is applicable to integrated circuits such as microprocessors and image processing circuits, RF tags, semiconductors, etc. The semiconductor device can be used to manufacture various semiconductor devices such as display devices. It refers to all devices that can function by utilizing semiconductor characteristics, including semiconductor display devices, semiconductor circuits, etc. All electronic devices are semiconductor devices. Semiconductor display devices include liquid crystal display devices, organic light-emitting devices, Light-emitting devices with light-emitting elements, such as OLEDs, in each pixel, and DMDs (Digital Multipliers). l Micromirror Device), PDP (Plasma Display) Panel), FED (Field Emission Display), etc., and semiconductor Other semiconductor display devices that have circuit elements using semiconductor films in their drive circuits are also included in this category. can be.

[0024] (Embodiment 1) A method for manufacturing a semiconductor device will be described with reference to FIGS.

[0025] As shown in FIG. 1A, a gate electrode 101 is provided over a substrate 100 having an insulating surface. An insulating film serving as a base film may be provided between the substrate 100 and the gate electrode 101. An insulating film that prevents diffusion of impurity elements from the plate 100, specifically, a silicon nitride film, a silicon oxide film, A single layer of a silicon nitride oxide film or a silicon oxynitride film may be used, or a selected combination of the two may be used. The gate electrode 101 can be made of molybdenum, titanium, or the like. chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, etc. A conductive film using a metal material or an alloy material containing these as a main component is used in a single layer or a laminated layer. It is possible.

[0026] For example, the gate electrode 101 may have a two-layer laminate structure, such as a molybdenum film on an aluminum film. or a two-layer structure in which a molybdenum film is laminated on a copper film, or a two-layer structure in which a molybdenum film is laminated on a copper film Two-layer structure with titanium nitride film or tantalum nitride film laminated on titanium nitride film and molybdenum film As a three-layer laminated structure, a tungsten film is preferably used. Alternatively, a tungsten nitride film and an alloy film of aluminum and silicon or aluminum and titanium It is preferable to use a three-layer structure in which an alloy film of the above and a titanium nitride film or titanium film are laminated.

[0027] In this specification, an oxynitride is a compound having a composition in which oxygen is contained more than nitrogen. Nitrogen oxide is a substance that contains more nitrogen than oxygen. For example, silicon oxynitride is a material that contains 50 atomic % or more and 70 atomic % or less of oxygen and 10 atomic % or less of nitrogen. 0.5 atomic % or more and 15 atomic % or less, silicon is 25 atomic % or more and 35 atomic % or less, hydrogen is 0.1 The content of silicon dioxide in the silicon nitride film can be in the range of 10 atomic % or more and 10 atomic % or less. The element is defined as oxygen being 5 atomic % or more and 30 atomic % or less, nitrogen being 20 atomic % or more and 55 atomic % or less, silicon being 20 atomic % or more and 55 atomic % or less, and The content of silicon is in the range of 25 atomic % to 35 atomic % and the content of hydrogen is in the range of 10 atomic % to 30 atomic %. However, the above composition range is based on the Rutherford backscattering method (RB S:Rutherford Backscattering Spectrometry ) and Hydrogen Forward Scattering (HFS) The content ratio of the constituent elements is measured when the total is 1 The value does not exceed 0.00 atomic percent.

[0028] Next, a gate insulating film 103 is formed on the gate electrode 101. The gate insulating film 103 is Using plasma CVD or sputtering, silicon oxide film, silicon nitride film, oxynitride film, etc. A silicon film or a silicon nitride oxide film can be formed as a single layer or a laminated layer. Silane (e.g., monosilane), oxygen, and nitrogen are used as gases to form the film by plasma CVD. Instead, a silicon oxynitride film may be formed.

[0029] Next, an oxide semiconductor film is formed over the gate insulating film 103. Before forming a film by sputtering, a reverse sputtering process is performed in which argon gas is introduced to generate plasma. It is preferable to perform a polishing process to remove dust adhering to the surface of the gate insulating film 103. Sputtering is a process in which an RF power source is applied to the substrate side in an argon atmosphere without applying voltage to the target side. This is a method of applying a voltage using a plasma generator to generate plasma near the substrate, thereby modifying the surface. Instead of the argon atmosphere, nitrogen, helium, etc. may be used. It may be carried out in an atmosphere containing oxygen, nitrous oxide, etc. Also, chlorine, tetrachloroethane, etc. may be added to an argon atmosphere. The treatment may be carried out in an atmosphere containing fluorocarbon or the like.

[0030] The oxide semiconductor film for forming the channel formation region is made of an oxide material having semiconductor properties. For example, an In—Ga—Zn—O-based non-single-crystal film may be used. The film is formed by sputtering using an In-Ga-Zn-O oxide semiconductor as a target. The oxide semiconductor film is formed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or Alternatively, it may be formed by sputtering in an atmosphere of rare gas (e.g., argon) and oxygen. can be done.

[0031] The gate insulating film 103 and the oxide semiconductor film are successively formed without being exposed to the air. By continuously forming films without exposing them to the atmosphere, the interface is free from water and hydrocarbons. The interfaces of each layer are formed without being contaminated by atmospheric components or impurity elements floating in the air. Therefore, variations in transistor characteristics can be reduced.

[0032] Next, the oxide semiconductor film is processed (patterned) into a desired shape by etching or the like, An island-shaped oxide semiconductor film 104 (first oxide semiconductor film) is formed. The deposited oxide semiconductor film contains a large amount of moisture or hydrogen as impurities. It has been found that moisture or hydrogen easily forms donor levels in oxide semiconductors. Therefore, as shown in Figure 1(B), an inert gas atmosphere (nitrogen, Helium, neon, argon, etc.), oxygen atmosphere, ultra-dry air atmosphere, or reduced pressure The island-shaped oxide semiconductor film 104 is irradiated with electromagnetic waves such as microwaves and high frequency waves. By this, impurities such as moisture and hydrogen in the oxide semiconductor film are reduced, and the oxide semiconductor film is highly purified. The island-shaped oxide semiconductor film 105 (second oxide semiconductor film) is formed. The content is 20 ppm or less, preferably 1 ppm or less, and preferably 10 ppb or less. is desirable.

[0033] When irradiating with microwaves, the frequency is 300 MHz or more and 3 THz or less, preferably 300 MHz. The frequency bands above 300 GHz and below can be used. , 1MHz to 300MHz, preferably 4MHz to 80MHz In particular, it can be used in electromagnetic wave generating devices such as microwave ovens. Microwaves with frequencies of 915 MHz and 2.45 GHz are used to polarize water. Therefore, microwaves at the above frequencies tend to resonate with the water because the loss coefficient is large and the water is island-like. This is useful for more efficiently removing moisture from the oxide semiconductor film 104. For example, 2. When using 45 GHz microwaves, irradiation for about 5 minutes at an output of 600 W results in high A purified island-shaped oxide semiconductor film 105 can be formed.

[0034] The effect of using microwaves is to heat the water uniformly and rapidly. By heating, a chemical reaction different from that caused by ordinary heating occurs. The molecular motion occurring in the microwave region is a random motion of molecular rotation and diffusion, resulting in As a result, there is a heating effect, but of course there are also non-thermal effects. The dielectric relaxation that characterizes water is It exists at about 25 GHz. The complex permittivity is ε * =ε'-iε”, the imaginary part ε” When an electromagnetic wave with a frequency where the imaginary part ε” is not 0 is irradiated, the electric Magnetic waves are absorbed by dielectrics. The microwave frequency is 2.4GHz, and the peak of the dielectric loss of water The dielectric loss peak of water is approximately one order of magnitude smaller than that of water, but the lower frequency is below several GHz and the higher frequency is far away. Since it extends to the infrared region, electromagnetic waves in this region are absorbed by water, raising the temperature of the water. A microwave oven heats water by applying energy to the lower end of its dielectric loss. It is known that water is expressed by Debye relaxation. In the case of e relaxation, the absorption curve is shown in Figure 23. The horizontal axis of Figure 23 is the frequency f of the electromagnetic wave. It is expressed in logarithm, and the vertical axis shows the value obtained by multiplying the dielectric loss (imaginary part ε") by the angular frequency ω. The dielectric loss at the corresponding frequency of the electromagnetic wave is shown in Figure 24. At this frequency, the absorption curve is approximately half its maximum value, and the high frequency The absorption coefficient saturates at the base of the absorption line shown in Figure 23. It is clear that it is best to input power at a frequency where the power consumption curve becomes large to a certain extent.

[0035] The microwave irradiation is a process using a metal that can reflect microwaves on its inner wall. In this case, microwaves are generated indoors using a magnetron or the like. After being generated in the wave generator, it is introduced into the processing chamber through a waveguide and irradiated onto the object to be processed. Since microwaves have a shorter wavelength than high frequencies, they can propagate freely within the processing chamber just like light. The microwaves that are not absorbed by the object to be irradiated and are irradiated to the inner wall of the processing chamber are Since the light is diffusely reflected by the wall, it is likely to be ultimately absorbed by the object to be irradiated.

[0036] The high frequency irradiation is performed by placing the object to be irradiated between a pair of electrodes in the processing chamber and turning on the high frequency generating circuit. This can be done by applying a high frequency voltage between the electrodes.

[0037] The nitrogen or rare gases such as helium, neon, and argon introduced into the processing chamber contain water. It is preferable that the nitrogen or helium introduced into the processing chamber is not contained. The purity of rare gases such as argon, neon, and argon is 6N (99.9999%) or more, preferably 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm or less).

[0038] Alternatively, instead of an inert gas atmosphere such as a nitrogen gas atmosphere or a rare gas atmosphere, the atmosphere may be atmospheric pressure. The electromagnetic waves are irradiated in air with a low moisture content and a dew point of -60°C or less. It is also possible to do so.

[0039] The desorption of water, hydrogen, and OH by irradiation of microwaves, high frequency waves, etc., is The bonds in the water molecules contained inside the film, the bonds between hydrogen and the oxide semiconductor, the bonds between the hydroxyl group and the oxide semiconductor This occurs when a conductor connector absorbs the energy of the electromagnetic waves, vibrates, and breaks. Therefore, the heat is gradually transferred from the outside to the inside of the oxide semiconductor film by thermal conduction. The bonds can be separated more efficiently than when partial heating is used, so the oxide semiconductor To desorb moisture, hydrogen, and OH from the oxide semiconductor film while suppressing the temperature rise of the conductive film. can be done.

[0040] The channel formation region has a highly purified oxide semiconductor that has been desorbed with moisture, hydrogen, OH, etc. The transistors that use this method are less susceptible to the degradation of characteristics caused by impurities, such as fluctuations in threshold voltage. This allows for high reliability.

[0041] In addition, heat treatment may be performed on the island-shaped oxide semiconductor film 104 in parallel with the irradiation of the electromagnetic waves. When using electromagnetic wave irradiation and heat treatment in combination, an inert gas atmosphere (nitrogen, helium, Neon, argon, etc.), oxygen atmosphere, ultra-dry air atmosphere, or reduced pressure. The temperature of the island-shaped oxide semiconductor film 104 is increased to the set temperature for the heat treatment, and then the above-mentioned After irradiating the magnetic wave, the above atmosphere is maintained in a temperature range of above room temperature and below 100°C. It is preferable to gradually cool the island-shaped oxide semiconductor film 104 until the temperature reaches a certain value. In this case, after heating, an inert gas may be introduced to return the pressure to atmospheric pressure, and then the mixture may be cooled. The water content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less. It is desirable that it is below.

[0042] The heat treatment is performed at a temperature at which metals with low melting points, such as Zn, which make up the oxide semiconductor, do not easily vaporize. For example, the temperature is 100°C or higher and lower than 350°C, preferably 150°C or higher and lower than 250°C. By performing the microwave irradiation in parallel with the heat treatment, impurities such as moisture in the oxide semiconductor film can be removed in a short time. This can be reduced more efficiently in a shorter time.

[0043] Even when an oxide semiconductor film is irradiated with electromagnetic waves at room temperature, water molecules do not absorb the energy of the electromagnetic waves. As a result, the temperature of the oxide semiconductor film becomes higher than room temperature. When heat treatment is performed in parallel with electromagnetic wave irradiation, the temperature rise due to electromagnetic wave irradiation is expected. It is preferable to control the temperature of the oxide semiconductor film in consideration of the temperature.

[0044] Heat treatment is carried out using an electric furnace, a GRTA (Gas Rapture Treatment) method using heated gas, etc. id Thermal Anneal (LRTA) method or lamp light Rapid Thermal Annealing (RTA) and other instantaneous heating methods can be used. For example, when heat treatment is performed using an electric furnace, the temperature rise rate can be set to 0.1°C / min or more. 20℃ / min or less, and the temperature drop characteristic can be 0.1℃ / min to 15℃ / min. preferable.

[0045] After the heat treatment, the island-shaped oxide semiconductor film 105 is preferably amorphous. It may be crystallized.

[0046] After the oxide semiconductor film is irradiated with electromagnetic waves, the oxide semiconductor film is By performing heat treatment, impurities such as water contained in the oxide semiconductor film can be removed. Then, the oxide semiconductor film is subjected to heat treatment in an oxygen atmosphere to have an excess amount of oxygen. The temperature of the heat treatment is set to a value that is in accordance with the amount of Zn, etc., that constitutes the oxide semiconductor. A temperature at which metals with low melting points are unlikely to vaporize, for example, 100°C or higher but lower than 350°C, preferably 15 The temperature is 0°C or higher and lower than 250°C. The oxygen gas used in the heat treatment in the oxygen atmosphere includes: It is preferable that the oxygen gas introduced into the heat treatment device does not contain water, hydrogen, etc. Purity: 6N (99.9999%) or more, preferably 7N (99.99999%) or more; (i.e., the impurity concentration in oxygen is 1 ppm or less, preferably 0.1 ppm or less) preferable.

[0047] Next, a conductive film is formed over the gate insulating film 103 and the island-shaped oxide semiconductor film 105. The materials for the conductive film include aluminum, chromium, tantalum, titanium, manganese, and magnesium. An element selected from the group consisting of tungsten, molybdenum, zirconium, beryllium, and thorium or alloys containing one or more of the above elements.

[0048] In addition, when a heat treatment is performed after the formation of the conductive film, the heat resistance of the conductive film against the heat treatment is increased. Aluminum alone has poor heat resistance and is prone to corrosion. Therefore, when heat treatment is performed after forming the conductive film, it is necessary to combine it with a heat-resistant conductive material. The heat-resistant conductive material that can be combined with aluminum is titanium. selected from the group consisting of tantalum, tungsten, molybdenum, chromium, neodymium, and scandium or alloys containing one or more of the above elements as components, or alloys containing the above elements as components Nitrides containing Cr as a metal are preferred.

[0049] Next, as shown in FIG. 1(C), the conductive film is processed into a desired shape by etching or the like ( The source electrode 106 or the drain electrode 107 is formed by patterning. During the turning, the formation of the source electrode 106 and the drain electrode 107 forms an island-shaped oxide film. The exposed portion of the semiconductor film is partially etched, forming an island-like structure with a groove (recess). The oxide semiconductor film 108 is formed.

[0050] Then, as shown in FIG. 1D, the island-shaped oxide semiconductor film 108 is immersed in an inert gas atmosphere ( Nitrogen, helium, neon, argon, etc.), oxygen atmosphere, ultra-dry air atmosphere, Alternatively, high purification can be achieved by irradiating electromagnetic waves such as microwaves and high frequency waves under reduced pressure. The oxide semiconductor film 109 is formed by oxidizing the oxide semiconductor film 109. The water content of the gas is 20 ppm or less. It is desirable that the concentration is below 1 ppm, preferably below 10 ppb. The oxide semiconductor film 108 is irradiated with microwaves, high frequency waves, or other electromagnetic waves, or a combination of these. The heat treatment is performed using microwaves or high-frequency waves on the island-shaped oxide semiconductor film 104. This can be implemented by referring to the description of irradiation with electromagnetic waves such as waves.

[0051] In one aspect of the present invention, the method can be carried out at a lower temperature without performing high-temperature heat treatment by irradiating with electromagnetic waves. Impurities such as water, hydrogen, and OH in oxide semiconductors can be desorbed in a shorter time. Therefore, by heat treatment to remove impurities such as water, hydrogen, and OH, the source electrode The metal contained in the oxide semiconductor film 106 and the drain electrode 107 enters the island-shaped oxide semiconductor film 108. This prevents the transistor characteristics from deteriorating, such as an increase in off-state current. This can prevent the infection from occurring.

[0052] In this embodiment, the island-shaped oxide semiconductor film 104 formed by patterning is Electromagnetic waves are irradiated onto the surface, and a source electrode 106 and a drain electrode 107 are formed. By this, the island-shaped oxide semiconductor film 108 formed at the same time is also irradiated with the electromagnetic waves again. However, it is not necessary to irradiate the electromagnetic waves twice. Alternatively, only the island-shaped oxide semiconductor film 104 formed by the irradiation of the electromagnetic wave may be irradiated. Alternatively, the source electrode 106 and the drain electrode 107 are formed at the same time. Alternatively, only the island-shaped oxide semiconductor film 108 may be irradiated with electromagnetic waves. , the island-shaped oxide semiconductor film formed by patterning during the above two irradiations of electromagnetic waves. Instead of irradiating the oxide semiconductor film 104 with electromagnetic waves, an island-shaped oxide semiconductor film is formed by patterning. The oxide semiconductor film may be irradiated with electromagnetic waves before the formation of the insulating film 104. In addition to the above two irradiations of electromagnetic waves, the oxide semiconductor film 104 is patterned to form an island-like oxide semiconductor film. An oxide semiconductor film before being formed may be irradiated with electromagnetic waves. This is performed on the oxide semiconductor film before the island-shaped oxide semiconductor film 104 is formed by etching. It is also possible to perform only the irradiation of electromagnetic waves.

[0053] Next, as shown in FIG. 1E, a sputtering agent was applied to the island-shaped oxide semiconductor film 109. The oxide insulating film 110 is formed by a photolithography method. The oxide insulating film 110 formed by this method contains as little impurities as possible, such as moisture, hydrogen, and OH. Inorganic insulating films such as silicon oxide film and silicon nitride oxide film are used to block these substances from entering from the outside. The velum is used.

[0054] In this embodiment, a silicon oxide film with a thickness of 300 nm is formed as the oxide insulating film 110. The substrate temperature during film formation may be set to room temperature or higher and 300° C. or lower, and in this embodiment, it is set to 100° C. The silicon oxide film is formed by sputtering under a rare gas (e.g., argon) atmosphere and oxygen. It can be carried out under atmosphere or under a noble gas (eg argon) and oxygen atmosphere. As the target, either a silicon oxide target or a silicon target may be used. For example, a silicon oxide film is formed by sputtering using a silicon target in an oxygen and nitrogen atmosphere. can be formed.

[0055] The oxide semiconductor film 105 is then subjected to a sputtering process, a PCVD process, or the like to form an oxide semiconductor film. After the oxide insulating film 110 is formed, the irradiation of electromagnetic waves or the processing performed in parallel with the irradiation of electromagnetic waves is performed. Even if oxygen vacancies occur in the oxide semiconductor film 105 due to the heat treatment, the oxide semiconductor Therefore, the oxide semiconductor film 105 and the oxide insulating film 110 are In the contact area, oxygen vacancies that act as donors can be reduced, and the stoichiometric ratio can be satisfied. As a result, the oxide semiconductor film 105 is made i-type or substantially i-type. The oxide semiconductor film 111 (third oxide semiconductor film) can be obtained, and the electric properties of the transistor can be This can improve the characteristics and reduce the variations in electrical characteristics.

[0056] FIG. 2 shows a top view of a transistor 112 manufactured in this embodiment. 2. The transistor 112 has a gate electrode 10 1, a gate insulating film 103 on the gate electrode 101, and an oxide semiconductor layer on the gate insulating film 103. The oxide semiconductor film 111 and the source electrode 106 and the drain electrode 107 on the oxide semiconductor film 111 are Has.

[0057] After the oxide insulating film 110 is formed, the oxide insulating film 110 is heated in a nitrogen atmosphere or an air atmosphere (in the air). The transistor 112 may be subjected to heat treatment (preferably at a temperature of 150° C. or higher and lower than 350° C.). For example, heat treatment is carried out at 250°C for 1 hour in a nitrogen atmosphere. The oxide semiconductor film 105 is heated while being in contact with the oxide insulating film 110. This heat treatment (preferably The temperature (150° C. or higher and lower than 350° C.) is not particularly limited as long as it is after the oxide insulating film 110 is formed. In addition, other processes, such as heat treatment during resin film formation and processing to reduce the resistance of the transparent conductive film, By combining this with heat treatment, it can be performed without increasing the number of steps.

[0058] After the source electrode 106 and the drain electrode 107 are formed, the island-shaped oxide semiconductor film 1 irradiating the oxide semiconductor film 108 with electromagnetic waves to form an island-shaped oxide semiconductor film 109; and forming an oxide insulating film 110 in contact with the insulating film 109 without exposing the insulating film 110 to the air. By continuously processing (continuous processing, in situ process), The oxide semiconductor film 111 to be formed is more likely to be impurities such as moisture, hydrogen, and OH. As a result, the reliability of the transistor 112 can be further improved. can.

[0059] In the manufacturing process, the island-shaped oxide semiconductor film 108 is irradiated with electromagnetic waves to form an island-shaped oxide semiconductor film 108. Between the step of forming the semiconductor film 109 and the step of forming the oxide insulating film 110, the substrate is transferred. The continuous method of the present invention may include a step, an alignment step, a heating or cooling step, etc. However, cleaning processes, wet etching, resist formation, etc. If a process using a liquid is performed between the above two processes, it does not fall within the scope of this continuous processing. To love.

[0060] The above-described continuous treatment can be carried out using, for example, a microwave plasma CVD apparatus. Fig. 22 is a cross-sectional view showing the configuration of the reaction chamber of a microwave plasma CVD apparatus. The reaction chamber of the plasma CVD apparatus includes a processing vessel 180, a substrate 1 provided in the processing vessel 180, and a a support table 181 for placing the processing vessel 180; a gas supply for introducing gas into the processing vessel 180; 182, an exhaust port 183 connected to a vacuum pump for exhausting gases from the processing vessel 180. , a microwave generator 184 for supplying microwaves for plasma generation, A waveguide 185 that introduces microwaves from the position 184 into the processing vessel 180, A top plate 187 having an opening 187a, and a mounting fixture 188 attached to the top plate 187. A number of dielectric plates 186 are provided.

[0061] In addition, a gas pipe 197 for flowing non-source gas between the substrate 100 and the dielectric plate 186, and a gas pipe 198 for flowing source gas The gas pipes 197 and 198 are connected to the gas supply unit 182. Specifically, the gas pipe 197 through which the non-source gas flows is connected to the valve 195 and the mass flow The gas supply source 191 is connected to the non-source gas supply source 191 via a gas supply controller 193. The flow gas line 198 supplies the non-source gas via a valve 196 and a mass flow controller 194. The support base 181 is connected to a supply source 192. In addition, a temperature control section 199 is provided on the support base 181. It is also possible to control the temperature of the substrate 100. A predetermined bias voltage is applied to the support base 181 by the high frequency voltage output from the high frequency power supply. The gas supply unit 182 and the microwave generator 184 may be configured to apply pressure. is provided outside the reaction chamber.

[0062] The microwave generator 184 has a frequency of 1 GHz, 2.45 GHz, or 8.3 GHz. It is possible to supply microwaves. So, microwaves are irradiated uniformly onto a large-area substrate with a side exceeding 1000 mm. In addition, the oxide insulating film 110 having high uniformity can be formed by using the plasma CVD method. The film can be formed at a high deposition rate.

[0063] The surfaces of the processing vessel 180 and the top plate 187 are made of alumina, silicon oxide, or fluororesin. It is made of a metal, for example, an alloy containing aluminum, covered with an insulating film. The fixture 188 is formed from a metal, such as an alloy containing aluminum.

[0064] The dielectric plate 186 is provided so as to be in close contact with the opening of the top plate 187. The microwave generated in the device 184 passes through the waveguide 185 and the opening of the top plate 187 and enters the dielectric plate The radiation propagates to the dielectric plate 186 and is released into the processing vessel 180 through the dielectric plate 186 .

[0065] The dielectric plate 186 is made of ceramic such as sapphire, quartz glass, alumina, silicon oxide, silicon nitride, etc. The dielectric plate 186 has a recess on the side where the plasma 700 is generated. The depression allows stable plasma to be generated. It is possible to uniformly irradiate microwaves onto large substrates with an area exceeding 1 mm. In addition, the oxide insulating film 110 can be formed uniformly at a high film formation rate using the plasma CVD method. This can be done.

[0066] The gas pipe 197 for flowing the non-source gas and the gas pipe 198 for flowing the source gas are arranged so as to intersect. The gas pipe 197 for flowing the non-source gas has an outlet provided on the dielectric plate 186 side. The outlet of the gas pipe 198 for flowing the raw material gas is provided on the substrate 100 side. By ejecting the gas toward the plate 186, the plasma is generated while preventing the formation of a film on the surface of the dielectric plate 186. In addition, the source gas can be ejected at a position closer to the substrate 100. This allows for an increase in the deposition rate. The microphone is made of ceramics such as alumina and aluminum nitride. Because of its high microwave transmittance, gas pipes 197 and 198 are made of ceramics. Even if a gas pipe is provided directly below the dielectric plate 186, no disturbance of the electric field occurs, and the plasma distribution is uniform. It can be made into.

[0067] When microwave irradiation is performed using the microwave plasma CVD apparatus, the processing vessel 1 After the inside of 80 is evacuated, nitrogen, helium, neon or aluminum is supplied from a non-raw material gas supply source 191. An inert gas such as argon is introduced into the processing vessel 180. The heating process is performed in parallel with the microwave irradiation. When the microwave irradiation is performed, the substrate 100 is heated to a predetermined temperature before the microwave irradiation. The temperature of the support table 181 is controlled by the temperature control unit 199. The non-source gas is converted into plasma by the electric field energy of the emitted microwaves. The plasma 170 is more dense on the surface of the dielectric plate 186 and therefore less likely to damage the substrate 100. can be reduced.

[0068] After the microwave irradiation, the oxide insulating film 110 is formed using silicon oxide. First, the temperature of the substrate 100 is controlled. The substrate 100 is kept at room temperature or at a temperature controlled by a temperature control unit 199. The processing chamber 180 is heated to 100° C. to 350° C. Then, after the inside of the processing chamber 180 is evacuated, plasma deposition is performed. As fire gas, any of the rare gases such as helium, argon, neon, xenon, krypton, etc. One or more of the rare gases and oxygen gas are introduced into the processing vessel 180. By inserting the plasma, it is possible to easily ignite the plasma.

[0069] At the stage of microwave irradiation, helium, neon, or When argon is introduced into the processing chamber 180, the oxide insulating film 110 is formed. There is no need to replace the gas inside. In addition, microwave irradiation and heating treatment can be performed in parallel. In this case, the oxide insulating film 110 is formed without lowering the temperature of the substrate 100 after the heat treatment. You may move on to the process of

[0070] The distance between the substrate 100 and the dielectric plate 186 is 10 mm to 80 mm (preferably 10 mm). Next, the inside of the processing vessel 180 is maintained at a predetermined pressure. The pressure inside 80 is set to 1 to 200 Pa, preferably 1 to 100 Pa. The power supply of the device is turned on, and microwaves are supplied from the microwave generator 184 to the waveguide 185. The microwave generator outputs 500 to 600 W to generate plasma in the processing chamber 180. The microwave power is set to 4000 W, preferably 4000 to 6000 W. When excited, the electron temperature is low (0.7 eV to 3 eV, preferably 0.7 eV to 1. 5 eV or less) and high electron density (1 × 10 11 ~1×10 13 cm -3 (or more) plasma is generated. Next, the source gas is introduced into the processing chamber 180 through the gas pipe 198. Specifically, the supply of oxygen gas is stopped, and silane and oxygen are introduced as raw material gases. In this way, the oxide insulating film 110 containing silicon oxide can be formed on the substrate 100. The supply of the raw material gas is stopped, the pressure in the processing vessel 180 is reduced, and the microwave generating device 18 Turn off the power to 4.

[0071] In addition, although FIG. 22 shows one of the reaction chambers of the microwave plasma CVD device as an example, The microwave plasma CVD apparatus has a plurality of reaction chambers, and the reaction chambers are directly connected to each other. Alternatively, they may be connected to a common chamber.

[0072] (Embodiment 2) In this embodiment, a transistor having a different structure from the transistor 112 described in Embodiment 1 is used. A method for manufacturing a semiconductor device having a stator will be described. Or, parts and steps having similar functions can be performed in the same manner as in Embodiment 1. , and repeated explanations will be omitted.

[0073] A method for manufacturing a semiconductor device will be described with reference to FIGS.

[0074] As shown in FIG. 3A, a gate electrode 201 is provided on a substrate 200 having an insulating surface. An insulating film serving as a base film may be provided between the substrate 200 and the gate electrode 201. The material and structure of gate electrode 101 are the same as those of gate electrode 101 shown in the first embodiment. The base film is an insulating film that prevents the diffusion of impurity elements from the substrate 200. Specifically, the silicon nitride film, the silicon oxide film, the silicon nitride oxide film, or the silicon oxynitride film One may be used as a single layer, or a plurality of selected films may be laminated.

[0075] Next, a gate insulating film 203 is formed on the gate electrode 201. The gate insulating film 203 is Using plasma CVD or sputtering, silicon oxide film, silicon nitride film, oxynitride film, etc. A silicon film or a silicon nitride oxide film can be formed as a single layer or a laminated layer. Silane (e.g., monosilane), oxygen, and nitrogen are used as gases to form the film by plasma CVD. Instead, a silicon oxynitride film may be formed.

[0076] Next, a conductive film is formed on the gate insulating film 203. Then, the conductive film is etched. The source electrode 206 and the drain electrode 20 The material of the conductive film is the same as that of the source electrode 106 and the conductive film 7 in the first embodiment. The material of the conductive film patterned when forming the drain electrode 107 may be referred to.

[0077] Next, an oxide film is formed on the source electrode 206, the drain electrode 207 and the gate insulating film 203. Then, as shown in FIG. 3(B), the oxide semiconductor film is etched. The oxide semiconductor film 204 (first oxide semiconductor film) is then processed (patterned) into a desired shape by etching or the like. An oxide semiconductor film (such as a silicon dioxide film) is formed on the silicon dioxide film.

[0078] The oxide semiconductor film for forming the channel formation region may be formed using the semiconductor layer described in Embodiment 1. An oxide material having conductive properties may be used. under an atmosphere of argon, oxygen, or a rare gas (e.g., argon) and oxygen The oxide semiconductor film can be formed by a sputtering method. Before this, argon gas is introduced to generate plasma and reverse sputtering is performed. It is preferable to remove any dust adhering to the surface of the film 203.

[0079] Next, as shown in FIG. 3(C), an inert gas atmosphere (nitrogen, helium, neon, In an atmosphere of argon, oxygen, ultra-dry air, or reduced pressure, By irradiating the compound semiconductor film 204 with electromagnetic waves such as microwaves and high frequency waves, moisture, hydrogen The island-shaped oxide semiconductor film 205 (second oxide semiconductor film) is highly purified by the desorption of OH and the like. The gas contains 20 ppm or less of water, preferably 1 ppm or less of water. In parallel with the above-mentioned irradiation of electromagnetic waves, The oxide semiconductor film 204 may be subjected to heat treatment.

[0080] The irradiation of the electromagnetic waves and the heat treatment to the oxide semiconductor film 204 are the same as those in Embodiment 1. For example, the description of the irradiation of the oxide semiconductor film 104 with electromagnetic waves and the heat treatment shown in That's good.

[0081] The channel formation region has a highly purified oxide semiconductor that has been desorbed with moisture, hydrogen, OH, etc. The transistors that use this method are less susceptible to the degradation of characteristics caused by impurities, such as fluctuations in threshold voltage. This allows for high reliability.

[0082] In addition, in one embodiment of the present invention, it is possible to obtain a lower temperature without performing a high-temperature heat treatment by irradiating with electromagnetic waves. It is possible to remove impurities such as water, hydrogen, and OH from oxide semiconductors at high temperatures in a shorter time. Therefore, by heat treatment to remove impurities such as water, hydrogen, and OH, the The metal contained in the source electrode 206 and the drain electrode 207 is deposited in the island-shaped oxide semiconductor film 205. This prevents the transistor from deteriorating in characteristics, such as an increase in off-state current. This can prevent the problem from occurring.

[0083] In this embodiment, the island-shaped oxide semiconductor film 204 formed by patterning is The oxide is irradiated with electromagnetic waves before patterning, not after patterning. Alternatively, the semiconductor film may be irradiated with electromagnetic waves. Electromagnetic waves may be irradiated both before and after cleaning.

[0084] Next, as shown in FIG. 3D, a sputtering agent was applied to the island-shaped oxide semiconductor film 205. The oxide insulating film 210 is formed by a photolithography method. The oxide insulating film 210 formed by this method contains as little impurities as possible, such as moisture, hydrogen, and OH. Inorganic insulating films such as silicon oxide film and silicon nitride oxide film are used to block these substances from entering from the outside. The velum is used.

[0085] In this embodiment, a silicon oxide film with a thickness of 300 nm is formed as the oxide insulating film 210. The substrate temperature during film formation may be set to room temperature or higher and 300° C. or lower, and in this embodiment, it is set to 100° C. The highly purified oxide semiconductor film 205 is then subjected to sputtering or PCVD. When the oxide insulating film 210 is formed, the irradiation of the electromagnetic wave or the irradiation of the electromagnetic wave are performed in parallel. Even if oxygen vacancies are generated in the oxide semiconductor film 205 by the heat treatment, the oxide Oxygen is supplied to the oxide semiconductor film 205. In the region in contact with 10, oxygen vacancies that act as donors can be reduced and the stoichiometric ratio can be satisfied. As a result, the oxide semiconductor film 205 can be made i-type or substantially i-type. The oxide semiconductor film 211 (third oxide semiconductor film) can be obtained. This can improve the electrical characteristics and reduce variations in the electrical characteristics.

[0086] FIG. 4 shows a top view of the transistor 212 manufactured in this embodiment. 4. The transistor 212 has a gate electrode 20 1, a gate insulating film 203 on the gate electrode 201, and a source electrode on the gate insulating film 203. 206 and drain electrode 207, and the gate insulating film 203, the source electrode 206 and drain The oxide semiconductor film 211 is located over the electrode 207 .

[0087] After the oxide insulating film 210 is formed, the oxide insulating film 210 is heated in a nitrogen atmosphere or an air atmosphere (in the air). The transistor 212 may be subjected to heat treatment (preferably at 150° C. or higher and lower than 350° C.). For example, heat treatment is carried out at 250°C for 1 hour in a nitrogen atmosphere. The oxide semiconductor film 205 is heated while being in contact with the oxide insulating film 210. This heat treatment (preferably The temperature is not particularly limited after the oxide insulating film 210 is formed. In addition, other processes, such as heat treatment during resin film formation and processing to reduce the resistance of the transparent conductive film, By combining this with heat treatment, it can be performed without increasing the number of steps.

[0088] After the source electrode 206 and the drain electrode 207 are formed, the island-shaped oxide semiconductor film 2 04 by irradiating with electromagnetic waves to form an island-shaped oxide semiconductor film 205; and forming an oxide insulating film 210 in contact with the insulating film 205 without exposing the insulating film to the air. By continuously processing (continuous processing, in situ process), The oxide semiconductor film 205 to be formed is more likely to be depleted of impurities such as moisture, hydrogen, and OH. As a result, the reliability of the transistor 212 can be further improved. can.

[0089] This embodiment mode can be freely combined with other embodiment modes.

[0090] (Embodiment 3) A manufacturing process of a semiconductor device including a transistor will be described with reference to FIGS.

[0091] In FIG. 5(A), a substrate 400 having light-transmitting properties is made of Corning 7059 glass or 1 Barium borosilicate glass, such as 737 glass, and aluminoborosilicate glass Any glass substrate can be used.

[0092] Next, a conductive film is formed on the entire surface of the substrate 400, and then a first photolithography process is performed. A resist mask is formed, and unnecessary parts are removed by etching to form wiring and electrodes (gate A gate wiring including an electrode 401, a capacitance wiring 408, and a first terminal 421 are formed. At this time, etching is performed so that a tapered shape is formed at least at the end of the gate electrode 401. do.

[0093] The gate wiring including the gate electrode 401, the capacitance wiring 408, and the first terminal 421 of the terminal section are Thermally conductive materials include titanium, tantalum, tungsten, molybdenum, chromium, and neodymium. An element selected from zinc, scandium, or an alloy containing the above elements, or The film is formed of an alloy film combining the above elements, or a nitride film containing the above elements as components.

[0094] Next, as shown in FIG. 5B, the gate electrode 401, the capacitance wiring 408, and the first terminal 42 The gate insulating film 402 is formed on the entire surface of the silicon nitride film 1 by sputtering or PVC. Using method D or the like, the film thickness is set to 50 to 250 nm.

[0095] For example, a silicon oxide film is used as the gate insulating film 402 by sputtering to a thickness of 100 nm. Of course, the gate insulating film 402 is not limited to such a silicon oxide film. Other insulating films such as silicon oxynitride film, silicon nitride film, aluminum oxide film, and tantalum oxide film The insulating film may be formed as a single layer or a laminated structure made of these materials.

[0096] Next, an oxide semiconductor film 403 (In—Ga—Zn—O based non-single crystal oxide film) is formed on the gate insulating film 402. After plasma treatment, an In-Ga-Zn-O system non-single crystal film is formed without exposure to the atmosphere. By forming a crystal film, dust and moisture are prevented from being present at the interface between the gate insulating film 402 and the oxide semiconductor film 403. Here, an 8-inch diameter In, Ga, and Zn containing Oxide semiconductor target (In-Ga-Zn-O system oxide semiconductor target (In2O3 :Ga2O3:ZnO=1:1:1) to adjust the distance between the substrate 400 and the target. 170mm, pressure 0.4Pa, direct current (DC) power supply 0.5kW, oxygen only, argon only, Alternatively, the film is formed under an argon and oxygen atmosphere. When a pulsed direct current (DC) power supply is used, This is preferable because it reduces dust and makes the film thickness distribution uniform. The thickness of the crystal film is set to 5 nm to 200 nm. 03 is formed by sputtering using an In-Ga-Zn-O oxide semiconductor target. An In-Ga-Zn-O based non-single crystal film having a thickness of 50 nm is formed.

[0097] There are two types of sputtering methods: RF sputtering, which uses a high frequency power supply for the sputtering power source, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used to deposit insulating films, while the DC sputtering method is mainly used to deposit metal films. It is used for.

[0098] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of materials in the same chamber. It is also possible to simultaneously discharge and deposit the same materials.

[0099] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There are sputtering devices that use this method.

[0100] In addition, in the film formation method using the sputtering method, the target material and the sputtering gas component are mixed during film formation. Reactive sputtering is used to form thin films of these compounds by chemically reacting them with each other. There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0101] Next, as shown in FIG. 5(C), a second photolithography process is performed to form a resist mask. The oxide semiconductor film 403 is then etched. By wet etching using a liquid, unnecessary portions are removed to form an island-shaped oxide semiconductor film 40. 4 is formed so as to overlap the gate electrode 401. Note that the etching here is performed by wet etching. The method is not limited to etching, and dry etching may also be used.

[0102] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, for example For example, chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), carbon tetrachloride (CC l4) etc.) are preferred.

[0103] In addition, gases containing fluorine (fluorine-based gases, such as carbon tetrafluoride (CF4) and sulfur fluoride (SF 6), nitrogen fluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr ), oxygen (O2), and rare gases such as helium (He) and argon (Ar) Additive gases, etc. can be used.

[0104] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing) method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired processed shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were determined as follows: The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0105] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0106] In addition, after wet etching, the etching solution is washed away together with the etched material. The waste etching solution containing the removed material is purified to remove the contained material. The indium and the like contained in the oxide semiconductor film may be recycled from the waste liquid after etching. By recovering and reusing materials, resources can be used more effectively and costs can be reduced. .

[0107] The etching conditions (etchant, etchant) are adjusted to suit the material so that it can be processed into the desired shape. Adjust cooking time, temperature, etc. as appropriate.

[0108] Next, as shown in Figure 6(A), an inert gas atmosphere (nitrogen, or helium, neon, or argon) is placed in the chamber. oxide semiconductors under an atmosphere of argon, oxygen, ultra-dry air, or reduced pressure. The membrane 404 is irradiated with electromagnetic waves. Heat treatment may be performed in parallel with the irradiation of electromagnetic waves. The gas has a water content of 20 ppm or less, preferably 1 ppm or less, and more preferably 10 ppm or less. b or less. Impurities such as moisture, hydrogen, and OH are removed by irradiation with electromagnetic waves. By separating the oxide semiconductor film 405, a highly purified oxide semiconductor film 405 is formed.

[0109] For example, in a nitrogen atmosphere, a microwave of 2.45 GHz is used, and the output is 600 W. By irradiating the oxide semiconductor film 405 for about 1 minute, a highly purified island-shaped oxide semiconductor film 405 is formed. When heat treatment is performed in parallel, the melting point of Zn and other elements that make up the oxide semiconductor can be increased. A temperature at which low metals are difficult to vaporize, for example, 100°C or higher and lower than 350°C, preferably 150°C or higher The temperature is set to less than 250° C. The oxide semiconductor film is formed by performing the electromagnetic wave irradiation in parallel with the heat treatment. This allows for the efficient reduction of impurities such as moisture in the The magnetic waves are irradiated when the temperature of the substrate 400 reaches the set temperature for the heat treatment.

[0110] In addition, the cross-sectional view within the range of the dashed line C1-C2 in FIG. 6(A) and the cross-sectional view within the range of the dashed line D1-D2 are The figure shows a cross-sectional view taken along dashed line C1-C2 in the plan view shown in FIG. 8 and a cross-sectional view taken along dashed line D1-D2 in the plan view shown in FIG. This corresponds to a cross-sectional view.

[0111] Next, as shown in FIG. 6B, a conductive film 40 made of a metal material is formed on the oxide semiconductor film 405. The conductive film 406 is formed by sputtering or vacuum deposition. an element selected from chromium, tantalum, titanium, molybdenum, tungsten, or Examples of the film include an alloy containing the above elements as a component, and an alloy film made of a combination of the above elements.

[0112] When heat treatment is performed after the conductive film 406 is formed, the conductive film 406 is required to have heat resistance to withstand the heat treatment. It is preferable to provide the conductive film with the conductive material.

[0113] Next, as shown in FIG. 6(C), a third photolithography process is performed to form a resist mask. Then, unnecessary portions are removed by etching to form the source electrode 407a and the drain electrode 407b and the second terminal 420. The etching method used here is wet etching. For example, the conductive film 406 is an aluminum film. Or, when using an aluminum alloy film, wet the film with a solution of phosphoric acid, acetic acid, and nitric acid. In addition, wet etching using ammonia hydrogen peroxide can be performed. The conductive film 406 is etched to form a source electrode 407a and a drain electrode 407b. It may be done.

[0114] In this etching step, the exposed region of the oxide semiconductor film 405 is also partly etched. The oxide semiconductor film 409 has an island shape. The oxide semiconductor film 409 between the portions 7b has a small thickness.

[0115] In this third photolithography step, the source electrode 407a and the drain electrode 40 The second terminal 420 made of the same material as 7b is left at the terminal portion. The source wiring (including the source electrode 407a) is electrically connected to the source wiring.

[0116] Also, a resist having regions of multiple (for example, two types) thicknesses formed by a multi-tone mask By using a mask, the number of resist masks can be reduced, which simplifies the process and reduces costs. It is possible to achieve this.

[0117] Next, the resist mask is removed, and as shown in FIG. 7(A), the substrate is placed in an inert gas atmosphere (nitrogen, or helium, neon, argon, etc.), oxygen atmosphere, ultra-dry air atmosphere, or reduced pressure The oxide semiconductor film 409 is irradiated with electromagnetic waves under pressure. It is desirable that the concentration is 20 ppm or less, preferably 1 ppm or less, and more preferably 10 ppb or less. Heat treatment may be carried out in parallel with the irradiation of electromagnetic waves. The highly purified oxide semiconductor film 410 is formed by the elimination of impurities such as hydrogen and OH. Note that the irradiation of the electromagnetic waves and the heat treatment on the oxide semiconductor film 409 are performed to form an island-shaped oxide film. This can be carried out by referring to the description of the irradiation of the semiconductor film 404 with electromagnetic waves. do.

[0118] In one aspect of the present invention, the method can be carried out at a lower temperature without performing high-temperature heat treatment by irradiating with electromagnetic waves. Impurities such as water, hydrogen, and OH in oxide semiconductors can be desorbed in a shorter time. Therefore, by heat treatment to remove impurities such as water, hydrogen, and OH, the source electrode The metal contained in the drain electrode 407a and the drain electrode 407b is formed in the island-shaped oxide semiconductor film 410. This prevents the transistor from deteriorating in characteristics, such as an increase in off-state current. This can prevent the problem from occurring.

[0119] In this embodiment, the island-shaped oxide semiconductor film 404 formed by patterning is Electromagnetic waves are irradiated onto the surface, and a source electrode 407a and a drain electrode 407b are formed. By doing so, the island-shaped oxide semiconductor film 409 formed at the same time is also subjected to the electromagnetic wave again. However, it is not necessary to irradiate the electromagnetic waves twice. The island-shaped oxide semiconductor film 404 formed by the above-mentioned method is irradiated with electromagnetic waves. Alternatively, the source electrode 407a and the drain electrode 407b may be formed at the same time. Only the formed island-shaped oxide semiconductor film 409 may be irradiated with electromagnetic waves. Alternatively, the island-shaped oxide formed by patterning during the two irradiations of electromagnetic waves is Instead of irradiating the semiconductor film 404 with electromagnetic waves, an island-shaped oxide film is formed by patterning. The oxide semiconductor film 403 is irradiated with electromagnetic waves before the semiconductor film 404 is formed. Alternatively, in addition to the above two irradiations of electromagnetic waves, the oxide semiconductor film 403 may be irradiated with electromagnetic waves. Alternatively, the oxide semiconductor film 403 may be irradiated with electromagnetic waves. It is also possible to perform only the shooting.

[0120] In addition, the cross-sectional view within the range of the dashed line C1-C2 in FIG. 7(A) and the cross-sectional view within the range of the dashed line D1-D2 are The figure shows a cross-sectional view taken along dashed line C1-C2 in the plan view shown in FIG. 9 and a cross-sectional view taken along dashed line D1-D2 in the plan view shown in FIG. This corresponds to a cross-sectional view.

[0121] Next, as shown in FIG. 7B, the gate insulating film 402, the oxide semiconductor film 410, the source electrode An oxide insulating film 411 is formed to cover the electrode 407a and the drain electrode 407b. The film 411 is a silicon oxynitride film formed by the PCVD method. The exposed region of the oxide semiconductor film 410 and the oxide insulating film provided between the drain electrodes 407b The silicon oxynitride film 411 is provided in contact with the substrate, and thus the substrate is protected from electromagnetic radiation or electric current. Oxygen vacancies are generated in the oxide semiconductor film 410 by the heat treatment performed in parallel with the irradiation of the magnetic waves. Even if the oxide semiconductor film 410 is heated, oxygen is supplied to the oxide semiconductor film 410. In the region of the insulating film 410 in contact with the oxide insulating film 411, oxygen vacancies serving as donors are reduced, and the oxide insulating film 410 is As a result, the oxide semiconductor film 410 can be made i-type or substantially i-type. The oxide semiconductor film 412 can be formed by making the oxide semiconductor film i-type. The electrical characteristics can be improved and the variations in the electrical characteristics can be reduced.

[0122] Next, after the oxide insulating film 411 is formed, heat treatment may be performed. The heating process may be carried out in an air or nitrogen atmosphere at a temperature of 150°C or higher and lower than 350°C. When the oxide semiconductor film 412 is heated while being in contact with the oxide insulating film 411, Furthermore, the resistance of the oxide semiconductor film 412 can be increased, thereby improving the electrical characteristics of the transistor. This heat treatment (preferably at 150°C) can reduce the variation in electrical properties. The temperature at which the oxide insulating film 411 is heated is not particularly limited as long as it is heated after the oxide insulating film 411 is formed. For example, the heat treatment may be performed during the formation of a resin film or to reduce the resistance of a transparent conductive film. This allows the process to be carried out without increasing the number of steps.

[0123] Through the above steps, the transistor 413 can be manufactured.

[0124] Next, a fourth photolithography step is performed to form a resist mask, and an oxide insulating film 4 The contact holes are formed by etching the gate insulating film 402 and the drain electrode. A part of the pole 407b, a part of the first terminal 421, and a part of the second terminal 420 are exposed. After removing the resist mask, a transparent conductive film is formed. , indium oxide (In2O3) and indium oxide tin oxide alloy (In2O3-SnO2 ITO is formed using a sputtering method or a vacuum deposition method. The etching process for materials is carried out using a hydrochloric acid-based solution. However, etching ITO in particular leaves residue. Residue is easily generated, so indium oxide zinc oxide alloy is used to improve etching processability. (In2O3-ZnO) may also be used. In the case where the treatment is performed, the resistance of the oxide semiconductor film 412 is increased, and the electrical characteristics of the transistor are improved. This can also serve as a heat treatment that reduces variations in electrical characteristics.

[0125] Next, a fifth photolithography step is performed to form a resist mask, and then etching is performed. The unnecessary portion is removed to form the pixel electrode 414 connected to the drain electrode 407b and the first terminal The transparent conductive film 415 connected to the first terminal 421 and the transparent conductive film 420 connected to the second terminal 420 are 16 and form.

[0126] The transparent conductive films 415 and 416 serve as electrodes or wiring used for connection with the FPC. The transparent conductive film 415 formed on the terminal 421 is a contact that functions as an input terminal of the gate wiring. The transparent conductive film 416 formed on the second terminal 420 serves as a terminal electrode for source wiring. This is a terminal electrode for connection that functions as an input terminal for a line.

[0127] In this fifth photolithography step, the gate insulating film 402 and the oxide insulating film 41 A storage capacitor is formed by the capacitor wiring 408 and the pixel electrode 414, with the dielectric 1 serving as the dielectric.

[0128] The cross-sectional view at the stage where the resist mask has been removed is shown in FIG. The cross-sectional view within the range of C1-C2 and the cross-sectional view within the range of the dashed line D1-D2 are the planes shown in FIG. This corresponds to the cross-sectional view taken along dashed lines C1-C2 and D1-D2 in the drawing.

[0129] In this way, five photolithography processes were performed using five photomasks to create the bottom A pixel transistor having a transistor 413 which is a gate-type staggered transistor. Then, these are connected to the matrix corresponding to each pixel. By arranging the elements in a pixel-like fashion, an active matrix display device can be created. For convenience, in this specification, such a substrate is referred to as an actuator. This is called an active matrix substrate.

[0130] When manufacturing an active matrix liquid crystal display device, an active matrix substrate a liquid crystal layer is provided between the active matrix substrate and an opposing substrate on which an opposing electrode is provided; The opposing substrate is fixed.

[0131] In addition, the capacitance wiring is not provided, and the pixel electrode is connected to the gate wiring of the adjacent pixel, the oxide insulating film, and the gate A storage capacitor may be formed by stacking the layers with an insulating film interposed therebetween.

[0132] In an active matrix liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected A voltage is applied between the pixel electrode and the counter electrode corresponding to the pixel electrode, The electric field generated between the electrode and the counter electrode causes optical modulation of the liquid crystal layer, and this optical modulation is displayed. It is perceived by the observer as a pattern.

[0133] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, which can cause afterimages. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0134] Also, the frame frequency should be 1.5 times, preferably 2 times, the normal frame frequency (60 Hz). There is also a driving technology called double speed driving that improves video characteristics by exceeding the above speed.

[0135] In addition, in order to improve the video characteristics of the LCD display, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame period. Therefore, three or more types of LEDs may be used, or white-emitting LEDs may be used. Since multiple LEDs can be controlled, the LE can be switched in accordance with the timing of the optical modulation of the liquid crystal layer. This driving technology can also synchronize the timing of the LEDs to be turned off. This is especially useful when displaying images with a large proportion of black areas occupying the entire screen. This can reduce power consumption.

[0136] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. can be improved compared to the past.

[0137] The n-channel transistor disclosed in this specification has an oxide semiconductor film as a channel formation region. These drive technologies can be combined due to their good dynamic characteristics. do.

[0138] When manufacturing a light-emitting display device, a partition wall using an organic resin film is provided between each organic light-emitting element. In this case, the organic resin film is subjected to a heat treatment, which may result in an improvement in the electrical characteristics of the transistor. This can also serve as a heat treatment that reduces variations in electrical characteristics.

[0139] By forming a transistor using an oxide semiconductor, manufacturing costs can be reduced. In particular, the reduction of impurities such as moisture, hydrogen, and OH by irradiating with electromagnetic waves can To increase the purity of the semiconductor film, special sputtering equipment and ultra-low dew point deposition chambers are used. Even without using a high-purity oxide semiconductor target, a transistor with good electrical properties and high reliability can be manufactured. A semiconductor device having a transistor can be manufactured.

[0140] The semiconductor film in the channel formation region is a high resistance region, so the electrical characteristics of the transistor are stable. Therefore, the electrical characteristics are excellent and the reliability is high. This makes it possible to provide a semiconductor device having good transistors.

[0141] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0142] (Fourth embodiment) In this embodiment, the transistor 112 described in Embodiment 1 and the transistor 113 described in Embodiment 2 are The transistor 212 is a transistor having a different structure. The same parts as those in the first embodiment or parts having similar functions and steps are described below. Since this can be done in the same way as in the first embodiment, repeated explanation will be omitted.

[0143] A method for manufacturing a semiconductor device will be described with reference to FIGS.

[0144] As shown in FIG. 11(A), a gate electrode 301 is provided on a substrate 300 having an insulating surface. An insulating film serving as a base film may be provided between the substrate 300 and the gate electrode 301. The material and structure of 301 are the same as those of the gate electrode 101 shown in the first embodiment. The underlayer is an insulating film that prevents diffusion of impurity elements from the substrate 300. Specifically, a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, or a silicon oxynitride film One of the films may be used as a single layer, or a plurality of selected films may be laminated.

[0145] Next, a gate insulating film 303 is formed on the gate electrode 301. The gate insulating film 303 is Using plasma CVD or sputtering, silicon oxide film, silicon nitride film, oxynitride film, etc. A silicon film or a silicon nitride oxide film can be formed as a single layer or a laminated layer. Silane (e.g., monosilane), oxygen, and nitrogen are used as gases to form the film by plasma CVD. Instead, a silicon oxynitride film may be formed.

[0146] Next, an oxide semiconductor film is formed on the gate insulating film 303. The oxide semiconductor film is processed (patterned) into the desired shape by etching or other methods, and island-shaped oxide semiconductors are formed. A film 304 (first oxide semiconductor film) is formed.

[0147] The oxide semiconductor film for forming the channel formation region may be formed using the semiconductor layer described in Embodiment 1. An oxide material having conductive properties may be used. under an atmosphere of argon, oxygen, or a rare gas (e.g., argon) and oxygen The oxide semiconductor film can be formed by a sputtering method. Before this, argon gas is introduced to generate plasma and reverse sputtering is performed. It is preferable to remove any dust adhering to the surface of the film 303 .

[0148] Next, as shown in FIG. 11(B), an inert gas atmosphere (nitrogen, helium, neon) In an atmosphere of oxygen, ultra-dry air, or reduced pressure, The oxide semiconductor film 304 is irradiated with electromagnetic waves such as microwaves or high frequency waves, thereby The island-shaped oxide semiconductor film 305 (second oxide The gas contains 20 ppm or less of water, preferably 1 ppm or less of water. It is desirable that the concentration is 10 ppb or less. The island-shaped oxide semiconductor film 304 may be subjected to heat treatment.

[0149] The irradiation of the electromagnetic waves and the heat treatment to the oxide semiconductor film 304 are the same as those in Embodiment 1. For example, the description of the irradiation of the oxide semiconductor film 104 with electromagnetic waves and the heat treatment shown in That's good.

[0150] The channel formation region has a highly purified oxide semiconductor that has been desorbed with moisture, hydrogen, OH, etc. The transistors that use this method are less susceptible to the degradation of characteristics caused by impurities, such as fluctuations in threshold voltage. This allows for high reliability.

[0151] In this embodiment, the island-shaped oxide semiconductor film 304 formed by patterning is The oxide is irradiated with electromagnetic waves before patterning, not after patterning. Alternatively, the semiconductor film may be irradiated with electromagnetic waves. Electromagnetic waves may be irradiated both before and after cleaning.

[0152] Next, a portion of the island-shaped oxide semiconductor film 305 that overlaps with a portion that will later become a channel formation region is In this way, the channel protective film 313 is formed over the island-shaped oxide semiconductor film 305. By providing the protective film 313, the portion of the oxide semiconductor film 305 that will become a channel formation region is Damage to the surface during subsequent processes (due to plasma or etching agents during etching) This can prevent film loss and improve the reliability of the transistor. do.

[0153] The channel protection film 313 is made of an inorganic material containing oxygen (silicon oxide, silicon oxynitride, silicon nitride oxide, etc.). The channel protection film 313 can be formed by plasma CVD or thermal CVD. The channel protection film can be formed by a vapor deposition method such as a sputtering method. After the film is formed, the shape of 313 is processed by etching. A base film is formed and then etched using a photolithography mask to create a chalcogenide film. A protective film 313 is formed on the substrate.

[0154] After the irradiation of the electromagnetic waves, the film becomes the channel protection film 313 continuously without being exposed to the air. It is also possible to form an oxide insulating film. The interface is contaminated by atmospheric components such as water and hydrocarbons, and impurity elements floating in the air. Since each layer interface can be formed without contamination, variations in transistor characteristics can be reduced. can be reduced.

[0155] In addition, a sputtering method, a PCVD method, or the like is applied to the highly purified oxide semiconductor film 305. When the channel protective film 313 made of an oxide insulating film is formed, the channel protective film 313 is irradiated with electromagnetic waves or The heat treatment performed in parallel with the irradiation of the microwaves generates oxygen vacancies in the oxide semiconductor film 305. Even if oxygen is present, oxygen is provided to the oxide semiconductor film 305. In the region of contact with the channel protective film 313 of 05, oxygen vacancies that act as donors are reduced, and As a result, the oxide semiconductor film 305 can be made i-type or substantially i-type. The oxide semiconductor film 311 (third oxide semiconductor film) is obtained by making the oxide semiconductor film 311 i-type. This makes it possible to improve the electrical characteristics of the transistor and reduce variations in the electrical characteristics. can.

[0156] Next, a conductive film is formed over the island-shaped oxide semiconductor film 311 and the channel protective film 313. Then, the conductive film is processed (patterned) into a desired shape by etching or the like, and the result is shown in FIG. As shown in FIG. 1(C), a source electrode 306 and a drain electrode 307 are formed. The material of the film is the same as that of the source electrode 106 and the drain electrode 107 in the first embodiment. This can be determined by referring to the material of the conductive film that is patterned when it is formed.

[0157] Next, as shown in FIG. 11D, a spatula was formed so as to be in contact with the island-shaped oxide semiconductor film 311. The insulating film 310 is formed by a deposition method. The insulating film 310 to be formed contains as little impurities as possible, such as moisture, hydrogen, and OH, and these impurities are not present in the outside. It uses inorganic insulating films such as silicon oxide films and silicon nitride oxide films to block the penetration of do.

[0158] In this embodiment, a silicon oxide film having a thickness of 300 nm is formed as the insulating film 310. The substrate temperature may be set to a temperature between room temperature and 300° C., and is set to 100° C. in this embodiment.

[0159] FIG. 12 shows a top view of a transistor 312 manufactured in this embodiment. This corresponds to the cross section taken along the dashed line B1-B2 in FIG. The electrode 301, the gate insulating film 303 on the gate electrode 301, and the oxide film on the gate insulating film 303 an oxide semiconductor film 311, a channel protection film 313 on the oxide semiconductor film 311, and an oxide semiconductor The source electrode 306 and the drain electrode 307 are formed on the film 311 and the channel protection film 313. do.

[0160] After forming the insulating film 310, the insulating film 310 is subjected to a test in a nitrogen atmosphere or an air atmosphere (in the air). The transistor 312 may be subjected to a heat treatment (preferably at a temperature of 150°C or higher but lower than 350°C). For example, heat treatment is carried out at 250°C for 1 hour in a nitrogen atmosphere. The semiconductor film 311 is heated in contact with the channel protection film 313, This heat treatment (preferably The temperature (150° C. or higher and lower than 350° C.) is not particularly limited as long as it is after the channel protection film 313 is formed. Other processes, such as heat treatment during resin film formation and heating to reduce the resistance of the transparent conductive film, By combining this with the treatment, the number of steps can be reduced.

[0161] Note that the steps of forming the island-shaped oxide semiconductor film 304 and forming an electrode on the island-shaped oxide semiconductor film 304 are the same as those of the steps of forming the island-shaped oxide semiconductor film 304. A step of forming an island-shaped oxide semiconductor film 305 by irradiating a magnetic wave and a step of forming an oxide semiconductor film 311 The process of forming the channel protection film 313 so as to be in contact with the substrate is a process of forming the channel protection film 313 continuously without exposing the substrate to the air. By continuously processing (continuous processing, in situ process), the final formed impurities such as moisture, hydrogen, and OH contained in the oxide semiconductor film 311 are further reduced. As a result, the reliability of the transistor 312 can be further improved. .

[0162] This embodiment mode can be freely combined with other embodiment modes.

[0163] (Embodiment 5) In this embodiment mode, the semiconductor device can be formed by using the manufacturing method of the present invention. Also, the configuration of a transistor that is partially different from that of the first to fourth embodiments will be described. do.

[0164] First, the structure of the transistor shown in FIG. 13A and a manufacturing method thereof will be described.

[0165] In the first embodiment, after the island-shaped oxide semiconductor film 105 is formed, the oxide semiconductor film 10 5, the source and drain regions of the transistor (n + layer, also called buffer layer) a second oxide semiconductor film to be used as a conductive film; and a conductive film formed over the second oxide semiconductor film. .

[0166] Next, the second oxide semiconductor film and the conductive film are selectively etched by an etching step. The source region 120a and the drain region 120b (n + Layer, back The source electrode 121a and the drain electrode 121b are formed from a conductive film. The source region 120a and the drain region 120b are made of In—Ga—Zn—O based non-single crystal. Note that the island-shaped oxide semiconductor film 105 is formed into a source The exposed region that does not overlap with the region 120a and the drain region 120b is partially etched. This results in an oxide semiconductor film having a groove (depression).

[0167] Next, a silicon oxide film is formed by a sputtering method or a PCVD method in contact with the oxide semiconductor film having the grooves. The oxide insulating film 123 is formed in contact with the oxide semiconductor film having the groove. The oxide insulating film 123 is resistant to moisture, hydrogen ions, and OH ions. - It contains as few impurities as possible, An inorganic insulating film is used to block these substances from entering from the outside, specifically a silicon oxide film. Alternatively, a silicon nitride oxide film is used.

[0168] An oxide insulating film is formed by sputtering or PCVD in contact with the oxide semiconductor film having the groove. When the film 123 is formed, it is irradiated with electromagnetic waves or is heated in parallel with the irradiation of electromagnetic waves. Therefore, even if oxygen vacancies occur in the oxide semiconductor film having the grooves, the oxide semiconductor Therefore, the region of the oxide semiconductor film in contact with the oxide insulating film 123 In this case, the oxygen vacancies that act as donors can be reduced and the stoichiometric ratio can be satisfied. The oxide semiconductor film having the grooves is made to be i-type or substantially i-type. The compound semiconductor film 122 can be obtained, and the electrical characteristics are improved as shown in FIG. 13(A). A transistor capable of reducing variations in electrical characteristics can be obtained.

[0169] In addition, a source region 120a is formed between the oxide semiconductor film 122 and the source electrode 121a. The drain region 120b is located between the semiconductor film 122 and the drain electrode 121b. The region 120a and the drain region 120b are formed using an oxide semiconductor film exhibiting n-type conductivity. .

[0170] Also, a second region 120a and a second region 120b are used as the source region 120a and the drain region 120b of the transistor. The oxide semiconductor film is thinner than the first oxide semiconductor film used as a channel formation region. It is preferable that the material has a low resistance and a higher electrical conductivity (electrical conductivity).

[0171] The first oxide semiconductor film used as a channel formation region has an amorphous structure. The second oxide semiconductor film used as the gate region 120a and the drain region 120b has an amorphous structure. The source region 120a and the drain region 120b may contain crystal grains (nanocrystals). The crystal grains (nanocrystals) in the second oxide semiconductor film used as the region 120b have a diameter of 1 nm to 10 nm, typically about 2 nm to 4 nm.

[0172] After the oxide insulating film 123 is formed, the oxide insulating film 123 is heated in a nitrogen atmosphere or an air atmosphere (in the air). The transistor may then be subjected to heat treatment (preferably at a temperature of 150°C or higher and lower than 350°C). For example, heat treatment is carried out at 250°C for 1 hour in a nitrogen atmosphere. The semiconductor film 122 is heated while being in contact with the oxide insulating film 123, and the transistor This can reduce variations in the electrical characteristics of the capacitors.

[0173] Next, the structure of the transistor shown in FIG. 13B and a manufacturing method thereof will be described.

[0174] In the first embodiment, after forming an oxide semiconductor film before patterning, On the film, the source and drain regions of the transistor (n + layer, also called buffer layer) The second oxide semiconductor film is formed as an In-Ga- A Zn-O based non-single crystal film is used.

[0175] Next, the oxide semiconductor film before patterning and the second oxide semiconductor film are etched. A first island-shaped oxide semiconductor film that will become a channel formation region from the oxide semiconductor film before patterning A second island-shaped oxide semiconductor film is formed from the first oxide semiconductor film and the second oxide semiconductor film.

[0176] Next, the first island-shaped oxide semiconductor film and the second island-shaped oxide semiconductor film are irradiated with electromagnetic waves. Alternatively, by performing heat treatment in combination with the electromagnetic wave irradiation, the first island-shaped oxide semiconductor film and the second island-shaped oxide semiconductor film can be formed. Impurities such as moisture, hydrogen, and OH are released from the island-shaped oxide semiconductor film 2.

[0177] Next, a conductive film is formed over the first island-shaped oxide semiconductor film and the second island-shaped oxide semiconductor film. The conductive film is selectively etched. By the etching, a second island-shaped oxide semiconductor is formed. The conductive film is connected to the source region 130a and the drain region 130b (n + layer, also called buffer layer ), the source electrode 131a and the drain electrode 131b are formed from a conductive film. By the etching process, the first island-shaped oxide semiconductor film is formed into a source region 130a and a drain region 130b. The exposed area that does not overlap with the area 130b is partially etched to form a groove (recess). The oxide semiconductor film is a thin film.

[0178] Next, a silicon oxide film is formed by a sputtering method or a PCVD method in contact with the oxide semiconductor film having the grooves. The oxide insulating film 133 is formed in contact with the oxide semiconductor film having the groove. The oxide insulating film 133 contains as little impurities as possible, such as moisture, hydrogen, and OH, and these impurities are not absorbed from the outside. An inorganic insulating film is used to block the penetration of oxygen from the inside of the material. Specifically, a silicon oxide film or an oxide nitride film is used. A silicon dioxide film is used.

[0179] An oxide insulating film is formed by sputtering or PCVD in contact with the oxide semiconductor film having the groove. When the film 133 is formed, it is irradiated with electromagnetic waves or is heated in parallel with the irradiation of electromagnetic waves. Therefore, even if oxygen vacancies occur in the oxide semiconductor film having the grooves, the oxide semiconductor Therefore, the region of the oxide semiconductor film in contact with the oxide insulating film 133 In this case, the oxygen vacancies that act as donors can be reduced and the stoichiometric ratio can be satisfied. The oxide semiconductor film having the grooves is made to be i-type or substantially i-type. The compound semiconductor film 132 can be obtained, and the electrical characteristics are improved as shown in FIG. 13(B). A transistor capable of reducing variations in electrical characteristics can be obtained.

[0180] A source region 130a is formed between the oxide semiconductor film 132 and the source electrode 131a. The drain region 130b is located between the semiconductor film 132 and the drain electrode 131b. The region 130a and the drain region 130b are formed using an oxide semiconductor film exhibiting n-type conductivity. .

[0181] Also, a second region 130a and a second region 130b are used as the source region 130a and the drain region 130b of the transistor. The oxide semiconductor film is thinner than the first oxide semiconductor film used as a channel formation region. It is preferable that the material has a low resistance and a higher electrical conductivity (electrical conductivity).

[0182] The oxide semiconductor film used as the channel formation region has an amorphous structure. The second oxide semiconductor film used as the gate electrode 130a and drain region 130b is formed in an amorphous structure. The source region 130a and the drain region 130b may contain nanocrystals. The crystal grains (nanocrystals) in the second oxide semiconductor film used as 30b have a diameter of 1 nm to 10 nm, typically about 2 nm to 4 nm.

[0183] After the oxide insulating film 133 is formed, the oxide insulating film 133 is heated in a nitrogen atmosphere or an air atmosphere (in the air). The transistor may then be subjected to heat treatment (preferably at a temperature of 150°C or higher and lower than 350°C). For example, heat treatment is carried out at 250°C for 1 hour in a nitrogen atmosphere. The semiconductor film 132 is heated while being in contact with the oxide insulating film 133, and the transistor This can reduce variations in the electrical characteristics of the capacitors.

[0184] The structure of the transistor shown in FIG. 13C and a manufacturing method thereof will be described.

[0185] In Embodiment 1, after the island-shaped oxide semiconductor film 105 is formed, The oxide semiconductor island is formed so as to overlap with a portion of the film 105 that will later become a channel formation region. A channel protection film 145 is formed on the film 105. The channel protection film 145 contains oxygen. Inorganic materials (silicon oxide, silicon oxynitride, silicon nitride oxide, etc.) can be used. The oxide insulating film 105 is formed by sputtering or PCVD. When the channel protective film 145 is formed, the channel protective film 145 is irradiated with electromagnetic waves or in parallel with the irradiation of electromagnetic waves. Even if oxygen vacancies are generated in the oxide semiconductor film 105 by the heat treatment, Therefore, oxygen is supplied to the oxide semiconductor film 105. In the region in contact with the channel protection film 145, oxygen vacancies that act as donors are reduced, and the stoichiometric ratio As a result, the oxide semiconductor film 105 can be made i-type or substantially i-type. The oxide semiconductor film 142 can be obtained by the above process, and the electrical characteristics of the transistor can be improved. This can improve the electrical properties and reduce the variations in electrical characteristics.

[0186] Next, a source region and a drain region ( n + a second oxide semiconductor film to be used as a second oxide semiconductor layer (also referred to as a second oxide semiconductor layer or a buffer layer) and A conductive film is formed on the compound semiconductor film.

[0187] Next, the second oxide semiconductor film and the conductive film are selectively etched by an etching step. The source region 140a and the drain region 140b (n + Layer, back The source electrode 141a and the drain electrode 141b are formed from a conductive film. The source region 140a and the drain region 140b are made of In—Ga—Zn—O based non-single crystal. The source region 140a and the drain region 140b are formed of a thin film. By forming the drain electrode 141b, a transistor as shown in FIG. 13(C) is obtained. Completed.

[0188] Next, the source region 140a or the drain region 140b is formed by sputtering or PCVD. 40b, the source electrode 141a or the drain electrode 141b, and the channel protective film 145. An insulating film 143 is formed to cover the surface. The insulating film 143 is formed to remove impurities such as moisture, hydrogen, and OH. It contains as little as possible of these compounds and uses an inorganic insulating film that blocks their penetration from the outside. A silicon oxide film or a silicon nitride oxide film is used for the insulating film.

[0189] In addition, a source region 140a is formed between the oxide semiconductor film 142 and the source electrode 141a. The drain region 140b is located between the semiconductor film 142 and the drain electrode 141b. The region 140a and the drain region 140b are formed using an oxide semiconductor film exhibiting n-type conductivity. .

[0190] Also, a second region 140a and a second region 140b are used as the source region 140a and the drain region 140b of the transistor. The oxide semiconductor film is thinner than the first oxide semiconductor film used as a channel formation region. It is preferable that the material has a low resistance and a higher electrical conductivity (electrical conductivity).

[0191] The first oxide semiconductor film used as a channel formation region has an amorphous structure. The second oxide semiconductor film used as the gate region 140a and the drain region 140b has an amorphous structure. The source region 140a and the drain region 140b may contain crystal grains (nanocrystals). The crystal grains (nanocrystals) in the second oxide semiconductor film used as the region 140b have a diameter of 1 nm to 10 nm, typically about 2 nm to 4 nm.

[0192] After the insulating film 143 is formed, the insulating film 143 is subjected to a test under a nitrogen atmosphere or an air atmosphere (in the air). The transistor may be subjected to a heat treatment (preferably at 150°C or higher and lower than 350°C). For example, Heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. The film 142 is heated in contact with the channel protection film 145, Variations in electrical characteristics can be reduced.

[0193] This embodiment mode can be freely combined with other embodiment modes.

[0194] (Sixth embodiment) In this embodiment, a transistor according to one embodiment of the present invention is used as a switching element. The configuration of the liquid crystal display device will now be described.

[0195] 14 shows a cross-sectional view of a liquid crystal display device according to the present invention as an example. 1401 is a gate electrode 1402 formed on an insulating surface and a gate electrode 1402 covering the gate electrode 1402. The gate insulating film 1403 is formed as shown in FIG. The oxide semiconductor film 1404 is formed so as to overlap the electrode 1402. A pair of semiconductor films 1405 functioning as source and drain regions formed on the substrate 1404 and a pair of semiconductor films 1405, which function as a source electrode and a drain electrode. The insulating film 1407 includes a pair of conductive films 1406 and an oxide insulating film 1407. , which is in contact with at least the oxide semiconductor film 1404 and has a gate electrode 1402 and a gate insulating film 1403. The oxide semiconductor film 1403, the oxide semiconductor film 1404, the pair of semiconductor films 1405, and the pair of conductive films 1406 are 406.

[0196] An insulating film 1408 is formed over the oxide insulating film 1407. An opening is provided in a part of the insulating film 1408, and the conductive film 1406 is A pixel electrode 1410 is formed so as to contact one of them.

[0197] Moreover, on the insulating film 1408, a spacer 141 for controlling the cell gap of the liquid crystal element is formed. The spacer 1417 is formed by etching the insulating film into a desired shape. However, by dispersing filler on the insulating film 1408, the cell gap can be reduced. The loop may be controlled.

[0198] An alignment film 1411 is formed on the pixel electrode 1410. For example, the pixel electrode 14 can be formed by rubbing the insulating film. A counter electrode 1413 is provided at a position facing the pixel 10. An alignment film 1414 is formed on the side closer to the electrode 1410. The liquid crystal 1415 is disposed in the area surrounded by the sealant 1416 between the counter electrode 1413 and the liquid crystal 1415. The sealing material 1416 may contain filler.

[0199] The pixel electrode 1410 and the counter electrode 1413 are made of, for example, indium tin oxide (ITSO), oxide Indium tin (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), gallium Transparent conductive materials such as zinc oxide doped with sulphur (GZO) can be used. In this embodiment, a conductive film that transmits light is used for the pixel electrode 1410 and the counter electrode 1413. An example of fabricating a transmissive liquid crystal element will be shown, but the present invention is not limited to this configuration. The liquid crystal display device according to the embodiment may be a semi-transmissive type or a reflective type.

[0200] Color filters and shielding films (black matrices) to prevent disclination Any of these may be provided in the liquid crystal display device shown in FIG.

[0201] In this embodiment, the liquid crystal display device is a TN (Twisted Nematic) ) type, but VA (Vertical Alignment) type, OCB (opti cally compensated Birefringence) type, IPS(In The transistor of the present invention can also be applied to other liquid crystal display devices such as a two-plane switching type. A transistor can be used.

[0202] A liquid crystal display device according to one embodiment of the present invention has high mobility, high on-state current, and high reliability. The use of small transistors provides high contrast and visibility.

[0203] This embodiment mode can be freely combined with other embodiment modes.

[0204] (Embodiment 7) In this embodiment, a structure of a light-emitting device in which a transistor according to one embodiment of the present invention is used in a pixel is described. In this embodiment, a transistor for driving a light-emitting element is an n-type The cross-sectional structure of the pixel in this case will be described with reference to FIG. The case where the first electrode is a cathode and the second electrode is an anode will be described. The second electrode may be a cathode.

[0205] Note that in FIG. 15, a transistor having the structure described in Embodiment 1 is used in a pixel. The light emitting device having the structure shown in the other embodiments will be described as an example. The transistor can also be used in a pixel of a light-emitting device.

[0206] In FIG. 15A, a transistor 6031 is an n-type transistor, and light emitted from a light-emitting element 6033 is A cross-sectional view of the pixel when taken out from the first electrode 6034 side is shown. The insulating film 6037 is covered with a partition wall 6038 having an opening. The first electrode 6034 is partially exposed at the opening of the partition wall 6038. In the opening, a first electrode 6034, an electroluminescent layer 6035, and a second electrode 6036 are arranged in this order. are stacked on top of each other.

[0207] The first electrode 6034 is formed of a material or a film thickness that transmits light and has a small work function. The conductive material can be formed of a metal, an alloy, an electrically conductive compound, or a mixture thereof. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr metals, alloys containing these (Mg:Ag, Al:Li, Mg:In, etc.), and their compounds In addition to compounds (calcium fluoride, calcium nitride), rare earth metals such as Yb and Er can also be used. When an electron injection layer is provided, other conductive layers such as aluminum may be used. The first electrode 6034 is formed to a thickness that allows light to pass through (preferably 5 Furthermore, the conductive layer is formed to a thickness of about 1000 nm to 3000 nm. A conductive layer having light-transmitting properties is formed by using a conductive oxide material so as to be in contact with the upper or lower surface of the substrate. In this case, the sheet resistance of the first electrode 6034 may be reduced. Oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), gallium-added Only conductive layers using other transparent oxide conductive materials such as zinc oxide (GZO) are used. It is also possible to use ITO and indium tin oxide containing silicon oxide (hereinafter referred to as ITS O) or indium oxide containing silicon oxide, and further 2 to 20% zinc oxide (Zn When a transparent oxide conductive material is used, the electroluminescent layer 6 It is desirable to provide an electron injection layer in 035.

[0208] The second electrode 6036 is formed of a material and a film thickness that reflects or blocks light. It is made of a material suitable for use as an anode, such as titanium nitride, zirconium nitride, One or more of titanium, tungsten, nickel, platinum, chromium, silver, aluminum, etc. In addition to the single layer film, titanium nitride and aluminum-based films are also available. The three-layer structure of the film, the film mainly composed of aluminum, and the titanium nitride film is formed as the second electrode 6036. It can be used for.

[0209] The electroluminescent layer 6035 is composed of one or more layers. In this case, these layers are classified into a hole injection layer, a hole transport layer, a light emitting layer, and a It can be classified into an electron transport layer, an electron injection layer, etc. The electroluminescent layer 6035 is a light-emitting layer as well as When the layer has any one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, From the first electrode 6034, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer are formed in this order. The boundaries between the layers do not necessarily need to be clear, and the layers that make up each other may be stacked one on top of the other. In some cases, the materials are mixed together and the interface is unclear. Organic materials can be used. It is possible to use any material of molecular type. The number of repeats (degree of polymerization) corresponds to a low polymer of about 2 to 20. The distinction between these is not necessarily strict, and these are the types in which hole transport properties (hole mobility) are particularly important. For convenience, the hole injection layer is the layer that contacts the anode, and the The layer in contact with the hole injection layer is called the hole transport layer to distinguish it from the electron transport layer and electron injection layer. Similarly, the layer in contact with the cathode is called the electron injection layer, and the layer in contact with the electron injection layer is called the electron transport layer. The light-emitting layer may also function as an electron transport layer, and is therefore also called a light-emitting electron transport layer.

[0210] In the case of the pixel shown in FIG. 15(A), light emitted from the light emitting element 6033 is indicated by a white arrow. As shown, it can be taken out from the first electrode 6034 side.

[0211] Next, in FIG. 15B, a transistor 6041 is an n-type transistor, and a light emitting element 6043 emits light. 10 is a cross-sectional view of a pixel in the case where light is extracted from the second electrode 6046 side. 41 is covered with an insulating film 6047, and a partition wall 604 having an opening is formed on the insulating film 6047. 8 is formed. The first electrode 6044 is partially exposed at the opening of the partition wall 6048. In the opening, a first electrode 6044, an electroluminescent layer 6045, and a second electrode 6046 are disposed. are stacked in order.

[0212] The first electrode 6044 is formed of a material and a film thickness that reflects or blocks light and has a workability. Formation of low-function metals, alloys, electrically conductive compounds, and mixtures thereof Specifically, alkali metals such as Li and Cs, and aluminum metals such as Mg, Ca, and Sr can be used. Potassium earth metals and alloys containing them (Mg:Ag, Al:Li, Mg:In, etc.), and In addition to these compounds (calcium fluoride, calcium nitride), rare earth metals such as Yb and Er When an electron injection layer is provided, other conductive layers such as aluminum can be used. It is also possible to use

[0213] The second electrode 6046 is formed of a material or a film thickness that transmits light and also serves as an anode. The substrate is made of a material suitable for use. For example, indium tin oxide (ITO), zinc oxide ( ZnO), indium zinc oxide (IZO), gallium-doped zinc oxide (GZO), etc. Other transparent conductive oxide materials can be used for the second electrode 6046. Indium tin oxide containing TO and silicon oxide (hereinafter referred to as ITSO), and silicon oxide containing The second layer is made of soldered indium oxide mixed with 2 to 20% zinc oxide (ZnO). It may be used for the electrode 6046. In addition to the above-mentioned transparent oxide conductive materials, for example, titanium nitride , zirconium nitride, titanium, tungsten, nickel, platinum, chromium, silver, aluminum In addition to single layer films consisting of one or more of titanium nitride and aluminum, a three-layer structure consisting of a titanium nitride film, a film mainly composed of aluminum, and a titanium nitride film, etc. However, a material other than the conductive transparent oxide material can be used for the second electrode 6046. When used, the second electrode is formed to a thickness that allows light to pass through (preferably, about 5 nm to 30 nm). Form pole 6046.

[0214] The electroluminescent layer 6045 can be formed in the same manner as the electroluminescent layer 6035 in FIG. 15(A). do.

[0215] In the case of the pixel shown in FIG. 15B, light emitted from the light emitting element 6043 is indicated by a white arrow. As shown, it can be taken out from the second electrode 6046 side.

[0216] Next, in FIG. 15(C), a transistor 6051 is an n-type transistor, and a light emitting element 6053 emits light. 6 is a cross-sectional view of a pixel when light is extracted from the first electrode 6054 side and the second electrode 6056 side. The transistor 6051 is covered with an insulating film 6057. A partition wall 6058 having an opening is formed. The first electrode The first electrode 6054 is partially exposed through the opening, and the electroluminescent layer 60 55 and a second electrode 6056 are laminated in this order.

[0217] The first electrode 6054 can be formed in the same manner as the first electrode 6034 in FIG. 15(A). The second electrode 6056 is formed in the same manner as the second electrode 6046 in FIG. 15(B). The electroluminescent layer 6055 can be formed in the same manner as the electroluminescent layer 6035 in FIG. It is possible.

[0218] In the case of the pixel shown in FIG. 15C, light emitted from the light emitting element 6053 is indicated by a white arrow. As shown in FIG. 6, the light can be extracted from the first electrode 6054 side and the second electrode 6056 side. .

[0219] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0220] (Embodiment 8) In this embodiment, at least a part of the driver circuit and a transistor disposed in the pixel portion are formed on the same substrate. An example of fabricating a resistor will be described below.

[0221] The transistor disposed in the pixel portion has the structure shown in the other embodiments. Since the transistors shown in other embodiments are all n-channel transistors, Among the driver circuits, a part of the driver circuit can be configured with an n-channel transistor. The transistors in the pixel portion are formed on the same substrate.

[0222] FIG. 16A shows an example of a block diagram of an active matrix semiconductor display device. A pixel portion 5301, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, a first scanning line driver circuit 5304, a second scanning line driver circuit 5305, a second scanning line driver circuit 5306, a second scanning line driver circuit 5307, a second scanning line driver circuit 5308, a second scanning line driver circuit 5309, a second scanning line driver circuit 5310, a second scanning line driver circuit 531 The pixel portion 5301 includes a scanning line driver circuit 5303 and a signal line driver circuit 5304. The signal lines are arranged extending from the signal line driver circuit 5304, and a plurality of scanning lines are arranged as first scanning lines. The driver circuit 5302 and the second scanning line driver circuit 5303 are arranged to extend from each other. At the intersections of the scanning lines and the signal lines, pixels each having a display element are arranged in a matrix. The substrate 5300 of the display device is made of an FPC (Flexible Printed Circuit). d Circuit) and other connections to the timing control circuit 5305 (controller , also called a control IC).

[0223] In FIG. 16A, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, a signal The signal line driver circuit 5304 is formed on the same substrate 5300 as the pixel portion 5301. This reduces the number of externally provided components such as drive circuits, thereby reducing costs. In addition, when a driving circuit is provided outside the substrate 5300, the wiring is extended to provide a connection portion. The number of connections can be reduced, and the reliability or yield can be improved.

[0224] The timing control circuit 5305 controls the first scanning line driver circuit 5302 as follows: The first scanning line driving circuit start signal (GSP1), the scanning line driving circuit clock signal The timing control circuit 5305 also supplies the second scanning line driving circuit (GCLK1). For example, a start signal for the second scanning line driving circuit (GSP2) (S It supplies the clock signal (GCLK2) for the scanning line driver circuit. The signal line driver circuit 5304 receives a start signal (SSP) for the signal line driver circuit, Clock signal (SCLK), video signal data (DATA) (also simply called video signal) ), and a latch signal (LAT). It is possible to omit either the first scanning line driver circuit 5302 or the second scanning line driver circuit 5303.

[0225] In FIG. 16B, circuits with low driving frequencies (for example, the first scanning line driving circuit 5302, the The second scanning line driver circuit 5303 is formed on the same substrate 5300 as the pixel portion 5301, and the signal line driver The configuration in which the driving circuit 5304 is formed on a substrate different from that of the pixel portion 5301 is shown. Due to the structure, the field-effect mobility of the transistor is lower than that of a transistor using a single crystal semiconductor. The transistors can be used to configure the driving circuits formed on the substrate 5300. This allows for the enlargement of display devices, reduction in the number of processes, cost reduction, and improvement of yield. It is possible.

[0226] Next, in Fig. 17(A) and Fig. 17(B), a signal line driver configured with n-channel transistors is shown. An example of the circuit configuration and operation will be described below.

[0227] The signal line driver circuit includes a shift register 5601 and a switching circuit 5602 . The switching circuit 5602 is composed of switching circuits 5602_1 to 5602_N (N is a natural number). The switching circuits 5602_1 to 5602_N each have a plurality of circuits. , a plurality of transistors 5603_1 to 5603_k (k is a natural number) The transistors 5603_1 to 5603_k are n-channel transistors. An example will be described.

[0228] The connection relationship of the signal line driver circuit will be described using the switching circuit 5602_1 as an example. The first terminals of the transistors 5603_1 to 5603_k are connected to the wirings 5604_1 to 5604_k, respectively. The second terminals of the transistors 5603_1 to 5603_k are connected to , and are connected to signal lines S1 to Sk. The gates of the transistors 5603_1 to 5603_k are , and is connected to a shift register 5601.

[0229] The shift register 5601 sequentially outputs H level (H signal) to the wirings 5605_1 to 5605_N. , also referred to as a high power supply potential level), and the switching circuits 5602_1 to 56 It has the function of selecting 02_N in order.

[0230] The switching circuit 5602_1 is connected to the wirings 5604_1 to 5604_k and the signal lines S1 to Sk. The function of controlling the conduction state (conduction between the first terminal and the second terminal) with the wiring 5604_ The switches have the function of controlling whether or not the potentials of 1 to 5604_k are supplied to the signal lines S1 to Sk. In this way, the switching circuit 5602_1 has a function as a selector. The transistors 5603_1 to 5603_k are connected to the wirings 5604_1 to 5604_k, respectively. A function for controlling the conduction state between the wirings S1 to Sk, that is, the wirings 5604_1 to 5604_k. The transistor 5603_1 has a function of supplying a voltage to the signal lines S1 to Sk. .about.5603_k each function as a switch.

[0231] The wirings 5604_1 to 5604_k each carry video signal data (DATA). The video signal data (DATA) is an analog signal corresponding to the image information or image signal. This is often a signal.

[0232] Next, the operation of the signal line driver circuit of FIG. 17(A) will be explained with reference to the timing chart of FIG. 17(B). 17B shows signals Sout_1 to Sout_N and An example of Vdata_1 to Vdata_k is shown. are examples of output signals of the shift register 5601, and signals Vdata_1 to Vdata _k are examples of signals input to the wirings 5604_1 to 5604_k, respectively. One operation period of the signal line driving circuit corresponds to one gate selection period in the display device. The selection period is divided into periods T1 to TN, for example. This is the period for writing video signal data (DATA) to the pixels belonging to the selected row. be.

[0233] During the period T1 to the period TN, the shift register 5601 outputs a high-level signal to the wiring 560 For example, in the period T1, the shift registers 5 601 outputs a high-level signal to the wiring 5605_1. 03_1~5603_k will be turned on, so wires 5604_1~5604_k and signal line At this time, the wirings 5604_1 to 5604_k are connected to Da ta(S1)~Data(Sk) is input. Data(S1)~Data(Sk) is , each of which is connected to a pixel belonging to a selected row via a transistor 5603_1 to 5603_k. In this way, during the periods T1 to TN, the selected pixels are written to the pixels in the first to k-th columns. The video signal data (DATA) is written to the pixels in the selected row in order of k columns. can be.

[0234] As described above, video signal data (DATA) is written to pixels in multiple columns. This makes it possible to reduce the number of video signal data (DATA) or the number of wirings. This reduces the number of connections to external circuits. By writing directly to the memory, the writing time can be increased, and the video signal can be written This can prevent under-crowding.

[0235] The shift register 5601 and the switching circuit 5602 may be the same as those in other embodiments. In this case, a circuit configured with the transistors shown in The polarity of all the transistors in the transistor 5601 is either n-channel or p-channel. It can be configured with only one polarity.

[0236] The configuration of the scanning line driver circuit will be described. The scanning line driver circuit has a shift register. In some cases, a level shifter or a buffer may be included. In the operation circuit, a clock signal (CLK) and a start pulse signal (S) are input to the shift register. P) is input, the selection signal is generated. The generated selection signal is The signal is buffered and amplified in the scanning line, and then supplied to the corresponding scanning line. The gate electrodes of the transistors are connected. must be turned on all at once, so the buffer must be able to pass a large current. is used.

[0237] Regarding one form of a shift register used in a part of a scanning line driver circuit and / or a signal line driver circuit, This will be explained with reference to FIGS. 18 and 19.

[0238] Regarding the shift registers of the scanning line driver circuit and the signal line driver circuit, please refer to FIGS. 18 and 19. The shift register includes the first pulse output circuit 10_1 to the Nth pulse output circuit 10_2. The path 10_N (N is a natural number N≧3) (see FIG. 18(A)). The first pulse output circuit 10_1 to the N-th pulse output circuit 10_2 of the shift register shown in N receives a first clock signal CK1 from a first wiring 11 and a second clock signal CK2 from a second wiring 12. a third clock signal CK2 from the third wiring 13; a fourth clock signal CK3 from the fourth wiring 14; The fourth clock signal CK4 is supplied to the first pulse output circuit 10_1. A start pulse SP1 (first start pulse) is input from the wiring 15. In the n-th pulse output circuit 10_n (n is a natural number of 2≦n≦N) after the 1st pulse output circuit 10_n, A signal from the pulse output circuit 10_n-1 (called the previous stage signal OUT(n-1)) is input. In addition, in the first pulse output circuit 10_1, the third pulse output circuit 10_3, which is two stages later, Similarly, in the n-th pulse output circuit 10_n at the second stage or later, a signal from The signal from the (n+2)th pulse output circuit 10_(n+2) in the next stage (n+2) Therefore, the pulse output circuit of each stage outputs the pulse to the next stage and / or The first output signal (OUT(1)(SR)~) is input to the pulse output circuit of the previous stage. OUT(N)(SR)), and a second output signal (OUT(1) to be input to another circuit, etc. OUT(N)) is output. As shown in FIG. 18(A), Since the next stage signal OUT(n+2) is not input to the two stages of the stage, as an example, The second start pulse SP2 and the third start pulse SP3 are input. That's fine.

[0239] The clock signal (CK) alternates between H level and L level (L signal, low power supply potential) at regular intervals. Here, the first clock signal (CK1) to the second clock signal (CK2) are signals that repeat a cycle of 1 / 2 levels. The fourth clock signal (CK4) is delayed by 1 / 4 cycle in order. The first clock signal (CK1) to the fourth clock signal (CK4) are used to generate a pulse output circuit. The clock signal is controlled by the GCK It is sometimes called SCK, but here we will explain it as CK.

[0240] The first input terminal 21, the second input terminal 22, and the third input terminal 23 are connected to the first wiring 11 to It is electrically connected to any one of the fourth wirings 14. For example, in FIG. The first pulse output circuit 10_1 has a first input terminal 21 electrically connected to the first wiring 11. The second input terminal 22 is electrically connected to the second wiring 12, and the third input terminal 23 is The second pulse output circuit 10_2 is electrically connected to the third wiring 13. The first input terminal 21 is electrically connected to the second wiring 12, and the second input terminal 22 is electrically connected to the third wiring The third input terminal 23 is electrically connected to the fourth wiring 14. There are.

[0241] Each of the first pulse output circuit 10_1 to the N-th pulse output circuit 10_N has a first input terminal 21, a second input terminal 22, a third input terminal 23, a fourth input terminal 24, a fifth input terminal 18B, the input terminal 25, the first output terminal 26, and the second output terminal 27. In the first pulse output circuit 10_1, a first clock signal is input to a first input terminal 21. A first clock signal CK1 is input to the first input terminal 21, a second clock signal CK2 is input to the second input terminal 22, and a third clock signal CK3 is input to the third input terminal 23. A third clock signal CK3 is input to the input terminal 23 of the clock generator 10, and a start signal CK4 is input to the fourth input terminal 24 of the clock generator 10. A pulse is input, the subsequent signal OUT(3) is input to the fifth input terminal 25, and the first output The first output signal OUT(1)(SR) is output from the terminal 26, and the second output signal OUT(1)(SR) is output from the second output terminal 27. The second output signal OUT(1) is output.

[0242] Next, an example of a specific circuit configuration of the pulse output circuit will be described with reference to FIG.

[0243] The first pulse output circuit 10_1 includes a first transistor 31 to a thirteenth transistor 43. (See FIG. 18(C)). In addition, the first input terminal 21 to the fifth input terminal a first output terminal 25, a first output terminal 26, a second output terminal 27, and a first high power supply potential VDD a power supply line 51 to which a second high power supply potential VCC is supplied, a power supply line 52 to which a low power supply potential The first transistor 31 to the thirteenth transistor 4 are connected to the power supply line 53 to which VSS is supplied. A signal or a power supply potential is supplied to 3. Here, the magnitude of the power supply potential of each power supply line in FIG. The minor relationship is that the first power supply potential VDD is equal to or higher than the second power supply potential VCC, and The potential VCC is set to a potential higher than the third power supply potential VSS. The fourth clock signal (CK1) to the fourth clock signal (CK4) alternate between high and low levels at regular intervals. It is a signal, but when it is at H level it is VDD and when it is at L level it is VSS. By making the potential VDD of the power supply line 51 higher than the potential VCC of the power supply line 52, the operation is not affected. The potential applied to the gate electrode of the transistor can be kept low without causing a problem. This reduces the shift in the threshold voltage of the transistor and suppresses degradation.

[0244] In FIG. 18C, the first terminal of the first transistor 31 is electrically connected to the power supply line 51. the second terminal of the ninth transistor 39 is electrically connected to the first terminal of the ninth transistor 39, and the gate electrode of the The second transistor 32 has a first terminal electrically connected to the fourth input terminal 24. The second terminal is electrically connected to the power supply line 53, and the second terminal is electrically connected to the first terminal of the ninth transistor 39. and a gate electrode electrically connected to the gate electrode of the fourth transistor 34. The third transistor 33 has a first terminal electrically connected to the first input terminal 21 and a second terminal electrically connected to the first input terminal 21. The second terminal is electrically connected to the first output terminal 26. The fourth transistor 34 One terminal is electrically connected to the power supply line 53, and the second terminal is electrically connected to the first output terminal 26. The fifth transistor 35 has a first terminal electrically connected to the power supply line 53 and a second terminal electrically connected to the power supply line 53. The two terminals are the gate electrode of the second transistor 32 and the gate electrode of the fourth transistor 34. and the gate electrode is electrically connected to the fourth input terminal 24. The transistor 36 has a first terminal electrically connected to the power supply line 52 and a second terminal electrically connected to the second transistor 36. The gate electrode of the fourth transistor 32 and the gate electrode of the fourth transistor 34 are electrically connected to each other. The seventh transistor 3 has a gate electrode electrically connected to the fifth input terminal 25. The first terminal of the transistor 7 is electrically connected to the power supply line 52, and the second terminal of the transistor 38 is electrically connected to the power supply line 52. The gate electrode is electrically connected to the second terminal and the gate electrode is electrically connected to the third input terminal 23. The eighth transistor 38 has a first terminal connected to the gate electrode of the second transistor 32 and a second terminal connected to the gate electrode of the second transistor 32. 4, and the gate electrode is electrically connected to the second input terminal 2 The ninth transistor 39 has a first terminal electrically connected to the first transistor 2. The second terminal is electrically connected to the second terminal of the first transistor 31 and the second terminal of the second transistor 32. The gate electrode of the third transistor 33 and the gate electrode of the tenth transistor 40 are supplied with a voltage. The gate electrode is electrically connected to the power supply line 52. The first terminal of the sigma 40 is electrically connected to the first input terminal 21, and the second terminal is electrically connected to the second output terminal 22. the gate electrode of the ninth transistor 39 is electrically connected to the second terminal of the ninth transistor 39. The eleventh transistor 41 has a first terminal electrically connected to the power supply line 53. The second terminal is electrically connected to the second output terminal 27, and the gate electrode is The gate electrode of the fourth transistor 32 and the gate electrode of the fourth transistor 34 are electrically connected to each other. The twelfth transistor 42 has a first terminal electrically connected to the power supply line 53 and a second terminal is electrically connected to the second output terminal 27, and the gate electrode is connected to the gate of the seventh transistor 37. The first terminal of the thirteenth transistor 43 is electrically connected to the power supply line 53. , the second terminal is electrically connected to the first output terminal 26, and the gate electrode is It is electrically connected to the gate electrode of the seventh transistor 37 .

[0245] In FIG. 18C, the gate electrode of the third transistor 33, the gate electrode of the tenth transistor 4 The connection point of the gate electrode of the ninth transistor 30 and the second terminal of the ninth transistor 39 is referred to as node A. The gate electrode of the second transistor 32, the gate electrode of the fourth transistor 34, the second terminal of the fifth transistor 35, the second terminal of the sixth transistor 36, the second terminal of the eighth transistor The connection point of the first terminal of the eleventh transistor 38 and the gate electrode of the eleventh transistor 41 is node B. (See FIG. 19(A)).

[0246] A transistor is a device having at least three terminals including a gate, a drain, and a source. The element has a channel region between the drain region and the source region, A current can flow through the in-region, the channel region, and the source region. The source and drain depend on the transistor structure and operating conditions, so it is difficult to know which is the source or drain. Therefore, it is difficult to define whether the source or drain is the In some cases, the region that functions as a source or drain is not called a source or drain. In this case, they may be referred to as the first terminal and the second terminal, respectively.

[0247] Here, the timing of the shift register having a plurality of pulse output circuits shown in FIG. A shift chart is shown in FIG. 19(B). In this case, the period 61 in FIG. 19(B) corresponds to the vertical blanking period, and the period 62 corresponds to the gate selection period. do. [Example]

[0248] In this example, a structure of a liquid crystal display device according to one embodiment of the present invention will be described.

[0249] 20 is a perspective view showing an example of the structure of a liquid crystal display device of the present invention. The display device includes a liquid crystal panel 1601 having a liquid crystal element formed between a pair of substrates, and a first diffusion plate 1602. 602, a prism sheet 1603, a second diffusion plate 1604, a light guide plate 1605, and a reflector. It has a reflector 1606 , a light source 1607 , and a circuit board 1608 .

[0250] A liquid crystal panel 1601, a first diffusion plate 1602, a prism sheet 1603, and a second diffusion plate 1604 are included. The scattering plate 1604, the light guide plate 1605, and the reflector 1606 are stacked in this order. 607 is provided at the end of the light guide plate 1605, and is a light source diffused inside the light guide plate 1605. The light from 1607 passes through the first diffusion plate 1602, the prism sheet 1603 and the second diffusion plate The liquid crystal panel 1601 is uniformly illuminated by the light 1604 .

[0251] In this embodiment, the first diffusion plate 1602 and the second diffusion plate 1604 are used. The number of the diffusion plates is not limited to this, and may be one or three or more. The prism 1605 may be provided between the light guide plate 1605 and the liquid crystal panel 1601. A diffusion plate may be provided only on the side closer to the liquid crystal panel 1601 than the sheet 1603. The diffusion plate is provided only on the side closer to the light guide plate 1605 than the prism sheet 1603. That's fine.

[0252] The cross section of the prism sheet 1603 is not limited to the sawtooth shape shown in FIG. It is sufficient if the shape can condense the light from the plate 1605 onto the liquid crystal panel 1601 side.

[0253] The circuit board 1608 includes a circuit for generating various signals to be input to the liquid crystal panel 1601, In FIG. 20, the circuit board 16 is provided with circuits for processing these signals. 08 and the LCD panel 1601 are connected by FPC (Flexible Printed Circuit) The above circuit is connected via a COG (Chip On Ground) 1609. The liquid crystal panel 1601 may be connected using the glass method, or one of the above circuits may be connected using the glass method. Even if the part is connected to FPC1609 using the COF (Chip on Film) method, good.

[0254] In FIG. 20, a control circuit for controlling the driving of a light source 1607 is provided on a circuit board 1608. The control circuit and the light source 1607 are connected via an FPC 1610. However, the control circuit may be formed on the liquid crystal panel 1601. In this case, the liquid crystal panel 1601 and the light source 1607 are connected by an FPC or the like. do.

[0255] 20 shows an edge-light type light source in which a light source 1607 is arranged at the edge of a liquid crystal panel 1601. In the liquid crystal display device of the present invention, the light source 1607 is located directly below the liquid crystal panel 1601. It may also be a direct type disposed in the

[0256] This embodiment can be implemented in appropriate combination with the above embodiment modes. [Example]

[0257] By using the manufacturing method of the present invention, a highly reliable transistor can be manufactured. Therefore, by using the manufacturing method according to one embodiment of the present invention, a highly reliable and high-performance semiconductor device can be obtained. A conductor device can be provided.

[0258] Furthermore, in the manufacturing method of the present invention, the temperature of the heat treatment can be suppressed, so that the Even on a substrate made of flexible synthetic resin such as plastic, which has poor heat resistance, It is possible to fabricate a transistor with excellent characteristics and high reliability. By using the manufacturing method according to one embodiment of the present invention, a highly reliable, high-performance, and lightweight It is possible to provide a semiconductor device that is both lightweight and flexible. Polyesters, such as polyethylene terephthalate (PET), and polyethers Polyethylene naphthalate (PEN), Polycarbonate (PC), Polyether ether ketone (PEEK), polysulfone (PSF), polyetherimide Polyethylene Insulator (PEI), Polyarylate (PAR), Polybutylene Terephthalate (PBT), Poly Polyimide, acrylonitrile butadiene styrene resin, polyvinyl chloride, polypropylene , polyvinyl acetate, acrylic resin, etc.

[0259] An electronic device using a semiconductor device manufactured by a manufacturing method according to one embodiment of the present invention can be used for a display device. equipment, notebook personal computers, image playback devices equipped with recording media (typically DV D: Plays recording media such as Digital Versatile Discs and displays the images. It can be used in devices with displays that can display images. game consoles, mobile information terminals, e-books, RFID IC cards and tags, video Camera, digital still camera, goggle-type display (head-mounted display) ), navigation systems, sound reproduction devices (car audio, digital audio players) Examples of these electronic devices are shown in Figure 21.

[0260] FIG. 21A shows an electronic book having a housing 7001, a display portion 7002, and the like. The semiconductor device according to the embodiment can be used in the display portion 7002 or other signal processing circuits. The semiconductor device according to one embodiment of the present invention can be used in the display portion 7002 or other signal processing circuits. By using this technology, it is possible to provide highly reliable and high-performance e-books. By using a substrate having the above structure, a semiconductor display device used in the display portion 7002 and other The signal processing circuit can be made flexible, so it is highly reliable and highly functional, It is possible to provide a flexible, lightweight and easy-to-use e-book.

[0261] FIG. 21B shows an IC card, which includes a housing 7011, an IC chip 7012, and the like. The semiconductor device according to this embodiment can be used as the IC chip 7012. By using a semiconductor device according to one embodiment of the present invention for the semiconductor device 7012, a highly reliable and high-performance Furthermore, by using a flexible substrate, it is possible to provide a C card. Since the 7012 can be made flexible, it is possible to provide a light and strong IC card. Although a contact IC card is shown in FIG. 21(B), an antenna can also be used. The semiconductor device according to one embodiment of the present invention can also be used in a contactless IC card having a can.

[0262] FIG. 21C shows a display device, which includes a housing 7021, a display portion 7022, and the like. The semiconductor device according to this embodiment can be used in the display portion 7022 or other signal processing circuits. The semiconductor device according to one embodiment of the present invention can be used in the display portion 7022 or other signal processing circuits. By using the above, a highly reliable and high performance display device can be provided. By using a substrate having the above structure, a semiconductor display device used in the display portion 7022 and other The signal processing circuit can be made flexible, so it is highly reliable and highly functional, A flexible and lightweight display device can be realized. As shown in the figure, the display device can be fixed to fabric or the like and used, which greatly expands the range of applications for semiconductor devices. Spreads in stages.

[0263] FIG. 21D shows a portable game machine, which includes a housing 7301, a housing 7302, a display portion 7303, Display unit 7304, microphone 7305, speaker 7306, operation keys 7307, The semiconductor device according to one embodiment of the present invention includes a display portion 7303, a display The display unit 7303 can be used in the display unit 7304 or other signal processing circuits. By using a semiconductor device according to one embodiment of the present invention in the signal processing circuit 7304 or other signal processing circuits, By providing a highly reliable portable game console equipped with more advanced applications, Note that the portable game machine shown in FIG. 21D has two display portions 7303 and a display However, the number of display units that the portable game machine has is not limited to this. do not have.

[0264] This embodiment can be implemented in appropriate combination with the above embodiment modes or embodiments. be. [Explanation of symbols]

[0265] 10 Pulse output circuit 11 Wiring 12 Wiring 13 Wiring 14 Wiring 15 Wiring 21 Input terminal 22 Input terminal 23 Input terminal 24 input terminals 25 Input terminals 26 Output terminal 27 Output terminal 31 Transistor 32 transistors 33 Transistor 34 transistors 35 transistors 36 transistors 37 Transistor 38 transistors 39 Transistor 40 transistors 41 Transistor 42 transistors 43 Transistor 51 Power line 52 Power line 53 Power line 61 period 62 period 100 boards 101 gate electrode 103 Gate insulating film 104 Oxide semiconductor film 105 Oxide semiconductor film 106 Source electrode 107 Drain electrode 108 Oxide semiconductor film 109 Oxide semiconductor film 110 oxide insulating film 111 Oxide semiconductor film 112 transistors 122 Oxide semiconductor film 123 Oxide insulating film 132 Oxide semiconductor film 133 Oxide insulating film 142 Oxide semiconductor film 143 Insulating Film 145 Channel protection film 170 Plasma 180 Processing Container 181 Support stand 182 Gas Supply Section 183 Exhaust port 184 Microwave Generator 185 Waveguide 186 Dielectric Plate 187 Top Plate 188 Mounting fixtures 191 Non-raw gas sources 192 Non-raw gas sources 193 Mass Flow Controller 194 Mass Flow Controller 195 valves 196 Valve 197 Gas Pipe 198 Gas Pipe 199 Temperature control unit 200 boards 201 Gate electrode 203 Gate insulating film 204 Oxide semiconductor film 205 Oxide semiconductor film 206 Source electrode 207 Drain electrode 210 Oxide insulating film 211 Oxide semiconductor film 212 transistor 300 boards 301 Gate electrode 303 Gate insulating film 304 Oxide semiconductor film 305 Oxide semiconductor film 306 Source electrode 307 Drain electrode 310 Insulating film 311 Oxide semiconductor film 312 Transistor 313 Channel protection film 400 boards 401 Gate electrode 402 Gate insulating film 403 Oxide semiconductor film 404 Oxide semiconductor film 405 Oxide semiconductor film 406 Conductive film 408 Capacitance wiring 409 Oxide semiconductor film 410 Oxide semiconductor film 411 Oxide insulating film 412 Oxide semiconductor film 413 Transistor 414 pixel electrode 415 Transparent conductive film 416 Transparent conductive film 420 Second Terminal 421 First Terminal 120a Source Region 120b Drain region 121a Source electrode 121b Drain electrode 130a Source region 130b drain region 131a Source electrode 131b Drain electrode 140a Source Region 140b drain region 141a Source electrode 141b Drain electrode 187a opening 1401 Transistor 1402 gate electrode 1403 Gate insulating film 1404 Oxide semiconductor film 1405 Semiconductor film 1406 Conductive film 1407 Oxide insulating film 1408 insulating film 1410 pixel electrode 1411 Alignment film 1413 Counter electrode 1414 Alignment film 1415 LCD 1416 Sealing material 1417 Spacer 1601 LCD panel 1602 Diffuser 1603 Prism Sheet 1604 Diffuser 1605 Light guide plate 1606 Reflector 1607 Light source 1608 Circuit Board 1609 FPC 1610 FPC 407a Source electrode 407b Drain electrode 5300 board 5301 Pixel unit 5302 Scanning line driver circuit 5303 Scanning line driver circuit 5304 Signal line driver circuit 5305 Timing control circuit 5601 Shift Register 5602 Switching Circuit 5603 Transistor 5604 Wiring 5605 Wiring 6031 Transistor 6033 Light-emitting element 6034 Electrode 6035 Electroluminescent layer 6036 Electrode 6037 Insulating film 6038 Bulkhead 6041 Transistor 6043 Light-emitting element 6044 Electrode 6045 Electroluminescent layer 6046 Electrode 6047 Insulating film 6048 Bulkhead 6051 transistor 6053 Light-emitting element 6054 Electrode 6055 Electroluminescent layer 6056 Electrode 6057 Insulating film 6058 Bulkhead 7001 Case 7002 Display section 7011 Case 7012 IC chip 7021 Housing 7022 Display section 7301 Housing 7302 Housing 7303 Display section 7304 Display section 7305 Microphone 7306 Speaker 7307 Operation Key 7308 Stylus

Claims

1. a first conductive film having a function as a gate electrode; a first insulating film having a region disposed on the first conductive film; a first metal oxide film having a region disposed on the first insulating film; a second metal oxide film and a third metal oxide film each having a region disposed so as to be in contact with an upper surface of the first metal oxide film; a second conductive film having a region disposed on the second metal oxide film; a third conductive film having a region disposed on the third metal oxide film; a second insulating film having a region disposed on the first metal oxide film, a region disposed on the second conductive film, and a region disposed on the third conductive film; a pixel electrode having a region disposed on the second insulating film; the first metal oxide film, the second metal oxide film, and the third metal oxide film contain In and Zn; the first metal oxide film has a first end and a second end; the first end portion has a region overlapping with the first conductive film, the second end portion has a region that does not overlap with the first conductive film, the second insulating film has a region in contact with the first metal oxide film between the second conductive film and the third conductive film, the second insulating film has a region in contact with the first end portion and a region in contact with the second end portion, the second insulating film is an oxide insulating film, The third conductive film is connected to the pixel electrode.

2. In claim 1, the second insulating film is a silicon oxide film or a silicon nitride oxide film; Semiconductor device.

Citation Information

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