Analog Systems for Edge Artificial Intelligence Computing

Abstract

To provide an analog system for edge artificial intelligence computing. An analog system for edge artificial intelligence computing includes a first plurality of analog edge devices configured to receive input analog signals and output a first plurality of output analog signals, a second plurality of analog edge devices configured to receive the first plurality of output analog signals and output a second plurality of output analog signals, and one or more memory devices in communication with the first plurality of analog edge devices and the second plurality of analog edge devices and configured to store weight parameters, the weight parameters being tunable based on time constants of the first plurality of analog edge devices or the second plurality of analog devices, or both. The second plurality of output analog signals are multiplied by the weight parameters to obtain a plurality of weighted analog signals.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of U.S. Provisional Patent Application No. 63 / 684,581, filed August 19, 2024, which is incorporated herein by reference in its entirety.

[0002] Government Licensing Rights This invention was made with government support under 2022-21102100011 awarded by IARPA. The government has certain rights in this invention.

[0003] The present disclosure relates generally to analog systems for edge artificial intelligence computing. [Background technology]

[0004] Artificial intelligence (AI) computing at the edge is often limited by size, weight, and power (SWaP). Existing approaches based on digital computers are inefficient for edge AI computation. Power-intensive techniques used to train AI models in data centers are generally unsuitable for edge applications. Many edge applications require interpreting and inferring analog data. Existing approaches based on digital computers are highly inefficient due to the burden of analog-to-digital conversion (ADC) and digital-to-analog conversion (DAC) as well as other processing bottlenecks inherent in von Neumann architectures. Instead of building better graphics processing units (GPUs) or smaller transistors, new approaches are needed to design AI hardware for edge computing. Another problem of particular interest is training edge applications in situ. Traditional stochastic gradient descent (SGD) learning methods rely on backpropagating errors through multiple layers of neural networks, which is very difficult to implement in analog hardware. Summary of the Invention [Means for solving the problem]

[0005] Features and advantages will become apparent from the following more particular description of various illustrative embodiments, as illustrated in the accompanying drawings, in which like reference numerals generally indicate identical, functionally similar, and / or structurally similar elements.

[0006] A full and enabling disclosure of the present specification, including the best mode thereof, directed to one of ordinary skill in the art, is set forth in this specification, which makes reference to the accompanying drawings. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram of a network architecture of micro-electro-mechanical systems (MEMS) devices in a neural network used to remove noise in or denoise an input analog signal, according to one aspect of the present disclosure. [Figure 2] FIG. 1 is a diagram of an electronic circuit illustrating interconnections between multiple analog edge devices (e.g., MEMS) to implement an analog system for edge artificial intelligence using a neural network and one or more field programmable analog arrays (FPAAs), according to one embodiment of the present disclosure. [Figure 3] 1 is a schematic diagram of an exemplary MEMS device according to one embodiment of the present disclosure. [Figure 4] FIG. 1 is a schematic diagram of a MEMS device used as a neuron to implement a neural network, according to one embodiment of the present disclosure. [Figure 5] 1 is a plot illustrating a noisy input analog signal, a denoised output analog signal, and a comparison ground truth analog signal according to one aspect of the present disclosure. [Figure 6] FIG. 1 is a flow diagram of a machine learning algorithm using a neural network (e.g., a continuous time autoregressive recurrent neural network (CTRNN)) for solving ordinary differential equations, according to one aspect of the present disclosure. [Figure 7]FIG. 1 is a schematic diagram illustrating an example implementation of multi-layer hierarchical differential target propagation for in situ training of a MEMS CTRNN, according to one aspect of the present disclosure. [Figure 8] FIG. 10 is a flow diagram illustrating details of a differential target propagation scheme used by a CTRNN, according to one aspect of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0008] Features, advantages, and aspects of the present disclosure will be apparent or obvious from consideration of the following detailed description, drawings, and claims. Moreover, the following detailed description is exemplary and intended to provide further explanation without limiting the scope of the disclosure as claimed.

[0009] Various aspects of the present disclosure are discussed in detail below. While specific aspects are discussed, this is done for illustrative purposes only. A person skilled in the art will recognize that other components and configurations may be used without departing from the present disclosure.

[0010] A MEMS analog edge device is provided that can perform edge artificial intelligence (AI) computing at relatively low power and relatively high speeds (e.g., more than hundreds of times lower power and more than hundreds of times faster) compared to existing digital computing architectures. The term "MEMS device" is used broadly to include mechanical MEMS devices, photoacoustic MEMS devices, ferroelectric MEMS devices, etc. The term "edge" is used throughout this specification to mean a computing device at the edge or fringe of a network architecture that is close to a user, such as a mobile phone, a sensor (e.g., an image sensor, a sound sensor, a radiation or light sensor, etc.), a controller for a machine, an unmanned aerial vehicle (UAV), or other network-connected device. Analog computing is particularly powerful for edge AI applications where size, weight, and power (SWaP) play a critical role. In addition, analog computing is particularly powerful for edge AI applications where the majority of the collected data is generated by analog edge devices (e.g., analog sensors). Performing AI computing in the analog domain can eliminate the need for bidirectional analog-to-digital conversion (ADC) and digital-to-analog conversion (DAC). Additionally, analog continuous-time processing does not require data to be constantly moved in and out of memory, which solves one of the major bottlenecks associated with digital architectures. As a result, by operating in the analog domain, high-speed (e.g., real-time, virtually no latency), ultra-low-power (e.g., mW to μW), and low-cost AI computing at the edge can be achieved. Additionally, in-situ training allows edge AI systems to mitigate the drift and variability of analog hardware. In-situ learning may be required for practical deployment of edge analog hardware.

[0011] In the first alternative, digital-based AI computing, the digital microcontroller can be slimmed down to reduce SWaP for edge AI computation. However, this first alternative is still based on a digital architecture, which involves the additional computational burden of analog-to-digital conversion and the bottleneck of the von Neumann architecture. Additionally, analog operations are much more power-efficient than digital operations that rely on transistor-based operations, such as the inclusion of AND and OR gates.

[0012] In a second alternative, analog machine learning devices can be utilized as programmable resistors or analog memories. However, 1) these resistor-based devices typically consume more power compared to embodiments of the present disclosure that include capacitance-based MEMS CTRNNs, 2) these resistor-based devices are "static" devices, i.e., they do not "learn" time information as in embodiments of the present disclosure, and 3) these resistor-based devices do not have in-situ learning capabilities.

[0013] Analog computers use fundamental physical phenomena as computational primitives and represent information through the relative values ​​of analog signals. In one embodiment of the present disclosure, the analog edge computing device can be a MEMS device. In this embodiment of the present disclosure, a MEMS device governed by dynamic differential equations is the computational primitive. For example, a MEMS cantilever beam provides the computational primitive with a relationship between a voltage input and a mechanical displacement output. Both the input and output can be continuous-time analog signals. The relationship between the input and output, also called a transfer function, can represent simple operations such as multiplication, addition, and integration, or more complex operations such as filtering, nonlinear functions, and harmonic oscillations. With lower power consumption and real-time response, MEMS devices have demonstrated over 300x power reduction and over 100x speed improvement compared to digital workstations for solving the same artificial intelligence (AI) problems.

[0014] For example, MEMS devices used to implement machine learning (ML) algorithms (e.g., continuous-time autoregressive recursive neural networks (CTRNNs)) can directly process input analog signals and use the recursive features of the neural network to learn temporal information. A non-limiting example of the recursive features is achieved by a self-feedback "memory" enabled by, for example, electrostatic MEMS. CTRNNs are deep learning models that account for irregular observations by incorporating continuous evolution of hidden states between observations. The recursive features are achieved by a self-feedback memory enabled by electrostatic MEMS. In one embodiment of the present disclosure, a MEMS CTRNN is constructed by connecting multiple MEMS devices to form a fully connected network. For example, the output of one MEMS device, i.e., a MEMS neuron, is multiplied by a weight. The outputs of multiple MEMS neurons, after multiplication by corresponding weights, are summed to provide inputs to MEMS neurons in different layers. In one embodiment of the present disclosure, various types of neurons, including MEMS neurons and other analog neurons, can be used in a CTRNN. Examples of analog neurons include resistors, capacitors, operational amplifiers, programmable analog memories, and other electronic circuit components.

[0015] In one embodiment of the present disclosure, a MEMS device (e.g., a MEMS processor) is controlled by electrostatic excitation to provide a capacitive output. Analog electronics for the MEMS device can be constructed using an analog front end and a field programmable analog array (FPAA). The MEMS device has a tunable time constant (called a weight parameter) that can be controlled by a voltage. The weight parameter is set in the FPAA. The output from the MEMS device is multiplied by the weight parameter and applied to the next neuron layer (MEMS or analog).

[0016] In one embodiment of the present disclosure, the tunable time constant of a MEMS device enables a CTRNN to learn salient information in a temporal sequence. A CTRNN can also be constructed with MEMS having different time constants for temporal learning. Learning salient information from a temporal sequence essentially involves taking a temporal sequence (e.g., an analog signal such as an audio signal) and extracting actionable information from the signal. MEMS technology is well suited for learning salient information because MEMS devices are configured to extract state or meaning from time series (temporal sequences). In one non-limiting example, embodiments of the present disclosure can be utilized in acoustic navigation and ranging (SONAR) underwater target detection to detect and locate objects of interest or exploration targets. In another non-limiting example, embodiments of the present disclosure can be utilized to detect anomalous signals from mechanical vibration signatures and use the signals for predictive maintenance. In yet another non-limiting example, applying embodiments of the present disclosure to seismic signals can also enable the detection of seismic activity.

[0017] In one aspect of the present disclosure, instead of the standard backpropagation algorithm, in which weight parameter gradients are determined by propagating a global loss error back through the network, difference target propagation (DTP) can be used to enable weight parameter updates at local layers. This allows in-situ training to occur at local layers, which greatly simplifies analog circuit design. Using local layers differs in many ways from standard backpropagation algorithms. Machine learning neural network models may include several processing layers in which information is transformed into an increasingly information-rich space layer by layer. Standard backpropagation algorithms receive output errors and propagate them back through all layers of the network to update the parameters. The DTP approach predicts what the targets should be for each layer and then directly calculates an error signal for each layer. The calculated layer-specific error signal is then used to update the weights. Thus, essentially, while standard backpropagation approaches calculate network-level errors, the DTP approach calculates errors for each layer of the network. In contrast to standard backpropagation algorithms, where weight gradients are determined by propagating a global loss error backward through the network, DTP uses an autoencoder-type architecture to establish intermediate targets. An autoencoder is a type of neural network that is typically trained to copy inputs to outputs via a compressed latent representation. DTP has two main advantages: (1) the information needed at the output of each layer of a neural network can be obtained using a simple forward pass through the network, and (2) the update equations are local to each layer, meaning that only local information is needed to update the weights of layer "i."

[0018] Another problem of particular interest is in situ training for edge applications. To date, this problem has been largely unexplored by the analog computing community. Traditional stochastic gradient descent (SGD) learning methods rely on backpropagating errors through multiple layers of neural networks, which is very difficult to implement in analog hardware. In gradient descent, all accessible data can be used to generate predictions for all accessible data using a machine learning neural network model. The error is then calculated and minimized by moving the network parameters in the direction that minimizes the error. In SGD, a subset of the data is used instead. An error gradient is calculated for the subset data. The model is then updated based on the calculated error.

[0019] In SGD, the gradient may have noise associated with it. The noise may be due to the sampling process or may be due to noise inherent in the analog input / output signals. The presence of noise in SGD may actually aid convergence because the machine learning neural network model is less likely to get stuck in a local minimum.

[0020] In one aspect of the present disclosure, in situ training is used to solve two problems that have limited analog computers in the past: (1) analog hardware variability. This technique allows the neural network to learn its parameters based on the individual edge hardware, and (2) analog hardware drift. This technique allows the neural network (NN) to recalibrate itself through re-learning to mitigate drift due to environmental factors such as temperature and humidity.

[0021] Analog edge devices (e.g., MEMS devices or other analog devices) certainly differ from one another, and their characteristics can drift over time. In situ training allows each edge AI system to learn its parameters based on its individual edge hardware. This also allows the edge AI system to recalibrate itself through re-learning to mitigate analog hardware drift.

[0022] The in situ training of the MEMS CTRNN approach provides an adaptive technique to mitigate the effects of component variations. This type of adaptation naturally leads to a system that learns about its environment. A MEMS CTRNN with in situ learning can learn and provide updated weight parameters based on instantiated hardware components very quickly (e.g., training times of a few minutes) and with very low energy consumption (e.g., less than 1 watt-hour). A MEMS CTRNN is also more robust to component degradation and failure than conventional systems.

[0023] As a result, one aspect of the present disclosure is to provide a MEMS CTRNN that utilizes electrostatic MEMS neurons to achieve network computation in continuous time and the analog domain. Technical effects of aspects of the present disclosure include permitting or enabling in situ training of MEMS CTRNN techniques that provide adaptive techniques to mitigate the effects of component variations, permitting or enabling more robust systems that are more tolerant to component degradation and failure than conventional systems, and permitting or enabling low-power and high-performance edge computing. Another aspect of the present disclosure is also to provide in situ supervised training of CTRNNs that allows them to learn directly at the edge hardware using received analog information while self-correcting for analog hardware variations and drift.

[0024] Edge AI with low SWaP and fast response can enable many applications both inside and outside the aviation industry. Applications can be signal filtering (adaptive), prediction, tracking, classification, anomaly detection, or decoding information based on continuous signals. The deployment of Edge AI will grow rapidly for autonomous platforms with SWaP requirements, such as UAVs, autonomous vehicles, and robots.

[0025] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations. Additionally, unless otherwise expressly indicated, all features of the present disclosure described herein are to be considered exemplary.

[0026] As used herein, terms such as "first" and "second" may be used interchangeably to distinguish one component from another and are not intended to denote the location or importance of the individual components.

[0027] As used herein, the term "upstream" refers to a direction opposite to the direction of fluid flow, and the term "downstream" refers to a direction in the same direction as fluid flow. The terms "front" or "forward" mean in front of something, and the terms "aft" or "aft" mean behind something. For example, when used in reference to fluid flow, front / forward can mean upstream and aft / aft can mean downstream.

[0028] Additionally, the terms "radial" or "radially," as used herein, refer to directions away from a common center. For example, in the general context of a gas turbine, radial refers to directions along rays extending between the longitudinal axis of the engine's center and the engine's outer periphery. Furthermore, the terms "set" or "set of elements," as used herein, can refer to any number of elements, including only one.

[0029] Connection references (e.g., attached, coupled, fixed, fastened, connected, and joined) should be interpreted broadly and may include intermediate members between a collection of elements and relative movement between the elements, unless otherwise indicated. Thus, connection references do not necessarily imply that two elements are directly connected and in fixed relationship to each other. The illustrative drawings are for illustrative purposes only, and the dimensions, positions, order, and relative sizes reflected in the accompanying drawings may be changed.

[0030] As used herein, a "controller" or "controller module" may include a component configured or adapted to provide instructions, control, operations, or any form of communication for an operable component to effect its operation. A controller or controller module may include any well-known processor, microcontroller, or logic device, including, but not limited to, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a full authority digital engine control (FADEC), a proportional controller (P), a proportional integral controller (PI), a proportional integral derivative (PID) controller, a hardware accelerated logic controller (e.g., for encoding, decoding, transcoding, etc.), or the like, or a combination thereof. Non-limiting examples of controllers or controller modules may be configured or adapted to execute, manipulate, or otherwise perform program code to produce operational or functional results, including various methods, functions, processing tasks, calculations, comparisons, sensing or measuring values, etc., to enable or achieve the technical operations or actions described herein. The operational or functional results may be based on one or more inputs, stored data values, sensed or measured values, true or false indications, etc. Although "program code" is described, non-limiting examples of operable or executable instruction sets may include routines, programs, objects, components, data structures, algorithms, etc. that have the technical effect of performing particular tasks or implementing particular abstract data types.In another non-limiting example, the controller or controller module may also include data storage components accessible by the processor, including memory, whether temporary, volatile, or non-temporary, or non-volatile memory. Additional non-limiting examples of memory may include random access memory (RAM), read-only memory (ROM), flash memory, or one or more different types of portable electronic memory, such as disks, DVDs, CD-ROMs, flash drives, universal serial bus (USB) drives, or any suitable combination of these types of memory. In one example, program code may be stored in the memory in a machine-readable format accessible by the processor. Additionally, the memory may store various data, data types, sensed or measured data values, input, generated or processed data, etc., accessible by the processor in providing instructions, control, and operations to produce functional or operable results, as described herein.

[0031] Also, as used herein, although sensors may be described as "sensing" or "measuring" respective values, sensing or measuring may include determining a value indicative of or related to the respective value, rather than directly sensing or measuring the value itself. The sensed or measured value may be further provided to additional components. For example, the value may be provided to a controller or processor, which may perform processing on the value to determine a value representative of the value, or an electrical characteristic representative of the value.

[0032] Such controllers described herein may also compare a first value with a second value and operate or control the operation of additional components based on the comparison being true. As used herein, the term "true" or "true" of a comparison between a first value and a second value refers to a determination that the first value exceeds, does not exceed, or is equal to the second value, such that the comparison is true when true. Additionally, as used herein, the term "true" or "true" of a comparison between a first value and a value range refers to a determination that the first value is within the value range, such that the comparison is true when true. It will be understood that such determinations can be easily modified to be true by positive / negative or true / false comparisons. Exemplary comparisons may include comparing a sensed or measured value with a threshold or threshold range. For example, when a sensed, measured, or provided value is compared to another value or range, including a stored or predetermined value or range, the comparison may result in an action, function, or operation controllable by the control.

[0033] Additionally, as used herein, elements being "electrically connected," "electrically coupled," or "in signal communication" may include electrical transmission or signals being sent, received, or communicated between such connected or coupled elements. Further, such electrical connections or couplings may include wired or wireless connections, or a combination thereof.

[0034] As used herein, "reduction," "reduce," "reducing," etc. may refer to a relative value being smaller or lower than an initial value to which it is being compared. With respect to signal "noise," this reduction may be quantified based on typical electrical noise measurement techniques, including, but not limited to, measuring the root mean square (RMS) value of the "noise" using a voltmeter, measuring the noise power spectrum across different frequencies using a spectrum analyzer, noise figure measurements by measuring the degradation of the signal-to-noise ratio (SNR) as a signal passes through a device, combinations thereof, etc.

[0035] Referring now to the drawings, FIG. 1 illustrates a network architecture of multiple analog edge devices (e.g., MEMS devices) in a neural network used to remove noise in or denoise an input analog signal, according to one embodiment of the present disclosure. In one embodiment of the present disclosure, the input analog signal can be, for example, an audio signal such as speech. The neural network can be used, for example, for voice recognition (e.g., voice direction recognition). The input analog signal can also be a noisy signal, and the neural network can be used as an adaptive filter to operatively reduce or substantially remove noise in the noisy signal. The term substantially is used herein to mean removing at least 50% of the noise (e.g., removing at least 90%) in most applications. The neural network can also be used to recognize the type of one (or a set of simultaneously input) input analog signals and determine the direction (e.g., relative direction or orientation) of the source of the input analog signals. The input analog signal can also be, for example, a vibration signal (e.g., seismic motion), and the neural network can be used to recognize whether the vibration signal is an earthquake or another type of vibration and determine the location or direction of the source of the vibration. The input analog signal can be an image signal and the neural network can be used for image recognition. The neural network can be used to implement many applications in the analog domain.

[0036] FIG. 1 illustrates an input signal 100 provided to a first plurality of analog edge devices 102 (e.g., a plurality of MEMS devices). The input signal 100 may be, for example, an input analog signal having signal noise (e.g., a noisy audio signal). Each of the first plurality of analog edge devices 102 may be excited by the input signal 100 to convert the input signal 100 into mechanical motion. The mechanical motion in each of the plurality of first analog edge devices 102 is converted into a first output electrical signal to obtain a first plurality of output analog signals (collectively shown as 103). Each of the first plurality of analog signals 103 of each of the first plurality of analog edge devices 102 is input to an analog edge device in a second plurality of analog edge devices 104. In this embodiment of the disclosure, the first plurality of analog edge devices 102 (e.g., MEMS device computational neurons) are MEMS CTRNN neurons. In FIG. 1 , squares represent a first plurality of analog edge devices 102 (e.g., MEMS devices), and circles represent a second plurality of analog edge devices 104 (e.g., analog neurons implemented by FPGAs). In other embodiments of the present disclosure, both the first plurality of analog edge devices 102 (e.g., MEMS device neurons) and the second plurality of analog edge devices 104 (e.g., analog neurons implemented by FPGAs) can be arranged in the same layer of a neural network. In another embodiment of the present disclosure, the first plurality of analog edge devices 102 (e.g., MEMS device neurons) in the first layer can replace the second plurality of analog edge devices 104 (e.g., analog neurons) in the second layer. Examples of analog neurons include resistors, capacitors, operational amplifiers, programmable analog memories, and other electronic circuit components.

[0037] For example, a plurality of logic signals from a first analog edge device 102A (e.g., a MEMS device) in a first plurality of analog edge devices 102 (e.g., a MEMS device neuron) are input to a second plurality of analog edge devices 104 (e.g., an analog neuron), and a plurality of logic signals from a second analog edge device 102B are input to the second plurality of analog edge devices 104 (e.g., an analog neuron). Each analog edge device in the first plurality of analog edge devices 102 outputs a respective output analog signal 103 that is multiplied by a respective weight parameter to obtain a plurality of weighted signals. For example, a first output analog signal 103 by a first analog edge device 102A in the first plurality of analog edge devices 102 is multiplied by a first weight parameter to obtain a first weighted signal, and a second output analog signal 103 by a second analog edge device 102B in the first plurality of analog edge devices 102 is multiplied by a second weight parameter to obtain a second weighted signal. The weighted signals 103 are input to analog edge devices in a second plurality of analog edge devices 104. For example, the first weighted signal and the second weighted signal are input to a first analog edge device 104A in the second plurality of analog edge devices 104. The first plurality of analog edge devices 102 is in a first layer, and the second plurality of analog edge devices 104 is in a second layer.

[0038] Each analog edge device in the second plurality of analog edge devices 104 outputs an output analog signal 105 multiplied by a weight parameter to obtain a plurality of weighted signals (collectively shown as 105). For example, a first output analog signal 105 by a first analog edge device 104A in the second plurality of analog edge devices 104 is multiplied by a first weight parameter to obtain a first weighted signal, and a second output analog signal 105 by a second analog edge device 104B in the second plurality of analog edge devices 104 is multiplied by a second weight parameter to obtain a second weighted signal. The plurality of weighted signals are input to an analog edge device 106 (e.g., a MEMS neuron). The analog edge device 106 is in a third layer of the network. For example, a first weighted signal and a second weighted signal are input to the analog edge device 106 (e.g., a MEMS neuron). The second plurality of analog edge devices 104 and the analog edge device 106 (e.g., MEMS device neurons) can be implemented as an analog array. The second plurality of analog edge devices 104 are in a second layer, and the analog edge device 106 (e.g., MEMS neurons) are in a subsequent third layer. Although three layers are shown in FIG. 1 , the number of layers is not limited to two or three. There can be multiple layers (two or three layers), and this process can be repeated multiple times. The analog edge device 106 outputs an output signal 108. The output signal 108 corresponds to the input signal 100 operably corrected or operably filtered to substantially remove signal noise in the input signal 100. A neural network corresponding to the second plurality of analog edge devices 104 (neurons) and the analog edge device 106 (neurons) is trained to find appropriate weight parameters to multiply various signals to output the output signal 108 that is substantially or operably noise-free or has reduced noise compared to the input signal 100.

[0039] FIG. 2 illustrates an electronic circuit 200 illustrating interconnections between multiple analog edge devices (e.g., MEMS) for implementing an analog system for edge artificial intelligence using a neural network 201 and one or more field-programmable analog arrays (FPAAs) according to one embodiment of the present disclosure. As shown in FIG. 2 , the electronic circuit 200 includes multiple MEMS devices 202 (MEMS neurons). In one embodiment of the present disclosure, the multiple MEMS devices 202 (MEMS neurons) can convert an electrical analog input into a mechanical signal within the multiple MEMS devices 202, which then outputs an electrical signal via an analog front-end circuit. In a non-limiting embodiment of the present disclosure, each of the multiple MEMS devices 202 can be electrically connected to a corresponding electronic board within a plurality of electronic boards 204. The electronic circuit 200 also includes a main electronic board 206 (e.g., a printed circuit board (PCB)) for electrically connecting the multiple electronic boards 204. The electronic circuit 200 also includes one or more memory devices 208 (e.g., one or more field-programmable analog arrays (FPAAs)). The one or more memory devices 208 are also electrically connected to the main electronic board 206. The one or more memory devices 208 communicate with the plurality of MEMS devices 202 via the main electronic board 206. In one embodiment of the present disclosure, as shown in FIG. 2 , the one or more memory devices 208 in the electronic circuit 200 are one or more FPAAs. The one or more FPAAs used in the electronic circuit 200 can be used as at least one memory device 208, or one or more memory devices 208, although one or more ferroelectric memory devices, one or more resistive memory devices, one or more programmable analog memory devices, or the like can also be used as the one or more memory devices 208. The one or more memory devices 208 communicate with the plurality of MEMS devices 202. The one or more memory devices 208 are used to store the weight parameters discussed above.The electronic circuit 200 is powered via a power line 209. The electronic circuit 200 includes a plurality of input ports 210 connected to a main electronic board 206. Input analog signals are input via the plurality of input ports 210 and transmitted to a plurality of MEMS devices 202 (MEMS neurons) via the main electronic board 206. Output signals from the plurality of MEMS devices 202 are multiplied by weight parameters stored in one or more memory devices 208 to implement a neural network, as shown in FIG.

[0040] The electronic circuit 200 also includes an output port 212 connected to the main electronic board 206. An output signal from the neural network of the plurality of MEMS devices 202 is output via the output port 212. In one embodiment of the present disclosure, the neural network 201 may be, for example, a CTRNN. In the electronic circuit 200 used to implement a neural network, the plurality of neurons in the neural network 201 are implemented using a plurality of MEMS devices 202 (MEMS neurons or MEMS CTRNNs). For example, referring to FIG. 1 , an input signal 100 (e.g., the “noisy” audio signal described with reference to FIG. 1 ) is input via one or more input ports 210, and an output signal (such as the corrected or filtered output signal 108 of FIG. 1 ) is output via the output port 212. Weight parameters used to multiply various signals output by the first plurality of analog edge devices 102 (e.g., MEMS device neurons) and the second plurality of analog edge devices 104 (e.g., analog neurons) are stored in a plurality of memory devices 208 (e.g., FPGAs). For example, by using multiple input ports 210 instead of a single input port, the directionality of an input analog signal (e.g., an audio signal) can be determined by processing (e.g., comparing) the input analog signal using a neural network 201 (e.g., a CTRNN).

[0041] The neural network 201 (e.g., a CTRNN) can use multi-layer hierarchical MEMS devices 202 (MEMS neurons) and analog electronics. In one embodiment of the present disclosure, the MEMS devices 202 (MEMS neurons) can have electrostatic excitation and capacitive output. The analog electronics 203 can be constructed using an analog front end including the MEMS devices 202 and memory devices 208 (e.g., FPAAs). The MEMS devices 202 (MEMS neurons) have tunable time constants that can be controlled by voltage. Weight parameters are set in the memory devices 208 (e.g., FPAAs). The outputs from the MEMS devices 202 (MEMS neurons) are multiplied by the weight parameters and applied to the next layer of neurons (MEMS devices or analog edge devices) as described above with reference to FIG. 1.

[0042] The tunable time constant of the MEMS device allows the neural network 201 (e.g., a CTRNN) to learn salient information in temporal sequences. In one embodiment of the present disclosure, a CTRNN can also be constructed with MEMS devices having different time constants to perform temporal learning. In one non-limiting example, seismic activity can generate different types of seismic waves that travel through the Earth at different speeds. Primary waves (“P waves”) are the fastest, first-arriving signals, followed by slower secondary waves (“S waves”), which are then followed by surface waves. As described herein, non-limiting embodiments of the present invention can include MEMS neurons of an edge AI computer that can adjust their time constants based on the different seismic waves they are monitoring.

[0043] FIG. 3 is a schematic diagram of an exemplary MEMS device (MEMS neuron) 300 according to one embodiment of the present disclosure. The MEMS device 300 is an electromechanical device that can be controlled by an electrical input signal by applying voltages to various input ports of the MEMS device 300. For example, the MEMS device has an excitation port 302, a detection port 304, and a tuning port 306. Referring back to FIG. 1 , an input signal 100 is input via the excitation port 302, and an output analog signal 103 is output via the detection port 304. The output analog signal 103 is multiplied by a corresponding weight parameter and summed with output signals from other analog edge devices, such as in the first plurality of analog edge devices, that are also multiplied by corresponding weight parameters. The sum of these weighted output signals is fed to the input of the next neuron, e.g., 104. A MEMS neuron is characterized by a tunable time constant, which is a variable tuning voltage input via the tuning port 306. The various weight parameters and various tuning voltage parameters are stored, for example, in a plurality of memory devices 208 (e.g., the FPGA shown in FIG. 2). Multiplication, addition, and nonlinear activation functions such as sign mod, bipolar tangent, ReLU (Rectified Linear Unit), etc. are implemented, for example, in multiple memory devices 208 (e.g., FPAA). Other aspects of the disclosure of these functions can be analog units such as resistors, capacitors, operational amplifiers, etc.

[0044] FIG. 4 is a schematic diagram of a MEMS device 400 used as a neuron to implement a neural network, according to one embodiment of the present disclosure. The MEMS device 400 includes a frame 402, one or more anchors 404, and a plurality of springs 406. The one or more anchors 404 secure the plurality of springs 406 to the frame. Applying a voltage via an input signal exerts an electrostatic force on the plurality of springs 406. As a result, the plurality of springs 406 move, which changes the capacitance of the MEMS device 400 and, therefore, ultimately, changes the output voltage or current of the output signal. In addition, the frame 402 can be moved by applying a voltage. The input signal 100 is applied via the excitation port 302, which moves the frame 402. In this embodiment of the present disclosure, the movement of the frame 402 is detected via the detection port 304 through the change in capacitance. Finally, an amplifier in the analog front end or interface circuit converts the change in capacitance into the output voltage or current of the output signal.

[0045] FIG. 5 is a plot illustrating a noisy input analog signal, a denoised output analog signal, and a comparative ground truth analog signal according to one embodiment of the present disclosure. The X-axis represents time. The Y-axis represents voltage. The plot shown in FIG. 5 is an example plot in which an input analog signal 502, such as noisy input signal 100, includes high-frequency fluctuating components above low-frequency fluctuating components. The output analog signal 504 is a smoothed signal in which the amplitude of the high-frequency noise components has been substantially reduced. The term “substantially” is used herein to mean that the high-frequency components simulating noise are reduced by at least 50% (e.g., reduced by at least 90%). The input analog signal 502 corresponds to the input signal (e.g., input signal 100) provided to the neural network. One goal is for the neural network training to learn through comparison of the output analog signal 504 (denoised analog signal) with the ground truth analog signal 506 to determine the best weight parameters that minimize the error between the output analog signal 504 (denoised analog signal) and the ground truth analog signal 506. In one non-limiting exemplary aspect of the present disclosure, the comparison of the output analog signal 504 with the ground truth signal 506 can operatively modify the weight parameters for successive multiplication or weighting of the analog signal by the modified weight parameters, where the modification of the weight parameters reduces the error between the output analog signal 504 (denoised analog signal) and the ground truth analog signal 506. The goal of the neural network inference is to process the input analog signal 502 through the network using the learned weight parameters such that the output analog signal 504 (denoised analog signal) has significantly reduced noise.

[0046] Denoising the input analog signal is performed using a neural network in which multiple MEMS neurons (MEMS devices) are used.

[0047] The MEMS device (neuron) can be modeled using the following equation (1):

[0048]

number

[0049] where the term Z corresponds to the displacement converted to a current and / or voltage associated with the output analog signal of the MEMS device, and the term V i corresponds to the input signal, and w o corresponds to the natural frequency of the MEMS device, ζ is the damping ratio, and V m is the voltage applied to adjust the weight parameter, d is the electrode gap, and V b is the bias voltage, m is the mass, A is the exchange electrode gap, and ε is the vacuum permittivity.

[0050] Second-order terms

[0051]

number

[0052] By ignoring, equation (1) can be approximated as equation (2),

[0053]

number

[0054] and the time delay t is determined by equation (3).

[0055]

number

[0056] Equation (3) shows that the time delay t depends, among other parameters, on the voltage V mAs a result, the voltage V applied to adjust the weight parameters depends on m The time delay or time constant t can be adjusted by adjusting V. MEMS devices have an initial setting time constant that is determined by the design, geometry, and other physical parameters of the components of the MEMS device. The initial setting time constant can also change with temperature, or more generally, the environmental conditions of the MEMS device, such as temperature, humidity, etc. To provide more control over the time constant of a MEMS device, the time constant of a MEMS device can be adjusted or changed by applying a voltage or current to the MEMS device. A voltage V m is used to adjust the time constant. The MEMS device naturally solves equation (1) or (2) by using an input signal (voltage or current to control displacement) and a control parameter (e.g., voltage or current to control time) to provide an output signal (voltage and / or current).

[0057] In one aspect of the present disclosure, a CTRNN using MEMS devices can directly process input analog signals and use the recursive nature of neural networks to learn temporal information, which is achieved through the self-feedback memory enabled by electrostatic MEMS devices.

[0058] FIG. 6 is a flow diagram of a machine learning algorithm (e.g., CTRNN) using a neural network to solve ordinary differential equations, according to one embodiment of the present disclosure. FIG. 6 shows an ordinary differential equation (ODE) solver 600 implemented using a neural network 602 in an analog edge device (e.g., a MEMS device). The neural network 602 can implement a CTRNN model 610. The neural network 602 receives an input analog signal 604 and outputs an output analog signal 606. A time constant parameter of the analog edge device (e.g., a MEMS device) is controlled based on the analog edge device's environment 608, as described above.

[0059] FIG. 7 is a schematic diagram illustrating an example implementation of multi-layer hierarchical differential target propagation for in situ training of a MEMS CTRNN, according to one embodiment of the present disclosure. As shown in FIG. 7, a neural network 700 having a neuron layer 702 of an analog edge device (e.g., a MEMS device) is configured to receive one or more input analog signals 704, such as input signal 100. In one embodiment of the present disclosure, the neural network 700 is a CTRNN that is trained in situ using the one or more input analog signals 704 to provide an output analog signal 706 to an analog edge device 708 (e.g., a MEMS neuron). The use of in situ training can solve two problems that have limited analog computers in the past: (i) analog hardware variability and (ii) analog hardware drift. The neural network (e.g., a CTRNN) can learn parameters based on the individual edge hardware. Neural networks (e.g., CTRNNs) can recalibrate themselves through re-learning to mitigate drift due to environmental factors (e.g., to compensate for environmental effects that change the time constant), as shown in Figure 6.

[0060] The inference path can include a neural network 700 having a neuron layer 702. Typically, the inference path uses weight parameters, including time constant parameters, set in the CTRNN. However, in this case, the CTRNN is also trained in situ using one or more input analog signals 704. As a result, instead of the standard backpropagation algorithm in which weight gradients are determined by propagating global loss errors backward through the network, differential target propagation (DTP) is used to enable weight parameter updates in local layers. This allows in situ training to occur at local layers, which greatly simplifies analog circuit design. For example, the first layer 710A in the neuron layer 710, which provides a prediction of the time constant T2, can be locally backpropagated to the last layer 702A in the neuron layer 702. Similarly, the second layer 710B in the neuron layer 710, which provides a prediction of the time constant T1, can be locally backpropagated to the layer 702B in the neuron layer 702. This feature, called differential target propagation (DTP), is used to enable weight updates in local layers.

[0061] FIG. 8 is a flow diagram illustrating details of a differential target propagation scheme used by a CTRNN according to one embodiment of the present disclosure. As shown in FIG. 8, a continuous-time autoregressive recursive neural network uses a training pass 802 and a forward or inference pass 804. The forward inference pass 804 corresponds to neuron layer 702 shown in FIG. 7, and the training pass 802 corresponds to neuron layer 710 shown in FIG. 7. The training pass 802 has multiple neuron target layers (layer 0 and layer 1), and the forward pass 804 has multiple neuron layers (layer 0, layer 1, and layer 2). Each neuron layer is controlled by inputting weights using a weight estimator. The weights are updated in situ in real time at local layers (layer 0, layer 1, layer 2, etc.) instead of the standard backpropagation algorithm, in which weight gradients are determined by propagating a global loss error back through the neural network (e.g., CTRNN). This allows in situ training to occur at the local layers, which greatly simplifies analog circuit design.

[0062] FIG. 8 illustrates one non-limiting example of an embodiment of the present disclosure, such as a differential target propagation (DTP) technique. The DTP method allows targets for all neurons in a network to be calculated or generated and used to estimate weights using weight estimators local to each neuron. This is done by constructing an additional neural network (NN) layer, called a target layer, arranged as a "mirror image" of the inference NN, as shown inside the "dashed box" 802 in FIG. 8. The inference path and target signal of the Nth layer are used to generate targets for the N-1th layer, which are then used to generate targets for the N-2th layer, and so on. At each layer of the network, each weight estimator belonging to a neuron receives the target signal and then subtracts it from the neuron's output. The result of the subtraction is then multiplied by one of the inputs and then integrated to generate the value of the weight that needs to be applied to that given input.

[0063] In one aspect of the present disclosure, weight parameters can be updated using differential target propagation in a CTRNN. The CTRNN uses an autoencoder-type architecture to establish intermediate targets. The weight updates are based on local layer information to provide in-situ training to mitigate temporal drift in the CTRNN's multiple analog edge devices.

[0064] MEMS analog edge devices are provided that can perform edge artificial intelligence (AI) computing at relatively low power and relatively high speeds (e.g., more than hundreds of times faster and with more than hundreds of times less power) compared to existing digital computing architectures. The term "edge" is used throughout this specification to mean computing devices at the edge or end of a network architecture near users, such as mobile phones, sensors, or other network-connected devices. Analog computing is particularly powerful for edge AI applications where size, weight, and power (SWaP) play a critical role. In addition, analog computing is particularly powerful for edge AI applications where the majority of collected data is generated by analog edge devices (e.g., analog sensors). Performing AI computing in the analog domain can eliminate the need for bidirectional analog-to-digital conversion (ADC) and digital-to-analog conversion (DAC). In addition, analog continuous-time processing does not require data to be constantly moved in and out of memory, which solves one of the major bottlenecks associated with digital architectures. As a result, by operating in the analog domain, high-speed (e.g., real-time, virtually no latency), ultra-low-power (e.g., mW to μW), and low-cost AI computing at the edge can be achieved. Additionally, in-situ training allows edge AI systems to mitigate the drift and variability of analog hardware. In-situ learning may be required for practical deployment of edge analog hardware.

[0065] The analog systems described herein can be configured to perform AI computing using natural physical phenomena as computational primitives without analog-to-digital conversion. The analog systems can be configured to perform AI computing at least two orders of magnitude faster and with at least two orders of magnitude lower energy consumption compared to traditional digital technologies.

[0066] In one aspect of the present disclosure, the analog edge computing device can be a MEMS device that has demonstrated over 300x power reduction and over 100x speed improvement compared to a digital workstation running the same AI program.

[0067] For example, MEMS devices used to implement machine learning (ML) algorithms (e.g., CTRNNs) can directly process input analog signals and use the recursive features of neural networks to learn temporal information. CTRNNs are deep learning models that account for irregular observations by incorporating continuous evolution of hidden states between observations. The recursive features are achieved through self-feedback memory enabled by electrostatic MEMS.

[0068] In one embodiment of the present disclosure, a MEMS device (e.g., a MEMS processor) is controlled by electrostatic excitation to provide a capacitive output. Analog electronics for the MEMS device can be constructed using an analog front end and a field programmable analog array (FPAA). The MEMS device has a tunable time constant that can be controlled by a voltage. Weights are set in the FPAA. The output from the MEMS device is multiplied by weight parameters and applied to the next neuron layer (MEMS or analog).

[0069] In one aspect of the present disclosure, the tunable time constant of the MEMS device enables the MEMS-CTRNN to learn salient information in temporal sequences. The CTRNN can also be constructed with MEMS devices with different time constants to perform temporal learning.

[0070] In one aspect of the present disclosure, instead of the standard backpropagation algorithm, where weight gradients are determined by propagating global loss errors back through the network, differential target propagation (DTP) can be used to enable weight updates at local layers. This allows in-situ training to be done at the local layers, which greatly simplifies analog circuit design.

[0071] In one aspect of the present disclosure, the use of in situ training solves two problems that have limited analog computers in the past: (1) analog hardware variability; the technique allows the neural network to learn parameters based on individual edge hardware; and (2) analog hardware drift; the technique allows the neural network to recalibrate itself through re-learning to mitigate environmental drift such as temperature and humidity.

[0072] Another problem of particular interest is in situ training for edge applications. To date, this problem has been largely unexplored by the analog computing community. Traditional stochastic gradient descent (SGD) training methods rely on backpropagation of errors through multiple layers of neural networks, which is extremely difficult to implement in analog hardware. Analog edge devices are different, and their characteristics can drift over time. In situ training allows each edge AI system to learn parameters based on its individual edge hardware. This also allows the edge AI system to recalibrate itself through retraining to mitigate analog hardware drift.

[0073] Performing AI computing in the analog domain eliminates the need for bidirectional analog-to-digital conversion. Analog continuous-time processing eliminates the need to constantly move data in and out of memory, which solves one of the major bottlenecks with digital architectures. This enables high-speed (real-time, no latency), ultra-low-power (mW to μW), and low-cost AI computing at the edge. Analog computing is particularly powerful for edge AI applications where smaller size, weight, and power (SWaP) are required and where the majority of the data collected is generated by analog sensors.

[0074] As a result, one aspect of the present disclosure provides a MEMS Continuous-Time Recurrent Neural Network (CTRNN) that leverages electrostatic MEMS neurons to achieve network computation in continuous time and the analog domain. Another aspect of the present disclosure is to provide in situ supervised training of the CTRNN, allowing it to learn directly in edge hardware using received analog information while self-correcting for analog hardware variations and drift.

[0075] It enables low SWaP and fast response edge AI, which can have many applications both inside and outside the aviation industry. Applications can be signal filtering (adaptive), prediction, tracking, classification, anomaly detection, or decoding information based on continuous signals. Edge AI can be deployed in autonomous platforms where SWaP is desired, such as UAVs, autonomous vehicles, and robots.

[0076] Further aspects are provided by the subject matter of the following sections.

[0077] 1. An analog system for edge artificial intelligence (AI) computing, the analog system comprising: an input port configured to receive an input analog signal; a first plurality of analog edge devices connected to the input port and configured to receive the input analog signal and output a first plurality of output analog signals; a second plurality of analog edge devices in communication with the first plurality of analog edge devices, the second plurality of analog edge devices configured to receive the first plurality of output analog signals from the first plurality of analog edge devices and output a second plurality of output analog signals; and a second plurality of analog edge devices connected to the first plurality of analog edge devices and the second plurality of analog edge devices. 1. An analog system comprising: at least one memory device in communication with a plurality of analog edge devices, the at least one memory device configured to store weight parameters, the weight parameters being tunable based on at least one of predetermined values ​​from offline training or real-time updates via in situ training; and an output port configured to output output analog signals, wherein a second plurality of output analog signals are multiplied by the weight parameters to obtain a plurality of weighted analog signals, and the plurality of weighted analog signals are output as the output analog signals via the output port.

[0078] The analog system of any preceding clause, wherein at least one memory device is one or more field programmable analog arrays (FPAA) or one or more programmable analog memories.

[0079] The analog system of any preceding paragraph, wherein the first plurality of analog edge devices and the second plurality of analog edge devices are trained to find weight parameters for operatively reducing signal noise in the output analog signal.

[0080] The analog system of any preceding clause, further including a plurality of electronic boards, wherein each of the first plurality of analog edge devices and the second plurality of analog edge devices is connected to a corresponding electronic board in the plurality of electronic boards; and a main electronic board, wherein the plurality of electronic boards and the at least one memory device are electrically connected to the main electronic board.

[0081] The analog system of any preceding claim, wherein the input analog signal has signal noise and the output analog signal corresponds to the input analog signal with the signal noise substantially reduced.

[0082] The analog system of any preceding paragraph in which the input analog signal is an audio signal.

[0083] The analog system of any preceding clause, wherein the analog system is configured to perform AI computing using natural physical phenomena as computational primitives without analog-to-digital conversion, and wherein the analog system is configured to perform AI computing at least two orders of magnitude faster and with at least two orders of magnitude lower energy consumption compared to conventional digital techniques.

[0084] The analog system of any preceding clause, wherein the first plurality of analog edge devices or the second plurality of analog edge devices, or both, comprise a plurality of microelectromechanical systems (MEMS) devices.

[0085] The analog system of any preceding clause, wherein a plurality of MEMS are configured to convert input analog signals to mechanical signals and convert mechanical signals to output analog signals, each of the plurality of MEMS having a tunable time constant controllable by a voltage.

[0086] The analog system of any preceding term, wherein the first plurality of analog edge devices, the second plurality of analog edge devices, and the memory device are part of a neural network, and each of the first plurality of analog edge devices and each of the second plurality of analog edge devices is a neuron in the neural network.

[0087] An analog system of any preceding term, where the neural network is a continuous time recurring neural network (CTRNN).

[0088] The analog system of any preceding term, wherein the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN have different time constants for performing temporal learning and for adjusting the time constants of the different time constants.

[0089] The analog system of the preceding paragraph, wherein the weight parameters are updated using differential target propagation in a CTRNN that uses an autoencoder-type architecture to establish intermediate targets, and the weight parameters are updated based on local layer information to provide in situ training of the CTRNN to mitigate temporal drift in the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN.

[0090] The analog system of any preceding term, allowing in situ training of the CTRNN to learn parameters based on individual analog edge devices.

[0091] The in situ training of the CTRNN allows the CTRNN to recalibrate itself through re-learning to mitigate analog hardware drift due to environmental factors, analog system of any preceding term.

[0092] Analog systems of any preceding term where analog drift due to environmental factors includes the change in time constant due to environmental factors.

[0093] 1. A method for processing an analog signal, the method comprising the steps of: receiving an input analog signal at an input port; receiving the input analog signal by a first plurality of analog edge devices connected to the input port; outputting a first plurality of output analog signals by the first plurality of analog edge devices; receiving a first plurality of output analog signals from the first plurality of analog edge devices by a second plurality of analog edge devices; outputting a second plurality of output analog signals by the second plurality of analog edge devices; and weighting the second plurality of output analog signals by the first plurality of analog edge devices and the second plurality of output analog signals to obtain a plurality of weighted analog signals. multiplying the weighted analog signals by weight parameters stored on at least one memory device in communication with a second plurality of analog edge devices, the weight parameters being tunable based on one of predetermined values ​​from offline training or real-time updates via in situ training; outputting the plurality of weighted analog signals as output analog signals via an output port; and comparing the output analog signals with ground truth analog signals to modify weight parameters for successive multiplications, the modified weight parameters reducing an error between the output analog signals and the ground truth analog signals.

[0094] The method of any preceding clause, wherein the input analog signal has signal noise and the output analog signal corresponds to the input analog signal with substantially reduced signal noise.

[0095] The method of any preceding clause, further comprising applying a voltage to control the time constant of the first plurality of analog edge devices or the second plurality of analog edge devices, or both.

[0096] The method of any preceding clause, further including: updating weight parameters using differential target propagation in a continuous-time recursive neural network (CTRNN) including a first plurality of analog edge devices, a second plurality of analog edge devices, and a memory device; and identifying weight parameters using local layer information based on differential target propagation to provide in situ training to mitigate temporal drift in the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN.

[0097] While the above description is directed to certain embodiments of the present disclosure, other variations and modifications will be apparent to those skilled in the art and may be made without departing from the present disclosure. Furthermore, features described with respect to one embodiment of the present disclosure may be used in combination with other embodiments, even if not explicitly set forth above.

[0098] Further aspects of the present invention are provided by means of the following clauses.

[0099] 1. An analog system for edge artificial intelligence (AI) computing, comprising: an input port configured to receive an input analog signal; a first plurality of analog edge devices connected to the input port and configured to receive the input analog signal and to output a first plurality of output analog signals; a second plurality of analog edge devices in communication with the first plurality of analog edge devices, the second plurality of analog edge devices configured to receive the first plurality of output analog signals from the first plurality of analog edge devices and to output a second plurality of output analog signals; at least one memory device in communication with the first plurality of analog edge devices and the second plurality of analog edge devices, the at least one memory device configured to store weight parameters, the weight parameters being tunable based on at least one of predetermined values ​​from offline training or real-time updates via in situ training; an output port configured to output an output analog signal, wherein a second plurality of output analog signals are multiplied by weighting parameters to obtain a plurality of weighted analog signals, and the plurality of weighted analog signals are output as the output analog signal via the output port.

[0100] 2. The analog system of any preceding clause, wherein at least one memory device is one or more field programmable analog arrays (FPAA) or one or more programmable analog memories.

[0101] 3. The analog system of any preceding paragraph, wherein the first plurality of analog edge devices and the second plurality of analog edge devices are trained to find weight parameters for operatively reducing signal noise in the output analog signal.

[0102] 4. The analog system of any preceding clause, further comprising: a plurality of electronic boards, wherein each of the first plurality of analog edge devices and the second plurality of analog edge devices is connected to a corresponding electronic board in the plurality of electronic boards; and a main electronic board, wherein the plurality of electronic boards and the at least one memory device are electrically connected to the main electronic board.

[0103] 5. The analog system of any preceding clause, wherein the input analog signal has signal noise and the output analog signal corresponds to the input analog signal with the signal noise substantially reduced.

[0104] 6. The analog system of any preceding paragraph, wherein the input analog signal is an audio signal.

[0105] 7. The analog system of any preceding clause, wherein the analog system is configured to perform AI computing using natural physical phenomena as computational primitives without analog-to-digital conversion, and wherein the analog system is configured to perform AI computing at least two orders of magnitude faster and with at least two orders of magnitude lower energy consumption compared to conventional digital techniques.

[0106] 8. The analog system of any preceding clause, wherein the first plurality of analog edge devices or the second plurality of analog edge devices, or both, comprise a plurality of microelectromechanical systems (MEMS) devices.

[0107] 9. The analog system of any preceding clause, wherein a plurality of MEMS devices are configured to convert input analog signals into mechanical signals and convert mechanical signals into output analog signals, each of the plurality of MEMS devices having a tunable time constant controllable by a voltage.

[0108] 10. The analog system of any preceding clause, wherein the first plurality of analog edge devices, the second plurality of analog edge devices, and the at least one memory device are part of a neural network, and each of the first plurality of analog edge devices and each of the second plurality of analog edge devices is a neuron in the neural network.

[0109] 11. An analog system of any preceding term, where the neural network is a continuous time recurring neural network (CTRNN).

[0110] 12. The analog system of any preceding term, wherein the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN have different time constants for performing time learning and for adjusting the time constants of the different time constants.

[0111] 13. The analog system of any preceding term, wherein the weight parameters are updated using differential target propagation in a CTRNN that uses an autoencoder-type architecture to establish intermediate targets, and the weight parameters are updated based on local layer information to provide in situ training of the CTRNN to mitigate temporal drift in the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN.

[0112] 14. Analog systems of any preceding term, allowing in situ training of CTRNNs to learn parameters based on individual analog edge devices.

[0113] 15. The analog system of any preceding term, where in situ training of the CTRNN allows the CTRNN to recalibrate itself through re-learning to mitigate analog hardware drift due to environmental factors.

[0114] 16. Analog hardware drift due to environmental factors. Analog systems of any preceding term, including time constant changes due to environmental factors.

[0115] 17. A method for processing an analog signal, comprising: receiving an input analog signal at an input port; receiving an input analog signal by a first plurality of analog edge devices connected to the input port; outputting a first plurality of output analog signals by a first plurality of analog edge devices; receiving, by a second plurality of analog edge devices, a first plurality of output analog signals from the first plurality of analog edge devices; outputting a second plurality of output analog signals by a second plurality of analog edge devices; multiplying the second plurality of output analog signals by weighting parameters stored on at least one memory device in communication with the first plurality of analog edge devices and the second plurality of analog edge devices to obtain a plurality of weighted analog signals, the weighting parameters being tunable based on one of predetermined values ​​from offline training or real-time updates via in situ training; outputting the plurality of weighted analog signals as an output analog signal via an output port; comparing the output analog signal with the ground truth analog signal to modify weight parameters for successive multiplications, the modified weight parameters reducing an error between the output analog signal and the ground truth analog signal; A method comprising:

[0116] 18. The method of any preceding clause, wherein the input analog signal has signal noise and the output analog signal corresponds to the input analog signal with substantially reduced signal noise.

[0117] 19. The method of any preceding clause, further comprising applying a voltage to control the time constant of the first plurality of analog edge devices or the second plurality of analog edge devices, or both.

[0118] 20. The method of any preceding clause, further including: updating weight parameters using differential target propagation in a continuous-time recursive neural network (CTRNN) including a first plurality of analog edge devices, a second plurality of analog edge devices, and a memory device; and identifying weight parameters using local layer information based on differential target propagation to provide in situ training to mitigate temporal drift in the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN. [Explanation of symbols]

[0119] 100 Input Signals 102 first plurality of analog edge devices 102A First Analog Edge Device 102B Second Analog Edge Device 103 first plurality of output analog signals, first plurality of analog signals, output analog signal, first output analog signal, second output analog signal, weighted signal 104 Second Multiple Analog Edge Devices, Neurons 104A First Analog Edge Device 105 weighted signal, output analog signal, first output analog signal, second output analog signal 106 Analog Edge Devices 108 Output Signal 200 Electronic circuits 201 Neural Networks 202 MEMS devices, multi-layer hierarchical MEMS devices 203 Analog Electronics 204 Electronic Board 206 Main electronic board 208 Memory Devices 209 Power Line 210 input ports 300 MEMS devices 302 Excitation port 304 Discovery Port 306 Tuning Port 400 MEMS devices 402 frames 404 Anchor 406 Spring 502 input analog signal 504 output analog signal 506 Ground truth analog signal, ground truth signal 600 Ordinary Differential Equation Solver (ODE) 602 Neural Networks 604 Input Analog Signal 606 Output Analog Signal 608 Environment 610 CTRNN model 700 Neural Networks 702 neuron layer 702A Last Layer 702B layer 704 input analog signal 706 Output Analog Signal 708 Analog Edge Device 710 Neuron Layer 710A First Layer 710B Second Layer 802 Training Pass 804 forward path or inference path, forward inference path, forward path

Claims

1. 1. An analog system for edge artificial intelligence (AI) computing, the analog system comprising: an input port configured to receive an input analog signal; a first plurality of analog edge devices connected to the input port and configured to receive the input analog signals and to output a first plurality of output analog signals; a second plurality of analog edge devices in communication with the first plurality of analog edge devices, the second plurality of analog edge devices configured to receive the first plurality of output analog signals from the first plurality of analog edge devices and to output a second plurality of output analog signals; at least one memory device in communication with the first plurality of analog edge devices and the second plurality of analog edge devices, the at least one memory device configured to store weight parameters, the weight parameters being tunable based on at least one of predetermined values ​​from offline training or real-time updates via in situ training; and an output port configured to output output analog signals, wherein the second plurality of output analog signals are multiplied by the weighting parameters to obtain a plurality of weighted analog signals, and the plurality of weighted analog signals are output as the output analog signals via the output port; and An analog system comprising:

2. 10. The analog system of claim 1, wherein the at least one memory device is one or more field programmable analog arrays (FPAA) or one or more programmable analog memories.

3. 2. The analog system of claim 1, wherein the first plurality of analog edge devices and the second plurality of analog edge devices are trained to find the weight parameters for operatively reducing signal noise in the output analog signal.

4. a plurality of electronic boards, wherein each of the first plurality of analog edge devices and the second plurality of analog edge devices is connected to a corresponding electronic board within the plurality of electronic boards; a main electronic board, the plurality of electronic boards and the at least one memory device being electrically connected to the main electronic board; The analog system of claim 1 further comprising:

5. 10. The analog system of claim 1, wherein the input analog signal has signal noise and the output analog signal corresponds to the input analog signal with the signal noise substantially reduced.

6. 2. The analog system of claim 1, wherein the input analog signal is an audio signal.

7. 10. The analog system of claim 1, wherein the analog system is configured to perform AI computing using natural physical phenomena as computational primitives without analog-to-digital conversion, and wherein the analog system is configured to perform AI computing at least two orders of magnitude faster and with at least two orders of magnitude lower energy consumption compared to conventional digital techniques.

8. 10. The analog system of claim 1, wherein the first plurality of analog edge devices, the second plurality of analog edge devices, or both comprise a plurality of microelectromechanical systems (MEMS) devices.

9. 9. The analog system of claim 8, wherein the plurality of MEMS devices are configured to convert the input analog signal to a mechanical signal and convert the mechanical signal to an output analog signal, each of the plurality of MEMS devices having a tunable time constant controllable by a voltage.

10. 2. The analog system of claim 1, wherein the first plurality of analog edge devices, the second plurality of analog edge devices, and the at least one memory device are part of a neural network, and each of the first plurality of analog edge devices and each of the second plurality of analog edge devices is a neuron in the neural network.

11. 11. The analog system of claim 10, wherein the neural network is a continuous-time recursive neural network (CTRNN).

12. 12. The analog system of claim 11, wherein the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN have different time constants for performing time learning and for adjusting the time constants of the different time constants.

13. 13. The analog system of claim 12, wherein the weight parameters are updated using differential target propagation in the CTRNN that uses an autoencoder type architecture to establish intermediate targets, and the weight parameters are updated based on local layer information to provide in situ training of the CTRNN to mitigate temporal drift in the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN.

14. 14. The analog system of claim 13, wherein the in situ training of the CTRNN enables learning parameters based on individual analog edge devices.

15. 14. The analog system of claim 13, wherein the in situ training of the CTRNN enables the CTRNN to recalibrate itself through relearning to mitigate analog hardware drift due to environmental factors.

16. 16. The analog system of claim 15, wherein the analog hardware drift due to the environmental factors includes a change in a time constant due to the environmental factors.

17. 1. A method for processing an analog signal, said method comprising: receiving an input analog signal at an input port; receiving the input analog signal by a first plurality of analog edge devices connected to the input port; outputting a first plurality of output analog signals by the first plurality of analog edge devices; receiving, by a second plurality of analog edge devices, the first plurality of output analog signals from the first plurality of analog edge devices; outputting a second plurality of output analog signals by the second plurality of analog edge devices; multiplying the second plurality of output analog signals by weighting parameters stored on at least one memory device in communication with the first plurality of analog edge devices and the second plurality of analog edge devices to obtain a plurality of weighted analog signals, the weighting parameters being tunable based on one of predetermined values ​​from offline training or real-time updates via in-situ training; outputting the plurality of weighted analog signals as an output analog signal via an output port; comparing the output analog signal with a ground truth analog signal to modify the weight parameters for successive multiplications, the modified weight parameters reducing an error between the output analog signal and the ground truth analog signal; A method comprising:

18. 18. The method of claim 17, wherein the input analog signal has signal noise and the output analog signal corresponds to the input analog signal with the signal noise substantially reduced.

19. 18. The method of claim 17, further comprising applying a voltage to control a time constant of the first plurality of analog edge devices or the second plurality of analog edge devices, or both.

20. 18. The method of claim 17, further comprising: updating weight parameters using differential target propagation in a continuous-time recursive neural network (CTRNN) including the first plurality of analog edge devices, the second plurality of analog edge devices, and the memory device; and identifying the weight parameters using local layer information based on differential target propagation to provide in situ training to mitigate temporal drift in the first plurality of analog edge devices and the second plurality of analog edge devices of the CTRNN.

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