Operational amplifier

Abstract

To provide an operational amplifier in which stability is improved while suppressing increase in circuit current.SOLUTION: The operational amplifier 100 includes an input stage 102 including a differential pair 112 and a tail current source 114 that generates a tail current I1, a feed-forward path 140 that bypasses the input stage, a gain stage 120, and an output stage 130 including a push-pull circuit including a high-side transistor 132 and a low-side transistor 134 and a bias current source 136 that supplies an idle current I3 to the push-pull circuit. The tail current I1 of the input stage 102 is adjusted so that the zeros of the pre-stage 104, including the input stage 102 and the gain stage 120, are lower than the poles of the output stage 130.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to operational amplifiers. [Background technology]

[0002] An operational amplifier (differential amplifier) ​​is used to amplify the difference between two input voltages. Gain margin and phase margin are indicators of the stability of an operational amplifier.

[0003] To improve the phase margin, a commonly used technique is to increase the idle current (bias current) of the output stage and lower the output impedance, thereby shifting the second pole to the high-frequency region. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 7001468 Summary of the Invention [Problem to be solved by the invention]

[0005] However, the above method has a problem in that the operating current of the circuit increases in exchange for improving the phase margin.

[0006] The present disclosure has been made in light of this situation, and one exemplary purpose of an embodiment thereof is to provide an operational amplifier with improved stability while suppressing an increase in circuit current. [Means for solving the problem]

[0007] An operational amplifier according to an embodiment of the present disclosure includes an input stage, a feedforward path that bypasses the input stage, a gain stage, and an output stage, and the tail current of the input stage is adjusted so that the zero of the preceding stages, including the input stage and the gain stage, is lower than the pole of the output stage.

[0008] Another aspect of the present disclosure is also an operational amplifier. The operational amplifier includes an input stage, a feedforward path that bypasses the input stage, a gain stage, and an output stage. The tail current of the input stage is adjusted so that the frequency characteristics of the three stages, the input stage, the gain stage, and the output stage, have zeros.

[0009] Any combination of the above components, or mutual substitution of components or expressions between methods, devices, systems, etc. are also valid aspects of the present invention. [Effects of the Invention]

[0010] According to certain aspects of the present disclosure, the stability of an operational amplifier can be improved. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a block diagram of an operational amplifier according to an embodiment. [Figure 2] FIG. 2 is a diagram illustrating the gain characteristics and phase characteristics of an operational amplifier according to the comparative technique. [Figure 3] FIG. 3 is a diagram illustrating the gain characteristics and phase characteristics of the operational amplifier according to the embodiment. [Figure 4] FIG. 4 is a circuit diagram of an operational amplifier according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. This summary is not an exhaustive overview of all possible embodiments, and is not intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0013] In one embodiment, an operational amplifier includes an input stage, a feed-forward path that bypasses the input stage, a gain stage, and an output stage, and the tail current of the input stage is adjusted so that the zero of the preceding stages, including the input stage and the gain stage, is lower than the pole of the output stage.

[0014] In one embodiment, the frequency characteristics of three stages, the input stage, the gain stage, and the output stage, may have zeros.

[0015] An operational amplifier according to one embodiment includes an input stage, a feed-forward path that bypasses the input stage, a gain stage, and an output stage, and the tail current of the input stage is adjusted so that the frequency characteristics of the three stages, the input stage, the gain stage, and the output stage, have zeros.

[0016] In one embodiment, the operational amplifier may further comprise a feed-forward path that bypasses the input stage.

[0017] (Embodiment) The present disclosure will be described below with reference to the drawings based on preferred embodiments. The same or equivalent components, parts, and processes shown in each drawing will be given the same reference numerals, and redundant explanations will be omitted as appropriate. Furthermore, the embodiments are examples rather than limitations on the invention or disclosure, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention or disclosure.

[0018] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or impair the functions or effects achieved by their combination.

[0019] Similarly, "a state in which component C is provided between component A and component B" includes not only a case in which component A and component C, or component B and component C, are directly connected, but also a case in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or impair the functions or effects achieved by their combination.

[0020] 1 is a block diagram of an operational amplifier 100 according to an embodiment. The operational amplifier 100 includes an input stage 110, a gain stage 120, an output stage 130, and a feedforward path 140.

[0021] The input stage 110 includes a differential pair 112, a tail current source 114, and a load circuit (eg, a current mirror load or a resistive load) not shown.

[0022] The feedforward path 140 is connected between the input and output of the input stage 110. The feedforward path 140 sends high-frequency components of the input signal to the gain stage 120, bypassing the input stage 110. The high-frequency components are in a frequency band higher than the pole of the input stage 110.

[0023] The gain stage 120 amplifies the signal that has passed through the input stage 110 or the feedforward path 140 .

[0024] The input stage 110 and the feedforward path 140 are collectively referred to as the first stage 102. The input stage 110, the feedforward path 140, and the gain stage 120 are collectively referred to as the front stage 104.

[0025] The output stage 130 receives the output signal of the preceding stage 104. The output stage 130 includes a push-pull circuit including a high-side transistor 132 and a low-side transistor 134, and a bias current source 136 that supplies an idle current I3 to the push-pull circuit.

[0026] The above is the configuration of the operational amplifier 100.

[0027] Before describing the phase compensation of the operational amplifier 100 according to the embodiment, the phase compensation according to a comparative technique will be described.

[0028] 2 is a diagram illustrating the gain and phase characteristics of an operational amplifier according to the comparative technology. G1 represents the frequency characteristic of the initial stage 102, G2 represents the frequency characteristic of the gain stage 120, and G3 represents the frequency characteristic of the output stage 130. G1+G2 represents the frequency characteristic of the preceding stage 104. The gain characteristic of the preceding stage 104 is the product of the gain characteristic of the initial stage 102 and the gain characteristic of the gain stage 120.

[0029] The first stage 102 has a parallel connection of an input stage 110 path through which low-frequency components pass and a feedforward path 140 through which high-frequency components pass, and has a zero at the frequency at the boundary between the high-frequency components and the low-frequency components. Therefore, the frequency characteristic G1+G2 of the previous stage 104 also has a zero 202 at the same position.

[0030] The output stage 130 has a pole 204 that corresponds to the magnitude of the idle current I3. Specifically, the higher the idle current I3, the higher the frequency of the pole 204 becomes.

[0031] In the comparison technique, the idle current I3 is set large so that the pole 204 of the output stage 130 approaches the zero 202 of the previous stage 104.

[0032] As a result, the frequency of the second pole 206 becomes higher, and a wider band can be achieved.

[0033] However, in the comparative technology, the idle current I3 must be set large, which increases the operating current of the operational amplifier. In addition, the sizes of the high-side transistor 132 and the low-side transistor 134 must be increased to accommodate the large idle current I3, which increases the circuit area of ​​the operational amplifier.

[0034] Next, the phase compensation of the operational amplifier 100 according to the embodiment will be described.

[0035] 3 is a diagram illustrating the gain and phase characteristics of the operational amplifier 100 according to the embodiment. In this embodiment, the tail current I1 of the input stage 110 is set smaller than that of the comparative technique so that the position of the pole 302 of the input stage 110 is lower. As a result, the zero 304 of the preceding stage 104 is also shifted to a lower frequency side than that of the comparative technique. In other words, the zero 304 is lower than the pole 306 of the output stage 130.

[0036] As a result, a phase return effect 308 appears significantly at the zero 304. This improves the phase margin and the stability of the operational amplifier 100.

[0037] According to the operational amplifier 100 of the embodiment, the tail current I1 of the input stage 110 can be reduced compared to the conventional case, thereby reducing the operating current of the entire operational amplifier 100.

[0038] Furthermore, since the tail current I1 of the input stage 110 is reduced, the area of ​​the input stage 110 can be reduced.

[0039] Next, a specific example of the configuration of the operational amplifier 100 will be described.

[0040] 4 is a circuit diagram of an operational amplifier 100A according to an embodiment. The input stage 110 includes a differential pair 112, a tail current source 114, a load circuit 116, a common-mode feedback circuit 118, and a phase compensation circuit 119. The common-mode feedback circuit adjusts the impedance of the load circuit 116 so that the common-mode voltage of the differential output signal of the input stage 110 approaches a reference voltage Vbias4. The tail current source 114 is a PMOS transistor that generates a tail current I1 according to a bias voltage Vbias1 applied to its gate.

[0041] The gain stage 120 includes a first differential pair 122, a first tail current source 124, a second differential pair 126, a second tail current source 128, and an output control section 129. The first differential pair 122 receives the differential output signal of the initial stage 102. The second differential pair 126 receives the differential input signal bypassed by a feedforward path 140. The first tail current source 124 supplies a tail current to the first differential pair 122, and the second tail current source 128 supplies a tail current to the second differential pair 126.

[0042] The outputs of the first differential pair 122 and the second differential pair 126 are connected in common to the input of an output control unit 129. The output control unit 129 includes a load circuit provided in common to the first differential pair 122 and the second differential pair 126, adds and amplifies the differential outputs of the first differential pair 122 and the second differential pair 126, and controls the subsequent output stage 130. In this embodiment, the output stage 130 is class AB and includes a high-side transistor 132 and a low-side transistor 134.

[0043] As described above, in the embodiment, the tail current I1 of the first stage 102 can be reduced compared to the conventional case. That is, the size of the PMOS transistor that configures the tail current source 114 can be reduced, and the area of ​​the input stage 110 is thereby reduced.

[0044] Although FIG. 4 illustrates a class AB output stage 130, the present disclosure is not limited thereto and is also applicable to a class A output stage.

[0045] The embodiments are merely examples, and it will be understood by those skilled in the art that there are various variations in the combination of each component and each treatment process, and that such variations are also included in the present disclosure and can constitute the scope of the present invention. [Explanation of symbols]

[0046] 100 Op-Amps 102 First Dan 104 First stage 110 Input Stage 112 differential pair 114 Tail Current Source 116 Load circuit 120 gain stage 122 1st differential pair 124 First tail current source 126 Second differential pair 128 Second tail current source 129 Output control section 130 Output Stage 140 Feedforward Path

Claims

1. an input stage, a feedforward path bypassing the input stage, a gain stage, and an output stage; An operational amplifier, wherein a tail current of the input stage is adjusted so that a zero of a preceding stage including the input stage and the gain stage is lower than a pole of the output stage.

2. 2. The operational amplifier according to claim 1, wherein frequency characteristics of three stages, the input stage, the gain stage, and the output stage, have zeros.

3. an input stage, a feedforward path bypassing the input stage, a gain stage, and an output stage; An operational amplifier, wherein a tail current of the input stage is adjusted so that frequency characteristics of three stages, namely the input stage, the gain stage and the output stage, have zeros.

Images