Multilayer printed circuit board and its manufacturing method

Abstract

Improves solder wetting. [Solution] A multilayer printed circuit board (100) includes a plurality of stacked substrates (10), through holes (20) formed through the plurality of substrates (10), a conductor layer (30) formed around the through holes (20), a thermal processing pattern (50) formed around the through holes (20) from which the conductor layer (30) has been removed, and a connection pattern (60) formed adjacent to the thermal processing pattern (50) from which the conductor layer (30) has not been removed. The conductor layer (30) has a first pattern (31) arranged around the through holes (20) that is thin (35 μm), and a second pattern (32) arranged outward of the first pattern (31) that is thicker (70 μm) than the first pattern (31). The first pattern (31) includes a connection pattern (60). Because the first pattern (31) is thin, the connection pattern (60) can be made thinner, reducing heat loss around the through holes (20) and improving soldering.

Description

[Technical Field]

[0001] The present invention relates to a multilayer printed circuit board and a method for manufacturing the same. [Background technology]

[0002] As conventional techniques, techniques such as those disclosed in Patent Documents 1 to 4 have been disclosed. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 05-067879 [Patent Document 2] Japanese Patent Publication No. 2020-088321 [Patent Document 3] Japanese Patent Application Laid-Open No. 2001-007456 [Patent Document 4] Japanese Patent Application Laid-Open No. 2005-286122 Summary of the Invention [Problem to be solved by the invention]

[0004] Although various techniques have been proposed as conventional techniques, there is a demand for a multilayer printed circuit board capable of improving solder wicking and a method for manufacturing the same.

[0005] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a multilayer printed circuit board capable of improving solder wicking and a method for manufacturing the same. [Means for solving the problem]

[0006] The present invention employs the following solutions. Note that the solutions below are merely examples, and the present invention is not limited to these. The present invention can be an invention that includes at least one of the invention-specifying matters shown in the solutions below. Furthermore, each invention-specifying matter shown in the solutions below can be made into a subordinate concept by adding an element that limits the invention-specifying matter, or can be made into a superordinate concept by removing an element that limits the invention-specifying matter.

[0007] The multilayer printed circuit board of the solution is a multilayer printed circuit board that includes, for example, a plurality of stacked substrates, through holes formed through the plurality of substrates, and a conductor layer formed around the through holes, wherein the conductor layer is characterized in that a first pattern arranged around the through holes has a thin thickness, and a second pattern arranged outside the first pattern has a thicker thickness than the first pattern.

[0008] In addition, the method for manufacturing a multilayer printed circuit board of the solution is, for example, a method for manufacturing a multilayer printed circuit board that includes the following steps: a preparation step of preparing a substrate having a conductor layer and a core material; a point etching step of etching a portion of the conductor layer; a first plating step of forming plating of the conductor layer on the substrate; a lamination step of stacking a plurality of the substrates; a through-hole forming step of forming through-holes in the portions of the stacked substrates where the conductor layer has been etched; and a second plating step of forming plating of the conductor layer on the inside of the through-holes and on the upper and lower surfaces of the stacked plurality of substrates. [Effects of the Invention]

[0009] According to the present invention, it is possible to provide a multilayer printed circuit board capable of improving solder wicking and a method for manufacturing the same. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a diagram showing a multilayer printed circuit board 100 according to an embodiment. [Figure 2]2A to 2C are sequential views showing a method for manufacturing a multilayer printed circuit board 100 according to an embodiment. [Figure 3] 2A to 2C are sequential views showing a method for manufacturing a multilayer printed circuit board 100 according to an embodiment. [Figure 4] 2A to 2C are sequential views showing a method for manufacturing a multilayer printed circuit board 100 according to an embodiment. [Figure 5] FIG. 1 is a diagram showing a multilayer printed circuit board 100A of a comparative example. [Figure 6] 1A to 1C are sequential views showing a method for manufacturing a multilayer printed circuit board 100A of a comparative example. [Figure 7] 1A to 1C are sequential views showing a method for manufacturing a multilayer printed circuit board 100A of a comparative example. [Figure 8] 1A to 1C are sequential views showing a method for manufacturing a multilayer printed circuit board 100A of a comparative example. [Figure 9] FIG. 10 is a diagram showing an example (X-ray radiograph) of a state in which solder is filled into through-holes after flow soldering in a multilayer printed circuit board 100A of a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the following embodiment is shown as a preferred example of a multilayer printed circuit board, and the present invention is not limited to this example.

[0012] FIG. 1 is a diagram showing a multilayer printed circuit board 100 according to an embodiment. The multilayer printed circuit board 100 includes a substrate 10, through holes 20, a conductor layer 30, an insulating layer 40, a thermal processing pattern 50 (removed portion), and a connection pattern 60 (non-removed portion).

[0013] The substrate 10 is a plate-like member made of resin or the like, and multiple substrates 10 are stacked in the vertical direction. In the illustrated example, three substrates 10 are stacked, but the number of layers is not limited to this. The through holes 20 are holes formed by penetrating the plurality of base materials 10, and are formed in the center portion of the multilayer printed circuit board 100 from the top end to the bottom end.

[0014] The conductor layer 30 is a layer formed by copper foil or copper plating, and is disposed in locations including around the through-holes 20. Note that the conductor layer 30 may be formed of a metal other than copper. The conductor layer 30 includes a first pattern 31 and a second pattern 32. In the first pattern 31 and the second pattern 32, the thickness of the first pattern 31 arranged around the through hole 20 is thin (e.g., 35 μm), and the thickness of the second pattern 32 arranged outside the first pattern 31 is thicker than the thickness of the first pattern 31 (e.g., 70 μm).

[0015] The insulating layer 40 is a layer that adheres the base material 10 and insulates the conductor layer 30, and is a layer formed of, for example, prepreg (insulating adhesive material). The thermal processing patterns 50 are formed around the through holes 20 and are portions where the conductor layer 30 has been removed. Four thermal processing patterns 50 are formed, and each has a sectorial shape with the center removed in plan view. The connection pattern 60 is formed adjacent to the thermal processing pattern 50 and is a portion where the conductor layer 30 has not been removed. Four connection patterns 60 are formed, and each has a rectangular shape in plan view that extends radially from the through hole 20 as the center.

[0016] The first pattern 31 includes a connection pattern 60. That is, the connection pattern 60 is thinner than the second pattern 32. The first pattern 31 is formed in a portion inside the outer edge of the thermal processing pattern 50 (a region corresponding to the connection pattern 60 and the inner layer lands 70), and the second pattern 32 is formed in a portion outside the outer edge of the thermal processing pattern 50 (a region corresponding to the solid pattern 80).

[0017] The multilayer printed circuit board 100 of this embodiment is a thick copper multilayer printed circuit board, and only the inner layer pattern (first pattern 31) around the inner layer land 70 of the through hole 20 where IMT (Insertion Mount Technology) type electronic or mechanical components are soldered is thinner than the solid pattern 80 (second pattern 32, thick copper pattern portion).

[0018] 2 to 4 are sequential diagrams showing a method for manufacturing the multilayer printed circuit board 100 according to the embodiment. The multilayer printed circuit board 100 of the embodiment can be manufactured by carrying out the following steps in order.

[0019] [Preparation process] 2(A): The preparation step is a step of preparing a substrate 10 (a substrate of 35 μm double-sided copper foil) having a copper foil 11 (conductor layer 30) and a core material 12. The thickness of the copper foil 11 is 35 μm.

[0020] [Point Etching Process] 2(B): The point etching process is a process of etching the central portion (the area where the through-hole is formed and its surroundings) of the copper foil 11 (conductor layer 30). This process removes the copper foil 11 from the central portion, leaving the copper foil 11 on the left and right sides of the base material 10.

[0021] [Copper plating process (first plating process)] 2(C): The copper plating step is a step of forming a copper plating 13 (conductor layer 30) on the substrate 10. By this step, a conductor layer 30 of copper foil 11 and copper plating 13 is formed on the left and right portions of the substrate 10 (the thickness of the conductor layer 30 is approximately 70 μm), and a conductor layer 30 of only the copper plating 13 is formed in the center portion of the substrate 10 (the thickness of the conductor layer 30 is approximately 35 μm). The point etching process and copper plating process can form the thickness difference between the first pattern 31 and the second pattern 32 described above.

[0022] [Pattern formation process (thermal treatment process)] FIG. 2(D): The pattern formation process is a process carried out after the copper plating process and before the lamination press process. The pattern formation process is a process (a process of carrying out thermal processing) in which a thermal treatment pattern 50 from which the conductor layer 30 has been removed and a connection pattern 60 from which the conductor layer 30 has not been removed are formed by etching or the like. The thermal treatment pattern 50 is an opening (space) from which the conductor layer 30 has been removed. This process forms the thermal treatment pattern 50 and the connection pattern 60 on the upper and lower surfaces of the substrate 10. Note that the diagram on the left side of FIG. 2(D) shows a cross-sectional view taken along line AA of the diagram on the right side of FIG. 2(D).

[0023] Since the conductor thickness of the connection pattern 60 is thin (35 μm), the width W1 can be narrowed (for example, to about 0.10 mm). This narrows the heat path, making it difficult for heat during soldering to escape from the inner layer land 70 to the solid pattern (solid GND) 80.

[0024] [Lamination press process (lamination process)] FIG. 3(E): The lamination pressing step is a step of laminating and pressing a plurality of base materials 10 together. In this step, three base materials 10 that have undergone the pattern forming step are stacked together, sandwiching an insulating layer 40 therebetween, and a copper foil 11 (conductor layer 30, thickness = 35 μm) and an insulating layer 40 are stacked on the top, and a copper foil 11 (conductor layer 30, thickness = 35 μm) and an insulating layer 40 are stacked on the bottom. Through this step, the insulating layer 40 fills the gaps between the base materials 10 and is adhered and fixed.

[0025] [Drilling process (through-hole formation process)] FIG. 4(F): The drilling step is a step of forming through-holes 20 using a drill in the central portions of the plurality of stacked substrates 10 (portions where the conductive layers 30 have been etched).

[0026] [Through-hole copper plating process (second plating process)] FIG. 4(G): The through-hole copper plating process includes two steps. The first step is to form copper plating 13 (conductor layer 30) on the inside of through-hole 20. The second step is to form copper plating 14 (conductor layer 30) on the upper and lower surfaces of multiple stacked substrates 10. The order of the two steps is arbitrary.

[0027] By undergoing such a manufacturing process, a multilayer printed circuit board 100 can be manufactured in which only the thickness of the first pattern 31 arranged around the through hole 20 is thin, as shown in the lower diagram of Figure 4(G).

[0028] These steps can be summarized as follows: A substrate 10 made of copper foil 11 of a typical thickness (35 μm) is used, and the copper foil 11 in the areas around the through-holes (areas corresponding to the thermal treatment pattern 50, connection pattern 60, and inner layer land 70) is first removed by point etching, and then copper plating 13 is applied to leave the areas other than the areas around the through-holes in a thick copper state (copper foil 11 and copper plating 13 state).

[0029] A thermal processing pattern 50 is formed around the through-hole to reduce heat loss, but since the copper foil 11 around the through-hole has been thinned in advance (the copper foil 11 has been removed and only the copper plating 13 remains), the connection pattern 60 for connecting to the peripheral circuit (solid pattern 80) can be left as a thin pattern.

[0030] Then, the multiple base materials 10 produced by this procedure are sandwiched with an insulating layer 40 such as prepreg and laminated and pressed together to form a multilayer printed circuit board 100. After that, through holes 20 are drilled in the component mounting areas, and the insides of the through holes 20 are copper plated, completing the multilayer printed circuit board 100 in which part of the inner layer pattern becomes a thin conductor layer 30.

[0031] In the multilayer printed circuit board 100 produced by this manufacturing method, the conductor layer 30 and the connection pattern 60 around the through-hole are thin, and the connection pattern 60 can be made thinner, which reduces heat loss during flow soldering and maintains the temperature of the board on the component mounting surface side, allowing for stable solder filling into the through-hole 20.

[0032] FIG. 5 is a diagram showing a multilayer printed circuit board 100A of a comparative example. The comparative example of the multilayer printed circuit board 100A does not have the concept of "thickness of the first pattern 31 < thickness of the second pattern 32" as in the embodiment, and the thickness of the conductor layer 30 arranged around the through hole 20 is uniform. Therefore, the thickness of the inner layer lands 70A and the connection pattern 60A is the same as that of the solid pattern 80A (approximately 70 μm), which is thicker than the inner layer lands 70 and the connection pattern 60 of the embodiment. The connection pattern 60A is also thicker than the connection pattern 60 of the embodiment.

[0033] 6 to 8 are sequential diagrams showing a method for manufacturing a multilayer printed circuit board 100A of the comparative example. The comparative multilayer printed circuit board 100A can be manufactured by carrying out the following steps in order.

[0034] [Preparation process] 6(A): The preparation step is a step of preparing a substrate 10A (a thick copper substrate with 70 μm double-sided copper foil) having a copper foil 11 (conductor layer 30) and a core material 12. The thickness of the copper foil 11 is 70 μm.

[0035] [Pattern Forming Process] 6(B): The pattern formation step is a step (a step of performing thermal processing) of forming a thermal processing pattern 50A from which the conductor layer 30 has been removed and a connection pattern 60A from which the conductor layer 30 has not been removed by etching or the like. By this step, the thermal processing pattern 50A and the connection pattern 60A are formed on the upper and lower surfaces of the substrate 10A.

[0036] The connection pattern 60A has a large width W2 (for example, about 0.20 to 0.25 mm) due to the thick conductor (70 μm). This widens the heat path, making it easier for heat during soldering to escape from the inner layer land 70A to the solid pattern 80A, which inhibits solder from flowing up into the through-hole 20.

[0037] [Lamination press process] FIG. 7(C): ​​The lamination pressing step is a step of laminating and pressing a plurality of base materials 10A. In this step, three base materials 10A that have undergone the pattern forming step are stacked together, sandwiching an insulating layer 40 therebetween, and a copper foil 11 (conductor layer 30, thickness = 35 μm) and an insulating layer 40 are stacked on the top, and a copper foil 11 (conductor layer 30, thickness = 35 μm) and an insulating layer 40 are stacked on the bottom. Through this step, the insulating layer 40 fills the gaps between the base materials 10A and is adhered and fixed.

[0038] [Drilling process] FIG. 8(D): The drilling step is a step of forming through-holes 20 in the central portions of the plurality of laminated substrates 10A using a drill.

[0039] [Through-hole copper plating process] FIG. 8(E): The through-hole copper plating process includes two steps. The first step is to form copper plating 13 (conductor layer 30) on the inside of through-hole 20. The second step is to form copper plating 14 (conductor layer 30) on the upper and lower surfaces of multiple stacked substrates 10A. The order of the two steps is arbitrary.

[0040] By undergoing these manufacturing steps, it is possible to manufacture a multilayer printed circuit board 100A in which the thickness of the conductor layer 30 arranged around the through-hole 20 is uniform, as shown in the lower diagram of FIG. 8(E).

[0041] In the comparative example, even if thermal treatment is performed on the multilayer printed circuit board 100A, the conductor layer 30 is thick, so the connection pattern 60A cannot be thinned and heat dissipation to the solid pattern 80 cannot be suppressed. If the conductor layer 30 remains thick, there is a limit to how much of the conductor layer 30 can be removed by etching, so the connection pattern 60A cannot be thinned.

[0042] On the other hand, in the multilayer printed circuit board 100 of the embodiment, the inner layer lands 70 and the conductor layer 30 of the connection pattern 60 are thin, so the connection pattern 60 can be made thin, and heat dissipation to the solid pattern 80 can be suppressed.

[0043] FIG. 9 is a diagram (X-ray radiograph) showing an example of the state of solder filling in through-holes after flow soldering in a multilayer printed circuit board 100A of the comparative example. In the multilayer printed circuit board 100A of the comparative example, solder is filled from the lower flow soldering surface S1 toward the upper component mounting surface S2. However, in the comparative example, the thickness of the conductor layers is uniform, so heat during flow soldering escapes from the inner layer patterns, resulting in insufficient solder filling in the through-holes. This tendency becomes more pronounced as the number of laminated substrates increases.

[0044] In the example shown, a connector 90 with a bifurcated pin is inserted into a through-hole, and although the solder should rise from the flow soldering surface S1 to the component mounting surface S2, it has only risen less than halfway. Note that areas where the solder is fully filled are shown in a dark black image.

[0045] When flow soldering IMT components with large heat capacity to a multilayer printed circuit board, if the pattern configuration is such that the inner layer land of the through hole is connected to a solid pattern, heat will escape through the connecting pattern during flow soldering, which will likely hinder solder wicking. Also, when the copper foil is thicker than 2oz (oz: ounce; 1oz copper foil is 35μm), the impact of heat dissipation becomes significant, making through-hole solder wicking difficult.

[0046] In contrast to this, in this embodiment, when mounting electronic components such as connectors on a multilayer printed circuit board 100 using flow soldering, the conductor layer 30 (copper foil) is made thinner only in the area surrounding the through-hole where the component is mounted, and the connection pattern 60 with the solid pattern 80 is made thinner.Therefore, when mounting electronic components such as connectors on a multilayer printed circuit board 100 using flow soldering, heat loss to the inner layer pattern is reduced (by suppressing heat dissipation that hinders through-hole solder rising), and a sufficient amount of solder can be filled into the through-hole 20.

[0047] As described above, this embodiment has the following advantages. (1) According to this embodiment, the conductor layer 30 has a thin first pattern 31 arranged around the through hole 20, which reduces heat loss around the through hole 20 and improves solder rising.

[0048] (2) According to this embodiment, the connection pattern 60 arranged around the through hole 20 is thin, so the connection pattern 60 can be made thinner, reducing heat loss around the through hole 20 and improving solder wicking. Also, according to this embodiment, the connection pattern 60 is made thinner, so the area of ​​the thermal processing pattern 50 can be increased accordingly, reducing heat loss around the through hole 20 and improving solder wicking. Furthermore, according to this embodiment, the conductor layer 30 is thinned by point etching in the area where the thermal processing pattern 50 is to be formed, making it easier to form the thermal processing pattern 50 compared to a thick conductor layer.

[0049] (3) According to this embodiment, a flat substrate 10 is prepared (preparation step), a portion of the conductor layer 30 is etched (point etching step), and copper plating 13 (conductor layer 30) is formed on the substrate 10 (copper plating step), thereby forming a conductor layer 30 that is thin on the inside and thick on the outside, thereby making it possible to efficiently manufacture a conductor layer 30 with a step. Furthermore, according to this embodiment, a substrate 10 made of copper foil 11 with a typical thickness (35 μm) can be used, which reduces manufacturing costs compared to when a thick copper substrate 10A is used.

[0050] (4) According to this embodiment, the pattern formation process is carried out after the copper plating process, so that the thermal processing pattern 50 and the connection pattern 60 can be efficiently formed after forming the conductor layer 30 with steps.

[0051] (5) Comparison with the above-mentioned patent documents is as follows: The technology of this embodiment is a multilayer printed circuit board and its manufacturing method that can suppress heat dissipation and improve solder wicking by thinning the conductor thickness only around the through holes (around the inner layer lands) in a thick copper multilayer printed circuit board where IMT type electronic components and mechanical components are flow soldered to the through holes. The technology of this embodiment can improve solder wicking of through holes in products that use thick copper multilayer boards for components that have a large heat capacity and are difficult to flow solder.

[0052] On the other hand, the technology of Patent Document 1 makes the conductor thickness at the connection part with the through hole of the inner conductor layer thicker than the conductor thickness of other inner conductor layers in a multilayer printed wiring board, which is the exact opposite configuration to the technology of this embodiment. Furthermore, the technology of Patent Document 2 thickens the conductor layer only around the through-hole, just like the technology of Patent Document 1. The purpose and effect is to achieve both reliability of electrical connection and thinness. Furthermore, the technology of Patent Document 3 is characterized by providing thick and thin conductor portions in the wired circuit board, and the purpose and effect is to reduce the size and weight of the wired circuit board. Furthermore, the technology of Patent Document 4 is characterized by providing a thin-walled step portion in the conductor layer around the edge of a through hole in a printed wiring board, and connecting a plated through hole to this step. The purpose and effect is to achieve both thinner and denser conductor patterns and connection reliability. The technology of Patent Document 4 differs from the technology of this embodiment in that the final thickness of the conductor and plating remains unchanged.

[0053] [Modifications] The present invention is not limited to the above-described embodiment, and can be practiced in various modified forms. (1) It is not necessary to form the thermal processing pattern 50 and the connection pattern 60. Even in this case, by reducing the thickness of the first pattern 31, it is possible to reduce heat loss around the through-hole 20 and improve solder rising. (2) The multilayer printed circuit board may be a printed circuit board other than a thick copper multilayer printed circuit board, as long as it is a board that can be subjected to flow soldering. (3) Although the example in which the solid pattern 80 is arranged outside the connection pattern 60 has been described, a circuit pattern may also be arranged. [Explanation of symbols]

[0054] 10, 10A base material 11 Copper foil 12 Core material 13, 14 Copper plating 20 through holes 30 Conductor Layer 31 First Pattern 32 Second Pattern 40 insulating layer 50, 50A thermal processing pattern 60, 60A connection pattern 70, 70A inner layer land 80, 80A solid pattern 100, 100A multilayer printed circuit board S1 flow solder surface S2 Component mounting surface

Claims

1. A plurality of laminated substrates; through holes formed through the plurality of substrates; a conductive layer formed around the through hole, A multilayer printed circuit board characterized in that the conductor layer has a first pattern arranged around the through hole that is thin, and a second pattern arranged outside the first pattern that is thicker than the first pattern.

2. 2. The multilayer printed circuit board according to claim 1, a removed portion formed around the through hole, where the conductor layer is removed; a non-removed portion formed adjacent to the removed portion, in which the conductor layer is not removed; The multilayer printed circuit board is characterized in that the first pattern includes the non-removed portion.

3. In a method for manufacturing a multilayer printed circuit board, a preparation step of preparing a substrate having a conductor layer and a core material; a point etching step of etching a portion of the conductor layer; a first plating step of plating the conductor layer on the base material; a lamination step of laminating a plurality of the base materials; a through-hole forming step of forming through-holes in the portions of the plurality of stacked substrates where the conductor layers have been etched; a second plating step of forming the conductive layer on the inside of the through hole and on the upper and lower surfaces of the plurality of stacked substrates; A method for manufacturing a multilayer printed circuit board, comprising:

4. 4. The method for manufacturing a multilayer printed circuit board according to claim 3, A method for manufacturing a multilayer printed circuit board, comprising, after the first plating step and before the lamination step, a pattern formation step of forming a removed portion where the conductor layer has been removed and a non-removed portion where the conductor layer has not been removed.

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