Power System

Abstract

The object is to provide a power supply system that can reduce the voltage at the input end of a converter to near zero while passing a predetermined input current through the input end of the converter that is to be stopped. [Solution] The power supply system of the present invention comprises a plurality of DAB converters 301, a series connection terminal TerS to which one side of the DAB converters is connected in series, a parallel connection terminal TerP to which the other side of the DAB converters is connected in parallel, and a controller 30 that gives control instructions to the control circuits of each of the DAB converters, and is characterized in that the controller gives, as the control instruction, a voltage reduction instruction to reduce the voltage on one side to a number of the DAB converters corresponding to the voltage of the series connection terminal.

Description

[Technical Field]

[0001] The present disclosure relates to a power supply system including multiple DAB converters. [Background technology]

[0002] There are power supply systems configured with input / output terminals of multiple converters, such as DC / DC converters (DAB converters), connected in parallel. In power supply systems configured like this, it is common to limit the number of converters operating during operation depending on the output power in order to reduce power loss (see, for example, Patent Document 1).

[0003] Furthermore, when the input voltage of a power supply system becomes high, it is common to connect the input terminals of the converters in series and control them so that the input voltage is shared equally (see, for example, Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Special Publication No. 2013-504986 [Patent Document 2] Japanese Patent Application Laid-Open No. 2008-187817 Summary of the Invention [Problem to be solved by the invention]

[0005] In a power supply system in which the input terminals of multiple converters are connected in series, it is also preferable to reduce the number of operating converters when the input voltage drops. However, unlike a power supply system in which the input terminals of multiple converters are connected in series, stopping converter operation requires short-circuiting the input terminals, unlike a system in which the input and output terminals of converters are connected in parallel. If a short circuit occurs while a voltage is applied to the input terminals of a converter, increased losses and damage to the components occur due to rush current from the input capacitor. Therefore, before short-circuiting the input terminals of a converter, it is necessary to reduce the voltage at the input terminals of the converter to near zero.

[0006] However, there is a problem in that it is difficult to reduce the voltage at the input terminal of a converter to near zero while passing a predetermined input current through the input terminal of the converter. Therefore, in order to solve the above problem, an object of the present invention is to provide a power supply system that can reduce the voltage at the input terminal of a converter that is to be stopped to near zero while passing a predetermined input current through the input terminal of the converter. [Means for solving the problem]

[0007] In order to achieve the above object, the power supply system according to the present invention performs specific switching control to increase the input current to the converter that is to be stopped from operating.

[0008] Specifically, the power supply system according to the present invention comprises: A power supply system including a plurality of converters, The converter comprises: a transformer having a primary winding and a secondary winding; two switching circuits each connected in parallel between two terminals, the two switching circuits including a first leg and a second leg, each of which has upper and lower arms each including a switching element having a switch element to which an anti-parallel diode and a parallel capacitor are connected in parallel; a first capacitor connected in parallel to one of the switching elements in the upper or lower arm of the first leg or the second leg or one of the switching elements in the upper or lower arm of the first leg and the second leg; and a second capacitor connected in parallel to the other of the switching elements in the upper or lower arm of the first leg or the second leg or the other of the switching elements in the upper or lower arm of the first leg and the second leg; and an inductance means connected between a connection point of the upper and lower arms of the first leg and a connection point of the upper and lower arms of the second leg via the primary winding or the secondary winding on the primary winding or the secondary winding of the transformer; a control circuit for controlling the switching of the switching circuit; Equipped with The switching control of the control circuit includes: The method includes a zero voltage switching control, an energy transition switching control, and a low input switching control that is performed in conjunction with the energy transition switching control, The zero voltage switching control is In one of the switching circuits, a pair of a switching element of the upper arm of the first or second leg and a switching element of the lower arm of the second or first leg are alternately turned on and off to convert a direct current input from the two terminal sides into an alternating current and output the alternating current from the switching circuit, and in alternately controlling the on and off of the pair of switching elements, among the pair of the switching element of the upper arm of the first or second leg and the switching element of the lower arm of the second or first leg that are in an on state, the switching element to which the first capacitor or the second capacitor is connected in parallel is first turned off; The energy transition switching control includes: making the switching elements of the second leg of one of the switching circuits conduct in a forward direction so that energy input from the two terminal sides is accumulated in the inductance means during a period in which the pair of switching elements in one of the switching circuits is in an on state, so that a detected value of a voltage, current, or power output from the two terminal sides of the other of the switching circuits or a detected value of a voltage, current, or power input from the two terminal sides of one of the switching circuits approaches a target value, and turning off the switching elements of the second leg of the other of the switching circuits that have been made conduct in the forward direction before turning off the switching elements of one of the switching circuits that are to be turned off first; The low input switching control when a detected value of voltage, current or power input from between the two terminals of one of the switching circuits falls below a certain reference value, turning on the switching element of the first leg in one of the switching circuits and simultaneously turning on the switching element of the upper arm or the lower arm of the second leg and the switching element of the lower arm or the upper arm of the first leg in the other of the switching circuits, and turning off the switching element of the first leg before turning off the switching element of the second leg in the other of the switching circuits; It is characterized by The control circuit In the low input switching control, a period T2 during which the switching element of the second leg of the other switching circuit is turned on is set by Equation 1, The power supply system includes: a series connection terminal in which the converters are connected in series at the two terminals of one of the switching circuits; a parallel connection terminal in which the converters are connected in parallel at the two terminals of the other switching circuit; a controller that issues control instructions to the control circuits of the converters; Equipped with The controller is characterized in that, as the control instruction, it issues a voltage reduction instruction to the converters, the number of which corresponds to the voltage of the series-connected terminals, to reduce the voltage between the two terminals of one of the switching circuits.

number

[0009] In low-input switching control, when the input voltage is reduced, the converter's output voltage is applied to the secondary side of the transformer according to equation (1), and the sum of the primary-side converted value of that output voltage and the input voltage is applied to the inductance means. This allows the current value of the transformer 11, i.e., the input current, to be increased. Therefore, the present invention can provide a power supply system that can reduce the voltage at the input terminal of a converter to near zero while passing a predetermined input current through the input terminal of the converter that is to be stopped.

[0010] After the input voltage has dropped sufficiently, the converter operation can be stopped by shorting the input terminals by turning on all primary-side switch elements, etc. This makes it possible to improve efficiency by limiting (optimizing) the number of operating converters in a power supply system configured with the input terminals of multiple converters connected in series. [Effects of the Invention]

[0011] The present invention can provide a power supply system that can reduce the voltage at the input terminal of a converter that is to be stopped to near zero while allowing a predetermined input current to flow through the input terminal of the converter. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a configuration diagram of a converter (bidirectional converter) according to the present invention. [Figure 2] FIG. 10 is a waveform diagram showing an example of drive signals for switching elements S1 to S4 of switching circuit 1 and switching elements S5, S6 of switching circuit 2 when switching elements S5, S6 of switching circuit 2 on and off in a converter according to the present invention. [Figure 3] 1 is a waveform diagram showing an example of the voltages and currents of the switching elements S1 to S4 of the switching circuit 1 and the excitation current of the transformer 11 when the switching elements S5 and S6 of the switching circuit 2 are turned on and off in the converter according to the present invention. [Figure 4] FIG. 10 is a waveform diagram showing an example of the voltage and current of the switching elements S5 and S6 of the switching circuit 2 and the voltage and current of the anti-parallel diodes D7 and D8 when the switching elements S5 and S6 of the switching circuit 2 are turned on and off in the converter according to the present invention. [Figure 5] FIG. 4 is a waveform diagram in which a part of the waveform diagram in FIG. 3 is enlarged. [Figure 6] 3 is a circuit diagram formed at each timing when switching elements S5 and S6 of a switching circuit 2 are turned on and off in a converter according to the present invention. FIG. [Figure 7]FIG. 10 is an example of a waveform diagram showing the drive signals of the switching elements S1 to S4 of the switching circuit 1 and the switching elements S5, S6 of the switching circuit 2 in an operation of making the voltage output between the third terminal Ter3 and the fourth terminal Ttr4 lower than the output voltage obtained by turning on and off the switching elements S5, S6 of the switching circuit 2 in a converter according to the present invention. [Figure 8] FIG. 10 is a waveform diagram showing an example of the voltages and currents of the switching elements S1 to S4 of the switching circuit 1 and the excitation current of the transformer 11 in the converter according to the present invention, in an operation in which the voltage output between the third terminal Ter3 and the fourth terminal Ter4 is made lower than the output voltage obtained by turning on and off the switching elements S5 and S6 of the switching circuit 2. [Figure 9] FIG. 10 is a waveform diagram showing an example of the voltages and currents of the anti-parallel diodes D5 to D8 of the switching circuit 2 in the converter according to the present invention, during an operation in which the voltage output between the third terminal Ter3 and the fourth terminal Ter4 is made lower than the output voltage obtained by turning on and off the switching elements S5 and S6 of the switching circuit 2. [Figure 10] This is a circuit diagram formed at each timing for an operation in a converter according to the present invention to make the voltage output between the third terminal Ter3 and the fourth terminal Ter4 lower than the output voltage obtained by turning on and off the switching elements S5 and S6 of the switching circuit 2. [Figure 11] 3 is a diagram illustrating switching control performed by a control circuit of a converter according to the present invention. FIG. [Figure 12] 3 is a diagram illustrating switching control performed by a control circuit of a converter according to the present invention. FIG. [Figure 13] 3 is a diagram illustrating switching control performed by a control circuit of a converter according to the present invention. FIG. [Figure 14] 3 is a diagram illustrating switching control performed by a control circuit of a converter according to the present invention. FIG. [Figure 15] FIG. 2 is a diagram illustrating a current waveform on the primary side of a transformer. [Figure 16]3A and 3B are diagrams illustrating current waveforms on the primary side of a transformer of a converter according to the present invention. [Figure 17] 10A and 10B are diagrams illustrating the waveform of a current flowing through a switch element that turns off last among pairs of switching elements (S1 and S4, and S3 and S2) in a converter according to the present invention. [Figure 18] 10A and 10B are diagrams illustrating the waveform of a current flowing through a switch element that turns off last among pairs of switching elements (S1 and S4, and S3 and S2) in a converter according to the present invention. [Figure 19] 10A and 10B are diagrams illustrating the waveform of a current flowing through a switch element that turns off last among pairs of switching elements (S1 and S4, and S3 and S2) in a converter according to the present invention. [Figure 20] 1 is a circuit diagram formed at the timing when switching elements S5 and S6 of switching circuit 2 in a converter according to the present invention are turned on and off and switching elements S8 and S7 are also turned on and off. [Figure 21] 1 is a diagram illustrating a power supply system according to the present invention. [Figure 22] 3A and 3B are diagrams illustrating the operation of the power supply system according to the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0013] The following description of the preferred embodiments of the present invention will be given with reference to the accompanying drawings. The preferred embodiments described below are examples of the present invention, and the present invention is not limited to the preferred embodiments. In this specification and the drawings, components having the same reference numerals are intended to represent the same components. Furthermore, the inventions (embodiments) described below can be combined as much as possible.

[0014] 21 is a diagram illustrating the power supply system of this embodiment. This power supply system includes a plurality of converters 301. Each converter 301 is a transformer (11) having a primary winding and a secondary winding; A first leg (12) and a second leg (13) are connected in parallel between two terminals (Ter1 & Ter2) with upper and lower arms of switching elements (S1-S4) each having a switch element (Q1-Q4) with an anti-parallel diode (D1-D4) and a parallel capacitor (C1-C4) connected in parallel, respectively, and one of the switching elements (S1 / S2 / S3 / S4) of the upper or lower arm of the first leg or the second leg (12 / 13) or one of the switching elements (S1 / S2 / S3 / S4) of the upper arm or the lower arm of the first leg and the second leg (12 & 13) two switching circuits (1&2) connected in parallel to the primary winding (11a) side of the transformer and the secondary winding (11b) side of the transformer, each of which has a first capacitor (Ca) connected in parallel to the other switching element (S1 / S2 / S3 / S4) of the upper or lower arm of the first leg or the second leg (12 / 13), and a second capacitor (Cb) connected in parallel to the other switching element (S1 / S2 / S3 / S4) of the upper or lower arm of the first leg or the second leg (12&13); an inductance means (L) connected between a connection point between the upper and lower arms of the first leg (12) and a connection point between the upper and lower arms of the second leg (13) on the primary winding (11a) side or the secondary winding (11b) side of the transformer; a control circuit (3) for controlling the switching of the switching circuits (1 & 2); Equipped with. The switching control of the control circuit (3) includes: The method includes a zero voltage switching control, an energy transition switching control, and a low input switching control that is performed in conjunction with the energy transition switching control, The zero voltage switching control is For one of the switching circuits (1 / 2), a pair of switching elements (S1 / S3) of the upper arm of the first or second leg (12 / 13) and a pair of switching elements (S4 / S2) of the lower arm of the second or first leg (13 / 12) are alternately turned on and off to convert DC input from the two terminals (Ter1&Ter2) into AC and output it from the switching circuit (1 / 2), and when alternately controlling the pair of switching elements (S1&S4 / S3&S2) on and off, among the pair of switching elements (S1 / S3) of the upper arm of the first or second leg (12 / 13) and the switching element (S4 / S2) of the lower arm of the second or first leg (13 / 12) that are in an on state, the switching element (S3 / S4) to which the first capacitor or the second capacitor (Ca / Cb) is connected in parallel is first turned off; The energy transition switching control includes: In one of the switching circuits (1 / 2), the pair of switching elements (S1&S4 / S3&S2) is in an on state, and the two terminals (Ter1&Ter2) are set to a value close to a target value so that the detected value of the voltage, current, or power output from between the two terminals (Ter3&Ter4) of the other switching circuit (2 / 1) or the detected value of the voltage, current, or power input from between the two terminals (Ter1&Ter2) of one of the switching circuits (1 / 2) approaches a target value. making the switching elements (S5 / S6) of the second leg (13) of the other switching circuit (2 / 1) conduct in a forward direction so as to store energy input from the other side in the inductance means (L), and turning off the switching elements (S5 / S6) of the second leg (13) of the other switching circuit (2 / 1) that have been made to conduct in the forward direction before turning off the switching elements (S3 / S4) of one of the switching circuits (1 / 2) that are to be turned off first; and The low input switching control When the detected value of the voltage, current, or power input from between the two terminals (Ter1 & Ter2) of one of the switching circuits (1 / 2) falls below a certain reference value, the switching elements (S1 / S2) of the first leg (12) in one of the switching circuits (1 / 2) are turned on, and simultaneously, the switching elements (S5 / S6) of the upper arm or lower arm of the second leg (24) and the switching elements (S7 / S8) of the lower arm or upper arm of the first leg (25) in the other switching circuit (2 / 1) are turned on, and before the switching elements (S5 / S6) of the second leg (24) in the other switching circuit (2 / 1) are turned off, the switching elements (S7 / S8) of the first leg (25) are turned off.

[0015] In the low input switching control, the control circuit 3 sets a period T2 during which the switching element (S6 / S5) of the second leg 24 of the other switching circuit 2 is turned on by Equation 1.

number

[0016] This power supply system includes multiple (m units) DAB converters 301 (m is a natural number equal to or greater than 2). In this power supply system, the primary sides of the converters 301 are connected in series and the secondary sides are connected in parallel. Although this power supply system can operate bidirectionally, this specification will mainly describe the operation of transferring power from the series connection terminal Ter S to the parallel connection terminal Ter P (from the left side to the right side of the drawing).

[0017] (Basic operation of the converter) 1 to 20 are diagrams for explaining the operation of converter 301. First, the operation of converter 301 will be explained using these diagrams.

[0018] (Basic movement 1) The basic operation of converter 301 will be described with reference to FIGS. 1 to 6. FIG. 1 shows a configuration diagram of converter 301. Converter 301 shown in FIG. 1 includes a transformer 11, a switching circuit 1 connected to a primary winding 11a of transformer 11, a second circuit 2 connected to a secondary winding 11b of transformer 11, inductance means L, and a control circuit 3. This converter converts DC input from first terminal Ter1 and second terminal Ter2 to AC and outputs the AC from switching circuit 1. The AC is then converted to DC by switching circuit 2 via transformer 11 and supplied to third terminal Ter3 and fourth terminal Ter4 on the output side. Note that in this description, two terminals (Ter1 and Ter2) are the input side and two terminals (Ter3 and Ter4) are the output side; however, since the circuit configuration is symmetrical with respect to transformer 11, the converter operates in the same way even if the input and output are reversed.

[0019] The switching circuit 1 includes a first leg (12) and a second leg (13) in which upper and lower arms of switching elements (S1-S4) are connected in parallel between two terminals (Ter1 & Ter2), and the upper and lower arms of the switching elements (S1 / S2 / S3 / S4) of one of the upper and lower arms of the first leg or the second leg (12 / 13) or the upper and lower arms of the first leg and the second leg (12 / 13) are connected in parallel. The switching element (S1 / S2 / S3 / S4) of the upper arm or the lower arm of the first leg (12 / 13) and the second leg (12 / 13) has a first capacitor (Ca) connected in parallel to one of the switching elements (S1 / S2 / S3 / S4) of the upper arm or the lower arm of the second leg (12 / 13), and a second capacitor (Cb) connected in parallel to the other of the switching elements (S1 / S2 / S3 / S4) of the upper arm or the lower arm of the first leg and the second leg (12 / 13).

[0020] The switching circuit 2 includes a first leg (25) and a second leg (24) connected in parallel between two terminals (Ter3 & Ter4) with upper and lower arms of switching elements (S5-S8) each having a switch element (Q5-Q8) with an anti-parallel diode (D5-D8) and a parallel capacitor (C5-C8) connected in parallel, and a switching element (S7 / S8 / S5 / S6) in one of the upper and lower arms of the first leg or the second leg (25 / 24) or a switching element (S7 / S8 / S5 / S6) in the first leg and the second leg (25 / 24). The switching element (S7 / S8 / S5 / S6) of the upper arm or the lower arm of the first leg (25 / 24) and the second leg (25 / 24) has a first capacitor (Cc) connected in parallel to one of the switching elements (S7 / S8 / S5 / S6) of the upper arm or the lower arm of the second leg (25 / 24), and a second capacitor (Cd) connected in parallel to the other of the switching elements (S7 / S8 / S5 / S6) of the upper arm or the lower arm of the first leg and the second leg (25 / 24).

[0021] Power is input from an external power supply to the first terminal Ter1 and the second terminal Ter2. A capacitor 16 is connected between the first terminal Ter1 and the second terminal Ter2, creating a DC voltage. Furthermore, a switching circuit 1 is connected between the first terminal Ter1 and the second terminal Ter2. The switching circuit 1 is a full-bridge circuit in which the upper and lower arms of the first leg 12 and the second leg 13 are configured with switching elements S1 to S4. Furthermore, detection means 19 detects the voltage between the first terminal Ter1 and the second terminal Ter2, or the current or power input / output to / from the switching circuit 1 via the first terminal Ter1 and the second terminal Ter2. Note that in the following description, the detection target is described as voltage, but the present invention is not limited to voltage; it operates similarly and provides similar effects when detecting current or power.

[0022] The first leg 12 and the second leg 13 are connected in parallel between the first terminal and the second terminal, respectively. The first leg 12 has switching elements S1 and S2 as upper and lower arms, and the second leg 13 has switching elements S3 and S4 as upper and lower arms. In Fig. 1, switching elements S1 to S4 are used, in which anti-parallel diodes D1 to D4 and parallel capacitors C1 to C4 are connected in parallel to switching elements Q1 to Q4, respectively. In other words, the anti-parallel diodes D1 to D4 are internal diodes of the switching elements S1 to S4, and the parallel capacitors C1 to C4 are parasitic capacitances of the switching elements S1 to S4.

[0023] In the present invention, the anti-parallel diodes D1 to D4 connected in parallel to the switching elements Q1 to Q4 may be built-in diodes of the switching elements S1 to S4 as shown in Fig. 1, or external diodes separate from the switching elements S1 to S4, or a combination of these. Similarly, the parallel capacitors C1 to C4 connected in parallel to the switching elements Q1 to Q4 may be parasitic capacitances of the switching elements S1 to S4 as shown in Fig. 1, or external capacitors separate from the switching elements S1 to S4, or a combination of these.

[0024] The first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S1 and S4 or S2 and S3 that are to be turned off first in the pair of switching circuits 1. In Fig. 1, the first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S3 and S4 of the upper and lower arms of the second leg 13 that are to be turned off first.

[0025] The switching circuit 2 has a circuit configuration that mirrors the switching circuit 1, sandwiching a transformer 11. However, for ease of explanation, different reference numerals are used. Specifically, a capacitor 17 is connected between the third terminal Ter3 and the fourth terminal Ter4, generating a DC voltage. Furthermore, the switching circuit 2 is connected between the third terminal Ter3 and the fourth terminal Ter4, and the switching circuit 2 is a full-bridge circuit in which the upper and lower arms of the first leg 25 and the second leg 24 are configured with switching elements S5 to S8. Furthermore, detection means 18 detects the voltage between the third terminal Ter3 and the fourth terminal Ter4, or the current or power input / output to / from the switching circuit 2 via the third terminal Ter3 and the fourth terminal Ter4.

[0026] Furthermore, the first capacitor Cc and the second capacitor Cd of the switching circuit 2 correspond to the first capacitor Ca and the second capacitor Cb of the switching circuit 1. In this specification, for ease of explanation, the first capacitor Cc and the second capacitor Cd of the switching circuit 2 may be referred to as the "third capacitor Cc" and the "fourth capacitor Cd," respectively.

[0027] In the bridge-connected circuit of the switching circuit 2, a secondary winding 11b of a transformer 11 is connected to a connection point where parallel diodes D5 and D6 are connected in series with the same polarity, and to another connection point where anti-parallel diodes D7 and D8 are connected in series with the same polarity. A capacitor 17 is connected between the third terminal Ter3 and the fourth terminal Ter4, and a DC voltage is output between the third terminal Ter3 and the fourth terminal Ter4.

[0028] The inductance means L is connected to the connection point between the upper and lower arms of the first leg 12 and the connection point between the upper and lower arms of the second leg 13 via the primary winding 11a of the transformer 11. The inductance means L may be connected to the connection point between the anti-parallel diodes D5 and D6 connected in series with the same polarity within the bridge connection circuit of the switching circuit 2 and to the other connection point between the anti-parallel diodes D7 and D8 connected in series with the same polarity via the secondary winding 11b of the transformer 11. Also, in FIG. 1, one end of the inductance means L is connected to the connection point between the upper and lower arms of the first leg 12 and the other end is connected to the primary winding 11a of the transformer 11, but one end of the inductance means L may be connected to the connection point between the upper and lower arms of the second leg 13 and the other end is connected to the primary winding 11a of the transformer 11. The same applies when the inductance means L is connected via the secondary winding 11b.

[0029] The control circuit 3 supplies drive signals to the switching elements S1 to S4 of the switching circuit 1 and the switching elements S5 and S6 of the switching circuit 2, respectively, to control the on / off of each switching element. First, zero-voltage switching (ZVS) control will be described. In the converter 301 of FIG. 1, the switching element S1 or S3 of the upper arm of the first leg 12 or the second leg 13 and the switching element S4 or S2 of the lower arm of the second leg 13 or the first leg 12 form a pair and are alternately turned on and off. Of the switching elements S1 and S4 of the switching circuit 1 that make up the pair, the switching element S4 or S1 is turned off first, and then the switching element S1 or S4 is turned off later. Similarly, of the switching elements S2 and S3 of the switching circuit 1 that make up the other pair, the switching element S3 or S2 is turned off first, and then the switching element S2 or S3 is turned off later.

[0030] Next, the energy transition switching control will be described. Detector 18 of switching circuit 2 shown in FIG. 1 detects the output voltage of switching circuit 2, which is output between third terminal Ter3 and fourth terminal Ter4. This detected output voltage value is input to control circuit 3. Based on the detected output voltage value, control circuit 3 turns on and off switching elements S1 to S4 of switching circuit 1 and switching elements S5 and S6 of switching circuit 2, thereby controlling the output voltage of switching circuit 2. For example, control circuit 3 performs pulse control to modulate the pulse width, frequency, etc. of switching elements S1 to S4 of switching circuit 1 and switching elements S5 and S6 of switching circuit 2 so that the detected output voltage value approaches a target voltage value according to the load conditions. Detector 18 of switching circuit 2, for example, connects a resistor to the output side and detects the voltage applied to this resistor.

[0031] The control circuit 3 controls the amount of energy stored in the inductance means L from the first terminal Ter1 and the second terminal Ter2 by pulse control of the drive signal provided to the switching element S5 or S6 of the switching circuit 2. In this case, while the pair of switching elements S1 and S4 or the pair of switching elements S2 and S3 of the switching circuit 1 are both on, the control circuit 3 turns on the switching element S5 or S6 of the switching circuit 2, thereby shorting the secondary winding 11b of the transformer 11. This causes the energy input from the first terminal Ter1 and the second terminal Ter2 to be stored in the inductance means L. Next, while the pair of switching elements S1 and S4 or the pair of switching elements S2 and S3 of the switching circuit 1 are both on, the control circuit 3 turns off the switching element S5 or S6 of the switching circuit 2. This causes the energy stored in the inductance means L to be supplied to the third terminal Ter3 and the fourth terminal Ter4.

[0032] Furthermore, when the control circuit 3 operates to make the voltage output between the third terminal Ter3 and the fourth terminal Ter4 lower than the output voltage obtained by turning on and off the switching elements S5 and S6 of the switching circuit 2, the control circuit 3 pulse-controls the switching elements of the switching circuit 1 and operates to prevent forward conduction of the switching elements S5 and S6 of the switching circuit 2. Specifically, during a period when the pair of switching elements S1 and S4 or the pair of switching elements S2 and S3 of the switching circuit 1 are both in the on state, the control circuit 3 pulse-controls the switching elements of the switching circuit 1 so that energy input from the first terminal Ter1 and the second terminal Ter2 is supplied to the third terminal Ter3 and the fourth terminal Ter4 via the inductance means L, and operates to prevent forward conduction of the switching elements S5 and S6 of the switching circuit 2. In this operation, the control circuit 3 does not cause the switching elements S5 and S6 of the switching circuit 2 to conduct in the forward direction, so that the bridge connection circuit of the switching circuit 2 functions as a full-bridge rectifier circuit in which the anti-parallel diodes D5 to D8 are conductive.

[0033] The operation of the drive signals will be explained below assuming that the drive signal for turning on the switching elements of switching circuit 1 and switching circuit 2 is an on signal, and the drive signal for turning them off is an off signal. Voltage, current, etc. are used as the drive signals. Furthermore, the on and off signals are not particularly limited and may be signals that are given throughout the on and off periods, or may be signals that are given for a short time as a trigger.

[0034] Next, an example of the operation (ZVS control and energy transition control) of the converter 301 will be described. First, an operation of turning on and off the switching elements S5 and S6 of the switching circuit 2 of the converter 301 will be described using FIGS. 2 to 6. Note that in basic operation 1, the switching elements S7 and S8 of the switching circuit 2 are always off. FIG. 2 is a waveform diagram showing an example of the drive signals of the switching elements S1 to S4 of the switching circuit 1 and the switching elements S5 and S6 of the switching circuit 2. FIG. 3 is a waveform diagram showing an example of the voltages and currents of the switching elements S1 to S4 of the switching circuit 1 and the excitation current of the transformer 11. FIG. 4 is a waveform diagram showing an example of the voltages and currents of the switching elements S5 and S6 of the switching circuit 2 and the voltages and currents of the anti-parallel diodes D7 and D8. FIG. 5 is an enlarged view of the time Tx portion of the waveform diagram of FIG. 3. FIG. 6 is a circuit diagram formed at each timing. In the current waveforms shown in Figures 3 to 5, the current flowing in the forward direction through the switching elements S1 to S4 of switching circuit 1 and the switching elements S5 and S6 of switching circuit 2 is positive, and the current flowing in the reverse direction through the switching elements S1 to S4 of switching circuit 1 and the switching elements S5 and S6 of switching circuit 2 and the current flowing in the forward direction through the anti-parallel diodes D7 and D8 is negative.

[0035] Assume that at time t1, an ON signal is applied to switching elements S1 and S4 of switching circuit 1, which constitute a pair. Assume that an ON signal has already been applied to switching element S6 of switching circuit 2 before time t1. As a result, switching elements Q1, Q4, and Q6 are forward-conducting. In this state, as shown in FIG. 6(a), input power supplied from the first terminal Ter1 and the second terminal Ter2 causes current to flow from the first terminal Ter1 to switching element Q1, inductance means L, primary winding 11a, switching element Q4, and second terminal Ter2. On the secondary winding 11b side of transformer 11, current flows through secondary winding 11b, switching element Q6, and anti-parallel diode D8, resulting in a short-circuit state on the secondary winding 11b side. Therefore, energy is stored in inductance means L due to the input power supplied from the first terminal Ter1 and the second terminal Ter2. Furthermore, power is supplied from the capacitor 17 to the third terminal Ter3 and the fourth terminal Ter4.

[0036] At time t2, for example, if an OFF signal is sent to switching element S6 of switching circuit 2 at a timing determined by control circuit 3 so that the voltage detected by detection means 18 of switching circuit 2 between third terminal Ter3 and fourth terminal Ter4 approaches a target value, energy stored in inductance means L begins to be supplied to the output side of switching circuit 2. As shown in FIG. 6(b), current continues to flow through the primary winding 11a of transformer 11 via the same path as at time t1, but switching element Q6 is turned off on the secondary winding 11b side. As shown in FIG. 4, at time t2, switching element Q6 of switching circuit 2 is turned off while a large current is flowing through switching element S6, which causes switching loss. One way to reduce this switching loss is to lower the voltage across switching element S6 when it is turned off.

[0037] In the present invention, the capacitance of the capacitors is increased by connecting parallel capacitor C6 and fourth capacitor Cd to switching element Q6. Similarly, the capacitance of the capacitors is increased by connecting parallel capacitor C5 and third capacitor Cc to switching element Q5. When switching element Q6 is turned off at time t2, as shown in FIG. 6(b), on the secondary winding 11b side, current flows from the secondary winding 11b through parallel capacitor C6, fourth capacitor Cd, and anti-parallel diode D8 in a direction that charges parallel capacitor C6 and fourth capacitor Cd connected in parallel to the turned-off switching element Q6. Meanwhile, discharge current flows from parallel capacitor C5 and fourth capacitor Cc via the third terminal Ter3, fourth terminal Ter4, anti-parallel diode D8, and secondary winding 11b. Increasing the capacitance of the capacitors allows for a gradual increase in the voltage across switching element S6 of the switching circuit 2 due to the charging and discharging operations of parallel capacitors C6, fourth capacitor Cd, parallel capacitor C5, and third capacitor Cc. Therefore, the switching loss when the switching element S6 of the switching circuit 2 is turned off can be reduced.

[0038] At time t3, when the charging and discharging of the parallel capacitor C6 and the fourth capacitor Cd and the parallel capacitor C5 and the third capacitor Cc of the switching circuit 2 is completed, the anti-parallel diode D5 becomes conductive, as shown in FIG. 6(c). The current on the secondary winding 11b side flows from the secondary winding 11b through the anti-parallel diode D5, the third terminal Ter3, the fourth terminal Ter4, and the anti-parallel diode D8. The energy stored in the inductance means L is supplied to the output side of the switching circuit 2 between time t1 and time t2. The energy stored in the inductance means L is supplied to the output side of the switching circuit 2 not only to the load connected to the third terminal Ter3 and the fourth terminal Ter4, but also to the capacitor 17, which was discharged between time t1 and time t2. The current on the primary winding 11a side continues to flow along the same current path from time t1 to time t4, when the switching element Q4 is turned off.

[0039] At time t4, of the pair of switching elements S1 and S4 of switching circuit 1, an off signal is sent from control circuit 3 to switching element S4 of switching circuit 1, which is to be turned off first. For this reason, as shown in Fig. 3, switching element Q4 is turned off when the current value is relatively large, which causes switching loss when switching element S4 of switching circuit 1 is turned off. One way to reduce this switching loss is to lower the voltage across switching element S4 of switching circuit 1 when switching element S4 of switching circuit 1 is turned off.

[0040] In the present invention, in addition to the parallel capacitor C4, a second capacitor Cb is also connected in parallel to the switching element Q4 to increase the capacitance. Similarly, in addition to the parallel capacitor C3, a first capacitor Ca is also connected in parallel to the switching element Q3 to increase the capacitance. Therefore, when the switching element Q4 is turned off at time t4, as shown in FIG. 6(d), on the primary winding 11a side, a current flows from the inductance means L, the primary winding 11a, the parallel capacitor C4 and the second capacitor Cb, the second terminal Ter2, and the first terminal Ter1 through the switching element Q1 in a direction to charge the parallel capacitor C4 and the second capacitor Cb connected in parallel to the turned-off switching element Q4. Meanwhile, a discharge current flows from the parallel capacitor C3 and the first capacitor Ca through the switching element Q1, the inductance means L, and the primary winding 11a. Increasing the capacitance of the capacitors makes it possible to moderate the rise in voltage across the switching element S4 due to the charging and discharging operations of the parallel capacitor C4, the second capacitor Cb, the parallel capacitor C3, and the first capacitor Ca. Therefore, the switching loss when the switching element S4 of the switching circuit 1 is turned off can be reduced.

[0041] At time t5, when the discharge of parallel capacitor C3 and first capacitor Ca and the charging of parallel capacitor C4 and second capacitor Cb are completed, anti-parallel diode D3 connected in parallel to switch element Q3 becomes conductive, as shown in FIG. 6(e). On the primary winding 11a side, due to the energy stored in inductance means L and the excitation current of transformer 11, current flows from inductance means L, primary winding 11a through anti-parallel diode D3, and switch element Q1 in the same direction as the current flowing through primary winding 11a and inductance means L immediately before time t5. Note that current on the secondary winding 11b side continues from time t3 through secondary winding 11b, anti-parallel diode D5, the third terminal Ter3 side, the fourth terminal Ter4 side, and anti-parallel diode D8. This period of current flowing through the current path on the secondary winding 11b side continues from the time when anti-parallel diode D5 becomes conductive until the current flowing through anti-parallel diode D5 becomes substantially zero.

[0042] At time t6, of the switching elements S1 and S4 of the paired switching circuit 1, the drive signal for switching element S1, which is to be turned off later, is set to an off signal. Because switching element Q1 is turned off, the transformer excitation current that was flowing immediately before time t6 flows from the primary winding 11a through the anti-parallel diode D3, parallel capacitor C1, and inductance means L, charging the parallel capacitor C1. Meanwhile, a discharge current flows from parallel capacitor C2 through the inductance means L, primary winding 11a, anti-parallel diode D3, first terminal Ter1, and second terminal Ter2. At this time, switching element Q1 is turned off while a current is still flowing through it, but this current can be reduced to a very small excitation current for the transformer 11. Therefore, by turning switching element S1 off later, the current value at the time of turning off can be reduced, thereby reducing switching loss compared to when switching element Q4, which is turned off first, is turned off.

[0043] When charging and discharging of parallel capacitors C1 and C2 finishes at time t7, anti-parallel diode D2 becomes conductive, as shown in FIG. 6(g). Due to the excitation current of transformer 11, current flows from primary winding 11a through anti-parallel diode D3, the first terminal Ter1 side, the second terminal Ter2 side, anti-parallel diode D2, and inductance means L in the same direction as the current flowing through primary winding 11a immediately before time t7. Note that current on the secondary winding 11b side has continued to flow from time t3 through secondary winding 11b, anti-parallel diode D5, the third terminal Ter3 side, the fourth terminal Ter4 side, and anti-parallel diode D8. This period of current flowing through the current path on the secondary winding 11b side continues from the time anti-parallel diode D5 becomes conductive until the current flowing through anti-parallel diode D5 becomes substantially zero.

[0044] At time t8, the drive signals for the switching elements S2 and S3 of the other pair of switching circuit 1 are set to ON signals. As shown in FIG. 6(h), on the primary winding 11a side, switch elements Q2 and Q3 are forward conductive, and current flows through the first terminal Ter1 side, switch element Q3, primary winding 11a, inductance means L, switch element Q2, and second terminal Ter2 side. On the secondary winding 11b side, an ON signal is provided to the drive signal for switching element S5 of switching circuit 2 before time t8, and at time t8, switch element Q5 is in a state where it can be forward conductive. Therefore, when switch element Q5 is forward conductive, current flows from secondary winding 11b through anti-parallel diode D7 and switch element Q5, and the secondary winding 11b side is short-circuited. Therefore, energy is stored in inductance means L due to the power input between the first terminal Ter1 and the second terminal Ter2.

[0045] In the present invention, immediately before time t8, the anti-parallel diodes D2 and D3 connected in parallel to the switching elements Q2 and Q3, respectively, are conductive. As a result, as shown in FIG. 5, the switching elements S2 and S3 of the switching circuit 1 can achieve zero voltage switching (ZVS) when turned on.

[0046] Also, because the anti-parallel diode D5 connected in parallel to the switching element Q5 is conducting immediately before time t8, the switching element Q5 can be turned on at zero voltage. Note that, in order to achieve zero voltage switching (ZVS) of the switching element Q5, an on signal that is a drive signal for the switching element S5 of the switching circuit 2 should be applied during the period from time t3 to time t8, during which the anti-parallel diode D5 is conducting.

[0047] The operation of switching elements S2 and S3 of the other pair of switching circuit 1 after time t8 is the same as that of switching elements S1 and S4 of the above-mentioned pair from time t1 to time t8. That is, while switching elements Q2 and Q3 are conducting, an OFF signal is sent to switching element S5 of switching circuit 2 at a timing determined by control circuit 3 so that the voltage detection value between third terminal Ter3 and fourth terminal Ter4, which are the output side of switching circuit 2, becomes a predetermined value. As a result, energy stored in inductance means L is supplied to the third terminal Ter3 and fourth terminal Ter4. Thereafter, of the pair of switching elements S2 and S3, switching element Q3, which is connected in parallel with first capacitor Ca, is turned OFF first, followed by switching element Q2.

[0048] In the present invention, as shown in Fig. 1, switching elements S1 and S2 of switching circuit 1 that are to be turned off later are connected in series. To achieve zero voltage switching for switching elements S1 and S2 that are to be turned off later, for example, when switching element S1 is turned off, the voltage across switching element S2 of the other lower arm in the same first leg is reduced to zero before an on signal is applied to switching element Q2. Here, the period from when an off signal is applied to switching element Q1 to when an on signal is applied to switching element Q2, i.e., the period during which both switching elements S1 and S2 are turned off, is defined as Td.

[0049] This discharge operation, which reduces the voltage across switching element S2 to zero—that is, discharges capacitor C2 until its voltage reaches zero—is due to the flow of the excitation current described above. Therefore, to achieve zero-voltage switching of switching element S2, which will be turned off later, it is first necessary to set the excitation current to a magnitude that can reduce the voltage across switching element S2 to zero. Furthermore, it is necessary to provide a period Td during which both switching elements S1 and S2 are turned off so that the excitation current can reduce the voltage across switching element S2 to zero. The same is true for achieving zero-voltage switching (ZVS) for switching element S1 of switching circuit 1, which will be turned off later. It is necessary to provide an excitation current of a magnitude that can reduce the voltage across switching element S1 to zero and a period Td during which both switching elements S1 and S2 are turned off.

[0050] Note that if the period Td during which both switching elements S1 and S2 of the switching circuit 1 are turned off is set to a large value, the voltage across either switching element S1 or S2 may rise again after dropping to zero. In other words, the capacitor C1 or C2 may be charged after being discharged to zero. For this reason, it is preferable to set the period Td during which both switching elements S1 and S2 are turned off to approximately the period during which the voltage across either switching element S1 or S2 drops to zero. Furthermore, the parallel capacitors C1 and C2 connected in parallel to the switching elements Q1 and Q2 that are subsequently turned off have small capacitances, such as those due to the parasitic capacitance of the switching elements S1 and S2, and these capacitances vary depending on the component. For this reason, it is also possible to connect separate capacitors in parallel to the parasitic capacitance of the switching elements S1 and S2, and use the combined capacitance of these capacitors as the parallel capacitors C1 and C2.

[0051] Next, using the circuit diagram of converter 301 in FIG. 1 and FIGS. 7 to 10, we will explain the operation of causing switching circuit 2 to function as a full-bridge rectifier circuit when the voltage output between third terminal Ter3 and fourth terminal Ter4 is set lower than the output voltage obtained by the above-described operation of turning on and off switching elements S5 and S6 of switching circuit 2. FIG. 7 is a waveform diagram showing an example of drive signals for switching elements S1 to S4 of switching circuit 1 and switching elements S5 and S6 of switching circuit 2 during this operation. FIG. 8 is a waveform diagram showing an example of voltages and currents of switching elements S1 to S4 of switching circuit 1 and excitation current of transformer 11 during this operation. FIG. 9 is a waveform diagram showing an example of voltages and currents of anti-parallel diodes D5 to D8 of switching circuit 2 during this operation. FIG. 10 is a circuit diagram formed at each timing during this operation of converter 301. In the current waveforms shown in Figures 8 and 9, the current flowing in the forward direction through the switching elements S1 to S4 of the switching circuit 1 is positive, and the current flowing in the reverse direction through the switching elements S1 to S4 of the switching circuit 1 and the current flowing in the forward direction through the anti-parallel diodes D5 to D8 are negative.

[0052] 1 functions as a full-bridge rectifier circuit in which the bridge-connected circuit of switching circuit 2 conducts anti-parallel diodes D5 to D8. Therefore, basic operation 1 of converter 301 requires at least anti-parallel diodes D5 to D8 in switching circuit 2, and therefore, as shown in FIG. 7, no on signals are applied to the drive signals of switching elements S5 and S6 of switching circuit 2.

[0053] Time t21 is the time when an ON signal is applied to the switching elements S1 and S4 of the paired switching circuit 1. At this time, an ON signal is not applied to the switching elements S5 and S6 of the switching circuit 2. As shown in FIG. 10(a), on the primary winding 11a side of the transformer 11, current flows from the first terminal Ter1 side to the switching element Q1, the inductance means L, the primary winding 11a, the switching element Q4, and the second terminal Ter2 side. On the secondary winding 11b side of the transformer 11, current flows from the secondary winding 11b through the anti-parallel diode D5, the third terminal Ter3, and the fourth terminal Ter4 side, and then through the anti-parallel diode D8. Input power supplied from the first terminal Ter1 and the second terminal Ter2 side is supplied to the third terminal Ter3 and the fourth terminal Ter4 side via the inductance means L.

[0054] At time t22, for example, the control circuit 3 sends an OFF signal to the switching element S4, which is to be turned OFF first, of the switching elements S1 and S4 of the paired switching circuit 1, so that the voltage detection value between the third terminal Ter3 and the fourth terminal Ter4 detected by the detection means 18 of the switching circuit 2 approaches the target value. Therefore, as shown in FIG. 8, the switching element Q4 turns OFF when the current value is relatively large, resulting in switching loss when the switching element S4 turns OFF. In the present invention, as described above in the operation of turning ON and OFF the switching elements S5 and S6 of the switching circuit 2, in addition to the parallel capacitor C4, a second capacitor Cb is also connected in parallel to the switching element Q4 to increase the capacitance. Similarly, in addition to the parallel capacitor C3, a first capacitor Ca is also connected in parallel to the switching element Q3 to increase the capacitance.

[0055] 10(b), on the primary winding 11a side, current flows from the inductance means L, primary winding 11a, parallel capacitor C4 and second capacitor Cb, second terminal Ter2, and first terminal Ter1 through switch element Q1 in a direction that charges parallel capacitor C4 and second capacitor Cb connected in parallel to the turned-off switch element Q4. Meanwhile, a discharge current flows from parallel capacitor C3 and first capacitor Ca through switch element Q1, inductance means L, and primary winding 11a. By increasing the capacitance of the capacitors connected in parallel to switching elements S4 and S3 of switching circuit 1 that are turned off first and gradualing the rise in voltage across switching element S4, switching loss when switching element S4 of switching circuit 1 is turned off is reduced.

[0056] At time t23, when the discharge of parallel capacitor C3 and first capacitor Ca and the charging of parallel capacitor C4 and second capacitor Cb are completed, the anti-parallel diode D3 connected in parallel to switch element Q3 becomes conductive, as shown in Fig. 10(c). On the primary winding 11a side, due to the energy stored in inductance means L and the excitation current of transformer 11, a current flows from the inductance means L, primary winding 11a through anti-parallel diode D3 and switch element Q1 in the same direction as the current flowing through the primary winding 11a and inductance means L immediately before time t5. Note that the current on the secondary winding 11b side continues to flow from time t21 through the secondary winding 11b, anti-parallel diode D5, the third terminal Ter3 side, the fourth terminal Ter4 side, and anti-parallel diode D8.

[0057] At time t24, the drive signal for switching element S1, which is to be turned off later among the switching elements S1 and S4 of the paired switching circuit 1, is set to an OFF signal. Because switching element Q1 is turned off, the transformer excitation current that was flowing immediately before time t23 causes current to flow from the primary winding 11a through the anti-parallel diode D3, parallel capacitor C1, and inductance means L, as shown in FIG. 10(d), charging the parallel capacitor C1. Meanwhile, a discharge current flows from parallel capacitor C2 through the inductance means L, primary winding 11a, anti-parallel diode D3, first terminal Ter1, and second terminal Ter2. At this time, switching element Q1 is turned off while a current is still flowing through it, but the current can be smaller than that of switching element Q4, which was turned off earlier. Therefore, the switching loss of switching element Q1, which is to be turned off later, can be reduced compared to when switching element Q4, which is to be turned off earlier, is reduced.

[0058] 10(e), when the charging and discharging of the parallel capacitors C1 and C2 finishes at time t25, the anti-parallel diode D2 becomes conductive. Due to the excitation current of the transformer 11, a current flows from the primary winding 11a through the anti-parallel diode D3, the first terminal Ter1, the second terminal Ter2, the anti-parallel diode D2, and the inductance means L in the same direction as the current that flowed through the primary winding 11a immediately before time t25. Note that the current on the secondary winding 11b side continues to flow from time t21 through the secondary winding 11b, the anti-parallel diode D5, the third terminal Ter3 side, the fourth terminal Ter4 side, and the anti-parallel diode D8.

[0059] At time t26, an ON signal is sent to the switching elements S2 and S3 of the other pair of switching circuits 1. As shown in FIG. 10(f), on the primary winding 11a side, switching elements Q2 and Q3 conduct in the forward direction, and current flows through the first terminal Ter1 side, switching element Q3, primary winding 11a, inductance means L, switching element Q2, and second terminal Ter2 side. Because the current flowing through the primary winding 11a is now in the opposite direction, on the secondary winding 11b side, anti-parallel diodes D6 and D7 conduct in the forward direction, and current flows from the secondary winding 11b through the anti-parallel diode D7, the third terminal Ter3, and the fourth terminal Ter4 side through the anti-parallel diode D6. As in the case of FIG. 10(a), power input between the first terminal Ter1 and the second terminal Ter2 is supplied to the third terminal Ter3 and the fourth terminal Ter4 side via the inductance means L.

[0060] Similar to the operation of turning on and off the switching elements S5 and S6 of the switching circuit 2 described above, in the operation of causing the bridge-connected circuit of the switching circuit 2 to function as a full-bridge rectifier circuit, the anti-parallel diodes D2 and D3 connected in parallel to the switching elements Q2 and Q3, respectively, are conductive immediately before time t26, and therefore, as shown in FIG. 8, the switching elements S2 and S3 of the switching circuit 1 can achieve zero-voltage switching when they are on.

[0061] The operation of the switching elements S2 and S3 of the other pair of switching circuits 1 after time t26 is the same as that of the switching elements S1 and S4 of the above-mentioned pair from time t21 to time t26. That is, for example, the control circuit 3 first turns off the switch element Q3 of the pair of switching elements S2 and S3, which has the first capacitor Ca connected in parallel, and then turns off the switch element Q2, so that the output voltage between the third terminal Ter3 and the fourth terminal Ter4 becomes a desired value.

[0062] In the basic operation of converter 301, when control circuit 3 is causing the bridge-connected circuit of switching circuit 2 to function as a full-bridge rectifier circuit, if the detected value of the voltage output between third terminal Ter3 and fourth terminal Ter4 does not approach the target value even after modulating the pulse width and frequency of the switching elements of switching circuit 1, control circuit 3 switches to an operation that turns on and off switching elements S5 and S6 of switching circuit 2. Conversely, when control circuit 3 is causing the bridge-connected circuit of switching circuit 2 to function as a full-bridge rectifier circuit, if the detected value of the voltage output between third terminal Ter3 and fourth terminal Ter4 does not approach the target value even after modulating the pulse width and frequency of switching elements S5 and S6 of switching circuit 2, control circuit 3 switches to an operation that causes the bridge-connected circuit of switching circuit 2 to function as a full-bridge rectifier circuit. By switching between the two operations, a wide range of input and output voltages and currents can be accommodated regardless of circuit constants such as the turns ratio of transformer 11 or load conditions.

[0063] As with the above-described operation of turning on and off switching elements S5 and S6 of switching circuit 2, when the bridge-connected circuit of switching circuit 2 functions as a full-bridge rectifier circuit, the capacitance of the capacitor connected in parallel with the switching element that is to be turned off first among the pair of switching elements in switching circuit 1 is set to be larger than the capacitance of the capacitor connected in parallel with the switching element that is to be turned off last. Furthermore, in order to achieve zero-voltage switching for switching elements S1 and S2 of switching circuit 1 that are to be turned off last, the excitation current must first be set to a value that can reduce the voltage across switching element S2 or S1 to zero. Furthermore, a period Td must be set during which both switching elements S1 and S2 are turned off, allowing the excitation current to reduce the voltage across switching element S2 or S1 to zero.

[0064] The period Td during which both switching elements S1 and S2 of the switching circuit 1 are turned off is preferably set to approximately the period during which the voltage across either switching element S1 or S2 drops to zero. Furthermore, the parallel capacitors C1 and C2 connected in parallel to the switching elements Q1 and Q2 that are turned off later have small capacitance values, such as the parasitic capacitance built into the switching elements S1 and S2, and these values ​​vary depending on the component. Therefore, separate capacitors may be connected in parallel to the parasitic capacitance built into the switching elements S1 and S2, and the combined capacitance of these may be used as the parallel capacitors C1 and C2.

[0065] 2 and 7 show an example of operation in which, at times t8 and t26, ON signals, which are drive signals for switching elements S2 and S3 of switching circuit 1, are simultaneously applied, and switch elements Q2 and Q3 begin to conduct in the forward direction. However, without being limited to the above example of basic operation, the ON signals for switching elements S2 and S3 do not have to be applied simultaneously. Furthermore, the ON signals for switching elements S2 and S3 may be applied during the period in which anti-parallel diodes D2 and D3 are conducting. In this case, the time when the ON signals for switching elements S2 and S3 are applied does not coincide with the time when switch elements Q2 and Q3 begin to conduct in the forward direction. For example, forward current begins to flow through switch elements Q2 and Q3 after the current flowing through anti-parallel diodes D2 and D3 becomes zero. Furthermore, if the voltage drop across switching elements Q2 and Q3 when a current flows in the reverse direction is smaller than the forward voltage, which is the voltage drop across the anti-parallel diodes D2 and D3 when a forward current flows, an on signal is given to switching elements S2 and S3 to make switching elements Q2 and Q3 conduct in the reverse direction, thereby reducing the conduction loss of switching elements S2 and S3. The same applies to switching elements S1 and S4 of the other switching circuit 1.

[0066] In the above-described basic operation 1, of the switching elements S1 and S4, and S2 and S3 of the paired switching circuit 1, the switching elements S4 and S3 of the upper and lower arms of the second leg 13 are turned off first. However, the switching elements S1 and S2 of the upper and lower arms of the first leg 12 may be turned off first. In this case, the first capacitor Ca and the second capacitor Cb are connected to the switching elements S1 and S2, respectively. The switching elements of the switching circuit 1 that are turned off first may be the switching elements S1 and S3 of the upper arms of the first leg 12 and the second leg 13, or the switching elements S2 and S4 of the lower arms of the first leg 12 and the second leg 13. In this case, the first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S1 and S3 or the switching elements S2 and S4, respectively, that are turned off first.

[0067] Furthermore, in the above-described basic operation 1, the positions of the series circuit of switching elements S5 and S6 connected between the third terminal Ter3 and the fourth terminal Ter4 and the series circuit of anti-parallel diodes D7 and D8 may be interchanged within the bridge-connected circuit of switching circuit 2 shown in FIG. In this case, the third capacitor Cc and the fourth capacitor Cd are connected in parallel with the switching elements S5 and S6 of switching circuit 2 that are to be turned on and off, respectively. Furthermore, the switching circuit 2 may have a mixed bridge-connected circuit configuration in which the series circuit of the anti-parallel diode D7 or D8 and the switching element S5 or S6 of switching circuit 2 is connected between the third terminal Ter3 and the fourth terminal Ter4, respectively. In this case, the third capacitor Cc and the fourth capacitor Cd are connected in parallel with the switching elements S5 and S6 of switching circuit 2 that are to be turned on and off, respectively.

[0068] In the above description of the operation of causing the bridge-connected circuit of switching circuit 2 to function as a full-bridge rectifier circuit, for example, during the period when anti-parallel diodes D5 and D6 are conducting, an ON signal may be applied to switching elements S5 and S6 in FIG. 1 to cause switching elements Q5 and Q6 to conduct in the reverse direction, i.e., the forward direction of anti-parallel diodes D5 and D6. If the voltage drop across switching elements Q5 and Q6 when a reverse current flows is smaller than the forward voltage across anti-parallel diodes D5 and D6 when a forward current flows, the conduction loss of anti-parallel diodes D5 and D6 can be reduced. Similarly, when switching elements S7 and S8 including anti-parallel diodes D7 and D8 or switching elements S7 and S8 connected in parallel with anti-parallel diodes D7 and D8 are used, the conduction loss of switching elements Q7 and Q8 can be reduced by conducting in the reverse direction. In the above converter 301, when the voltage output between the third terminal Ter3 and the fourth terminal Ter4 is used only for the operation of lowering the voltage obtained by turning on and off the switching elements S5, S6 of the switching circuit 2, the switching circuit 2 only needs to have at least anti-parallel diodes D5 to D8 that operate as a full-bridge rectifier circuit or switching elements that can pass a current in the same direction as the forward direction of the anti-parallel diodes D5 to D8.

[0069] Converter 301 of the present invention can accommodate a wide range of input and output voltages and currents by using inductance means connected to the primary or secondary winding of the transformer to turn on and off the switching elements of switching circuit 2 and to make the bridge-connected circuit of switching circuit 2 function as a full-bridge rectifier circuit. It can also reduce switching loss that occurs when a switching element is turned off while current is flowing, and can reduce switching loss that occurs when one of the paired switching elements of switching circuit 1 is subsequently turned off. Furthermore, zero-voltage switching can be achieved to reduce switching loss.

[0070] (Basic movement 2) 1 also functions as a bidirectional converter because the circuit configuration is such that switching circuit 2 and switching circuit 1 are mirror images of each other with transformer 11 sandwiched between them. In other words, if control circuit 3 operates switching elements S1 to S6 as described in basic operation 1, power can be transferred from the input side (first terminal Ter1, second terminal Ter2) to the output side (third terminal Ter3, fourth terminal Ter4), and if switching elements S3 to S8 are operated as described in basic operation 1 so that the input side is the third terminal Ter3 and the fourth terminal Ter4 and the output side is the first terminal Ter1 and the second terminal Ter2, power can be transferred from the input side (third terminal Ter3, fourth terminal Ter4) to the output side (first terminal Ter1, second terminal Ter2).

[0071] In the present invention, in the above description, the excitation inductance of the transformer also includes an inductance component connected in parallel to the primary winding or secondary winding of the transformer 11 in order to adjust the excitation current to an appropriate magnitude. Also, in the above description, the current flowing due to a combined inductance formed by the excitation inductance of the transformer 11 and an inductance component connected in parallel thereto is also included in the excitation current. The excitation inductance of the transformer can be adjusted by, for example, the gap width of the core, the number of turns of the winding, the material of the core, etc. in the transformer structure.

[0072] In the above basic operations 1 and 2, the control circuit 3 makes the voltage values ​​detected by the detection means 18 of the switching circuit 2 and the detection means 19 of the switching circuit 1 approach the target values, but the detected values ​​used may be the output current value, the output power, or a combination of these. Similarly, the detected values ​​of the input voltage, current, or power may be made to approach the target values. Generally, the detected power value is a calculated value obtained by multiplying the detected voltage and current. The above-mentioned detected values ​​of the output voltage, current, or power or the detected values ​​of the input voltage, current, or power also include values ​​obtained by performing calculations such as multiplying or dividing these values ​​by a certain coefficient, or adding or subtracting a certain value.

[0073] The present invention uses inductance means connected to the primary or secondary winding of a transformer to realize an operation of turning on and off the switching elements of the output-side switching circuit 2 or switching circuit 1 and an operation of making the output-side switching circuit 2 or switching circuit 1 function as a rectifier circuit, thereby enabling compatibility with a wide range of input and output voltages and currents. Furthermore, it is possible to reduce switching loss that occurs when a switching element is turned off while current is flowing, and to reduce switching loss that occurs when one of the switching elements of a pair of switching circuits 1 is subsequently turned off. Furthermore, by realizing zero-voltage switching, it is possible to reduce switching loss.

[0074] (Basic movement 3) This basic operation explains an additional operation (low input switching control) in converter 301 (bidirectional converter) having the circuit shown in Figure 1. Note that this explanation will be given assuming that two terminals (Ter1 and Ter2) are the input side and two terminals (Ter3 and Ter4) are the output side, but because the circuit configuration is symmetrical with respect to transformer 11, the operation will be the same even if the input and output are reversed.

[0075] When a detected value of the voltage, current, or power input from between the two terminals (Ter1 & Ter2) of one of the switching circuits (1) falls below a certain reference value, the control circuit 3 performs low-input switching control by turning on the switching elements (S1 / S2) of the first leg (12) in one of the switching circuits (1) and simultaneously turning on the switching elements (S6 / S5) of the upper arm or lower arm of the second leg (24) and the switching elements (S7 / S8) of the lower arm or upper arm of the first leg (25) in the other of the switching circuits (2), and by turning off the switching elements (S6 / S5) of the second leg (24) in the other of the switching circuits (2).

[0076] 11 to 14 are diagrams illustrating the switching control performed by the control circuit 3. Fig. 11 is a waveform diagram (same as Fig. 2) that drives each switch in a steady state when the detected values ​​of the input current and the like input to two terminals (Ter1 and Ter2) are equal to or greater than a predetermined value. The switching frequency is the reciprocal of one cycle Tt from the time when the switching element S1 or S2 is turned on to the time when it is turned off and then turned on again, and the steady state switching frequency is, for example, 50 KHz.

[0077] In this converter 301, the control circuit 3 drives each switch as shown in Fig. 11 when in a steady state. The control circuit 3 monitors the input voltage to two terminals (Ter1 and Ter2) detected by the detection means 19 of the switching circuit 1, and performs the energy transition switching control to adjust the energy transition period (Tp) during which the pair of switching elements (S1&S4 / S3&S2) of one of the switching circuits (1) and the switching elements (S6 / S5) of the second leg (24) of the other switching circuit (2) are in the on state.

[0078] For example, the control circuit (3) When the voltage input between the two terminals (Ter1 & Ter2) of one of the switching circuits (1) drops and the current value Itr flowing through the winding (11a) of the transformer (11) connected to the one of the switching circuits (1) does not satisfy a predetermined value, the energy transition switching control is In order to lengthen the energy transition period (Tp), phase control is performed to shift the phase of the on / off cycle of the switching element (S6 / S5) of the second leg (13) of the other switching circuit (2) (FIGS. 11 and 12), and further time control is performed to adjust the time T2 during which the switching element (S6 / S5) of the second leg (13) of the other switching circuit (2) is on (time T2 is extended to T2' from FIG. 12 to FIG. 13).

[0079] Specifically, when the control circuit 3 detects a decrease in a detected value such as the input current, it delays the phase of the switching elements (S5, S6) (shifts them to the right in the drawing) as shown in FIGS. 11 and 12, and performs phase control to lengthen the time Tp during which the switching elements (S1, S4, and S6) are simultaneously turned on and the switching elements (S2, S3, and S5) are simultaneously turned on. In other words, by lengthening the time Tp through phase control even when the input current decreases, it is possible to prevent a decrease in the energy transferred from switching circuit 1 to switching circuit 2 and to prevent a decrease in the current value Itr flowing through the primary side of transformer 11, which is used to achieve ZVS for the switching elements (S1 and S2) (see FIG. 6(a) or (h)). At time t6, the input current from two terminals (Ter1 and Ter2) is used to charge and discharge the parallel capacitors (C1 and C2), thereby achieving ZVS.

[0080] Here, the phase control of switching elements S5 and S6 can be delayed until the time (t1 or t8) when the switching elements (S2, S3 or S1, S4) are turned on. If it is detected that the input current value, etc. is still insufficient to the target value after delaying the phases of switching elements S5 and S6 to the maximum, control circuit 3 extends the time T2 for turning on the switching elements (S5, S6) to T2', as shown in Figures 12 and 13, and performs control to lengthen time Tp. In other words, by lengthening time Tp, even if the input current further decreases, a decrease in the energy transferred from switching circuit 1 to switching circuit 2 can be prevented, and a decrease in the current value Itr flowing through the primary side of transformer 11, which is required to achieve ZVS, can be prevented.

[0081] In this way, in the energy transition switching control, the switching elements (S5, S6) are turned on at an appropriate timing and for an appropriate period, and the secondary side of the transformer 11 is short-circuited, thereby applying an input voltage to the inductance means L and increasing the current value Itr.

[0082] Here, by controlling the timing of switching elements S5 and S6, it is possible to extend time Tp to the time when switching elements (S2, S3) are turned on (the time from time t1 to t4 in Figures 11 to 13). It is possible to extend time T2', but since the time (t1-t4) when switching elements (S2, S3) are turned on remains unchanged, time Tp cannot be extended any further. Note that there is an optimum value for time T2 (T2'), as will be described later.

[0083] Therefore, when the current value Itr does not satisfy the predetermined value even after performing the above-mentioned energy transition switching control, the control circuit 3 performs the low input switching control (FIG. 14).

[0084] Specifically, when the control circuit 3 detects a further decrease in input current, it turns on the switching elements (S8, S7) that were always off at time t1 or t8 when the switching elements (S2, S3, and S5) are simultaneously turned on and the switching elements (S1, S4, and S6) are simultaneously turned on, as shown in Fig. 14. The time T3 for turning on the switching elements (S8, S7) will be described later.

[0085] FIG. 15 is a diagram illustrating the current value Itr when low-input switching control is not performed. The horizontal axis represents time, and the vertical axis represents the current value Itr. As described above, the converter 301 uses the current on the primary side of the transformer 11 to reduce the charge in the parallel capacitors (C1 / C2) of the switching elements (S1 / S2) between times t6 and t7, thereby achieving ZVS at time t8. When the input voltage becomes extremely low (for example, 0 V), the voltage applied to the inductance means L also decreases. Therefore, even if the time Tp is lengthened (dotted line) by performing phase control and time control of the switching elements (S5, S6) as shown in FIG. 15, it is difficult to increase the current value Itr, i.e., ZVS becomes difficult.

[0086] Therefore, as in this basic operation, low-input switching control is performed, for example, by turning on switching element S8 during time Tp when the primary-side switching elements (S2, S3) and secondary-side switching element S5 of transformer 11 are simultaneously on. Specifically, switching element S8 is turned on for time T3 between FIG. 6(g) and FIG. 6(h), forming the circuit state shown in FIG. 20. This control causes the output voltage Vo generated at two terminals (Ter3, Ter4) to be applied to the secondary side of transformer 11, and the sum (VL = Vin + Vo) of the primary-side equivalent value of the output voltage Vo and the input voltage Vin input from two terminals (Ter1 & Ter2) is applied to inductance means L. This allows the slope (rate of increase) of the current value Itr of transformer 11 to be larger than that shown in FIG. 15 (FIGS. 16 and 20). 15, where low input switching control is not performed, in FIG. 16, where low input switching control is performed, the current value Itr can be increased significantly during time T3. In this way, this basic operation can sufficiently reduce the charge in the parallel capacitors (C1, C2) of the switching elements (S1, S2), and ensure the value x of the current value Itr necessary for ZVS.

[0087] On the other hand, when switching element S5 is turned off at time t2 (time T2), the increase in current value Itr during time T3 becomes a residual current. This residual current becomes a reactive current and increases losses. From the perspective of reducing the residual current (reactive current) and minimizing losses, it is desirable to turn switching element S5 off early (shorten time T2) to extend the discharge time of parallel capacitor C5 and capacitor Cc.

[0088] That is, there is a trade-off between time T2 and time T3 between an increase in input current and the occurrence of loss, and there is an optimum time T2 for obtaining a desired input current. Here, the optimum value of the time T2 (T2') will be explained using Fig. 17 to Fig. 19. Fig. 17 to Fig. 19 show the waveforms of the currents flowing through the switching elements (S1, S2) (the anti-parallel diodes (D1, D2) and parallel capacitors ( 17 is a diagram illustrating a current waveform when time T2 (T2') is optimal, FIG. 18 is a diagram illustrating a current waveform when time T2 (T2') is short, and FIG. 19 is a diagram illustrating a current waveform when time T2 (T2') is too long.

[0089] The optimal time T2 (T2') is calculated as follows: First, the current value Itr required for ZVS of the switching elements (S1, S2) is set as the current value x. The current value x is determined by the type of the switching elements (S1, S2) and the specifications of the converter.

[0090] In the low input switching control, the control circuit 3 sets a period T2 during which the switching element (S6 / S5) of the second leg 24 of the other switching circuit 2 is turned on by Equation 1.

number

[0091] If time T2 is appropriate, current flows through the switching element (S1 or S2) as follows (switching element S1 will be described here). At time t6 (t6 at the leftmost position on the horizontal axis), switching element Q2 turns off, and at the same time, parallel capacitor C1 begins discharging (parallel capacitor C2 charges) (spike A01 in the current waveform). Because the capacitance of parallel capacitor C1 is small, when discharging of parallel capacitor C1 is complete, current begins flowing through anti-parallel diode D1 (also shown as spike A01 in the current waveform). Note that this time is t7 (the time during which current flows, as shown in Figure 6(g)), but this is not shown in Figure 17. Switching element Q1 is turned on before this current reaches zero (time t1 = t8; time Td ends). At time t1, switching element Q7 also turns on, and time T3 begins. During time T3, the voltages at the two terminals (Ter3, Ter4) are applied to the secondary side of transformer 11, and the sum of the primary-side converted value of the output voltage and the input voltages input from the two terminals (Ter1 & Ter2) is applied to inductance means L, increasing current value Itr and increasing current Isw flowing through switching element S1. After time T3, switching element Q7 is turned off, and application of the voltages at the two terminals (Ter3, Ter4) to the secondary side of transformer 11 ceases during time T3, so the increase in current Isw flowing through switching element S1 becomes smaller (or may not increase at all in some cases).

[0092] At time t4, switching element Q4 is turned off first, and then at time t2, switching element Q6 is also turned off. After time t2, inductance means L begins to release energy, so the current value Itr decreases, and the current Isw flowing through switching element S1 also decreases. Then, at time t6, switching element Q1 turns off and simultaneously current begins to flow through parallel capacitor C1, but because the capacitance of parallel capacitor C1 is small, charging is completed quickly and the current Isw flowing through switching element S1 becomes zero (part A02 of the current waveform). Note that this time is t7, but is not shown in Figure 17.

[0093] If time T3 is long and time T2 calculated using equation 1 is short, the current Isw flows in the reverse direction (part A1) immediately before switching between the switching elements Q1 and Q2, as shown in Figure 18, making it impossible to achieve ZVS. On the other hand, if time T3 is short and time T2 calculated using equation 1 is long, the switching elements Q1 and Q2 turn off before the current becomes zero (part A2), as shown in Figure 19, resulting in increased switching loss. Furthermore, after the other switching element Q2 and Q1 turns on, this current flows in the reverse direction (part A3), and the current input between the two terminals (Ter1 and Ter2) decreases.

[0094] In this way, by calculating the maximum value of the time T2 using Equation 1, it is possible to set the optimal time T2 so that the current value x required for ZVS when the switching elements (S1, S2) are on is ensured while the current value when the switching elements (S1, S2) are off does not become too large.

[0095] Specifically, when the input current drops, the control circuit 3 controls the switching elements as follows. To increase the input current, the control circuit 3 controls the switching elements (S5, S6) by first advancing the phase of the drive signal while fixing the pulse width of the drive signal (Figures 11 and 12). Then, the control circuit 3 fixes the phase and widens the pulse width when the timing to turn on the switching elements (S5, S6) is approximately the same as the timing to turn on the switching elements (S1, S2) (Figure 13). Furthermore, when the pulse width time T2 reaches the calculated value Tca, the control circuit 3 provides a drive signal to the switching elements (S7, S8), creating time T3 and starting low-input switching control (Figure 14). Here, the value Tca is the time T2 calculated under condition 2 (T3 = 0) in equation 1. Under condition 2 of equation 1, if time T3 is extended, time T2 is also extended. Here, when the extended time T3 meets condition 1 of equation 1, time T2 is calculated as T3' = T3. Control circuit 3 continues to calculate equation 1 so as to maintain the state of Figure 17, and times T2 and T3 are shortened or extended depending on the situation.

[0096] (Embodiment 1) Next, an embodiment of a power supply system according to the present invention will be described with reference to FIG. In this embodiment, an operation of transferring power from the series connection terminal Ter S to the parallel connection terminal Ter P will be described. When the voltage (Vi) input from the series connection terminal Ter S is high, the controller 30 controls the primary side voltages Vin1 to Vin m The control circuit 3 of each converter 301 is instructed to control the converters 301 so that the power consumption is equalized.

[0097] Consider a state in which the voltage Vi during operation is lower than the maximum voltage value of the (m-1) converters 301, and the power output from the parallel connection terminal TerP is less than the maximum output power of the (m-1) converters 301. When this state occurs, the controller 30 instructs the control circuit 3 of one of the converters 301 (e.g., converter 301-1) to perform the above-mentioned basic operation control (voltage reduction instruction) so as to reduce the voltage (Vin1) between the two terminals (Ter1 and Ter2) while maintaining the current value Itr flowing through the transformer 11. Note that the voltage between the two terminals (Ter3 and Ter4) of the converter 301-1 is maintained at voltage Vo because the outputs of the converters 301 are connected in parallel as the parallel connection terminal TerP.

[0098] Specifically, the controller 30 outputs a target value of the voltage Vin1 to the control circuit 3 of the converter 301-1 as a voltage reduction instruction. The control circuit 3 performs zero-voltage switching control, energy transition switching control, and low-input switching control so that Vin1 reaches the target value, and by extending the time T3 in the operation of Fig. 14, it is possible to reduce Vin1 to near zero voltage while flowing the current value Itr. In other words, the voltage reduction instruction is an instruction to adjust T1, T2, and T3' so that Vin becomes zero while satisfying formula (1). (supplement) As used herein, "Vin" and "Vin x" is the input voltage of each converter (voltage on the series connection terminal side), and the subscripts refer to each converter 301 (subscripts of converter 301-x). Also, "Vi" refers to the voltage between the series connection terminals (Ter S) of the power supply system. (End of supplement)

[0099] On the other hand, the controller 30 controls the control circuits 3 of the other converters 301 (for example, converters 301-2 to 301-m) to increase their respective voltages (Vin2 to Vin m ) while increasing each voltage (Vin2 to Vin m ) equalization control continues (see Figure 22).

[0100] FIG. 22 shows the voltage Vi of the series-connected terminal Ter S and the voltages (Vin1 to Vin m ) is a diagram illustrating the relationship between the voltage Vi and the voltage between the two terminals (Ter1 and Ter2) of each converter 301. m ) also decreases. When the voltage Vi decreases to a predetermined value (time m2), the controller 30 instructs the control circuit 3 of the converter 301-1 to decrease the voltage Vin1 while maintaining the current Itr. On the other hand, the controller 30 instructs the control circuits 3 of the other converters (301-2 to 301-m) to share the voltage Vi among the other converters (301-2 to 301-m) (Vin2 to Vin3 are increased by the amount of decrease in Vin1). m rises.)

[0101] Then, assume that the voltage Vin1 of the converter 301-1 drops to near zero voltage at time m3. When Vin becomes zero, the controller 30 issues a stop instruction to the control circuit 3 to turn on all of the switching elements included in the first leg 12, the second leg 13, or the first leg 12 and the second leg 13, of one switching circuit 1 of the converter 301-1, and turn off all of the switching elements included in the third leg 24, the fourth leg 25, or the third leg 24 and the fourth leg 25, of the other switching circuit 2, thereby bringing the converter 301-1 to a stopped state.

[0102] In other words, after time m3, by shorting the two terminals (Ter1 and Ter2) of converter 301-1 and simultaneously opening the two terminals (Ter3 and Ter4), it is possible to significantly reduce the loss of converter 301-1. Furthermore, because converter 301-1 has stopped, the other converters (301-2 to m) operate under heavier loads, thereby improving efficiency.

[0103] [supplement] Converters tend to have a lower power efficiency when under light load, so by reducing the number of units in operation and increasing the output power per unit, operation under light load conditions can be avoided and the converters can be operated in a more efficient state. [End of supplement]

[0104] When converter 301 is stopped, two terminals (Ter1 and Ter2) are short-circuited by the primary-side switch elements (Q1 to Q4), so there is no need to provide a separate switch element for short-circuiting. Also, while the input terminals are short-circuited even if only switch elements Q1 and Q2 or Q3 and Q4 are turned on, turning on all of Q1 to Q4 reduces the combined resistance and allows for loss reduction.

[0105] Furthermore, if the voltage Vi and the output power further decrease, this can be addressed by similarly stopping the switching of the other converters 301 one by one.

[0106] (Embodiment 2) In this embodiment, an operation of transferring power from the parallel connection terminal Ter P to the series connection terminal Ter S will be described. In this operation, the controller 30 also calculates the primary side voltages Vin1 to Vin of each converter 301 with respect to the voltage (Vi) output from the series connection terminal Ter S. m The control circuit 3 of each converter 301 is instructed to control the converters 301 so that the power consumption is equalized.

[0107] As in the first embodiment, consider a state in which the voltage Vi during operation is lower than the maximum voltage value of the (m-1) converters 301, and the power input from the parallel connection terminal Ter P is less than the maximum input power of the (m-1) converters 301. When this state occurs, the controller 30 instructs the control circuit 3 of one of the converters 301 (e.g., converter 301-1) to perform the above-described basic operation control (voltage reduction instruction) so as to reduce the voltage (Vin1) between two terminals (Ter1 and Ter2) while maintaining the current value Itr flowing through the transformer 11. Note that the voltage between the two terminals (Ter3 and Ter4) of the converter 301-1 is maintained at voltage Vo because the converters 301 are connected in parallel via the parallel connection terminal Ter P.

[0108] Specifically, the controller 30 outputs a voltage reduction command to the control circuit 3 of the converter 301-1, indicating the target value of the voltage Vin1. In this embodiment, the method for reducing the voltage Vin1, which is the output voltage, to near zero may be a method commonly used in overcurrent drooping operations (e.g., narrowing the pulse width to reduce the output power). For example, the control circuit 3 performs zero-voltage switching control and energy transition switching control to shorten the time T1, ultimately shortening it to zero, so that the target value of Vin1 is reached while the current value Itr flows. Note that, although the time T1 is the time for turning on the switching elements S3 and S4 in the operation of FIG. 7, in this embodiment, the time T1 is actually the time for turning on the switching elements S5 and S6 because the power transition is in the opposite direction. In other words, the voltage reduction command is a command to shorten the on-time T1 of the switching elements (S5 and S6) that turn off before the other switching circuit 2.

[0109] On the other hand, the controller 30 controls the control circuits 3 of the other converters 301 (for example, converters 301-2 to 301-m) to increase their respective voltages (Vin2 to Vin m ) while increasing each voltage (Vin2 to Vin m ) equalization control will continue.

[0110] Then, the controller 30 shortens the on time T1 of the switching elements (S5, S6) that are to be turned off first, and when Vin1 becomes zero (when the voltage Vin1 of the converter 301-1 drops to near zero voltage), it issues a conduction instruction to turn on all of the switching elements included in the first leg 12, the second leg 13, or the first leg 12 and the second leg 13 of one switching circuit 1, and to turn off all of the switching elements included in the third leg 24, the second leg 25, or the first leg 24 and the second leg 25 of the other switching circuit 2.

[0111] In this embodiment, as in embodiment 1, the loss in converter 301-1 can be significantly reduced by shorting two terminals (Ter1 and Ter2) of converter 301-1 and simultaneously opening two terminals (Ter3 and Ter4). Furthermore, since converter 301-1 has stopped, the other converters (301-2 to m) operate under heavier loads, thereby improving efficiency.

[0112] (Other embodiments) In the electric circuits of the present invention, a connection point refers to a portion that is electrically connected and at the same potential, and does not refer to a point where the portions are physically connected. Furthermore, the configuration, structure, number, arrangement, shape, material, etc. of each portion of the converter and bidirectional converter of the present invention are not limited to the above specific examples, and any suitable selection by a person skilled in the art is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0113] More specifically, for example, semiconductor elements exemplified by symbols are not limited to these specific electrical elements, but can be configured as a single electrical element or an electrical circuit including multiple electrical elements having the same function or action, and all such variations are encompassed within the scope of the present invention. Similarly, the number and layout of circuit elements, including diodes, capacitors, and switching elements, as appropriately modified by a person skilled in the art are encompassed within the scope of the present invention.

[0114] (Effects of the Invention) By applying this invention to a configuration in which multiple DC / DC converters have their inputs connected in series and their outputs connected in parallel, it is possible to optimize the number of operating units even during operation, and to operate in a highly efficient state when the input voltage is low and the output power is small. [Explanation of symbols]

[0115] Ter1: Terminal 1 Ter2: Terminal 2 Ter3: Third terminal Ter4: 4th terminal Ter S: Series connection terminal Ter P: Parallel connection terminal 1, 2: Switching circuit 3: Control circuit 11: Trance 12: First leg (first leg of switching circuit 1) 13: Second leg (second leg of switching circuit 1) 24: Third leg (second leg of switching circuit 2) 25: 4th leg (1st leg of switching circuit 2) 16, 17: Capacitor 18: Detection means of switching circuit 2 19: Detection means for switching circuit 1 30: Controller S1 to S4: switching elements of switching circuit 1 Q1 to Q4: Switch elements D1 to D4: Anti-parallel diodes C1 to C4: parallel capacitors D5 to D8: Anti-parallel diodes S5 to S8: Switching elements of switching circuit 2 Q5 to Q8: Switch elements C5 to C8: parallel capacitors Ca: first capacitor of switching circuit 1 Cb: Second capacitor of switching circuit 1 Cc: The first capacitor of the switching circuit 2 (sometimes referred to as the "third capacitor") Cd: Second capacitor of switching circuit 2 (sometimes referred to as the "fourth capacitor") L: inductance means

Claims

1. A power supply system including a plurality of converters, The converter comprises: a transformer having a primary winding and a secondary winding; two switching circuits each connected in parallel between two terminals, the two switching circuits including a first leg and a second leg, each of which has upper and lower arms each including a switching element having a switch element to which an anti-parallel diode and a parallel capacitor are connected in parallel; a first capacitor connected in parallel to one of the switching elements in the upper or lower arm of the first leg or the second leg or one of the switching elements in the upper or lower arm of the first leg and the second leg; and a second capacitor connected in parallel to the other of the switching elements in the upper or lower arm of the first leg or the second leg or the other of the switching elements in the upper or lower arm of the first leg and the second leg; and the two switching circuits each connected to the primary winding side and the secondary winding side of the transformer, respectively; an inductance means connected between a connection point of the upper and lower arms of the first leg and a connection point of the upper and lower arms of the second leg via the primary winding or the secondary winding on the primary winding or the secondary winding of the transformer; a control circuit for controlling the switching of the switching circuit; Equipped with The switching control of the control circuit includes: The method includes a zero voltage switching control, an energy transition switching control, and a low input switching control that is performed in conjunction with the energy transition switching control, The zero voltage switching control is For one of the switching circuits, a switching element of the upper arm of the first or second leg and a switching element of the lower arm of the second or first leg are turned on and off alternately in pairs to convert DC input from the two terminal sides into AC and output the AC from the switching circuit, and when controlling the pair of switching elements to be turned on and off alternately, of the switching element of the upper arm of the first or second leg and the switching element of the lower arm of the second or first leg that are in an on state, the switching element to which the first capacitor or the second capacitor is connected in parallel is turned off first. The energy transition switching control includes: making the switching elements of the second leg of one of the switching circuits conduct in a forward direction so that energy input from the two terminal sides is accumulated in the inductance means during a period in which the pair of switching elements in one of the switching circuits is in an on state, so that a detected value of a voltage, current, or power output from the two terminal sides of the other of the switching circuits or a detected value of a voltage, current, or power input from the two terminal sides of one of the switching circuits approaches a target value, and turning off the switching elements of the second leg of the other of the switching circuits that have been made conduct in the forward direction before turning off the switching elements of one of the switching circuits that are to be turned off first; The low input switching control when a detected value of voltage, current or power input from between the two terminals of one of the switching circuits falls below a certain reference value, turning on the switching element of the first leg in one of the switching circuits and simultaneously turning on the switching element of the upper arm or the lower arm of the second leg and the switching element of the lower arm or the upper arm of the first leg in the other of the switching circuits, and turning off the switching element of the first leg before turning off the switching element of the second leg in the other of the switching circuits; It is characterized by The control circuit In the low input switching control, a period T2 during which the switching element of the second leg of the other switching circuit is turned on is set by Equation 1, The power supply system includes: a series connection terminal in which the converters are connected in series at the two terminals of one of the switching circuits; a parallel connection terminal in which the converters are connected in parallel at the two terminals of the other switching circuit; a controller that issues control instructions to the control circuits of the converters; Equipped with The controller issues, as the control instruction, a voltage reduction instruction to reduce the voltage between the two terminals of one of the switching circuits to a number of the converters corresponding to the voltage of the series-connected terminals. [Equation 1] is. Also, T1 is a period during which the switching element of the second leg of one of the switching circuits is turned on, Tt is the switching period of one of the switching circuits, T3 is a period during which the switching element of the first leg of the other switching circuit is turned on, Vin is the voltage input between the two terminals of one of the switching circuits, Vo is the voltage output from the two terminals of the other switching circuit, n1 and n2 are the number of turns of the primary winding and the secondary winding of the transformer, respectively; L is the inductance of the inductance means, x is an arbitrary current value is.

2. When a direct current is input from the series connection terminal and a direct current is output from the parallel connection terminal, 2. The power supply system according to claim 1, wherein the voltage reduction instruction is an instruction to adjust T1, T2, and T3' so that Vin becomes zero.

3. 3. The power supply system according to claim 2, wherein when Vin becomes zero, the controller turns on all of the switching elements included in the first leg, the second leg, or the first leg and the second leg of one of the switching circuits, and issues a stop instruction to bring the converter into a stopped state.

4. When a direct current is input from the parallel connection terminal and a direct current is output from the series connection terminal, 2. The power supply system according to claim 1, wherein the voltage reduction instruction is an instruction to shorten the on-time of the switching element that is turned off before the other switching circuit.

5. 5. The power supply system according to claim 4, wherein the controller shortens an on-time of the switching element to be turned off first, and when Vin becomes zero, issues a conduction instruction to turn on all of the switching elements included in the first leg, the second leg, or the first leg and the second leg of one of the switching circuits.

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