Semiconductor Devices

Abstract

A display that combines highly accurate detection and smooth input with the touch sensor unit. A display device is provided. The display device includes a display unit and a touch sensor unit. The touch sensor unit detects the touch at a different timing than when the touch panel rewrites the display image. The display unit can be rewritten. It has the function of rewriting the display image only in the area where it is necessary. If it is not necessary, the time allocated to the touch sensor unit for detection can be extended to allow smooth operation. This allows for smooth input.

Description

[Technical Field]

[0001] 1. Field of the Invention The present invention relates to a display device and an operation method thereof. Relating to the body apparatus.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field relates to an article, a method, or a manufacturing method. Alternatively, one aspect of the present invention is , process, machine, manufacture, or composition of matter (This is related to the above.)

[0003] Therefore, as a technical field of one embodiment of the present invention disclosed more specifically in this specification, etc., Examples of the present invention include a device, a semiconductor device, an electronic device, a method for operating them, or a method for manufacturing them. In this specification, the term "semiconductor device" refers to a device that utilizes semiconductor characteristics. It refers to any device that can function by using a circuit. For example, an integrated circuit, a chip with an integrated circuit, or a package Electronic components that house chips in a package, and electronic devices equipped with integrated circuits are examples of semiconductor devices. is. [Background technology]

[0004] A display device that combines a display unit and a touch sensor unit is used. By overlapping the detection area of ​​the touch sensor unit with the display area of ​​the display unit, The image is displayed in the area where the user is pointing, and the information is recorded on the display area. The user performs input using a finger, a stylus, or the like.

[0005] On the other hand, a transistor including an oxide semiconductor can be applied to the pixels of a display unit. Since the off-state current of a transistor using an oxide semiconductor is extremely low, However, the refresh frequency when displaying a still image can be reduced. The technology to reduce the refresh frequency mentioned above is called "idling stop" or "I The IDS drive is called "IDS drive" (Patent Document 1, Patent Document 2). Power consumption can be reduced. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-141522 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-141524 Summary of the Invention [Problem to be solved by the invention]

[0007] The display unit refreshes the display image approximately 60 times per second (frame frequency 6 While many touch sensor units have a resolution of 100Hz (sometimes called "100Hz"), some have a resolution of 100Hz, while others have a resolution of 100Hz (sometimes called "100Hz"), such as for smooth handwriting input. The touch sensor unit is required to detect 80 times per second, or better. Preferably, more than 100 times are required.

[0008] In addition, the touch sensor unit detects when the display unit rewrites the display image. When the touch sensor unit is operated, it is affected by noise and the detection accuracy of the touch sensor unit deteriorates. One aspect of the present invention is to provide a touch sensor unit having a high detection accuracy and a high sensitivity. It is an object of the present invention to provide a display device that allows smooth input by touch.

[0009] An object of one embodiment of the present invention is to provide a novel display device. One form of this is to improve the detection accuracy of the touch sensor unit and the smoothness of the touch sensor unit. One of the objectives of the present invention is to provide a novel operating method that is compatible with input. An object of one embodiment is to provide an electronic device using a novel display device.

[0010] It should be noted that one embodiment of the present invention does not necessarily have to solve all of the above problems, but at least It is enough if it can solve one problem. Also, the description of the problem above may not be sufficient if other problems exist. Other issues than these are not covered by the description, claims, drawings, etc. This becomes clear from the description, claims, drawings, etc. It is possible to extract issues other than these. [Means for solving the problem]

[0011] One aspect of the present invention is a display device having a pixel array and a gate driver. The driver divides the pixel array into first to Nth pixel groups (N is an integer equal to or greater than 2) and drives them. The gate driver has first to N-th shift registers, and the K-th ( K is an integer between 1 and N, and generates a signal to drive the Kth pixel group. The gate driver is provided with first to Mth clocks (M is an integer equal to or greater than 1) and first to Lth clocks. (L is an integer equal to or greater than 1) signal is input, and the gate driver receives first to Mth clocks and , the first to Lth signals are used to clock the first to Nth shift registers, respectively. and a start pulse is supplied. L is characterized in that it is equal to or less than N / M+1.

[0012] Further, one embodiment of the present invention is a display device having a touch sensor unit in the above embodiment. The touch sensor unit operates while the first to Nth shift registers are stopped. The touch detection is performed between the touch panel and the touch panel.

[0013] Furthermore, one aspect of the present invention is a display device having an application processor in the above aspect. The application processor is a device that includes first to Mth clocks and first to Lth clocks. The application processor also has the function of supplying the signal to the gate driver. determines whether there is a change in the displayed image in each of the first to Nth pixel groups. The application processor generates first to Mth clocks and first to Lth signals. The display image of the pixel group where the display image is changed is rewritten using the It has the function of not rewriting the displayed image of the group.

[0014] In the above embodiment, the pixel array includes a transistor including a metal oxide in a channel forming region. It has a star.

[0015] In the above embodiment, the transistor constituting the gate driver has a channel forming region It is characterized in that it contains a metal oxide. [Effects of the Invention]

[0016] One embodiment of the present invention can provide a novel display device. A display device that combines high detection accuracy with smooth input from the touch sensor unit. Alternatively, the detection accuracy of the touch sensor unit and the It is possible to provide a display device that realizes smooth input by a mouse using a small number of signals. Alternatively, a display device with low power consumption can be provided.

[0017] Alternatively, one aspect of the present invention is a touch sensor unit. It is possible to provide a novel operation method that achieves both smooth input by touch. One aspect of the present invention can provide an electronic device using the novel display device.

[0018] The effects of one embodiment of the present invention are not limited to the effects listed above. This does not preclude the existence of other effects. Other effects are described below. The effects not mentioned in this section are obvious to those skilled in the art in the specification or This can be derived from descriptions in drawings, etc., and can be extracted appropriately from these descriptions. One embodiment of the present invention has at least one of the effects listed above and other effects. Therefore, one embodiment of the present invention may have the above-listed effects. In some cases, it may not have [Brief explanation of the drawings]

[0019] [Figure 1] FIG. 1 is a block diagram showing a configuration example of a display device. [Figure 2] FIG. 2 is a block diagram showing a configuration example of a touch sensor unit. [Figure 3] FIG. 1 is a block diagram showing a configuration example of a display device. [Figure 4] FIG. 2 is a block diagram showing an example of the configuration of a display unit. [Figure 5] FIG. 2 is a circuit diagram showing an example of the configuration of a gate driver. [Figure 6] FIG. 1 is a circuit diagram showing an example of the configuration of a shift register. [Figure 7] FIG. 1 is a circuit diagram showing an example of the configuration of a shift register. [Figure 8] FIG. 1 is a circuit diagram showing an example of the configuration of a shift register. [Figure 9] FIG. 1 is a circuit diagram showing an example of the configuration of a shift register. [Figure 10] FIG. 1 is a circuit diagram showing an example of the configuration of a demultiplexer. [Figure 11] FIG. 10 is a circuit diagram showing an example of the configuration of a register. [Figure 12] FIG. 10 is a circuit diagram showing an example of the configuration of a register. [Figure 13] 1 is a timing chart of a gate driver. [Figure 14] 1 is a timing chart of a gate driver. [Figure 15] 1 is a timing chart of a gate driver. [Figure 16] 1 is a timing chart of a gate driver. [Figure 17] FIG. 4 is a diagram showing the relationship between the operations of the display unit and the touch sensor unit. [Figure 18] 1A and 1B are external views showing the form and usage example of a tablet-type information terminal. [Figure 19] 10 is a flowchart showing an example of the operation of the electronic device. [Figure 20] FIG. 2 is a circuit diagram showing an example of the configuration of a gate driver. [Figure 21] FIG. 10 is a circuit diagram showing an example of the configuration of a decoder. [Figure 22] (A, B) Circuit diagram showing an example of an inverter configuration, (C, D) Circuit diagram showing an example of a driver configuration, (E) Timing chart of a decoder. [Figure 23] 1A and 1B are a top view and a projection view showing a configuration example of a touch sensor unit. [Figure 24] 1A and 1B are a top view and a projection view showing a configuration example of a touch sensor unit. [Figure 25] FIG. 2 is a block diagram showing an example of the configuration of a source driver IC. [Figure 26] 1A and 1B illustrate an example of a display device and a pixel. [Figure 27] 3A and 3B are diagrams illustrating an example of the configuration of a pixel circuit and a transmissive region and a light-shielding region of the pixel circuit. [Figure 28] FIG. 1 is a cross-sectional view illustrating an example of a display device. [Figure 29] FIG. 1 is a cross-sectional view illustrating an example of a display device. [Figure 30] FIG. 1 is a cross-sectional view illustrating an example of a display device. [Figure 31] FIG. 2 is a diagram illustrating an example of a circuit configuration of a pixel. [Figure 32] FIG. 2 is a diagram illustrating an example of a circuit configuration of a pixel. [Figure 33] 1A to 1C are diagrams illustrating examples of use of an electronic device for each display mode. [Figure 34] 1A and 1B are a top view and a cross-sectional view illustrating an example of a transistor used in a display device. [Figure 35] 1A and 1B are a top view and a cross-sectional view illustrating an example of a transistor used in a display device. [Figure 36] 1A and 1B are a top view and a cross-sectional view illustrating an example of a transistor used in a display device. [Figure 37] FIG. 1 is a diagram illustrating a configuration of an information processing device. [Figure 38] FIG. 1 is a diagram illustrating a configuration of an information processing device. DETAILED DESCRIPTION OF THE INVENTION

[0020] Hereinafter, embodiments will be described with reference to the drawings. The present invention may be implemented in any form without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the design and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments. The multiple embodiments can be combined as appropriate.

[0021] The display device described in the embodiment includes a display unit, a touch sensor unit, etc. Therefore, the display device may be referred to as a semiconductor device, an electronic device, etc. There is a match.

[0022] In addition, in the drawings, etc., the size, thickness of layers, areas, etc. may be exaggerated for clarity. Therefore, the scale is not necessarily limited to the above. The drawings are only a schematic representation of ideal examples. The present invention is not limited to the shapes or values ​​shown in the drawings.

[0023] In addition, in drawings, etc., the same elements or elements having similar functions, elements made of the same material, Alternatively, elements formed at the same time may be given the same reference numerals, and the repeated explanations thereof may be omitted. may be omitted.

[0024] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the term to

[0025] In addition, in this specification, terms indicating placement such as "above" and "below" refer to the positional relationship of components. The relationship is not limited to being "directly above" or "directly below." For example, In the case of the expression "gate electrode on an insulating layer," it is understood that there is no other component between the gate insulating layer and the gate electrode. Do not exclude anything that includes.

[0026] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0027] In addition, in this specification, ordinal numbers such as "first," "second," and "third" indicate the order of constituent elements. This is added to avoid confusion and is not intended to limit the number.

[0028] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a " is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. These include switching elements, resistor elements, inductors, capacitor elements, and various other functions. This includes elements, etc.

[0029] In this specification, the term "voltage" refers to the difference between a certain potential and a reference potential (for example, ground potential). Therefore, voltage, potential, and potential difference are often called potentials. , voltage, and voltage difference.

[0030] In this specification, a transistor includes a gate, a drain, and a source. , an element having at least three terminals. drain region, or drain electrode) and source (source terminal, source region, or source electrode) A channel region is formed between the source and drain, and an electric field is applied between the source and drain through the channel region. In this specification and the like, the channel region is a region through which a current can flow. This refers to the region where the current mainly flows.

[0031] The source and drain functions may differ depending on the type of transistor used, or the circuit operation. This may be reversed if the direction of the current changes during operation. In the text, the terms source and drain may be used interchangeably. .

[0032] Unless otherwise specified, in this specification and the like, the off-state current refers to the current that flows when a transistor is in an off-state. The drain current when the device is in the on state (also known as the non-conducting state or cut-off state). , unless otherwise specified, for n-channel transistors, the gate to source voltage V When gs is lower than the threshold voltage Vth, in a p-channel transistor, This refers to the state in which the gate voltage Vgs is higher than the threshold voltage Vth. The off-state current of a transistor is the voltage Vgs of the gate to the source that is equal to the threshold voltage This is sometimes referred to as the drain current when V is lower than Vth.

[0033] In the above description of the off-state current, the drain may be read as the source. may refer to the current that flows through the source when the transistor is in the off state.

[0034] In this specification and the like, the term "leak current" may be used to mean the same thing as "off-state current." In this specification, the off-state current is the current flowing between the source and the transistor when the transistor is in an off state. It may refer to the current that flows between the drain and the source.

[0035] In this specification, the term "metal oxide" is used in a broad sense. Metal oxides are oxide insulators and oxide conductors (transparent oxide conductors). Oxide Semiconductor (also known as OS) For example, when a metal oxide is used in the active layer of a transistor, Such metal oxides are sometimes called oxide semiconductors. When the metal oxide has at least one of a flow function and a switching function, the metal oxide is Metal oxide semiconductor, abbreviated as OS In addition, when referring to an OS transistor or an OS FET, In other words, the transistor can be a transistor including a metal oxide or an oxide semiconductor.

[0036] (Embodiment 1) In this embodiment, a display device including a display unit and a touch sensor unit will be described. In particular, the gate driver of the display unit and the display screen of the display unit will be described. The operation of rewriting the image and the operation of detecting the touch sensor unit (the operation of detecting a touch) Explain the relationship.

[0037] <<Display device>> FIG. 1 is a block diagram showing an example of the configuration of a display device. The display device 100 includes a display unit 6 0, a touch sensor unit 70, and an application processor 80.

[0038] <Display unit> The display unit 60 includes a pixel array 61, a gate driver 62, a gate driver 63, and and a source driver IC 64.

[0039] The pixel array 61 has a plurality of pixels 10, and each pixel 10 is configured to The pixel array 61 is an active element that is driven. A more specific example of the configuration of the pixel array 61 is as follows: This will be explained in the fourth embodiment.

[0040] Gate driver 62 and gate driver 63 (hereinafter referred to as "gate drivers 62, 63") The gate driver (hereinafter referred to as a gate driver) has the function of driving the gate line for selecting the pixel 10. In the example of FIG. 1, only one of the gate drivers 62 and 63 may be used. 2 and 63 are provided on the same substrate as the pixel array 61. The driver circuits 62 and 63 may be dedicated ICs.

[0041] The source driver IC 64 has a function of driving a source line that supplies a data signal to the pixel 10. Here, the source driver IC 64 is mounted in a COG (Chip on Glass) manner. Although the mounting method is a glass type, there are no particular restrictions on the mounting method. Flexible) method, TAB (Tape Automated Bonding) The same applies to the mounting method of the IC of the touch sensor unit 70, which will be described later. It seems that

[0042] The transistor used in the pixel 10 is an OS transistor. The transistor has a feature of having a lower off-state current than a Si transistor.

[0043] The OS transistor preferably has a metal oxide in the channel formation region. The metal oxides used in S transistors are made of small amounts of indium (In) and zinc (Zn). It is preferable that the oxide contains at least one of them.

[0044] Such oxides include In-M-Zn oxide, In-M oxide, Zn-M oxide, In-Zn oxide (element M is, for example, aluminum (Al), gallium (Ga), Thorium (Y), Tin (Sn), Boron (B), Silicon (Si), Titanium (Ti), Iron (Fe), Nickel (Ni), Germanium (Ge), Zirconium (Zr), Molybdenum Mo, Lanthanum (La), Cerium (Ce), Neodymium (Nd), Vanadium (V ), beryllium (Be), hafnium (Hf), tantalum (Ta), or tungsten (W) etc.) are typical examples.

[0045] The OS transistor has an off-state current of 1 yA / μm (y; yocto, 10 -24 ) or more than 1zA / μm (z; Zepto, 10 -21 ) or less. Cut.

[0046] In addition, the OS transistors include CAC (Cloud-Aligned Composit It is preferable to use CAC-OS. Reveal.

[0047] Alternatively, the transistor used in the pixel 10 may be an OS transistor if it has a low off-state current. For example, a transistor using a semiconductor with a large band gap can be used. A wide band gap semiconductor is one with a band gap of 2.2 It may refer to semiconductors with an energy density of 100 eV or higher. Examples include silicon carbide, gallium nitride, and diamond. Examples include:

[0048] By using a transistor with a low off-state current in the pixel 10, the display unit 60 can If there is no need to rewrite the gated The drivers 62, 63 and the source driver IC 64 can be stopped (as described above). , "Idling Stop" or "IDS Drive").

[0049] <Touch sensor unit> The touch sensor unit 70 shown in FIG. 1 includes a sensor array 71 and a touch sensor IC It has 72.

[0050] The sensor array 71 forms an area where the touch sensor unit 70 can detect a touch, and The user of the display device 100 inputs information into this area using a finger, a stylus, or the like. The display unit 71 is disposed in an area overlapping the pixel array 61, and the display device 100 is The image is displayed in the display area of ​​0, and the user can point to any position in the display area. You can get information on what was shown.

[0051] FIG. 2 is a block diagram showing an example of the configuration of the touch sensor unit 70. The sensor unit 70 is a projected capacitive touch sensor unit (mutual capacitance type). Here is an example:

[0052] The sensor array 71 has wiring CL and wiring ML, and the wiring CL and wiring ML overlap each other. or the wiring CL and the wiring ML are arranged close to each other. The capacitor 404 has a capacitance of 404.

[0053] FIG. 2 shows an example in which the wiring CL is made up of six wirings CL(1) to CL(6), and the wiring ML is made up of M Although six wires L(1) to ML(6) are shown, the number of wires is not limited to this. The wiring CL is the wiring to which the pulse voltage is applied, and the wiring ML detects the change in current. This is the wiring.

[0054] When the sensor array 71 detects the proximity or contact of a detection object (a finger, a stylus, etc.), The capacitance value of the quantity 404 changes, and the touch sensor unit 70 detects the touch.

[0055] The sensor array 71 is electrically connected to the touch sensor IC 72 via the wiring CL and the wiring ML. The touch sensor IC 72 has a drive circuit 402 and a detection circuit 403. .

[0056] The driving circuit 402 is electrically connected to the sensor array 71 via wiring CL. The circuit 402 has a function of outputting a signal Tx. A configuration in which a register circuit and a buffer circuit are combined can be used.

[0057] The detection circuit 403 is electrically connected to the sensor array 71 via wiring ML. The circuit 403 detects the signal Rx and detects that a touch has been made on the touch sensor unit 70. For example, the detection circuit 403 may include an amplifier circuit and an analog-to-digital conversion circuit (AD A configuration with an analog-digital converter (C) can be used. The detection circuit 403 converts the analog signal output from the sensor array 71 into a digital signal. The processor 80 has the function of converting the received signal into a signal and outputting it to the application processor 80.

[0058] A more specific configuration example of the touch sensor unit 70 will be described in the second embodiment. Reveal.

[0059] <Application Processor> The application processor 80 includes a source driver IC 64 and a touch sensor IC 72.

[0060] The application processor 80 generates image data to be displayed on the display unit 60 from a source The application processor 80 also has a function of supplying the driver IC 64 with The amount of change between the image data currently displayed on the display unit 60 and the image data to be displayed next is It has the function of calculation.

[0061] The application processor 80 also controls the timing at which the display unit 60 rewrites the display image. and a function of instructing the timing at which the touch sensor unit 70 performs the detection operation. The timing at which the display unit 60 rewrites the display image is determined by the application program. The signal is transmitted from the processor 80 to the source driver IC 64, and the source driver IC 64 The touch sensor unit 70 has a function of controlling the operation of the touch drivers 62 and 63. The timing of the operation is determined by the application processor 80 in response to the touch sensor IC 72. It can be conveyed.

[0062] In the block diagram shown in FIG. 1, the signals for driving the gate drivers 62 and 63 are The signal does not need to go through the source driver IC 64. In this case, the block diagram is shown in Figure 3. .

[0063] In FIG. 3, the application processor 80 is connected to the timing controller 810. The source driver ICs 64a to 64d, the gate driver 62, and and supplies signals to the gate driver 63. , may be included in the application processor 80.

[0064] The configuration shown in Figure 3 has multiple source driver ICs. The number of source driver ICs is The number of the electrodes may be determined according to the number of pixels in the array 61 .

[0065] The configuration shown in FIG. 3 is suitable for 4K (3840×2160) and 8K (7680×4320) For example, the larger the number of pixels in the pixel array 61, the more preferable it is. The number of gate drivers is reduced, and the gate driver control function is provided outside the source driver IC. By having such a path, the source driver IC can reduce the number of terminals. If the source driver IC has a large number of terminals, the source driver This increases the force applied to the source driver IC, which can damage the source driver IC. Therefore, by using the configuration shown in Figure 3, it is possible to prevent damage to the source driver IC. Cut.

[0066] <Pixel array> FIG. 4 is a block diagram showing an example of the configuration of the display unit 60. As shown in FIG.

[0067] The pixel array 61 includes a plurality of pixels 10(1,1) to 10(m,n) and a source line SL (1) to source lines SL(m) and gate lines GL(1) to GL(n). Here, m and n are integers of 1 or more, i is an integer of 1 or more and m or less, and j is an integer of 1 or more and m or less. It is an integer up to n. In FIG. 4, the power supply line, the constant potential line for forming the capacitance, etc. is omitted.

[0068] The gate drivers 62 and 63 drive the pixels via the gate lines GL(1) to GL(n). The source driver IC 64 is electrically connected to the array 61 and supplies source lines SL(1) to SL(2). The pixel array 61 is electrically connected to the pixel array 61 via a source line SL(m).

[0069] Also, a group of pixels 10(i,1) to 10(i,n) arranged in the direction indicated by the arrow C1 ) is a group of transistors electrically connected to the source line SL(i) and arranged in the direction indicated by the arrow R1. The pixels 10(1,j) to 10(m,j) are electrically connected to the gate line GL(j). do.

[0070] The gate drivers 62 and 63 drive the gate line GL(j) to drive the pixels 10(1,j) to 10(i,j). The source driver IC 64 selects the source lines SL(1) to SL(j). The image data supplied from the application processor 80 is transmitted via the line SL(m). The data signals are supplied to the pixels 10(1,j) through 10(m,j). By repeating the process from gate line GL(1) to gate line GL(n), the display unit 60 An image can be displayed on the pixel array 61 .

[0071] The pixel 10 may be a liquid crystal display, an electronic paper display, an organic electroluminescence (EL) display, or the like. cence), QLED(Quantum-dot Light Emitting D Various display elements such as a reflective element can be applied. and organic EL elements that can be used as light-emitting elements. A hybrid element that combines elements can be applied to the pixel 10.

[0072] In addition, for example, a liquid crystal element that can be applied as a reflective element and a light source (e.g., LED) ) and a transparent liquid crystal element that combines them to form a hybrid element. May be applied to 0.

[0073] <Gate driver> FIG. 5 is a circuit diagram showing an example of the configuration of a gate driver applicable to the gate drivers 62 and 63. is.

[0074] The gate drivers 62 and 63 divide the display area of ​​the display unit 60 into multiple areas. That is, the gate drivers 62 and 63 have the function of driving the pixel array 61 in multiple ways. The gate drivers 62 and 63 have the function of dividing the pixel into a number of pixel groups and driving them. N shift registers, and the Kth (K is an integer between 1 and N) shift register The gate drivers 62 and 63 generate signals to drive the pixel groups 1 to M (M (where L is an integer greater than or equal to 1) clock signal and the first to Lth sampling The gate driver receives first to M-th clock signals and first to L-th Using the sampling signal, a clock signal is input to each of the first to Nth shift registers. and supply a start pulse.

[0075] The number of input sampling signals, L, is equal to or less than N / M+1. If the number N is divisible by the number M of clock signals, the number L of input sampling signals is N / However, suppose that the number of shift registers, N, is not divisible by the number of clock signals, M, The number of input sampling signals, L, is set to N / M+1 or less. As a result, the gate driver It is possible to reduce the number of signals supplied to the Also, a source driver IC 64 and an application that control the operation of the gate drivers 62 and 63 are The circuit scale of the application processor 80 can be reduced, and the cost of the display device 100 can be reduced. This can reduce costs.

[0076] In this embodiment, for ease of explanation, n=1920 and m = 1080, and an example will be explained in which the image is divided into 20 regions in the direction indicated by the arrow C1 and driven. In addition, the 20 regions are uniform, and there are 20 regions each having 96 x 1080 pixels 10. do.

[0077] The gate drivers 62 and 63 shown in FIG. 5 are each composed of four demultiplexers 20 and a shift register. The clock signal CLK[ 1] to CLK[4], reset signal RES, sampling signals SMP[1] to SMP [5] is input. Also, the gate drivers 62 and 63 input the above-mentioned gate line GL(1) 1 to 1920 are electrically connected to the gate lines GL (1920).

[0078] The shift registers 21 to 24 are electrically connected to the 96 gate lines GL. It is connected to the gate line GL and drives the gate line GL. The term "gate line GL(1)" refers to gate line GL(96).

[0079] The shift registers 21 to 24 are supplied with clock signals CLK[1] to CLK[2]. CLK[4], reset signal RES, and start pulse are input. The gate pulses are generated by the demultiplexer 20. The gate drivers 62 and 63 are Since there are a total of 20 registers 21 to 24, the demultiplexer 2 0 will generate a total of 20 start pulses.

[0080] The demultiplexer 20 receives one of the clock signals CLK[1] to CLK[4] and The sampling signals SMP[1] to SMP[5] are input to the demultiplexer 20. A start pulse is output to each of the shift registers 21 to 24. Multiplexer 20 generates a total of 20 start pulses, but shift register 2 1 to the shift register 24. By using this, the number of signals required for the gate drivers 62 and 63 can be reduced.

[0081] That is, the demultiplexer 20 divides the 20 start pulses into four clock signals C LK[1] to CLK[4] and five sampling signals SMP[1] to SMP[5] In this embodiment, the number of regions, 20, is divided by the number of clock signals, 4. However, if it is not divisible, an additional sampling signal SMP is required. This may occur.

[0082] 6 to 9 are circuit diagrams showing examples of the configuration of a shift register. 1, FIG. 7 shows an example of the configuration of the shift register 22, and FIG. 8 shows an example of the configuration of the shift register 23. 9 shows an example of the configuration of the shift register 24.

[0083] FIG. 6(A) is a symbol of the shift register 21, and shows the input and output states of the shift register 21. The shift register 21 has input terminals CLK_IN[1] to CLK_IN [4], RES_IN, and SP_IN, and has output terminals CLK_OUT[1] to CLK_ OUT[4], RES_OUT, SR_OUT[1:96], where SP_I A start pulse is input to N, and 96 gate lines are connected from SR_OUT[1:96]. A signal is output to GL.

[0084] FIG. 6(B) is a circuit diagram for the symbol of the shift register 21. 1 has 95 registers 31 and 32. The data bus 32 is connected to two of CLK_IN[1] to CLK_IN[4], and RES_IN and RES_IN are electrically connected to input signals. The resistors 32 are electrically connected to SR_OUT[1] through SR_OUT

[96] , respectively. The register 31 that outputs a signal to SR_OUT[1] is connected to SP_ It is electrically connected to IN.

[0085] 7 to 9 show examples of the configuration of the shift registers 22 to 24, respectively. 6, the registers 31 and 32 are CL The parts electrically connected to any two of K_IN[1] to CLK_IN[4] are different. In the shift registers 21 to 24, the registers 31 and 32 and CLK_IN[1] to CLK_IN[4], different speeds can be achieved. This can be seen by using the timing charts in Figures 13 to 16. The shift registers 22 to 24 will be explained later. We will use the explanation from Sta21.

[0086] FIG. 10 is a circuit diagram showing an example of the configuration of a demultiplexer.

[0087] FIG. 10(A) is a symbol of the demultiplexer 20, and shows the input and output of the demultiplexer 20. The demultiplexer 20 has input terminals SMP_IN[1] to SM P_IN[5], CLK_IN, and output terminals SP_OUT[1] to SP_OUT[ Here, CLK_IN has clock signals CLK[1] to CLK[4]. One is input, and a start pulse is output from SP_OUT[1] to SP_OUT[5]. Also, SMP_IN[1] to SMP_IN[5] receive the sampling signals SMP[1] to SMP[5] are input.

[0088] FIG. 10B is a circuit diagram for the symbol of the demultiplexer 20. The crossover 20 includes transistors Tr1 to Tr5, and Depending on the signal input to SMP_IN[5], CLK_IN and SP_OUT[1] to SP_OUT[5] of the transistors Tr1 to Tr5. Electrical connection is made via either one of them.

[0089] 11 and 12 are circuit diagrams showing examples of register configurations. 12 shows an example of the configuration of the register 32.

[0090] FIG. 11(A) is a symbol of the register 31, showing the input and output of the register 31. The register 31 is connected to the input terminals CLK_IN[1], CLK_IN[2], and RES_I. N, L_IN, R_IN, and output terminals SR_OUT[1] and SR_OUT[2]. Here, the output of the previous register or the start pulse is input to L_IN, and R The output of the subsequent register is input to _IN (see FIGS. 6 to 9).

[0091] FIG. 11(B) is a circuit diagram for the symbol of the register 31. The register 31 is a The transistors Tr6 to Tr16 and the capacitors C3 and C4 are included. . VDD is a high-potential power supply, and VSS is a low-potential power supply.

[0092] FIG. 12 shows an example of the configuration of the register 32. Compared to the register 31, the input terminal R_I N, and has a transistor equivalent to transistor Tr8 in resistor 31. The register 32 is the same as the register 31 except that it does not have a register 32. The transistors Tr17 to Tr26 and the capacitors C5 and C6 are included. do.

[0093] Note that OS transistors can be used as the transistors Tr1 to Tr26. It is preferable that the transistors Tr1 to Tr26 are single-ended in FIGS. Although illustrated as a double-gate transistor, it is also possible to use a dual-gate transistor with a back gate. The transistors Tr1 to Tr26 are OS transistors. This reduces the off-state current of the transistor and reduces the current consumption of the gate driver. This can be done.

[0094] <Timing chart> 13 to 16 show the clock signal CLK[1] input to the gate drivers 62 and 63. to CLK[4], sampling signals SMP[1] to SMP[5], and gate lines GL( 1) to the gate line GL (1920). In this case, not all of the gate lines GL(1) to GL(1920), but only the gate lines G A timing chart is shown for a part of the gate lines L(1) to GL(1920).

[0095] The first region is a region in the pixel array 61 between the gate line GL(1) and the gate line GL Similarly, the second region is the region including the pixel 10 selected by (96). In the area including the pixel 10 selected by the gate line GL(97) to the gate line GL(192), The 20th region is the region defined by the gate lines GL (1825) to GL (1920). In other words, when the entire display area is rewritten, , all of the first to twentieth areas need to be rewritten.

[0096] FIG. 13 shows the first region among the first to fifth regions driven by the shift register 21. For the first to third regions, five gate lines GL are shown in each region. Similarly, FIG. 14 shows the sixth to tenth regions driven by the shift register 22. Regarding the sixth to eighth regions, FIG. 15 shows the eleventh region driven by the shift register 23. Regarding the 11th to 13th regions among the 15th to 16th regions, FIG. Of the 16th to 20th regions driven by the register 24, the 16th to 18th regions Five gate lines GL are shown in each of the areas.

[0097] In FIG. 13, clock signals CLK[1] to CLK[4] are all in the High state. are input so as not to overlap, and the sampling signals SMP[1] to SMP[5] are The sampling signal CLK[1] is input at the same timing as the clock signal CLK[1] (in FIG. 13, the sampling signal (The high states of SMP[4] and SMP[5] are omitted.) Clock signal C When the sampling signal SMP[1] is input at the timing that overlaps with LK[1], the first The shift register 21 that drives this region starts operating, and the gates are sequentially shifted from the gate line GL(1) to the gate line GL(2). Similarly, the sample line GL is selected at the same time as the clock signal CLK[1]. When the pulling signal SMP[2] is input, the shift register 21 that drives the second region The operation starts, and the gate lines GL are selected in order starting from the gate line GL (97).

[0098] In this way, the sampling signal SMP is generated at the same time as the clock signal CLK[1]. Depending on which sampling signal from [1] to SMP[5] is input, the first area or The area to be driven can be selected from the first to fifth areas.

[0099] Similarly, in FIG. 14, the clock signals CLK[1] to CLK[4] are High. h are input so that the states do not overlap, and sampling signals SMP[1] to SMP[5] is input at the same timing as the clock signal CLK[2] (in FIG. 14, the sampling (The high states of the clock signals SMP[4] and SMP[5] are omitted.) The sampling signal SMP[1] is input at the timing that overlaps with the clock signal CLK[2]. Then, the shift register 22 that drives the sixth region starts operating, and the gate line GL (481) The gate lines GL are selected in order from the clock signal CLK[1]. Which of the sampling signals SMP[1] to SMP[5] is input? By this, it is possible to select the area to be driven from the sixth area to the tenth area. .

[0100] Similarly, in FIGS. 15 and 16, in FIG. 15, at the timing overlapping with the clock signal CLK[3], depending on which one of the sampling signals SMP[1] to SMP[5] is input, among the 11th region to the 15th region, the driven region can be selected. In FIG. 16, at the timing overlapping with the clock signal CLK[4], depending on which one of the sampling signals SMP[1] to SMP[5] is input, among the 16th region to the 20th region, the driven region can be selected. Thus, by the combination of the clock signals CLK[1] to CLK[4] and the sampling signals SMP[1] to SMP[5], among the 1st region to the 20th region, which region to drive can be selected.

[0101]

[0102]

[0103] <<IDS Drive>> Next, FIG. 17 is a diagram showing the relationship between the operations of the display unit and the touch sensor unit. The relationship between the operation of the display unit 60 for rewriting the display image and the operation of the touch sensor unit 70 for detecting a touch (detection operation) will be described using FIG. 17. Regarding the operation of the display unit 60 for rewriting the display image, it will be described by dividing it into a first mode (hereinafter referred to as "normal display") for rewriting the entire display area, a second mode (hereinafter referred to as "partial IDS drive") for rewriting a partial area of the display area, and a third mode (hereinafter referred to as "IDS drive") for not rewriting the entire display area. FIGS. 18(A) to (C) are examples in which the display device 100 is applied to the tablet-type information terminal 90.​​​​​​​​​​​​ Figure 18(A) shows the normal display, Figure 18(B) shows the partial IDS drive, and Figure 18(C) shows The tablet-type information terminal 90 also serves as an input area. The display area 91 is suitably fitted with a display device 100 according to an embodiment of the present invention. It is used.

[0104] <Normal display> FIG. 17(A) shows the case of normal display. The normal display is a moving image display using the entire display area. This is applied when the entire display area needs to be rewritten, such as when displaying a As an example of video display, a tablet-type information terminal 90 is shown displaying a soccer game. It shows.

[0105] In FIG. 17A, during the period when the display unit 60 rewrites the display image, the touch sensor unit The unit 70 is in a pause state for the detection operation. Noise caused by driving source lines SL(1) to SL(10) 80), the noise caused by the data signal being supplied to the gate driver 62 and the gate driver The driver 63 operates, causing noise, etc., and the touch sensor unit 70 This is because the timing is not suitable for this.

[0106] When the display unit 60 finishes rewriting the display image, the display unit 60 stops operation and The touch sensor unit 70 performs a detection operation. In this case, there is no noise as described above, and the touch sensor unit 70 can perform a highly accurate detection operation. In this way, the rewriting operation of the display image performed by the display unit 60 and the touch sensor The detection operations performed by the unit 70 are combined into one frame, and by repeating this operation, the motion It is possible to perform highly accurate detection operations while displaying images, etc.

[0107] <Partial IDS drive> Partial IDS driving is used when writing to a part of the display area, such as when displaying a video in a part of the display area. This rule applies when a replacement is required.

[0108] FIG. 18(B) shows a case where a user of the tablet information terminal 90 uses a stylus to mark a mark. This is an example of writing and emphasizing specific characters. In this case, it is necessary to rewrite the displayed image. The gate driver 62 and the gate driver 63 are only shown in the area A1. The driver 63 only needs to drive the gate lines GL in the area A1.

[0109] In this case, the relationship between the operation of the display unit and the touch sensor unit is as shown in FIG. 17(B). As shown in FIG. 17(B), the display unit 60 performs a rewriting operation only in the area that needs to be rewritten. ) rewrites the Pth area, the P+1th area, the Qth area, and the Q+1th area. Here, P and Q can be the same, or different numbers of regions can be rewritten for each frame. good.

[0110] The display unit 60 performs a rewriting operation only in the area that needs to be rewritten, thereby Therefore, the time for which the subunit 70 performs the operation of detecting a touch can be extended. Detection can be performed multiple times in one frame. For example, in the case of normal display, In the case of partial IDS drive, the detection operation can be performed twice per frame instead of once per frame. In this way, partial IDS driving allows smooth detection operations, and handwritten input etc. It is suitable for. Also, by reducing the rewrite operation of the display image, the power consumption of the display unit 60 can be reduced. Power can be reduced.

[0111] <IDS drive> IDS drive is applied when it is not necessary to rewrite the entire display area, such as when a still image is displayed in the entire display area. FIG. 18(C) shows an example of a still image, showing an illustration of a flower and its explanatory text (omitted by a dotted line in the figure). In this case, as shown in FIG. 17(C), the relationship between the operations of the display unit and the touch sensor unit is such that the display unit 60 pauses the rewrite operation and the touch sensor unit 70 can perform the detection operation. As an example of a still image, an example showing an illustration of a flower and its explanatory text (omitted by a dotted line in the figure) is shown. In this case, the relationship between the operations of the display unit and the touch sensor unit is such that the display unit 60 pauses the rewrite operation and the touch sensor unit 70 can perform the detection operation. As shown in FIG. 17(C), the display unit 60 pauses the rewrite operation and the touch sensor unit 70 can perform the detection operation. 0 pauses the rewrite operation and the touch sensor unit 70 can perform the detection operation.

[0112] IDS drive and partial IDS drive do not need to rewrite the display image in that area as long as a still image is displayed. However, in practice, it is necessary to consider the time for which the pixel 10 using a transistor with low off-current can hold the charge, the inversion drive, etc. when the display element of the pixel 10 is a liquid crystal element. Although IDS drive and partial IDS drive do not need to rewrite the display image in that area as long as a still image is displayed, in practice, it is necessary to consider the time for which the pixel 10 using a transistor with low off-current can hold the charge, the inversion drive, etc. when the display element of the pixel 10 is a liquid crystal element. When considering the time for which the pixel 10 using a transistor with low off-current can hold the charge, the inversion drive, etc. when the display element of the pixel 10 is a liquid crystal element. It is necessary.

[0113] Thus, IDS drive can perform a smooth detection operation similar to partial IDS drive. Also, since the power consumption of the display unit 60 can be reduced, it is suitable for a portable information terminal. Since the power consumption of the display unit 60 can be reduced, it is suitable for a portable information terminal. It is suitable.

[0114] <<Flowchart>> Next, the state of the electronic device applying the display device 100 switching among three operation modes (normal display, partial IDS drive, IDS drive) after starting an application will be described using the flowchart of FIG. 19. It will be described using the flowchart of FIG. 19. <0者の動作モード(通常表示、部分IDS駆動、IDS駆動)を切り替える様子を、図19の Flowchart is used for explanation.

[0115] In the electronic device applying the display device 100, when an application is started (step S1) When this happens, the touch sensor unit 70 stops the detection operation (step S2) and The application processor 80 determines whether there is an area in the display area that needs to be rewritten (step S3 The determination as to whether there is an area in the display area that needs to be rewritten is made based on the information currently displayed on the display unit 60. This is done by calculating the amount of change between the image data being displayed and the image data to be displayed next.

[0116] If there is an area that needs to be rewritten (step S4), the application processor 80 Calculate the length of the clock signal required for rewriting and the timing of the sampling signal, and display The data signal of the image data to be input to the display unit 60 is determined (step S5). The clock signal and the sampling signal are input (step S6).

[0117] In the gate drivers 62 and 63, the shift registers in charge of the area that needs to be rewritten are The display unit 60 then drives the port line GL and performs a rewriting operation (step S7). When the reset operation is completed, the clock signal is stopped and a reset signal is input (step S8).

[0118] The touch sensor unit 70 performs a detection operation (step S9). Step S10), return to step S2 to pause the detection operation, and then rewrite the display area. It is determined whether there is an area (step S3). If there is no area that needs to be rewritten (step S 4) The touch sensor unit 70 performs the detection operation again (step S9).

[0119] If no touch is detected in step S10 and one frame has not elapsed (step S1 1), the process returns to step S9, and the touch sensor unit 70 performs the detection operation. If no touch is detected at step S10 and one frame has passed (step S11), Return to 2.

[0120] In this way, depending on whether there is an area in the display area that needs to be rewritten and whether touch is detected, By appropriately changing the operation of the display unit 60 and the touch sensor unit 70, high accuracy and smooth operation can be achieved. This allows for smooth detection operations.

[0121] In step S10, a touch is detected before one frame has elapsed, and the display area is When rewriting, the length of one frame in FIG. 17(B) is the same as that of one frame in FIG. 17(A). This means that the touch sensor unit 70 can detect the touch. When you press the screen, the display image is immediately rewritten, and the screen responds well to input (touch). It is possible to perform operations (rewriting the displayed image) and is suitable for handwritten input, etc.

[0122] <<Modification of gate driver>> The gate drivers 62 and 63 shown in FIG. 5 may include a decoder 25. 1 is a circuit diagram showing an example of the configuration of a gate driver when a gate driver 25 is included.

[0123] FIG. 20 shows the sampling signals SMP[1] to SMP[5] in place of the sampling signals SMP[1] to SMP[5] in FIG. The sampling signals SMP[6] to SMP[8] are input to the decoder 25. 5 uses the sampling signals SMP[6] to SMP[8] to The decoder 25 can generate the signaling signals SMP[1] to SMP[5]. This allows the number of input signals to the gate drivers 62 and 63 to be reduced.

[0124] 21A and 21B are circuit diagrams showing examples of the configuration of a decoder. The decoder 25 has an input terminal SM P_IN[6] to SMP_IN[8], and output terminals SMP_OUT[6] to SM In FIG. 20, the input terminals SMP_IN[6] to SMP_IN

[10] are Sampling signals SMP[6] to SMP[8] are input to the output terminal SMP _OUT[6] to SMP_OUT

[10] are used to receive the sampling signals SMP[1] to SM Outputs a signal equivalent to P[5].

[0125] FIG. 21(B) is a circuit diagram of the decoder 25 for the symbols. Transistors Tr27 to Tr40, three inverters 33, and a driver 34 There are eight of these. VDD is a high-potential power supply.

[0126] The three inverters 33 are electrically connected to SMP_IN[6] to SMP_IN[8], respectively. Five of the eight drivers 34 are connected in series to generate an inverted signal. It is electrically connected to P_OUT[6] to SMP_OUT

[10] and outputs signals. Transistor Tr32, transistors Tr38 to Tr40, and Drivers not connected to output terminals SMP_OUT[6] to SMP_OUT

[10] 34 may be omitted.

[0127] The driver 34 is electrically connected to the output terminals SMP_OUT[6] to SMP_OUT

[10] . The transistors Tr27 to Tr The output terminals that are not electrically connected to the high-potential power supply (VDD) in 40 are connected to the low-potential power supply (VSS ) and has the role of making the potential equal to that of the

[0128] 22(A, B) are circuit diagrams showing examples of the configuration of an inverter. The symbol for inverter 33 shows the input and output of inverter 33. 22B shows an inverter 33 having an input terminal IN and an output terminal OUT. The inverter 33 is a circuit diagram of a transistor Tr41 and a transistor Tr42. The power supply VDD is a high potential power supply, and the power supply VSS is a low potential power supply.

[0129] 22(C, D) are circuit diagrams showing examples of the configuration of the driver. The symbol 34 shows the input and output of the driver 34. 22(D) shows the symbol for the driver 34. The driver 34 drives the transistor Tr43 and the inverter 33. There are two: VDD is the high-potential power supply and VSS is the low-potential power supply.

[0130] FIG. 22(E) shows the signals input to the input terminals SMP_IN[6] to SMP_IN[8] of the decoder 25. The input signal (i.e., sampling signals SMP[6] to SMP[8]) and the decoder The signals output from the output terminals SMP_OUT[6] to SMP_OUT

[10] of the amplifier 25 are 10 is a timing chart showing the relationship between the input and output signals.

[0131] The decoder 25 receives signals from the input terminals SMP_IN[6] to SMP_IN[8]. Based on this, the sampling signals SMP[1] to SMP[5] in FIGS. 13 to 16 In this way, the gate drivers 62 and 63 can output signals similar to those shown in the diagram. By including the reader 25, the number of input signals can be reduced.

[0132] Note that OS transistors are used for the transistors Tr27 to Tr43. It is preferable that the transistors Tr27 to Tr43 are Although shown as a single-gate transistor, it is also possible to use a dual-gate transistor with a back gate. The transistors Tr27 to Tr43 are OS transistors. The transistor off-state current is low, which reduces the current consumption of the gate driver. can be reduced.

[0133] The gate drivers 62 and 63 are also supplied with four clock signals CLK[1] to CLK[4]. ] and five sampling signals SMP[1] to SMP[5] are input. The number of clock signals may be increased. Even if the number of clock signals is increased, By increasing the number of clock signals, the number of sampling signals can be reduced. It may be possible to reduce the number of clock signals and sampling signals. , it is preferable to determine the configuration of the gate drivers 62 and 63.

[0134] As described above, the display device 100 performs the operation of the display unit 60 to rewrite the display image and the operation of the timer. The touch sensor unit 70 detects the touch at different timings. In addition, the display unit 60 can detect areas that need to be rewritten. By rewriting the display image only in the area, the power consumption of the display unit 60 is reduced. The touch sensor unit 70 can perform a smooth detection operation. Therefore, the operation of rewriting the display image only in the area that needs to be rewritten is the same as that illustrated in this embodiment. By applying the gate drivers 62 and 63, it is possible to realize the circuit with a small number of signals.

[0135] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0136] (Embodiment 2) In this embodiment, the configuration example of the touch sensor unit 70 described in the above embodiment will be explained. The following description will be given with reference to FIGS. 23 and 24.

[0137] A more specific configuration example of the touch sensor unit 70 will be described with reference to FIGS. 23 and 24. Give an explanation.

[0138] FIG. 23(A) is a top view of the touch sensor unit 70. 23(C) is a projection view for explaining a part of FIG. 23(A).

[0139] FIG. 24(A) is a top view of the adjacent portion of the control line and the detection signal line. FIG. 10 is a projection diagram for schematically explaining an electric field generated at a contact portion.

[0140] The touch sensor unit 70 has a sensor array 71. The sensor array 71 is connected to a wiring CL (g), wiring ML(h) and a conductive film (see FIG. 23(A)). An integer greater than or equal to 2.

[0141] For example, a conductive film divided into multiple regions can be used for the sensor array 71 (see FIG. 2 3(A)). This allows the same or different potentials to be applied to each of the multiple regions. can be supplied.

[0142] Specifically, a conductive film that can be used for the wiring CL(g) and a conductive film that can be used for the wiring ML(h) are The sensor array 71 can be made of a conductive film that can be divided into two parts. In addition, the conductive film is divided into a plurality of regions, and each region has, for example, a comb-like shape. can be used (FIG. 24, electrode CE(1), electrode ME(1) and electrode ME(2) This allows the divided conductive film to be used as an electrode for the sensing element.

[0143] For example, a conductive film that can be used for the wiring CL(1) and a conductive film that can be used for the wiring ML(1) are The conductive film is divided into a conductive film that can be used for the wiring ML(2) and a conductive film that can be used for the wiring ML(3). , adjacent to each other at the adjacent portion X0 (see FIG. 23(A), FIG. 23(C), or FIG. 24 ).

[0144] The sensing element 475(g, h) is electrically connected to the wiring CL(g) and the wiring ML(h). (See FIG. 23(A)).

[0145] The wiring CL(g) has the function of supplying a signal Tx, and the wiring ML(h) is supplied with a signal Rx. It has the function to

[0146] The wiring ML(h) includes a conductive film BR(g,h) (see FIG. 23(B)). , h) has an area that overlaps with the wiring CL(g).

[0147] The sensing element 475(g, h) includes an insulating film. The wiring ML(h) and the conductive film BR(g, h) are sandwiched between the wiring ML(h) and the conductive film BR(g, h). This can prevent short circuits of the conductive film BR(g, h).

[0148] The electrode CE(1) is electrically connected to the wiring CL(1), and the electrode ME(1) is electrically connected to the wiring ML( 1) (see FIG. 24).

[0149] Similarly, the electrode CE(g) is electrically connected to the wiring CL(g), and the electrode ME(h) is electrically connected to the wiring CL(g). It is electrically connected to the line ML(h).

[0150] The sensing element 475(1,1) has a capacitance formed between the electrode CE(1) and the electrode ME(1). A touch is detected by reading the change in the signal (see Figure 24).

[0151] Similarly, sensing element 475(g, h) is formed between electrode CE(g) and electrode ME(h). Touch is detected by reading the change in capacitance.

[0152] A conductive film that can be formed in the same process is used for the wiring CL(1) and the electrode CE(1). The conductive film can be formed in the same process as the wiring ML(1) and It can be used for the electrode ME(1) (see FIG. 24).

[0153] Similarly, conductive films that can be formed in the same process are used for the wiring CL(g) and the electrode CE( The conductive film that can be formed in the same process can be used for the wiring ML (h ) and electrode ME(h).

[0154] For example, a conductive film having light-transmitting properties can be used for the electrode CE(g) and the electrode ME(h). Alternatively, a conductive film having an opening or a comb-like shape in the area overlapping with the pixel can be formed as an electrode CE This can be used for the electrodes ME(g) and ME(h). It is possible to detect an object approaching the area overlapping with the display panel without any problem.

[0155] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. .

[0156] (Embodiment 3) In this embodiment, the configuration example of the source driver IC 64 described in the above embodiment is as follows: The explanation will be given with reference to FIG.

[0157] 25(A) and 25(B) are block diagrams showing examples of the configuration of the source driver IC 64. The source driver IC 64 shown in FIGS. 25(A) and 25(B) is a reflective element. 1 is a block diagram showing a case where a hybrid element having a light-emitting element and a cathode is used for a pixel 10. FIG.

[0158] The source driver IC 64 shown in FIG. 25(A) includes a control circuit 801, a driver 802, and A frame memory 803, a frame memory 804, and a gate driver signal generation circuit 806 and a gate driver signal generation circuit 807.

[0159] The control circuit 801 receives a signal from the application processor 80 and controls the source driver. It has the function of supplying signals to various circuits included in the bus IC 64. , as the interface standard of the signal received from the application processor 80, M IPI(Mobile Industry Processor Interface) , SPI (Serial Peripheral Interface), etc. do.

[0160] The driver 802 has a function of supplying an image signal to the pixel array 61 .

[0161] The frame memory 803 has a function of temporarily storing image signals.

[0162] The gate driver signal generation circuit 806 has a function of supplying signals to the gate driver 62. The gate driver signal generation circuit 807 has the function of supplying signals to the gate driver 63. .

[0163] One of the gate driver signal generation circuit 806 and the gate driver signal generation circuit 807 is The gate driver has a function of generating a signal for driving the reflective element of the pixel 10. The other of the gate driver signal generation circuit 806 and the gate driver signal generation circuit 807 is The light emitting element has a function of generating a signal for driving the light emitting element.

[0164] The source driver IC 64 includes the function of the touch sensor IC 72 shown in FIG. A block diagram in this case is shown in Figure 25(B).

[0165] The source driver IC 64 shown in FIG. 25(B) is a block diagram of FIG. 25(A) and a circuit diagram of FIG. The touch sensor IC 72 is connected to a drive circuit 402 and a detection circuit 403. By including it in the display driver IC 64, the manufacturing cost of the display device can be reduced.

[0166] When the drive circuit 402 and the detection circuit 403 are included in one IC, these two circuits are It is preferable that the driving circuit 402 is disposed close to the detection circuit 403. When the driving circuit 402 is placed in the position, the detection sensitivity of the detection circuit 403 is reduced by the noise generated by the driving circuit 402. Therefore, the driving circuit 402 and the detection circuit 40 3 is a gate driver signal generation circuit 806, a gate driver signal generation circuit 807, and a driver It is preferable that a circuit such as a driver 802 be interposed therebetween.

[0167] Here, the gate driver 62 drives the liquid crystal element, and the gate driver 63 drives the light emitting element. That is, the gate driver signal generation circuit 806 generates a The gate driver signal generation circuit 807 generates a signal for driving the light emitting element. At this time, the driving circuit 402 generates the gate driver signal generating circuit 806. and the detection circuit 403 is placed near the gate driver signal generation circuit 807. It is preferable.

[0168] Generally, the driving voltage of a light emitting element is lower than that of a liquid crystal element. The amplitude of the voltage output by the gate driver signal generation circuit 807 is The amplitude of the output voltage is lower than that of the gate driver signal generation circuit 807. It can be said that the noise generated by the gate driver signal generation circuit 806 is smaller than that generated by the gate driver signal generation circuit 806. Therefore, the detection circuit 403 detects the gate driver signal more accurately than the gate driver signal generation circuit 806. It is preferable to place it near the signal generating circuit 807.

[0169] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. .

[0170] (Fourth embodiment) In this embodiment, a display device 100 having a hybrid element is shown in the drawings. This will be used to explain.

[0171] <Configuration example> 26(A) is a perspective schematic diagram of the display device 100. The display device 100 includes a substrate 351 and In FIG. 26(A), the substrate 361 is clearly indicated by a dashed line. It shows.

[0172] The display device 100 includes a display area 235, a peripheral circuit area 234, wiring 365, etc. In FIG. 6(A), a source driver IC 64 and an FPC 372 are mounted on the display device 100. An example is shown.

[0173] The peripheral circuit area 234 includes circuits for supplying signals to the display area 235. The circuits included in the circuit region 234 include, for example, gate drivers.

[0174] The wiring 365 has a function of supplying signals and power to the display area 235 and the peripheral circuit area 234. The signal and power can be supplied externally via FPC372 or via the source driver. The signal is input from IC 64 to wiring 365.

[0175] In FIG. 26(A), a source driver IC 64 is provided on a substrate 351 by the COG method. The source driver IC 64 is the same as the source driver IC 6 shown in the first embodiment. For example, an IC having a scanning line driver circuit or a signal line driver circuit can be applied. The source driver IC 64 may be mounted on the FPC using a COF method or the like.

[0176] 26(A) shows an enlarged view of a part of the display area 235. The display area 235 includes: A plurality of pixels 10 are arranged in a matrix. The pixels 10 are light-emitting elements serving as display elements. 170 and a liquid crystal element 180. The pixel 10 also has a display element for driving the display element. It has an element circuit 236.

[0177] 26(B) shows a perspective schematic diagram of the pixel 10. The pixel 10 has a light-emitting element 170 and The liquid crystal elements 180 overlap each other via pixel circuits 236. The pixel circuits 236 are light-emitting elements. a first circuit for driving the liquid crystal element 170 and a second circuit for driving the liquid crystal element 180. do.

[0178] Light 237 emitted from the light emitting element 170 passes through the pixel circuit 236 and the liquid crystal element 180. Furthermore, light 238 incident from the outside passes through the liquid crystal element 180 and the pixel circuit. The light passes through the path 236 and is reflected by the electrode of the light emitting element 170, and is then reflected back to the pixel circuit 236 and the liquid crystal element The light passes through the element 180 and is emitted to the outside as reflected light.

[0179] FIG. 27(A) shows an example of a planar configuration of the pixel circuit 236. 6 includes a transistor 271, a capacitor 272, a transistor 281, a capacitor 282, and The pixel circuit 236 also includes elements such as a transistor 283 and a gate electrode 284. a part of the signal line 274, a part of the common potential line 275, a part of the scanning line 284, and the signal line 28 5 and part of the power line 286.

[0180] As mentioned above, light 237 passes through pixel circuit 236 once. Therefore, the pixel circuit 236 preferably includes a light-transmitting material. stomach.

[0181] The transistor 271, the capacitor 272, the transistor 281, the capacitor 282, and the transistor At least one of the transistors 283 is preferably formed from a light-transmitting conductive material. In addition, the electrodes connected to these in the pixel circuit 236 are formed of a light-transmitting material. It is preferable.

[0182] Examples of the conductive material having light-transmitting properties include indium oxide, indium tin oxide, and indium tin oxide. Conductive oxides such as indium zinc oxide, zinc oxide, and zinc oxide doped with gallium In particular, conductive materials with an energy band gap of 2.5 eV or more can be used It is preferable because of its high light transmittance.

[0183] On the other hand, conductive materials with light-transmitting properties are conductive materials with light-shielding properties such as copper and aluminum. Therefore, the resistivity of the scanning line 273, the signal line 274, the scanning line 284, and the signal line 285 is high. The bus lines such as the power line 285 and the power line 286 have low resistivity to prevent signal delay. It is preferable to form the light-shielding layer using a conductive material (metal material) having a light-shielding property. Depending on the size of the display area 235, the width of the bus line, the thickness of the bus line, etc. In some cases, a light-transmitting conductive material is used as the inner material.

[0184] Generally, the common potential line 275 is used to apply a constant potential to the pixel circuit 236. Therefore, a large current does not flow in the common potential line 275. Therefore, the common potential line 275 has a resistivity However, the display element can be formed of a conductive material having a high light-transmitting property. When the method of varying the potential of the common potential line 275 is used as the method of It is preferable to use a metal material that has a low resistivity and light-shielding properties.

[0185] FIG. 27B is a plan view showing the transmissive region 291 and the light-shielding region 292 of the pixel circuit 236. The light 237 and the light 238 pass through the transmission area 291 and are emitted. In this case, the ratio of the transmissive region 291 to the area occupied by the pixel 10 (also called the "aperture ratio") is large. The larger the value, the higher the extraction efficiency of the light 237 and the light 238 can be. This can reduce the power consumption of the display device 100. In addition, the visibility of the display device 100 can be improved. Moreover, the display quality of the display device 100 can be improved.

[0186] In the display device 100 according to one embodiment of the present invention, the elements included in the pixel circuit 236 are By using a material that can achieve this, the aperture ratio can be increased to 60% or even 80%. In addition, since the light-emitting element 170 and the liquid crystal element 180 can be provided in an overlapping state, The sum of the light-emitting area of ​​the liquid crystal element 170 and the reflection area of ​​the liquid crystal element 180 is equal to or greater than the area of ​​the pixel 10. In other words, when the occupied area of ​​the pixel 10 is 100%, the light-emitting area and the reflecting surface area are The total area of ​​the product can be made 100% or more. In other words, the aperture ratio can be made 100% or more. It can also be said that it is possible.

[0187] For example, when a certain light emission luminance (amount of light emission) per pixel is to be obtained, the light emitting surface of the light emitting element 170 By increasing the product, the luminance per unit area can be reduced. Deterioration of the optical element 170 is reduced, and the reliability of the display device 100 can be improved.

[0188] The light emitting element 170 may be an organic EL element, an inorganic EL element, or an LED (Light Emitting Diode). It is possible to use self-luminous light-emitting elements such as QLEDs, semiconductor lasers, etc. It is also preferable to use a transparent element that combines a light source (for example, an LED) and a liquid crystal as the light emitting element 170. In this embodiment, the light emitting element 170 is an organic EL element. The explanation will be given as an element.

[0189] [Cross-sectional structure example] FIG. 28 shows a part of the area including the FPC 372 of the display device 100 shown in FIG. 26(A), A part of the area including the edge circuit area 234 and a part of the area including the display area 235 are respectively An example of a cross section when cut is shown.

[0190] The display device 100 shown in FIG. 28 includes a transistor 201, a transistor 202, a transistor 203, a transistor 204, a transistor 205, a transistor 206, a transistor 207, a transistor 208, a transistor 209, a transistor 209, a transistor 210, a transistor 211, a transistor 212, a transistor 213, a transistor 214, a transistor 215, Transistor 203, transistor 205, transistor 206, capacitor element 202, liquid crystal The element 180, the light-emitting element 170, the insulating layer 220, the colored layer 131, etc. The edge layer 220 is bonded via an adhesive layer 141. The substrate 351 and the insulating layer 220 are bonded via an adhesive layer 141. It is attached via 142.

[0191] The substrate 361 is provided with a colored layer 131, a light-shielding layer 132, an insulating layer 121, and a liquid crystal element 180. An electrode 113 that functions as a current-carrying electrode, an alignment film 133b, an insulating layer 117, and the like are provided. The insulating layer 121 may also function as a planarizing layer. Since the surface of the insulating layer 113 can be made substantially flat, the alignment state of the liquid crystal 112 can be made uniform. 17 functions as a spacer to maintain the cell gap of the liquid crystal element 180. If the layer 117 transmits visible light, the insulating layer 117 is overlapped with the display area of ​​the liquid crystal element 180. It may be placed.

[0192] In addition, a functional member 135 such as an optical member can be disposed on the outer surface of the substrate 361. Optical components include polarizing plates, retardation plates, light diffusion layers (such as diffusion films), and anti-reflection layers. (also called "Anti Reflection Layer" or "AR Layer"), anti-glare layer ("An Examples include a transparent glass layer (also called a "glare layer" or "AG layer") and a light-collecting film. In addition to optical components, functional components include anti-static films that prevent dust from adhering, and These include a water-repellent film that makes it difficult for the surface to adhere, and a hard coating that prevents scratches from occurring during use. The functional member 135 may be a combination of the above members. A circular polarizing plate in which an optical plate and a retardation plate are combined may also be used.

[0193] The AR layer has the function of reducing specular reflection (mirror reflection) of external light by utilizing the interference of light. When an AR layer is used as the functional member 135, the AR layer has a refractive index different from that of the substrate 361. The AR layer is made of a material having a refractive index, such as zirconium oxide or magnesium fluoride. The insulating film can be formed using a material such as sodium oxide, aluminum oxide, or silicon oxide.

[0194] In addition, an anti-glare layer (also called an "Anti Glare layer" or "AG layer") may be used instead of the AR layer. The AG layer diffuses incident external light, thereby reducing specular reflection (mirror reflection). It has the function of reducing

[0195] The AG layer can be formed by creating minute irregularities on the surface, or by mixing materials with different refractive indices. For example, a method using a transparent material, or a method using a combination of the two, is known. The resin contains nanofibers such as cellulose fibers, inorganic beads such as silicon oxide, or The AG layer can be formed by mixing resin beads or the like.

[0196] In addition, an AG layer may be provided on the AR layer. By providing the AR layer and the AG layer in a laminated state, It can further improve the function of preventing reflection and glare of external light. AR layer, and / or A By using a G layer or the like, the external light reflectance of the surface of the display device can be reduced to less than 1%, preferably 0. It is recommended to keep it below 3%.

[0197] The liquid crystal element 180 shown in this embodiment uses the conductive layer 193 of the light-emitting element 170 as a reflective electrode. The liquid crystal element 180 is a reflective liquid crystal element. The electrode 311 and the electrode 113 are laminated. An alignment film 133a is provided between the liquid crystal 112 and the electrode 311. An alignment film 133b is provided between the layers 113.

[0198] The reflective electrode of the liquid crystal element 180 is also used as the conductive layer 193 of the light emitting element 170. This reduces the need for a dedicated reflective electrode 180, thereby reducing the manufacturing cost of the display device. The productivity of the display device can be improved.

[0199] In this embodiment, a circular polarizer is used as the functional member 135. The light is polarized by the functional member 135 (circular polarizer) and passes through the electrode 113, the liquid crystal 112, the electrode 311 and is reflected by the conductive layer 193. Then, the light passes through the electrode 311, the liquid crystal 112, and the electrode 113. The light passes through the electrode 311 again and reaches the functional member 135 (circular polarizer). The orientation of the liquid crystal can be controlled by applying a voltage between 113, and the optical modulation of light can be controlled. That is, the intensity of the light emitted through the functional member 135 (circular polarizer) can be controlled. In addition, the colored layer 131 absorbs light outside a specific wavelength range. As a result, the extracted light is, for example, red light.

[0200] At the connection portion 207, the electrode 311 is connected to the transistor 206 via the conductive layer 221b. The transistor 206 is electrically connected to the conductive layer 222b of the liquid crystal element 18. It has the function of controlling the drive of 0.

[0201] A connecting portion 252 is provided in a portion of the area where the adhesive layer 141 is provided. 2, a conductive layer obtained by processing the same conductive film as the electrode 311 and a part of the electrode 113 are electrically connected by the connector 243. Therefore, the A signal or potential input from the FPC 372 is applied to the electrode 113 via the connection portion 252. can be supplied.

[0202] The connectors 243 may be, for example, conductive particles. The surface of particles such as organic resin or silica coated with a metal material can be used. It is preferable to use nickel or gold as the metal material, as this can reduce the contact resistance. It uses particles coated with layers of two or more metal materials, such as nickel coated with gold. It is preferable that the connector 243 is made of a material that undergoes elastic or plastic deformation. In this case, the connectors 243, which are conductive particles, are preferably arranged as shown in FIG. In this way, the connector 243 and the electrical This increases the contact area with the conductive layer that is directly connected, reducing contact resistance and preventing connection failures. The occurrence of defects can be suppressed.

[0203] The connector 243 is preferably disposed so as to be covered with the adhesive layer 141. For example, The connecting bodies 243 may be dispersed in the previous adhesive layer 141 .

[0204] The light emitting element 170 is a bottom emission type light emitting element. A laminated structure in which a conductive layer 191, an EL layer 192, and a conductive layer 193 are laminated in this order from the 220 side. The conductive layer 191 is connected to the transistor 2 through an opening provided in the insulating layer 214. The transistor 205 is connected to the conductive layer 222b of the light-emitting element 170. The insulating layer 216 covers the end of the conductive layer 191. The layer 193 has a function of reflecting visible light, and the conductive layer 191 has a function of transmitting visible light. An insulating layer 194 is provided to cover the conductive layer 193. The light emitted by the light emitting element 170 is The light is emitted to the substrate 361 side through the insulating layer 220, the electrode 311, the colored layer 131, and the like.

[0205] The light emitting element 170 emits light in a variety of colors, including white, red, green, blue, and shimmer, depending on the material that makes up the EL layer 192. The liquid crystal element 180 can change the color to brown, magenta, or yellow. The reflected light is controlled to be white, red, green, blue, cyan, or magenta depending on the material that makes up the colored layer 131. The light emitting element 170 and the liquid crystal element 180 can be changed to a color such as green or yellow. ,Color display can be realized by changing the color of light controlled by the pixel. .

[0206] In addition, the EL layer 192 that emits white light is used in the light emitting element 170, and the colored layer 131 is used to color the light. That's fine.

[0207] In order to realize a color display, the light emitting element 170 emits light in a color different from that of the liquid crystal element 180. The colors of the colored layers to be matched are not only a combination of red, green, and blue, but also a combination of yellow, cyan, and magenta. The color of the colored layer to be combined may be determined appropriately depending on the purpose or application. Just set it.

[0208] Transistor 201, transistor 203, transistor 205, transistor 206, and the capacitor element 202 are both formed on the surface of the insulating layer 220 on the substrate 351 side. In FIG. 28, transistor 201, transistor 203, transistor 205, and The transistor 206 is illustrated as a top-gate transistor.

[0209] The transistor 203 is a transistor (switching The transistor 205 is a light-emitting transistor. This is a transistor (also called a drive transistor) that controls the current flowing through the element 170.

[0210] On the substrate 351 side of the insulating layer 220, there are insulating layers 211, 212, 213, and Insulating layers 212 and 213 are provided on the transistor. The gates of transistors 201, 203, 205, and 206 The insulating layer 214 is provided to cover the conductive electrode and the like. The insulating layer 214 functions as a planarization layer. The number of insulating layers covering the transistor is not limited, and may be a single layer or two or more layers.

[0211] At least one insulating layer covering each transistor is designed to prevent impurities such as water and hydrogen from diffusing. It is preferable to use a material that can make the insulating layer function as a barrier film. By adopting such a structure, it is possible to prevent impurities from diffusing into the transistor from the outside. This makes it possible to effectively suppress the above-mentioned problems, thereby realizing a highly reliable display device.

[0212] The capacitor element 202 is made up of a conductive layer 217 and a conductive film 218 which overlap each other via an insulating layer 211. The conductive layer 217 may be formed using the same material and method as the conductive layer 225. The conductive layer 218 can be formed using the same material and method as the conductive layer 223. The conductive layer 223, the conductive layer 225, and the conductive layer 222a are preferably formed using a light-transmitting material. I wish.

[0213] The transistor 203, the transistor 205, and the transistor 206 are light-transmitting. As mentioned above, the transparent conductive material is copper or aluminum. It has a higher resistivity than conductive materials with light-shielding properties, such as silicon dioxide. The conductive layer used for the transistor 201 included in the peripheral circuit region 234 has a low resistivity. It is formed using a conductive material (metal material) that has light-blocking properties.

[0214] The transistors 203, 205, and 206 have gates a conductive layer 223 that functions as a gate insulating layer, an insulating layer 224 that functions as a source and drain insulating layer, The conductive layer 222a and the conductive layer 222b function as a gate, and the semiconductor layer 231 are included. Here, the same hatching pattern is applied to multiple layers obtained by processing the same conductive film. The transistor 205 also has a conductive layer 225 that can function as a gate. .

[0215] Similarly, the transistor 201 also has a conductive layer functioning as a gate, a gate insulating layer, and a gate insulating layer. The semiconductor layer includes an insulating layer, a conductive layer that functions as a source and a drain, and a semiconductor layer. The transistor 201 also has a conductive layer 221a that can function as a gate. The conductive layer 1a and the conductive layer 221b can be obtained by processing the same conductive film.

[0216] The transistor 201 and the transistor 205 have two semiconductor layers in which channels are formed. The transistor is sandwiched between two gates. The threshold voltage of the transistor can be controlled by connecting the two gates and applying the same signal to them. Such a transistor may be driven by supplying a It is possible to increase the field effect mobility compared to conventional transistors, and increase the on-current. As a result, a circuit capable of high-speed operation can be fabricated. By using a transistor with a large on-current, it is possible to reduce the area occupied by the Even if the number of wires increases when the display device is made larger or higher resolution, This makes it possible to reduce signal delays and suppress display unevenness.

[0217] Alternatively, a potential for controlling the threshold voltage is applied to one of the two gates, and a drive voltage is applied to the other. By applying a potential for the transistor, the threshold voltage of the transistor can be controlled.

[0218] There is no limitation on the structure of the transistors in the display device. The transistors in the display area 235 may have the same structure or different structures. The plurality of transistors in the peripheral circuit region 234 may all have the same structure. Alternatively, two or more types of structures may be used in combination. The plurality of transistors in the region 235 may all have the same structure, or may have two or more types of structures. A combination of structures may also be used.

[0219] The conductive layer functioning as a gate may be formed using a conductive material containing an oxide. By depositing the gate insulating layer under an atmosphere containing oxygen, oxygen can be supplied to the gate insulating layer. The ratio of oxygen gas in the film forming gas is preferably set to a range of 90% to 100%. The oxygen supplied to the gate insulating layer is supplied to the semiconductor layer by a subsequent heat treatment, and Oxygen deficiency can be reduced.

[0220] A connection portion 204 is provided in the area where the substrate 351 and the substrate 361 do not overlap. In 204, the wiring 365 is electrically connected to the FPC 372 via the connection layer 242. The connection part 204 has the same structure as the connection part 207. The upper surface of the connection part 204 is The conductive layer obtained by processing the same conductive film as 311 is exposed. 04 and FPC 372 can be electrically connected via a connection layer 242.

[0221] The liquid crystal element 180 may be, for example, a vertical alignment (VA) liquid crystal element. A liquid crystal element in which the MV mode is applied can be used. A (Multi-Domain Vertical Alignment) mode, PV A(Patterned Vertical Alignment) mode, ASV(A Advanced Super View mode can be used.

[0222] The liquid crystal element 180 can be a liquid crystal element to which various modes are applied. For example, In addition to the VA mode, there are also TN (Twisted Nematic) and IPS (In- Plane-Switching mode, VA-IPS mode, FFS (Fringe Field Switching) mode, ASM (Axially Symmetry ic aligned micro-cell) mode, OCB (Optically Compensated Birefringence mode, FLC (Ferrero) lectric Liquid Crystal) mode, AFLC (AntiFerr (Oelectric Liquid Crystal) mode, guest-host mode, etc. A liquid crystal element to which the above is applied can be used.

[0223] A liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of liquid crystals. The optical modulation effect of liquid crystals is determined by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field or oblique electric field). The liquid crystal used in the liquid crystal element is thermotropic. Low molecular weight liquid crystal, high molecular weight liquid crystal, polymer dispersed liquid crystal (PDLC) Dispersed Liquid Crystal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. These liquid crystal materials can be used in various phases, such as cholesteric phase, smectic phase, etc. These phases include cubic phase, chiral nematic phase, and isotropic phase.

[0224] The liquid crystal material may be either a positive type liquid crystal or a negative type liquid crystal. The optimum liquid crystal material should be selected depending on the mode and design.

[0225] An alignment film can be provided to control the alignment of the liquid crystal. In this case, a liquid crystal that exhibits a blue phase without using an alignment film may be used. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. To achieve this, a liquid crystal composition containing several weight percent or more of a chiral agent is used. A liquid crystal composition containing a liquid crystal exhibiting the above formula and a chiral agent has a short response time and is optically isotropic. Furthermore, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent does not require alignment treatment, The viewing angle dependency is small. Also, since there is no need to provide an alignment film, rubbing treatment is also unnecessary. Therefore, electrostatic damage caused by the rubbing process can be prevented. This can reduce defects and damage to the liquid crystal display device.

[0226] In addition, by using a liquid crystal material that operates in a guest-host mode for the liquid crystal element 180, Functional members such as a light diffusion layer and a polarizing plate can be omitted. In addition, since no functional members such as polarizing plates are provided, the liquid crystal element Therefore, the visibility of the display device can be improved. do.

[0227] In addition, the switching between the on and off states (bright state) of a reflective liquid crystal display device using a circular polarizer is The switching between the dark and the bright state is achieved by aligning the long axes of the liquid crystal molecules in a direction approximately perpendicular to the substrate, or in a direction approximately parallel to the substrate. Generally, horizontal electric field methods such as IPS mode are used. The liquid crystal element operates in such a way that the long axes of the liquid crystal molecules are approximately parallel to the substrate in both the on and off states. Since the polarizers are aligned in the same direction, it is difficult to use them in reflective liquid crystal display devices.

[0228] The liquid crystal element that operates in VA-IPS mode operates in a horizontal electric field mode and has an on / off state. The state can be switched by aligning the long axis of the liquid crystal molecules in a direction almost perpendicular to the substrate or in a direction almost parallel to the substrate. For this reason, the reflective LCD device uses the in-plane switching method. When using a liquid crystal element that operates in VA-IPS mode, use a liquid crystal element that operates in VA-IPS mode. It is preferable that:

[0229] A front light may be provided outside the functional member 135. It is preferable to use an edge-lit front light. Using a front light with a emitting diode (LED) can reduce power consumption. This is preferable.

[0230] The adhesive layer may be a photo-curable adhesive such as an ultraviolet curable adhesive, a reaction-curable adhesive, or a heat-curable adhesive. Various curing adhesives such as elastomeric adhesives and anaerobic adhesives can be used. epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide Resin, PVC (Polyvinyl Chloride) Resin, PVB (Polyvinyl Butyral) Resin, EV A (ethylene vinyl acetate) resins, etc. In particular, epoxy resins, etc., which have high moisture permeability, A material with low viscosity is preferable. Two-component resin may also be used. An adhesive sheet or the like may also be used. It's fine.

[0231] The connection layer 242 is made of an anisotropic conductive film (ACF). Conductive Film), Anisotropic Conductive Paste (ACP) Conductive Paste) can be used.

[0232] The light emitting elements are top emission type, bottom emission type, and dual emission type. The electrode on the light extraction side uses a conductive film that transmits visible light. It is preferable to use a conductive film that reflects visible light for the electrode on the side from which light is not extracted. The element 170 can be said to be a bottom-emission type light-emitting element.

[0233] The EL layer 192 has at least a light-emitting layer. The EL layer 192 has a positive electrode as a layer other than the light-emitting layer. Highly hole-injecting materials, highly hole-transporting materials, hole-blocking materials, highly electron-transporting materials , a substance with high electron injection properties, or a bipolar substance (a substance with high electron transport properties and hole transport properties) The layer may further include a layer containing a material.

[0234] The light emitting element 170 emits light in a variety of colors, including white, red, green, blue, and shimmer, depending on the material that makes up the EL layer 192. It can be changed to brown, magenta, or yellow.

[0235] As a method for realizing a color display, a light emitting element 170 that emits white light and a colored layer are combined. and a method in which light emitting elements 170 that emit different colors of light are provided for each sub-pixel. This method is more productive than the latter method, which requires an EL layer 19 for each subpixel. Since it is necessary to separately produce 2, the productivity is lower than the former method. In addition to the latter method, the emission color can be obtained with higher color purity than the former method. Further improving color purity by providing a microcavity structure to the optical element 170 can be done.

[0236] The EL layer 192 can be made of either a low molecular weight compound or a high molecular weight compound. The layers constituting the EL layer 192 may each be formed by a vapor deposition method (vacuum evaporation). It can be formed by methods such as transfer method, printing method, ink jet method, coating method, etc. Cut.

[0237] The EL layer 192 may include inorganic compounds such as quantum dots. When used in the light-emitting layer, it can also function as a light-emitting material.

[0238] Furthermore, the display device 100 according to one embodiment of the present invention includes a substrate between the light-emitting element 170 and the liquid crystal element 180. Therefore, the distance between the light emitting element 170 and the liquid crystal element 180 in the thickness direction is set to less than 30 μm. The thickness can be less than 10 μm, preferably less than 5 μm. Therefore, in a display using the light emitting element 170 and the liquid crystal element 180 simultaneously or alternately, The parallax occurring between the two can be reduced. Alternatively, the thickness of the display device 100 can be reduced. This allows the display device 100 to be easily flexible.

[0239] [substrate] There is no particular limitation on the materials used for the substrate 351 and the substrate 361. The decision should be made taking into consideration the presence or absence of barium and the heat resistance required to withstand heat treatment. Glass substrates such as borosilicate glass and aluminoborosilicate glass, ceramic substrates, and quartz A substrate, a sapphire substrate, or the like can be used. In addition, a semiconductor substrate, a flexible substrate (flexible substrate), etc. A flexible substrate, a laminated film, a base film, or the like may also be used.

[0240] The semiconductor substrate may be a semiconductor made of silicon or germanium. Substrate, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide, There are also compound semiconductor substrates made of zinc oxide or gallium oxide. The solid substrate may be a single crystal semiconductor or a polycrystalline semiconductor.

[0241] In order to increase the flexibility of the display device 100, the substrate 351 and the substrate 361 are made of flexible substrates. A plate (flexible substrate), a laminated film, a base film, or the like may also be used.

[0242] Examples of materials for flexible substrates, laminating films, and base films include polyethylene. Polyesters such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN) Resin, polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate Resin, Polycarbonate (PC), Polyethersulfone (PES), Poly Polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, Polystyrene resin, polyamide-imide resin, polyurethane resin, polyvinyl chloride resin, Polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) Resin, ABS resin, cellulose nanofiber, etc. can be used.

[0243] By using the above materials for the substrate, a lightweight display device can be provided. By using the above materials as the substrate, it is possible to provide a display device that is resistant to impacts. Furthermore, by using the above material as the substrate, it is possible to provide a display device that is less susceptible to damage. can be done.

[0244] The lower the linear expansion coefficient of the flexible substrate used for the substrate 351 and the substrate 361, the less deformation caused by the environment. The flexible substrate used for the substrate 351 and the substrate 361 is preferably a wire substrate. Expansion rate is 1×10 -3 / K or less, 5×10 -5 / K or less, or 1×10 -5 / K or less Aramid is particularly suitable as a flexible substrate because of its low linear expansion coefficient. It is suitable.

[0245] [Conductive layer] In addition to the gate, source, and drain of the transistor, various wiring and Materials that can be used for conductive layers such as electrodes include aluminum, titanium, chromium, and the like. , nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten These materials include metals such as tin and tin alloys. The film containing the compound can be used as a single layer or as a laminate structure.

[0246] Examples of the light-transmitting conductive material include indium oxide, indium tin oxide, and indium tin oxide. Conductive oxides such as gallium zinc oxide, zinc oxide, and gallium-doped zinc oxide, or gallium-doped zinc oxide Alternatively, the conductive material having light transmission properties may be an oxide conductive material. Alternatively, gold, silver, platinum, magnesium, nickel, tungsten, Metals such as stainless steel, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium The metal material may be a nitride of the metal material, or an alloy material containing the metal material. (for example, titanium nitride) may be used. When using a nitride of the above material, it is sufficient to make it thin enough to have transparency. A laminated film can be used as the conductive layer. For example, a silver-magnesium alloy and an indium alloy can be used. It is preferable to use a laminated film of tin oxide, etc., since the conductivity can be increased. These include conductive layers such as various wirings and electrodes that constitute a display device, and conductive layers that a display element has. It can also be used for a conductive layer that functions as a pixel electrode or a common electrode.

[0247] Here, the oxide conductor will be described. In this specification and the like, the oxide conductor is referred to as OC( The oxide conductor may be, for example, When oxygen vacancies are formed in a metal oxide and hydrogen is added to the oxygen vacancies, donor states appear near the conduction band. As a result, the metal oxide becomes electrically conductive. The metal oxides formed by the metal oxides can be called oxide conductors. On the other hand, oxide conductors have a large conduction gap and are therefore transparent to visible light. It is a metal oxide that has a donor level near the conduction band. The influence of absorption due to levels is small, and the transparency to visible light is comparable to that of oxide semiconductors. .

[0248] [Insulating layer] Examples of insulating materials that can be used for each insulating layer include resins such as acrylic and epoxy. Silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide Examples of suitable insulating materials include inorganic insulating materials such as aluminum.

[0249] [Colored layer] Materials that can be used for the coloring layer include metal materials, resin materials, pigments, and dyes. Examples include resin materials.

[0250] [Light blocking layer] Materials that can be used for the light-shielding layer include carbon black, titanium black, gold, Examples of the light-shielding layer include metals, metal oxides, and composite oxides including solid solutions of multiple metal oxides. The film may be a film containing a resin material, or may be a thin film made of an inorganic material such as a metal. For example, a laminated film of a film containing a material of a colored layer may be used as the light-shielding layer. A film containing a material used for a color layer that transmits light of a certain color and a material used for a color layer that transmits light of another color are used. By using the same material for the colored layer and the light-shielding layer, This is preferable because it allows the equipment to be standardized and the process to be simplified.

[0251] [Variation 1] A cross section of a display device 100A, which is a modification of the display device 100, is shown in FIG. A differs from the display device 100 in that it does not have a colored layer 131. Since the details are the same as those of the display device 100, detailed explanations thereof will be omitted.

[0252] In the display device 100A, the liquid crystal element 180 exhibits white color. Therefore, the display device 100A uses the liquid crystal element 180 to display black and white or gray scale images. The following display can be performed.

[0253] [Variation 2] A cross section of a display device 100B, which is a modification of the display device 100, is shown in FIG. B has a touch sensor 370 between the substrate 361 and the colored layer 131. The touch sensor 370 includes a conductive layer 374, an insulating layer 375, a conductive layer 376a, and a conductive layer 376b. , a conductive layer 377, and an insulating layer 378.

[0254] The conductive layer 376a, the conductive layer 376b, and the conductive layer 377 are made of a light-transmitting conductive material. However, in general, a light-transmitting conductive material is preferably formed on a substrate. It has a higher resistivity than non-metallic materials, which allows for larger and more precise touch sensors. Therefore, the conductive layer 376a, the conductive layer 376b, and the conductive layer 377 are made of a metal material with low resistivity. It may be formed.

[0255] When the conductive layer 376a, the conductive layer 376b, and the conductive layer 377 are formed using a metal material, It is preferable to reduce the reflection of external light. Generally, metal materials have a high reflectivity. By subjecting the material to oxidation treatment or the like, the reflectance can be reduced and the color can be made darker.

[0256] The conductive layers 376a, 376b, and 377 are made of a metal layer and a thin film having a low reflectivity. The dark layer has a high resistivity, so it can be easily combined with the metal layer. It is preferable to laminate a dark layer. Examples of the dark layer include a layer containing copper oxide, copper chloride, or The dark layer may be composed of Ag particles, Ag fibers, Cu, or other metals. nanocarbons such as metal particles, carbon nanotubes (CNTs), or graphene particles and conductive polymers such as PEDOT, polyaniline, or polypyrrole. It may be formed using, for example.

[0257] The touch sensor 370 may be a resistive or capacitive touch sensor. Alternatively, an optical touch sensor using a photoelectric conversion element may be used. There are surface capacitive touch panels, projected capacitive touch panels, and other touch panels. Projected capacitive touch panels include: There are two types of sensors, self-capacitance type and mutual capacitance type, mainly depending on the driving method. This is preferable because it enables simultaneous multipoint detection.

[0258] The other configurations are the same as those of the display device 100, and therefore detailed description thereof will be omitted.

[0259] In addition, the touch sensor 370 is not provided between the substrate 361 and the colored layer 131, and the display device 100 A touch sensor may be provided on the substrate 361. For example, a sheet-like touch sensor 1 76 may be provided overlapping the display area 235.

[0260] [About transistors] In one embodiment of the present invention, the structure of a transistor included in a display device is not particularly limited. For example, a planar type transistor or a staggered type transistor may be used. Alternatively, a top gate structure or a bottom gate structure may be used. Alternatively, gate electrodes may be provided above and below the channel. may be provided.

[0261] [Semiconductor materials] There are no significant restrictions on the crystallinity of the semiconductor material used in the semiconductor layer of a transistor. Semiconductors, crystalline semiconductors (microcrystalline semiconductors, polycrystalline semiconductors, single crystal semiconductors, or single crystal semiconductors) A semiconductor having a crystalline region may be used. The use of such a material is preferable because it can suppress the deterioration of transistor characteristics.

[0262] Furthermore, for example, silicon and germanium are used as semiconductor materials for the semiconductor layer of a transistor. Silicon carbide, gallium arsenide, nitride semiconductors, etc. can also be used. Compound semiconductors and organic semiconductors can be used.

[0263] For example, semiconductor materials used in transistors include polycrystalline silicon (polysilicon), Amorphous silicon or the like can be used.

[0264] Alternatively, an OS transistor using a metal oxide can be used as the transistor. When an OS transistor is used, the voltage between the source and drain in the off state of the transistor is This is preferable because it can reduce the current flowing through the

[0265] <Circuit configuration example of pixel 10> FIG. 31 is a diagram showing an example of the circuit configuration of the pixel 10. In FIG. 31, two adjacent pixels 10 This shows:

[0266] The pixel 10 includes a switch SW1, a capacitance element C8, a liquid crystal element 180, a switch SW2, a transistor The pixel 10 includes a resistor M, a capacitance element C9, and a light emitting element 170. G1, wire G2, wire ANO, wire CSCOM, wire S1, and wire S2 are electrically connected. 31, the wiring VCOM1 electrically connected to the liquid crystal element 180, and a wiring VCOM2 electrically connected to the light emitting element 170.

[0267] FIG. 31 shows an example in which transistors are used for the switches SW1 and SW2. The switch SW1 corresponds to the transistor 271. The switch SW2 corresponds to the Transistor M corresponds to transistor 283. Capacitance The element C8 corresponds to the capacitance element 272. The capacitance element C9 corresponds to the capacitance element 282 ( See Figure 31 and Figure 27(A).

[0268] The switch SW1 has a gate connected to the wiring G1 and a source or drain connected to the wiring S 1, and the other of the source or drain is connected to one electrode of the capacitance element C8 and the liquid crystal element The other electrode of the capacitance element C8 is connected to the wiring CSCOM. The other electrode of the liquid crystal element 180 is connected to the wiring VCOM1.

[0269] The switch SW2 has a gate connected to the wiring G2 and a source or drain connected to the wiring S 2, and the other of the source and drain is connected to one electrode of the capacitance element C9, The other electrode of the capacitance element C9 is connected to the source of the transistor M. The transistor M is connected to one of the source and drain terminals and the wiring ANO. Alternatively, the other of the drains is connected to one of the electrodes of the light emitting element 170. The other electrode of the second electrode is connected to the wiring VCOM2.

[0270] In FIG. 31, a transistor M has two gates that sandwich a semiconductor, and these are connected. This increases the current that the transistor M can pass. This can be done.

[0271] A signal that controls the switch SW1 to be in a conducting or non-conducting state is applied to the wiring G1. A predetermined potential can be applied to the wiring VCOM1. A signal for controlling the alignment state of the liquid crystal in the element 180 can be applied. M can be given a predetermined potential.

[0272] A signal that controls the switch SW2 to be in a conductive state or a non-conductive state is applied to the wiring G2. A potential difference that causes the light emitting element 170 to emit light is generated between the wiring VCOM2 and the wiring ANO. The wiring S2 can be connected to a potential that controls the conduction state of the transistor M. A signal to control the

[0273] In the pixel 10 shown in FIG. 31, when a reflective mode display is performed, for example, the wiring G1 and the wiring S1 and displays the image using optical modulation by the liquid crystal element 180. In addition, when displaying in the light-emitting mode, the signal applied to the wiring G2 and the wiring S2 is The light emitting element 170 can be driven by a signal to emit light for display. When driving with It can be driven by a signal.

[0274] In FIG. 31, one pixel 10 includes one liquid crystal element 180 and one light emitting element 170. 32 shows an example in which one pixel 10 has one liquid crystal element 1 80 and four light emitting elements 170 (light emitting element 170r, light emitting element 170g, light emitting element 170b 32 shows an example in which the pixel 10 has a light emitting element 170w. This means that a single pixel can display full color.

[0275] In FIG. 32, in addition to the example of FIG. 31, a line G3 and a line S3 are connected to the pixel 10.

[0276] In the example shown in FIG. 32, for example, four light emitting elements 170 are arranged in red (R), green (G) and red (R). A light-emitting element that emits blue (B) and white (W) light can be used. A reflective liquid crystal element that exhibits white color can be used as the reflector 180. When displaying a light-emitting mode, a white display with high reflectivity can be achieved. When displaying in this mode, it is possible to display with high color rendering properties using low power consumption.

[0277] <Display mode> The display device 100 can be operated in three display modes: a first display mode (m Mode 1) is a display mode in which an image is displayed as a reflective liquid crystal display device. The display mode (mode 2) is a display mode in which an image is displayed as a light-emitting display device. The display mode (mode3) operates the first and second display modes simultaneously. This is a display mode.

[0278] [First display mode] The first display mode does not require a light source, and therefore is a display mode with extremely low power consumption. For example, this is particularly effective when the illuminance of external light is sufficiently high and the external light is white light or light close to white light. The first display mode is effective in an environment where the illuminance is greater than about 300 lx, for example. This is especially effective when used in daylight. However, depending on the purpose or use, the illuminance may be Even in an environment of less than about 300 lx, the display device 100 can be operated in the first display mode. There may be cases where this is done.

[0279] The first display mode is a display mode suitable for displaying text information such as books and documents. Because it uses reflected light to display images, it is easy on the eyes and reduces eye fatigue. This has the effect of making it difficult to

[0280] FIG. 33(A1) shows the electronic device 910 being used outdoors during the day. In 3(A1), the display device of the electronic device 910 operates in the first display mode. The electronic device 910 is, for example, a mobile information terminal such as a smartphone. The display device 100 includes a display device 100 according to an embodiment of the present invention.

[0281] FIG. 33(A2) shows incident light 901 incident on the display device 100 of the electronic device 910 and 9 shows reflected light 902 reflected by device 100.

[0282] [Second display mode] The second display mode is extremely vivid (high contrast) regardless of the illuminance or chromaticity of the external light. This is a display mode that can display images with high color reproducibility. The second display mode is effective when the illuminance of external light is low, such as when the illuminance is 5000. It is particularly effective when used in an environment of less than about lx. Therefore, even in an environment where the illuminance is greater than about 5000 lx, the display device 100 can be used as the second In addition, when the illuminance of external light is low, a bright display may be displayed. To prevent this, the second display mode is It is preferable to display the image with reduced brightness. This not only reduces glare but also reduces the The second display mode provides vivid images and smooth video. This mode is suitable for displaying

[0283] FIG. 33(B1) shows the state in which the electronic device 910 is used outdoors at night. 33(B), an electronic device 920 in the figure is an electronic device used for digital signage. In 1), the display devices of the electronic device 910 and the electronic device 920 operate in the second display mode. The electronic device 920 includes the display device 100 of one embodiment of the present invention.

[0284] FIG. 33B2 shows the light 903 emitted from the display device 100 of the electronic device 910 and the Light emission 903 is shown emanating from the display device 100 of the device 920 .

[0285] [Third display mode] The third display mode is a combination of the reflected light in the first display mode and the emitted light in the second display mode. This is a display mode that uses both. For example, the maximum reflected brightness in the first display mode is When it becomes necessary to emit the above amount of light from the display device 100, the required amount of light is output to the second display model. In addition, for example, the reflected light in the first display mode and the The light emitted by the second display mode is mixed to produce one color. It is possible.

[0286] The third display mode provides a more vivid display than the first display mode, while maintaining the same brightness as the second display mode. For example, under indoor lighting, in the morning or evening, This is effective when the illuminance of external light is relatively low or when the chromaticity of external light is not white.

[0287] The third display mode is particularly effective when used in an environment with an illuminance of less than 5000 lx. However, depending on the purpose or use, the lighting may be higher than 5000lx. Even if the display device 100 is in the third display mode, there may be cases where the display device 100 is operated in the third display mode.

[0288] FIG. 33(C1) shows a state in which an electronic device 910 is being used indoors. The electronic device 930 inside is an electronic device that can function as a television or monitor. The electronic device 940 in the figure is a notebook personal computer. In the above, the display devices of the electronic devices 910, 930, and 940 are The electronic device 930 and the electronic device 940 operate in three display modes. The display device 100 has an embodiment.

[0289] FIG. 33(C2) shows the light emitted from the display device 100 of the electronic device 910. Incident light 901 incident on the display device 100 of the electronic device 910 and the display device 1 902. Also, the display device 100 of the electronic device 930 emitted light 903, incident light 901 incident on the display device 100 of the electronic device 930, and The electronic device 94 and the display device 100 of the electronic device 930 are shown as reflected light 902. The display device 100 of this example can function in the same way as the other display devices 100.

[0290] The display using the third display mode can also be called a hybrid display mode. A multi-color display is a display that uses both reflected light and self-luminous light on a single panel to change color or light intensity. It is a method of displaying characters and / or images by using two complementary display modes. A multi-pixel display is a display that uses light from multiple display elements in the same pixel or sub-pixel. However, hybrid display is not possible. Display devices that use a When viewed locally, a pixel or sub-pixel displayed using one of the multiple display elements is In the case of having a pixel and a pixel or sub-pixel displayed using two or more of a plurality of display elements There is.

[0291] In this specification, the term "a device that satisfies one or more of the above-mentioned expressions" is used. This is called a hybrid display.

[0292] A hybrid display has multiple display elements in the same pixel or subpixel. The plurality of display elements may include, for example, reflective elements that reflect light and transparent elements that emit light. The reflective element and the self-luminous element are controlled independently. The hybrid display can utilize both reflected light and self-luminous light in the display area. It has the function of displaying characters and / or images using either or both of the above.

[0293] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible.

[0294] (Embodiment 5) In this embodiment, a display device described in the above embodiment can be applied to an information processing device. The arrangement will be described with reference to FIGS. 37 and 38.

[0295] 37 and 38 illustrate the configuration of an information processing device according to one embodiment of the present invention. 7(A) is a block diagram of an information processing device, and FIG. 37(B) to FIG. 37(E) are diagrams showing the information processing device. 38(A) to 38(E) are perspective views for explaining the configuration of the information processing device. FIG. 2 is a perspective view illustrating the configuration of the device.

[0296] <Information processing device> The information processing device 5200B described in this embodiment includes an arithmetic unit 5210 and an input / output unit 5211. 220 (see FIG. 37(A)).

[0297] The arithmetic unit 5210 has a function of receiving operation information, and generates image information based on the operation information. It has the function of supplying

[0298] The input / output device 5220 includes a display unit 5230, an input unit 5240, a detection unit 5250, a communication unit 52 90, has a function to supply operation information and a function to supply image information. The device 5220 has a function of providing detection information, a function of providing communication information, and a function of providing communication information. It has a function to be supplied.

[0299] The input unit 5240 has a function of supplying operation information. For example, the input unit 5240 is an information processing The control unit 5200B supplies operation information based on the operation of the user of the control unit 5200B.

[0300] Specifically, keyboards, hardware buttons, pointing devices, and touch sensors , a voice input device, a gaze input device, etc. can be used for the input unit 5240.

[0301] The display unit 5230 has a display panel and has a function of displaying image information. The display device 100 described in the embodiment can be used as the display portion 5230.

[0302] The detection unit 5250 has a function of supplying detection information. It has the function of detecting the surrounding environment and providing the detected information.

[0303] Specifically, it detects illuminance sensors, imaging devices, posture detection devices, pressure sensors, human presence sensors, etc. It can be used in part 5250.

[0304] The communication unit 5290 has a function of receiving and supplying communication information. It has the function of connecting to other electronic devices or communication networks via wired or wired communication. It has functions such as wireless intranet communication, telephone communication, and short-range wireless communication.

[0305] <<Configuration Example 1 of Information Processing Device>> For example, an outer shape along a cylindrical pillar or the like can be applied to the display unit 5230 (see FIG. 37). (See (B)). It also has a function to change the display method depending on the illuminance of the usage environment. It has a function to detect the presence of people and change the display content. It can be installed on a pillar, or it can display advertisements or information, etc. , digital signage, etc.

[0306] <<Configuration Example 2 of Information Processing Device>> For example, it has a function to generate image information based on the trajectory of a pointer used by the user ( (See Figure 37(C)). Specifically, the diagonal length is 20 inches or more, preferably 40 inches. A display panel of 8 inches or more, more preferably 55 inches or more, can be used. Multiple display panels can be arranged to form one display area. This allows for the use of multi-screen displays, such as electronic whiteboards and It can be used for sub-bulletin boards, electronic signs, etc.

[0307] "Configuration example 3 of information processing device" For example, it has a function to change the display method depending on the illuminance of the usage environment (see Figure 37(D)). ) This can reduce the power consumption of a smartwatch, for example. For example, the image can be scanned so that it can be used suitably in an environment with strong external light, such as outdoors on a clear day. It can be displayed on the smart watch.

[0308] <<Configuration Example 4 of Information Processing Device>> The display unit 5230 has, for example, a curved surface that curves gently along the side of the housing (see FIG. 37( Alternatively, the display unit 5230 may include a display panel, and the display panel may include, for example, a front This allows you to display the information on the front and side of your mobile phone. Image information can be displayed on the sides and top without any need for a display.

[0309] <<Configuration Example 5 of Information Processing Device>> For example, it has a function to change the display method depending on the illuminance of the usage environment (see Figure 38(A)). ) This can reduce the power consumption of smartphones. The image can be easily transferred to a smartphone so that it can be used in bright outdoor environments such as on a sunny day. It can be displayed on the

[0310] "Configuration Example 6 of Information Processing Device" For example, it has a function to change the display method depending on the illuminance of the usage environment (see Figure 38(B)). This allows the unit to be used effectively even when exposed to strong external light that shines indoors on a sunny day. The video can then be displayed on a television system.

[0311] <<Configuration Example 7 of Information Processing Device>> For example, it has a function to change the display method depending on the illuminance of the usage environment (see Figure 38(C)). This allows the device to be used effectively even in environments with strong external light, such as outdoors on a clear day. Thus, the image can be displayed on the tablet computer.

[0312] "Configuration Example 8 of Information Processing Device" For example, it has a function to change the display method depending on the illuminance of the usage environment (see Figure 38(D)). This allows for optimal viewing even in environments with strong external light, such as outdoors on a clear day. Thus, the subject can be displayed on the digital camera.

[0313] "Configuration example 9 of information processing device" For example, it has a function to change the display method depending on the illuminance of the usage environment (see Figure 38(E)). This allows the device to be used effectively even in environments with strong external light, such as outdoors on a clear day. Thus, the image can be displayed on a personal computer.

[0314] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. .

[0315] For example, in this specification, when it is explicitly stated that X and Y are connected, In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected is also considered to be disclosed in this specification. Therefore, the present invention is not limited to the predetermined connection relationships, for example, the connection relationships shown in the drawings or text. Connections other than those shown in the drawings or text are also treated as if they were described in the drawings or text. do.

[0316] Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, a layer, etc.). , etc.).

[0317] An example of a direct connection between X and Y is a circuit that allows electrical connection between X and Y. The elements to be considered (e.g., switches, transistors, capacitance elements, inductors, resistance elements, When no external device (such as a diode, display element, light-emitting element, or load) is connected between X and Y, The elements that allow electrical connection between X and Y (e.g., switches, transistors, capacitors) elements, inductors, resistors, diodes, display elements, light-emitting elements, loads, etc.) , X and Y are connected.

[0318] An example of an electrical connection between X and Y is The elements to be considered (e.g., switches, transistors, capacitance elements, inductors, resistance elements, One or more devices (such as diodes, display elements, light-emitting elements, and loads) can be connected between X and Y. It is possible. The switch has a function to control on / off. A switch can be in a conducting state (ON state) or a non-conducting state (OFF state), allowing current to flow. The switch has the function of controlling whether or not the current flows. When X and Y are electrically connected, This includes the case where Y is directly connected.

[0319] An example of a functional connection between X and Y is a function that allows the functional connection between X and Y. Circuits that perform the above functions (for example, logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal conversion conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (voltage power supply circuits (voltage boost circuits, voltage drop circuits, etc.), level shifter circuits that change the signal potential level, etc.) , voltage source, current source, switching circuit, amplifier circuit (which can increase the signal amplitude or current amount, etc.) circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation One or more circuits (e.g., memory circuits, control circuits, etc.) can be connected between X and Y. For example, even if another circuit is inserted between X and Y, the signal output from X If X is transmitted to Y, then X and Y are considered to be functionally connected. When X and Y are functionally connected, there is a direct connection between X and Y and a direct connection between X and Y. This also includes the case where the and are electrically connected.

[0320] In addition, if it is explicitly stated that X and Y are electrically connected, are electrically connected (i.e., there is another element or circuit between X and Y) X and Y are functionally connected (i.e., X and Y are functionally connected) and (When there is a functional connection between them via another circuit) and when X and Y are directly connected (i.e., when X and Y are connected without any other element or circuit between them) is considered to be disclosed in the present specification. If it is explicitly stated that it is connected, The same content is considered to be disclosed in the present specification.

[0321] For example, if the source (or first terminal, etc.) of the transistor is connected via Z1 (or (not shown), electrically connected to X, and the drain (or second terminal, etc.) of the transistor is connected to Z 2 (or not), and is electrically connected to Y, or the source of the transistor (or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X. The drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. and another part of Z2 is directly connected to Y, It is possible to do so.

[0322] For example, "X and Y and the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor" The terminals of the transistor (or the first terminal) are electrically connected to each other. 1 terminal, etc.), the drain of the transistor (or the second terminal, etc.), and Y. Alternatively, it can be expressed as "connected to the source (or first The drain (or second terminal, etc.) of the transistor is electrically connected to X. ) is electrically connected to Y, and X is the source (or first terminal, etc.) of the transistor, The drains (or second terminals, etc.) of the transistors, Y, and Y are electrically connected in this order. Alternatively, "X is the source (or first terminal, etc.) of the transistor." ) and the drain (or second terminal, etc.) of the transistor Y, and X, the source (or first terminal, etc.) of a transistor, the drain (or second terminal, etc.) of a transistor , Y are provided in this connection order." By using this expression, the order of connections in the circuit configuration can be specified. A distinction is made between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of a transistor. The technical scope can be determined based on the above.

[0323] Alternatively, for example, "the source (or first terminal, etc.) of a transistor" is electrically connected to X through at least a first connection path, and the first connection path is , and the second connection path is a transistor through a transistor. The source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor The first connection path is a path via Z1, and the second connection path is a path between the first and second transistors. The drain (or second terminal, etc.) of the capacitor is electrically connected to Y through at least a third connection path. the third connection path does not have the second connection path, and the third connection path The connection path can be expressed as "the path via Z2." The source (or first terminal, etc.) of the capacitor is connected to the power supply through Z1 by at least the first connection path. and electrically connected to X, and the first connection path does not have a second connection path, The second connection path has a connection path via a transistor, and is connected to the drain ( or the second terminal, etc.) is electrically connected to Y via Z2 by at least a third connection path. The third connection path does not have the second connection path. Alternatively, the source (or first terminal, etc.) of the transistor may be A first electrical path electrically connects to X through Z1, and the first electrical path The second electrical path is connected to the source of the transistor. The electrical current flows from the source (or first terminal, etc.) to the drain (or second terminal, etc.) of the transistor. The drain (or second terminal, etc.) of the transistor is connected to at least a third Through the qi path, it is electrically connected to Y via Z2. The third electrical path does not have the fourth electrical path, and the fourth electrical path is an electrical path from the drain of the transistor (or the second terminal, etc.) to the source of the transistor (or the first terminal, etc.). It can be expressed as "there is". By using an expression method similar to these examples to define the connection path in the circuit configuration, the source of the transistor (or the first terminal, etc.) and the drain (or the second terminal, etc.) can be distinguished to determine the technical scope. Note that these expression methods are just examples and are not limited to these expression methods. Here, X, Y, Z1, Z2 are assumed to be objects (such as devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

[0324] In addition, even if components that are independent on the circuit diagram are shown as being electrically connected, there may be a case where one component has the functions of multiple components. For example, when a part of the wiring also functions as an electrode, one conductive film has the functions of both the wiring and the electrode components. Therefore, the electrical connection in this specification includes such cases where one conductive film has the functions of multiple components within its scope.

[0325]

[0326] (Embodiment 6) In this embodiment, the configuration example of the OS transistor shown in the above embodiment will be described.

[0327] <Configuration Example 1 of OS Transistor> ​​​​​​​​​​​​​First, as an example of the structure of a transistor, a transistor 3200a is shown in FIG. 34A is a top view of a transistor 3200a. FIG. 34(B) is a cross-sectional view taken along the dashed line X1-X2 in FIG. 34(A). 34(C) corresponds to the cross section taken along the dashed line Y1-Y2 in FIG. 34(A). In FIG. 34(A), in order to avoid complication, Some of the components of the resistor 3200a (such as the insulating layer that functions as the gate insulating layer) are omitted. In the following description, the direction of the dashed dotted line X1-X2 is the channel length direction, The direction of the dashed line Y1-Y2 is sometimes called the channel width direction. In the top view, as in the subsequent drawings, some of the components are omitted, as in FIG. 34. This may be indicated.

[0328] The transistor 3200a includes a conductive layer 3221 over an insulating layer 3224, and a gate insulating layer 3224 and a gate insulating layer 3225. An insulating layer 3211 on the conductive layer 3221, a metal oxide layer 3231 on the insulating layer 3211, and a gold A conductive layer 3222a on the metal oxide layer 3231 and a conductive layer 3222 on the metal oxide layer 3231 b, and the insulating layer 32 on the metal oxide layer 3231, the conductive layer 3222a, and the conductive layer 3222b. 12, a conductive layer 3223 on the insulating layer 3212, and a and an insulating layer 3213.

[0329] The insulating layer 3211 and the insulating layer 3212 have an opening 3235. is electrically connected to the conductive layer 3221 through the opening 3235.

[0330] Here, the insulating layer 3211 functions as a first gate insulating layer of the transistor 3200a. The insulating layer 3212 serves as a second gate insulating layer of the transistor 3200a. The insulating layer 3213 functions as a protective insulating layer for the transistor 3200a. In the transistor 3200a, the conductive layer 3221 functions as a first gate. The conductive layer 3222a functions as either a source or a drain, and The layer 3222b functions as the other of the source and drain. In the gate 3200a, the conductive layer 3223 functions as a second gate.

[0331] The transistor 3200a is a so-called channel-etched transistor, and It is a rugate structure.

[0332] The transistor 3200a may not include the conductive layer 3223. In this case, the transistor 3200a is a so-called channel-etched transistor. It is a Tom Gate structure.

[0333] As shown in FIGS. 34(B) and 34(C), the metal oxide layer 3231 is formed by the conductive layer 3221 and the conductive It is located opposite the layer 3223 and is sandwiched between two conductive layers that function as gates. The length of the conductive layer 3223 in the channel length direction and the length of the conductive layer 3223 in the channel width direction is the length of the metal oxide layer 3231 in the channel length direction and the channel width of the metal oxide layer 3231. The metal oxide layer 3231 is formed on the insulating layer 3212. The conductive layer 3223 is then applied to the substrate 3221.

[0334] In other words, the conductive layer 3221 and the conductive layer 3223 are formed on the insulating layer 3211 and the insulating layer 3212. and the metal oxide layer 3231 is connected to the opening 3235 formed in the The slit also has an outer region.

[0335] With this structure, the metal oxide layer 323 included in the transistor 3200a 1 can be electrically surrounded by the electric fields of the conductive layers 3221 and 3223. Like the transistor 3200a, the electric fields of the first gate and the second gate cause the channel The device structure of the transistor that electrically surrounds the metal oxide layer where the gate region is formed is called Sur. This can be called a rounded channel (S-channel) structure.

[0336] Since the transistor 3200a has an S-channel structure, the function of the first gate The conductive layer 3221 has a metal oxide The current driving capability of the transistor 3200a can be improved by applying a voltage to the layer 3231. This makes it possible to obtain high on-state current characteristics. Therefore, it is possible to miniaturize the transistor 3200a. 3200a is a diagram showing a metal oxide layer 3231 and a conductive layer 3221 having a function of a first gate. and a conductive layer 3223 having the function of a second gate. This can increase the mechanical strength of the transistor 3200a.

[0337] For example, the metal oxide layer 3231 may be made of In and M (M is gallium, aluminum, silicon, etc.). Ni, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel , germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium It is preferable that the alloy contains a metal selected from the group consisting of aluminum, tantalum, tungsten, and magnesium, and Zn.

[0338] The metal oxide layer 3231 has a region in which the atomic ratio of In is greater than the atomic ratio of M. As an example, the ratio of the number of In, M, and Zn atoms in the metal oxide layer 3231 is preferably It is preferable that In:M:Zn=approximately 4:2:3. Here, "approximately" means that when In is 4, , M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less. Or, metal oxide The atomic ratio of In, M, and Zn in the compound layer 3231 is set to about In:M:Zn=5:1:6. This is preferable.

[0339] The metal oxide layer 3231 is preferably made of CAC-OS. 1 has a region in which the atomic ratio of In is greater than the atomic ratio of M, and is a CAC-OS. This can increase the field effect mobility of the transistor 3200a. Details of the OS will be described later.

[0340] In addition, the transistor 3200a, which has an s-channel structure, has high field-effect mobility. Moreover, since the driving capability is high, the transistor 3200a is connected to the driving circuit, typically the gate signal By using this in a gate driver that generates a narrow frame, a display device with a narrow frame width (also called a narrow frame) can be provided. In addition, the transistor 3200a can be connected to a signal line of the display device. The source driver (especially the output terminal of the shift register of the source driver) By using it in a device (demultiplexer connected to the device), the number of wires connected to the display device can be reduced. Therefore, a display device with a high image quality can be provided.

[0341] Also, since the transistors 3200a are each transistors with a channel etch structure, The number of manufacturing steps is smaller than that of transistors using low-temperature polysilicon. The transistor 3200a uses a metal oxide layer in the channel region, so low-temperature polysilicon Unlike transistors using silicon, no laser crystallization process is required. Even in the case of a display device using a laminated substrate, it is possible to reduce manufacturing costs. Ultra Hi-Vision (4K resolution, 4K2K, 4K), Super Hi-Vision High resolution and large display such as "8K resolution", "8K4K", "8K" In the display device, a transistor with high field effect mobility such as the transistor 3200a is used. By using it in the drive circuit and display section, writing can be done in a short time, reducing display defects. This is possible and preferable.

[0342] The insulating layer 3211 and the insulating layer 3212 in contact with the metal oxide layer 3231 are made of oxide insulating material. It is preferable that the film is a film, and the film has a region containing oxygen in excess of the stoichiometric composition (excess oxygen region). In other words, the insulating layer 3211 and the insulating layer 3212 preferably have a The insulating layer 3211 and the insulating layer 3212 are insulating films that can release oxygen. To provide the excess oxygen region, for example, the insulating layer 3211 and the insulating layer 321 are heated in an oxygen atmosphere. 2, or the insulating layer 3211 and the insulating layer 3212 after film formation are heated in an oxygen atmosphere. Just process it.

[0343] The metal oxide layer 3231 can be made of an oxide semiconductor, which is a type of metal oxide. Cut.

[0344] When the metal oxide layer 3231 is an In-M-Zn oxide, the In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used for this purpose must satisfy the relation In>M. The atomic ratio of the metal elements in such a sputtering target is preferably In: M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4.1 , In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1 :8, In:M:Zn=6:1:6, In:M:Zn=5:2:5, etc.

[0345] In addition, when the metal oxide layer 3231 is formed of In-M-Zn oxide, sputtering As the target, it is preferable to use a target containing polycrystalline In-M-Zn oxide. By using a target containing polycrystalline In-M-Zn oxide, it is possible to obtain a crystalline It is easy to form the metal oxide layer 3231. The atomic ratio is the plus or minus of the atomic ratio of the metal elements contained in the sputtering target. For example, the sputtering target used for the metal oxide layer 3231 When the composition of the ZnO film is In:Ga:Zn=4:2:4.1 (atomic ratio), the metal oxide film The composition of the oxide layer 3231 is in the vicinity of In:Ga:Zn=4:2:3 [atomic ratio]. There is.

[0346] The metal oxide layer 3231 has an energy gap of 2 eV or more, preferably 2.5 e V or more. In this way, by using an oxide semiconductor with a wide energy gap, The off-current of the transistor can be reduced.

[0347] In addition, it is preferable that the metal oxide layer 3231 has a non-single crystal structure. For example, CAAC (C-Axis Aligned Crystalline), polycrystalline structure In non-single crystalline structures, the amorphous structure is the most defective. CAAC has the lowest defect level density.

[0348] The metal oxide layer 3231 is a metal oxide film having a low impurity concentration and a low defect level density. By using this, a transistor having excellent electrical characteristics can be manufactured. Here, the low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic The impurities in the metal oxide film are typically In this specification, the term "reducing water and hydrogen from a metal oxide film" is used. The process of removing or dehydrating a metal oxide film is sometimes called dehydration or dehydrogenation. The addition of oxygen to an oxide insulating film is sometimes referred to as oxygen addition. A state in which there is excess oxygen compared to the stoichiometric composition is sometimes referred to as a hyperoxygenated state.

[0349] High-purity intrinsic or substantially high-purity intrinsic metal oxide films have fewer carrier generation sources, making them Therefore, the carrier density can be reduced. The transistors that are formed have electrical characteristics in which the threshold voltage is negative (also known as normally-on). In addition, high-purity intrinsic or substantially high-purity intrinsic metal oxides are Since the defect level density of the semiconductor film is low, the trap level density may also be low. Highly intrinsic or substantially highly intrinsic metal oxide films have significantly lower off-state currents and The width of the panel is 1 x 106 Even in an element with a channel length L of 10 μm in μm, between the source electrode and the drain In the range where the voltage (drain voltage) between the electrodes is from 1 V to 10 V, the off-current is below the measurement limit of the semiconductor parameter analyzer, that is, 1×10 -13 A or less, such characteristics can be obtained obtained.

[0350] The insulating layer 3213 has either or both of hydrogen and nitrogen. Or, the insulating layer 3 213 has nitrogen and silicon. Also, the insulating layer 3213 has a function of blocking oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the insulating layer 3213, the diffusion of oxygen from the metal oxide layer 3231 to the outside, the diffusion of oxygen contained in the insulating layer 3212 to the outside, and the entry of hydrogen, water, etc. from the outside into the metal oxide layer 3231 can be prevented. prevented. prevented.

[0351] As the insulating layer 3213, for example, a nitride insulating film can be used. As the nitride insulating film There are silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride etc.

[0352] <Configuration Example 2 of OS Transistor> Next, as an example of the structure of the transistor, the transistor 3200b will be described using FIGS. 35(A )(B)(C). FIG. 35(A) is a top view of the transistor 3200b FIG. 35(B) corresponds to a cross-sectional view of the cut surface between the dashed line X1-X2 shown in FIG. 35(A), and FIG. 35(C) corresponds to the cross-sectional view of the cut surface between the dashed line Y1-YZ shown in FIG. 35(A). corresponding cross-sectional view, and FIG. 35(C) corresponds to the cross-sectional view of the cut surface between the dashed line Y1-Y2 shown in FIG. 35(A). corresponding cross-sectional view.

[0353] The transistor 3200b includes a metal oxide layer 3231, a conductive layer 3222a, and a conductive layer 3222. The transistor 3200 differs from the transistor 3200a in that the insulating layer 3212 has a stacked structure. do.

[0354] The insulating layer 3212 is formed on the metal oxide layer 3231, the conductive layer 3222a, and the conductive layer 3222b. The insulating layer 3212a is an insulating layer 3212b on the insulating layer 3212a. 12 has a function of supplying oxygen to the metal oxide layer 3231. That is, the insulating layer 321 The insulating layer 3212a is an insulating layer that can transmit oxygen. The insulating layer 3212a is formed by removing the metal when forming the insulating layer 3212b to be formed later. It also functions as a film for mitigating damage to the oxide layer 3231 .

[0355] The insulating layer 3212a has a thickness of 5 nm to 150 nm, preferably 5 nm to 500 nm. Silicon oxide, silicon oxynitride, etc. having a thickness of 0 nm or less can be used.

[0356] Furthermore, it is preferable that the insulating layer 3212a has a small amount of defects. Therefore, the spin density of the signal appearing at g=2.001, which is due to the dangling bond of silicon, Degrees are 3 x 10 17 spins / cm 3 This is because the insulating layer 321 If the defect density in 2a is high, oxygen will bond to the defects, and the insulating layer 3212a This reduces the oxygen permeability.

[0357] In the insulating layer 3212a, all the oxygen that has entered the insulating layer 3212a from the outside is Some oxygen does not move out of the insulating layer 3212a and remains in the insulating layer 3212a. As oxygen enters the insulating layer 3212a, the oxygen contained in the insulating layer 3212a The migration to the outside may also cause migration of oxygen in the insulating layer 3212a. When an oxide insulating layer that can transmit oxygen is formed as the layer 3212a, the insulating layer 32 The oxygen desorbed from the insulating layer 3212b provided on the insulating layer 3212a is absorbed through the insulating layer 3212a. The metal oxide layer 3231 can be moved by the metal oxide layer 3231.

[0358] The insulating layer 3212a is formed using an oxide insulating layer with a low density of states due to nitrogen oxides. The density of states due to the nitrogen oxide can be determined by the valence of the metal oxide film. The energy of the upper edge of the electron band (Ev_os) and the energy of the lower edge of the conduction band of the metal oxide film ( The oxide insulating layer may be formed between the SiO_2 and the SiO_2 layers. Silicon oxynitride film with low nitrogen oxide emission or aluminum oxynitride film with low nitrogen oxide emission A film such as a cellulose nitrate film can be used.

[0359] The silicon oxynitride film, which emits a small amount of nitrogen oxide, was analyzed by thermal desorption spectroscopy (TDS). In Thermal Desorption Spectroscopy (TDS), nitrogen This is a film that releases more ammonia than oxide, and typically releases ammonia is 1×10 18 / cm 3 5x10 or more 19 / cm 3 The following is a list of ammonia release rates. The amount is set so that the surface temperature of the film is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower. This is the amount released by heat treatment.

[0360] Nitrogen oxides (NO x, x is greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2), typically NO2 or NO forms a level in the insulating layer 3212a, etc. The level is The nitrogen oxide is located within the energy gap of the insulating layer 32. When the ions diffuse to the interface between the insulating layer 3212a and the metal oxide layer 3231, the level increases toward the insulating layer 3212a. As a result, the trapped electrons may be trapped in the insulating layer 321. 2a and the metal oxide layer 3231, and remain near the interface, This causes a shift in the last direction.

[0361] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxide contained in a is converted into the ammonia contained in the insulating layer 3212b by the heat treatment. As a result, the nitrogen oxides contained in the insulating layer 3212a are reduced. At the interface between the layer 3212a and the metal oxide layer 3231, electrons are less likely to be trapped.

[0362] By using the oxide insulating layer as the insulating layer 3212a, the threshold voltage of the transistor can be reduced. It is possible to reduce the voltage shift and reduce the fluctuation of the electrical characteristics of the transistor. can be done.

[0363] The oxide insulating layer has a nitrogen concentration of 6×10 as measured by SIMS. 20 atoms / cm 3 The following is the result.

[0364] PECV using silane and nitrous oxide at a substrate temperature of 220°C or higher and 350°C or lower By forming the oxide insulating layer using Method D, a dense and hard film can be formed. It can be achieved.

[0365] The insulating layer 3212b is an oxide insulating layer containing more oxygen than the oxygen required for the stoichiometric composition. When the oxide insulating layer is heated, some of the oxygen is released. The oxide insulating layer releases oxygen at a rate of 1.0 × 10 19 atoms / cm 3 That's all, Preferably 3.0 x 10 20 atoms / cm 3 The above oxygen The amount of release is determined by the temperature of the heat treatment in TDS, which is between 50°C and 650°C, or between 50°C and 650°C. The amount of oxygen released is the total amount in the range of 550°C or less. This is the total amount converted into elementary atoms.

[0366] The insulating layer 3212b has a thickness of 30 nm or more and 500 nm or less, preferably 50 nm or more. Silicon oxide, silicon oxynitride, etc., up to 400 nm or less can be used.

[0367] Furthermore, it is preferable that the insulating layer 3212b has a small amount of defects. Therefore, the spin density of the signal appearing at g=2.001, which is due to the dangling bond of silicon, Degrees are 1.5 x 10 18 spins / cm 3 Less than, or even 1×10 18 spins / cm 3 It is preferable that the insulating layer 3212b has a thickness of 1000 nm or less compared to the insulating layer 3212a. Since it is far from the metal oxide layer 3231, the defect density is at most lower than that of the insulating layer 3212a. good.

[0368] In addition, since the insulating layer 3212 can be made of an insulating layer of the same material, the insulating layer 321 In some cases, the interface between the insulating layer 3212a and the insulating layer 3212b may not be clearly visible. In the diagram, the interface between insulating layer 3212a and insulating layer 3212b is shown by a dashed line. In this embodiment, the two-layer structure of insulating layer 3212a and insulating layer 3212b is However, the present invention is not limited to this, and for example, the insulating layer 3212a may have a single layer structure or a three layer structure. The above laminated structure may also be used.

[0369] In the transistor 3200b, the metal oxide layer 3231 is a metal oxide film on the insulating layer 3211. a metal oxide layer 3231_1 and a metal oxide layer 3231_2 on the metal oxide layer 3231_1; The metal oxide layer 3231_1 and the metal oxide layer 3231_2 have the same structure. For example, the metal oxide layer 3231_1 and the metal oxide layer 3231_2 have the same elements. It is preferable that the metal oxide layer 3231 independently contains the elements described above.

[0370] In addition, the metal oxide layer 3231_1 and the metal oxide layer 3231_2 are each independently It is preferable to have a region in which the atomic ratio of n is greater than the atomic ratio of M. As an example, The ratio of the number of In, M, and Zn atoms in the metal oxide layer 3231_1 and the metal oxide layer 3231_2 is It is preferable that In:M:Zn=approximately 4:2:3. Here, "approximately" means that when In is 4, , M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less. Or, metal oxide The ratio of the number of In, M, and Zn atoms in the metal oxide layer 3231_1 and the metal oxide layer 3231_2 is It is preferable that the ratio of In:M:Zn is approximately 5:1:6. By making the metal oxide layer 3231 and the metal oxide layer 3231 have approximately the same composition, the same sputtering temperature can be used. Since the target can be used for the formation, the manufacturing cost can be reduced. When using a sputtering target, metal oxide is continuously produced in the same chamber under vacuum. Since the metal oxide layer 3231_1 and the metal oxide layer 3231_2 can be formed, The incorporation of impurities into the interface between the metal layer 3231_1 and the metal oxide layer 3231_2 is suppressed. It is possible.

[0371] Here, the metal oxide layer 3231_1 is a region having lower crystallinity than the metal oxide layer 3231_2. The metal oxide layer 3231_1 and the metal oxide layer 3231_2 may have a region. The crystallinity of the film can be determined by, for example, X-ray diffraction (XRD) or by using a transmission electron microscope (TEM). This can be analyzed using a Electron Microscope.

[0372] The low-crystallinity region of the metal oxide layer 3231_1 serves as a diffusion path for excess oxygen, and the metal oxide Excess oxygen is diffused into the metal oxide layer 3231_2, which has higher crystallinity than the layer 3231_1. In this way, a laminated structure of metal oxide layers with different crystal structures can be obtained. By using the thin region as a diffusion path for excess oxygen, it is possible to provide a highly reliable transistor. can.

[0373] In addition, the metal oxide layer 3231_2 has a region with higher crystallinity than the metal oxide layer 3231_1. By having such a structure, impurities that may be mixed into the metal oxide layer 3231 can be suppressed. In particular, by increasing the crystallinity of the metal oxide layer 3231_2, the conductive layer 3222a and the conductive layer The surface of the metal oxide layer 3231 can be prevented from being damaged when processing the metal oxide layer 3231. The surface of the metal oxide layer 3231_2 is covered with the conductive layer 3222a and the conductive layer 3222b. However, the metal oxide is exposed to the etchant or etching gas during the processing of b. When the metal oxide layer 3231_2 has a region with high crystallinity, the metal oxide layer 323 1_1, the metal oxide layer 3231_2 has excellent etching resistance. It functions as an etching stopper.

[0374] The metal oxide layer 3231_1 has a region with lower crystallinity than the metal oxide layer 3231_2. By having this, the carrier density may be increased.

[0375] In addition, when the carrier density of the metal oxide layer 3231_1 increases, the metal oxide layer 3231_ The Fermi level may be relatively high relative to the conduction band of 1. This results in the formation of a metal oxide. The lower end of the conduction band of the metal oxide layer 3231_1 becomes lower, and the lower end of the conduction band of the metal oxide layer 3231_1 becomes lower. , the energy of the trap level that may be formed in the gate insulating film (here, the insulating layer 3211) The energy difference may become large. This reduces the amount of charge trapped in the transistor, thereby reducing the fluctuation in the threshold voltage of the transistor. In addition, when the carrier density of the metal oxide layer 3231_1 increases, the metal oxide The field effect mobility of the material layer 3231 can be increased.

[0376] In the transistor 3200b, the metal oxide layer 3231 has a two-layer stacked structure. However, the present invention is not limited to this, and a configuration in which three or more layers are stacked may also be used.

[0377] The conductive layer 3222a included in the transistor 3200b includes a conductive layer 3222a_1 and a conductive layer Conductive layer 3222a_2 on conductive layer 3222a_1 and conductive layer 3222 on conductive layer 3222a_2 The conductive layer 3222b of the transistor 3200b has a conductive layer 3222b_1, a conductive layer 3222b_2 on the conductive layer 3222b_1, and a conductive layer 322 and a conductive layer 3222b_3 on the substrate 2b_2.

[0378] For example, the conductive layer 3222a_1, the conductive layer 3222b_1, the conductive layer 3222a_3, and the conductive layer 3222b_4 are The conductive layer 3222b_3 may be made of titanium, tungsten, tantalum, molybdenum, indium, or the like. It is preferable that the material contains one or more selected from aluminum, gallium, tin, and zinc. The conductive layer 3222a_2 and the conductive layer 3222b_2 may be made of copper, aluminum, or the like. It is preferable that the material contains one or more selected from the group consisting of aluminum, zinc, and silver.

[0379] More specifically, the conductive layer 3222a_1, the conductive layer 3222b_1, the conductive layer 3222a_3 and the conductive layer 3222b_3 is made of In—Sn oxide or In—Zn oxide, and the conductive layer Copper can be used for 3222a_2 and the conductive layer 3222b_2.

[0380] In addition, the end of the conductive layer 3222a_1 is located outside the end of the conductive layer 3222a_2. The conductive layer 3222a_3 covers the upper surface and side surfaces of the conductive layer 3222a_2, The conductive layer 3222b_1 has a region in contact with the conductive layer 3222a_1. , the conductive layer 3222b_3 has a region located outside the end of the conductive layer 3222b_2. The area covers the upper and side surfaces of the conductive layer 3222b_2 and is in contact with the conductive layer 3222b_1. It has a region.

[0381] With the above configuration, the wiring resistance of the conductive layer 3222a and the conductive layer 3222b can be reduced, and the diffusion of copper into the metal oxide layer 3231 can be suppressed, which is preferable.

[0382] <Configuration Example 3 of OS Transistor> Next, as an example of the structure of the transistor, the transistor 3200c will be described using FIGS. 36(A )(B)(C). FIG. 36(A) is a top view of the transistor 3200c. FIG. 36(B) corresponds to a cross-sectional view of the cut surface between the dashed-dotted line X1-X2 shown in FIG. 36(A), and FIG. 36(C) corresponds to a cross-sectional view of the cut surface between the dashed-dotted line Y1-Y2 shown in FIG. 36(A).

[0383] The transistor 3200c shown in FIGS. 36(A)(B)(C) includes a conductive layer 3221 on the insulating layer 3224, an insulating layer 3211 on the conductive layer 3221, a metal oxide layer 3 231 on the insulating layer 3211, an insulating layer 3212 on the metal oxide layer 3231, a conductive layer 32 23 on the insulating layer 3212, and an insulating layer 321 3 on the insulating layer 3211, the metal oxide layer 3231, and the conductive layer 3223. The metal oxide layer 3231 has a channel region 3231i overlapping with the conductive layer 3223, a source region 3231s contacting the insulating layer 3213, and a drain region 3231d contacting the insulating layer 3213.

[0384] Also, the insulating layer 3213 contains nitrogen or hydrogen. When the insulating layer 3213 contacts the source region 32 31s and the drain region 3231d, nitrogen or hydrogen in the insulating layer 3213 is added to the source region 3231s and the drain region 3231d. By adding nitrogen or hydrogen to the source region 3 231s and the drain region 3231d, carriers The density increases.

[0385] The transistor 3200c has an insulating layer 3215 over the insulating layer 3213 and an insulating layer 321 3 and an opening 3236a formed in the insulating layer 3215, The conductive layer 3222a is electrically connected to the insulating layer 3213 and the insulating layer 3215. The conductive layer 32 is electrically connected to the drain region 3231d through the opening 3236b. 22b and

[0386] An oxide insulating film can be used as the insulating layer 3215. For example, a stacked film of an oxide insulating film and a nitride insulating film can be used for the insulating layer 321. Examples of the material 5 include silicon oxide, silicon oxynitride, silicon nitride oxide, and aluminum oxide. Examples of the material that can be used include aluminum, hafnium oxide, gallium oxide, and Ga-Zn oxide. The insulating layer 3215 is a film that functions as a barrier film against hydrogen, water, etc. from the outside. is preferred.

[0387] The insulating layer 3211 functions as a first gate insulating film, and the insulating layer 3212 functions as a second gate insulating film. The insulating layer 3213 and the insulating layer 3215 function as a gate insulating film. It functions as a velum.

[0388] The insulating layer 3212 also has an excess oxygen region. By this, excess oxygen is supplied into the channel region 3231i of the metal oxide layer 3231. Therefore, oxygen vacancies that may be formed in the channel region 3231i can be replaced by excess oxygen. Since the resistance can be more effectively compensated, a highly reliable semiconductor device can be provided.

[0389] In order to supply excess oxygen into the metal oxide layer 3231, Excess oxygen may be supplied to the insulating layer 3211 formed below the insulating layer 32. The excess oxygen contained in the metal oxide layer 3231 is used to form the source region 3231s and The source region 3231s and the drain region 3231d may also be supplied with the When excess oxygen is supplied to the source region 3231s and the drain region 3231d, 31d resistance may be high.

[0390] On the other hand, the insulating layer 3212 formed above the metal oxide layer 3231 has a structure containing excess oxygen. By forming the film, it is possible to selectively supply excess oxygen only to the channel region 3231i. Alternatively, the channel region 3231i, the source region 3231s, and the drain region After supplying excess oxygen to the source region 3231s and the drain region 3231d, By selectively increasing the carrier density of the source region 3231s and the drain region 31d, This can prevent the resistance of the region 3231d from increasing.

[0391] The metal oxide layer 3231 has a source region 3231s and a drain region 3231d. Each of the elements preferably has an element that forms an oxygen vacancy or an element that bonds to an oxygen vacancy. Representative elements that form oxygen vacancies or elements that bond with oxygen vacancies include: Examples of the element include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and rare gases. Representative examples of rare gas elements include helium, neon, argon, krypton, and The elements that form the oxygen vacancies are present in the insulating layer 3213 singly or in combination. If included, the insulating layer 3213 may be used to separate the source region 3231s and the drain region 3231. d and / or by doping the source region 3231s and the drain region It is added in the ion region 3231d.

[0392] When an impurity element is added to an oxide semiconductor film, a metal element in the oxide semiconductor film bonds with oxygen. Alternatively, an impurity element is added to the oxide semiconductor film. When this happens, oxygen that has been bonded to a metal element in the oxide semiconductor film bonds to an impurity element, and the metal element is then released. As a result, oxygen is released from the oxide semiconductor film, and oxygen vacancies are formed. The rear density increases and the conductivity becomes higher.

[0393] The conductive layer 3221 functions as a first gate electrode, and the conductive layer 3223 functions as a second gate electrode. The conductive layer 3222a functions as a gate electrode of the second gate electrode, and the conductive layer 3222b functions as a source electrode. The conductive layer 3222b functions as a drain electrode.

[0394] As shown in FIG. 36(C), an opening 323 is formed in the insulating layer 3211 and the insulating layer 3212. 7 is provided. The conductive layer 3221 is connected to the conductive layer 3223 through the opening 3237. Therefore, the same potential is applied to the conductive layer 3221 and the conductive layer 3223. Note that the conductive layer 3221 and the conductive layer 3223 are formed in different layers without providing the opening 3237. Alternatively, the opening 3237 may not be provided, and the conductive layer 3221 may be formed as a light-shielding film. For example, the conductive layer 3221 may be formed of a light-shielding material. This can suppress light from below irradiating the channel region 3231i.

[0395] As shown in FIGS. 36(B) and 36(C), the metal oxide layer 3231 serves as the first gate electrode. and a conductive layer 3223 that functions as a second gate electrode. They are positioned opposite each other and are sandwiched between two conductive films that function as gate electrodes.

[0396] The transistor 3200c is also connected to the transistors 3200a and 3200b. Similarly, it has an S-channel structure. By having such a structure, transistor 3 The metal oxide layer 3231 included in 200c is covered with a conductive layer 3232 which functions as a first gate electrode. The gate electrode 221 and the conductive layer 3223 functioning as the second gate electrode are electrically connected by the electric field. Can be surrounded.

[0397] Since the transistor 3200c has an S-channel structure, the conductive layer 3221 The conductive layer 3223 effectively applies an electric field to induce a channel in the metal oxide layer 32. 31, the current driving capability of the transistor 3200c is improved, and It is possible to obtain a high on-current characteristic. Therefore, it is possible to miniaturize the transistor 3200c. 0c shows a metal oxide layer 3231 surrounded by a conductive layer 3221 and a conductive layer 3223. The embedded structure can increase the mechanical strength of the transistor 3200c.

[0398] The transistor 3200c is located at a position where the conductive layer 3223 is located relative to the metal oxide layer 3231. or the method of forming the conductive layer 3223, TGSA (Top Gate Self Al It may also be called a gate type FET.

[0399] In the transistor 3200c as well, the metal oxide layers 3231 may be stacked in two or more layers.

[0400] Also, in the transistor 3200c, the insulating layer 3212 is provided only at the portion where it overlaps with the conductive layer 3223. However, it is not limited to this, and the insulating layer 3212 may be configured to cover the metal oxide layer 32 31. Also, a configuration in which the conductive layer 3221 is not provided is also possible.

[0401] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and the like. It is possible.

[0402] <Configuration of CAC-OS> Hereinafter, the configuration of the CAC-OS that can be used for the transistor disclosed in one aspect of the present invention will be described. will be described.

[0403] The CAC-OS is, for example, a composition in which the elements constituting the oxide semiconductor are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof. Hereinafter, in the oxide semiconductor, one or more metal elements are unevenly distributed, and the region having the metal element is in a mixed state of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof, and is also referred to as a mosaic state or a patch state. Note that the oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition to these, aluminum, gallium, yttrium is also mentioned.

[0404] The oxide semiconductor preferably contains at least indium. Particularly preferably, it contains indium and zinc. In addition to these, aluminum, gallium, yttrium Thorium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Contains one or more selected from tantalum, tungsten, magnesium, etc. It may be included.

[0405] For example, CAC-OS made of In-Ga-Zn oxide (In-Ga-Zn oxide among CAC-OS) a-Zn oxide may be specifically referred to as CAC-IGZO) is an indium oxide ( Below, InO X1 (where X1 is a real number greater than 0), or indium zinc oxide (Hereinafter, In X2 Zn Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0) ) and gallium oxide (GaO X3 (X3 is a real number greater than 0), or gallium zinc oxide (hereinafter referred to as Ga X4 Zn Y4 O Z4 (X4, Y4, and Z4 are 0 The material is separated into mosaics, and the mosaic is Crystalline InO X1 , or In X2 Zn Y2 O Z2 is uniformly distributed in the film (hereafter referred to as , also called cloud-like).

[0406] In other words, CAC-OS is X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 A composite oxide semiconductor having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is is greater than the atomic ratio of In to the element M in the second region. Compared to region 2, the concentration of In is higher.

[0407] IGZO is a common name and refers to a compound of In, Ga, Zn, and O. A typical example is InGaO3(ZnO) m1 (m1 is a natural number), or In ( 1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of such crystalline compounds include:

[0408] The crystalline compounds may have a single crystal structure, a polycrystalline structure, or a C-Axis Al Aligned Crystalline, or C-Axis Aligned and It has an AB-plane Anchored Crystalline structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned in the ab plane. In this case, the crystal structure is non-oriented and connected.

[0409] On the other hand, CAC-OS refers to the material structure of an oxide semiconductor. In a material composition containing Ga, Zn, and O, some nanoparticles with Ga as the main component were observed. The region where the In nanoparticles are observed is shown in part. This refers to a structure in which the crystals are randomly dispersed in a mosaic pattern. Structure is a secondary factor.

[0410] It should be noted that the CAC-OS does not include a laminated structure of two or more films with different compositions. For example, a structure consisting of two layers, one containing In as the main component and the other containing Ga as the main component, is not included. do not have.

[0411] In addition, GaO X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 but In some cases, a clear boundary between the main component region and the main component region cannot be observed.

[0412] Instead of gallium, aluminum, yttrium, copper, vanadium, and beryllium can be used. , boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum , lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium If one or more selected elements such as sodium are included, CAC-OS will The nanoparticle-like regions are observed in the region where the metal element is the main component, and the region where In is the main component. The nanoparticle-like regions are randomly dispersed in a mosaic pattern. say.

[0413] CAC-OS is formed by sputtering without intentionally heating the substrate. In addition, when the CAC-OS is formed by a sputtering method, the deposition gas is The gas to be used is preferably selected from an inert gas (typically argon), oxygen gas, and nitrogen gas. One or more of these may be used. The lower the flow rate ratio of the oxygen gas, the better. For example, the flow rate ratio of the oxygen gas is preferably 0% or more and less than 30%. It is preferable that the content is 0% or more and 10% or less.

[0414] CAC-OS is a type of X-ray diffraction (XRD) measurement method. When measured using the θ / 2θ scan by the out-of-plane method, In other words, from the X-ray diffraction, the measurement region It can be seen that no orientation in the ab plane direction or the c axis direction is observed.

[0415] In addition, CAC-OS irradiates electron beams with a probe diameter of 1 nm (also called nanobeam electron beams). In the electron diffraction pattern obtained by this, a ring-shaped region with high brightness and the phosphorus Therefore, the electron diffraction pattern indicates that the CAC-OS crystal structure is The crystal structure is nc (nano-cr) which has no orientation in the plane direction and cross-sectional direction. It can be seen that it has a crystalline structure.

[0416] For example, in the case of CAC-OS, an In-Ga-Zn oxide, energy dispersive X-ray Energy Dispersive X-ray spectroscopy (EDX) EDX mapping obtained using a copy of the GaO X3 The region where is the principal component and , In X2 Zn Y2 O Z2 , or InO X1 The area where the main component is unevenly distributed and mixed. It can be confirmed that it has the structure shown in the figure.

[0417] CAC-OS has a structure different from that of IGZO compounds, in which metal elements are uniformly distributed. CAC-OS has different properties from ZO compounds. X3 The main ingredients are In a certain area, X2 Zn Y2 O Z2, or InO X1 The region where is the principal component and The phases are separated into two, and the regions containing each element as the main component are arranged in a mosaic pattern.

[0418] Here, In X2 Zn Y2 O Z2 , or InO X1 The region where is the main component is GaO X3 This region has higher conductivity than the region where In is the main component. X2 Zn Y 2O Z2 , or InO X1 The carriers flow through the region where the main component is oxidized. Therefore, the conductivity of In is expressed as a semiconductor. X2 Zn Y2 O Z2 , or InO X The cloud-like distribution of the region where 1 is the main component in the oxide semiconductor results in a high field effect. Mobility (μ) can be achieved.

[0419] On the other hand, GaO X3 The region where the main components are In X2 Zn Y2 O Z2 , or InO X This region has higher insulating properties than the region where GaO is the main component. X3 etc. The distribution of the main component in the oxide semiconductor suppresses leakage current and provides good switching. Switching operation can be realized.

[0420] Therefore, when CAC-OS is used in a semiconductor device, GaO X3 Insulation caused by In X2 Zn Y2 O Z2 , or InO X1The conductivity caused by the This results in a high on-state current (I on ) and high field-effect mobility (μ) can be achieved. can.

[0421] Furthermore, semiconductor devices using CAC-OS are highly reliable. It is ideal for a variety of semiconductor devices, including displays.

[0422] At least a part of this embodiment may be implemented in combination with other embodiments. can be done. [Explanation of symbols]

[0423] A1 area C1 Arrow C3 Capacitor element C4 Capacitor element C5 Capacitor element C6 Capacitor element C8 Capacitor element C9 Capacitor element G1 wiring G2 wiring G3 wiring R1 Arrow S1 wiring S2 wiring S3 wiring SW1 switch SW2 switch Tr1 transistor Tr5 transistor Tr6 transistor Tr8 transistor Tr16 transistor Tr17 transistor Tr26 transistor Tr27 transistor Tr32 transistor Tr38 transistor Tr40 transistor Tr41 transistor Tr42 transistor Tr43 transistor VCOM1 wiring VCOM2 wiring X0 adjacent area 10 pixels 20 Demultiplexer 21 Shift Register 22 Shift Register 23 Shift Register 24 Shift Register 25 Decoder 31 registers 32 registers 33 Inverter 34 Drivers 60 display units 61 pixel array 62 Gate Driver 63 Gate Driver 64 Source driver IC 64a Source Driver IC 64d Source Driver IC 70 Touch sensor unit 71 Sensor Array 72 Touch sensor IC 80 Application Processors 90 Tablet-type information terminal 91 Display area 100 display device 100A display device 100B display device 112 LCD 113 Electrode 117 Insulating Layer 121 Insulating layer 131 Colored layer 132 Light blocking layer 133a Alignment film 133b Alignment film 135 Functional Materials 141 Adhesive layer 142 Adhesive layer 170 Light-emitting element 170b Light-emitting element 170g light emitting element 170r Light-emitting element 170w light emitting element 176 Touch Sensor 180 Liquid crystal element 191 Conductive layer 192 EL layer 193 Conductive Layer 194 Insulating Layer 201 Transistor 202 Capacitor element 203 Transistor 204 Connection 205 Transistor 206 Transistor 207 Connection 211 Insulating layer 212 Insulating layer 213 Insulating Layer 214 Insulating layer 216 Insulating Layer 217 Conductive Layer 218 Conductive Layer 220 Insulating layer 221a Conductive layer 221b Conductive layer 222a conductive layer 222b Conductive layer 223 Conductive Layer 224 Insulating Layer 225 Conductive Layer 231 Semiconductor layer 234 Peripheral Circuit Area 235 Display area 236 pixel circuit 237 light 238 light 242 Connection Layer 243 Connectors 252 Connection 271 Transistor 272 Capacitor 273 scan lines 274 Signal Line 275 Common potential line 281 Transistor 282 Capacitor 283 Transistor 284 scan lines 285 Signal Line 286 Power line 291 Transparent area 292 Shading area 311 Electrode 351 Circuit Board 361 Circuit Board 365 Wiring 370 Touch Sensor 372 FPC 374 Conductive Layer 375 Insulation Layer 376a conductive layer 376b Conductive layer 377 Conductive Layer 378 Insulating Layer 402 Drive circuit 403 Detection Circuit 404 capacity 475 Detector element 801 Control circuit 802 driver 803 Frame Memory 804 frame memory 806 Gate driver signal generation circuit 807 Gate driver signal generation circuit 810 Timing Controller 901 Incident light 902 Reflected light 903 Light 910 Electronic equipment 920 Electronic equipment 930 Electronic equipment 940 Electronic equipment 3200a transistor 3200b transistor 3200c transistor 3211 Insulation layer 3212 Insulation layer 3212a Insulating layer 3212b Insulating layer 3213 Insulation layer 3215 Insulation layer 3221 Conductive layer 3222a conductive layer 3222a_1 Conductive layer 3222a_2 Conductive layer 3222a_3 Conductive layer 3222b Conductive layer 3222b_1 Conductive layer 3222b_2 Conductive layer 3222b_3 Conductive layer 3223 Conductive layer 3224 Insulation layer 3231 Metal oxide layer 3231_1 Metal oxide layer 3231_2 Metal oxide layer 3231d Drain region 3231i Channel Area 3231s Source Area 3235 Opening 3236a opening 3236b opening 3237 Opening 5200B Information Processing Device 5210 Arithmetic unit 5220 I / O device 5230 Display section 5240 input section 5250 Detection unit 5290 Communications Department

Claims

[Claim 1] a gate driver; the gate driver includes first to Nth shift registers; a Kth (K is an integer between 1 and N) shift register that generates a signal to drive the Kth pixel group; The gate driver receives first to M-th (M is an integer of 1 or more) clock signals and first to L-th (L is an integer of 1 or more) sampling signals, the gate driver has a function of supplying a clock signal and a start pulse to each of the first to Nth shift registers by using the first to Mth clock signals and the first to Lth sampling signals; The number L of the input sampling signals is equal to or less than N / M+1.

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