Indication device

Abstract

To provide a thin display device. [Solution] A display device includes a first pixel, a second pixel, a first substrate, and a second substrate. The first pixel is provided on the first substrate and has a first pixel electrode, a first conductive film, and a first transistor. The first pixel electrode is electrically connected to the first transistor, and the first conductive film has a region that functions as a common electrode. The second pixel is provided on the first substrate and has a second pixel electrode, a second conductive film, and a second transistor. The second pixel electrode is electrically connected to the second transistor, and the second conductive film has a region that functions as a common electrode. The first conductive film and the second pixel electrode are provided on the same plane, and a first insulating film is provided on the first conductive film and the second pixel electrode, and the first pixel electrode and the second conductive film are provided on the first insulating film.

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a display device. Or, another embodiment of the present invention relates to a touch panel. Another embodiment of the present invention relates to a semiconductor device. One aspect of the present invention relates to an output device. Another aspect of the present invention relates to an input device. The present invention relates to a display device with an integrated touch sensor.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to a product, a method, or a manufacturing method. , manufacture, or composition of matter. Therefore, the technical field of one embodiment of the present invention disclosed in this specification and the like is specifically a semiconductor device. , display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices, input / output devices Examples include devices, driving methods thereof, and manufacturing methods thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one embodiment of a semiconductor device. power devices, input / output devices, electro-optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.) BACKGROUND ART Some electronic devices and devices include semiconductor devices. [Background technology]

[0004] In recent years, display devices (or display modules) equipped with touch sensors as position input means have become popular. A display device (or a display module) equipped with a touch sensor is It may be called a touch panel or touch screen (hereinafter, we will simply refer to this as a (It is sometimes called a "touch panel"). It does not have a display device and has a touch sensor. In some cases, such components are called touch panels, while others are made up of only Alternatively, the display device equipped with a touch sensor is called a display device with a touch sensor, a touch sensor, or a touch screen. It is also called a sensor-integrated display device, a touch panel with a display device, or a display module. Alternatively, a display device equipped with a touch sensor may be simply called a display device. In addition, if a touch sensor is built into the display device, Cell-type touch sensor, in-cell touch panel (or display with in-cell touch sensor) device), on-cell touch sensor, or on-cell touch panel (or on-cell touch panel) It is sometimes called a touch sensor display device. A display device with a built-in sensor is sometimes simply called a display device. For example, the electrodes used in the liquid crystal element can also be used as the electrodes for the touch sensor. On the other hand, the on-cell type touch sensor uses, for example, the upper side (front side) of the opposing substrate. The surface on which the display element is not provided has electrodes for the touch sensor. For example, mobile information terminals equipped with these touch panels include smartphones, Tablet devices and the like.

[0005] One type of display device is a liquid crystal display device that includes a liquid crystal element. The transistors are arranged in a trix shape and used as switching elements connected to each pixel electrode. Active matrix liquid crystal display devices using such devices have been attracting attention.

[0006] For example, a metal oxide channel-type switching element is used as a switching element connected to each pixel electrode. Active matrix liquid crystal display devices using transistors as a composition region are known. (Patent Documents 1 and 2).

[0007] Furthermore, Patent Documents 3 to 7 describe touch panels to which liquid crystal elements are applied. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 [Patent Document 3] Japanese Patent Application Laid-Open No. 2011-197685 [Patent Document 4] Japanese Patent Application Laid-Open No. 2014-44537 [Patent Document 5] Japanese Patent Application Laid-Open No. 2014-178847 [Patent Document 6] U.S. Patent No. 7,920,129 [Patent Document 7] US Patent Application Publication No. 2013 / 0328812 Summary of the Invention [Problem to be solved by the invention]

[0009] The display panel (display device or display module) is equipped with a Therefore, there is a demand for touch panels that allow input by touching the screen with a finger or a stylus. are.

[0010] In addition, there is a demand for thinner and lighter electronic devices that use touch panels. Therefore, there is a demand for thinner and lighter touch panels.

[0011] For example, a touch panel is a display panel that is visible on the side (display surface side), that is, on the side where a person's finger or pen touches it. A touch sensor may be provided on the touch side.

[0012] For example, as a configuration of a touch panel (or display module), A substrate having a touch sensor can be attached. The display panel and touch sensor are separate components in the display module (or display module). It is configured so that the display panel and the touch sensor are bonded together. However, in this configuration, a touch sensor board is required in addition to the display panel board. Since a substrate for the touch panel is required, the thickness of the touch panel (or display module) can be reduced. There were problems such as the lack of a suitable design and the large number of parts required.

[0013] One aspect of the present invention is a thin touch panel (or a display device with a touch sensor) One of the objectives is to provide a touch panel (or touch panel) with a simplified configuration. One of the objectives is to provide a display device with a sensor, etc. One of the objectives is to provide a touch panel (or a display device with a touch sensor) that is easy to use. Alternatively, a touch panel with a small number of parts (or a display device with a touch sensor) can be used. One of the objectives is to provide a lightweight touch panel (or touch sensor attached table) One of the objectives is to provide a display device.

[0014] Another object is to provide a novel input / output device. Another object of the present invention is to provide a novel display device. The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment of the present invention to solve all of these problems. The problem is self-evident from the description, drawings, claims, etc. It is possible to extract other issues from documents, drawings, claims, etc. [Means for solving the problem]

[0015] One aspect of the present invention is a liquid crystal display device comprising a first pixel, a second pixel, a first substrate, and a second substrate. The display device includes a first substrate on which a first pixel and a second pixel are provided, and a first The pixel includes a first pixel electrode, a first conductive film, and a first transistor. The electrode is electrically connected to the first transistor, and the first conductive film functions as a common electrode. The second pixel has a second pixel electrode, a second conductive film, and a second transistor. the second pixel electrode is electrically connected to the second transistor, and the second conductive film is The first conductive film and the second pixel electrode are provided on the same surface. The first insulating film is provided on the first conductive film and the second pixel electrode, and the first pixel electrode and the second conductive film is a display device provided on the first insulating film.

[0016] In the display device described above, the first transistor and the second transistor have a channel It is preferable that the semiconductor layer in which the insulating film is formed contains polycrystalline silicon.

[0017] In the display device, the first transistor and the second transistor are The semiconductor layer in which the channel is formed preferably contains an oxide semiconductor.

[0018] The first transistor and the second transistor each include a gate electrode and a gate electrode provided on the gate electrode. a first oxide film provided on the gate insulating film at a position overlapping the gate electrode; a source electrode and a drain electrode electrically connected to the first oxide semiconductor film; a second insulating film provided on the first oxide semiconductor film, the source electrode, and the drain electrode; a second oxide semiconductor film provided over the second insulating film at a position overlapping with the first oxide semiconductor film; and a second oxide semiconductor film, and the first insulating film is a first insulating film and a second oxide semiconductor film. a first conductive film provided on the second oxide semiconductor film so as to be sandwiched between the insulating film and the first conductive film; The display device according to one embodiment of the present invention further includes the second oxide semiconductor film and the second pixel electrode. is.

[0019] In the display device, the first oxide semiconductor film and the second oxide semiconductor film contain In and , Zn, and oxygen, and the first oxide semiconductor film and the second oxide semiconductor film contain A It is preferred that the alloy contains I, Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf. stomach.

[0020] In the display device described above, the second insulating film contains oxygen, and the first insulating film contains hydrogen. That's fine.

[0021] The first conductive film functions as a first electrode of the touch sensor, and the second conductive film The above-described display device having a function as the second electrode of the touch sensor is also one embodiment of the present invention. is.

[0022] Also, an electronic device having the above-mentioned display device, a switch, a speaker, or a housing is This is one aspect of the present invention. [Effects of the Invention]

[0023] According to one aspect of the present invention, a thin display device (or a display device with a touch sensor) Alternatively, a display device (or a display device with a touch sensor) with a simplified configuration can be provided. Or, it is possible to provide a display device (or touch sensor attached table) that is easy to incorporate into electronic devices. Or, it is possible to provide a display device with a small number of parts (or a display device with a touch sensor). It is possible to provide a lightweight display device (or a display device with a touch sensor). ) etc. can be provided.

[0024] Alternatively, a novel input device can be provided. Alternatively, a novel input / output device can be provided. It should be noted that the description of these effects may not necessarily include other effects. However, one embodiment of the present invention does not necessarily have all of these effects. It is not necessary. Effects other than these will be obvious from the description, drawings, claims, etc. It is clear that other effects cannot be extracted from the description, drawings, claims, etc. It is possible to issue it. [Brief explanation of the drawings]

[0025] [Figure 1] 1A and 1B are a block diagram and a timing chart of a touch sensor according to an embodiment. [Figure 2] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Figure 3] 1A to 1C are diagrams illustrating operations of a touch sensor and a pixel according to an embodiment. [Figure 4] 1A and 1B are cross-sectional schematic diagrams illustrating a touch panel system according to an embodiment. [Figure 5] 1A and 1B are cross-sectional schematic diagrams illustrating a touch panel system according to an embodiment. [Figure 6] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 7] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 8] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 9] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 10] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 11] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 12] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 13] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 14] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 15] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 16] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 17] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 18] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 19] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 20] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 21] FIG. 2 is a top view showing an arrangement of electrodes and the like of a touch sensor according to an embodiment. [Figure 22] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 23] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 24] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 25] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 26] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 27] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 28] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 29] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 30] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 31] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 32] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 33] 10 shows calculation results relating to the pixel structure of a display device according to an embodiment. [Figure 34] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 35] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 36] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 37] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 38] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 39] FIG. 2 is a top view showing an example of a pixel layout according to the embodiment. [Figure 40] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 41] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 42] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 43] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 44] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 45] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 46] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 47] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 48] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 49] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 50] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 51] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 52] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 53] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 54] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 55] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 56] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 57] FIG. 1 is a top view illustrating an example of a display device according to an embodiment. [Figure 58] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 59] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 60] 1 is a cross-sectional view showing an example of a display device according to an embodiment. [Figure 61]1A and 1B are diagrams illustrating structural analysis of a CAAC-OS and a single-crystal oxide semiconductor by XRD, and a selected-area electron diffraction pattern of a CAAC-OS. [Figure 62] Cross-sectional TEM image of CAAC-OS, as well as planar TEM image and its image analysis. [Figure 63] Electron diffraction pattern of nc-OS and cross-sectional TEM image of nc-OS. [Figure 64] Cross-sectional TEM image of a-like OS. [Figure 65] FIG. 1 shows the change in the crystalline part of an In-Ga-Zn oxide due to electron irradiation. [Figure 66] 1A to 1C illustrate a method for forming a CAAC-OS film. [Figure 67] A diagram explaining the InMZnO4 crystal. [Figure 68] 1A to 1C illustrate a method for forming a CAAC-OS film. [Figure 69] 1A and 1B are cross-sectional views illustrating one embodiment of a transistor. [Figure 70] 1A and 1B are cross-sectional views illustrating one embodiment of a transistor. [Figure 71] 1A and 1B are cross-sectional views illustrating one embodiment of a transistor. [Figure 72] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 73] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 74] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 75] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 76] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 77] 1A and 1B are cross-sectional views illustrating one embodiment of a transistor. [Figure 78] FIG. 1 is a diagram illustrating a band structure. [Figure 79] FIG. 1 is a block diagram of a touch panel module according to an embodiment. [Figure 80] 1 shows a configuration example of a touch panel module according to an embodiment. [Figure 81] 1A to 1C are diagrams illustrating a display module according to an embodiment. [Figure 82] 1A to 1C illustrate electronic devices according to an embodiment. [Figure 83] 1A to 1C illustrate electronic devices according to an embodiment. [Figure 84] FIG. 10 is a diagram illustrating the measurement results of the XRD spectrum of a sample. [Figure 85] TEM image of the sample and a diagram explaining the electron beam diffraction pattern. [Figure 86] FIG. 1 is a diagram illustrating EDX mapping of a sample. DETAILED DESCRIPTION OF THE INVENTION

[0026] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention is based on the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0027] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and repeated explanations thereof will be omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be assigned.

[0028] In each figure described in this specification, the size, layer thickness, or area of ​​each component is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0029] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The number is not a numerical limitation.

[0030] The words "film" and "layer" can be used interchangeably. For example, the term "conductive layer" may be changed to the term "conductive film." In some cases, the term "insulating layer" can be changed to the term "insulating film." .

[0031] In addition, even when the term "semiconductor" is used in this specification, for example, a material having electrical conductivity is also included. If the dielectric constant is low enough, it may have the properties of an "insulator." The boundary between "insulator" and "insulator" is vague and it may not be possible to strictly distinguish them. The term "semiconductor" in the above may be replaced with "insulator." The term "insulator" in the specification etc. may be replaced with "semiconductor" in some cases.

[0032] In addition, even when the term "semiconductor" is used in this specification, for example, a material having electrical conductivity is also included. If the electrical conductivity is sufficiently high, it may have the properties of a "conductor." The boundary between "conductor" and "electroconductor" is vague and it may not be possible to strictly distinguish them. The term "semiconductor" in the above may be replaced with "conductor." The term "conductor" in the specification etc. may be replaced with "semiconductor" in some cases.

[0033] The functions of the "source" and "drain" of a transistor are different for transistors of different polarities. When using a current source, or when the direction of the current changes during circuit operation, For this reason, in this specification, the terms "source" and "drain" are used interchangeably. It can be used as such.

[0034] (Embodiment 1) In this embodiment, a driving method and a driving circuit for a touch sensor or a touch panel according to one embodiment of the present invention will be described. Examples of the semiconductor device according to one embodiment of the present invention will be described with reference to the drawings. do.

[0035] [Example of sensor detection method] FIG. 1(A) is a block diagram showing the configuration of a mutual capacitance type touch sensor. ) shows a pulse voltage output circuit 601 and a current detection circuit 602. As an example, the electrode 621 to which the pulse voltage is applied is connected to six wires X1-X6. The electrode 622 for detecting the change in the voltage is shown as six wires Y1-Y6. The number of electrodes is not limited to this. Alternatively, a capacitance formed by arranging the electrodes 621 and 622 close to each other may be formed. The electrode 621 and the electrode 622 are interchangeable in function. Alternatively, the pulse voltage output circuit 601 and the current detection circuit 602 may be replaced with each other. That's fine.

[0036] As an example, the pulse voltage output circuit 601 applies a pulse voltage to the wirings X1 to X6 in order. When a pulse voltage is applied to the X1-X6 wiring, a capacitance of 60 A change occurs in the electric field between the electrodes 621 and 622 that form the electrode 621. The pressure causes a current to flow through the capacitor 603. At this time, whether a finger, pen, or the like is present nearby The electric field generated between these electrodes changes depending on the type of electrode, and is shielded by the touch of a finger or pen. That is, the capacitance value of the capacitor 603 changes depending on the touch of a finger or a pen. As a result, the magnitude of the current flowing through the capacitor 603 changes depending on the pulse voltage. The capacitance value changes when the object is touched with a pen or other object. Proximity or contact can be detected.

[0037] The current detection circuit 602 detects the current in the wiring Y1-Y6 due to a change in the capacitance value of the capacitor 603. This is a circuit for detecting changes in flow. The wiring of Y1-Y6 detects the proximity of the object to be detected, or If there is no contact, the detected current value does not change, but if the object to be detected approaches or touches the sensor, When the capacitance value decreases, a change in the current value is detected. The total flow rate may be detected. In this case, the detection may be performed using an integrating circuit or the like. Alternatively, the peak value of the current may be detected. In this case, the current is converted into a voltage and the voltage value is The peak value of may be detected.

[0038] Next, FIG. 1(B) shows the input / output of the mutual capacitance type touch sensor shown in FIG. 1(A). The timing chart of the waveform is shown in Figure 1(B). In Figure 1(B), when no object is detected (non-touch), ) and when detecting an object to be detected (touch). For the wire Y6, the waveform is shown as a voltage value corresponding to the detected current value. The display panel is also performing a display operation. It is desirable that the timing of the touch sensor detection operation be synchronized. Note that FIG. 1B shows an example in which the display operation is not synchronized.

[0039] A pulse voltage is applied to the wires X1-X6 in order, and the The waveform in the Y6 wiring changes. When there is no proximity or contact of the object to be detected, X1-X6 The waveforms of Y1-Y6 change uniformly according to the change in the voltage of the wiring. Or, at the contact point, the current value decreases, and the corresponding voltage waveform also changes. do.

[0040] In this way, by detecting the change in capacitance, the proximity or contact of the object to be detected can be detected. In addition, when a detected object such as a finger or pen comes into contact with the touch sensor or touch panel, Even if the device is not connected to the network and is in close proximity, a signal may still be detected.

[0041] In Figure 1(B), when pulse voltages are applied to the wires X1-X6 in order, However, one embodiment of the present invention is not limited to this. A pulse voltage may be applied. For example, a pulse voltage is first applied to the wires X1 to X3. Next, a pulse voltage is applied to the wires X2 to X4. Then, a pulse voltage is applied to the wires X3 to X5. In this way, pulse voltages may be applied to multiple wirings at the same time. The sensitivity of the sensor can be increased by processing the read signal.

[0042] The pulse voltage output circuit 601 and the current detection circuit 602 may be implemented as one IC. The IC is preferably formed in a semiconductor device. It is preferable that the terminal is mounted on a substrate inside the housing of an electronic device. When using a touch panel, the parasitic capacitance increases at the bent part, increasing the effect of noise. Therefore, it is recommended to use an IC that uses a driving method that is less susceptible to noise. For example, it is preferable to apply a driving method that increases the signal-to-noise ratio (S / N ratio). It is preferable to use an IC that has a

[0043] In the case of an in-cell touch sensor, a circuit for driving the display unit is provided. For example, the circuits include a gate line driving circuit and a source line driving circuit. The pulse voltage output circuit 601 may also be formed in the IC. At least one of the current detection circuit 602 and the gate line driver circuit or the source line driver circuit At least one of the source line driving circuit and the source line driving circuit may be formed in one IC. The circuit is often formed inside the IC because of the high drive frequency. 02 is often formed inside the IC because an operational amplifier may be required. Therefore, the source line driving circuit and the current detection circuit 602 are formed in one IC. In this case, the gate line driving circuit and the pulse voltage output circuit 601 may Alternatively, the source line driver circuit and the current detector may be formed on the same substrate. The pulse voltage output circuit 602 and the pulse voltage output circuit 601 may be formed in one IC. .

[0044] In addition, in FIG. 1A, a package in which only a capacitor 603 is provided at the intersection of the wiring as a touch sensor is used. The configuration of the active matrix touch sensor is shown. A touch sensor of an active matrix type may also be used.

[0045] Although the driving method in the case of the mutual capacitance method has been described in FIG. 1, The embodiment is not limited to this. For example, a self-capacitance method may be used. In this case, The pulse voltage output circuit 601 also has a function of detecting a current. The circuit 602 also has a function of outputting a pulse voltage. The mutual capacitance method and the self-capacitance method may be switched for operation.

[0046] [Configuration example of an in-cell touch panel] Here, a substrate on which a display element, a transistor, etc. are provided (hereinafter also referred to as an element substrate) In the following, an example in which at least one of a pair of electrodes constituting a touch sensor is arranged will be described. Reveal.

[0047] Below, we will discuss a touch panel (so-called Here, a configuration example of a display element (in-cell type) provided in a pixel will be described. However, one embodiment of the present invention is not limited to this and various Such a display element can be applied.

[0048] FIG. 2 shows a part of a pixel circuit provided in the display unit of the touch panel illustrated in this configuration example. FIG. 1 is an equivalent circuit diagram.

[0049] Each pixel has at least a transistor 63 and a liquid crystal element 64. In addition, a storage capacitor may be provided. A wiring 62 is electrically connected to either the source or the drain.

[0050] The common electrodes of the liquid crystal elements 64 of the pixels adjacent in the Y direction are electrically connected, The electrodes 71_1 and 71_2 shown in FIG. The area where the liquid crystal element 64 is formed (the area where the electric field generated by the pixel electrode and the common electrode is the liquid crystal) The electrodes 71_1 and 71_2 function as common electrodes in the region where the crystal orientation is controlled. The blocks including a plurality of pixels sharing a common electrode are designated by block 65_1, Let's call it 65_2.

[0051] In addition, the liquids of a plurality of pixels adjacent in the X direction across the blocks 65_1 and 65_2 are The common electrodes of the crystal elements 64 are electrically connected to form one block. The electrodes 72_1 to 72_4 are provided extending in the X direction, and are arranged in the region where the liquid crystal element 64 is formed. The electrodes 72_1 to 72_4 share the common electrode. The blocks including the plurality of pixels are designated as blocks 67_1 to 67_4, respectively. Although only a part of the pixel circuit is shown in FIG. 2, in reality these blocks are arranged in the X and It is repeated in the Y direction.

[0052] With this configuration, the pair of electrodes constituting the touch sensor and the pixel circuit In other words, in FIG. 2, the electrodes 71_1 and 71_2 can also serve as common electrodes for the liquid crystal elements. 1_2 serves as both a common electrode for the liquid crystal element 64 and one electrode of the touch sensor. The electrodes 72_1 to 72_4 are connected to the common electrode of the liquid crystal element 64 and the other electrode of the touch sensor. This allows for a simplified touch panel configuration.

[0053] The common electrode of the liquid crystal element 64 of one pixel constitutes a touch sensor. In other words, the display section can function as either one of the electrodes. The pixel that performs this function is a pixel whose common electrode also serves as one of the electrodes of the touch sensor (also called the first pixel). ) and a pixel (also called a second pixel) whose common electrode also serves as the other electrode of the touch sensor. Therefore, in the display section of the touch panel shown in this configuration example, the first pixel and the second pixel The top surface shapes of one electrode and the other electrode that constitute the touch sensor are determined according to the pixel arrangement. It can be any shape.

[0054] FIG. 3A shows a plurality of electrodes 72 extending in the X direction and a plurality of electrodes 71 extending in the Y direction. 1 is an equivalent circuit diagram showing a connection configuration of the touch sensor. Each of the electrodes 71 extending in the Y direction has an input voltage (or selected voltage) or common potential (or ground potential or reference potential) A ground potential (or a ground potential) can be input to each of the electrodes 72 extending in the X direction. or a reference potential) or electrically connect the electrode 72 to a detection circuit. It is possible to switch between the electrodes 71 and 72. 1 may be connected to the detection circuit.

[0055] The operation of the above-mentioned touch panel will be described below with reference to FIGS.

[0056] As an example, one frame period is divided into a writing period and a detection period. The write period is a period in which image data is written to the pixel, and the electrode 72 (gate line, or On the other hand, the detection period is the period during which the touch sensor senses the pixel. In this period, the electrodes 71 extending in the Y direction are selected in order and an input voltage is input.

[0057] 3B is an equivalent circuit diagram during the writing period. A common potential is input to both the extending electrode 72 and the electrode 71 extending in the Y direction.

[0058] FIG. 3C is an equivalent circuit diagram at a certain point in the detection period. Of the electrodes 72 extending in the direction of the arrow, selected ones are in electrical communication with the detection circuit, and the others are in common. An electric potential is input to each of the electrodes 71 extending in the Y direction. .

[0059] In this way, the image writing period and the period for sensing by the touch sensor can be separated. For example, it is preferable to perform sensing during the blanking period of the display. This prevents the reduction in sensitivity of the touch sensor caused by noise when writing to pixels. It is possible.

[0060] Here, an example is shown in which one frame period is divided into a writing period and a detection period. However, one aspect of the present invention is not limited to this. For example, The period (also referred to as the period) may be divided into a writing period and a detection period.

[0061] Although the example in which pulse voltages are applied to the electrodes 71 in sequence has been shown, in one embodiment of the present invention, For example, a pulse voltage may be applied to a plurality of electrodes 71 at the same time. For example, first, a pulse voltage is applied to the first to third electrodes 71. A pulse voltage is applied to the fourth electrode 71. Then, a pulse voltage is applied to the third to fifth electrodes 71. In this way, pulse voltages may be applied to a plurality of electrodes 71 at the same time. By processing the read signal, the sensitivity of the sensor can be increased.

[0062] Although the driving method in the case of the mutual capacitance method has been described in FIG. 3, The embodiment is not limited to this. For example, a self-capacitance method may be used. In this case, The circuit that outputs the pulse voltage also has the function of detecting the current. Also, depending on the situation, the mutual capacitance method can be used. The operation may be switched between the capacitance type and the self-capacitance type.

[0063] [Touch panel method] Below, several methods applicable to the touch panel according to one embodiment of the present invention will be described. do.

[0064] In this specification, the touch panel has a function of displaying (outputting) images on a display surface. Touch sensors detect when a finger, stylus, or other object touches or approaches the display surface. Therefore, the touch panel is one type of input / output device. Therefore, a touch panel can also be said to be a display device with a built-in touch sensor.

[0065] In this specification, the substrate of the touch panel may be, for example, an FPC (Flexible Printed Circuit). Printed Circuit) or TCP (Tape Carrier Pack Connectors such as COG (Chip On Gate) are attached to the board. The touch panel module is a device that has an IC (integrated circuit) mounted using the touch panel glass method. It may be called a touch panel, display module, or simply a touch panel.

[0066] A capacitive touch sensor that can be applied to one aspect of the present invention includes a pair of conductive films. A capacitance is formed between the pair of conductive films. When the object to be detected touches or is close to the pair of conductive films, The capacitance between the pair of conductive films changes when they come into contact with each other, and this is used for detection. It is possible.

[0067] The capacitance type includes the surface capacitance type and the projected capacitance type. There are two types of capacitance methods, self-capacitance and mutual capacitance, which differ mainly in their driving methods. The mutual capacitance method is preferable because it allows simultaneous multi-point detection. One aspect is not limited to this.

[0068] Further, as a display element included in the touch panel of one embodiment of the present invention, a liquid crystal element (vertical electric field type) or in-plane switching type), MEMS (Micro Electro Mechanical Optical elements using Al Systems, organic EL (Electro Luminescence) scene elements and light-emitting diodes (LEDs) Various display elements such as light-emitting elements such as those shown in FIG.

[0069] Here, the display device may use a liquid crystal element to which a horizontal electric field method is applied as a display element. It is preferable that a transparent conductive film is used for the pixel electrode and the common electrode. On the other hand, the pixel electrode or the common electrode In the case where a reflective electrode is used, the display device can be used as a reflective display device. Both the pixel electrode and the common electrode may be reflective electrodes. A reflective electrode may be provided in addition to the common electrode to form a reflective display device. In addition, in a reflective display device, by providing an area through which light from a backlight can pass, Therefore, a semi-transmissive display device may be used. For example, a part of the pixel electrode or the common electrode may be The pixel electrode or the common electrode may be a transmissive electrode and another part may be a reflective electrode. Even if a reflective electrode is used, the display may be a transmissive type depending on the operating mode of the liquid crystal. It may also be used as a display device.

[0070] A display device according to one embodiment of the present invention includes a pair of electrodes that form a touch sensor on one of a pair of substrates. By having at least one of the conductive film and the wiring, the display panel and the touch panel can be connected. Therefore, the thickness of the display device is reduced and it is lightweight. A display device can be realized.

[0071] 4A to 4C are cross-sectional views illustrating modes of a display device 10 according to one embodiment of the present invention. FIG.

[0072] The display device 10 includes a substrate 11, a substrate 12, an FPC 13, a conductive film 14, a pixel 40a, a pixel 4 0b, liquid crystal elements 20a and 20b, a colored film 31, and the like.

[0073] The pixel 40a includes a liquid crystal element 20a, and the pixel 40b includes a liquid crystal element 20b. The liquid crystal display panel 20a is composed of a common electrode 21a, a pixel electrode 22a, and a liquid crystal 23. The liquid crystal element 20b is composed of a pixel electrode 21b, a common electrode 22b, and a liquid crystal 23. In FIG. 4(A), FFS (Fringe Field Switch) liquid crystal elements 20a and 20b are used. 1 shows an example in which a liquid crystal element to which a switching mode is applied is used.

[0074] The common electrode 21a and the pixel electrode 21b are provided on the same surface. The electrode 21a and the pixel electrode 21b are formed at the same time. The pixel electrode 21b is formed by etching the same film. In other words, the common electrode 21a and the pixel electrode 21b are formed from the same conductive film. Alternatively, the common electrode 21a and the pixel electrode 21b have the same material. An insulating film 24 is provided on the pixel electrode 22a and the pixel electrode 21b. The pixel electrode 22b is provided on the same surface, specifically on the insulating film 24. The pixel electrode 22a and the common electrode 22b are formed at the same time. The common electrode 22b is formed by etching the same film. In other words, the pixel electrode 22a and the common electrode 22b are formed from the same conductive film. Alternatively, the pixel electrode 22a and the common electrode 22b are made of the same material. For example, the upper surface of the common electrode 22a may have a comb-like shape or a slit-like opening. The upper surface shape (also referred to as a planar shape) is provided with at least one.

[0075] The touch sensor has a common electrode 21a of the pixel 40a and a common electrode 21b of the pixel 40b. The capacitance formed between the electrode 22b and the object to be detected can be utilized. By adopting such a configuration, the common electrodes (21a, 22b) of the liquid crystal element can be used as touch sensors. Therefore, the process can be simplified. This allows for improved yield and reduced manufacturing costs. The common electrode 21a and the common electrode 22b are connected to the FPC 1 attached to the substrate 11 side via the conductive film 14. 3. Alternatively, the common electrode 21a or the common electrode 22b may be electrically connected to the common electrode 21a. At least one of them is connected to a circuit that has the function of outputting a pulse voltage. The pixel electrodes 22a and 21b are electrically connected to transistors (not shown). The transistor is connected to a driving circuit (gate line driving circuit or source line drive circuit) or FPC 13.

[0076] In FIG. 4A, the pixel electrode 22a and the common electrode 21a (or the pixel electrode 21b) and the common electrode 22b) have an overlapping area. This area functions as a capacitance element. In other words, this area functions as a storage capacitor for maintaining the potential of the pixel electrode. However, one aspect of the present invention is not limited to this. For example, the pixel electrode 22a and the common electrode 21a (or the pixel electrode 21b and the common electrode 22b) ) are arranged so as not to overlap each other in the area that contributes to the display (so-called opening). In addition, in the area that contributes to display (in the so-called opening), the electrode The positions of the ends of the upper and lower portions may be aligned.

[0077] For example, as shown in FIG. 4B, when the display device 10 has a pixel electrode 22a and a common electrode 2 In addition to the common electrode 21a and the pixel electrode 21b, the common electrode 21a and the pixel electrode 21b also have a comb-like upper surface shape or a groove-like upper surface shape. The upper surface of the substrate may have one or more slot-shaped openings. The liquid crystal elements 20a and 20b are driven by an IPS (In-Plane Switching Indicator) method. By adopting such a configuration, the size of the storage capacitance can be reduced. This can be done.

[0078] The pixel electrode of pixel 40a is provided on the same plane as the common electrode of pixel 40a, and The pixel electrode of pixel 40b may be provided on the same plane as the common electrode of pixel 40b. In the display device 10 shown in FIG. 1, the pixel electrode 21a2 is provided on the same plane as the common electrode 21a1. Alternatively, the pixel electrode 21a2 and the common electrode 21a1 are formed at the same time. Alternatively, the pixel electrode 21a2 and the common electrode 21a1 may be formed by etching the same film. Alternatively, the pixel electrode 21a2 and the common electrode 21a1 are formed in the same The pixel electrode 21a2 and the common electrode 21a1 are formed of a conductive film. Similarly, the pixel electrode 22b2 is on the same plane as the common electrode 22b1. Specifically, it is provided on the insulating film 24. Alternatively, the pixel electrode 22b2 and the common electrode 22 b1 are formed at the same time. Alternatively, the pixel electrode 22b2 and the common electrode 22b1 are , are formed by etching the same film. The pixel electrode 22b1 and the common electrode 22b2 are formed of the same conductive film. The common electrode 21a1, the pixel electrode 22b1, and the common electrode 22b2 are made of the same material. The electrode 21a2, the common electrode 22b1 and the pixel electrode 22b2 are formed to have a comb-like upper surface. In FIG. 4C, the common electrode 21a1 and the common The touch sensor can function by utilizing the capacitance formed between the electrodes 22b1. The driving method of the liquid crystal elements 20a and 20b in C) is the IPS mode.

[0079] In addition, in FIG. 4(B) and FIG. 4(C), the common electrode and the pixel electrode are, for example, Alternatively, non-transparent electrodes may be used. For example, gate electrodes or source and drain electrodes may be used. The same conductive material as that used in the IPS electrode may be used. In this mode, an electric field is hardly applied to the liquid crystal 23 above the electrode. It is difficult to control, and therefore it is difficult for the area to contribute to the display. Therefore, even in a transmissive display device, it is not necessary to transmit light from the light source. The electrodes and pixel electrodes are made of aluminum, molybdenum, titanium, tungsten, copper, silver, etc. These electrodes may be formed in a mesh shape or in a nanometer shape. The common electrode may be formed in a wire shape. The common electrode also functions as an electrode for the touch sensor. Therefore, it is desirable that the resistance value is as low as possible. It is desirable because it has a lower resistance than transparent electrodes such as indium tin oxide (ITO). stomach.

[0080] In addition, in FIGS. 4(A), 4(B) and 4(C), the common electrode and the pixel electrode A transparent conductive film such as ITO may be used as the electrode. A conductive film with a lower resistance may be provided as an auxiliary wiring under the transparent conductive film. For example, it is used in the gate electrode, source electrode, drain electrode, etc. The same conductive materials as those used in the present invention may be used. Specifically, aluminum, molybdenum, It may also be made of titanium, tungsten, copper, silver, or the like.

[0081] When providing auxiliary wiring on the transparent conductive film, a half-tone mask (gray-tone mask) is used. The transparent conductive film and the auxiliary wiring are formed using a single mask (also called a phase difference mask or retardation mask). In this case, a transparent conductive film must be provided under the auxiliary wiring. However, one embodiment of the present invention is not limited thereto. The auxiliary wiring and the conductive film may be formed in separate steps using separate masks.

[0082] In addition, in FIG. 4(A), FIG. 4(B) and FIG. 4(C), the common electrode has a resistance value of For example, the common electrode and the auxiliary wiring may be connected to a low auxiliary wiring. For example, the auxiliary wiring and the gate electrode are connected through an opening in the insulating film. The electrodes (or gate signal lines) may be formed at the same time. The electrodes (or gate signal lines) may be formed by etching the same film. Alternatively, the auxiliary wiring and the gate electrode (or gate signal line) are formed from the same conductive film. Alternatively, the auxiliary wiring and the gate electrode (or gate signal line) may be made of the same material. Similarly, for example, the auxiliary wiring and the source / drain electrode (or The auxiliary wiring and the source / drain electrode ( The gate electrode (or source signal line) may be formed by etching the same film. Alternatively, the auxiliary wiring and the source / drain electrodes (or source signal lines) are made of the same conductive film. Alternatively, the auxiliary wiring and the source / drain electrode (or the source signal line) may be formed. ) may have the same material.

[0083] In this way, in FIGS. 4(A), 4(B), and 4(C), the pixel 40a and the pixel 4 0b each have a common electrode, and the common electrode is connected to the electrode of the touch sensor. In addition, the common electrode of the pixel 40a and the common electrode of the pixel 40b can be Therefore, the common electrode of pixel 40a and the common electrode of pixel 40b are not provided on the same plane. Even if the common electrode of the pixel 40b overlaps with the common electrode of the pixel 40, a short circuit does not occur. The common electrode of pixel 40a and the common electrode of pixel 40b can be provided so as to intersect with each other. One of the common electrodes of the pixel 40a and the pixel 40b is connected to the electrode shown in FIG. 2. The electrode 71_1 is provided to extend in the Y direction, and the other electrode is provided to extend in the Y direction. Therefore, it is not necessary to provide a complicated cross-sectional structure. Therefore, it is easy to manufacture and the manufacturing yield can be increased. Since the amount of waste does not increase, it can be manufactured at low cost.

[0084] For example, a floating conductive film may be disposed on the upper side of the substrate 12. Examples of this case are shown in Figures 5(A), 5(B), and 5(C). Similarly, the conductive film 28b is provided so as to overlap the common electrode of the pixel 40a. b) and the common electrode of the capacitor element. In addition, the electric field distribution becomes appropriate, which improves the sensitivity of the touch sensor. In addition, when the object to be detected is in proximity to or in contact with the substrate 12, the object to be detected is electrostatically charged. In such a case, the conductive film 28a and the In addition, by providing the conductive film 28b, the influence of static electricity can be reduced.

[0085] 6 to 21 are top views of a display device or a touch panel according to an embodiment of the present invention. Therefore, the parts other than the touch sensor are largely omitted. .

[0086] 6A corresponds to FIG. 4A. In the configuration shown in FIG. 6A, the touch sensor The pixel 40a has a sensor electrode 51a and a sensor electrode 52b. The sensor electrode 51a is The pixel electrode 21b of the pixel 40b has the function of a common electrode. The sensor electrode 52b also functions as a common electrode in the pixel 40b. The sensor electrode 52b is formed from the same conductive film as the pixel electrode 22a of the pixel 40a. The pixel electrode 22a has one or more slit-shaped openings 26 in the pixel 40b. , the pixel 40a has one or more slit-shaped openings 26.

[0087] The sensor electrode 51a is provided to extend in one direction (for example, the X direction), and the sensor electrode 52b is provided to extend in a direction (for example, the Y direction) intersecting the one direction. An insulating film (not shown) is sandwiched between the sensor electrode 51a and the sensor electrode 52b. By doing so, an opening in an insulating film or the like is formed in the region where one sensor electrode intersects with the other sensor electrode. There is no need to provide a new conductive film (also called a bridge electrode) that is electrically connected via the As a result, a high-definition display device can be realized. The pixel electrode 22a has an opening 25a formed in the insulating film below the pixel electrode 22a. The pixel 40a is electrically connected to a transistor (not shown) included in the pixel 40a via the The pixel electrode 21b is connected to the pixel electrode 21b through an opening 25b provided in the insulating film below the pixel electrode 21b. The pixel electrode 21 is electrically connected to a transistor (not shown) included in the pixel electrode 21. If no insulating film is provided between the gate electrode 25b and the transistor, the opening 25b is unnecessary. do.

[0088] In FIG. 6A, the sensor electrode 51a is provided extending in the X direction. Although the electrode 52b is provided extending in the Y direction, one embodiment of the present invention is not limited to this. By rotating the sensor electrode 51 by 90 degrees, the sensor electrode 51a is provided extending in the Y direction. The pole 52b may be provided so as to extend in the X direction. In other drawings, the direction in which the sensor electrodes extend may also be rotated by 90 degrees.

[0089] In FIG. 6A, the sensor electrode 52b extending in the Y direction is connected to multiple electrodes adjacent to each other in the Y direction. In other words, the electrode extending in the X direction The sensor electrodes 51a are arranged in the X direction on both sides of the pixel 40b. As shown in FIG. 6B, the X direction The sensor electrode 51a extending in the X direction is connected to the common electrode of the plurality of pixels 40a arranged adjacent to each other in the X direction. In other words, the sensor electrode 52b extending in the Y direction may be configured to function as a pixel electrode. The pixel 40a is sandwiched between the pixel 40b and the common electrode 40c. The pixel 40b is arranged in the Y direction. It may also be possible to use the following.

[0090] In FIG. 6B, the sensor electrode 51a is provided extending in the X direction. Although the electrode 52b is provided extending in the Y direction, one embodiment of the present invention is not limited to this. By rotating the sensor electrode 51 by 90 degrees, the sensor electrode 51a is provided extending in the Y direction. The pole 52b may be provided so as to extend in the X direction. In other drawings, the direction in which the sensor electrodes extend may also be rotated by 90 degrees.

[0091] The opening 26 may be included inside the electrode in the top view, and the opening 26 may be located inside the electrode. In FIG. 6A, the pixel electrode 22a and the sensor electrode 52b One or more openings 26 are included inside each electrode. The pixel electrode 22a and the sensor electrode 52b have one or more openings 26, which are shown in the top view. The pixel electrode 22a and the sensor electrode 22b in FIG. 52b can be called a comb-tooth shape.

[0092] The slit-shaped openings and comb-shaped electrodes are elongated in the vertical direction. One embodiment of the present invention is not limited to this. The shape may be elongated in the horizontal direction. To improve the angular characteristics, slit-shaped openings or comb-shaped electrodes are used, and wide V-shaped (or It may also be bent into a shape like a boomerang.

[0093] In the overlapping area (intersection area) of the sensor electrode 51a and the sensor electrode 52b, This parasitic capacitance reduces the sensor reading signal. Therefore, the sensor electrode 51a and the sensor In the area where the electrodes 52a and 52b overlap (intersect), the width of one of the electrodes may be narrowed. For example, an example in which the width of the sensor electrode 52b is reduced is shown in FIG. 7(A). FIG. 7B shows an example in which the width of the sensor electrode 51a is reduced.

[0094] The electrode layout shown in FIG. 6(A) and the electrode layout shown in FIG. 6(B) An example of such an electrode layout is shown in FIG. In the pixel 40a, the pixel electrode 22a and the sensor electrode 52 in the pixel 40b b has one or more slit-shaped openings 26.

[0095] In FIG. 6A, the sensor electrodes 51a are connected to the pixels in the same row. One aspect of the present invention is not limited to this. For example, the pixel may be connected to a pixel in a different row depending on the location. By connecting pixels in different rows, noise, for example, can be averaged. , to display an image with higher display quality, or to realize a sensor with higher sensitivity. As an example of the layout of the sensor electrodes, for example, the layout shown in Figure 6(A) can be used. In this case, the electrode layout may be as shown in FIG. 9(A). In the previous example, the sensor electrodes 52b were connected to pixels in the same column. For example, the pixel may be connected to a different column depending on the location. Alternatively, the electrode layout may be as shown in FIG. 9(B).

[0096] In addition, in FIG. 6A, the sensor electrode 51a and the pixel electrode 21b are connected to the pixel 40a and the pixel 40b. Although the configuration in which the opening 26 is not provided in each of the sensor electrodes is shown, the present invention is not limited to this. The upper surface of the pixel electrode 21b is formed in a comb-like shape or has one or more slit-shaped openings. 6, the sensor electrode 52b and the pixel electrode 52c may have a top surface shape that is The electrode 22a has a comb-tooth shape, and the sensor electrode 51a and the pixel electrode 21b also have a comb-tooth shape. A top view of a display device is shown in FIG. 10. Note that FIG. 10(A) corresponds to FIG. 6(A). FIG. 10(B) corresponds to FIG. 6(B). Note that FIG. 10 corresponds to FIG. 4(B). are.

[0097] The sensor electrodes and pixel electrodes formed using the same conductive film are electrically connected to each other. For example, an opening is provided in the sensor electrode, and the inside of the opening is 11A, the pixel electrode 51a has an opening 5. The pixel electrode 21b is provided inside the sensor electrode 51a. 11A, the sensor electrode 51a is located in a lower layer than the sensor electrode 2a. 11(B), the sensor electrode 51a alone has an opening 56 which is larger than the opening 25a. In this way, by providing an opening in the sensor electrode, the area of ​​the sensor electrode As a result, the wiring resistance of the sensor electrode can be reduced. This allows the sensitivity of the sensor to be increased.

[0098] In addition, FIG. 11 shows an example in which a part of FIG. 6(A) is changed, but in the case of FIG. 6(B), In this case, the same change can be made. An example of this case is shown in FIG.

[0099] In addition, in the cases where the sensor electrodes are provided for each row or column in FIGS. 6 to 11, However, one embodiment of the present invention is not limited to this. For example, in FIG. 11(A), the sensor electrodes may be provided every two rows or every two An example in which the sensor electrodes are divided into columns is shown in FIG. 13. Similarly, in FIG. 12, FIG. 14 shows an example in which the sensor electrodes are divided into two rows or two columns.

[0100] In addition, when the sensor electrodes are divided into two rows or two columns, at the intersection of the electrodes, The arrangement of the common electrode and pixel electrode may be changed depending on the location. The case of FIG. 14 is shown in FIG.

[0101] In addition, in FIG. 10(A), when the sensor electrodes are divided into two rows or two columns, An example is shown in Figure 17. Similarly, in Figure 10(B), sensor electrodes are arranged every two rows or every two columns. An example of the case where the two are separated is shown in FIG.

[0102] In addition, if the sensor electrode is formed from a separate wiring (for example, the same conductive film as the gate signal line), wiring, wiring formed by the same conductive film as the source signal line, etc. Alternatively, one or both of the sensor electrodes may be provided in an island shape. The sensor electrodes are connected to each other by separate wiring (for example, formed by the same conductive film as the gate signal line). or wiring formed from the same conductive film as the source signal line) 19A, the sensor electrode 51a may be connected to the common terminal of the pixel 40a. Wiring 5 is provided in an island shape for each pixel, with a size that functions as an electrode, and extends in the X direction. 19(B) shows an example in which the sensor electrode 3 is electrically connected to a plurality of sensor electrodes 51a. The sensor electrode 52b is provided in an island shape for each pixel, with a size that functions as a common electrode for the pixel 40b. The wiring 54 extending in the Y direction is electrically connected to the plurality of sensor electrodes 52b. An example in which one sensor electrode provided in an island shape is not a common electrode for one pixel, but is a common electrode for multiple pixels. It may also be provided so as to function as a basic common electrode.

[0103] For example, when the wiring 53 is provided in parallel with the source signal line, It is desirable that the wiring 53 is formed of the same conductive film as the signal line. When the gate signal line is provided in parallel with the gate signal line, the gate signal line may be formed of the same conductive film. By doing so, the wiring 53 can be connected to the source signal line or the gate signal line. This is preferable because the wiring can be provided without crossing. The same is true in the case of

[0104] 20(A) and 20(B), the sensor electrodes 51a and the sensor electrodes 52b are arranged in an island shape for each pixel. and the sensor electrodes 51a and 52b are electrically connected to the wirings 53 and 54, respectively. In FIG. 20(A) and FIG. 20(B), the arrangement of the pixel 40a and the pixel 40b is In FIG. 20A, the pixel 40a and the pixel 40b are the same pixel in the Y direction. On the other hand, in FIG. 20(B), the pixel 40a and the pixel 40 b are provided so that the same pixels are adjacent to each other in the X direction.

[0105] In the configuration shown in FIG. 21(A), the touch sensor is made up of a sensor electrode 51a1 and a sensor electrode 52b. 21(A) corresponds to FIG. 4(C). The sensor electrode 51a1 is The pixel 40a has a function of a common electrode and is the same as the pixel electrode 21a2 of the pixel 40a. The sensor electrode 52b1 is formed of a conductive film. The pixel electrode 22b2 of the pixel 40b is formed from the same conductive film as the pixel electrode 22b2 of the pixel 40b. The sensor electrode 51a1 and the pixel electrode 21a2 have a comb-like upper surface shape in the pixel 40a. The sensor electrode 52b1 and the pixel electrode 22b2 are arranged in a comb-like shape in the pixel 40b. The upper surface has a shape of

[0106] The sensor electrode 51a1 is provided to extend in one direction (for example, the X direction), and the sensor electrode 52 b1 is provided extending in a direction intersecting the one direction (for example, the Y direction). An insulating film (not shown) is sandwiched between the electrode 51a1 and the sensor electrode 52b1. By adopting such a configuration, an insulating film or the like can be formed in the region where one sensor electrode intersects with the other sensor electrode. It is necessary to newly provide a conductive film (also called a bridge electrode) that is electrically connected through the opening. Therefore, a high-definition display device can be realized.

[0107] In FIG. 21(A), the sensor electrode 51a1 is provided extending in the X direction. The sensor electrode 52b1 is provided extending in the Y direction, but one aspect of the present invention is to By rotating the sensor electrode 51a1 by 90 degrees, the sensor electrode 51a1 is provided to extend in the Y direction. The sensor electrode 52b1 may be provided so as to extend in the X direction.

[0108] In FIG. 21(A), the sensor electrodes are provided for every several rows or every several columns. For example, in FIG. 21(A), the sensor electrodes may be divided into two rows or two columns. An example in which this is the case is shown in FIG.

[0109] Although various modifications have been shown with respect to the sensor electrodes, the present invention is not limited to these modifications. The contents or drawings described here may not be combined with each other or Therefore, for example, in a certain drawing, a part may be modified. In this case, it is possible to make similar modifications to other drawings. The modified configuration may also be partially modified.

[0110] This concludes the explanation of the touch panel method.

[0111] [Configuration example 1] Below, a more specific example of the configuration of the display device or touch panel will be described. Therefore, the following configuration examples and the configuration examples described above can be combined with each other. Alternatively, they can be applied to each other. For example, in the configuration example described below, In this case, it is possible to modify a part of it into the configuration examples described above.

[0112] FIG. 22A is an example of a schematic top view of a display device 310 of one embodiment of the present invention. In FIG. 22(A), only the elements provided on the element substrate side are shown, and the opposing substrate is omitted. For clarity, only representative components are shown in FIG. 22(A).

[0113] The display device 310 has a substrate 102 and a substrate 372 (not shown) that are provided opposite each other. do.

[0114] On the substrate 102, a display unit 381, wiring 382, ​​a driving circuit 383, a driving circuit 384, wiring The display portion 381 is provided with a conductive film 32. The substrate 102 has wirings 382 and 386 and a conductive film 322b formed thereon. In addition, in FIG. 22(A), the FPC 373 The example above shows IC374 installed.

[0115] Each of the plurality of conductive films 321a is electrically connected to one of the plurality of wirings 386. Each of the plurality of conductive films 322b is electrically connected to one of the plurality of wirings 382. can be.

[0116] The display unit 381 has at least a plurality of pixels. A pixel is at least one display element. Preferably, the pixel includes a transistor and a display element. As the light emitting element, a light emitting element such as an organic EL element or a liquid crystal element can be used. In this configuration example, a liquid crystal element is used as the display element.

[0117] The driving circuit 383 and the driving circuit 384 are connected to a plurality of wirings 386. The driving circuits 383 and 384 are electrically connected to the wiring. A circuit that functions as a line driver circuit and a scanning line driver circuit can be used. The circuit 383 and the driver circuit 384 are connected to the scanning lines (gate signal lines) of the display pixels and the signal The transistors can be used as circuits having a function of driving signal lines (source signal lines) and the like. In addition, the driver circuit 383 is used as a scanning line driver circuit, and the driver circuit 384 is used as a signal line driver circuit. It may also be used.

[0118] At least one of the driving circuits 383 and 384 is provided on the substrate 102. In some cases, this is not the case.

[0119] Wiring 382 and 386 are used to supply signals and power to the display unit 381 and drive circuits 383 and 384. The signals and power are distributed from the outside or IC374 via FPC373. The signals are input to lines 382 and 386.

[0120] The driver circuit 383 or the driver circuit 384 is a gate signal line or a source signal line of a pixel. Instead, it may have a function of driving the common electrode (that is, the sensor electrode) of the pixel. Alternatively, the driver circuit 383 or the driver circuit 384 may be configured to drive the gate signal line or the source signal line of the pixel. The function of driving the common electrode (i.e., the sensor electrode) of the pixel is also included. Alternatively, a circuit having a function of driving the gate signal line or the source signal line of the pixel may be used. The circuitry that drives the common electrode (i.e., the sensor electrode) of the pixel is separate. The circuit may be as follows.

[0121] In addition, circuits such as the gate line driver circuit and source line driver circuit for display are formed inside the IC. Therefore, the pulse voltage output circuit or current detection circuit for the sensor may be At least one of the gate line driver circuit and the source line driver circuit is provided in one For example, the source line driver circuit may be formed in an IC because of its high driving frequency. In many cases, the current detection circuit is formed inside the IC. Also, an operational amplifier is required for the current detection circuit. Therefore, it is often formed inside the IC. The gate line driver and the current detection circuit may be formed in one IC. The driving circuit and the pulse voltage output circuit may be formed on the substrate on which the pixels are formed. Alternatively, the source line driver circuit, current detection circuit, and pulse voltage output circuit may be integrated into one IC. It may be formed inside.

[0122] The driving circuit 384 has a function of, for example, sequentially selecting the conductive films 322b. The touch sensor is driven by sequentially selecting the conductive film 321a instead of the conductive film 322b. In this case, the driving circuit 384 applies a fixed potential or a signal used for sensing to the conductive film 322b. It has the function to switch and supply the voltage. In addition, the touch sensor can be driven by IC374 or externally. If a signal other than the above is supplied, the driver circuit 384 does not need to have the above function.

[0123] In addition, in Figure 22(A), a COF (Chip On Film) method is used on FPC373. As an example of IC374, for example, For example, a function of driving a touch sensor, specifically, a fixed potential or a sensing potential is applied to the conductive film 321a. An IC having a function of switching and supplying signals used for the display device 31 can be applied. 0 does not have the driver circuit 383 or / and the driver circuit 384, the IC 374 The pixel may have a circuit that functions as a line driver circuit and / or a scanning line driver circuit. The driver circuit 383 switches the conductive film 321a to a fixed potential or a signal used for sensing. In cases where the IC 374 is provided as a power supply, the IC 374 may not be provided. In addition, IC374 is mounted on the substrate 102 by a COG (Chip On Glass) method or the like. It may be implemented directly in

[0124] The touch sensor is formed by a conductive film 321a and a conductive film 322b provided on the substrate 102. The capacitance formed between the conductive film 321a and the conductive film 322b is used to It can detect the proximity or contact of an intelligent object.

[0125] 22(B) is an enlarged schematic top view of the region 360 shown in FIG. In (B), the outline of the conductive film 321a and the conductive film 322b that constitute the touch sensor is shown. Only the diagram is shown.

[0126] The conductive film 321a and the conductive film 322b constitute a liquid crystal element of the display device 310. It functions as a common electrode. In this case, the conductive film 321a functions as a common electrode, and the conductive film 321b functions as a common electrode. In this case, the conductive film 322b functions as a common electrode.

[0127] The conductive film 321a connects one electrode of the touch sensor and a common electrode that constitutes the liquid crystal element. The conductive film 322b also serves as the other electrode of the touch sensor and the common electrode constituting the liquid crystal element. In other words, the conductive film 321a functions as one electrode of the touch sensor. The liquid crystal element has a conductive region that functions as a common electrode and a conductive region that functions as a common electrode. The film 322b has an area that functions as the other electrode of the touch sensor and a contact that forms a liquid crystal element. In other words, the conductive film 321a has a region that functions as a touch sensor electrode. The conductive film 322b includes one electrode of the sensor and a common electrode that constitutes the liquid crystal element. The touch sensor includes the other electrode and a common electrode that constitutes the liquid crystal element.

[0128] The conductive film 321a is formed in a direction perpendicular to the direction in which the driving circuit 383 extends (as shown in FIG. 22(B)). The conductive film 322b extends in a direction perpendicular to the conductive film 321a (the X direction). The conductive film 322b is provided so as to extend in the direction perpendicular to the insulating film (not shown). Since the conductive film 321a is provided on the insulating film 1a, the conductive film 321a and the conductive film 322b are intersected with each other through the insulating film. The intersection 363 is an area where the conductive film 321a and the conductive film 322b intersect. Since it is not necessary to form a bridge electrode at the intersection 363, no bridge is required in the pixel. Therefore, the wiring contact portion for forming the electrode can be omitted. The device can be a high-definition display device.

[0129] In FIG. 22(B), the width of the conductive film 322b is narrowed at the intersection 363. Therefore, the conductive film 321a does not function as a common electrode, and the width of the conductive film 321a remains wide. However, one aspect of the present invention is not limited to this. For example, as shown in FIG. As shown, at the intersection 363, the conductive film 322b remains wide and is connected to the common electrode The width of the conductive film 321a is reduced so that it does not function as a common electrode. This may be done.

[0130] In addition, in FIG. 22B, the area where one conductive film 321a and one conductive film 322b intersect is shown. Although a configuration in which one intersection 363 is provided is shown, a configuration in which multiple intersections 363 are provided may also be used. As an example, in FIG. 24A, one conductive film 321a and one conductive film 322b are In the crossing region, four crossing portions 363 are provided. As shown in FIG. 1, a conductive film 322b may be provided over the entire pixel including the intersection 363. In this case, the pixel cannot display anything. This does not have a significant effect on the overall display, so it is not a major problem. This prevents an increase in the resistance of the conductive film 322b at the intersection 363, and improves the touch sensitivity. This can suppress signal delays and the like when driving the sensor.

[0131] 22 to 24, the conductive film 321a extends in the Y direction shown in FIG. 22(B). The conductive film 322b is provided extending in the X direction. The conductive film 321a is provided to extend in the X direction by rotating it by 90 degrees. The conductive film 322b may be provided extending in the Y direction. An example of this case is shown in FIG. 26, as shown in Figure 27.

[0132] {Pixel configuration example 1} 28 shows an example of the configuration of a pixel included in the display device 310. FIG. 28 shows an example of a more detailed schematic top view of an area 362 including nine pixels. A layer that can be formed at the same time using the same material as the conductive film 21a and a layer that can be formed at the same time using the same material as the conductive film 322b Here, the conductive film 321b is a layer that can be formed at the same time as the conductive film 321a. The conductive film 322a can be formed at the same time as the conductive film 322b because they are provided on the same surface. Since they are provided on one surface, they can be formed simultaneously. 29(B) is a top view showing only the conductive films 321a and 321b, and FIG. 29(B) is a top view showing the conductive films 321a and 321b in the region 362. FIG. 10 is a top view showing only the conductive films 322a and 322b.

[0133] In the first pixel 365a, the conductive film 321a functions as a common electrode, and the conductive film 32 The conductive film 322a functions as a pixel electrode. The transistor is exposed through the opening 325a and the opening 356 in the conductive film 321a. The first pixel 3 is electrically connected to a pixel (not shown) (see FIGS. 28 and 29A). 65a is arranged so that at least two of the four adjacent pixels are the first pixel 365a. A plurality of first pixels 365a are arranged adjacent to each other in the Y direction shown in FIG. By doing so, the conductive film 321a that functions as one electrode of the touch sensor is extended in the Y direction. It can be established.

[0134] In the second pixel 365b, the conductive film 321b functions as a pixel electrode, and the conductive film 322 The conductive film 321b functions as a common electrode. The opening 325b is electrically connected to a transistor (not shown). The second pixel 365b has at least one of the four adjacent pixels that is the second pixel 365. b.

[0135] In the third pixel 365c, the conductive film 321a is a common electrode, similar to the first pixel 365a. The third pixel 365c functions as an electrode, and the conductive film 322a functions as a pixel electrode. An intersection 363 between the conductive film 322b and the conductive film 321a is provided in the second pixel. The first and second pixels 365b are arranged in the X direction shown in FIG. 22(B), and the second and third pixels 365c are arranged in the X direction. By providing the second pixel 365b between the two second pixels 365b, the other side of the touch sensor The conductive film 322b that functions as an electrode can be provided extending in the X direction. 10 has a first pixel 365a, a second pixel 365b and a third pixel 365c. The common electrodes (i.e., the conductive film 321a and the conductive film 322b) of the display unit 381 The third pixel 365c has a crossing portion 3 Since the conductive film 322b constituting the conductive film 63 is included, the size of the conductive film 322a in the top view is , which is smaller than the conductive film 322a of the first pixel 365a.

[0136] In FIG. 29, the conductive film 322b is thin at the intersection. At this point, the conductive film 322b does not function as a common electrode. In this case, the conductive film 321a remains thick and functions as a common electrode. One aspect of the present invention is not limited to this. For example, as shown in FIG. The conductive film 322b remains thick and functions as a common electrode. , the electrode may be thinned at the intersection and not function as a common electrode. FIG. 30(A) is a modified example of FIG. 29(A). Also, FIG. 30(B) is a modified example of FIG. 29(B). This is a modified example.

[0137] 29 and 30, the conductive film 321a extends in the Y direction shown in FIG. 22(B). The conductive film 322b is provided extending in the X direction. However, the present invention is not limited to this. The directions in which the conductive film 321a and the conductive film 322b extend are respectively By rotating it by 90 degrees, the conductive film 321a is provided to extend in the Y direction, and the conductive film 322b is provided to extend in the X direction. The conductor may be provided so as to extend in the opposite direction. Examples of such cases are shown in Figures 31 and 32. 1(A) and 32(A) are the conductive films 321a in FIG. 29(A) and FIG. 30(A), respectively. In this example, the direction of extension is rotated by 90 degrees. 29(B) and 30(B), the direction in which the conductive film 322b extends is rotated by 90 degrees. This is an example.

[0138] In FIG. 28, near the boundary where the first pixel 365a and the second pixel 365b are adjacent to each other, The conductive film 321a and the conductive film 322b face each other with a space 364 therebetween. The conductive film 321a of the first pixel 365a and the conductive film 322 of the second pixel 365b b does not have an overlapping region in the top view. The capacitance formed between 321a and the conductive film 322b can be easily changed by the proximity of the object to be detected. It can be made easier.

[0139] The conductive film 322a may be provided inside the conductive film 321a in the top view. Similarly, the conductive film 321b is preferably provided inside the conductive film 322b in the top view. With this configuration, the conductive films 321a and 321b are preferably disposed below the conductive films 321a and 321b. The effect of the electric field generated by the wiring on the alignment of the liquid crystal is suppressed, and the alignment of the liquid crystal is Poor orientation can be reduced.

[0140] A display device according to one embodiment of the present invention includes a plurality of pixels each having a pixel electrode and a common electrode with different configurations. Specifically, the first pixel 365a and the second pixel 365b are formed by using the same. The first pixel 365b and the third pixel 365c have different configurations. When a transmission type liquid crystal display device is applied, the first pixel which is the main pixel constituting the display unit 381 is The difference in voltage-transmittance characteristics of the liquid crystal element between the pixel 365a and the second pixel 365b is reduced. It is preferable that the voltage-transmittance characteristics of the first pixel 365a and the second pixel 365b are different. As a result, the image displayed by the display device 310 includes the conductive film 321a and the conductive film 321b as shown in FIG. 22(B). In some cases, the pattern of the conductive film 322b may become visible.

[0141] In FIG. 33A, the pixel configurations of the first pixel 365a and the second pixel 365b are shown. The black circle in FIG. 33(A) represents the voltage of the first pixel 365a. The white circle indicates the voltage-transmittance characteristic of the second pixel 365b.

[0142] The horizontal axis of FIG. 33(A) is the potential difference between the pixel electrode and the common electrode when the common electrode is set to 0V. In the first pixel 365a, the conductive film 321a is fixed to 0V, and the conductive film 322a is fixed to 0V. The voltage applied to the second pixel 365b is changed by 0.5 V from V to 6 V. 322b is fixed at 0V, and the conductive film 321b is applied in increments of 0.5V from 0V up to 6V. The vertical axis of FIG. 33(A) represents the transmitted light intensity ratio when the light source is set to 100%. In other words, the light from the light source is contained in the first pixel 365a or the second pixel 365b. The figure shows the ratio of light transmitted through the liquid crystal element. The pixel density is 564ppi, the aperture ratio is 50%, and the aperture transmittance is 79%. The transmittance of the opening is the value of the liquid crystal when the transmittance of the parallel Nicol at the opening is 100%. The transmittance is determined by taking into consideration the transmittance of the insulating film and the colored film. The pixel size of the first pixel 365a and the second pixel 365b is 45 μm×45 μm. The conductive film 322a and the conductive film 322b have the same slit shape, and the slit width d1 is 3 μm. The electrode width d2 of the comb-tooth portion is 2 μm (see FIGS. 34(A) and (B)).

[0143] From the results of FIG. 33(A), in the pixel configuration of the first pixel 365a and the second pixel 365b, It was confirmed that there was a difference in the voltage-transmittance characteristics between the first pixel 365a and the second pixel 365b. The pixel structure was examined to reduce the difference in the characteristics of the second pixel 365b. The slit shape and the slit width are determined by taking into consideration the distribution of the electric field lines generated by the pixel electrode and the common electrode. The lit width and the thickness of the insulating film sandwiched between the pixel electrode and the common electrode were adjusted.

[0144] FIG. 33B shows a first pixel 366a and a second pixel 366b with optimized pixel structures. 34(C) and (D) show the calculation results of the voltage-transmittance characteristics of the first pixel 366a and the second pixel 366b. The top view of the pixel 366b of FIG. 2 is shown. The conductive film 322a is formed in one opening in one sub-pixel. The opening has a comb-like shape that reaches the end, and the width d3 of the opening is 4 μm, and the pixel electrode width d4 The conductive film 322b has two slit-shaped openings in one sub-pixel. The width d5 ​​of the opening is 4 μm, and the comb teeth are The common electrode width d6 is 3 μm.

[0145] By optimizing the pixel structure, the voltage-transmission ratio of the first pixel 366a and the second pixel 366b is The transmittance characteristics were able to be made almost identical (see FIG. 33(B)). FIG. 35 shows an example in which the first pixel 366a and the second pixel 366b are applied to the region 362. FIG. 36 shows the example in which the first pixel 366a and the second pixel 366b are applied to the region 362. 35 is a top view showing only the conductive films 322a and 322b. The layout of 21a and 321b is the same as that of FIG. 29(A). By configuring the common electrode as shown in FIG. 35, the conductive pattern shown in FIG. 22(B) is displayed on the display image. The patterns of the conductive film 321a and the conductive film 322b are prevented from becoming visible, and the display device 310 The third pixel 366c constitutes the intersection 363, and the display quality can be improved. Since the conductive film 322b is located adjacent to the conductive film 322a, the size of the conductive film 322a in the top view is The conductive film 322a of the element 366a is smaller than the conductive film 322a.

[0146] In the first pixel 365a and the third pixel 365c, the layer above the common electrode The conductive film 322a functioning as a pixel electrode has a plurality of slit-shaped openings (see FIGS. 28 and 29). 29(B)). In the second pixel 365b, the common electrode The conductive film 322b that functions as an electrode has a plurality of slit-shaped openings. The driving method of the liquid crystal elements of the pixels shown in FIG. The embodiment is not limited to this. Alternatively, both the pixel electrode and the common electrode may be formed in a comb-like electrode shape. In other words, the electrode structure shown in FIG. 4(A) may be replaced with the electrode structure shown in FIG. 4(C) may be used. Therefore, the configuration of the drawing corresponding to FIG. The configuration of the drawing corresponding to FIG. 4(C) can also be applied in the same way.

[0147] {Pixel configuration example 2} FIG. 37 shows an example of a pixel configuration different from that shown in FIG. 28. Here, the same configuration as that shown in FIG. 28 is shown. 37, and the configuration different from FIG. 28 will be mainly explained. FIG. 37 is a more detailed schematic top view of the area 362 including nine pixels shown in FIG. 22(B). Here is an example.

[0148] In the first pixel 367a and the third pixel 367c, a conductive layer that functions as a common electrode is The conductive film 321a and the conductive film 322a functioning as a pixel electrode have comb-like upper surfaces. In the second pixel 367b, the conductive film 321b and the common electrode 321b function as a pixel electrode. The conductive film 322b functioning as an electrode has a comb-like top surface.

[0149] {Pixel configuration example 3} FIG. 38 shows an example of a pixel configuration different from that shown in FIG. 28. Here, the same configuration as that shown in FIG. 28 is shown. The explanation of the configuration can be applied to FIG. 38, and the configuration different from FIG. 28 will be mainly explained. .

[0150] FIG. 38 is a more detailed schematic top view of the area 362 including the nine pixels shown in FIG. 22(B). FIG. 38 shows a layer that can be formed at the same time using the same material as the conductive film 321a1, and The conductive film 322b1 is a layer that can be formed at the same time using the same material as the conductive film 322b1. The conductive film 321a2 is formed on the same surface as the conductive film 321a1, and therefore can be formed at the same time. The conductive film 322b2 is provided on the same surface as the conductive film 322b1, and can therefore be formed at the same time. In FIG. 38, for clarity, the conductive film 321a1 and the conductive film 321a2 are hatched, and the conductive film 321a1 and the conductive film 321a2 are not hatched. The conductive film 322b1 and the conductive film 322b2 are shown with different hatching.

[0151] In the first pixel 368a and the third pixel 368c, a conductive layer that functions as a common electrode is The conductive film 321a1 and the conductive film 321a2 functioning as a pixel electrode have comb-like upper surfaces. In the second pixel 368b, the conductive film 322b2 and The conductive film 322b1 functioning as a common electrode has a comb-like top surface. The driving method of the liquid crystal elements of the multiple pixels shown in FIG. 38 is the IPS mode. In the example shown, the top surface layouts of the first pixel 368a and the second pixel 368b are identical. be.

[0152] In the plurality of pixels shown in FIG. 38, the common electrode is provided so as to surround the pixel electrode in the top view. The first pixel 368a or the third pixel 368c is adjacent to the second pixel 368b. The capacitance formed between the conductive film 321a1 and the conductive film 322b1 near the boundary where they contact is By using this, the common electrode can also serve as one of the pair of electrodes of the touch sensor. That is, a corner surrounding a plurality of sub-pixels (three sub-pixels in this example) in one pixel can be formed. The conductive film 321a1 can also function as a touch sensor electrode. The conductive film 322b1 functions as a common electrode and one of the electrodes of the touch sensor. It also functions as the other electrode of the touch sensor.

[0153] Here, the top surface layout of one pixel of the first pixel 368a is shown in Figure 39(A). The area where 321a1 functions as a common electrode is the protruding portion (comb-tooth portion) of the conductive film 321a2. The conductive film 321a2 is a region 377 that faces the long side of the conductive film 321a2. The first pixel 368a and the adjacent pixel 321a1 actually function as touch sensor electrodes. This is a region facing the conductive film 322b1 of the adjacent second pixel 368b. In the pixel 368a, the conductive film 321a1 does not function as a common electrode and the touch sensor The area that does not function as an electrode is allocated to the conductive film 321a2 that functions as a pixel electrode. This increases the area of ​​the conductive film 321a2, thereby improving the aperture ratio of the pixel. It can be raised.

[0154] Examples of pixel layouts that achieve the above effects are shown in Figures 39(B) and (C). In the first pixel 369a shown in B), the conductive film 321a1 is formed on three sides other than the upper side of the conductive film 321a2. In one pixel, the area facing the upper side of the conductive film 321a2 is By not providing the conductive film 321a1 in the region, the length of the protruding portion of the conductive film 321a2 is increased, The aperture ratio of the pixel can be improved. In this case, the conductive film 321a1 is not provided in the area facing the upper and lower sides of the conductive film 321a2. Therefore, the aperture ratio can be further improved compared to that of FIG. 39(B). The same can be applied to the third pixel 368b and the third pixel 368c.

[0155] Next, an example in which the pixels shown in FIG. 39(B) are arranged in the display section 381 of the display device 310 is shown in FIG. 40 is an example of a more detailed schematic top view of the region 362 shown in FIG. 22(B). .

[0156] In FIG. 40, the first pixel 369a or the third pixel 369c and the second pixel 369b In the vicinity of the adjacent boundary, the area where the conductive film 321a1 and the conductive film 322b1 face each other is the smallest. Specifically, the first pixel shown in FIG. The first pixel 369a(1) is rotated by 180° based on the orientation of the first pixel 369a. The second pixels 369b(1) and 369b(2) are rotated 90 degrees to the right. 40. The liquid crystal elements of the plurality of pixels shown in FIG. The alignment treatment of the alignment film provided in contact with the liquid crystal layer of the pixel is performed by using a photo-alignment method. It is preferable to change the orientation for each pixel in accordance with the rotation.

[0157] By adopting such a configuration, the capacitance of the touch sensor electrode can be reduced to the same extent as the configuration shown in FIG. The capacitance of the touch sensor electrode can be increased by a conductive film. The thickness is proportional to the size of the area where the film 321a1 and the conductive film 322b1 face each other across the space 364. In addition, in the display unit 381, the first pixel 369a or the third pixel 369c and the second pixel In areas other than the area adjacent to 369b, each pixel can be provided without being rotated.

[0158] 4 shows an example in which the pixel shown in FIG. 39(C) is arranged in the display section 381 of the display device 310. 1. FIG. 41 is an example of a more detailed schematic top view of the region 362 shown in FIG. 22(B). .

[0159] In FIG. 41, the first pixel 370a or the third pixel 370c and the second pixel 370b In the vicinity of the adjacent boundary, the area where the conductive film 321a1 and the conductive film 322b1 face each other is the smallest. Specifically, the first pixel shown in FIG. With the orientation of the first pixel 370a as a reference, the first pixels 370a(1), 370a(2), 37 0a(3) are rotated 90° to the right, 90° to the left, and 180° to the left. The second pixels 370b(1) and 370b(2) are rotated 90° to the left and 90° to the right, respectively. It is installed in a rotating manner.

[0160] With this configuration, the capacitance of the touch sensor electrode is Although the pixel aperture ratio becomes smaller, it is possible to further improve the pixel aperture ratio. That is, the area where the first pixel 370a or the third pixel 370c is adjacent to the second pixel 370b. In the area other than the above, each pixel can be rotated 90° relative to the adjacent pixel. In addition, the liquid crystal layer provided in contact with the liquid crystal element of the plurality of pixels shown in FIG. The orientation process of the alignment film is carried out by using a photo-alignment method, and the orientation of the alignment film is adjusted for each pixel in accordance with the rotation of the pixel. It is preferable to change the direction.

[0161] [Cross-sectional configuration example 1] An example of a cross-sectional configuration of a display device according to one embodiment of the present invention will be described below with reference to the drawings. do.

[0162] 42 is a schematic cross-sectional view of a display device 310. In FIG. 42, the FP in FIG. C373, the area including the drive circuit 383, and the area including the display unit 381. A cross section is shown.

[0163] The substrate 102 and the substrate 372 are bonded together by a sealing material 151. The liquid crystal 353 is sealed in the area surrounded by the plate 102, the substrate 372, and the sealant 151. There are.

[0164] On the substrate 102, a transistor 301, a transistor 150a, a transistor 150b, and a transistor 150c are provided. b, wiring 386, conductive films 321a, 321b, 321c that form the liquid crystal elements 160a, 160b, 22a, 322b, etc. are provided.

[0165] On the substrate 102, an insulating film 108, an insulating film 114, an insulating film 118, an insulating film 119, an insulating film 120, an insulating film 122, an insulating film 124, an insulating film 126, an insulating film 128, an insulating film 129, an insulating film 130, an insulating film 131, an insulating film 132, an insulating film 133, an insulating film 134 The insulating film 108 and the insulating film 114 are provided with the insulating film 354, the spacer 316, and the like. A part of the insulating film 118 functions as a gate insulating layer for each transistor. The insulating film 119 functions as a planarization layer. The insulating film 354 is provided to cover the conductive films 321a and 321b. The insulating film 21a, 321b has a function of electrically insulating the conductive films 322a, 322b. The insulating film 119 functioning as a planarizing layer may not be provided if it is not necessary.

[0166] In FIG. 42, as an example of the display unit 381, cross sections of two sub-pixels 365a1 and 365b1 are shown. The subpixel 365a1 is included in the first pixel 365a, and the subpixel 365b1 is included in the second pixel 365b. For example, the two sub-pixels are respectively designated as a red sub-pixel and a green sub-pixel. By using either a sub-pixel that displays red or a sub-pixel that displays blue, a full color display can be achieved. For example, the sub-pixel 365a1 shown in FIG. 42 includes a transistor 150a and a liquid crystal display (LCD). The sub-pixel 365b1 includes a transistor, a liquid crystal element 160a, and a colored film 331a. The display panel 100 includes a display panel 150b, a liquid crystal element 160b, and a colored film 331b.

[0167] In addition, in FIG. 42, an example in which a transistor 301 is provided as a driving circuit 383 is shown. It shows.

[0168] In FIG. 42, transistors 150a and 150b are shown as examples in which the channel The semiconductor layer to be formed is called a gate electrode 341 and a gate electrode 342, or a gate electrode 34 3 and a gate electrode 344. The gate electrode 341 and the gate electrode 342 are electrically connected to each other, or the gate electrode 341 and the gate electrode 342 are electrically connected to each other. When the gate electrode 343 and the gate electrode 344 are electrically connected, the other transistor It is possible to increase the field effect mobility compared to conventional transistors, and increase the on-current. As a result, it is possible to fabricate a circuit capable of high-speed operation. By using a transistor with a large on-current, the surface area can be reduced. Even if the number of wires increases when the display device is made larger or more precise, It is possible to reduce signal delay and suppress display unevenness. The gate electrodes 342 and 344 are connected to the second gate electrodes of the transistors 150a and 150b, respectively. It can be called a pole.

[0169] Note that the transistors included in the driver circuit 383 and the transistors included in the display portion 381 are The plurality of transistors included in the driving circuit 383 may all have the same structure. The transistors may have the same structure, or transistors with different structures may be used in combination. The plurality of transistors included in the display portion 381 may all have the same structure or may have different structures. Although not shown in FIG. 42, the driving circuit 3 The transistors included in the driver circuit 384 are similar to the transistors included in the driver circuit 383. do.

[0170] At least one of the insulating films 114 and 118 covering the transistors may be, for example: It is preferable to use a material that is difficult for impurities such as water and hydrogen to diffuse. The insulating film 14 or the insulating film 118 can function as a barrier film. This effectively prevents impurities from diffusing into the transistor from the outside. This makes it possible to realize a highly reliable display device.

[0171] FIG. 42 shows a FFS (Fringe Field Switch) for the liquid crystal elements 160a and 160b. This shows an example in which a liquid crystal element in the itching mode is used. The liquid crystal element 160a includes a conductive film 321a, a liquid crystal 353, and a conductive film 322a. 0b includes a conductive film 321b, a liquid crystal 353, and a conductive film 322b. The electric field generated between the conductive film 321b and the conductive film 322a and between the conductive film 321b and the conductive film 322b This allows the orientation of the liquid crystal 353 to be controlled.

[0172] Conductive films 321a and 321b are provided over the insulating film 119. An insulating film 354 is provided to cover the conductive films 322a and 322b. The conductive film 322a is provided on the insulating films 354, 119, 118, and 114. The transistor 15 is connected to the opening 325a and the opening 356 formed in the conductive film 321a. The conductive film 321b is electrically connected to either the source or the drain of the insulating film 10a. 19, 118, and 114 through opening 325b. The conductive films 321a, 321b, 322a, and 323a are electrically connected to one of the drains. When a light-transmitting conductive material is used as 322b, the display device 310 can be a transmission type liquid crystal display. It can be a display device.

[0173] The conductive films 322a and 322b have a comb-like upper surface or one or more slit-like openings. The conductive film 322a has a top surface shape (also referred to as a planar shape). The conductive film 322b is disposed to overlap the conductive film 321b. In the region overlapping with the color film 331a, the conductive film 322a is disposed on the conductive film 321a. Similarly, in the region overlapping with the colored film 331b, there is a portion on the conductive film 321b. There is a portion where the conductive film 322b is not disposed.

[0174] In the subpixel 365a1, the conductive film 322a functions as a pixel electrode, and the conductive film 321a In the sub-pixel 365b1, the conductive film 321b functions as a common electrode. The conductive film 321a and the conductive film 322b function as a common electrode. The conductive film 321b is provided on the same surface, that is, on the insulating film 119 in FIG. The conductive film 322a and the conductive film 322b can be formed simultaneously using the same material. are provided on the same surface, on the insulating film 354 in FIG. 42, and therefore are made of the same material. can sometimes be formed.

[0175] In the display device of one embodiment of the present invention, the conductive films 321a and 322b are used as a pair of touch sensors. The conductive film 321a and the conductive film 322b can be used as a capacitor electrode. When the object to be detected approaches the conductive film 321a and / or the conductive film 322b, The change in the capacitance can be utilized for detection. The liquid crystal element 160a, the conductive film 322b, and the conductive film 322b are connected to the liquid crystal element 160a during the display period of the display device 310. A common potential is supplied in response to the driving of 160b, and the display device 310 detects the object to be detected. During this period, a fixed potential or a signal used for sensing is supplied.

[0176] A connection portion 306 is provided in an area near the edge of the substrate 102. The connection portion 306 is The FPC 373 is electrically connected via the connection layer 319. In FIG. and a conductive layer formed by processing the same conductive film as the conductive film 322a. An example of the configuration of the connection section 306 is shown.

[0177] The surface of the substrate 372 facing the substrate 102 is provided with a colored film 331a, a colored film 331b, and a light-shielding film 331b. Also, an insulating film 331 is provided to cover the colored films 331a and 331b and the light-shielding film 332. 55 is provided.

[0178] The light-shielding film 332 does not necessarily have to be provided.

[0179] The insulating film 355 prevents impurities contained in the colored film 331 a and the light-shielding film 332 from diffusing into the liquid crystal 353 . It functions as an overcoat to prevent scattering.

[0180] The spacer 316 is provided on the insulating film 354, and the distance between the substrate 102 and the substrate 372 is uniform. The spacer 316 and the substrate 372 have a function of preventing the spacer 316 from coming closer than a certain distance. Although an example is shown in which the insulating film 355 and the like are in contact with each other, they do not necessarily have to be in contact with each other. In addition, although an example in which the spacer 316 is provided on the substrate 102 side has been shown, it is also possible to provide the spacer 316 on the substrate 3 side. For example, it may be disposed between two adjacent sub-pixels. Granular spacers may be used as the spacers 316. Examples of granular spacers include silica. However, it is preferable to use elastic materials such as organic resins and rubber. At this time, the granular spacers may be crushed in the vertical direction.

[0181] In addition, the conductive films 322a and 322b, the insulating films 354 and 355, etc. An alignment film for controlling the alignment of the liquid crystal 353 may be provided on the surface in contact with the liquid crystal display panel 3.

[0182] In addition, when a transmission type liquid crystal display device is applied to the display device 310, for example, a polarizing plate (not shown) The backlight is placed outside the polarizing plate. The light is incident through a polarizing plate. The orientation of the liquid crystal 353 is controlled by the voltage applied between the conductive film 321b and the conductive film 322b. In other words, the intensity of the light emitted through the polarizing plate can be controlled. The colored films 331a, 331b, etc. absorb light outside of a specific wavelength range. The emitted light is, for example, red, blue, or green.

[0183] In addition to the polarizing plate, for example, a circular polarizing plate can be used. For example, a laminate of a linear polarizer and a quarter-wave retardation plate can be used. This reduces viewing angle dependency.

[0184] In this example, the liquid crystal elements 160a and 160b are elements to which the FFS mode is applied. However, the present invention is not limited to this, and liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Ne matic) mode, IPS mode, ASM (Axially Symmetric ligned Micro-cell) mode, OCB (Optically Comp Ensulated Birefringence mode, FLC (Ferrerolect ric Liquid Crystal) mode, AFLC (AntiFerroele Liquid crystal elements that use a liquid crystal mode, etc. This can be done.

[0185] In addition, the display device 310 is a normally black type liquid crystal display device, for example, a vertical alignment (VA) A transmissive liquid crystal display device employing a vertical alignment mode may be used. MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, ASV Modes, etc. can be used.

[0186] The liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal. The optical modulation effect of liquid crystal is due to the electric field applied to the liquid crystal (horizontal electric field, vertical electric field The liquid crystal used in the liquid crystal element is , thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, polymer dispersed liquid crystal (PDLC:Po lymer Dispersed Liquid Crystal), ferroelectric liquid crystal, anti- Ferroelectric liquid crystals can be used. These liquid crystal materials can be cholesteric depending on the conditions. These phases include smectic phase, cubic phase, chiral nematic phase, and isotropic phase.

[0187] The liquid crystal material may be either a positive type liquid crystal or a negative type liquid crystal. The optimum liquid crystal material may be selected depending on the mode and design to be applied.

[0188] In addition, when the in-plane switching method is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. Therefore, in order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. The blue phase is a characteristic of the liquid crystal composition containing a liquid crystal and a chiral agent. The composition does not require alignment treatment and has little viewing angle dependency. This eliminates the need for rubbing, preventing electrostatic damage caused by rubbing. This can prevent defects and damage to the display device during the manufacturing process.

[0189] In this configuration example, a capacitance formed between the conductive film 321a and the conductive film 322b is used. That is, the conductive film 321a is a film that is formed on the liquid crystal element 160. The conductive film 32 serves as one of the pair of electrodes of the touch sensor a. 2b connects one of the pair of electrodes of the liquid crystal element 160b and the other of the pair of electrodes of the touch sensor. be unable.

[0190] Here, the conductive films 321a and 321b are made of a conductive material that transmits visible light. For example, it is preferably configured to include a conductive material containing a metal oxide. Among light-transmitting conductive materials, metal oxides can be used.

[0191] The conductive films 321a and 321b may be made of the same metal as other conductive layers or semiconductor layers. It is preferable to use a metal oxide containing a metal element. When an oxide semiconductor is used for the semiconductor layer of a transistor, the conductive oxide containing the metal element contained therein In particular, it is preferable to use a silicon nitride film containing hydrogen for the insulating film 354. In that case, an oxide semiconductor may be used for the conductive films 321a and 321b. In this case, the conductivity can be improved by hydrogen supplied from the insulating film 354. That is, the oxide semiconductor can be brought into an N+ state.

[0192] Here, above the substrate 372, there is a substrate that can be directly touched by a detection object such as a finger or a stylus. In this case, a polarizing plate or a circular polarizing plate may be provided between the substrate 372 and the substrate. In this case, it is preferable to provide a protective layer (ceramic coating, etc.) on the substrate. The protective layer is preferably made of, for example, silicon oxide, aluminum oxide, yttrium oxide, or the like. Inorganic insulating materials such as aluminum and yttria-stabilized zirconia (YSZ) can be used. Further, the substrate may be made of tempered glass. The tempered glass may be made by an ion exchange method or an air-cooling method. The material is subjected to physical or chemical treatment such as applying compressive stress to the surface. It is possible.

[0193] [About each component] Each of the above components will be described below.

[0194] {substrate} A material having a flat surface can be used for the substrate of the display device. The substrate on the side from which the light is extracted is made of a material that transmits the light. For example, glass, quartz, ceramic Materials such as ceramic, sapphire, and organic resin can be used. Single crystal semiconductor substrates made of silicon dioxide, polycrystalline semiconductor substrates, silicon germanium and other semiconductor substrates It is also possible to apply a compound semiconductor substrate, an SOI substrate, etc., and a semiconductor element is formed on these substrates. The substrate may be one on which a substrate is provided.

[0195] When using a glass substrate as the substrate, the 6th generation (1500mm x 1850mm ), 7th generation (1870mm x 2200mm), 8th generation (2200mm x 2400mm ), 9th generation (2400mm x 2800mm), 10th generation (2950mm x 3400mm By using a large area substrate such as a GaN substrate, a large display device can be manufactured. A flexible substrate is used as the plate, and transistors, capacitors, etc. are formed directly on the flexible substrate. That's fine.

[0196] By using a thin substrate, the display device can be made lighter and thinner. In addition, by using a substrate with a thickness that allows flexibility, a flexible display device can be realized. Cut.

[0197] Examples of glass include alkali-free glass, barium borosilicate glass, and aluminophobic glass. Usable materials include silicate glass.

[0198] Examples of materials that are flexible and transparent to visible light include: Thickness of glass, polyethylene terephthalate (PET), polyethylene naphthalate Polyester resins such as (PEN), polyacrylonitrile resins, polyimide resins, polymers methyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PE S) Resin, polyamide resin, cycloolefin resin, polystyrene resin, polyamide imide resin, polyvinyl chloride resin, polytetrafluoroethylene (PTFE) resin, etc. In particular, it is preferable to use a material with a low thermal expansion coefficient, such as polyamideimide. Resin, polyimide resin, PET, etc. can be suitably used. Uses substrates impregnated with resin or substrates with a lower thermal expansion coefficient by mixing inorganic fillers into organic resin Since the substrate using such a material is light in weight, it is possible to The display device can also be made lighter.

[0199] In addition, the substrate on the side from which light is not extracted does not need to be light-transmitting. In addition to the substrates mentioned above, metal substrates made of metal or alloy materials, ceramic substrates, or semiconductor substrates are also available. Metallic materials and alloy materials have high thermal conductivity, and heat is distributed to the entire sealing substrate. Since the temperature can be easily conducted, a local temperature rise in the display device can be suppressed, which is preferable. In order to obtain flexibility and bendability, the thickness of the metal substrate is preferably 10 μm or more and 200 μm or less. It is preferable that the thickness is 20 μm or more and 50 μm or less.

[0200] The material for the metal substrate is not particularly limited, but examples thereof include aluminum, copper, and nickel. Nickel, aluminum alloy, stainless steel or other alloys can be suitably used. Cut.

[0201] In addition, insulating materials can be obtained by oxidizing the surface of a conductive substrate or by forming an insulating film on the surface. A substrate that has been subjected to a treatment may be used. For example, a coating method such as a spin coating method or a dip method may be used. The insulating film may be formed by electrodeposition, vapor deposition, sputtering, or the like. In addition to leaving it in an atmosphere or heating it, an oxide film is formed on the surface of the substrate by anodizing or other methods. It may be done.

[0202] As a flexible substrate, a layer using the above material protects the surface of the display device from scratches. Hard coat layer (e.g. silicon nitride layer) that protects the surface, and layer of material that can disperse pressure ( For example, it may be laminated with an aramid resin layer or the like. In order to prevent the deterioration of the life of the display element caused by the Water permeability of membranes containing nitrogen and silicon, and membranes containing nitrogen and aluminum, such as aluminum nitride membranes The insulating film may have a low resistance.

[0203] The substrate may be formed by laminating a plurality of layers. In particular, a substrate having a glass layer may be used. This improves the barrier properties against water and oxygen, making it possible to provide a highly reliable display device.

[0204] For example, a substrate having a glass layer, an adhesive layer, and an organic resin layer stacked from the side closest to the display element is used. The thickness of the glass layer is preferably 20 μm or more and 200 μm or less. The thickness of the glass layer is 25 μm or more and 100 μm or less. A glass layer with such a thickness is highly resistant to water and oxygen. It can simultaneously achieve high barrier properties and flexibility. The thickness of the organic resin layer is 10 μm. The thickness of such organic resin is set to be 200 μm or more, and preferably 20 μm or more and 50 μm or less. By providing this layer, it is possible to suppress breakage and cracks in the glass layer and improve mechanical strength. By applying such a composite material of glass material and organic resin to a substrate, It is possible to provide a highly reliable flexible display device. Curable resins such as thermosetting resins, photocurable resins, and two-component mixed curable resins can be used. For example, acrylic, urethane, epoxy, or siloxane bonds such as silicone. Resins such as resins having the formula:

[0205] {Transistor} The transistor has a conductive layer that functions as a gate electrode, a semiconductor layer, and a a conductive layer that functions as a drain electrode; a conductive layer that functions as a gate insulating layer; The above describes the case where a bottom-gate transistor is used. are.

[0206] Note that the structure of a transistor included in a display device of one embodiment of the present invention is not particularly limited. For example, a planar type transistor or a staggered type transistor may be used. Alternatively, a top gate or bottom gate transistor may be used. Alternatively, gate electrodes may be provided above and below the channel. The semiconductor material used for the transistor is not particularly limited, and may be, for example, an oxide. Examples include semiconductors, silicon, and germanium.

[0207] The crystallinity of the semiconductor material used in the transistor is not particularly limited. A semiconductor having crystallinity (a microcrystalline semiconductor, a polycrystalline semiconductor, a single-crystal semiconductor, or a semiconductor having a partially crystalline region) If a semiconductor having crystallinity is used, This is preferable because it can suppress deterioration of the resistor characteristics.

[0208] Semiconductor materials used in transistors include, for example, elements of Group 14, compound semiconductors, and the like. A conductor or an oxide semiconductor can be used for the semiconductor layer. A conductor, a semiconductor containing gallium arsenide, an oxide semiconductor containing indium, or the like can be used.

[0209] In particular, an oxide semiconductor can be used as a semiconductor in which a channel of a transistor is formed. It is particularly preferable to use an oxide semiconductor having a larger band gap than silicon. It is preferable to use a semiconductor material with a wider band gap and lower carrier density than silicon. The use of such a compound is preferable because it can reduce the current in the off state of the transistor.

[0210] For example, the oxide semiconductor may contain at least indium (In) or zinc (Zn It is more preferable that the oxide semiconductor contains, in addition to indium and zinc, Examples of the metals include Al, Ti, Ga, Y, Zr, La, Ce, Nd, Sn, and Hf.

[0211] In particular, the semiconductor layer has a plurality of crystal portions, and the c-axes of the crystal portions are aligned with the surface on which the semiconductor layer is formed. or oriented approximately perpendicular to the upper surface of the semiconductor layer and having no grain boundary between adjacent crystal portions. It is preferable to use an oxide semiconductor film that does not have a resistivity.

[0212] Such oxide semiconductors have no crystal grain boundaries, so when the display panel is bent, The occurrence of cracks in the oxide semiconductor film due to stress is suppressed. Such oxide semiconductors are suitable for use in flexible display devices that are used in a curved state. It is possible.

[0213] Furthermore, by using such an oxide semiconductor as the semiconductor layer, fluctuations in electrical characteristics are suppressed. This allows for the realization of highly reliable transistors.

[0214] In addition, due to its low off-state current, the charge stored in the capacitance can be released for a long period of time via the transistor. By applying such a transistor to a pixel, It is also possible to stop the driving circuit while maintaining the gradation of the image displayed in the display area. As a result, a display device with extremely reduced power consumption can be realized.

[0215] The semiconductor layer may be, for example, at least indium (In), zinc (Zn), and M (Al, Ti). It is preferable that the material contains a metal such as Ga, Y, Zr, La, Ce, Sn, or Hf. The semiconductor layer contains at least indium (In), zinc (Zn) and M (Al, Ti, G) It is represented by In-M-Zn oxide containing metals such as Zn, Y, Zr, La, Ce, Sn or Hf. In addition, the electrical characteristics of a transistor using the oxide semiconductor are preferably It is preferable to include a stabilizer therewith to reduce variations in performance.

[0216] The stabilizer includes the metals described above under M, for example, gallium (Ga), silicon (Si), and the like. Sn, hafnium (Hf), aluminum (Al), or zirconium (Zr) Other stabilizers include lanthanum (La), a lanthanide. , Cerium (Ce), Praseodymium (Pr), Neodymium (Nd), Samarium (Sm), Europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium ( Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), etc.

[0217] Examples of oxide semiconductors that form the semiconductor layer include In-Ga-Zn oxides, In- Al-Zn oxide, In-Sn-Zn oxide, In-Hf-Zn oxide, In-L a-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd -Zn-based oxides, In-Sm-Zn-based oxides, In-Eu-Zn-based oxides, In-Gd- Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-Ho-Z n-based oxides, In-Er-Zn-based oxides, In-Tm-Zn-based oxides, In-Yb-Zn In-based oxides, In-Lu-Zn-based oxides, In-Sn-Ga-Zn-based oxides, In-Hf- Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al-Zn oxide In-Sn-Hf-Zn oxides, In-Hf-Al-Zn oxides can be used. can.

[0218] Here, the In-Ga-Zn oxide refers to an oxide having In, Ga, and Zn as its main components. The ratio of In, Ga, and Zn does not matter. Metal elements other than n may be included.

[0219] The semiconductor layer and the conductive layer may contain the same metal element from the oxides. By using the same metal element for the semiconductor layer and the conductive layer, it is possible to reduce manufacturing costs. For example, by using metal oxide targets with the same metal composition, manufacturing costs can be reduced. In addition, by using a metal oxide target with the same metal composition, The conductive layer is processed using an etching gas or an etching solution used for processing the oxide semiconductor film. However, the semiconductor layer and the conductive layer may contain the same metal element. Even if the transistor and the capacitor have the same structure, the composition may be different. During this process, metal elements in the film may be released, resulting in a different metal composition.

[0220] When the semiconductor layer is an In-M-Zn oxide, the In and M excluding Zn and O The atomic ratio of In is preferably In when the sum of In and M is 100 atomic %. is higher than 25 atomic %, M is less than 75 atomic %, and more preferably In is 34 atomic % or higher and M less than 66 atomic %.

[0221] The semiconductor layer has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably The energy gap is 3 eV or more. This allows the off-state current of the transistor to be reduced.

[0222] The thickness of the semiconductor layer is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less. More preferably, the thickness is 3 nm or more and 50 nm or less.

[0223] The semiconductor layer is In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, N d, Sn or Hf), the sputtering method used to deposit the In-M-Zn oxide The atomic ratio of the metal elements in the annealing target preferably satisfies In≧M and Zn≧M. The atomic ratio of the metal elements in such a sputtering target is In:M:Zn=1 :1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, 4:2:3 It is preferable that the atomic ratio of the semiconductor layers to be formed is adjusted to the above sputtering ratio as an error. The atomic ratio of metal elements contained in the target varies by ±40%. .

[0224] For example, an oxide semiconductor film having a low carrier density is used as the semiconductor layer. , the carrier density is 1×10 17 pieces / cm 3 Less than 1 × 10 15 pieces / cm 3 below , and more preferably 1 × 10 13 pieces / cm3 Less than or equal to 1×10 11 pieces / cm 3 The following oxide semiconductor film is used.

[0225] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). In order to obtain the semiconductor characteristics of a transistor, the carrier density, impurity concentration, and defect density of the semiconductor layer must be carefully considered. It is preferable to appropriately set the density, atomic ratio of metal element to oxygen, interatomic distance, density, etc. stomach.

[0226] When silicon or carbon, which is one of the group 14 elements, is contained in the semiconductor layer, As a result, oxygen vacancies increase in the semiconductor layer, causing it to become n-type. Carbon concentration (Secondary Ion Mass Spectrometry SIMS) The concentration obtained by spectrometry is 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0227] In addition, in the semiconductor layer, alkali metal or alkali metals obtained by secondary ion mass spectrometry The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 1 6 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. When the electrons combine with the electrons, carriers may be generated, increasing the off-state current of the transistor. Therefore, it is necessary to reduce the concentration of alkali metals or alkaline earth metals in the semiconductor layer. It is preferable that

[0228] In addition, when nitrogen is contained in the semiconductor layer, electrons are generated as carriers, and the carrier density As a result, transistors using oxide semiconductors containing nitrogen are easily made n-type. Therefore, in the oxide semiconductor film, nitrogen is It is preferable that the amount of the ions is reduced as much as possible. For example, the amount of the ions is reduced as much as possible by secondary ion mass spectrometry. The nitrogen concentration is 5×10 18 atoms / cm 3 It is preferable to do the following:

[0229] The semiconductor layer may have a non-single crystal structure, for example. CAAC-OS(C Axis Aligned-Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described later), or amorphous structure Among non-single crystal structures, the amorphous structure has the highest defect level density, and CAAC-OS has the lowest defect level density.

[0230] The semiconductor layer may have an amorphous structure. The amorphous oxide semiconductor film may be, for example, The molecular arrangement is disordered and does not have a crystalline component. Alternatively, an oxide film with an amorphous structure is, for example, It has a completely amorphous structure and does not have any crystalline parts.

[0231] The semiconductor layer may have an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA region, or a crystalline structure region. The film may be a mixed film having two or more of the C-OS region and the single crystal structure region. The composite film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC- It may have a layered structure of two or more regions, either an OS region or a single crystal structure region. .

[0232] Alternatively, silicon is preferably used as the semiconductor in which the channel of the transistor is formed. Although amorphous silicon may be used as silicon, silicon having crystallinity is particularly preferred. It is preferable to use silicon. For example, microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. In particular, polycrystalline silicon has a lower temperature than single-crystal silicon. It can be formed without any additional process and has higher field effect mobility and higher reliability than amorphous silicon. By applying such a polycrystalline semiconductor to the pixel, the aperture ratio of the pixel can be improved. Even when pixels are extremely densely arranged, the selection line driving circuit and the scanning line driving circuit can be It is possible to form the display on the same substrate as the pixels, reducing the number of components that make up electronic devices. This can be done.

[0233] {Conductive layer} In addition to the gate electrode, source electrode, and drain electrode of the transistor, Materials that can be used for conductive layers such as various wirings and electrodes include aluminum, Titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum It is made of a single layer or laminated metal such as aluminum or tungsten, or an alloy with this as the main component. It is used as a layer structure. For example, a single layer structure of aluminum film containing silicon, a titanium film on Two-layer structure with aluminum film laminated, two-layer structure with aluminum film laminated on tungsten film Structure: Two-layer structure with copper film laminated on copper-magnesium-aluminum alloy film, titanium film Two-layer structure with copper film laminated on tungsten film, two-layer structure with copper film laminated on tungsten film, titanium film or is a titanium nitride film and an aluminum or copper film overlaid on the titanium or titanium nitride film. A three-layer structure in which a titanium film or titanium nitride film is formed on top of the film; A silicon film or molybdenum nitride film is overlaid on the molybdenum film or molybdenum nitride film. An aluminum film or copper film is laminated, and then a molybdenum film or molybdenum nitride film is further laminated on top of that. In addition, transparent films containing indium oxide, tin oxide, or zinc oxide are also available. Conductive materials may also be used. When copper containing manganese is used, the shape can be easily etched. This is preferable because it improves controllability.

[0234] Examples of the conductive material having light-transmitting properties include indium oxide, indium tin oxide, and indium tin oxide. Conductive oxides such as indium zinc oxide, zinc oxide, and gallium-doped zinc oxide, or Graphene can be used. Alternatively, gold, silver, platinum, magnesium, nickel, tantalum, etc. such as tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium Metallic materials and alloy materials containing such metallic materials can be used. Alternatively, a metal material, an alloy material (or a combination thereof) may be used. When using these nitrides, it is sufficient to make them thin enough to have light transmission properties. A laminated film of a material can be used as the conductive layer. For example, a silver-magnesium alloy and an insulator can be used. It is preferable to use a laminated film of tin oxide or the like, since the conductivity can be increased. These include conductive layers such as various wirings and electrodes that constitute the display device, and electrical wiring of the display elements. It can also be used for electrodes (pixel electrodes, common electrodes, etc.).

[0235] Alternatively, the conductive layer is preferably made of an oxide semiconductor similar to that of the semiconductor layer. When the conductive layer is formed, the conductive layer exhibits a lower electrical resistance than the region in which the channel of the semiconductor layer is formed. , is preferably formed.

[0236] For example, such a conductive layer may be used as a conductive layer that functions as a second gate electrode of a transistor. Alternatively, it can be applied to other conductive layers that are light-transmitting.

[0237] {Method for controlling the resistivity of oxide semiconductors} The oxide semiconductor film that can be used for the semiconductor layer and the conductive layer has oxygen vacancies and / or is a semiconductor material whose resistivity can be controlled by the concentration of impurities such as hydrogen and water in the film. Therefore, a process that increases oxygen deficiency and / or impurity concentration in the semiconductor layer and the conductive layer, or by selecting a treatment that reduces oxygen vacancies and / or impurity concentrations, respectively. The resistivity of the oxide semiconductor film can be controlled.

[0238] Specifically, a plasma treatment is performed on an oxide semiconductor film used for a conductive layer, and the oxide semiconductor Increase of oxygen vacancies in the film and / or impurities such as hydrogen and water in the oxide semiconductor film By increasing the amount of the oxide semiconductor film, the carrier density can be increased and the resistivity can be reduced. Alternatively, an insulating film containing hydrogen may be formed in contact with the oxide semiconductor film, and the insulating film containing hydrogen may be formed in contact with the oxide semiconductor film. By diffusing hydrogen from the insulating film into the oxide semiconductor film, the carrier density is increased and the resistivity is reduced. The oxide semiconductor film can have low conductivity.

[0239] On the other hand, the semiconductor layer that functions as the channel region of the transistor is in contact with the insulating film that contains hydrogen. At least one of the insulating films in contact with the semiconductor layer contains oxygen. Then, by applying an insulating film capable of releasing oxygen, it is possible to supply oxygen to the semiconductor layer. The semiconductor layer to which oxygen is supplied becomes resistant because oxygen vacancies in the film or at the interface are filled. The insulating film capable of releasing oxygen can be an oxide semiconductor film with high resistivity. For example, a silicon oxide film or a silicon oxynitride film can be used.

[0240] In order to obtain an oxide semiconductor film with low resistivity, an ion implantation method, an ion doping method, etc. , plasma immersion ion implantation method, etc. Nitrogen or nitrogen may be implanted into the oxide semiconductor film.

[0241] In order to obtain an oxide semiconductor film with low resistivity, the oxide semiconductor film is subjected to plasma treatment. For example, the plasma treatment may be carried out using a rare gas (He, Ne, A Plasma using gas containing one or more selected from the group consisting of r, Kr, Xe), hydrogen, and nitrogen. More specifically, plasma treatment under an Ar atmosphere, a mixture of Ar and hydrogen, Plasma treatment under a mixed gas atmosphere, plasma treatment under an ammonia atmosphere, and plasma treatment under Ar and ammonia Plasma treatment in a mixed gas atmosphere of nia or plasma treatment in a nitrogen atmosphere Examples include:

[0242] By the plasma treatment, the oxide semiconductor film is formed into a lattice from which oxygen is desorbed (or Oxygen vacancies are formed in the separated portions. These oxygen vacancies may become a cause of carrier generation. In addition, in the vicinity of the oxide semiconductor film, more specifically, in the lower side or the upper side of the oxide semiconductor film, When hydrogen is supplied from the insulating film adjacent to the side, the oxygen vacancies and hydrogen combine to form the capacitor. In some cases, electrons are generated.

[0243] On the other hand, an oxide semiconductor film in which oxygen vacancies are filled and the hydrogen concentration is reduced can be made highly purified and intrinsic. Alternatively, it can be said that the oxide semiconductor film is substantially highly purified and made intrinsic. The carrier density of the oxide semiconductor film is 8×10 11 pieces / cm 3 Less than 1 x 10 1 1 / cm 3 less than 1×10 10 pieces / cm 3 It means that the purity is less than A highly pure or substantially highly pure intrinsic oxide semiconductor film has few carrier generation sources. In addition, the carrier density can be reduced. Some oxide semiconductor films have a low density of defect states, and therefore, the density of trap states can be reduced. Cut.

[0244] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a significantly low off-state current. Very small, with a channel width of 1×10 6 Even if the device has a channel length of 10 μm, When the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, The current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1×10 -13 A and below Therefore, the above-mentioned high purity pure or substantially high purity pure can be obtained. A transistor using a semiconductor layer including an oxide semiconductor film, which is electrically conductive, for a channel region is This results in a highly reliable transistor with little fluctuation in characteristics.

[0245] As an insulating film in contact with the oxide semiconductor film used as a conductive layer, for example, an insulating film containing hydrogen In other words, an insulating film capable of releasing hydrogen, typically a silicon nitride film, is used. As an insulating film capable of releasing hydrogen, indicates that the hydrogen concentration in the film is 1×10 22 atoms / cm 3 It is preferable that this is equal to or greater than this. By forming such an insulating film in contact with the conductive layer, hydrogen can be effectively contained in the conductive layer. In this way, by changing the structure of the insulating film in contact with the semiconductor layer and the conductive layer, In this case, the resistivity of the oxide semiconductor film can be controlled.

[0246] The hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. The oxygen vacancies are formed in the lattice from which oxygen is desorbed (or in the portions from which oxygen is desorbed). When hydrogen enters the electron carrier, it can generate electrons. By bonding with oxygen, which bonds with metal atoms, electrons, which act as carriers, may be generated. Therefore, the conductive layer provided in contact with the insulating film containing hydrogen is more hydrogen-containing than the semiconductor layer. An oxide semiconductor film with high carrier density is obtained.

[0247] The semiconductor layer in which the channel region of the transistor is formed has as little hydrogen as possible. Specifically, it is preferable that the semiconductor layer is The hydrogen concentration is 2×10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atom s / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below, 5 x 1018 a toms / cm 3 Less than 1 x 10 18 atoms / cm 3 The following is more preferable: is 5 x 10 17 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / c m 3 The following applies.

[0248] On the other hand, the conductive layer has a higher hydrogen concentration and / or oxygen vacancy than the semiconductor layer, and has a lower resistivity. The hydrogen concentration in the conductive layer is 8×10 19 atoms / cm 3 or more, preferably 1 × 10 20 atoms / cm 3 More preferably, 5 × 10 20 a toms / cm 3 In addition, the hydrogen concentration in the conductive layer is higher than that in the semiconductor layer. The resistivity of the conductive layer is at least 2 times, preferably at least 10 times, that of the semiconductor layer. 1×10 -8 1×10 times more -1 It is preferably less than 1×10 -3 Ωcm or more 1×10 4 Ωcm, and more preferably a resistivity of 1×10 -3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0249] {insulating film} The insulating film 108 that functions as the gate insulating film of the transistors 150a and 150b is , plasma CVD (CVD: Chemical Vapor Deposition) method , a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, or the like by a sputtering method. film, silicon nitride film, aluminum oxide film, hafnium oxide film, yttrium oxide film, acid Zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide film The insulating film may include one or more of a cerium oxide film, a cerium oxide film, and a neodymium oxide film. The insulating film 108 may not have a single layer structure, but may have a plurality of layers selected from the above-mentioned materials. The membranes may be laminated.

[0250] The insulating film 108 may function as a blocking film that suppresses oxygen permeation. For example, an oxide semiconductor layer may be used as the semiconductor layer of the transistors 150a and 150b in FIG. When excess oxygen is supplied to the insulating film 114 and / or the oxide semiconductor layer, Additionally, the insulating film 108 can suppress oxygen permeation.

[0251] Note that the insulating film 108 is preferably an oxide insulating film, and It is more preferable to have a region containing excess oxygen (oxygen excess region). The insulating film 108 is an insulating film capable of releasing oxygen. To provide the excess region, for example, the insulating film 108 may be formed in an oxygen atmosphere. Alternatively, oxygen may be introduced into the insulating film 108 after it has been formed to form an oxygen-excess region. The methods include ion implantation, ion doping, and plasma immersion ion implantation. , plasma treatment, etc. can be used.

[0252] Furthermore, when hafnium oxide is used as the insulating film 108, the following effects are achieved. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Compared to when silicon oxide is used, the thickness of the insulating film 108 can be made larger, so that the tunnel This reduces the leakage current due to the current flowing through the transistor. Furthermore, hafnium oxide, which has a crystalline structure, can be used to form amorphous structures. Therefore, the off-state current is small. To form a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include monoclinic and cubic crystals. The types are not limited to these.

[0253] {Protective insulating film} Insulating films 114 and 118 function as protective insulating films for the transistors 150a and 150b. For example, silicon oxide film and silicon oxynitride film are formed by plasma CVD method, sputtering method, etc. Silicon film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, hafnium oxide film , yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, ma oxide film Insulation film containing one or more of magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film A velum can be used, respectively.

[0254] For example, an oxide semiconductor is used as the semiconductor layer of the transistors 150a and 150b in FIG. In the case where a layer is used, the insulating film 114 is preferably an oxide insulating film that releases oxygen. In other words, an insulating film containing oxygen in excess of the stoichiometric composition is used. The insulating film 114 is an insulating film having an oxygen excess region. To achieve this, for example, the insulating film 114 may be formed in an oxygen atmosphere. Oxygen may be introduced into the insulating film 114 to form an oxygen-excess region. , ion implantation method, ion doping method, plasma immersion ion implantation method, plasma treatment Theories, etc. can be used.

[0255] By using an insulating film capable of releasing oxygen as the insulating film 114, Oxygen is transferred to the oxide semiconductor film that functions as a channel region of the gate electrodes 150a and 150b. It is possible to reduce the amount of oxygen vacancies. For example, thermal desorption spectroscopy (TDS analysis) The surface temperature of the film measured by the method is 100°C or more and 700°C or less, or 10 The amount of oxygen molecules released in the range of 0°C to 500°C is 1.0 x 10 18 molecule / cm 3 By using the insulating film, the amount of oxygen vacancies in the oxide semiconductor film can be reduced. This can be done.

[0256] Furthermore, it is preferable that the insulating film 114 has a small number of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 3 x 10 17 spins / cm 3 This is because the insulating film 114 is preferably If the density of defects is high, oxygen will be bonded to the defects, and the oxygen in the insulating film 114 will be reduced. In addition, the amount of transmitted light decreases at the interface between the insulating film 114 and the oxide semiconductor film. It is preferable that the amount of defects in the surface is small. Typically, the oxide semiconductor is The spin density of the signal that appears when the g value is between 1.89 and 1.96 due to defects in the conductive film is 1. x10 17 spins / cm 3 It is preferably below the lower limit of detection.

[0257] The insulating film 114 is preferably formed using an oxide insulating film with a low density of nitrogen oxide states. Note that the density of states due to the nitrogen oxide can be calculated by The upper energy (E V_OS ) and the energy of the conduction band minimum of the oxide semiconductor film (E C_ OS ) may be formed between the oxide insulating film. Silicon oxynitride film with low nitrogen oxide emission or aluminum oxynitride film with low nitrogen oxide emission A membrane or the like can be used.

[0258] The insulating film 118 is preferably a nitride insulating film. When an oxide semiconductor film is used as the electrodes 342 and 344, the resistivity of the oxide semiconductor film is It also has the function of lowering

[0259] The insulating film 118 also blocks oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. The semiconductor layers of the transistors 150a and 150b are oxide semiconductors. In the case where a conductive film is used, the insulating film 118 is provided to prevent oxygen from the oxide semiconductor film from escaping to the outside. oxygen contained in the insulating film 114 diffuses into the oxide semiconductor film 112; oxygen contained in the insulating film 114 diffuses outward; and oxygen is introduced from the outside into the oxide semiconductor film 112. It is possible to prevent the intrusion of hydrogen, water, etc. into the Instead of a nitride insulating film that has a blocking effect of alkaline earth metals, etc., oxygen, hydrogen, An oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. may be provided. Examples of oxide insulating films having a blocking effect include aluminum oxide and aluminum oxynitride. , gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, gallium oxide Examples include hafnium and hafnium oxide nitride.

[0260] Examples of insulating materials that can be used for the flattening film, overcoat, spacer, etc. include: In addition to resins such as acrylic and epoxy, and resins with siloxane bonds such as silicone, Silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide Inorganic insulating materials such as the above can be used.

[0261] {Sealing material} The sealant prevents substances (such as water) that could become impurities for the display element or transistor from entering from the outside. The sealant has at least the function of preventing or suppressing the intrusion of foreign matter from the outside. For example, the function of strengthening the structure, the function of strengthening adhesiveness, the function of strengthening impact resistance, etc. The sealing material may have a function of making the sealant porous.

[0262] The sealing material used is a material that does not dissolve in the liquid crystal layer even when it comes into contact with the liquid crystal layer before hardening. As the sealing material, for example, epoxy resin, acrylic resin, etc. can be used. The resin material may be either a thermosetting type or a photosetting type. A resin mixture of acrylic resin and epoxy resin may be used. The adhesive may contain a curing agent, a heat curing agent, a coupling agent, etc. Also, a filler may be included.

[0263] The sealing material may be the same material as the adhesive layer described above.

[0264] {Connection Layer} Anisotropic Conductive Film (ACF) is used as the connection layer. conductive film) and anisotropic conductive paste (ACP) Conductive Paste) can be used.

[0265] {Colored film} Materials that can be used for the colored film include metal materials, resin materials, pigments, and dyes. Examples include resin materials.

[0266] This concludes the explanation of each component.

[0267] Below, we will show an example of a cross-sectional configuration of a display device that is partially different from the above configuration example. The explanation of the same parts as above will be omitted, and only the differences will be explained.

[0268] [Cross-sectional configuration example 2] FIG. 43 shows a structure in which the conductive films 321a and 321b are formed on the insulating film 114. The structure shown is formed using the same material as the second gate electrodes (gate electrodes 342 and 344). The conductive films 321a and 321b are provided on the insulating film 114. The insulating film 322b is provided on the insulating film 118 provided on the conductive films 321a and 321b. 42 in that the insulating film 119 and the insulating film 354 are not provided. In the device 310, the spacer 316 is disposed on the substrate 102 side of the substrate 372, specifically, on the insulating film 35. 5. By adopting such a configuration, the flow required for manufacturing the display device 310 can be reduced. The number of photomasks can be reduced and the manufacturing process can be shortened.

[0269] It is particularly preferable to use an oxide semiconductor for the conductive films 321a and 321b. In this case, by using a silicon nitride film containing hydrogen as the insulating film 118, the amount of hydrogen supplied from the insulating film 118 can be reduced. The resulting hydrogen can improve the conductivity of the conductive films 321a and 321b. By using an oxide semiconductor film as the conductive films 321a and 321b, During the deposition of the conductive layer to be formed into the transistors 150a and 150b or during the heat treatment after the deposition, Oxygen can be supplied to the semiconductor film. In the case of an oxide semiconductor film, oxygen is supplied to the oxide semiconductor film, and the oxide in the film or at the interface of the semiconductor film is removed. The electron deficiency is compensated for, resulting in a semiconductor film with high resistivity. Therefore, the current value (off-state current value) of 150b in the off state can be reduced. The retention time of electrical signals such as image signals can be extended, and the writing interval can be shortened when the power is on. Therefore, the frequency of refresh operations can be reduced, and power consumption can be reduced. This has the effect of reducing power consumption.

[0270] The transistor 150a includes a gate electrode 341 and an insulating layer provided on the gate electrode 341. The film 108 and a channel layer provided at a position overlapping the gate electrode 341 on the insulating film 108. an oxide semiconductor film functioning as a source electrode and a source electrode electrically connected to the oxide semiconductor film; and a drain electrode, and a gate insulating film provided on the oxide semiconductor film, the source electrode, and the drain electrode. an insulating film 114; and a gate electrode provided over the insulating film 114 so as to overlap with the oxide semiconductor film. The transistor 150b has a gate electrode 343 and a gate electrode 342. The insulating film 108 provided on the electrode 343 overlaps with the gate electrode 343 on the insulating film 108. an oxide semiconductor film that functions as a channel layer provided at a position; a source electrode and a drain electrode electrically connected to each other, and the oxide semiconductor film, the source electrode and the drain electrode The insulating film 114 is provided over the drain electrode, and the oxide semiconductor film is provided over the insulating film 114. and a gate electrode 344 provided at a position corresponding to the gate electrode 344 .

[0271] The insulating film 118 includes the gate electrode 342, the gate electrode 344, the conductive film 321a, and the conductive film 321b is provided so as to be sandwiched between the insulating film 114 and the insulating film 118. The film 114 preferably contains oxygen. When an oxide semiconductor film is used as the conductive film 321a and the conductive film 321b, the insulating film 118 Preferably, contains hydrogen.

[0272] The conductive film 321a functioning as the common electrode of the sub-pixel 365a1 is a transistor 150a, the gate electrode 342 is provided on the insulating film 114. The conductive film 321a provided in the pixel 365a1 is used to separate the gate electrode 342 into an island shape. It is preferable that the opening is

[0273] As in FIG. 5A, the conductive film 328a and the conductive film 328b are formed on the substrate 372. An example of this is shown in Figure 44.

[0274] [Cross-sectional configuration example 3] FIG. 45 shows the gate electrode 34, which is the second gate electrode of the transistors 150a and 150b. 2 and 344 are formed using the same material as the conductive films 321a and 321b. The port electrodes 342 and 344 are provided on the insulating film 119. This reduces the number of photomasks required to manufacture the display device 310 and shortens the manufacturing process. This can be done.

[0275] The conductive film 321a functioning as the common electrode of the sub-pixel 365a1 is a transistor 150a, is provided on the insulating film 119. The conductive film 321a provided in the pixel 365a1 is used to separate the gate electrode 342 into an island shape. It is preferable that the opening is

[0276] As in FIG. 5A, the conductive film 328a and the conductive film 328b are formed on the substrate 372. An example of this is shown in Figure 46.

[0277] [Cross-sectional configuration example 4] In FIG. 47, the transistors 150a, 150b and the transistor 301 in FIG. 1 shows an example in which a top-gate transistor is applied.

[0278] Each transistor has a semiconductor layer, and a gate electrode is provided on the semiconductor layer via an insulating film 108. The semiconductor layer may also have a region with a low resistance. Acts as a source or drain.

[0279] The source electrode and the drain electrode of the transistor are provided on the insulating film 118. 18, the insulating film 114, and the insulating film 108 are provided with openings through which the resistance of the semiconductor layer is reduced. The area is electrically connected to the

[0280] The region of the semiconductor layer with reduced resistance is, for example, a region where a transistor channel is formed. regions containing more impurities, regions with higher carrier concentrations, or regions with lower crystallinity. The impurities that have the effect of increasing the conductivity can be selected from the semiconductor layer. Although it varies depending on the material, elements that can give n-type conductivity, such as phosphorus, and boron, etc. Elements that can give p-type conductivity, rare gases such as helium, neon, and argon, as well as hydrogen, Lithium, sodium, magnesium, aluminum, nitrogen, fluorine, potassium, calcium Other examples include titanium, iron, nickel, copper, zinc, silver, indium, and sulphur. Impurities such as ZnO also act as impurities that affect the conductivity of semiconductors. In the transistor 150a, the regions 347 and 348 are regions where the transistor channels are formed. The region contains more of the above impurities than the region where the impurities are present.

[0281] As in FIG. 5A, the conductive film 328a and the conductive film 328b are formed on the substrate 372. An example of this is shown in Figure 48.

[0282] [Cross-sectional configuration example 5] FIG. 49 shows a configuration in which auxiliary electrodes are provided on the conductive film 321a and the conductive film 322b. When the display device 310 is driven as a transmissive liquid crystal display device, the conductive film 321a and A transparent conductive film is used as the conductive film 322b. A conductive film having low resistance is in contact with the transparent conductive film. By providing this, it is possible to suppress signal delays when driving the touch sensor. In the example shown in FIG. 49, a conductive film 389 is formed on each of the conductive films 321a and 322b, and functions as an auxiliary electrode. The conductive film 389a and the conductive film 389b are, for example, For example, the same material as that used for the gate electrode, source electrode, and drain electrode of the transistor 150a Various materials can be used.

[0283] When a material that does not transmit visible light is used as the auxiliary electrode, the conductive films 389a and 389b are used as a shield. It is preferable to provide it at a position overlapping with the conductive film 332 (see FIG. 49). Although an example in which the conductive film 389a and the conductive film 389b are made of different materials is shown, it is also possible to use the same material for these. It may be formed using

[0284] In addition, in FIG. 51, a first pixel 365a, a second pixel 365b, and a third pixel 365c are shown. 4 shows an example of a schematic top view of the region 362 where the conductive films 389a and 389b are provided. The display unit 381 of No. 9 corresponds to the dashed line Z3-Z4 in FIG.

[0285] As in FIG. 5A, the conductive film 328a and the conductive film 328b are formed on the substrate 372. An example of this is shown in Figure 50.

[0286] [Cross-sectional configuration example 6] In FIG. 52, the conductive film 321a, the conductive film 322a, the conductive film 321b, and the conductive film 322b In FIG. 52, the display unit 381 has a configuration in which the upper surface thereof is shaped like a comb. The cross section of two subpixels 367a1 and 367b1 is shown. The subpixel 367a1 is the first pixel. The first sub-pixel 367b is included in the first pixel 367a, and the second sub-pixel 367b is included in the second pixel 367b. The display unit 381 in corresponds to the dashed line Z5-Z6 in FIG.

[0287] As in FIG. 5B, the conductive film 328a and the conductive film 328b are formed on the substrate 372. An example of this is shown in Figure 53.

[0288] [Cross-sectional configuration example 7] In FIG. 54, the pixel electrode of the first pixel is provided on the same plane as the common electrode of the first pixel, The pixel electrode of the second pixel is provided on the same plane as the common electrode of the second pixel. In FIG. 54, as an example of the display unit 381, cross sections of two sub-pixels 368a1 and 368b1 are shown. The sub-pixel 368a1 is included in the first pixel 368a, and the sub-pixel 368b1 is included in the second pixel 368a. 54 is included in the pixel 368b of FIG. Compatible with Z7-Z8.

[0289] The conductive film 321a1 functioning as a common electrode in the sub-pixel 368a1 and the pixel electrode The conductive film 321a2 functioning as the subpixel 368b is provided over the insulating film 119. 1, a conductive film 322b1 functioning as a common electrode and a conductive film 322b2 functioning as a pixel electrode are The conductive film 322b2 is provided on the insulating film 354. The conductive film 322b1 and the conductive film 322b2 are formed simultaneously using the same material. It is preferable to do so.

[0290] The conductive film 321a1 and the conductive film 322b1 are one electrode and one electrode of the touch sensor, respectively. The conductive film 321a1 and the conductive film 322b1 function as the other electrode. The quantity can be used to detect the proximity or contact of an object to be sensed.

[0291] The insulating film 354 is formed in the opening of the pixel, for example, in the area overlapping with the colored films 331a and 331b. In particular, it is preferable that the conductive film 321a1 and the conductive film 321a2 that constitute the liquid crystal element 160a are not provided in the conductive film 321a1 and the conductive film 321a2. By not providing the insulating film 354 on the conductive film 321a2, the first pixel 368a and the second pixel 368b are The difference in voltage-transmittance characteristics between the two pixels 368b can be reduced. 4 may be provided so as to separate at least the conductive film 321a1 and the conductive film 322b1. 56, the insulating film 354 is formed on the conductive film 321a1 and the conductive film 322b1. 56 shows an example in which the display unit 381 is provided in an area where the display unit 381 is located. It corresponds to the dashed dotted line Z9-Z10. In the case of FIG. 56, the conductive film 322b1 and the conductive film 3 When patterning the conductive film 321a1 and the conductive film 321a2, Therefore, there are regions where the insulating film is not provided. When a part of the conductive film is etched to form the conductive film 321a1 There is a risk that the conductive film 321a2 will also be etched. For example, the conductive film 322b1 and the conductive film 322b2 are connected to the conductive film 321a1 and the conductive film 321a2. It is desirable that the conductive film 32 is made of a material different from that of the conductive film 21a2. Even if no insulating film is provided on the conductive film 322b1 or the conductive film 321a2, When the conductive film 321a1 and the conductive film 322b2 are formed, the conductive film 321a1 and the conductive film 321a2 are formed at the same time. This can prevent the metal from being etched away at the same time.

[0292] 54 and 56, a conductive film is formed on the substrate 372 in the same manner as in FIG. 5(B). 55 and 56, respectively. Shown in 8.

[0293] In the cross-sectional view of the display device 310 shown in this embodiment, the colored film 331a, the colored At least one of the film 331b and the light-shielding film 332 is provided on the substrate 372 side. However, one aspect of the present invention is not limited to this. For example, the colored film 3 At least one of the colored film 331a, the colored film 331b, and the light-shielding film 332 is provided on the substrate 102 side. As an example, the case of FIG. 42 is shown in FIG. 59, and the case of FIG. 47 is shown in FIG. 60. The same configuration can be applied to other cross-sectional views.

[0294] [Other configuration examples] Note that one embodiment of the present invention is not limited to the above-described exemplary configurations and can have various configurations. .

[0295] <Peripheral circuits> The peripheral circuits can be configured not to be integrally formed. The circuit for driving the pixel and the circuit for driving the pixel can be formed separately. These functions may be realized by a single circuit.

[0296] The circuit that drives the touch sensor is the gate driver that drives the pixel, or the source It may be located on either the driver's side.

[0297] In addition, it is electrically connected to the conductive film (electrode) in the X direction or the conductive film (electrode) in the Y direction of the touch sensor. Of the two circuits, it is preferable to use an IC as the circuit having the detection function. In this case, it is preferable that the conductive film be controlled by the IC via an FPC.

[0298] (Conductive film (electrode) of touch sensor and conductive film (electrode) of liquid crystal element) The conductive film (electrode) with slits placed on the top is used as a pixel electrode, and the The conductive film (electrode) provided across a plurality of pixels is called a common electrode (also called a common electrode). ) can be used as

[0299] Alternatively, a conductive film ( The upper electrode is used as a common electrode, and the lower conductive film (electrode) is used as a pixel electrode. It is possible.

[0300] The conductive film in the X direction of the touch sensor is used as a conductive film that functions as a pixel electrode or a common electrode. Alternatively, the Y direction of the touch sensor may be configured to function as a conductive film. The conductive film is used as a conductive film functioning as a pixel electrode or a conductive film functioning as a common electrode. It is possible to configure it to serve both purposes.

[0301] Also, the conductive film in the X direction of the touch sensor is a conductive film to which a pulse voltage is applied or a current is detected. In this case, the conductive film in the Y direction of the touch sensor is Just do the other one.

[0302] In addition, the conductive film functioning as a common electrode is provided across a plurality of pixels. Alternatively, for example, a common gate electrode formed by a conductive film on the same surface as the gate electrode of the transistor may be used. In this case, the conductive layer functions as a common electrode. The membrane may have an island shape.

[0303] <Drive method> As a method for driving the touch sensor, for example, one horizontal period (one gate selection) for driving the pixel is A method of sensing (scanning) the corresponding row in the gap between the selection periods can be used. Alternatively, one frame period can be divided into two periods, with writing to all pixels in the first half and sensing in the second half. You can also use it.

[0304] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0305] (Embodiment 2) In this embodiment, the present invention can be applied to a transistor and a capacitor in a display device of one embodiment of the present invention. An example of such an oxide semiconductor will be described.

[0306] The structure of an oxide semiconductor will be described below.

[0307] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to a state in which two lines are arranged at an angle of between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0308] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0309] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- like oxide semiconductor) and amorphous oxide semiconductor be.

[0310] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxides. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC -OS, polycrystalline oxide semiconductor, and nc-OS.

[0311] Amorphous structures are generally isotropic and have no heterogeneous structure, and are characterized by the arrangement of atoms in a metastable state. The position is not fixed, the bond angle is flexible, and there is short-range order but no long-range order. It is said that there is no such thing.

[0312] That is, a stable oxide semiconductor is completely amorphous. s) It cannot be called an oxide semiconductor. Also, it is not isotropic (for example, a periodic structure in a small area) An oxide semiconductor having an amorphous structure cannot be called a completely amorphous oxide semiconductor. ike OS is not isotropic, but has an unstable structure with voids. In terms of instability, a-like OS is similar in physical properties to amorphous oxide semiconductors. stomach.

[0313] <caac-os> First, let me explain about CAAC-OS.

[0314] CAAC-OS is an oxide having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0315] CAAC-OS was analyzed by X-ray diffraction (XRD). For example, InGaZnO4, which is classified into the space group R-3m, The structure of CAAC-OS with crystal structure was analyzed by the out-of-plane method. As shown in Figure 61(A), a peak appears at a diffraction angle (2θ) of around 31°. The peak is attributed to the (009) plane of the InGaZnO4 crystal, so it is In this case, the crystal has a c-axis orientation, and the c-axis is the surface on which the CAAC-OS film is to be formed (also referred to as the surface on which the film is to be formed). It can be confirmed that the direction is perpendicular to the surface, or approximately perpendicular to the upper surface. In addition to the peak around 2θ of 36°, a peak may also appear around 2θ of 36°. The nearby peak is due to a crystal structure classified into the space group Fd-3m. It is preferable that the C-OS does not exhibit such a peak.

[0316] On the other hand, in-pl, X-rays are incident on the CAAC-OS from a direction parallel to the surface to be formed. When structural analysis is performed using the ane method, a peak appears at 2θ around 56°. This peak is It is attributed to the (110) plane of the InGaZnO4 crystal. And, 2θ is fixed at around 56°. The sample is then rotated around the normal vector of the sample surface as the axis (φ axis) for analysis (φ scan). Even if this is done, no clear peak appears as shown in Figure 61(B). When 2θ is fixed at around 56° and φ is scanned for ZnO4, the As shown, six peaks attributable to the crystal plane equivalent to the (110) plane are observed. Structural analysis using XRD revealed that the orientation of the a-axis and b-axis of CAAC-OS is irregular. It can be confirmed that:

[0317] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, the process was performed parallel to the surface on which the CAAC-OS was formed. When an electron beam with a probe diameter of 300 nm is incident, a diffraction pattern ( This diffraction pattern may contain I The spots caused by the (009) plane of the nGaZnO4 crystal are included. Diffraction also shows that the pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is formed On the other hand, for the same sample, the direction of the sample surface is perpendicular to the sample surface. The diffraction pattern when an electron beam with a probe diameter of 300 nm is incident perpendicularly to the ) is shown. From Figure 61(E), a ring-shaped diffraction pattern is confirmed. Electron diffraction using an electron beam with a beam diameter of 300 nm also revealed that the pea contained in CAAC-OS It can be seen that the a-axis and b-axis of the lattice do not have any orientation. The first ring is due to the (010) and (100) planes of the InGaZnO4 crystal. The second ring in Figure 61(E) is thought to be due to the (110) plane. It is thought that...

[0318] In addition, a transmission electron microscope (TEM) Combined analysis of bright-field images and diffraction patterns of CAAC-OS using a microscope When observing the image (also called a high-resolution TEM image), multiple pellets can be confirmed. On the other hand, even in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries (grain boundaries), are not clearly visible. It may not be possible to clearly identify the boundary. It can be said that C-OS is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0319] Figure 62(A) shows a high-resolution image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. The TEM image is shown. For high-resolution TEM observation, spherical aberration correction (SCA) was used. The spherical aberration correction function was used. A high-resolution TEM image is specifically called a Cs-corrected high-resolution TEM image. For example, an atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. Therefore, it can be observed.

[0320] From Figure 62(A), it is possible to confirm the pellet, which is the region where metal atoms are arranged in layers. The size of a single pellet can be over 1 nm or over 3 nm. Therefore, the pellets can be called nanocrystals (nc). CAAC-OS can also be used as a C-Axis Aligned Navigator (CANC). The pellets can also be called oxide semiconductors with CAA It reflects the unevenness of the surface on which the C-OS is formed or the top surface, and the unevenness of the surface on which the CAAC-OS is formed or It is parallel to the top surface.

[0321] Also, Figures 62(B) and 62(C) show CAA images observed from a direction approximately perpendicular to the sample surface. Figures 62(D) and 62(E) show Cs-corrected high-resolution TEM images of the C-OS surface. 62(B) and 62(C) are processed images, respectively. First, the processing method of Fig. 62(B) is performed using a fast Fourier transform (FFT). Then, the FFT image is obtained by Fourier Transform (FFT). In the acquired FFT image, the origin is used as the reference point, and the -1 to 5.0 nm -1 The range between Next, the masked FFT image is subjected to inverse fast Fourier transform (IFFT) : Inverse Fast Fourier Transform) processing The image thus obtained is called an FFT filtered image. The filtered image is an image in which periodic components are extracted from a Cs-corrected high-resolution TEM image. This shows the child array.

[0322] In Figure 62(D), the area where the lattice arrangement is disturbed is shown by a broken line. The area indicated by the broken line is the connection between the pellets. The broken line indicates the hexagonal shape of the pellet. The shape of the let is not limited to a regular hexagon, but is often a non-regular hexagon.

[0323] In Figure 62(E), a point is drawn between an area with a uniform lattice arrangement and an area with a different uniform lattice arrangement. The grain boundaries are shown by lines. Even near the dotted lines, no clear grain boundaries can be seen. When connecting the surrounding lattice points around a nearby lattice point, a distorted hexagon, pentagon, or / and heptagon is formed. In other words, by distorting the lattice arrangement, the formation of grain boundaries can be suppressed. This is because the CAAC-OS has a close-packed atomic arrangement in the ab-plane direction. The bond distance between atoms changes when metal elements are substituted. , it is believed that this is because distortion can be tolerated.

[0324] As described above, the CAAC-OS has a c-axis orientation and is Multiple pellets (nanocrystals) are connected to form a distorted crystal structure. AAC-OS, CAA crystal(c-axis-aligned abp It can also be called an oxide semiconductor with lane-anchored crystals. Cut.

[0325] CAAC-OS is an oxide semiconductor with high crystallinity. Conversely, CAAC-O may be affected by contamination or defect formation. S can be considered an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0326] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon are more oxidative than metal elements that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0327] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or For example, oxygen vacancies in oxide semiconductors can act as carrier traps. In some cases, the SiO 2 traps hydrogen and becomes a carrier generation source.

[0328] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. There is. Specifically, 8×10 11 pieces / cm 3 Less than 1 x 10 11 / cm 3 less than , and more preferably 1 × 10 10 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 The above Such an oxide semiconductor can be obtained by using a high-purity pure oxide semiconductor. CAAC-OS is a highly pure or substantially highly pure intrinsic oxide semiconductor. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0329] <nc-os> Next, we will explain nc-OS.

[0330] We will explain the analysis of nc-OS by XRD. However, when structural analysis was performed using the out-of-plane method, no peaks indicating orientation appeared. That is, the crystals of the nc-OS do not have any orientation.

[0331] For example, an nc-OS having InGaZnO4 crystals was thinned to a thickness of 34 nm. When an electron beam with a probe diameter of 50 nm is incident parallel to the surface to be formed on the region m, the A ring-shaped diffraction pattern (nanobeam electron diffraction pattern) as shown in 3(A) was observed. In addition, the diffraction pattern ( The nanobeam electron diffraction pattern is shown in Figure 63(B). Therefore, the nc-OS probe diameter is 50 nm. However, when an electron beam with a probe diameter of 1 nm is incident, the order is not observed. Order is confirmed by injecting light.

[0332] In addition, when an electron beam with a probe diameter of 1 nm is incident on an area with a thickness of less than 10 nm, As shown in FIG. 63(C), an electron diffraction pattern in which spots are arranged in a substantially regular hexagonal shape is observed. Therefore, it is possible to assume that the nc-OS is ordered in the range of thickness less than 10 nm. It can be seen that the crystals have highly ordered regions, i.e., crystals. Therefore, there are some areas where a regular electron diffraction pattern is not observed.

[0333] Figure 63(D) shows the Cs-corrected height of the cross section of nc-OS observed from a direction approximately parallel to the surface on which the film was formed. The nc-OS is shown in the high-resolution TEM image, with the areas indicated by the auxiliary lines. How to identify the crystal areas and areas where no clear crystal areas can be identified The crystal parts contained in the nc-OS have a size of 1 nm to 10 nm. The size of the crystal is often between 1 nm and 3 nm. An oxide semiconductor with a size of greater than 10 nm and less than 100 nm is called a microcrystalline oxide semiconductor (microcrystalline oxide semiconductor). It is sometimes called a polycrystalline oxide semiconductor. For example, in the case of nc-OS, the grain boundaries cannot be clearly identified in high-resolution TEM images. It is possible that the nanocrystals originate from the same source as the pellets in CAAC-OS. Therefore, the crystalline part of nc-OS may be referred to as pellets below.

[0334] In this way, nc-OS can be used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially The atomic arrangement has periodicity in the region of 1 nm to 3 nm. In the case of the SiO2 film, there is no regularity in the crystal orientation between different pellets. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous OS. In some cases, it may be difficult to distinguish them from solid oxide semiconductors.

[0335] In addition, since there is no regularity in the crystal orientation between the pellets (nanocrystals), nc-OS , oxidation with RANC (Random Aligned nanocrystals) semiconductors or NANC (Non-Aligned nanocrystals) The oxide semiconductor may also be called an oxide semiconductor.

[0336] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, in nc-OS, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0337] <a-like OS> The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor.

[0338] Figure 64 shows a high-resolution cross-sectional TEM image of the a-like OS. is a high-resolution cross-sectional TEM image of the a-like OS at the start of electron irradiation. B) is 4.3 x 10 8 e - / nm 2 electrons (e - ) a-like OS after irradiation High-resolution cross-sectional TEM images are shown in Figures 64(A) and 64(B). It can be seen that striped bright regions extending in the vertical direction are observed in S from the start of electron irradiation. It can also be seen that the shape of the bright regions changes after electron irradiation. It is assumed to be a density region.

[0339] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the structural changes caused by electron irradiation.

[0340] As samples, a-like OS, nc-OS, and CAAC-OS were prepared. Both samples are In-Ga-Zn oxides.

[0341] First, high-resolution cross-sectional TEM images of each sample are acquired. All of the materials have crystalline parts.

[0342] The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn It is known that the structure has a total of nine layers, six of which are -O layers, stacked in layers along the c-axis. The distance between these adjacent layers is determined by the lattice spacing (also called the d value) of the (009) plane. The value is about the same, and is calculated to be 0.29 nm from crystal structure analysis. In the following, the area where the lattice spacing is 0.28 nm or more and 0.30 nm or less is referred to as InGaZ. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal. do.

[0343] Figure 65 shows an example of investigating the average size of the crystal parts (22 to 30 locations) of each sample. The length of the lattice fringes mentioned above is the size of the crystal part. e The crystal part of the OS grows in size according to the cumulative amount of electron irradiation used to obtain the TEM image. From Figure 65, it can be seen that in the early stages of TEM observation, the size of the particles is about 1.2 nm. The part of the crystal that was left behind (also called the initial nucleus) is filled with electrons (e - ) cumulative exposure is 4.2 × 10 8 e - / nm 2 On the other hand, it can be seen that the size of the crystals grows to about 1.9 nm in the case of n For c-OS and CAAC-OS, the cumulative electron irradiation dose was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of Figure 65. Therefore, the size of the crystalline parts of nc-OS and CAAC-OS is constant regardless of the cumulative electron irradiation dose. , and are approximately 1.3 nm and 1.8 nm, respectively. The Hitachi transmission electron microscope H-9000NAR was used for the TEM observations. The conditions were an acceleration voltage of 300 kV and a current density of 6.7 × 10 5 e - / (nm 2 ·s), irradiation area The diameter of the region was set to 230 nm.

[0344] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in nc-OS and CAAC-OS, the growth of the crystals by electron irradiation is almost nonexistent. In other words, a-like OS is not seen in comparison with nc-OS and CAAC-OS. , it is clear that this is an unstable structure.

[0345] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal of the same composition. The density of the nc-OS is 78.6% or more and less than 92.3% of that of the nc-OS. The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0346] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 That is it. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, And the density of the a-like OS is 5.0 g / cm 3 or more and less than 5.9 g / cm 3 . Further , for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio] , the density of the nc-OS and the density of the CAAC-OS are 5.9 g / cm 3 or more and less than 6.3 g / cm 3 .

[0347] In addition, when there is no single crystal of the same composition, by combining single crystals with different compositions at an arbitrary ratio , the density corresponding to the single crystal in the desired composition can be estimated. The density corresponding to the single crystal of the desired composition may be estimated using the weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible .

[0348] As described above, the oxide semiconductor has various structures and each has various characteristics. In addition, the oxide semiconductor may be, for example, a laminated film having two or more of an amorphous oxide semiconductor, a-like OS, nc-OS , and CAAC-OS.

[0349] <Method for forming CAAC-OS>[[]] Hereinafter, an example of a method for forming CAAC-OS will be described.

[0350] FIG. 66 is a schematic diagram of a film formation chamber. CAAC-OS can be formed by a sputtering method .

[0351] As shown in FIG. 66, the substrate 5220 and the target 5230 are arranged to face each other . There is a plasma 5240 between the substrate 5220 and the target 5230 ​A heating mechanism 5260 is provided below the substrate 5220. Although not shown, the target 5230 is bonded to the backing plate. A number of magnets are placed facing the magnet 5230. The sputtering method that uses magnetron sputtering to increase the deposition rate is called magnetron sputtering. can be.

[0352] The distance d between the substrate 5220 and the target 5230 (target-substrate distance (TS distance) The distance is 0.01 m or more and 1 m or less, preferably 0.02 m or more and 0.5 m or less. The deposition chamber is mostly filled with deposition gas (e.g., oxygen, argon, or oxygen in a volume of 5). % or more), and the pressure is 0.01 Pa or more and 100 Pa or less, preferably is controlled to be 0.1 Pa or more and 10 Pa or less. By applying a voltage, a discharge starts and plasma 5240 is observed. A high density plasma region is formed near the nozzle 5230 by the magnetic field. In the region, the deposition gas is ionized to generate ions 5201. , for example, oxygen cations (O + ) and argon cations (Ar + ) etc.

[0353] The target 5230 has a polycrystalline structure having a plurality of crystal grains, and As an example, FIG. 67 shows a target 5230 containing InMZn O4 (element M is, for example, Al, Ga, Y, or Sn). A) The crystal structure of InMZnO4 when observed parallel to the b axis. In ZnO4 crystals, the oxygen atoms have a negative charge, so two adjacent M-Zn Therefore, the InMZnO4 crystal has two adjacent M -Zn-O layer has a cleavage plane between them.

[0354] Ions 5201 generated in the high-density plasma region are attracted to the target 5230 by the electric field. The particles are accelerated and eventually collide with the target 5230. At this time, flat or planar particles are formed from the cleavage plane. Pellets 5200, which are pellet-shaped sputtered particles, are peeled off (see FIG. 66). 200 is the part sandwiched between the two cleavage planes shown in FIG. 67(A). When only 200 is extracted, the cross section looks like Figure 67(B), and the top surface looks like Figure 67(C). It can be seen that the pellet 5200 is formed by the impact of the collision of the ion 5201. This may cause distortion of the structure.

[0355] The pellet 5200 is a flat or pellet-shaped pellet having a triangular, for example, equilateral triangular, plane. Alternatively, the pellet 5200 may have a hexagonal, for example, regular hexagonal, plane. The sputtered particles are in the form of plates or pellets. However, the shape of the pellets 5200 is not limited to triangles or hexagons, for example, when it is a shape made up of multiple triangles For example, a quadrilateral (e.g., a rhombus) is formed by joining two triangles (e.g., an equilateral triangle). ) may also be used.

[0356] The thickness of the pellet 5200 is determined depending on the type of deposition gas. 5200 has a thickness of 0.4 nm or more and 1 nm or less, preferably 0.6 nm or more and 0.8 nm or less. For example, the pellet 5200 has a width of 1 nm or more and 100 nm or less, preferably Preferably, the thickness is 2 nm or more and 50 nm or less, and more preferably, 3 nm or more and 30 nm or less. The target 5230 having In-M-Zn oxide is bombarded with ions 5201. As a result, a pellet 5 having three layers, an M-Zn-O layer, an In-O layer and an M-Zn-O layer, was obtained. As the pellet 5200 peels off, particles are released from the target 5230. Particle 5203 is also ejected. Particle 5203 has a collection of one atom or several atoms. Therefore, particles 5203 are called atomic particles. It is also possible.

[0357] As the pellet 5200 passes through the plasma 5240, its surface becomes negatively or positively charged. For example, when the pellet 5200 is in the plasma 5240, 2- negative charge from As a result, the oxygen atoms on the surface of the pellet 5200 may become negatively charged. In addition, when the pellet 5200 passes through the plasma 5240, It may grow by combining with indium, element M, zinc, or oxygen in 40. .

[0358] The pellets 5200 and particles 5203 that have passed through the plasma 5240 are Some of the particles 5203 are small in mass and can be removed by a vacuum pump or other device. It may be discharged to the outside.

[0359] Next, the deposition of pellets 5200 and particles 5203 on the surface of the substrate 5220 is described. This will be explained using FIG.

[0360] First, the first pellet 5200 is deposited on the substrate 5220. The pellet 5200 is a flat plate. Since the pellet 52 has a shape like a flat surface, it is deposited with the flat surface facing the surface of the substrate 5220. The charge on the surface of 00 on the substrate 5220 side is released through the substrate 5220.

[0361] Next, the second pellet 5200 reaches the substrate 5220. At this time, the already deposited The surface of the first pellet 5200 and the surface of the second pellet 5200 are charged. As a result, the second pellet 5200 is pushed into the pile already. Avoiding the pellets 5200 on which the substrate 5220 is stacked, place the flat side a little away from the surface of the substrate 5220. The deposition is performed on the surface of the substrate 5220. By repeating this process, the surface of the substrate 5220 Countless pellets 5200 are piled up to the thickness of one layer. , an area where the pellets 5200 are not deposited is generated (see FIG. 68(A)).

[0362] Next, the particles 5203 that have received energy from the plasma reach the surface of the substrate 5220. The particles 5203 can be deposited in active areas such as the surface of the pellet 5200. Therefore, the particles 5203 move to the area where the pellet 5200 is not deposited, and the pellet The particle 5203 adheres to the side of the nozzle 5200. The bond becomes more active, and the pellet 5200 is chemically bonded to the lateral growth portion 52 Form 02 (see Figure 68(B)).

[0363] Furthermore, the laterally growing portion 5202 grows in the lateral direction (also called lateral growth), The pellets 5200 are connected to each other (see FIG. 68(C)). Lateral growth 5202 is formed until the undeposited area is filled. Deposition mechanism of atomic layer deposition (ALD) method Similar to a rhythm.

[0364] Therefore, even if the pellets 5200 are piled up in different directions, Particles 5203 grow laterally and fill the gaps between particles 5200, forming clear grain boundaries. In addition, the particles 5203 smoothly connect the pellets 5200. Therefore, a crystal structure different from either single crystal or polycrystal is formed. A crystalline structure having distortion between the crystalline regions (pellets 5200) is formed. The regions filling the gaps are distorted crystalline regions, so it is not appropriate to refer to these regions as amorphous structures. It is considered not to be a good idea.

[0365] Next, a new pellet 5200 is deposited with its flat side facing the surface of the substrate 5220 (FIG. 68(D)). Then, the particles 5203 penetrate the undeposited areas of the pellet 5200. By depositing the layer so as to fill the gap, a lateral growth portion 5202 is formed (see FIG. 68(E)). Then, the particles 5203 adhere to the side of the pellet 5200, and the lateral growth portion 5202 grows laterally. By doing so, the pellets 5200 in the second layer are connected (see Figure 68(F)). m is an integer of 2 or more. The film formation continues until a thin film structure having a laminate is formed.

[0366] The deposition pattern of the pellets 5200 also changes depending on the surface temperature of the substrate 5220. For example, if the surface temperature of the substrate 5220 is high, the pellet 5200 may be heated to the surface of the substrate 5220. As a result, the pellets 5200 are interdigitated with the particles 5203. The proportion of bonds without any bonds increases, resulting in a CAAC-OS with higher orientation. The surface temperature of the substrate 5220 during the formation of the OS film is set to be equal to or higher than room temperature and lower than 340° C., preferably room temperature. and 300°C or less, more preferably 100°C or more and 250°C or less, and even more preferably 100°C or more and 250°C or less. ℃ or more and 200 ℃ or less. Therefore, the substrate 5220 is a large-area substrate of the 8th generation or more. Even when using a CAAC-OS film, warping and other problems caused by the film formation hardly occur. I understand.

[0367] On the other hand, when the surface temperature of the substrate 5220 is low, the pellet 5200 moves to the surface of the substrate 5220. As a result, pellets 5200 do not pile up. In the case of nc-OS, the pellet 5200 is negatively charged. As a result, the pellets 5200 may be deposited at regular intervals. Although the orientation is low, the film has a slight regularity, which makes it more uniform than an amorphous oxide semiconductor. The entire structure is dense.

[0368] In addition, in CAAC-OS, the gaps between pellets are extremely small, Large pellets of different sizes may be formed. The inside of one large pellet has a single crystal structure. For example, the size of the pellet is 10 nm or more and 200 nm or less when viewed from the top. It may be between 100 nm and 100 nm, or between 20 nm and 50 nm.

[0369] According to the above film formation model, it is believed that pellets are deposited on the surface of the substrate. CAAC-OS can be deposited even on surfaces that do not have a crystalline structure. Therefore, the above-mentioned film formation model, which is a growth mechanism different from epitaxial growth, is highly valid. In addition, because this is the deposition model described above, the CAAC-OS and nc-OS It can be seen that uniform film formation is possible even on large glass substrates. For example, Even if the structure of the substrate surface (surface to be formed) is amorphous (for example, amorphous silicon oxide), It is possible to form a CAAC-OS film.

[0370] In addition, even if the surface of the substrate on which the film is to be formed is uneven, the pellets will adhere to the shape of the uneven surface. It is clear that the arrangement is

[0371] In addition, from the above-mentioned film formation model, the following conditions are required to form a CAAC-OS film with high crystallinity: First, in order to lengthen the mean free path, we need to create a higher vacuum. Next, to reduce damage near the substrate, the plasma energy is Next, heat energy is applied to the surface to be formed, and the damage caused by the plasma is weakened each time a film is formed. It will heal.

[0372] In addition, the above-mentioned film formation model is based on the In-M-Zn oxide target with multiple crystal grains. When a complex oxide has a polycrystalline structure such as a crystalline material, and one of the crystal grains contains a cleavage plane, For example, a mixture of indium oxide, an oxide of element M, and zinc oxide may be used. The present invention can also be applied to the case where an object target is used.

[0373] The target of the mixture does not have a cleavage plane, so when sputtered, atoms are released from the target. During film formation, a strong electric field region of plasma is formed near the target. Therefore, atomic particles detached from the target are connected by the action of the strong electric field region of the plasma. They combine and grow laterally. For example, first, indium, which is an atomic particle, combines and grows laterally to form In -O layer nanocrystals. Next, M-Zn-O layers combine vertically to complement it. Thus, even when using a mixture target, there is a possibility of forming pellets. Therefore, even when using a mixture target, the above-described film formation model can be applied.

[0374] However, when a strong electric field region of plasma is not formed near the target, only atomic particles peeled off from the target will be deposited on the substrate surface. In that case as well, atomic particles may grow laterally on the substrate surface. However, since the orientation of the atomic particles is not uniform, the crystal orientation in the obtained thin film will not be uniform either. That is, it will be nc-OS or the like.

[0375] This embodiment can be implemented in appropriate combination with at least some of the other embodiments described in this specification.

[0376] (Embodiment 3) <Configuration of CAC> Hereinafter, the configuration of CAC (Cloud Aligned Complementary)-OS that can be used in one aspect of the present invention will be described.

[0377] CAC is, for example, a configuration of a material in which the elements constituting the oxide semiconductor are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof. Note that hereinafter, in the oxide semiconductor, one or more metal elements are unevenly distributed, and the region having the metal element is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less. nm or less. ​The mixed state of particles with sizes of less than 1 nm or close to that size is called a mosaic or patch state. cormorant.

[0378] For example, CAC-IGZ in In-Ga-Zn oxide (hereinafter also referred to as IGZO) O is indium oxide (hereinafter referred to as InO X1 (X1 is a real number greater than 0.) , or indium zinc oxide (hereinafter referred to as In X2 Zn Y2 O Z2 (X2, Y2, and Z 2 is a real number greater than 0) and gallium oxide (GaO X3 (X3 is 0 ), or gallium zinc oxide (Ga X4 Zn Y4 O Z4 (X4, Y4, and Z4 are real numbers greater than 0.) This results in a mosaic pattern, and the mosaic InO X1 , or In X2 Zn Y2 O Z2 However, the structure is such that the particles are uniformly distributed in the film (hereinafter also referred to as a cloud-like structure).

[0379] In other words, CAC-IGZO is GaO X3 The region where In is the main component and X2 Zn Y2 O Z 2, or InO X1 A composite oxide semiconductor having a structure in which a region in which In this specification, for example, the ratio of an In atom to the element M in the first region is The atomic ratio of In to element M in the first region is greater than the atomic ratio of In to element M in the second region. , the concentration of In is higher than that of the first region.

[0380] Note that IGZO is a common name and refers to a compound composed of In, Ga, Zn, and O in some cases. Representative examples include InGaO3(ZnO) (where m1 is a natural number), or In m1 (m1 is a natural number), or In ( 1+x0) Ga (1-x0) O3(ZnO) m0 (-1 ≤ x0 ≤ 1, m0 is an arbitrary number), and crystalline compounds represented by this are included.

[0381] The above crystalline compound has a single crystal structure, polycrystalline structure, or CAAC structure. Note that the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected without orientation in the a-b plane.

[0382] On the other hand, CAC relates to the material composition. CAC refers to a structure in which regions observed as nanoparticle-like with Ga as the main component and regions observed as nanoparticle-like with In as the main component are randomly dispersed mosaically in a material composition containing In, Ga, Zn, and O. Therefore, in CAC, the crystal structure is a secondary element.

[0383] The CAC does not include a laminated structure of two or more types of films with different compositions. For example, a structure composed of two layers of a film with In as the main component and a film with Ga as the main component is not included.

[0384] Note that there may be cases where no clear boundary can be observed between the region where GaO X3 is the main component and the region where In X2 Zn Y2 O Z2 , or InO X1 is the main component.

[0385] <Analysis of CAC-IGZO> Next, various measurement methods were used to measure the oxide semiconductor film formed on the substrate. This article explains:

[0386] <Sample structure and preparation method> Nine samples according to one embodiment of the present invention are described below. Each sample is The substrate temperature and oxygen gas flow rate ratio during film formation of the nitride semiconductor are varied. The sample has a structure including a substrate and an oxide semiconductor on the substrate.

[0387] The method for preparing each sample will be explained below.

[0388] First, a glass substrate is used as the substrate. Then, a sputtering device is used to deposit the glass A 100 nm thick In-Ga-Zn oxide film was formed on the substrate as an oxide semiconductor. The film conditions were a pressure in the chamber of 0.6 Pa, and an oxide target ( In:Ga:Zn=4:2:4.1 [atomic ratio]) is used. An AC power of 2500 W is supplied to an oxide target placed inside the furnace.

[0389] As a condition for forming an oxide film, the substrate temperature is set to a temperature at which the substrate is not intentionally heated (hereinafter, RT, 130°C, or 170°C. Also, a mixture of Ar and oxygen gas The flow rate ratio of oxygen gas to the air (hereinafter referred to as oxygen gas flow rate ratio) is set to 10%, 30%, or 9 samples are prepared by setting the ratio at 100% or 100%.

[0390] <X-ray diffraction analysis> In this section, X-ray diffraction (XRD) was performed on nine samples. The results of the measurements will be explained below. The XRD equipment used was a Bruker D 8 ADVANCE was used. The conditions were θ / 2 In θ scan, the scanning range is 15° to 50°, and the step width is 0.02 deg. g., and the scanning speed was 3.0 deg. / min.

[0391] Figure 84 shows the results of measuring the XRD spectrum using the out-of-plane method. In addition, in Figure 84, the upper part shows the measurement results for a sample where the substrate temperature during film formation was 170°C. As a result, the middle row shows the measurement results for a sample with a substrate temperature of 130°C during film formation, and the bottom row shows the measurement results for a sample with a substrate temperature of 130°C during film formation. The left column shows the measurement results for samples with a substrate temperature of RT. The center column shows the measurement results for the sample with a flow rate ratio of 10%. The center column shows the measurement results for the sample with a flow rate ratio of 3%. The right column shows the measurement results for the sample with a 0% oxygen gas flow rate, and the right column shows the measurement results for the sample with a 100% oxygen gas flow rate. The measurement results are shown below.

[0392] The XRD spectrum shown in Figure 84 shows that the film thickness increases when the substrate temperature is increased or when the amount of oxygen used during film formation is increased. Increasing the gas flow rate ratio increases the peak intensity around 2θ=31°. The peak at 2θ=31° indicates that the c-axis is oriented in the direction approximately perpendicular to the surface on which the film is formed or the upper surface. crystalline IGZO compound (CAAC(c-axis aligned crystall It is also called ine)-IGZO. ) is known to be derived from the fact that

[0393] In addition, the XRD spectrum shown in Figure 84 shows that the substrate temperature during film formation was low or the oxygen gas flow The smaller the ratio of the amount of SiO2, the less clear the peak. Alternatively, the sample with a small oxygen gas flow rate may have ab-plane and c-axis orientations in the measurement area. It turns out that it cannot be seen.

[0394] <Analysis by electron microscope> In this section, the samples were prepared at a substrate temperature of RT during film formation and an oxygen gas flow rate of 10%. ,HAADF(High-Angle Annular Dark Field)-ST EM(Scanning Transmission Electron Micros) The results of the observation and analysis using HAADF-S are described below (hereafter referred to as HAADF-S). Images obtained by TEM are also called TEM images.

[0395] Planar images obtained by HAADF-STEM (hereinafter also referred to as planar TEM images), and The results of image analysis of the cross-sectional images (hereinafter also referred to as cross-sectional TEM images) will be described below. The TEM images were observed using a spherical aberration correction function. The atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. was used for the photographs. The electron beam was irradiated at an acceleration voltage of 200 kV with a beam diameter of approximately 0.1 nmφ.

[0396] Figure 85(A) shows the results of a sample prepared at a substrate temperature of RT during film formation and an oxygen gas flow rate of 10%. Figure 85(B) shows the substrate temperature RT and oxygen gas concentration during film formation. This is a cross-sectional TEM image of a sample prepared at a flow rate ratio of 10%.

[0397] <Electron diffraction pattern analysis> In this section, the sample was prepared at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. By irradiating an electron beam with a probe diameter of 1 nm (also called a nano-beam electron beam), The results of the X-ray diffraction pattern obtained will be explained below.

[0398] As shown in Figure 85(A), the film was formed at a substrate temperature of RT and an oxygen gas flow rate of 10%. In the planar TEM image of the sample, black spots a1, a2, a3, a4, and The electron beam diffraction pattern shown in a5 is observed. While irradiating the light, move the light at a constant speed from the 0-second position to the 35-second position. The results for black point a1 are shown in Figure 85(C), the results for black point a2 are shown in Figure 85(D), and the results for black point a3 are shown in Figure 85( The results for black point a4 are shown in Figure 85(E), the results for black point a4 are shown in Figure 85(F), and the results for black point a5 are shown in Figure 85(G).

[0399] From Figure 85(C), Figure 85(D), Figure 85(E), Figure 85(F), and Figure 85(G), A bright area can be observed in a circular (ring-like) pattern. Several spots can be observed.

[0400] In addition, as shown in FIG. 85(B), when the substrate temperature during film formation is RT and the oxygen gas flow rate ratio is 10%, In the cross-sectional TEM image of the prepared sample, black spots b1, b2, b3, b4, and Observe the electron diffraction patterns indicated by black spots b1 and b5. The results of black point b2 are shown in Figure 85(I), the results of black point b3 are shown in Figure 85(J), and the results of black point b4 are shown in Figure 85( The results for black point b5 are shown in Figure 85(L).

[0401] From Figure 85(H), Figure 85(I), Figure 85(J), Figure 85(K), and Figure 85(L), A ring-shaped area of ​​high brightness can be observed. Also, multiple spots can be observed in the ring-shaped area. can.

[0402] Here, for example, for a CAAC-OS having InGaZnO4 crystals, When an electron beam with a probe diameter of 300 nm is incident on the InGaZnO4 crystal, ) planes. It is clear that the film has a c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface. On the other hand, an electron beam with a probe diameter of 300 nm is incident perpendicularly to the sample surface. When the diffraction pattern is measured, a ring-shaped diffraction pattern is observed. It can be seen that the axes have no orientation.

[0403] In addition, oxide semiconductors having microcrystals (nano crystalline oxide semiconductor. Hereafter referred to as nc-OS.) For example, when electron diffraction is performed using an electron beam of 50 nm or more, a halo pattern is observed. In addition, a small probe diameter electron beam (e.g. When nanobeam electron diffraction is performed using a material with a diameter of less than 50 nm, bright spots are observed. In addition, when nanobeam electron diffraction is performed on nc-OS, a circular (ring-shaped) structure is observed. ) A bright area may be observed. In addition, multiple bright spots may be observed in a ring-shaped area. This may be the case.

[0404] The electron diffraction pattern of the sample prepared at the substrate temperature RT during film formation and with an oxygen gas flow rate of 10% The turn has a ring-shaped area of ​​high brightness and multiple bright spots in the ring area. The sample fabricated at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation was analyzed by electron beam diffraction. The pattern becomes nc-OS and has no orientation in the planar direction or cross-sectional direction. .

[0405] From the above, an oxide semiconductor formed at a low substrate temperature or a low oxygen gas flow rate ratio has the following properties: It is clearly different from both an oxide semiconductor film with an amorphous structure and an oxide semiconductor film with a single crystal structure. It can be assumed that it has the properties.

[0406] ≪Elemental analysis≫ In this article, we will discuss energy dispersive X-ray spectroscopy (EDX). EDX mapping was obtained and evaluated using X-ray spectroscopy. By this, the film was produced at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. The results of the elemental analysis of the sample are explained below. The EDX measurement was carried out using an elemental analyzer and The energy dispersive X-ray analyzer JED-2300T manufactured by JEOL Ltd. is used. A Si drift detector is used to detect the X-rays emitted from the sample.

[0407] In EDX measurement, each point in the analysis area of ​​the sample is irradiated with an electron beam, and the resulting The energy and frequency of characteristic X-rays of the material are measured, and an EDX spectrum corresponding to each point is obtained. In this embodiment, the peaks in the EDX spectrum at each point are determined as electron transitions to the L shell of the In atom. , electron transition to the K shell of Ga atom, electron transition to the K shell of Zn atom, and electron transition to the K shell of O atom The ratio of each atom at each point is calculated. By performing EDX analysis on a region, it is possible to obtain EDX mapping that shows the distribution of the ratio of each atom. This can be done.

[0408] Figure 86 shows the results of the sample fabricated at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. Figure 86(A) shows EDX mapping of Ga atoms ( The ratio of Ga atoms to all atoms is in the range of 1.18 to 18.64 [atomic%]. ) Figure 86(B) shows the EDX mapping of In atoms (the ratio of In atoms to all atoms). The ratio is in the range of 9.28 to 33.74 [atomic%]. C) EDX mapping of Zn atoms (ratio of Zn atoms to total atoms is 6.69 to 2.0). 4.99 [atomic%] range.) Also, Figure 86(A) and Figure 86(B) ), and Figure 86(C) shows the results when the substrate temperature during film formation was RT and the oxygen gas flow rate was 10%. The cross section of the prepared sample shows the same area. The more elements measured in the range, the brighter it becomes, and the less elements measured, the darker it becomes. The ratio of elements is shown by light and dark. The magnification of the EDX mapping shown in Figure 86 is 7.2 million. It's double.

[0409] In the EDX mapping shown in Figure 86(A), Figure 86(B), and Figure 86(C), the images show The relative distribution of light and dark is observed. The substrate temperature during film formation is RT, and the oxygen gas flow rate is 10%. In the sample prepared in step 1, it can be seen that each atom exists with its own distribution. , the area enclosed by the solid line and the area enclosed by the dashed line shown in Figure 86(A), Figure 86(B), and Figure 86(C) Pay attention to the range.

[0410] In Figure 86(A), the area enclosed by the solid line contains many relatively dark areas, and the area enclosed by the dashed line contains many relatively dark areas. , contains many relatively bright areas. Also, in Figure 86(B), the area enclosed by the solid line is relatively The area surrounded by the dashed line contains many bright areas, while the area surrounded by the dashed line contains many relatively dark areas.

[0411] In other words, the area surrounded by the solid line is the area where the In atoms are relatively abundant, and the area surrounded by the dashed line is the area where the In atoms are relatively abundant. In Figure 86(C), in the area surrounded by the solid line, The right side is a relatively bright area, and the left side is a relatively dark area. The range is In X2 Zn Y2 O Z2 , or InO X1 This is the area where the main components are:

[0412] The area surrounded by the solid line is the area where the number of Ga atoms is relatively small, and the area surrounded by the dashed line is the area where the number of Ga atoms is relatively small. In Figure 86(C), the area surrounded by the dashed line is the upper left area. The area at the bottom right is a relatively bright area, and the area at the bottom right is a relatively dark area. The area enclosed by the line is GaO X3 , or Ga X4 Zn Y4 O Z4 In the area where the main components are be.

[0413] Also, from Figure 86(A), Figure 86(B), and Figure 86(C), the distribution of In atoms is The atoms are relatively uniformly distributed, and X1 The region where is the main component is In X2 Zn Y2 O Z2 It appears that they are connected to each other through the area where In this way, X2 Zn Y2 O Z2 , or InO X1 The area where is the main component is It is formed in a loud, spreading shape.

[0414] Thus, GaO X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 In-Ga-Zn oxide with a structure in which the regions in which The material can be called CAC-IGZO.

[0415] The crystal structure of CAC is an nc structure. The nc structure of CAC is In the X-ray diffraction pattern, bright spots originating from IGZO including single crystal, polycrystalline, and CAAC structures In addition to the spot, there are several bright spots. In addition to the bright spots, the crystal structure is defined as a ring-shaped area of ​​high brightness. do.

[0416] Also, from Figures 86(A), 86(B), and 86(C), GaO X3 is the main component Areas where X2 Zn Y2 O Z2 , or InO X1 The size of the region where is the principal component is The observed size is 0.5 nm or more and 10 nm or less, or 1 nm or more and 3 nm or less. In EDX mapping, the diameter of the area where each metal element is the main component is 1 nm or more. The thickness should be 2 nm or less.

[0417] From the above, CAC-IGZO has a structure different from that of IGZO compounds in which metal elements are uniformly distributed. CAC-IGZO has a structure different from that of IGZO compounds. X3 The region where In is the main component. X2 Zn Y2 O Z2 , or InO X1 is the main component The structure is such that the regions with each element as the main component are separated into phases, forming a mosaic. Therefore, when CAC-IGZO is used in a semiconductor device, GaO X3 Due to factors such as Properties and In X2 Zn Y2 O Z2 , or InO X1 The properties resulting from this act in a complementary manner. This results in a high on-state current (I on ), and high field-effect mobility (μ) It is possible.

[0418] In addition, semiconductor devices using CAC-IGZO are highly reliable. O is ideal for a variety of semiconductor devices, including displays.

[0419] This embodiment may be appropriately combined with at least a part of another embodiment described in this specification. It can be implemented in combination.

[0420] (Fourth embodiment) In this embodiment, instead of the transistors 150a and 150b shown in the above embodiment, An example of a transistor that can be used in addition to the above will be described with reference to the drawings. The transistor disclosed in the embodiment can also be used as the transistor 301. .

[0421] The display device 310 of one embodiment of the present invention includes a bottom-gate transistor and a top-gate transistor. The transistors can be manufactured using various types of transistors such as a GaN type transistor. The semiconductor layer materials and transistor structures used can be easily adjusted to fit existing production lines. It can be replaced.

[0422] [Bottom-gate transistor] FIG. 69(A1) shows a channel protection transistor, which is a type of bottom gate transistor. 69(A1) is a cross-sectional view of a transistor 810. In FIG. 69(A1), the transistor 810 is The transistor 810 is formed on a substrate 771 with an insulating layer 772 formed on the substrate 771. The semiconductor layer 742 is formed on the electrode 746 with an insulating layer 726 interposed therebetween. The electrode 746 can function as a gate electrode. The insulating layer 726 can function as a gate insulating layer. It can function as such.

[0423] In addition, an insulating layer 741 is provided over a channel formation region of the semiconductor layer 742. Electrodes 744a and 744b are provided on the insulating layer 726 in contact with a portion of the insulating layer 742. Electrode 744a can function as either a source electrode or a drain electrode. , which can function as the other of the source electrode and the drain electrode. A portion of the electrode 744 b is formed on the insulating layer 741 .

[0424] The insulating layer 741 can function as a channel protection layer. By providing the insulating layer 1, the insulating layer 100 of the semiconductor layer 742 generated when the electrodes 744a and 744b are formed can be effectively prevented. Therefore, when the electrodes 744a and 744b are formed, the semiconductor This prevents the channel forming region of layer 742 from being etched. A transistor with good characteristics can be realized.

[0425] The transistor 810 has an insulating layer 744 a, an insulating layer 744 b, and an insulating film 741. It has an edge layer 728 and an insulating layer 729 on top of the insulating layer 728 .

[0426] The electrodes, semiconductor layers, insulating layers, and the like constituting the transistor disclosed in this embodiment are the same as those of other It can be formed using the materials and methods disclosed in the embodiments.

[0427] When an oxide semiconductor is used for the semiconductor layer 742, the electrode 744a and the electrode 744b At least in the area in contact with the semiconductor layer 742, oxygen is taken from a part of the semiconductor layer 742, and oxygen deficiency is formed. It is preferable to use a material that can generate oxygen vacancies in the semiconductor layer 742. The carrier concentration in the region where this occurs increases, and the region becomes n-type, forming an n-type region (n + layer) Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, oxygen is taken from the semiconductor layer 742, and oxygen vacancies occur. Examples of materials that can generate this include tungsten and titanium. Cut.

[0428] The source and drain regions are formed in the semiconductor layer 742, forming an electrode 744. Therefore, the contact resistance between the electrode 744a and the semiconductor layer 742 can be reduced. To improve the electrical characteristics of transistors, such as field effect mobility and threshold voltage. can be done.

[0429] When a semiconductor such as silicon is used for the semiconductor layer 742, the semiconductor layer 742 and the electrode 744 a, and between the semiconductor layer 742 and the electrode 744b, an n-type semiconductor or a p-type semiconductor is It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. , can function as the source or drain region of a transistor.

[0430] The insulating layer 729 has a function of preventing or reducing the diffusion of impurities into the transistor from the outside. It is preferable to form the insulating layer 729 using a material having the insulating properties. It can also be omitted.

[0431] Note that in the case where an oxide semiconductor is used for the semiconductor layer 742, the insulating layer 729 is formed before or after the insulating layer 729 is formed. Heat treatment may be performed after the formation of the insulating layer 729, or before or after the formation of the insulating layer 729. The oxygen contained in the insulating layer 729 and other insulating layers is diffused into the semiconductor layer 742, and the semiconductor layer The oxygen vacancies in the insulating layer 742 can be filled. Alternatively, the insulating layer 729 can be formed while being heated. By doing so, oxygen vacancies in the semiconductor layer 742 can be compensated for.

[0432] Generally, the CVD method is a plasma CVD (PECVD) method that uses plasma. sma Enhanced CVD method, and thermal CVD (TCVD) Furthermore, depending on the source gas used, it can be classified into metal CVD (MCV) and other methods. D: Metal CVD) method, metal organic CVD (MOCVD) method c CVD) method.

[0433] Generally, the evaporation method includes resistance heating evaporation, electron beam evaporation, MBE (Molecular Beam Evaporation), r Beam Epitaxy) method, PLD (Pulsed Laser Deposit) tion) method, IAD (Ion beam Assisted Deposition) These methods can be classified into the ALD (Atomic Layer Deposition) method and the ALD (Atomic Layer Deposition) method.

[0434] The plasma CVD method can produce high-quality films at relatively low temperatures. When using a deposition method that does not use plasma during deposition, damage occurs to the surface to be deposited. This makes it difficult to form a film with few defects.

[0435] Generally, the sputtering method is classified into DC sputtering method, magnetron sputtering method, sputtering method, RF sputtering method, ion beam sputtering method, ECR (Electron Cyclotron Resonance) Cyclotron Resonance sputtering method, facing targets It can be classified into methods such as sputtering.

[0436] In the facing target sputtering method, the plasma is confined between the targets. This reduces plasma damage to the substrate. This allows the incident angle of sputtering particles onto the substrate to be shallow, improving step coverage. It can be increased.

[0437] The transistor 811 shown in FIG. 69A2 has a gate insulating layer 729 and a gate insulating layer 729 formed thereon as a back gate electrode. The transistor 810 differs from the transistor 810 in that it has an electrode 723 that can function as a It can be made of the same materials and methods as pole 746 .

[0438] In general, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode form a semiconductor. The back gate electrode is disposed so as to sandwich the channel forming region of the gate electrode. The back gate electrode can be made to function in the same manner as the gate electrode. Alternatively, the potential may be a ground potential (GND potential) or any other potential. By varying the potential of the gate electrode independently of the potential of the gate electrode, the threshold voltage of the transistor can be controlled. The value voltage can be changed.

[0439] Both the electrode 746 and the electrode 723 can function as gate electrodes. Therefore, the insulating layer 726, the insulating layer 728, and the insulating layer 729 each serve as a gate insulating layer. The electrode 723 is provided between the insulating layer 728 and the insulating layer 729. It is okay to do so.

[0440] When one of the electrodes 746 and 723 is referred to as a "gate electrode," the other is referred to as a "bar For example, in the transistor 811, the electrode 723 is called a "gate electrode." When referring to "electrodes," the electrode 746 is referred to as a "back gate electrode." When the transistor 811 is used as a top gate electrode, In addition, either the electrode 746 or the electrode 723 can be considered as a type of The first gate electrode may be referred to as the "first gate electrode" and the other as the "second gate electrode."

[0441] By providing the electrode 746 and the electrode 723 with the semiconductor layer 742 sandwiched therebetween, the electrode 7 By setting the potential of the electrode 46 and the electrode 723 at the same potential, carriers flow in the semiconductor layer 742. The area becomes larger in the film thickness direction, and the amount of carrier movement increases. As the on-state current of the transistor 811 increases, the field-effect mobility also increases.

[0442] Therefore, the transistor 811 is a transistor having a large on-current relative to its area. That is, the area occupied by the transistor 811 is Therefore, a highly integrated semiconductor device can be realized.

[0443] In addition, the gate electrode and back gate electrode are formed from a conductive layer, so that the external The function of preventing the electric field generated by the The back gate electrode has a function of shielding the electric field against vapors and other harmful substances. By forming the semiconductor layer in a thin film and covering it with a back gate electrode, the electric field shielding function can be improved. do.

[0444] In addition, the electrode 746 and the electrode 723 each have the function of shielding an external electric field. Therefore, charges such as charged particles generated on the insulating layer 772 side or above the electrode 723 are transferred to the semiconductor layer This does not affect the channel formation region of 742. As a result, stress tests (e.g., applying load to the gate) GBT (Gate Bias-Temperature) stress test In addition, the on-current starts to flow depending on the magnitude of the drain voltage. This can reduce the phenomenon of the gate voltage (start-up voltage) changing. This effect occurs when electrode 746 and electrode 723 are at the same potential or at different potentials. .

[0445] The BT stress test is a type of accelerated test that detects the transitions that occur during long-term use. It is possible to evaluate the change in characteristics (aging) of a resistor in a short time. The amount of change in the threshold voltage of a transistor before and after testing is an important indicator for examining reliability. The smaller the threshold voltage fluctuation, the more reliable the transistor. do.

[0446] Also, the electrode 746 and the electrode 723 are provided, and the electrode 746 and the electrode 723 are at the same potential. By doing so, the amount of variation in threshold voltage is reduced. At the same time, the variation in electrical characteristics is reduced.

[0447] In addition, a transistor with a back gate electrode has a positive charge applied to the gate +GB The change in threshold voltage before and after the T-stress test was also Smaller than Zysta.

[0448] In addition, by forming the back gate electrode using a conductive film having a light-shielding property, This prevents light from entering the semiconductor layer from the electrode side, thereby preventing light degradation of the semiconductor layer. This prevents the deterioration of electrical characteristics, such as a shift in the threshold voltage of a transistor. do.

[0449] Figure 69(B1) shows a channel protection transistor, which is one of the bottom gate type transistors. 8 shows a cross-sectional view of transistor 820. Transistor 820 is similar to transistor 810. However, the difference is that the insulating layer 741 covers the semiconductor layer 742. In an opening formed by selectively removing a part of the insulating layer 741 that overlaps the semiconductor layer 742, The semiconductor layer 742 and the electrode 744a are electrically connected to each other. In another opening formed by selectively removing a part of the insulating layer 741, the semiconductor layer 742 is The region of the insulating layer 741 that overlaps with the channel forming region is electrically connected to the electrode 744b. The region can function as a channel protection layer.

[0450] The transistor 821 shown in FIG. 69B2 has a back gate electrode over the insulating layer 729. The transistor 820 differs from the transistor 820 in that it has an electrode 723 that can function as a transistor.

[0451] By providing the insulating layer 741, the semiconductor generated when the electrodes 744a and 744b are formed can be prevented. Therefore, the formation of the electrode 744a and the electrode 744b can be prevented. In some cases, it is possible to prevent the semiconductor layer 742 from becoming thin.

[0452] Also, the transistors 820 and 821 are the same as the transistors 810 and 821. The distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 744c are smaller than the distance between the electrode 744a and the electrode 746 and the electrode 744b. Therefore, the distance between the electrodes 744a and 746 is increased. In addition, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. Therefore, a transistor with good electrical characteristics can be realized.

[0453] The transistor 825 shown in FIG. 69(C1) is a bottom-gate transistor. The transistor 825 is a channel-etched transistor. The electrodes 744a and 744b are formed without using the A part of the semiconductor layer 742 that is exposed when the electrode 744b is formed may be etched. On the other hand, since the insulating layer 741 is not provided, productivity of the transistor can be increased.

[0454] The transistor 826 shown in FIG. 69C2 has a gate insulating layer 729 and a gate insulating layer 729 formed thereon as a back gate electrode. The transistor 724 differs from the transistor 825 in that it has an electrode 723 that can function as a transistor.

[0455] [Top-gate transistor] FIG. 70(A1) shows a transistor 830, which is a type of top-gate transistor. The transistor 830 includes a semiconductor layer 742 over an insulating layer 772. An electrode 744a in contact with a part of the semiconductor layer 742 and an insulating layer 772 are provided on the semiconductor layer 742 and the insulating layer 772. and an electrode 744b in contact with a part of the semiconductor layer 742. An insulating layer 726 is provided over the electrode 744b, and an electrode 746 is provided over the insulating layer 726.

[0456] Transistor 830 is connected between electrode 746 and electrode 744a, and between electrode 746 and electrode 744b. Since the electrodes 746 and 744b do not overlap, the parasitic capacitance between the electrodes 746 and 744a, In addition, the parasitic capacitance occurring between the electrode 746 and the electrode 744b can be reduced. After forming the electrode 746, the impurity 755 is introduced into the semiconductor layer using the electrode 746 as a mask. By introducing the ions into the semiconductor layer 742, the ions are self-aligned in the semiconductor layer 742. An impurity region can be formed (see FIG. 70(A3)). Therefore, it is possible to obtain a semiconductor device with good electrical characteristics. A transistor can be realized.

[0457] The impurity 755 is introduced by an ion implantation device, an ion doping device, or a plasma This can be done using a processing device.

[0458] The impurity 755 may be, for example, at least one of Group 13 elements or Group 15 elements. When an oxide semiconductor is used for the semiconductor layer 742, one kind of element can be used. contains at least one element selected from the group consisting of rare gases, hydrogen, and nitrogen as impurities 755. It is also possible to use

[0459] The transistor 831 shown in FIG. 70A2 has an electrode 723 and an insulating layer 727. The transistor 831 is formed on an insulating layer 772. The electrode 723 has an insulating layer 727 formed thereon. Therefore, the insulating layer 727 can function as a back gate electrode. The insulating layer 727 can function as a protective layer. It can be formed more easily.

[0460] Like transistor 811, transistor 831 has a large on-state current relative to its area. In other words, for the required on-current, the transistor Therefore, the area occupied by the semiconductor device 831 can be reduced. It is possible.

[0461] The transistor 840 illustrated in FIG. 70B1 is a top-gate transistor. The transistor 840 is formed by forming the electrodes 744a and 744b. The transistor 830 differs from the transistor 830 in that a dielectric layer 742 is formed. The transistor 841 has an electrode 723 and an insulating layer 727. In the transistor 840 and the transistor 841, the semiconductor layer 74 A part of the semiconductor layer 742 is formed on the electrode 744a, and another part of the semiconductor layer 742 is formed on the electrode 744b. It is done.

[0462] Like transistor 811, transistor 841 has a large on-state current relative to its area. In other words, for the required on-current, the transistor Therefore, it is possible to realize a highly integrated semiconductor device. It is possible.

[0463] The transistor 842 illustrated in FIG. 71A1 is a top-gate transistor. The transistor 842 is formed by forming the insulating layer 729 and then The transistor 830 and the transistor 840 differ in that the electrode 744b is formed. The electrodes 744a and 744b are semi-conductors formed in the openings in the insulating layers 728 and 729. It is electrically connected to the conductor layer 742 .

[0464] Also, a part of the insulating layer 726 that does not overlap with the electrode 746 is removed, and the electrode 746 and the remaining insulating layer 726 are separated. Impurities 755 are introduced into the semiconductor layer 742 using the layer 726 as a mask, thereby forming a semiconductor Impurity regions can be formed in a self-aligned manner in layer 742 ( In the top view of the transistor 842, the end of the insulating layer 726 is The semiconductor layer 742 has a region located outside the edge of the electrode 746. The impurity 755 is introduced into the semiconductor layer 742. When the impurity 755 is introduced, the impurity 755 is introduced through the insulating layer 726 of the semiconductor layer 742. The impurity concentration is lower than that of the region into which the impurity 755 is introduced without the insulating layer 726 interposed therebetween. Therefore, in the semiconductor layer 742, an LDD (Light Diode) is formed in the region adjacent to the portion overlapping with the electrode 746. A highly doped drain region is formed.

[0465] The transistor 843 shown in FIG. 71A2 has an electrode 723. 42. The transistor 843 has an electrode 723 formed on a substrate 771. The electrode 723 overlaps with the semiconductor layer 742 with the insulating layer 772 interposed therebetween. It can function.

[0466] In addition, the transistor 844 shown in FIG. 71(B1) and the transistor 845 shown in FIG. 71(B2) As in the case of the sta 845, the insulating layer 726 in the area not overlapping with the electrode 746 may be entirely removed. In addition, the transistor 846 shown in FIG. 71(C1) and the transistor 847 shown in FIG. 71(C2) The insulating layer 726 may remain, as may the sta 847.

[0467] The transistors 842 to 847 are also formed by forming the electrode 74 after forming the electrode 746. 6 as a mask, an impurity 755 is introduced into the semiconductor layer 742, and the semiconductor layer 74 2, an impurity region can be formed in a self-aligned manner.

[0468] [s-channel transistor] FIG. 72 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 742. The transistor 850 illustrated in FIG. 72 has a semiconductor layer 742b on a semiconductor layer 742a. The upper surface of the semiconductor layer 742b and the side surfaces of the semiconductor layer 742b and the semiconductor layer 742a are formed. 72A is a top view of the transistor 850. Figure 72(B) is a cross section of the portion indicated by the dashed line X1-X2 in Figure 72(A). FIG. 72(C) is a cross-sectional view in the channel length direction. 1 is a cross-sectional view (cross-sectional view in the channel width direction) of a portion indicated by a dashed dotted line.

[0469] The transistor 850 also includes an electrode 743 that functions as a gate electrode. The electrode 43 can be formed using the same material and method as the electrode 746. The electrode 743 is a stack of two conductive layers.

[0470] The semiconductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are made of In or Ga. Typically, the material is an In-Ga oxide (In and Ga In-Zn oxide (oxide containing In and Zn), In-Zn-Zn oxide (Oxide containing In, element M, and Zn. Element M is Al, Ti, Ga, Y, Zr, La , Ce, Nd, or Hf, which has a stronger bond with oxygen than In. It is a strong metallic element.

[0471] The semiconductor layer 742a and the semiconductor layer 742c are formed by the same metal element as that of the semiconductor layer 742b. Among these, it is preferable that the material contains one or more kinds of the same metal element. When such a material is used, the interface between the semiconductor layer 742a and the semiconductor layer 742b and the semiconductor This can make it difficult for interface states to be generated at the interface between the layer 742c and the semiconductor layer 742b. Therefore, scattering and capture of carriers at the interface are less likely to occur, and the field-effect transport of transistors is improved. It is also possible to reduce variations in the threshold voltage of transistors. Therefore, it is possible to realize a semiconductor device having good electrical characteristics. It becomes Noh.

[0472] The thickness of the semiconductor layer 742a and the semiconductor layer 742c is preferably 3 nm or more and 100 nm or less. The thickness of the semiconductor layer 742b is preferably 3 nm or more and 50 nm or less. 00 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0473] The semiconductor layer 742b is an In-M-Zn oxide, and the semiconductor layer 742a and the semiconductor When the semiconductor layer 742c is also an In-M-Zn oxide, the semiconductor layer 742a and the semiconductor layer 74 2c is In:M:Zn=x1:y1:z1 [atomic ratio], and the semiconductor layer 742b is In:M: If Zn=x2:y2:z2 [atomic ratio], y1 / x1 is greater than y2 / x2. The semiconductor layer 742a, the semiconductor layer 742c, and the semiconductor layer 742b are selected so that Preferably, the ratio y1 / x1 is set to be 1.5 times or more larger than y2 / x2. A conductive layer 742a, a semiconducting layer 742c, and a semiconducting layer 742b are selected. In other words, the semiconductor layer 742a and the semiconductor layer 742b are arranged so that y1 / x1 is at least twice as large as y2 / x2. Preferably, y1 / x1 is greater than y2. The semiconductor layer 742a, the semiconductor layer 742c, and the semiconductor layer 742d are formed so that the thickness of the semiconductor layer 742a is three times or more larger than the thickness of the semiconductor layer 742c. When y1 is equal to or greater than x1, stable electrical characteristics are imparted to the transistor. However, if y1 is three times or more of x1, the field effect of the transistor Therefore, it is preferable that y1 is less than three times x1. By configuring the semiconductor layer 742a and the semiconductor layer 742c as described above, The semiconductor layer 742c can be made to be a layer in which oxygen vacancies are less likely to occur than in the semiconductor layer 742b.

[0474] When the semiconductor layer 742a and the semiconductor layer 742c are made of In-M-Zn oxide, The content of In and element M is preferably 100 atomic % when the sum of In and M is 100 atomic %. Preferably, In is less than 50 atomic % and the element M is 50 atomic % or more. In the semiconductor, In is less than 25 atomic % and the element M is 75 atomic % or more. When the dielectric layer 742b is an In-M-Zn oxide, the contents of In and element M are When the sum of M is 100 atomic %, In is preferably 25 atomic % or more, The element M is less than 75 atomic %, and more preferably, In is 34 atomic % or more. The element M is less than 66 atomic %.

[0475] For example, a semiconductor layer 742a containing In or Ga and a semiconductor layer 742b containing In or Ga Layer 742c: In:Ga:Zn=1:3:2, 1:3:4, 1:3:6, 1:6:4 In-Ga-Zn oxide formed using a target with an atomic ratio of 1:9:6 or In-Ga oxide formed using targets with atomic ratios such as In:Ga=1:9 The semiconductor layer 742b may be made of In:G Atomic ratios such as a:Zn=3:1:2, 1:1:1, 5:5:6, or 4:2:4.1 The In-Ga-Zn oxide formed using the target can be used. The atomic ratios of the conductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are The difference includes a variation of plus or minus 20% of the atomic ratio above.

[0476] In order to provide stable electrical characteristics to a transistor using the semiconductor layer 742b, The impurities and oxygen vacancies in the semiconductor layer 742b are reduced to make the semiconductor layer 742b highly intrinsic. It is preferable to use an oxide semiconductor layer that can be regarded as intrinsic or substantially intrinsic. In either case, the channel forming region in the semiconductor layer 742b is a semiconductor that can be regarded as intrinsic or substantially intrinsic. It is preferable to form the layer.

[0477] Note that an oxide semiconductor layer that can be considered substantially intrinsic has a carrier density But 8 x 10 11 pieces / cm 3 Less than 1 x 10 11 pieces / cm 3 Less than, even more preferred Or 1 x 10 10 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 or more oxide semiconductor This refers to the conductor layer.

[0478] FIG. 73 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 742. The transistor 822 illustrated in FIG. 73 has a semiconductor layer 742b on a semiconductor layer 742a. The transistor 822 is a bottom-gate transistor having a back gate electrode. It is a type of transistor. Figure 73(A) is a top view of the transistor 822. B) is a cross-sectional view (channel length direction) of the portion indicated by the dashed line X1-X2 in FIG. 73(A). FIG. 73(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 73(A). 1 is a cross-sectional view of the device (cross-sectional view in the channel width direction).

[0479] The electrode 723 provided on the insulating layer 729 is connected to the insulating layer 726, the insulating layer 728, and the insulating layer 729. The layer 729 is electrically connected to the electrode 746 through openings 747a and 747b. Therefore, the same potential is supplied to the electrode 723 and the electrode 746. It is not necessary to provide either the opening 747a or the opening 747b. It is not necessary to provide both the opening 747a and the opening 747b. If neither is provided, different potentials can be applied to the electrode 723 and the electrode 746 .

[0480] Here, the semiconductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are stacked. The function and effect of the semiconductor layer 742 will be explained with reference to the transistor 8 shown in FIG. 50 has an insulating layer 772, a semiconductor layer 742, and an energy band in the insulating layer 726. This will be explained using the code structure.

[0481] The difference between the vacuum level and the conduction band minimum (also called "electron affinity") is and the energy of the top of the valence band (also called the ionization potential). The energy gap is calculated by subtracting the energy gap. Measurement can be performed using a HORIBA JOBIN YVON UT-300. The energy difference between the vacuum level and the top of the valence band is measured by ultraviolet photoelectron spectroscopy (UPS). Violet Photoelectron Spectroscopy equipment (e.g. Measurement can be performed using a PHI VersaProbe.

[0482] The In- formed using a target with an atomic ratio of In:Ga:Zn=1:3:2 The energy gap of Ga-Zn oxide is approximately 3.5 eV and the electron affinity is approximately 4.5 eV. In addition, the In film was formed using a target with an atomic ratio of In:Ga:Zn=1:3:4. The energy gap of Ga-Zn oxide is about 3.4 eV, and the electron affinity is about 4.5 eV. In addition, the I layer was formed using a target with an atomic ratio of In:Ga:Zn=1:3:6. The energy gap of n-Ga-Zn oxide is approximately 3.3 eV, and the electron affinity is approximately 4.5 eV. In addition, the film was formed using a target with an atomic ratio of In:Ga:Zn=1:6:2. The energy gap of In-Ga-Zn oxide is approximately 3.9 eV, and the electron affinity is approximately 4.3 e V. The target was formed using an atomic ratio of In:Ga:Zn=1:6:8. The energy gap of the In-Ga-Zn oxide is approximately 3.5 eV and the electron affinity is approximately 4.4 eV. The atomic ratio of the target was In:Ga:Zn=1:6:10. The energy gap of the synthesized In-Ga-Zn oxide is about 3.5 eV, and the electron affinity is about 4 0.5 eV. In addition, using a target with an atomic ratio of In:Ga:Zn=1:1:1, The energy gap of the formed In-Ga-Zn oxide is approximately 3.2 eV, and the electron affinity is approximately The atomic ratio of the target is In:Ga:Zn=3:1:2. The energy gap of the In-Ga-Zn oxide formed by this method is about 2.8 eV, and the electron affinity is It is about 5.0 eV.

[0483] Since the insulating layer 772 and the insulating layer 726 are insulators, the conduction band minimum of the insulating layers 772 and 726 The energy of the semiconductor layers 742a, 742b, and 742c is is also close to the vacuum level (small electron affinity).

[0484] The energy of the conduction band minimum of the semiconductor layer 742a is Specifically, the energy level is 0.05 eV or higher, 0.07 eV or higher, and , 0.1 eV or more or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or more It is preferable that the electron concentration is below or close to the vacuum level of 0.4 eV or less.

[0485] The energy of the conduction band minimum of the semiconductor layer 742c is Specifically, the energy level is 0.05 eV or higher, 0.07 eV or higher, and , 0.1 eV or more or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or more It is preferable that the electron concentration is below or close to the vacuum level of 0.4 eV or less.

[0486] In addition, the vicinity of the interface between the semiconductor layer 742a and the semiconductor layer 742b and the semiconductor layer 742b A mixed region is formed near the interface between the semiconductor layer 742c and the semiconductor layer 742d, and therefore the energy at the bottom of the conduction band The energy changes continuously, i.e., there are no or almost no levels at these interfaces. do not have.

[0487] Therefore, in the stacked structure having this energy band structure, electrons flow through the semiconductor layer 742 Therefore, the electrons move mainly through the interface between the semiconductor layer 742a and the insulating layer 772. Alternatively, even if a level exists at the interface between the semiconductor layer 742c and the insulating layer 726, the level The position of the semiconductor layer 742a and the semiconductor layer 742b has almost no effect on the movement of electrons. There is almost no level at the interface and the interface between the semiconductor layer 742c and the semiconductor layer 742b. Therefore, the movement of electrons in the region is not hindered. Transistors with a semiconductor stack structure can achieve high field-effect mobility. .

[0488] The interface between the semiconductor layer 742a and the insulating layer 772, and the interface between the semiconductor layer 742c and the insulating layer 772 Although trap levels due to impurities and defects can be formed near the interface of 6, The presence of the layer 742a and the semiconductor layer 742c allows the semiconductor layer 742b and the tracking This can keep the level away from the

[0489] In particular, in the transistor exemplified in this embodiment, the upper surface and the side surface of the semiconductor layer 742b are semiconductor. The lower surface of the semiconductor layer 742b is in contact with the semiconductor layer 742a. In this way, the semiconductor layer 742b is covered with the semiconductor layer 742a and the semiconductor layer 742c. By doing so, the influence of the trap levels can be further reduced.

[0490] However, the energy of the conduction band minimum of the semiconductor layer 742a or the semiconductor layer 742c and the When the difference in energy between the conduction band minimum of the semiconductor layer 742b and the The electron may exceed the energy difference and reach the trap level. This generates a negative fixed charge at the interface of the insulating layer, and the threshold voltage of the transistor It shifts in the positive direction.

[0491] Therefore, the energy of the bottom of the conduction band of the semiconductor layer 742a or the semiconductor layer 742c and the The difference in energy between the bottom of the conduction band of the silicon dioxide layer 742a and the bottom of the conduction band of the silicon dioxide layer 742b is 0.1 eV or more, preferably If the value is set to 0.15 eV or more, the fluctuation of the threshold voltage of the transistor is reduced, and the transistor This is preferable because it can improve the electrical characteristics of the capacitor.

[0492] The band gaps of the semiconductor layer 742a and the semiconductor layer 742c are It is preferable that the band gap is wider than that of 2b.

[0493] In addition, oxide semiconductors have a large energy gap of 3.0 eV or more, and are highly resistant to visible light. In addition, the transistor obtained by processing the oxide semiconductor under appropriate conditions In this case, the off-state current is 100zA (1 x10 -19 A) or less, or 10zA (1 x 10 -20 A) and below, and even 1zA( 1×10 -21 A) or less. Therefore, a semiconductor device with low power consumption can be obtained. can be provided.

[0494] Returning to the description of the transistor 850 shown in FIG. By providing the semiconductor layer 742b, the side surface of the semiconductor layer 742b can also be covered with the electrode 743. That is, the transistor 850 can be configured such that the semiconductor layer 742 is electrically connected to the transistor 850 by the electric field of the electrode 743. b is electrically surrounded by the electric field of the conductive film. The structure of the transistor that electrically surrounds the semiconductor layer in which the channel is formed is called the surr This is called a surrounded channel (s-channel) structure. A transistor with a nel structure is called an "s-channel transistor" or " It is also called an "s-channel transistor."

[0495] In the s-channel structure, a channel is formed in the entire (bulk) of the semiconductor layer 742b. In the s-channel structure, the drain current of the transistor can be increased. Furthermore, the electric field of the electrode 743 As a result, the entire channel formation region formed in the semiconductor layer 742b can be depleted. Therefore, in the s-channel structure, the off-state current of the transistor can be further reduced. It is possible.

[0496] In addition, by increasing the height of the protrusion of the insulating layer 772 and reducing the channel width, the s-ch The tunnel structure can further enhance the effects of increasing the on-current and reducing the off-current. Furthermore, when forming the semiconductor layer 742b, the exposed semiconductor layer 742a may be removed. In this case, the side surfaces of the semiconductor layer 742a and the semiconductor layer 742b may be aligned.

[0497] Also, as in a transistor 851 shown in FIG. 74, an insulating layer is provided below a semiconductor layer 742. An electrode 723 may be provided through the transistor 851. FIG. FIG. 74(B) is a cross-sectional view of the area indicated by the dashed line X1-X2 in FIG. 74(A). FIG. 74(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 74(A).

[0498] 75, an insulating layer 775 is formed above the electrode 743. 75A shows a structure of the transistor 852. FIG. 75(B) is a top view of the portion indicated by the dashed line X1-X2 in FIG. 75(A). FIG. 75(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 75(A). Cross-sectional view.

[0499] In FIG. 75, the layer 725 is provided on the insulating layer 775, but it may be provided on the insulating layer 728 or The layer 725 may be provided over the insulating layer 729. By forming the layer 725 using a light-blocking material, This can prevent the characteristics of the transistor from changing due to light irradiation, and the reliability from decreasing. The layer 725 is formed to be at least larger than the semiconductor layer 742b, and the layer 725 is formed to cover the semiconductor layer 742. The layer 725 can be made of an organic material, an inorganic material, or the like. The layer 725 can be made of a conductive material. In this case, layer 725 may be supplied with a voltage or may be left in an electrically floating state. It may also be possible to use the following.

[0500] FIG. 76 shows an example of a transistor having an s-channel structure. The transistor 848 has almost the same configuration as the transistor 847 described above. In the transistor 848 , the semiconductor layer 742 is formed on a protrusion provided in the insulating layer 772 . The transistor 848 is a type of top-gate transistor with a back gate electrode. FIG. 76(A) is a top view of the transistor 848. FIG. 76(B) is a top view of the transistor 848. 76(A) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. ) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG.

[0501] The electrode 744a provided on the insulating layer 729 is connected to the insulating layer 726, the insulating layer 728, and the insulating layer 729. An opening 747c is provided in the edge layer 729, and the semiconductor layer 742 is electrically connected to the opening 747c. The electrode 744b provided on the insulating layer 729 is formed by the insulating layers 726, 728, and an opening 747d formed in the insulating layer 729, which is electrically connected to the semiconductor layer 742. It has been done.

[0502] The electrode 743 provided on the insulating layer 726 is connected to the insulating layer 726 and the insulating layer 772. The openings 747a and 747b are electrically connected to the electrode 723. Therefore, the same potential is supplied to the electrode 743 and the electrode 723. It is not necessary to provide either the opening 747a or the opening 747b. It is not necessary to provide both the opening 747a and the opening 747b. In this case, different potentials can be applied to the electrodes 723 and 743.

[0503] The semiconductor layer used in the transistor having the s-channel structure is an oxide semiconductor. It is not limited to the body.

[0504] [Energy band structure of oxide semiconductors] A band diagram of a transistor including an oxide semiconductor will be described below.

[0505] FIG. 77(A) is a cross-sectional view of the transistor in the channel length direction, and FIG. 77(B) is a cross-sectional view of the transistor in the channel length direction. 77(B) is a cross-sectional view of the transistor in the channel width direction. This is a cross-sectional view at the 0 nm position.

[0506] The transistor shown in FIG. 77(A) and FIG. 77(B) is made of an insulating film 5402 and an oxide semiconductor. A conductive film 5406a, an oxide semiconductor film 5406b, an oxide semiconductor film 5406c, and a conductive The insulating film 5412 includes a conductive film 5416a, a conductive film 5416b, an insulating film 5412, and a conductive film 5404. .

[0507] The oxide semiconductor film 5406a is disposed over the insulating film 5402, and the oxide semiconductor film 5406b is disposed over the oxide semiconductor film 5406a, and the conductive films 5416a and 5416b are disposed over the oxide semiconductor film 5406a. The oxide semiconductor film 5406c is disposed on the oxide semiconductor film 5406b. 406b, the conductive film 5416a, and the conductive film 5416b, and an insulating film 5412 The conductive film 5404 is disposed over the insulating film 5412. can be.

[0508] Therefore, in the transistors shown in FIGS. 77(A) and 77(B), the conductive film 5 The conductive film 416a and the conductive film 5416b function as a source electrode and a drain electrode, respectively. The conductive film 5404 functions as a gate electrode, and the insulating film 5412 functions as a gate insulator. It functions as an edge body.

[0509] 77B, the conductive film 5404 is used to form the oxide semiconductor film 5406b. The transistor shown in Figure 72 has an s-channel structure in which the transistor is electrically surrounded. Therefore, the transistors shown in Figures 77(A) and 77(B) have the same structure. For each component of the transistor, please refer to the transistor description in Figure 72. Cut.

[0510] 78(A), 78(B) and 78(C) are diagrams showing the structure of the dashed line K shown in FIG. 77(A). 1-K2. Here, the conductive film 5416a and the conductive film 5416b are A drain voltage (for example, 1 V) is applied between the gate and the drain. When a negative voltage (for example, −3 V) is applied between the conductive film 5404 and the conductive film 5416a, 78(B) shows the case where no voltage is applied as the gate voltage, and FIG. 78(C) C) shows the case where a positive voltage (for example, 3 V) is applied as the gate voltage. E C The solid line indicates the energy at the bottom of the conduction band, and E V The solid line indicated by is the energy at the top of the valence band. indicates energy, E Fn The dashed line indicates the energy of the electron quasi-Fermi level.

[0511] 78(D), 78(E) and 78(F) are diagrams showing the structure of the dashed line K shown in FIG. 77(B). 3-K4. Here, the band diagram of the conductive film 5416a and the conductive film 5416b is A drain voltage (for example, 1 V) is applied between the gate and the drain. Figure 78(E) shows the case where a negative voltage (for example, -3V) is applied to the gate voltage. Figure 78(F) shows the case where no voltage is applied, and Figure 78(F) shows the case where a positive voltage ( For example, the case where a voltage of 3 V is applied is shown.

[0512] As shown in Figure 78(A), when a negative gate voltage is applied, the source and drain A potential barrier is formed between the gate and drain, making it difficult for the drain current to flow. As shown in Figure 1, when no gate voltage is applied, the potential barrier between the source and drain The wall becomes smaller and drain current begins to flow. Also, as shown in Figure 78(C), When a gate voltage of is applied, the potential barrier between the source and drain disappears, A drain current flows.

[0513] As shown in FIGS. 78(D), 78(E), and 78(F), the oxide semiconductor film 540 6b shows almost no band bending due to the gate voltage. Depending on the voltage, the energy at the bottom of the conduction band and the energy at the top of the valence band change to a certain value, It just fluctuates.

[0514] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0515] (Embodiment 5) In this embodiment, a touch panel including a touch panel according to one embodiment of the present invention and an IC will be described. An example of the module configuration will be described with reference to the drawings.

[0516] FIG. 79 shows a block diagram of the touch panel module 6500. The controller 6500 includes a touch panel 6510 and an IC 6520.

[0517] The touch panel 6510 includes a display unit 6511, an input unit 6512, and a scanning line driver circuit 65 The display portion 6511 has a plurality of pixels, a plurality of signal lines, and a plurality of scanning lines. The input unit 6512 has a function of displaying an image. It has multiple sensor elements that detect contact or proximity and functions as a touch sensor. The scanning line driver circuit 6513 has a function of outputting a scanning signal to the scanning lines of the display portion 6511. Possess the ability.

[0518] For ease of explanation, the touch panel 6510 is configured as follows: The input unit 6512 is shown separately, but it has a function to display an image and a function as a touch sensor. It is preferable to use a so-called in-cell type touch panel that has both of the above functions. .

[0519] As a touch sensor type that can be used as the input unit 6512, for example, a capacitive touch sensor is used. Capacitive touch panels can be used. Surface capacitive touch panels and projected capacitive touch panels can be used. Projected capacitive touch panels include the self-capacitance type and the mutual capacitance type. The mutual capacitance method is preferable because it allows simultaneous multipoint detection.

[0520] However, the present invention is not limited to this, and may also detect the proximity or contact of a detection object such as a finger or stylus. Various types of sensors that can be used for the input unit 6512 can also be applied. For example, In addition to the capacitance type, there are also resistive film type, surface acoustic wave type, infrared type, and optical type. Various methods can be used, including the academic method.

[0521] Representative in-cell touch panels are the hybrid in-cell type and the full in-cell type. The hybrid in-cell type has both a substrate that supports the display element and an opposing substrate. On the other hand, the full-in-cell type refers to a structure in which electrodes that constitute a touch sensor are provided on the surface. This refers to a configuration in which electrodes that make up a touch sensor are provided on a substrate that supports a display element. A cell-type touch panel is preferable because it can simplify the configuration of the opposing substrate. As a full-in-cell type, the electrodes that make up the display element also serve as the electrodes that make up the touch sensor. This structure is preferable because it simplifies the manufacturing process and reduces manufacturing costs.

[0522] The display unit 6511 supports HD (1280 x 720 pixels), FHD (1920 x 10 80), WQHD (pixel count 2560 x 1440), WQXGA (pixel count 2560 x 160 0), 4K (pixel count 3840 x 2160), 8K (pixel count 7680 x 4320) It is preferable to have a very high resolution, especially 4K, 8K or higher. In addition, it is preferable that the pixel density (resolution) of the pixels provided in the display portion 6511 is However, it is 300 ppi or more, preferably 500 ppi or more, and more preferably 800 ppi or more. , more preferably 1000 ppi or more, and more preferably 1200 ppi or more. The display portion 6511 having such high resolution and high definition allows For personal use such as home use, it is important to enhance the sense of realism and depth. This makes it possible to:

[0523] The IC 6520 includes a circuit unit 6501, a signal line driver circuit 6502, and a sensor driver circuit 6503. 503 and a detection circuit 6504. The circuit unit 6501 includes a timing controller It has a controller 6505, an image processing circuit 6506, etc.

[0524] The signal line driver circuit 6502 supplies an analog signal to a signal line of the display portion 6511. For example, the signal line driver circuit 6502 has a function of outputting an image signal (also called a video signal). The shift register circuit and the buffer circuit may be combined. The touch panel 6510 may have a demultiplexer circuit that connects to the signal lines. .

[0525] The sensor driving circuit 6503 outputs a signal that drives the sensor element of the input unit 6512. The sensor driver circuit 6503 has a function of, for example, a shift register circuit and a buffer circuit. A configuration combining a first circuit can be used.

[0526] The detection circuit 6504 receives an output signal from the sensor element of the input section 6512 and outputs it to the circuit unit. For example, the detection circuit 6504 may include an amplifier circuit and an analog Log-to-digital conversion circuit (ADC: Analog-to-Digital Converter) In this case, the detection circuit 6504 receives the signal from the input unit 6512. The output analog signal is converted into a digital signal and output to the circuit unit 6501 .

[0527] The image processing circuit 6506 of the circuit unit 6501 controls the display of the touch panel 6510. a function to generate and output a signal to drive the input unit 6511; and a function to analyze the signal output from the input unit 6512 and output the signal. It has the function of outputting 0.

[0528] As a more specific example, the image processing circuit 6506 performs the following in accordance with an instruction from the CPU 6540: The image processing circuit 6506 has a function of generating a video signal. The video signal is subjected to signal processing in accordance with the user's needs, converted into an analog video signal, and then transmitted to a signal line driving circuit. The image processing circuit 6506 also has the function of supplying the image data from the CPU 6540 to the image processing circuit 6502. It has a function of generating a drive signal to be output to the sensor drive circuit 6503 in accordance with the command. The image processing circuit 6506 analyzes the signal input from the detection circuit 6504 and outputs position information and and outputs it to the CPU 6540.

[0529] The timing controller 6505 also receives the video signal processed by the image processing circuit 6506. The scanning line driver circuit 6513 and the sensor driver circuit 6503 receive the synchronous signal. A function to generate and output signals (clock signals, start pulse signals, etc.) The timing controller 6505 also controls the timing at which the detection circuit 6504 outputs a signal. The timing control unit 100 may have a function to generate and output a signal that defines the timing. The scanning controller 6505 controls the signals to be output to the scanning line driver circuit 6513 and the sensor driver circuit 6514. It is preferable to output signals synchronized with the signals output to the line 6502 and the line 6503. The period during which the pixel data of the display unit 6511 is rewritten and the period during which the pixel data of the input unit 6512 is sensed are also included. For example, it is preferable to divide one frame period into two periods for storing pixel data. The touch panel 6510 is driven by dividing it into a rewriting period and a sensing period. In addition, for example, by providing two or more sensing periods in one frame period, The detection sensitivity and detection accuracy can be improved.

[0530] The image processing circuit 6506 can have a configuration including a processor, for example. For example, DSP (Digital Signal Processor), GPU (Gra Other microprocessors such as the NVIDIA 9000 Series (NVIDIA 9000 Series) can be used. These microprocessors can also be implemented as FPGAs (Field Programmable Gate Arrays). Programmable Gate Array (FPAA) and Field Programmable Gate Array (FPAA) PLDs (Programmable Logic Diodes) such as Analog Arrays The configuration may be realized by a processor. It processes various data and controls programs by interpreting and executing commands from the program. The programs that can be executed by the processor are stored in the memory area of ​​the processor. Alternatively, the information may be stored in a separately provided storage device.

[0531] The touch panel 6510 includes a display unit 6511, a scanning line driver circuit 6513, and an I The circuit unit 6501, the signal line driver circuit 6502, and the sensor driver circuit 6503 included in the C6520 503, a detection circuit 6504, or an externally provided CPU 6540, etc. By using an oxide semiconductor in the region, a transistor with extremely low off-state current can be used. Since the off-state current of the transistor is extremely low, the transistor can be used as a memory. As a switch to hold the charge (data) that has flowed into the capacitive element that functions as an element By using this feature, data retention can be ensured for a long period of time. By using this in the registers and cache memory of the image processing circuit 6506, Operates the image processing circuit 6506, and in other cases, stores the information of the immediately preceding processing in the storage element. This enables normally-off computing, and This allows for reduced power consumption of the module 6500 and the electronic device in which it is implemented.

[0532] In this case, the circuit unit 6501 is connected to the timing controller 6505 and the image processing circuit. Although the image processing circuit 6506 is configured to have the image processing circuit 6506 itself, A circuit having some of the functions of the image processing circuit 6506 may be provided externally. The CPU 6540 may perform the above functions or a part of the functions. 1 is a signal line driver circuit 6502, a sensor driver circuit 6503, a detection circuit 6504, and a timing It may also be configured to include a switching controller 6505.

[0533] Although an example in which the IC 6520 includes the circuit unit 6501 has been shown here, The IC6501 can be configured not to be included in the IC6520. The signal line driver circuit 6502, the sensor driver circuit 6503, and the detection circuit 6504 are included. For example, when multiple ICs are mounted on the touch panel module 6500, In this case, a circuit unit 6501 is separately provided, and an IC 652 without a circuit unit 6501 is provided. A plurality of 0 can be arranged, or a circuit having only the IC 6520 and the signal line driver circuit 6502 can be arranged. It is also possible to combine and arrange ICs that are different from each other.

[0534] In this way, the touch panel 6510 has a function of driving the display unit 6511 and a function of driving the input unit 651 The touch panel module is made up of a single IC incorporating the functions to drive the touch panel. This reduces the number of ICs mounted on the 6500, thereby reducing costs. Cut.

[0535] Figure 80 (A), (B), and (C) show touch panel modules 6 equipped with IC6520. 500 is a schematic diagram.

[0536] In FIG. 80(A), the touch panel module 6500 includes a substrate 6531, an opposing substrate 65 32, including a plurality of FPCs 6533, ICs 6520, ICs 6530, etc. Also, a substrate 653 A display section 6511, an input section 6512, and a scanning line driver circuit 6513 are disposed between the substrate 6511 and the opposing substrate 6532. 513. The IC6520 and IC6530 are COG (Chip On Glass) The semiconductor device is mounted on a substrate 6531 by a mounting method such as a mounting method using a mounting board.

[0537] The IC6530 is the same as the IC6520 described above except that only the signal line driver circuit 6502 is is an IC having a signal line driver circuit 6502 and a circuit unit 6501. The IC6530 receives external signals via FPC6533. Signals can be output from IC6520 and IC6530 to the outside via 533.

[0538] In FIG. 80(A), two scanning line driver circuits 6513 are provided so as to sandwich a display portion 6511. The figure also shows an example of a configuration that includes IC6530 in addition to IC6520. This configuration is suitable for use when the display unit 6511 has extremely high resolution. can be done.

[0539] Figure 80(B) shows an example where one IC6520 and one FPC6533 are mounted. In this way, by consolidating the functions into one IC6520, the number of parts can be reduced. 80(B), the scanning line driver circuit 6513 is connected to the display portion 651. This shows an example of placement along the side of the two short sides of 1 that is closer to the FPC6533.

[0540] Figure 80(C) shows a PCB (Printed Circuit) on which the image processing circuit 6506 and other components are mounted. 6 shows an example of a configuration having an I / O board 6534. C6520, IC6530, and PCB6534 are electrically connected by FPC6533. Here, the IC 6520 does not have the image processing circuit 6506 described above. The composition can be applied.

[0541] In each diagram of Figure 80, IC6520 and IC6530 are mounted on F It may be mounted on PC6533. For example, IC6520 or IC6530 may be mounted on COF (C Hip On Film method and TAB (Tape Automated Bonding) g) method or other mounting methods can be used to mount the FPC6533.

[0542] As shown in Figures 80(A) and (B), the FPC 6533 and IC The configuration in which IC6520 (and IC6530) etc. are arranged allows for a narrow frame, so for example, It can be suitably used in electronic devices such as smartphones, mobile phones, and tablet terminals. In addition, the configuration using PCB6534 as shown in Figure 80(C) can be used in televisions, for example. Application devices, monitor devices, tablet terminals, laptop computers, etc. It can be suitably used for the following.

[0543] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0544] (Embodiment 6) In this embodiment, a display module and an electronic device including the display device of one embodiment of the present invention will be described. This will be explained with reference to FIGS. 81 to 83.

[0545] The display module 8000 shown in FIG. 81 includes an upper cover 8001 and a lower cover 8002. Between them, the display panel 8006 connected to the FPC 8005, the backlight 8007, and the frame It has a room 8009, a printed circuit board 8010, and a battery 8011.

[0546] The display device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0547] The upper cover 8001 and the lower cover 8002 are made to fit the size of the display panel 8006. The shape and dimensions can be changed as needed.

[0548] The display panel 8006 has a capacitive touch sensor.

[0549] The backlight 8007 includes a light source 8008 .

[0550] In FIG. 81, the light source 8008 is arranged above the backlight 8007. For example, a light source 8008 may be provided at the end of the backlight 8007. In addition, a light diffusion plate may be used.

[0551] In addition, when using a self-luminous light-emitting element such as an organic EL element, or a reflective panel, In this case, the backlight 8007 may not be provided.

[0552] The frame 8009 has a function of protecting the display panel 8006 and also a function of preventing the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the The frame 8009 may also function as a heat sink.

[0553] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. This can be omitted if a commercial power source is used.

[0554] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided in addition.

[0555] 82(A) to (H) and 83 are diagrams showing electronic devices. These electronic devices are , a housing 5000, a display unit 5001, a speaker 5003, an LED lamp 5004, and operation keys 5005 (including a power switch or an operation switch), a connection terminal 5006, a sensor 500 7 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemistry) Material, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, (including the function of measuring odor or infrared rays), microphone 5008, etc. This can be done.

[0556] FIG. 82(A) shows a mobile computer, which includes the above-mentioned components as well as a switch 5009 , an infrared port 5010, etc. FIG. 82(B) shows a portable terminal equipped with a recording medium. A portable image reproducing device (for example, a DVD reproducing device) is also included. The display unit 5002, the recording medium reading unit 5011, etc. The vision device may have a stand 5012 and the like in addition to the above. The television device can be operated using an operation switch provided on the housing 5000 or a separate remote control. This can be done by the remote control operation device 5013. This allows you to control the channel and volume, and manipulate the image displayed on the display unit 5001. In addition, the remote control operation device 5013 can be operated by the remote control operation device 5013. A display unit for displaying information output from the portable game device may be provided. In addition to the above components, the device may also include a recording medium reading unit 5011. 82(E) is a digital camera with a television receiving function, and in addition to the above, it also has an antenna 5014, a shutter button 5015, an image receiving unit 5016, etc. 2(F) is a portable gaming machine, which, in addition to the above, has a second display unit 5002, a recording medium reader / writer, 82(G) is a portable television receiver. In addition to the above, a charger 5017 capable of transmitting and receiving signals may be included. FIG. 82(H) shows a wristwatch type information terminal, which, in addition to the above, includes a band 5018, a clasp, and the like. The housing 5000 also serves as a bezel. The display unit 5001 has a non-rectangular display area. icon 5020, other icons 5021, etc. can be displayed. This is a digital signage. Figure 83(B ) is a digital signage mounted on a cylindrical pillar.

[0557] The electronic devices shown in FIGS. 82(A) to 82(H) and 83 can have various functions. For example, functions to display various information (still images, videos, text images, etc.) on the display, Touch panel function, calendar, date or time display function, various software (Program) control function, wireless communication function, various wireless communication functions Functions for connecting to various computer networks and transmitting various data using wireless communication functions or reception function, and read and display programs or data recorded on a recording medium. Furthermore, electronic devices having multiple display units can have the function of displaying information on the display unit. In this case, one display unit is used mainly to display image information, and another display unit is used mainly to display text. The function of displaying information, or three-dimensional images by displaying images that take parallax into account on multiple displays, Furthermore, in electronic devices having an image receiving unit, The functions include taking still images, taking videos, and automatically or manually correcting the captured images. function to correct the image, to save the captured image to a recording medium (external or built-in to the camera), The image can be displayed on the display unit. ) and the functions that the electronic device shown in FIG. 83 can have are not limited to these, and various functions can be provided. It can have the ability.

[0558] The electronic device of this embodiment is characterized by having a display unit for displaying some information. The display device of one embodiment of the present invention can be applied to the display portion.

[0559] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0560] 10 Display device 11 Circuit Board 12 PCB 13 FPC 14 Conductive film 20a Liquid crystal element 20b Liquid crystal element 21a Common electrode 21a1 Common electrode 21a2 pixel electrode 21b Pixel electrode 22a Pixel electrode 22b Common electrode 22b1 Common electrode 22b2 pixel electrode 23 LCD 24 insulating film 25a opening 25b opening 26 Aperture 28a Conductive film 28b Conductive film 31 Colored film 40a pixels 40b pixels 51a Sensor electrode 51a1 Sensor electrode 52b Sensor electrode 52b1 Sensor electrode 53 Wiring 54 Wiring 55 Aperture 56 Aperture 61 Wiring 62 Wiring 63 Transistor 64 Liquid crystal element Block 65_1 Block 65_2 Block 67_1 Block 67_4 71 Electrode 71_1 Electrode 71_2 Electrode 72 electrode 72_1 Electrode 72_4 Electrode 102 Circuit Board 108 insulating film 114 insulating film 118 insulating film 119 Insulating film 150a transistor 150b transistor 151 Sealing materia...

Claims

[Claim 1] A display device comprising a first pixel, a second pixel, a first substrate, and a second substrate, the first pixel and the second pixel are provided on the first substrate; The first pixel comprises: a first pixel electrode; a first conductive film; a first transistor; the first pixel electrode is electrically connected to the first transistor; the first conductive film has a region that functions as a common electrode, The second pixel is a second pixel electrode; a second conductive film; a second transistor; the second pixel electrode is electrically connected to the second transistor; the second conductive film has a region that functions as a common electrode, the first conductive film and the second pixel electrode are provided on the same surface, a first insulating film provided on the first conductive film and the second pixel electrode; The display device, wherein the first pixel electrode and the second conductive film are provided on the first insulating film.

Images