Electroplating of cobalt, nickel and their alloys
Electroplating nickel and cobalt into substrate features using controlled current and additives achieves void-free interconnects, addressing the challenges of tungsten deposition in high aspect ratio features, providing low resistance and high throughput for 3D technologies.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-12-26
- Publication Date
- 2026-03-11
AI Technical Summary
Current methods for forming interconnects in electronic devices, such as through-silicon vias (TSVs) and device contacts, face challenges in achieving void-free deposition of metals like tungsten, especially in high aspect ratio features, leading to issues with resistivity and electromigration resistance.
Electroplating nickel and/or cobalt into substrate features using an aqueous solution with controlled current and voltage, and optionally including suppressors, accelerators, and levelers, to achieve a bottom-up fill mechanism, thereby forming void-free interconnects and contacts.
The method provides interconnects with low resistance and good device performance, offering electromigration resistance comparable to tungsten, lower resistivity, and high throughput, while being cost-effective and suitable for 3D technologies.
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Figure 2026042828000001_ABST
Abstract
Description
[Background technology]
[0001] [Incorporated by reference] A PCT Request Form is being filed contemporaneously herewith as part of this application. Each application to which this application claims benefit or priority as identified in the contemporaneously filed PCT Request Form is incorporated herein by reference in its entirety for all purposes.
[0002] Tungsten is sometimes used to form interconnects for various integrated circuit structures, such as through-silicon vias (TSVs) and device contacts. Tungsten interconnects are often deposited by chemical vapor deposition or atomic layer deposition.
[0003] The background and contextual statements contained herein are provided solely for the purpose of providing a general context for the present disclosure. Most of the present disclosure presents the work of the inventors, and it is not meant that such work is admitted to be prior art by virtue of being set forth in the Background section or presented as context elsewhere in this specification. Summary of the Invention
[0004] Some aspects of the present disclosure relate to methods for forming interconnects in electronic devices. Such methods can be characterized by the following steps: (a) contacting a substrate having a partially or fully fabricated integrated circuit with an aqueous electroplating solution having a pH of about 2 to about 5 and nickel and / or cobalt ions; and (b) electroplating nickel and / or cobalt from the electroplating solution into features by a bottom-up fill mechanism by controlling the current and / or voltage to the substrate. In certain embodiments, the aqueous electroplating solution includes (i) nickel ions at a concentration of about 20 to about 80 g / L and / or cobalt ions at a concentration of about 10 to about 40 g / L, and (ii) a suppressor. In certain embodiments, the substrate includes features having a diameter of about 0.005 to 6 micrometers and a feature depth of about 0.05 to 10 micrometers.
[0005] In certain embodiments, the substrate features are micro-TSV features. In some applications, electroplating nickel and / or cobalt into one or more features forms one or more interconnects between a first electronic device on a first side of the substrate and a second electronic device on a second side of the substrate. In some examples, the features have a depth of about 1000 nm to about 2000 nm and an opening diameter or width of about 50 nm to about 150 nm.
[0006] In certain embodiments, electroplating nickel and / or cobalt into the one or more features forms one or more electrical contacts directly to a first electronic device on the substrate. In some examples, the one or more electrical contacts contact one or more 3D NAND devices. In some examples, the features have a depth of about 50 nm to about 500 nm and an opening diameter or width of about 5 nm to about 20 nm.
[0007] In some embodiments, the aqueous electroplating solution does not include an accelerator or a leveler. In alternative embodiments, the aqueous electroplating solution includes an accelerator and / or a leveler. In some embodiments, the aqueous electroplating solution includes an accelerator. In certain embodiments, the aqueous electroplating solution further includes boric acid.
[0008] In some embodiments, the aqueous electroplating solution further comprises ions of a metal other than cobalt or nickel. In such embodiments, controlling the current and / or voltage to the substrate electroplates a nickel alloy or cobalt alloy from the electroplating solution into the feature. In some such embodiments, the metal other than cobalt or nickel can be Cu, Ag, Au, Mn, Fe, Cr, Ru, Mo, Ir, Re, Pd, W, Mo, Pt, or any combination thereof. In some such embodiments, the metal other than cobalt or nickel is W or Mo. In some examples, the aqueous electroplating solution further comprises Mo ions and / or W ions at a concentration of about 0.1 to about 30 g / L. In certain embodiments, the aqueous electroplating solution comprises a complexing agent that complexes nickel ions, cobalt ions, or ions of a metal other than cobalt or nickel.
[0009] In some embodiments, controlling the current and / or voltage to the substrate includes ramping up the current during electroplating of nickel and / or cobalt from the electroplating solution. In some examples, ramping up the current includes ramping up the current. Linearly increasing This includes the step of:
[0010] In some embodiments, before electroplating nickel and / or cobalt, the method includes pretreating the substrate with a plasma to reduce metal oxides on the conductive layer in one or more features. In some examples, before electroplating nickel and / or cobalt, the method includes prewetting the substrate under reduced pressure with a wetting solution that wets the features. In some examples, after electroplating nickel and / or cobalt, the method includes annealing the substrate.
[0011] Some aspects of the present disclosure relate to an apparatus for processing substrates, the apparatus may be characterized by the following features: (a) one or more electroplating cells; (b) one or more electroplating post-fill modules; (c) a plasma pre-treatment module; (d) a pre-wet module; (e) one or more substrate transfer handlers; and (f) a controller configured to cause the one or more substrate transfer handlers to process a first substrate by transferring the first substrate to each of modules (b), (c), and (d), and to process a second substrate without transferring the second substrate to at least one of modules (b), (c), and (d) throughout the period that the second substrate is in the apparatus.
[0012] In some embodiments, the apparatus further comprises a frame or enclosure that houses the one or more electroplating cells, the one or more electroplating post-fill modules, the pre-wet module, and the plasma pre-treatment module. In some embodiments, the frame or enclosure further houses a substrate transfer robot. In some examples, the pre-wet module and the plasma pre-treatment module reside within a common vacuum environment.
[0013] In some embodiments, the apparatus further comprises an annealing chamber configured to heat the substrate after electroplating in the one or more electroplating cells. In some embodiments, the apparatus further comprises a load lock. In some examples, the pre-wet module and the pre-treatment module are connected by a load lock.
[0014] In certain embodiments, the controller is further configured to cause the apparatus to (i) process a first substrate by transferring the first substrate to a plasma pre-treatment module and transferring the first substrate to a pre-wet module before transferring the first substrate to a first plating cell of the one or more electroplating cells, and (ii) process a second substrate by transferring the second substrate to the pre-wet module without transferring the second substrate to a plasma pre-treatment module before transferring the second substrate to a first plating cell of the one or more electroplating cells. In some examples, the controller is further configured to cause the apparatus to (iii) process a third substrate by transferring the third substrate to a first plating cell of the one or more electroplating cells without previously transferring the third substrate to either the pre-wet module or the plasma pre-treatment module.
[0015] In certain embodiments, the apparatus further comprises a power supply configured to control the current and / or voltage applied to the substrate in the one or more electroplating cells. In certain embodiments, the controller controls the current during electroplating in a first plating cell of the one or more electroplating cells. Linearly increasing It is configured to:
[0016] These and other features of the disclosed embodiments are described in detail below with reference to the associated drawings. [Brief explanation of the drawings]
[0017] [Figure 1] Schematic diagram showing a mechanism for bottom-up electroplating filling of features in a substrate.
[0018] [Figure 2] 1 is a polarization plot showing the inhibition of metal deposition with increasing amounts of inhibitor to the electroplating solution.
[0019] [Figure 3] 1 is a flow chart illustrating various operations that may be performed before, during, and after electroplating cobalt, nickel, and / or alloys thereof into features of a substrate.
[0020] [Figure 4A] FIG. 1 presents an example of a hardware platform on which at least a portion of the disclosed processes may be executed. [Figure 4B] FIG. 1 presents an example of a hardware platform on which at least a portion of the disclosed processes may be executed.
[0021] [Figure 4C] FIG. 1 is a block diagram illustrating a typical example of an electroplating cell.
[0022] [Figure 5] FIG. 1 shows the feature fill profile obtained when designing a cobalt electroplating process for TSV features (CD 100 nm, depth 1000 nm). [Figure 6] FIG. 1 shows the feature fill profile obtained when designing a cobalt electroplating process for TSV features (CD 100 nm, depth 1000 nm). [Figure 7] FIG. 1 shows the feature fill profile obtained when designing a cobalt electroplating process for TSV features (CD 100 nm, depth 1000 nm). [Figure 8] FIG. 1 shows the feature fill profile obtained when designing a cobalt electroplating process for TSV features (CD 100 nm, depth 1000 nm).
[0023] [Figure 9] FIG. 1 shows the feature fill profile obtained when designing a nickel electroplating process for TSV features.
[0024] [Figure 10] Figure 1 provides an example of the impact of vacuum prewetting on a deep TSV structure.
[0025] [Figure 11] Diagram showing process tuning for void-free filling of larger TSV structures (6 x 60 micrometer features). DETAILED DESCRIPTION OF THE INVENTION
[0026] Introduction and Context For some applications, through-silicon vias (TSVs), micro-TSVs, and device contact channels (e.g., NAND contact channels) have been filled with tungsten metal by chemical vapor deposition or atomic layer deposition. However, some applications that currently utilize evaporated tungsten may utilize metals other than tungsten and / or may use electrochemical vapor deposition.
[0027] Examples of metals that can be used in place of tungsten (W) include cobalt (Co), nickel (Ni), Co-W alloys, Ni-W alloys, Co-Mo alloys, and Ni-Mo alloys. Cobalt or nickel can also be alloyed with each other or with other elements, such as Cu, Ag, Au, Mn, Fe, Cr, Ru, P, B, C, N, Ir, Re, Pd, Pt, or any combination thereof. Any of these metals or alloys can be deposited by electrodeposition. Electrodeposited TSVs or device contacts (e.g., NAND device contacts) can be deposited void-free, meaning the resulting interconnects or contacts have low resistance and good device performance.
[0028] This disclosure presents electrodeposition solutions, processes, apparatus, and systems for filling features with Co, Ni, and / or alloys thereof. In certain embodiments, at least a portion of the filled feature has a relatively high aspect ratio (e.g., at least about 5:1 or at least about 10:1). In some embodiments, the feature opening has a width or diameter of about 50 μm to 500 μm. The electrodeposition solutions, processes, and apparatus disclosed herein may be used with 3D technologies (including technologies developed or implemented in the future) to scale as other forms of electrodeposition have in the past with 2D scaling.
[0029] Currently, TSV structures for certain applications (such as global TSV and bond pad applications) are filled with copper (Cu) due to copper's low resistivity and the ability of these applications to address the challenges presented by Cu. However, W metal is being investigated as an alternative to Cu to develop global and intermediate TSV applications. W metal is predicted to be required for these future applications due to recognized potential challenges in incorporating Cu into front-end-of-line (FEOL) device layouts, such as maximum current density, contamination, and electromigration lifetime. In this disclosure, metals other than W and Cu are used in TSV applications. Similarly, certain FEOL and device contact features may use metals other than W. For example, while 3D NAND contacts are traditionally filled with W using evaporation methods, certain disclosed embodiments use other metals for these contacts.
[0030] Utilizing cobalt, nickel, and / or certain alloys of these metals instead of tungsten may provide one or more advantages, such as any of the following:
[0031] Electromigration resistance exceeds that of Cu and approaches or rivals that of W
[0032] Lower resistivity than similar features filled using deposition processes that can leave voids
[0033] Tailoring film properties by alloying and post-treatment annealing
[0034] Electroplating of films provides high throughput (number of wafers per hour)
[0035] Electroplating of films provides low-cost wet deposition with reusable solutions.
[0036] term The terms "semiconductor wafer," "wafer," "substrate," and "wafer substrate" may be used interchangeably. Those skilled in the art will appreciate that the term "part-process integrated circuit" may refer to any one or more devices on a semiconductor wafer during any of the many stages of integrated circuit manufacturing. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, 300 mm, or 450 mm. This disclosure presents embodiments implemented on "wafers." It should be understood that such references to "wafers" extend to other types of workpieces. Workpieces may have a variety of shapes, sizes, and materials. In addition to semiconductor wafers, examples of workpieces that may be used in the disclosed embodiments include printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, micromechanical elements, etc.
[0037] As used herein, a "semiconductor device processing operation" or "processing operation" is an operation performed during the fabrication of a semiconductor device. Typically, an overall processing process includes multiple semiconductor device processing operations, each performed in its own semiconductor processing tool, such as a plasma reactor, an electroplating cell, an annealing chamber, a chemical mechanical planarization tool, a wet etching tool, etc. Categories of semiconductor device processing operations include subtractive methods, such as etching and planarization processes, and material additive methods, such as deposition processes (e.g., physical vapor deposition, chemical vapor deposition, atomic layer deposition, electrochemical vapor deposition, electroless deposition).
[0038] The terms "processing chamber," "fabrication equipment," and "processing tool" refer to equipment in which a manufacturing process is performed. A manufacturing equipment often has a processing chamber in which a workpiece resides during processing. Typically, in use, a manufacturing equipment performs one or more semiconductor device processing operations. Examples of manufacturing equipment for semiconductor device processing include additive processing reactors, such as electroplating cells, physical vapor deposition reactors, chemical vapor deposition reactors, and atomic layer deposition reactors. Examples of substrate processing reactors include dry etch reactors (e.g., chemical etch reactors and / or physical etch reactors), wet etch reactors, and ashers. Other types of manufacturing equipment include annealing chambers and cleaning equipment.
[0039] As used herein, the term "feature" can refer to an unfilled, partially filled, or fully filled recess on a substrate. Similarly, the term "through silicon via" refers to an unfilled, partially filled, or fully filled recess formed in a silicon or other material substrate. Features may have different depths, different loadings, different shapes when viewed from the top down toward the substrate, and combinations thereof. In some embodiments, some features on a substrate may have circular, oval, or rectangular shapes when viewed from the top. In some embodiments, at least some features on a substrate have an aspect ratio of about 2:1 or greater, about 5:1 or greater, or about 10:1 or greater.
[0040] Example feature dimensions are listed in Table 1. In some examples, features for 3D structures range from about 50 nm to 6 micron openings and about 500 nm to 10 micron feature depths. For some TSV applications, particularly micro-TSV applications, example feature size ranges include about 10-100 nm opening sizes and about 1-2 micrometer depths. In some embodiments, feature dimensions now bridge the gap between relatively low aspect ratio features (e.g., damascene features) and relatively high aspect ratio features (e.g., TSVs). [Table 1]
[0041] Purpose The disclosed devices, electroplating solutions, electroplating methods, and apparatus may be applied to form interconnects for a variety of applications, some of which may be characterized as "3D" applications. 3D applications generally use multiple wafers or dies stacked vertically. In one example, logic devices are fabricated on one side of a wafer and connected by micro-TSVs to memory or power lines on the other side of the wafer. In another example, different wafers are fabricated (one wafer for logic and another for memory), and then the wafers are polished, stacked, and electrically connected through TSVs. Related applications are sometimes referred to as "2.5D applications." These applications use dies stacked on interposer-like structures to arrange multiple device types into a single composite device.
[0042] Some applications are TSV applications (e.g., micro-TSV applications). TSVs are vias for electrical connections that extend completely through a semiconductor workpiece (e.g., a silicon wafer or die). A typical TSV process involves forming TSV holes, depositing a conformal diffusion barrier and a conductive seed layer on a substrate, and then filling the TSV holes with metal. TSV holes typically have a high aspect ratio, making it difficult to deposit copper without voids within such structures. TSVs can have an aspect ratio of about 4:1 or greater, such as about 10:1 or greater, or even about 20:1 or greater (e.g., about 30:1), and can have opening widths of about 0.1 μm or greater, such as 5 μm or greater, and depths of about 5 μm or greater, such as about 50 μm or greater and about 100 μm or greater. Examples of TSVs include 5×50 μm and 10×100 μm features.
[0043] Micro-TSVs are TSVs that form interconnects across the thickness of a wafer or integrated circuit, electrically connecting one side of a structure to the other side of the structure. In some embodiments, the micro-TSV interconnects electrically connect devices on different sides of the wafer or integrated circuit. As an example, the connected devices may be switches (e.g., transistors) or memory cells. In some applications, the two sides of the wafer or integrated circuit have the same type of devices (e.g., transistors or memory cells). In some applications, one side of the wafer or integrated circuit has one type of device, while the other side has a different type of device (e.g., transistors on one side of the device and memory cells on a different side of the device). The electrical connection between devices on the two sides of the wafer or integrated circuit can be made by interconnects across the thickness of the wafer or integrated circuit.
[0044] In some examples, microTSVs are used to provide lines for providing chip-level power from one side of a wafer or integrated circuit to the other, hi some examples, microTSVs are used in integration schemes that utilize particularly small switches (such as 3 nm devices) or "gate all around" transistors (such as FETs).
[0045] The geometric dimensions of micro TSVs are often smaller than conventional TSVs. In some embodiments, the micro TSV interconnects have a depth of about 1000 nm to about 2000 nm. In some examples, the micro TSV interconnects have an opening diameter or width of about 50 nm to about 150 nm. By way of example, the aspect ratio may be between about 5 and about 50.
[0046] Some applications form device contacts, sometimes called middle-of-line (MOL) or "metal 0" applications. These provide direct electrical connection to devices such as transistors or memory cells. do For example, the depth of the feature in a mid-of-line application may be about 50 nm to about 500 nm, or about 100 nm to about 200 nm. In some examples, the width or diameter of the opening of the feature in a mid-of-line application may be about 5 nm to about 20 nm, or about 7 nm to about 10 nm. For example, the aspect ratio may be between about 2 and about 100.
[0047] In certain embodiments, 3D NAND devices replace tungsten with another metal (such as cobalt, nickel, and / or alloys of either). In some examples, the non-W metal fills the word lines. In some examples, the non-W metal fills the 3D NAND contacts. These contacts may have dimensions comparable to large TSVs. The word lines may take the form of large plates deposited at various levels.
[0048] Contact metal may be formed by electroplating metal filling through slits etched through the ONON stack after removal of the Si3N4. Example process flows for fabricating 3D NAND structures with evaporated tungsten or other metals are described in PCT Patent Application No. PCT / US2020 / 013693, filed January 15, 2020, and U.S. Patent Application Publication No. 20180144977, published May 24, 2018, each of which is incorporated herein by reference in its entirety.
[0049] In some embodiments, electroplated filled Ni, Co, or alloys of either are used to fabricate transistor gates.
[0050] In certain embodiments, the substrate onto which Co, Ni, or an alloy is electrodeposited has a seed layer or liner layer. In some examples, the seed layer or liner layer includes Co, Cu, Ni, NiB, NiBP, CoB, CoBP, CoZn, CuZn, NiZn, CoMn, CuMn, NiMn, or any combination thereof. In certain embodiments, the substrate onto which Co, Ni, or an alloy is electrodeposited has a diffusion barrier. Examples of materials that can function as a diffusion barrier include AlOx, WCN, Mo, MoOx, Zn, ZnOx, Mn, and MnOx. In certain embodiments, the seed layer or liner layer is relatively thin on average (e.g., about 0.5-5 nm thick). In certain embodiments, the seed layer or liner layer is relatively thick on average (e.g., about 50-500 nm thick).
[0051] Electroplating solution formulation Various electroplating solution formulations may be used for electroplating cobalt and / or nickel. Table 2 provides ranges for example formulations of inorganic components for cobalt electroplating solutions, nickel electroplating solutions, and alloy electroplating solutions for various applications (such as those described herein). In various embodiments, the Co or Ni electroplating solution includes metal ions and boric acid. In some embodiments, the electroplating solution includes cobalt and / or nickel ions, a counteranion, boric acid, and an additional acid (e.g., HCl). In certain embodiments, the electroplating solution has a pH in the range of about 2 to about 5. In certain embodiments, the electroplating solution has a pH in the range of about 2 to about 4. Note that in the following tables, the metal salt concentrations are provided based on the mass of the metal ions only, not including the anions of the salts that provide the metal ions. Thus, for example, a cobalt salt concentration of 30 g / L has 30 grams of cobalt ions per liter of solution. [Table 2]
[0052] In various embodiments, the concentration of the metal being plated (e.g., cobalt or nickel) is relatively higher than that used in other integrated circuit electroplating fill applications for these metals. In certain embodiments, the concentration of cobalt ions in the electroplating solution is about 10 to about 40 g / L or about 20 to about 40 g / L. In certain embodiments, the concentration of nickel ions in the electroplating solution is about 20 to about 80 g / L or about 30 to about 80 g / L. In relatively large or deep features (such as those found in some applications described herein), the deeper portions of the feature are relatively inaccessible to the bulk solution (even when the electroplating cell has strong convection). As a result, unless the electroplating solution has a relatively high concentration of metal ions, these portions of the feature may become depleted of metal ions during electroplating. If metal ions are depleted in deeper regions of the feature while metal ions are still available in less deep regions, voids may form in the deeper regions of the electrofill feature.
[0053] Furthermore, features having relatively large volumes may require relatively high deposition rates to maintain processing throughput. Such high electroplating rates and associated high current densities may be supported with the relatively high metal ion concentration solutions described herein.
[0054] Examples of salt anions that can be used with the electroreduced metal cations include nitrates, halides, borates, phosphates, and nitrates. In certain embodiments, the anions are or include chloride and / or bromide.
[0055] To electroplate alloys, the electroplating solution includes at least two metal ions. Electroplating solutions for depositing metal alloys may use metal salts that are reduced within a similar electrochemical process window. Co and / or Examples of metal alloys that can be produced by applying an electric potential to a solution of Ni Contains other elements such as Cu, Ag, Au, Mn, Fe, Cr, Ru, P, B, C, N, Mo, Ir, Re, Pd, and PtIn some instances, the metal salts in the electroplating solution include Co and W's The alloy may be selected to electroplate a Ni-Mo alloy, a Ni-W alloy, a Co-Mo alloy, or a Ni-Mo alloy. In some embodiments, the alloy is deposited from an electroplating solution having complexing ligands or other additives that selectively inhibit or activate the electrodeposition of one metal relative to another metal in the alloy. For example, if thermodynamics and / or kinetics favor the deposition of a first metal over a second metal at a particular operating potential, the electroplating solution may include a complexing ligand that inhibits the deposition of the first metal more than it inhibits the deposition of the second metal. In this manner, and other methods with similar effect, an electrochemical window is selected that deposits the alloy metals in the desired ratio.
[0056] In embodiments employing bottom-up fill of patterned features, one or more organic additives may be added to the electroplating solution. Such additives alter the deposition rate of metal at the bottom of the feature and above the field. Table 3 provides example ranges of organic additives in electroplating solutions for producing bottom-up fill in high aspect ratio features. Of course, concentrations may vary within these ranges depending on the chemical additives used. In general, these ranges apply to any of the example compounds described below. [Table 3]
[0057] In various embodiments, bottom-up fill is facilitated by establishing a concentration gradient of suppressor and / or hydrogen ions within the feature from the field region (higher concentration) to the bottom or lower recessed region of the feature (lower concentration). The lower concentration of suppressor and / or hydrogen ions at and / or near the bottom of the feature facilitates faster electroplating in those regions compared to electroplating in the field or upper regions of the feature (regions of the feature closer to the field region).
[0058] Because cobalt and certain other metals are not electroplated with 100% current efficiency from acidic electroplating solutions, the local concentration of hydrogen ions (and corresponding local pH) can have a strong effect on the relative rates of metal electroplating. Regions of relatively high hydrogen ion concentration allow the hydrogen evolution reaction to significantly compete with the metal deposition reaction, resulting in relatively slower rates of metal deposition. In contrast, regions of relatively low hydrogen ion concentration produce less elemental hydrogen, thereby resulting in higher current efficiency and faster rates of metal deposition. Hydrogen ion gradients can exist within features due to various physical and chemical factors. For example, geometrically, there is more substrate surface area per unit volume than in field regions. As a result, more reactions occur per unit volume within features than outside the features. Furthermore, convection in the bulk electroplating solution can readily supply hydrogen ions to field regions but less readily to features (especially deeply recessed portions of features). Thus, the hydrogen ion concentration tends to remain lower within the feature (especially in the deep regions of the feature) than in the field region or upper portions of the feature.
[0059] FIG. 1 illustrates how solution components can act to drive bottom-up fill within a recessed feature 103. The feature field 105 and upper sidewalls 107 are relatively passivated, and electroplating is inhibited by the accumulation of organic additives 109. Hydrogen ion adsorption and / or mass transport to the field can also reduce the metal deposition rate on the field due to competing hydrogen reduction reactions. Generally, this leads to slower cobalt deposition 111 at the top of the feature, enabling void-free bottom-up fill to be obtained over a wide range of feature sizes. The difference in electroplating rate at the bottom of the feature compared to the electroplating rate on the field can be increased by organic additives, organic additive decomposition, or hydrogen consumption and / or depletion. To establish void-free fill, typically, a concentration gradient of organic additive coverage and / or hydrogen ions within the feature can be established. This can be achieved by setting process parameters such as initial solution concentration (e.g., pH), mass transport (RPM of the substrate being plated), and electroplating current. A wide range of operating conditions can support hydrogen ion gradients. These may be determined empirically, by modeling fundamental mass transport and other relevant physical conditions, or by a combination of both approaches. The gradient is a function of the applied plating current, which drives the consumption of hydrogen ions. As discussed above, the gradient is created by the geometry of the feature, which provides a greater driving force for hydrogen ion consumption in the lower part of the feature than in the field region. In certain embodiments, the initial composition of the electroplating bath has a hydrogen ion concentration of about 0.00001 to 6.4 M.
[0060] In certain embodiments, the electroplating solution includes a suppressor in addition to the cobalt salt and / or nickel salt. In some examples, the electroplating solution includes a suppressor as the only additive and does not include an accelerator or leveler. In some examples, the electroplating solution includes a suppressor along with an accelerator and, optionally, a leveler. In some examples, the electroplating solution includes a suppressor along with a leveler.
[0061] In general, suppressor molecules, or "suppressors," are molecules that prevent metal ions from readily reducing onto the substrate. One mechanism by which this can occur is by chemisorbing molecules onto the substrate surface that either sterically hinder the access of the metal ions or block reactive sites on the substrate. During the electroplating process, the selected suppressor interacts with both the unplated substrate surface (e.g., seed layer) and the partially plated metal film.
[0062] Suppressors (either alone or in combination with other electroplating solution additives) are surface-kinetic polarizing compounds that cause a significant increase in the voltage drop at the substrate-electrolyte interface. In some instances, halide ions act as chemisorbed bridges between the suppressor molecules and the substrate surface. Suppressors (1) increase the local polarization of the substrate surface in areas where the suppressor is present compared to areas where the suppressor is absent (or present at relatively low concentrations), and (2) increase the polarization of the substrate surface globally. Increased polarization (local and / or global) corresponds to increased resistivity / impedance and, in turn, slower plating at a particular applied potential.
[0063] Inhibitors can be relatively large molecules and, in some instances, are polymers (e.g., polyethylene oxide (PEO), polypropylene oxide (PPO), polyethylene glycol (PEG), polypropylene glycol (PPG), other common polyalkylene glycol (PAG) polymers, copolymers of any of these (including block copolymers), etc.). These polymers and copolymers may be further functionalized with functional groups that may improve solubility or interaction with the substrate. Some examples of functionalized inhibitors include polyethylene oxide and polypropylene oxide with sulfur- and / or nitrogen-containing functional groups. Inhibitors can have linear or branched structures, or both. A particular type of inhibitor molecule includes organic chemisorbed corrosion inhibitors. Inhibitor molecules of various molecular weights may coexist in the inhibitor solution.
[0064] Due in part to the large size of the suppressors, the diffusion of these compounds into recessed features may be slower than other electroplating solution components.
[0065] In some instances, the suppressor may not be significantly incorporated into the deposited film, but may slowly decompose over time within the electroplating solution by electrolysis or chemical decomposition.
[0066] Examples of classes of inhibitors include, but are not limited to, ether derivatives, ester derivatives, glycol derivatives, thiazole compounds, pyridine compounds and derivatives, and polymeric compounds.
[0067] Examples of inhibitor ethers include nonylphenol polyglycol ether, polyethylene glycol dimethyl ether, octanediol bis(polyalkylene glycol ether), octanol polyalkylene glycol ether, polyethylene glycol dimethyl ether, and stearyl alcohol polyglycol ether.
[0068] Examples of inhibitor esters include polyglycol oleate and polyglycol stearate.
[0069] Examples of suppressor glycols include polyethylene propylene glycol, polyethylene glycol, polyoxypropylene glycol, and polypropylene glycol. Examples of suppressor thiazoles include 2-amino-5-(ethylthio)-1,3,4-thiadiazole, 6-amino-2-mercaptobenzothiazole, and 2-mercaptobenzothiazole.
[0070] Examples of inhibitor pyridine compounds include 2-aminopyridine, 3-hydroxypyridine-4-sulfonic acid, purine, 2,2'-dipyridyl disulfide, 3-pyridinesulfonic acid, and 3-(1-pyridino)-1-propanesulfonic acid.
[0071] Examples of other inhibitors include carboxymethylcellulose, polyethyleneimine, polyvinyl alcohol, polyethylene oxide, ethylene oxide-propylene oxide copolymer, butyl alcohol-ethylene oxide-propylene oxide copolymer, 2-mercapto-5-benzimidazole sulfonic acid, 2-mercaptobenzimidazole (MBI), benzotriazole, o-benzoic acid sulfimide (saccharin), benzethonium chloride, thiazonium bromide, 1-benzylimidazole, and 2-thiazoline-2-thiol. Examples of other polymeric compounds include polyvinylpyrrolidone (PVP), polyacrylamide, and poly(2-ethyl-2-oxazolone).
[0072] In certain embodiments, any one or more of the above suppressors may be provided in any of the electroplating solutions disclosed herein at a concentration of about 1 to 10,000 ppm.
[0073] Figure 2 provides a polarization plot showing the inhibition of nickel metal deposition with increasing amounts of suppressor to the electroplating solution. If a gradient of the same compound exists across a patterned feature due to diffusion, mass transport, or coverage, having a gradient of suppressor coverage through the feature depth can produce bottom-up filling. As there is less organic additive downward within the feature, more metal deposition will occur because the surface is less polarized or passivated.
[0074] In some applications, accelerators are included in the electroplating solution to support bottom-up filling by preferentially accumulating at the bottom of the feature and helping to catalyze metal deposition.
[0075] Accelerator molecules may reduce metal ions onto a substrate more readily than an inhibited surface (e.g., a surface with inhibiter species attached). Accelerators (either alone or in combination with other electroplating solution additives) are believed to locally reduce the polarization effects associated with the presence of the inhibiter, thereby locally increasing the electrodeposition rate. Accelerator molecules may be employed at least in part based on their ability to maintain higher plating rates in areas where these higher rates occur (relative to areas where the inhibiter is affecting the polarization characteristics).
[0076] Electrochemically, the promoter reduces the amount of polarization required to deposit metal on the inhibited substrate. Because the inhibitor molecule inhibits more than the promoter, one possible mechanism of inhibitor action involves competition with the promoter for binding sites, resulting in higher current density in the region where the inhibitor has been displaced by the promoter.
[0077] The reduction in polarization effects is most pronounced in regions of the substrate surface where the concentration of accelerator is highest (i.e., polarization is reduced as a function of the local surface concentration of adsorbed accelerator or the ratio of accelerator to suppressor). Although accelerators may be strongly adsorbed to the substrate surface and generally become immobilized laterally on the surface as a result of the plating reaction, in some embodiments, the accelerator does not become significantly incorporated into the film. In such instances, the accelerator may remain on the surface as the metal is deposited. In some instances, once the recess is filled, the local accelerator concentration is higher at the surface within the recess. Accelerators are smaller molecules than suppressors and tend to diffuse faster into recess features.
[0078] Examples of types of accelerators include, but are not limited to, esters such as sulfonate esters, salts such as sulfonate salts, mercapto compounds, and triazole compounds.
[0079] Examples of accelerator esters include N,N-dimethyl-dithiocarbamic acid (3-sulfopropyl) ester, 3-mercapto-propylsulfonic acid (3-sulfopropyl) ester, carboxylic acid-dithio-o-ethyl ester-s-ester with 3-mercapto-1-propanesulfonic acid potassium salt, N,N-dimethyl-dithiocarbamic acid (3-sulfoethyl) ester, 3-mercapto-ethylpropylsulfonic acid (3-sulfoethyl) ester, and carboxylic acid-dithio-o-ethyl ester-s-ester.
[0080] Examples of promoter salts include 3-mercapto-propylsulfonic acid sodium salt, 3-(benzotriazolyl-s-thio)propylsulfonic acid sodium salt, and 3-mercapto-ethylsulfonic acid sodium salt.
[0081] Examples of accelerator mercapto compounds include mercaptopropylsulfonic acid, 1,3,4-thiadiazole-2,5-dithiol, 2-mercapto-5-benzimidazole sulfonic acid, 3-amino-5-mercapto-1,2,4-triazole, 5-amino-2-mercaptobenzimidazole, and 2-mercaptothiazole.
[0082] Examples of accelerator triazole compounds include 1,2,4-triazole and 1-H-benzotriazole sulfonic acid.
[0083] Examples of other accelerators include bis-sulfopropyl disulfide, pyridinium propyl sulfobetaine, 1-sodium-3-mercaptopropane-1-sulfonate, pyridinium ethyl sulfobetaine, thiourea, bis-3-sulfopropyl disulfide, thiourea, poly(N-isopropylacrylamide), and thiazole.
[0084] In certain embodiments, any of these accelerators disclosed herein may be present in the electroplating solution at a concentration of about 1 to 10,000 ppm.
[0085] For some layers, there are various feature densities. In areas of dense arrays, less inhibitor adsorbs onto the surface due to the greater number of patterned features. This means that when filling is complete, the metal deposited in these areas is less inhibited and electroplated at a faster rate than in isolated areas. This can lead to variations in the electroplated metal topography, which can cause problems during the chemical mechanical planarization process. To minimize topography variations, adding a leveling compound to the solution can ensure uniform deposition rates across dense and isolated features.
[0086] Smoothing molecules may act by limiting the depolarizing effect of accelerator molecules. Levelers may perform this function particularly on exposed portions of the substrate (such as the field region of a wafer being processed) and on the sidewalls of features. Levelers may act by desorbing or displacing accelerators, preventing them from effectively competing with suppressors for binding sites, burying accelerators in the plated film, or chemically decomposing them. The local concentration of the leveler is determined in part by mass transport. Because levelers often react or are consumed at the substrate surface at or near diffusion-limited rates, it is believed that a continuous supply of leveler can maintain uniform plating conditions over time. Compounds that do not act primarily by adsorption onto the substrate surface are not considered levelers.
[0087] Smoothing compounds are generally classified as such based on their electrochemical function and effect and do not necessarily have a specific chemical structure or composition. However, smoothing agents often contain one or more nitrogen, amine, imide, or imidazole groups and may also contain sulfur functional groups. Certain smoothing agents contain one or more five- and six-membered rings and / or conjugated organic compound derivatives. The nitrogen group may form part of a ring structure.
[0088] Examples of chemical classes of leveling agents include alkyl, aryl, and heterocyclic amines, epoxides, aromatic nitrogen heterocycles, benzothiazole derivatives, cyclic imides, benzoic acid derivatives, and polymeric compounds.
[0089] In the amine-containing leveling agent, the amine may be a primary, secondary, or tertiary alkylamine. Furthermore, the amine may be an arylamine or a heterocyclic amine. Examples of amines include, but are not limited to, dialkylamines, trialkylamines, arylalkylamines, triazoles, imidazoles, triazoles, tetrazoles, benzimidazoles, benzotriazoles, piperidine, morpholine, piperazine, pyridine, oxazoles, benzoxazoles, pyrimidines, quinolines, and isoquinolines. In certain embodiments, the leveling agent is imidazole and / or pyridine. Other examples of leveling agents include Janus Green B and Prussian Blue.
[0090] In certain embodiments, the smoothing agent is an aromatic nitrogen heterocycle. Examples of aromatic nitrogen heterocycle smoothing agents include 2,2-bipyridine, 2-hydroxypyridine, 8-hydroxyquinoline, picoline, pyrrole, thiazole, isoxazole, 6-H-1,2,5-thiadiazine, azocine, azecine, indole, isoindole, purine, carbazole, pyrazine, pyridazine, acridine, indolizine, and pyrazole.
[0091] In certain embodiments, the smoothing agent is benzothiazole or a derivative thereof. Examples of benzothiazole derivative smoothing agents include o-benzoic acid sulfimide (saccharin), benzothiazole, 2-aminobenzothiazole, 2-hydroxybenzothiazole, 2-mercaptobenzothiazole, 2-methylthiobenzothiazole, 2,2'-dithiobis(benzothiazole), 2-(2-hydroxyphenyl)benzothiazole, methabenzthiazuron, and 2(4-aminophenyl)benzothiazole.
[0092] In certain embodiments, the smoothing agent is a cyclic imide. Examples of cyclic imide smoothing agents include phthalimide, N-methylphthalimide, N-ethylphthalimide, N-bromophthalimide, N-chlorophthalimide, 3-hydroxyisoindolinone, maleimide, 2,3-dibromomaleimide, N-methylsuccinimide, N-phenylmaleimide, N-maleoyl-b-alanine, and pyromellitic diimide.
[0093] In certain embodiments, the smoothing agent is benzoic acid or a derivative thereof. Examples of benzoic acid derivative smoothing agents include benzamides, substituted benzamides, benzoates, alkyl benzoates, hydroxybenzoates, benzyl alcohol, benzaldehyde, benzophonone, and benzoguanamine.
[0094] The leveling agent compound may also contain ethoxide groups. For example, the leveling agent may have a general backbone similar to that found in polyethylene glycol or polyethylene oxide with, for example, amine fragments functionally inserted on the chain (e.g., Janus Green B).
[0095] In certain embodiments, the leveling agent is an epoxide. Examples of epoxides include, but are not limited to, epihalohydrins (such as epichlorohydrin and epibromohydrin) and polyepoxide compounds. Polyepoxide compounds having two or more epoxide moieties linked by ether-containing bonds are used in some electroplating solutions.
[0096] Some leveling compounds are polymeric, while others are not. Examples of polymeric leveling compounds include, but are not limited to, polyethyleneimine, polyamidoamine, and reaction products of various oxygen epoxides or sulfides with amines. Another example of a polymeric leveling agent is polyvinylpyrrolidone (PVP). An example of a non-polymeric leveling agent is 6-mercaptohexane.
[0097] Electroplating Processing Parameters In certain embodiments, the electroplating process is carried out at a temperature ranging from about 18° C. to about 90° C. In certain embodiments, the electroplating process is carried out at a temperature ranging from about 25° C. to about 50° C. Higher electroplating temperatures may support faster electroplating fill rates, which may be useful when filling features having larger volumes, such as in some of the certain applications described herein, such as TSV applications.
[0098] In certain embodiments, the current and / or voltage of the electroplating cell is adjusted over part or all of the feature filling process. Linearly increasing Current ramping can enable the maintenance of a hydrogen ion concentration gradient that promotes bottom-up filling. As a feature fills with metal, the driving force (at the top of the filled metal) for local hydrogen ion depletion decreases. At and near the top of the feature, hydrogen ions are more easily transported from the bulk solution by convection, and geometric considerations favoring hydrogen ion depletion (larger reactive surface area per unit volume) decrease. Therefore, increasing the current density within the feature can help maintain a hydrogen ion concentration gradient within the unfilled regions of a partially filled feature.
[0099] In a particular embodiment, the current density on the substrate is about 0.002 mA / cm 2 s ~ approx. 0.02mA / cm 2 at a speed of s Linear increase In certain embodiments, the starting current for the bulk electroplating process is about 0.15-1.8 mA / cm. 2 In certain embodiments, the current at the end of the bulk electroplating process is about 1-5 mA / cm 2 The end of the bulk electroplating process may be when all or nearly all features are completely filled to the level of the field area and / or when a substantial overburden has formed. The actual value will, of course, depend on the application. As explained, the current density is adjusted to consume hydrogen ions at the bottom of the feature to set up a gradient that drives the filling. Linear increaseLower pH applications require a higher starting current density to consume enough hydrogen ions to establish a gradient. The current density values provided herein are determined using the geometric plane of the plating surface of the substrate. In other words, the current density values are determined assuming the plating surface is perfectly flat and no additional surface area is created by features.
[0100] Pre- and post-electroplating treatment 3 shows an example process flow for electrodeposition on an electroplating platform. Operations in dashed blocks are optional steps performed in a vacuum pretreatment module (VPM). Liquid pretreatment modules that may be used to improve feature bottom fill depend on the feature depth / size.
[0101] 3 illustrates process 301 for depositing metal in contact vias, through-silicon vias, or other interconnect channels. As shown, process 301 begins with depositing a conductive seed layer and / or a diffusion barrier layer on a substrate having a plurality of features (e.g., high aspect ratio features). See operation 303. As described elsewhere herein, in certain embodiments, the substrate features may define microTSV holes or device contact holes (e.g., contact holes for 3D NAND devices). In certain embodiments, the conductive seed layer and / or barrier layer are deposited by a vapor deposition technique, such as chemical vapor deposition, or by a physical vapor deposition technique, such as sputtering.
[0102] After the conductive seed layer and / or diffusion barrier layer are deposited on the substrate, as shown in block 303, the substrate may be aligned, as shown in block 305. Alignment ensures that the substrate passes through the tool modules reproducibly, which facilitates troubleshooting. For example, if a pattern is observed on the right side of the wafer, this may point to a particular component or feature on the tool that is causing the problem. Alignment may be used in a wafer metrology tool to align the wafer position on a grid and compare the wafer to wafer metrology results. In certain embodiments, alignment is performed to ensure that particular features on the substrate are properly positioned relative to corresponding features on the processing tool. For example, wafers sometimes have notches or other variations on their perimeter and may need to be azimuthally aligned with a seal on the wafer holder of the electroplating tool to ensure that the electroplating solution does not spill into the area above the wafer.
[0103] As described elsewhere herein, the conductive seed layer may be susceptible to oxidation upon exposure to ambient conditions. In various embodiments, the seed layer is exposed to atmospheric conditions after being deposited by PVD or vapor deposition techniques. During this exposure, portions of the conductive seed (which is often a metal layer) may oxidize to form metal oxides on or within the metal seed layer.
[0104] To convert some metal oxides back to metal and / or reduce or mitigate the conversion of the metal seed layer to metal oxide, the substrate is optionally chemically reduced or exposed to chemically reducing conditions. For example, as shown in the figure, the substrate may be placed in a vacuum reaction chamber as described in operation 307. In the illustrated embodiment, the substrate in the vacuum reaction chamber is exposed to a hydrogen-containing plasma, which reduces any oxides formed on the metal seed layer back to elemental metal. See block 309. Note that, like the operation in block 307, the operation in block 309 is optional. In other words, in certain embodiments, the metal seed layer need not be exposed to a reducing plasma.
[0105] After optional operations 307 and 309 are completed, the wafer is optionally moved to a pre-wetting module, as shown in operation 311. As described elsewhere herein, the pre-wetting module pre-wets the substrate prior to electroplating. The pre-wet solution may include one or more components of the electroplating solution. By pre-wetting the substrate in the pre-wet module, the process wets the unfilled features with a liquid solution and removes air gaps or other gas voids that may be present in the features prior to electroplating. As described, air or other gas voids in a feature can effectively prevent portions of the feature from being filled with metal.
[0106] The substrate is optionally exposed to a pre-wet operation 311 and then transferred to a metal deposition electroplating bath, see block 313. This operation is typically performed quickly (e.g., in no more than about 60 seconds) to avoid exposure to atmospheric oxygen.
[0107] After the substrate is immersed in the electroplating solution, it is exposed to a reducing potential (cathodic potential) at which metal ions in the electroplating solution deposit as a metal layer on the surface of the substrate. As described elsewhere herein, the electroplating solution and associated electroplating deposition conditions deposit metal within the features of the substrate in a bottom-up fill mechanism, starting at the bottom and filling the feature. Bottom-up fill reduces the formation of voids and seams in the metal electroplated within the feature.
[0108] After the electroplating fill process is completed in operation 315, the substrate is removed from the electroplating solution, rinsed and dried, and optionally undergoes an edge bevel removal process, see operation or block 317. Finally, as shown in block 319, the substrate is optionally annealed to modify the electroplated metal.
[0109] Devices and Systems Various hardware systems may be used to electroplate cobalt, nickel, and / or alloys thereof as disclosed herein. The hardware may include one or more electroplating cells with one or more associated modules, any of which may be configured to perform pre-electroplating or post-electroplating operations. In some embodiments, the cells and modules are arranged in a single enclosure or frame. In some embodiments, the cells and modules are configured to enable multiple different pretreatment options, which may include, for example, (1) substrate prewet with conductive seed or liner preservation or recovery, (2) substrate prewet only without seed or liner preservation or recovery, or (3) no prewet or seed / liner preservation. Option 1 may be appropriate for substrates with relatively high aspect ratios and / or deep features, along with thin seeds or liners and / or long exposure to ambient conditions before electroplating. Thin seed layers or liners are prone to oxidation and void formation during electroplating, issues that may be ameliorated by seed / liner recovery operations. Deep and / or high aspect ratio features are prone to void formation associated with retaining air pockets during electroplating, a problem that can be ameliorated by prewetting. Option 2 may be suitable for substrates with a robust seed or liner layer but with deep or high aspect ratio features. Option 3 may be suitable for substrates with a robust seed or liner layer but with relatively shallow and / or low aspect ratio features.
[0110] Thin seeds exposed to atmospheric oxygen and water vapor can oxidize rapidly. When wafers wait in a queue for electroplating for several hours, sidewall void formation can occur due to oxide dissolution. Where appropriate, such as when there is a long wafer processing wait time and / or the seed layer is relatively thin, the metal oxide may be converted back to metal using a pretreatment module that chemically reduces the oxide on the seed layer to metal. Such pretreatment may be a dry or wet process. An example of a dry process is a plasma process performed in a plasma vacuum pretreatment module. In certain embodiments, the vacuum pretreatment is performed using a hydrogen-containing plasma. Examples of methods and apparatus for performing chemical reduction operations on a seed layer are described in the following patent documents, which are incorporated by reference in their entireties: U.S. Patent No. 9,070,750, issued June 30, 2015; U.S. Patent No. 9,865,501, issued January 9, 2018; U.S. Patent Application Publication No. 20150299886, published October 22, 2015; and U.S. Patent Application Publication No. 20150376792, published December 31, 2015.
[0111] In some embodiments, dry pretreatments use plasma to modify the surface of the substrate. Plasma treatments can reduce oxides on the surface of the substrate. Some such treatments use reducing plasma. In certain embodiments, the plasma is generated from a gas mixture of hydrogen and a carrier (e.g., helium). The pressure of the gas mixture can be about 0.1 to 10 Torr (e.g., about 1 to 3 Torr). The plasma is ignited in the gas mixture using, for example, radio frequency energy input, for example, with a power of about 0.25 to 5 kW (e.g., about 1 to 3 kW). In certain embodiments, the plasma generation chamber can be separated from the substrate by a perforated barrier (e.g., a showerhead), which can be grounded and cooled to reduce ion flux while allowing hydrogen radical flux. During processing, the substrate can rest on a heated pedestal below the showerhead. An example of a remote plasma system is described in U.S. Patent No. 9,865,501, issued January 9, 2018, which is incorporated herein by reference in its entirety.
[0112] In certain plasma pretreatment embodiments, the temperature of the substrate is maintained (optionally by controlling the pedestal temperature) between about 30°C and 600°C (e.g., between about 75°C and 250°C). In certain embodiments, the plasma pretreatment is carried out for a period of about 30 seconds to 60 minutes. The substrate may be allowed to cool before being allowed to contact the normal atmosphere.
[0113] If the seed is sufficiently thick, oxide dissolution may not be an issue and plasma or other types of reducing operations may not be required. The electroplating solutions, processes, and apparatus described herein are useful for processing a variety of different substrate types and may be utilized to process some substrates with relatively thin or damaged seed layers, and also to process some substrates with features with relatively thick and / or robust seed layers.
[0114] In addition to or instead of the seed layer reduction operation, the substrate may undergo a pre-wet operation. Such a pre-treatment operation may be used, for example, for features deeper than about 1 micron. In certain embodiments, the pre-wet is performed under vacuum. This operation may expel air bubbles trapped within the feature that, if not removed, would produce large voided features. In certain embodiments, the substrate is pre-wetted with purified water, purified water containing one or more organic electroplating additives, ethyl alcohol, or an ethyl alcohol / purified water solution. The organic additive used in the pre-wet may be a suppressor or wetting agent, such as any of the additives described herein. A relatively high concentration of organic additive may be added to the pre-wet module solution to aid in wetting of the field and suppression of electroplating. Examples of methods and apparatus for performing pre-wetting of a substrate are described in the following patent documents, which are incorporated by reference in their entireties: U.S. Patent Application Publication No. 20100320081, U.S. Patent Application Publication No. 2016 / 0273117 by N. Doubina et al., U.S. Patent No. 9,455,139 by Blackman, and U.S. Patent No. 7,232,513 by E.G. Webb et al.
[0115] 4A and 4B provide an example of a hardware platform on which at least a portion of the disclosed processes may be performed. Other embodiments may include additional electroplating cells, robotic handlers, and / or modules, and / or cells, modules, robotic handlers of different formats, etc. In certain embodiments, the platform is configured to process multiple substrates per one of the processes covered in the flowchart of FIG.
[0116] Upstream of the electroplating tool, the wafer may be prepared, for example, by etching a pattern into one or more dielectric layers and / or depositing a diffusion barrier and / or seed layer.
[0117] The electroplating tool or platform 451 shown in FIG. 4A includes multiple electroplating cells 453 (three in this example) and multiple post-electroplating modules 455 (three in this example). A handler 457 (e.g., a robot) is configured to move wafers in and out of the electroplating cells 453 and the post-electroplating modules 455. Collectively, the electroplating cells 453 and the post-electroplating modules 455 may form part of the "back end" of the platform 451. The front end of the platform 451 may interface with systems or queues external to the platform. For example, substrates to be electroplated may be delivered to the platform 451 through a front-end loading FOUP 459. The tool may be configured such that substrates from the FOUP 459 are moved to the main substrate processing area by a front-end handler 461 (e.g., a robot) capable of retracting and moving driven substrates in multiple dimensions. In the illustrated embodiment, there are two front-end accessible stations: a plasma pre-treatment module 463 and a pre-wet pre-treatment module 465. An aligner 467 and a handler 468 are associated with the pre-wet pretreatment module 465. The electroplating platform 451 further includes one or more annealing chambers 469 configured to heat and anneal the substrates after electroplating.
[0118] As shown, in some embodiments, the plasma pre-treatment module is larger than the anneal module and / or the anneal module is larger than the pre-wet module. In certain embodiments, the plasma module may include multiple substrate processing stations, enabling parallel pre-treatment. In some instances, the pre-wet module has only a single station for substrate treatment. This difference may account, at least in part, for the difference in relative size of these modules. Arranging the anneal module, pre-wet module, and plasma treatment module within a platform enclosure or frame to account for their relative sizes allows for a compact platform design.
[0119] Electroplating Equipment (Platform) 451 is shown looking down from above in Figure 4A. In some embodiments, two or more levels are "stacked" on top of each other, each optionally having the same or different types of processing stations.
[0120] In certain embodiments, the pre-wetting module may be positioned so that substrates can proceed through plasma pre-treatment to the pre-wet module, or so that wafers can proceed directly from the FOUP (or other substrate-holding component) to the pre-wet module depending on the input wafer requirements.
[0121] Various post-electroplating operations may be performed in appropriately configured modules. These may include, for example, any one or more of spin rinse, spin dry, metal and / or silicon wet etching, and edge bevel removal. As mentioned above, an annealing module may be utilized as a post-electroplating module. Annealing may be used to grow the grains of the electrodeposited metal, thereby reducing the resistance of the metal.
[0122] In certain embodiments, the front portion of the electroplating platform may be configured to provide flexibility in the pre-treatment that is applied to the substrate depending on the type of structure to be electroplated on the platform. For example, as described above, different types of substrates may be subjected to pre-wet and / or plasma treatment.
[0123] The electroplating platform may or may not include a load lock suitable for transferring substrates under vacuum from one pre-treatment module to another, or from a pre-treatment module to an electroplating cell. As previously mentioned, the pre-wet module may be configured to operate at sub-atmospheric pressure. In certain embodiments, the electroplating system is configured to transfer substrates to an electroplating cell for metal deposition immediately after pre-wet. In some examples, the system configures the substrate in a manner that maintains a thin film of water on the wafer surface to minimize air entrapment within the structure. In the tool configuration shown in FIG. 4A, some substrates may be transferred directly to the electroplating cell in a manner that bypasses the pre-wet. Such operation may be appropriate when a pre-wet step is not necessarily required, which may be the case for a particular wafer lot.
[0124] Figure 4B shows three possible paths a substrate can take as it passes through the pre-processing modules in the tool. death, Pre-wet fruit, and seed reduction (e.g., plasma treatment) along with prewetting. )in In some embodiments, there may be another route: seed reduction (e.g., plasma treatment).
[0125] In the example of FIG. 4B, two of the paths are the same as in the embodiment of FIG. 4A, where the first handler 461, which is near the FOUP, is the aligner. 467 The aligner is configured to load substrates onto the aligner, so it does not utilize a handler. 467 Therefore, the substrate is The transfer arm of that module to a vacuum or wet pretreatment unit.
[0126] In various embodiments, the plasma pre-treatment module and the pre-wet module are provided in close proximity within a common vacuum environment, as both modules may operate below atmospheric pressure. In some embodiments, the plasma pre-treatment module operates at a lower pressure than the pre-wet module.
[0127] Systems with a plasma pretreatment module in close proximity to the prewet module may reduce or eliminate exposure of sensitive seed or liner layers to atmospheric oxygen after pretreatment and before prewet. In certain embodiments, the prewet module is configured as a transfer load lock for moving substrates from the plasma unit to the back end of the tool, including the electroplating cell. In other words, the plasma pretreatment module operates at high vacuum, the electroplating cell operates at atmospheric pressure, and the prewet module operates at an intermediate pressure. In such examples, the tool may be configured so that substrates are transferred directly from the plasma pretreatment module to the prewet module without breaking vacuum. This configuration may reduce the time it takes for wafers to move through the tool. In some such embodiments, a separate load lock is provided between the pretreatment module and the prewet module. Whether the prewet module functions as a load lock or a separate load lock is provided between the plasma treatment module and the prewet module, the system may have a relatively small footprint compared to systems in which the pretreatment module and the prewet module are largely separated.
[0128] 4C provides an example of a single electroplating cell 401 that may be used to electroplate Co, Ni, and their alloys. ElectroplatingCell 401 may function as one of cells 453 in platform 451 of FIG. 4A. Additives (e.g., accelerators, suppressors, and / or levelers) added to the electrolyte may react with the anode in an undesirable manner. Therefore, the anode and cathode regions of an electroplating cell are sometimes separated by a membrane so that plating solutions of different compositions can be used in each region. The electroplating solution in the cathode region is called catholyte, and the plating solution in the anode region is called anolyte. Many engineering designs are available for introducing the anolyte and catholyte into the plating apparatus.
[0129] Referring to FIG. 4C, electroplating according to one embodiment cell 401 is shown in cross section. An electroplating tank 403 is shown to level 405. The catholyte portion of the tank is adapted to receive a substrate within the catholyte. A wafer 407 is immersed in the plating solution and held by, for example, a "clamshell" substrate holder 409 attached to a rotatable spindle 411, which allows the clamshell substrate holder 409 to rotate along with the wafer 407. An overview of clamshell-type plating apparatuses having aspects suitable for use in the present invention is described in detail in U.S. Patton et al., U.S. Pat. No. 6,156,167, and U.S. Pat. No. 6,800,187, issued to Reid et al., both of which are incorporated herein by reference in their entireties.
[0130] An anode 413 is positioned below the wafer in the electroplating bath 403 and is separated from the wafer area by a membrane 415, such as an ion-selective membrane. These membranes are typically made of ionomer materials, such as perfluorinated copolymers containing sulfonic acid groups (e.g., Nafion™), sulfonated polyimides, and other materials known to those skilled in the art to be suitable for cation exchange. Examples of suitable Nafion™ membranes include the N324 and N424 membranes manufactured by DuPont de Nemours. The area below the anode membrane is often referred to as the “anode chamber.” The ion-selective anode membrane 415 allows ions to pass between the anode and cathode regions of the plating cell while preventing particles generated at the anode from accessing and contaminating the wafer. The anode membrane may improve plating uniformity by distributing current during the plating process. A detailed description of suitable anode membranes is provided in US Pat. Nos. 6,146,798 and 6,569,299 issued to Reid et al., both of which are incorporated herein by reference in their entireties.
[0131] During electroplating, ions from the plating solution are reduced on the substrate. The metal ions must diffuse through a diffusion boundary layer into the TSV holes or other features. A typical method to aid diffusion is through convection of the electroplating solution, provided by a pump 417. Additionally, a vibrational agitation or sonic agitation member may be utilized in conjunction with wafer rotation. For example, a vibrational transducer 408 may be attached to the clamshell substrate holder 409.
[0132] The electroplating solution is pumped by pump 417. Plating tank403. In certain embodiments, the plating solution flows upward toward the center of the wafer 407 through the anode membrane 415 and the diffuser plate 419, then flows radially outward across the wafer 407. The electroplating solution may be supplied from the side of the plating tank 403 to the anode region of the tank. The electroplating solution then overflows from the plating tank 403 into an overflow container 421. The electroplating solution is then filtered (not shown) and returned to the pump 417, completing the recirculation of the plating solution. In certain plating cell configurations, a different electrolyte is circulated through the portion of the plating cell that contains the anode, but is prevented from mixing with the main plating solution using a non-permeable or ion-selective membrane.
[0133] A reference electrode 431 is located outside the plating bath 403 in a separate chamber 433, which is replenished with overflow solution from the main plating bath 403. Alternatively, in some embodiments, the reference electrode is located near the substrate surface, with the reference electrode chamber connected to the side of or directly beneath the wafer substrate by a capillary tube or other method. The reference electrode 431 may be one of a variety of commonly used types, such as mercury, mercury sulfate, silver chloride, saturated calomel, or copper metal. In some embodiments, a contact sensing lead in direct contact with the wafer 407 may be used in addition to the reference electrode for potential measurement (not shown). In some embodiments, the contact sensing lead connects to the periphery of the wafer and is configured to sense the potential of the metal seed layer at the periphery of the wafer, but does not send any current to the wafer.
[0134] A DC power supply 435 may be used to control the current to the wafer 407. The power supply 435 has a negative output lead 439 electrically connected to the wafer 407 through one or more slip rings, brushes, and contacts (not shown). The positive output lead 441 of the power supply 435 is electrically connected to an anode 413 disposed in the plating bath 403. The power supply 435, the reference electrode 431, and a contact sensing lead (not shown) may be connected to a system controller 447, which, among other functions, enables modulation of the current and potential supplied to the elements of the electroplating cell. For example, the controller may enable electroplating in a voltage-controlled and / or current-controlled regime. The controller may include program instructions specifying the current and voltage levels that need to be applied to the various elements of the plating cell and when these levels need to be changed. When a forward current is applied, the power supply 435 biases the wafer 407 to have a negative potential relative to the anode 413. This causes current to flow from the anode 413 to the wafer 407, and an electrochemical reduction reaction occurs at the wafer surface (cathode), resulting in the deposition of a conductive layer (e.g., copper) on the surface of the wafer. An inert or active anode 414 may be placed below the wafer 407 in the electroplating bath 403 and separated from the wafer area by a membrane 415.
[0135] The apparatus may further include a heater 445 for maintaining the temperature of the electroplating solution at a particular level. The electroplating solution may also be used to transfer heat to other elements of the plating bath. For example, once a wafer 407 is loaded into the plating bath, the electroplating solution may be heated until the temperature throughout the apparatus is substantially uniform. cell A heater 445 and a pump 417 may be turned on to circulate the electroplating solution through 401. In one embodiment, the heater is connected to a system controller 447. The system controller 447 may be connected to a thermocouple to receive feedback of the plating solution temperature within the electroplating apparatus and determine the need for additional heating.
[0136] The controller typically includes one or more memory devices and one or more processors. The processor may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc. In certain embodiments, the controller controls all operations of the electroplating apparatus. A non-transitory machine-readable medium containing instructions for controlling process operations according to the present embodiments may be connected to the system controller.
[0137] In certain embodiments, system Associated with the controller 447 is a user interface. The user interface may include a display screen (graphical software display of the equipment and / or process conditions) and user input devices such as a pointing device, keyboard, touch screen, microphone, etc. Computer program code for controlling the electroplating process may be written in any conventional computer-readable programming language, such as, for example, assembly language, C, C++, Pascal, Fortran, etc. Compiled object code or script is executed by a processor to perform the tasks specified in the program. An example of a plating device that can be utilized in accordance with embodiments herein is the Lam Research Sabre tool. Electrodeposition may be performed in components that form a larger electrodeposition device.
[0138] System Controller In some embodiments, the controller is part of the system shown in FIG. 4A and / or FIG. 4B . For example, the system may include semiconductor processing equipment, such as one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (e.g., wafer holders, electrolyte circulation systems, etc.). See the discussion of FIG. 4A for an example. These systems may be integrated with electronics and / or logic for controlling the operation of the system before, during, and after processing of semiconductor wafers or substrates. The electronics and / or logic may be referred to as a “controller” and may control various components or subcomponents of the system. The controller may be programmed to control any of the processes disclosed herein, such as temperature settings (e.g., heating and / or cooling), pressure settings, current and / or potential settings, flow rate settings, fluid supply settings, rotation speed settings, substrate immersion settings, position and motion settings, wafer transfer into and out of the tool and other transfer tools and / or load locks connected or coupled to the particular system, depending on the processing requirements and / or type of the system.
[0139] Generally, a controller may be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, enables electroplating solution composition control, enables electroplating, etc. Integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be communicated to the controller in the form of various individual settings (or program files) that define operating parameters for performing specific processes on or for semiconductor wafers or instructions for the system. The operating parameters, in some embodiments, may be part of a recipe defined by a process engineer to accomplish one or more process steps during processing of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.
[0140] In some embodiments, the controller may be part of or connected to a computer that is integrated with, connected to, or otherwise networked with the system, or a combination thereof. For example, the controller may be in the “cloud” or may be all or part of a fab host computer system that can enable remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, examine the history of past manufacturing operations, or examine trends or performance indicators from multiple manufacturing operations, to change parameters of a current process, configure processing steps according to a current process, or initiate a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system over a network (which may include a local network or the Internet). The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, where the instructions specify parameters for each of the processing steps to be performed during one or more operations. The parameters may be specific to the type of process being performed and the type of tool the controller is configured to interface with or control. Thus, as described above, the controller may be distributed, such as by having one or more separate controllers networked and operating toward a common purpose (such as the process and control described herein). One example of a distributed controller for such purposes is one or more integrated circuits on an electroplating system that communicate with one or more remotely located integrated circuits (e.g., located at the platform level or remotely as part of a remote computer) that cooperate to control the process in the chamber.
[0141] Without limitation, example systems may include a metal electroplating cell or module, a spin rinse chamber or module, a bevel edge etching chamber or module, a plasma pretreatment module configured to chemically reduce a seed or liner prior to electroplating, a substrate wetting module for wetting features prior to electroplating, an etching chamber or module, a deposition chamber or module, a cleaning chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etching (ALE) chamber or module, a photoresist coating and / or patterning module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing system that may be associated with or utilized in the fabrication and / or manufacturing of semiconductor wafers.
[0142] Depending on the processing step or steps being performed by the tool, the controller may communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used in material transport to carry containers of wafers to or from tool locations and / or load ports within the semiconductor device manufacturing facility.
[0143] example Figures 5-8 show data obtained while designing a cobalt electroplating process for TSV features. Figure 5 provides a fill trace for a TSV feature (100 nm CD, 1000 nm depth). A series of constant current fill steps were utilized with the same solution formulation to determine the current density to utilize at the beginning of feature fill and at the completion of feature fill. The data indicates that seam voids were formed. Nevertheless, by performing these types of experiments with different solution formulations, process designers can adjust the solution composition and current process window to minimize seams and voids.
[0144] The example figures show the progression of cobalt filling during a constant current filling process: (A) 0.2 mA / cm² for 1600 s, (B) 0.4 mA / cm² for 800 s, (C) 0.7 mA / cm² for 450 s, (D) 1 mA / cm² for 300 s. This test series shows that filling begins at 0.4 mA / cm² and ends at 1 mA / cm². The seam void is represented by a line in the center of the feature CE. All figures are recordings of actual feature filling data.
[0145] Figure 6 shows another method of process development, which involves further fine-tuning the process window through an iterative process of additive concentration, pH, mass transport, and waveform ramping tests. Achieving void-free fill of deep structures requires a balance of sufficient field passivation to prevent deposition on the upper sidewalls, but not so much passivation into the feature that it stops deposition entirely. The waveform ramps to higher currents to advance the fill front as it moves up the feature and encounters higher inhibitor concentrations and higher hydrogen ion concentrations that slow the metal deposition rate. Linear increase will be done.
[0146] In Figure 6, (A) shows non-optimized corrugation or plating conditions with clear seam voids, (B) shows conditions where seam voids developed after successful bottom-up fill of a portion of the feature, and (C) shows the resulting void-free electroplating fill process window. Void-free fill is achieved through process variable testing of pH, additive concentration, mass transfer (RPM), and corrugation ramping. All these figures are records of actual feature fill data.
[0147] Figure 7 provides further tracking of electroplated fill cobalt into high aspect ratio TSV features. It shows how the desired bottom-up fill process proceeds. The series of figures shows a planar fill front starting and progressing up the feature to complete the feature fill. Linear increase In Figure 7, (A) shows the expansion of the waveform from about 0.5 to 0.7 mA / cm2 over 60 seconds. Linear increase (B) shows that Linear increase (A) shows increased duration at the same ramp rate (0.5-1 mA / cm2, 120 s), (B) shows complete void-free fill (0.5-1.8 mA / cm2, 350 s), and (C) shows additional overburden being plated on the fully filled feature. Linear increase The applied current may be added through either a controlled current or a constant current waveform. All of these figures are recordings of actual feature fill data.
[0148] Overburden is the current Linear increase(D) is deposited by continuing or changing to a higher constant current density. During overburden deposition, differences in adsorbed suppressor can result in large topography variations in dense patterns, isolated patterns, and unpatterned field regions. An example of the topography improvement observed from adding a leveler compound to the electroplating solution is shown in Figure 8. In Figure 8, the topography of an overburden feature is shown (A) without a leveler and (B) with a leveler. The data are height profiles obtained from an optical profilometer.
[0149] Figure 9 shows the electroplating process design, similar to that described for cobalt, except in this example, nickel. Nickel is electrodeposited into high aspect ratio TSVs. The solution and current conditions were adjusted to achieve void-free Ni into the same structures. In this example, the solution had the following composition: Ni:Ion 25 g / L; Boron 10 g / L; pH 4.0. In this example, the current Linear increase of The had the following profile: 0.5->1.75 mA / cm2, 350 s. The substrate was rotated at 50 RPM during electroplating.
[0150] Figure 10 provides an example of the impact of vacuum prewetting on deep TSV structures. In Figure 10, panel (A) shows an image of the seed only, panel (B) shows that without prewetting, electroplating occurs only on the top of a large TSV (6 x 60 micrometers), and panel (C) shows that cobalt plating can be achieved throughout the TSV by using a prewet process before deposition.
[0151] In panel B, metal deposition is observed only on the field and upper sidewalls of the structure because the bottom of the feature has trapped air that prevents the electroplating solution from accessing the feature and initiating electroplating. In panel C, the same electroplating process was performed, but before electroplating, the sample was placed under vacuum to expel air, and the wafer was then coated with a thin layer of water. The sample retained the thin layer of water attached when transferred to the electroplating cell, so no air was trapped within the feature. Panel C shows that Co was electroplated along the sidewalls all the way to the bottom of the via. In various embodiments, a vacuum pre-wet function is used in certain deep features. The solution used to pre-wet the wafer may also contain a suppressor or wetting agent to improve air evacuation and filling. The pre-wet solution may also contain some accelerators or levelers for specific applications.
[0152] Figure 11 shows process tuning for void-free filling of larger TSV structures. If the electroplating rate of Co onto the field and upper sidewalls is not slowed sufficiently by additional inhibition or low current efficiency due to competition with hydrogen reduction (Figure 1), the feature will electroplate too quickly, high into the feature. This leads to bottom voids, as shown in panel A. The bottom voids are formed by additional H + In this series of images (Panel B), additional H is removed by lowering the pH of the solution to supply the ions to the system. + The ions are selectively reduced by the electroplating current in the system, resulting in the formation of Co 2+ This reduces the current efficiency of the reduction. + However, when depleted in deep TSVs, the remaining ions are Co 2+ Only the H atoms are deposited at the bottom of the feature. Further up in the feature, H atoms are transferred from the bulk solution into the via. + The mass transfer of H + High concentration, Co 2+The reduction rate is kept low. In Panel C, the waveform is adjusted slightly to allow feature filling to proceed in the same solution as used in Panel B. Figure 11 shows that a similar adjustment process as described for smaller TSVs (Figures 5-9) can be applied to larger TSV features.
[0153] In Figure 11, panel (A) shows a filled TSV feature with too-rapid Co deposition at the top of the feature, leading to pinch-off voids. This result demonstrates the need for faster deposition rates at the bottom and slower deposition rates at the top. To achieve this, the inhibitor concentration, pH, mass transport, and plating current may be adjusted. In panel (B), the bottom of the TSV feature has been filled with the improved process. To complete the electroplating fill, plating may be adjusted to avoid pinch-off voids at the top of the feature. Panel (C) shows a fully filled 6 x 60 micrometer feature.
[0154] Conclusion Although the present embodiments have been described in some detail for purposes of clarity, it will be apparent that certain changes and modifications may be made within the scope of the appended claims. The embodiments disclosed herein may be practiced without some or all of these specific details. Additionally, detailed descriptions of well-known process operations have been omitted to avoid unnecessarily obscuring the disclosed embodiments. Furthermore, although the disclosed embodiments are described in connection with specific embodiments, it should be understood that the specific embodiments are not intended to limit the disclosed embodiments. It should be noted that there are many other ways to implement the processes, systems, and apparatuses of the present invention. Therefore, the present embodiments are considered to be illustrative and not limiting, and the embodiments are not limited to the details set forth herein. The present invention can be realized, for example, in the following manner. Application example 1: 1. A method of forming an interconnect in an electronic device, comprising: (a) contacting a substrate bearing a partially or fully processed integrated circuit with an aqueous electroplating solution having a pH of about 2 to about 5, said aqueous electroplating solution comprising: (i) nickel ions at a concentration of about 20 to about 80 g / L and / or cobalt ions at a concentration of about 10 to about 40 g / L; (ii) a suppressor, wherein the substrate comprises features having diameters of about 0.005 to 6 micrometers and feature depths of about 0.05 to 10 micrometers; (iii) electroplating nickel and / or cobalt from the electroplating solution into the feature in a bottom-up fill mechanism by controlling current and / or voltage to the substrate; A method comprising: Application example 2: The method according to Application Example 1, wherein the feature has a depth of about 1000 nm to about 2000 nm and an opening diameter or width of about 50 nm to about 150 nm. Application example 3: The method described in Application Example 1, wherein the feature is a micro TSV feature. Application example 4: The method of Application Example 2, wherein electroplating nickel and / or cobalt into the one or more features forms one or more interconnects between a first electronic device on a first side of the substrate and a second electronic device on a second side of the substrate. Application example 5: The method according to Application Example 1, wherein the feature has a depth of about 50 nm to about 500 nm and an opening diameter or width of about 5 nm to about 20 nm. Application example 6: The method described in Application Example 1, wherein the step of electroplating nickel and / or cobalt into the one or more features forms one or more electrical contacts directly to a first electronic device on the substrate. Application example 7: The method of Application Example 6, wherein the one or more electrical contacts contact one or more 3D NAND devices. Application example 8: The method according to Application Example 1, wherein the aqueous electroplating solution does not contain an accelerator or a leveler. Application example 9: The method according to Application Example 1, wherein the aqueous electroplating solution further contains an accelerator and / or a leveling agent. Application example 10: The method according to Application Example 1, wherein the aqueous electroplating solution further contains boric acid. Application example 11: The method described in Application Example 1, wherein the aqueous electroplating solution further contains ions of a metal other than cobalt or nickel, and the step of controlling the current and / or voltage to the substrate electroplates a nickel alloy or cobalt alloy from the electroplating solution into the feature. Application example 12: The method according to Application Example 11, wherein the metal other than cobalt or nickel is selected from the group consisting of Cu, Ag, Au, Mn, Fe, Cr, Ru, Mo, Ir, Re, Pd, W, Mo, and Pt. Application example 13: The method according to Application Example 11, wherein the metal other than cobalt or nickel is W or Mo. Application 14: The method according to Application Example 1, wherein the aqueous electroplating solution further contains Mo ions and / or W ions at a concentration of about 0.1 to about 30 g / L. Application example 15: The method according to Application Example 11, wherein the aqueous electroplating solution further contains a complexing agent that complexes nickel ions, cobalt ions, or ions of a metal other than cobalt or nickel. Application 16: The method described in Application Example 1, wherein the step of controlling the current and / or voltage to the substrate includes a step of increasing the current during the period of electroplating nickel and / or cobalt from the electroplating solution. Application 17: 17. The method according to claim 16, wherein increasing the current comprises increasing the current linearly. Application 18: The method described in Application Example 1, further comprising a step of pretreating the substrate with plasma to reduce metal oxides on the conductive layer in the one or more features before electroplating nickel and / or cobalt. Application 19: The method described in Application Example 1, further comprising the step of pre-wetting the substrate under reduced pressure with a wetting solution that wets the features before electroplating nickel and / or cobalt. Example 20: The method according to Application Example 1, further comprising the step of annealing the substrate after electroplating nickel and / or cobalt. Example 21: The method according to Application Example 1, wherein the inhibitor is selected from the group consisting of ethers, esters, glycols, thiazoles, pyridines, polymeric compounds, and any combination thereof. Application example 22: The method according to Application Example 1, wherein the aqueous electroplating solution further contains a leveling agent selected from the group consisting of alkylamines, arylamines, aromatic nitrogen heterocycles, benzothiazoles, cyclic imides, benzoic acids, epoxides, polymeric compounds, and any combination thereof. Application 23: The method according to Application Example 1, wherein the aqueous electroplating solution further contains an accelerator selected from the group consisting of sulfonic acid esters, sulfonate salts, mercapto compounds, triazole compounds, and any combination thereof. Application 24: 1. An apparatus for processing a substrate, comprising: (b) one or more electroplating cells; (c) one or more electroplating post-fill modules; (d) a plasma pretreatment module; (e) a pre-wetting module; (f) one or more substrate transfer handlers; (g) a controller configured to cause the one or more substrate transfer handlers to process a first substrate by transferring the first substrate to each of modules (b), (c), and (d), and to process a second substrate without transferring the second substrate to at least one of modules (b), (c), and (d) throughout the period that the second substrate is in the apparatus; An apparatus comprising: Example 25: The apparatus of Application Example 24, further comprising a frame or housing that houses the one or more electroplating cells, the one or more electroplating post-fill modules, the pre-wet module, the plasma pre-treatment module, and the substrate transfer handler. Application 26: The apparatus of Application Example 24, further comprising an annealing chamber configured to heat the substrate after electroplating in the one or more electroplating cells. Example 27: The apparatus of application example 24, wherein the pre-wet module and the plasma pre-treatment module are in a common vacuum environment. Application 28: The apparatus according to Application Example 24, further comprising a load lock, wherein the pre-wet module and the pre-treatment module are connected by the load lock. Application 29: In the device according to Application Example 24, the controller further controls the device to: (i) treating a first substrate by transferring the first substrate to the plasma pre-treatment module and the pre-wet module before transferring the first substrate to a first plating cell of the one or more electroplating cells; (ii) an apparatus configured to process the second substrate by transferring the second substrate to the pre-wet module without transferring the second substrate to the plasma pre-treatment module before transferring the second substrate to the first plating cell of the one or more electroplating cells. Example 30: 29. The device according to claim 29, wherein the controller further controls the device to: (iii) an apparatus configured to process a third substrate by transferring the third substrate to the first plating cell of the one or more electroplating cells without previously transferring the third substrate to either the pre-wet module or the plasma pre-treatment module. Example 31: The apparatus of Application Example 24, further comprising a power supply configured to control the current and / or voltage applied to the substrate in the one or more electroplating cells. Application 32: The apparatus of Application Example 31, wherein the controller is configured to linearly increase the current during electroplating of a first plating cell among the one or more electroplating cells. Application 33: 1. A method of forming an interconnect in an electronic device, comprising: (h) contacting the substrate bearing the partially or fully processed integrated circuit with an aqueous electroplating solution having an acidic pH, said aqueous electroplating solution comprising: (i) nickel ions at a concentration of at least about 20 g / L and / or cobalt ions at a concentration of at least about 10 g / L; (ii) an inhibitor; a. the substrate comprises recess features; b. electroplating nickel and / or cobalt from the electroplating solution into the feature in a bottom-up fill mechanism by controlling current and / or voltage to the substrate; A method comprising: Application 34: The method of Application Example 33, wherein the feature is a micro TSV feature. Application 35: The method of Application Example 33, wherein electroplating nickel and / or cobalt into the one or more features forms one or more electrical contacts directly to a first electronic device on the substrate. Application 36: The method of Application Example 35, wherein the one or more electrical contacts contact one or more 3D NAND devices.
Claims
1. 1. A method of forming an interconnect in an electronic device, comprising: (a) contacting a substrate having a partially or fully processed integrated circuit thereon with an aqueous electroplating solution having a pH of about 2 to about 5, said aqueous electroplating solution comprising: (i) nickel ions at a concentration of about 20 to about 80 g / L and / or cobalt ions at a concentration of about 10 to about 40 g / L; (ii) a suppressor, wherein the substrate comprises features having diameters of about 0.005 to 6 micrometers and feature depths of about 0.05 to 10 micrometers; (iii) electroplating nickel and / or cobalt from the electroplating solution into the feature in a bottom-up fill mechanism by controlling current and / or voltage to the substrate; A method comprising:
2. 10. The method of claim 1, wherein the features have a depth of about 1000 nm to about 2000 nm and an opening diameter or width of about 50 nm to about 150 nm.
3. 10. The method of claim 1, wherein the feature is a microTSV feature.
4. 3. The method of claim 2, wherein electroplating nickel and / or cobalt into the one or more features forms one or more interconnects between a first electronic device on a first side of the substrate and a second electronic device on a second side of the substrate.
5. 10. The method of claim 1, wherein the features have a depth of about 50 nm to about 500 nm and an opening diameter or width of about 5 nm to about 20 nm.
6. 10. The method of claim 1, wherein electroplating nickel and / or cobalt into the one or more features forms one or more electrical contacts directly to a first electronic device on the substrate.
7. 7. The method of claim 6, wherein the one or more electrical contacts contact one or more 3D NAND devices.
8. 10. The method of claim 1, wherein the aqueous electroplating solution does not contain an accelerator or a leveler.
9. The method of claim 1 , wherein the aqueous electroplating solution further comprises an accelerator and / or a leveler.
10. 10. The method of claim 1, wherein the aqueous electroplating solution further comprises boric acid.
11. 10. The method of claim 1, wherein the aqueous electroplating solution further comprises ions of a metal other than cobalt or nickel, and controlling the current and / or voltage to the substrate electroplates a nickel alloy or a cobalt alloy from the electroplating solution into the feature.
12. 12. The method of claim 11, wherein the metal other than cobalt or nickel is selected from the group consisting of Cu, Ag, Au, Mn, Fe, Cr, Ru, Mo, Ir, Re, Pd, W, Mo, and Pt.
13. 12. The method of claim 11, wherein the metal other than cobalt or nickel is W or Mo.
14. 10. The method of claim 1, wherein the aqueous electroplating solution further comprises Mo ions and / or W ions at a concentration of about 0.1 to about 30 g / L.
15. 12. The method of claim 11, wherein the aqueous electroplating solution further comprises a complexing agent that complexes nickel ions, cobalt ions, or ions of a metal other than cobalt or nickel.
16. 10. The method of claim 1, wherein controlling the current and / or voltage to the substrate comprises ramping up the current during electroplating of nickel and / or cobalt from the electroplating solution.
17. 17. The method of claim 16, wherein increasing the current comprises ramping the current.
18. 10. The method of claim 1, further comprising pretreating the substrate with a plasma to reduce metal oxides on the conductive layer in the one or more features prior to electroplating nickel and / or cobalt.
19. 10. The method of claim 1, further comprising pre-wetting the substrate under reduced pressure with a wetting solution that wets the features before electroplating nickel and / or cobalt.
20. 10. The method of claim 1, further comprising annealing the substrate after electroplating with nickel and / or cobalt.
21. 10. The method of claim 1, wherein the inhibitor is selected from the group consisting of an ether, an ester, a glycol, a thiazole, a pyridine, a polymeric compound, and any combination thereof.
22. 10. The method of claim 1, wherein the aqueous electroplating solution further comprises a leveling agent selected from the group consisting of alkylamines, arylamines, aromatic nitrogen heterocycles, benzothiazoles, cyclic imides, benzoic acids, epoxides, polymeric compounds, and any combination thereof.
23. 10. The method of claim 1, wherein the aqueous electroplating solution further comprises an accelerator selected from the group consisting of a sulfonic acid ester, a sulfonate salt, a mercapto compound, a triazole compound, and any combination thereof.
24. 1. An apparatus for processing a substrate, comprising: (b) one or more electroplating cells; (c) one or more electroplating post-fill modules; (d) a plasma pretreatment module; (e) a pre-wet module; (f) one or more substrate transfer handlers; (g) a controller configured to cause the one or more substrate transfer handlers to process a first substrate by transferring the first substrate to each of modules (b), (c), and (d), and to process a second substrate without transferring the second substrate to at least one of modules (b), (c), and (d) throughout the period that the second substrate is in the apparatus; An apparatus comprising:
25. 25. The apparatus of claim 24, further comprising a frame or housing that houses the one or more electroplating cells, the one or more electroplating post-fill modules, the pre-wet module, the plasma pre-treatment module, and the substrate transfer robot.
26. 25. The apparatus of claim 24, further comprising an annealing chamber configured to heat the substrate after electroplating in the one or more electroplating cells.
27. 25. The apparatus of claim 24, wherein the pre-wet module and the plasma pre-treatment module reside within a common vacuum environment.
28. 25. The apparatus of claim 24, further comprising a load lock, wherein the pre-wet module and the pre-treatment module are connected by the load lock.
29. 25. The apparatus of claim 24, wherein the controller further causes the apparatus to: (i) treating a first substrate by transferring the first substrate to the plasma pre-treatment module and the pre-wet module prior to transferring the first substrate to a first plating cell of the one or more electroplating cells; (ii) an apparatus configured to process the second substrate by transferring the second substrate to the pre-wet module without transferring the second substrate to the plasma pre-treatment module before transferring the second substrate to the first plating cell of the one or more electroplating cells.
30. 30. The apparatus of claim 29, wherein the controller further causes the apparatus to: (iii) an apparatus configured to process a third substrate by transferring the third substrate to the first plating cell of the one or more electroplating cells without previously transferring the third substrate to either the pre-wet module or the plasma pre-treatment module.
31. 25. The apparatus of claim 24, further comprising a power supply configured to control the current and / or voltage applied to substrates in the one or more electroplating cells.
32. 32. The apparatus of claim 31, wherein the controller is configured to ramp a current during electroplating in a first plating cell of the one or more electroplating cells.
33. 1. A method of forming an interconnect in an electronic device, comprising: (h) contacting the substrate bearing the partially or fully processed integrated circuit with an aqueous electroplating solution having an acidic pH, said aqueous electroplating solution comprising: (i) nickel ions at a concentration of at least about 20 g / L and / or cobalt ions at a concentration of at least about 10 g / L; (ii) an inhibitor; a. the substrate comprises recess features; b. electroplating nickel and / or cobalt from the electroplating solution into the feature in a bottom-up fill mechanism by controlling current and / or voltage to the substrate; A method comprising:
34. 34. The method of claim 33, wherein the feature is a microTSV feature.
35. 34. The method of claim 33, wherein electroplating nickel and / or cobalt into the one or more features forms one or more electrical contacts directly to a first electronic device on the substrate.
36. 36. The method of claim 35, wherein the one or more electrical contacts contact one or more 3D NAND devices.