Multilayer ceramic capacitors

Abstract

A method for manufacturing a multilayer ceramic capacitor that can sinter a laminated chip having a side margin more densely and has improved reliability. [Solution] The method for manufacturing a multilayer ceramic capacitor according to the present invention comprises the steps of preparing a laminate chip with a conductive film exposed on both sides, preparing two-layer ceramic green sheets for side margins, and arranging the side margin ceramic green sheets on the sides of the laminate chip to form side margin portions, wherein the thickness of the side margin ceramic green sheets that form the inner portion of the two-layer structure is thinner than the thickness of the side margin ceramic green sheets that form the outer portion of the two-layer structure.

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic capacitor. [Background technology]

[0002] In recent years, there has been a demand for small, high-capacity multilayer ceramic capacitors. Such multilayer ceramic capacitors have, for example, a rectangular parallelepiped ceramic body in which inner ceramic layers (dielectric ceramic layers) and internal electrodes are alternately stacked, with outer ceramic layers disposed on the top and bottom surfaces of the stack, and external electrodes are formed on both end surfaces of the ceramic body. Side margins are formed on both side surfaces of the ceramic body to prevent connection with the external electrodes.

[0003] Patent Document 1 discloses a method for manufacturing the above-described multilayer ceramic capacitor. Specifically, in this method, a mother laminate is formed by stacking a plurality of ceramic green sheets, each having a conductive film formed on its surface to become an internal electrode. The mother laminate is then cut so that the conductive film is exposed on the side surfaces where no external electrodes are formed. A ceramic slurry that will become a side margin is then applied to both sides of the mother laminate, thereby forming uniform side margins with little variation. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 61-248413 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the method for manufacturing a multilayer ceramic capacitor described in Patent Document 1, the ceramic slurry used to form the side margins is composed of the same dielectric ceramic material as the ceramic slurry used to form the inner ceramic layers. In the firing step of this method for manufacturing a multilayer ceramic capacitor, if firing is performed under conditions for forming the inner ceramic layers, voids increase inside the side margins, making it impossible to prevent moisture from penetrating from the side margins through these voids, resulting in a problem of reduced reliability of the multilayer ceramic capacitor.

[0006] SUMMARY OF THE INVENTION Therefore, a primary object of the present invention is to provide a method for manufacturing a multilayer ceramic capacitor that can sinter a laminated chip having side margins more densely and thus improves reliability. [Means for solving the problem]

[0007] The method for manufacturing a multilayer ceramic capacitor according to the present invention includes the steps of preparing a laminate chip having a conductive film exposed on both sides thereof, preparing two-layer ceramic green sheets for side margins, and arranging the ceramic green sheets for side margins on the sides of the laminate chip to form side margin portions, wherein the thickness of the ceramic green sheets for side margins that form the inner portion of the two-layer structure is thinner than the thickness of the ceramic green sheets for side margins that form the outer portion of the two-layer structure.

[0008] According to the method for manufacturing a multilayer ceramic capacitor of the present invention, a multilayer ceramic capacitor can be manufactured that has a side margin portion including an outer portion and an inner portion on the surface where the conductive film of the laminate chip (ceramic element body) is exposed, and by making the side margin portion a multi-layer structure, a multilayer ceramic capacitor can be manufactured that can suppress the penetration of moisture from the side margin portion toward the inside of the ceramic element body, thereby providing a method for manufacturing a multilayer ceramic capacitor with improved reliability. [Effects of the Invention]

[0009] According to the present invention, a laminated chip having a side margin portion can be sintered more densely, and a method for manufacturing a multilayer ceramic capacitor with improved reliability can be provided.

[0010] The above and other objects, features, and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments of the invention, which proceeds with reference to the accompanying drawings. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a schematic perspective view showing an example of the appearance of a multilayer ceramic capacitor according to the present invention. [Figure 2] FIG. 2 is a cross-sectional diagram showing a cross section taken along line AA in FIG. 1; [Figure 3] FIG. 2 is a cross-sectional diagram showing a cross section taken along line BB in FIG. 1; [Figure 4] 1A and 1B are explanatory views for explaining a method for manufacturing a multilayer ceramic capacitor, in which FIG. 1A is a perspective view schematically showing a state in which a conductive film is formed on a ceramic green sheet, and FIG. 1B is a perspective view schematically showing a state in which the ceramic green sheets on which the conductive film is formed are stacked. [Figure 5] 5 is a schematic perspective view showing an example of the appearance of a laminate chip manufactured by the method for manufacturing the multilayer ceramic capacitor shown in FIG. 4. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0012] An example of a multilayer ceramic capacitor according to the present invention will be described. Fig. 1 shows a schematic perspective view of a multilayer ceramic capacitor, which is an example of the appearance of a multilayer ceramic capacitor composed of a ceramic body and external electrodes, Fig. 2 shows a cross-sectional diagram showing a cross section taken along line AA in Fig. 1. Also, Fig. 3 shows a cross-sectional diagram showing a cross section taken along line BB in Fig. 1.

[0013] The multilayer ceramic capacitor 10 according to this embodiment is generally composed of a ceramic body 12 and external electrodes 40 and 42 formed on both end surfaces of the ceramic body 12, respectively.

[0014] The size of the multilayer ceramic capacitor 10 according to the present invention may be, for example, 1.6 mm x 0.8 mm x 0.8 mm, 1.0 mm x 0.5 mm x 0.5 mm, 0.6 mm x 0.3 mm x 0.3 mm, or 0.4 mm x 0.2 mm x 0.2 mm in terms of the length (L), width (W), and stacking (T) directions.

[0015] The ceramic body 12 is formed in a rectangular parallelepiped shape and has a first end face 13 and a second end face 14 extending in the width (W) direction and the stacking (T) direction, a first side face 15 and a second side face 16 extending in the length (L) direction and the stacking (T) direction, and a first main face 17 and a second main face 18 extending in the length (L) direction and the width (W) direction. In the ceramic body 12, the first end face 13 and the second end face 14 face each other, the first side face 15 and the second side face 16 face each other, and the first main face 17 and the second main face 18 face each other. The first side face 15 and the second side face 16 are perpendicular to the first end face 13 and the second end face 14, and the first main face 17 and the second main face 18 are perpendicular to the first end face 13 and the first side face 16. Furthermore, the corners and edges of the ceramic body 12 are preferably rounded.

[0016] The ceramic body 12 is composed of an inner layer portion 26 including a plurality of inner layer ceramic layers (dielectric ceramic layers) 20 and a plurality of first inner electrodes 22 and second inner electrodes 24 disposed at the interfaces between the plurality of inner layer ceramic layers 20, outer layer portions 28, 30 in which outer layer ceramic layers are disposed so as to sandwich the inner layer portion 26 in the stacking (T) direction, and side margin portions 32, 34 in which side margin ceramic layers are disposed so as to sandwich the inner layer portion 26 and the outer layer portions 28, 30 in the width (W) direction. In other words, the inner layer portion 26 is a region sandwiched between the first and second inner electrodes 22, 24 disposed closest to the first main surface 17 or the second main surface 18. The side margin portions 32, 34 are regions in which the first inner electrode 22 and the second inner electrode 24 are not present when the ceramic body 12 is viewed from the stacking (T) direction.

[0017] The inner ceramic layer 20 is composed of dielectric ceramic particles having a perovskite structure, with a perovskite-type compound containing, for example, Ba and Ti as the main component. At least one of Si, Mg, and Ba is added as an additive to these main components, and the additive is present between the ceramic particles. The thickness of the inner ceramic layer 20 after firing is preferably 0.3 μm or more and 10 μm or less.

[0018] The outer layer portions 28, 30 disposed above and below each other are each made of the same dielectric ceramic material as the inner ceramic layer 20. The outer layer portions 28, 30 may be made of a different dielectric ceramic material from that of the inner ceramic layer 20. The thickness of the outer layer portions 28, 30 after firing is preferably 15 μm or more and 40 μm or less.

[0019] The first internal electrode 22 and the second internal electrode 24 face each other in the thickness direction via the inner layer ceramic layer 20. A capacitance is formed at the portion where the first internal electrode 22 and the second internal electrode 24 face each other via the inner layer ceramic layer 20.

[0020] The left end of the first internal electrode 22 is extended to the first end face 13 of the ceramic body 12 and electrically connected to the external electrode 40. The right end of the second internal electrode 24 is extended to the second end face 14 of the ceramic body 12 and electrically connected to the external electrode 42.

[0021] The first and second internal electrodes 22, 24 are made of, for example, Ni, Cu, etc. The thickness of the first and second internal electrodes 22, 24 is preferably 0.3 μm or more and 2.0 μm or less.

[0022] The side margins 32, 34 have a two-layer structure including outer portions 32a, 34a located on the side surfaces of the ceramic body 12 and inner portions 32b, 34b located on the first and second internal electrodes 22, 24 sides. The side margins 32, 34 are made of a dielectric ceramic material with a perovskite structure, primarily composed of BaTiO3, for example. At least one of Si, Mg, and Ba is added as an additive to the primary components, and the additive is present between the ceramic particles. The thickness of the side margins 32, 34 after firing is preferably 5 μm or more and 40 μm or less. The present invention is particularly effective when the thickness is 20 μm or less. Preferably, the inner portions 32b, 34b are thinner than the outer portions 32a, 34a. Specifically, the thickness of the outer portions 32a, 34a is preferably 5 μm or more and 20 μm or less, and the thickness of the inner portions 32b, 34b is preferably 0.1 μm or more and 20 μm or less. Due to the difference in sinterability between the outer portions 32a, 34a and the inner portions 32b, 34b, it is easy to see using an optical microscope that the side margin portions 32, 34 have a two-layer structure. The side margin portions 32, 34 may have multiple layers, not just two layers: the outer portions 32a, 34a and the inner portions 32b, 34b.

[0023] The thickness of the outer layer portions 28, 30 or the thickness of the side margin portions 32, 34 is determined by polishing the ceramic body 12 so that its length is reduced to approximately half in a direction perpendicular to the plane consisting of the stacking (T) direction and the width (W) direction, measuring the length from the end of the internal electrode (including the end where the ceramic dielectric is diffused) toward the outside for every 10 layers, and averaging the measured values.

[0024] In the side margins 32, 34, the gap decreases from the inner portion 32b toward the outer portion 32a and from the inner portion 34b toward the outer portion 34a. In this way, when sintering a laminated chip having side margins 32, 34 formed therein, even under conditions for sintering inner layer portions in which internal electrodes are provided in ceramic body 12, voids can be reduced from the inside to the outside of side margins 32, 34, and therefore moisture penetration from side margins 32, 34 toward the inside of ceramic body 12 is suppressed, thereby improving the moisture resistance of the laminated ceramic capacitor. Therefore, a laminated ceramic capacitor with improved reliability can be provided. Here, voids refer to spaces or areas that are mixed with glass-filled areas. The number of voids can be confirmed by counting an image of a 30 μm x 30 μm area taken with an SEM at a magnification of 5000.

[0025] Furthermore, the grain size, which is the particle size of the ceramic particles, in the inner parts 32b, 34b of the side margin parts 32, 34 is smaller than the grain size in the outer parts 32a, 34a, increasing the density. In particular, the grain size at the ends of the first and second internal electrodes 22, 24 near the side margin parts 32, 34 is smaller than the grain size in the outer parts 32a, 34a.

[0026] This void can be observed by polishing the ceramic body 12 in the same manner as when measuring the thickness of the side margin portions 32, 34, and then taking an SEM photograph at a magnification of 5000 times if the external dimensions of the multilayer ceramic capacitor 10 are, for example, 0.6 mm × 0.3 mm × 0.3 mm, and counting the points that appear to be voids. In addition, by taking SEM photographs at a magnification of 20,000 to 50,000 times, selecting grains within the imaging range, and calculating the average size (for example, 50 grains), it is possible to grasp the difference in grain size between the outer portions 32a, 34a and the inner portions 32b, 34b.

[0027] The amount of Ba, which is an additive between the ceramic particles of the inner ceramic layer 20 of the inner layer portion 26 and the outer portions 32a, 34a and the inner portions 32b, 34b of the side margin portions 32, 34, is: The inner ceramic layer 20 of the inner layer portion 20<the outer portions 32a, 34a<the inner portions 32b, 34b, is. In this way, it is preferable that the side margin portion is formed in two layers, an inner portion on the internal electrode side and an outer portion on the side surface side, and that the Ba content of the inner portion is higher than that of the outer portion, thereby improving the reliability of the multilayer ceramic capacitor having the side margin portion. That is, the Ba content between ceramic particles made of the ceramic dielectric decreases from the inside to the outside of the side margins of the ceramic body 12. Therefore, when sintering a laminated chip having side margins 32, 34 formed therein, even under conditions for sintering inner layer portions in which internal electrodes are provided in the ceramic body 12, grain growth of the dielectric ceramic particles in the region outside the side margins 32, 34 can be promoted, allowing for denser sintering. This reduces voids in the dielectric ceramic layers that form the outside of the side margins, thereby preventing moisture from penetrating from the side margins 32, 34 toward the inside of the ceramic body 12. The content of Ba, an additive, differs between the ceramic particles in the side margin portions 32, 34. The difference in Ba content can be detected by TEM analysis.

[0028] The molar ratio of Ba to Ti:1 mol in the outer portions 32a, 34a and the inner portions 32b, 34b of the side margin portions 32, 34 is, at the center value, The outer portions 32a and 34a have a Ba of greater than 1.000 and less than 1.020. The inner portions 32b and 34b have a Ba of greater than 1.020 and less than 1.040. By doing so, the reliability of the multilayer ceramic capacitor having the side margin portion can be improved.

[0029] In addition, by polishing the ceramic body 12 from the side margin portions 32, 34, dissolving the powders obtained by polishing the outer portions 32a, 34a and the inner portions 32b, 34b in acid, and performing ICP emission spectroscopy analysis, it is possible to confirm that the above molar ratios are achieved in the outer portions 32a, 34a and the inner portions 32b, 34b.

[0030] Furthermore, within these ranges, it is preferable that the Ba content between the ceramic particles of the inner portions 32b, 34b is more than 100% but less than 140% greater than that of the outer portions 32a, 34a, thereby improving the reliability of the multilayer ceramic capacitor having side margin portions.

[0031] The external electrodes 40, 42 have a triple structure consisting of an electrode layer 40a, 42a containing Cu formed by baking, a first plating layer 40b, 42b containing Ni formed on the surface of the electrode layer 40a, 42a to prevent solder erosion, and a second plating layer 40c, 42c containing Sn formed on the surface of the first plating layer 40b, 42b.

[0032] 1, the number of voids decreases from the inside to the outside of the side margin portions 32, 34. That is, in the multilayer ceramic capacitor shown in Fig. 1, the number of voids is smaller in the outer portions 32a, 34a than in the inner portions 32b, 34b of the side margin portions 32, 34. This prevents moisture from penetrating from the side margin portions 32, 34 toward the inside of the ceramic body 12 via the voids, thereby improving the moisture resistance of the multilayer ceramic capacitor 10.

[0033] 1, the amount of Ba between the ceramic particles decreases from the inner portions 32b, 34b of the side margin portions 32, 34 toward the outer portions 32a, 34a (i.e., from the inside to the outside of the side margin portions 32, 34). Ba diffuses from the inner portions 32b, 34b to the inner-layer ceramic layers 20 between the inner portions 32b, 34b and the ends of the first and second internal electrodes 22, 24, resulting in a higher amount of Ba near the side margin portions 32, 34 of the first and second internal electrodes 22, 24. This makes it possible to suppress grain growth of the ceramic particles at the ends of the first and second internal electrodes 22, 24, thereby improving reliability between the internal electrodes.

[0034] 1, the outer portions 32a, 34a of the side margin portions 32, 34 have a low Ba content, which promotes grain growth of the ceramic particles and allows for denser sintering, thereby improving resistance to moisture penetration from the outside.

[0035] Next, a method for manufacturing a multilayer ceramic capacitor will be described. Fig. 4 is an explanatory diagram for explaining the method for manufacturing a multilayer ceramic capacitor, where (a) is a perspective view showing a state in which a conductive film is formed on a ceramic green sheet, and (b) is a perspective view showing a state in which the ceramic green sheets on which the conductive film is formed are stacked. Fig. 5 is a schematic perspective view showing an example of the overview of a laminate chip manufactured by the method for manufacturing a multilayer ceramic capacitor shown in Fig. 4. The method will be described in detail below.

[0036] (1) Formation of ceramic body First, a perovskite compound containing Ba and Ti is prepared as a dielectric ceramic material. A dielectric powder obtained from this dielectric ceramic material is mixed with additives, such as at least one of Si, Mg, and Ba, an organic binder, an organic solvent, a plasticizer, and a dispersant, in a predetermined ratio to produce a ceramic slurry. This ceramic slurry is then molded into multiple ceramic green sheets 50a (50b) on a resin film (not shown). The ceramic green sheets 50a (50b) are molded using, for example, a die coater, a gravure coater, or a microgravure coater.

[0037] Next, as shown in FIG. 4(a), a conductive paste for the internal electrodes is printed in stripes in the X direction on the surface of the ceramic green sheet 50a (50b) and dried to form the conductive film 52a (52b) that will become the internal electrode 22 (24). Various printing methods can be used, including screen printing, inkjet printing, and gravure printing. The thickness of the conductive film 52a (52b) is preferably 1.5 μm or less.

[0038] 4(b), the plurality of ceramic green sheets 50a, 50b on which the conductive films 52a, 52b are printed are stacked while being shifted in a direction (the width direction of the conductive films 52a, 52b: the Y direction) perpendicular to the printing direction (the X direction) of the conductive films 52a, 52b. Furthermore, a predetermined number of ceramic green sheets without conductive films that will become the outer layer portions 28, 30 are stacked as needed on the top and bottom surfaces of the thus stacked ceramic green sheets 50a, 50b that will become the inner layer portion 26, thereby obtaining a mother laminate.

[0039] Next, the mother laminate obtained is pressed by a method such as a rigid press or a hydrostatic press.

[0040] The pressed mother laminate is then cut into a chip shape to obtain a laminate chip 60 as shown in Fig. 5. The mother laminate can be cut by various methods such as press cutting, dicing, or laser.

[0041] By going through the above steps, one end face of the laminate chip 60 has only the conductive film 52a of the ceramic green sheet 50a exposed, and the other end face has only the conductive film 52b of the ceramic green sheet 50b exposed. Furthermore, on both side surfaces of the laminate chip 60, the conductive film 52a of the ceramic green sheet 50a and the conductive film 52b of the ceramic green sheet 50b are exposed.

[0042] (2) Formation of side margins Next, ceramic green sheets for side margins are prepared, which will become the side margin portions 32 and 34. This will be explained in more detail below.

[0043] First, a perovskite compound containing Ba and Ti is prepared as a dielectric ceramic material. Dielectric powder obtained from this dielectric ceramic material is mixed with additives, such as at least one of Si, Mg, and Ba, a binder resin, an organic solvent, a plasticizer, and a dispersant, in predetermined proportions to produce a ceramic slurry.

[0044] The ceramic slurry that becomes the outer portions 32a, 34a of the side margin portions 32, 34 has a Ba molar ratio adjusted to greater than 1.000 and less than 1.020 per 1 mol of Ti. The ceramic slurry that becomes the inner portions 32b, 34b of the side margin portions 32, 34 has a Ba molar ratio adjusted to greater than 1.020 and less than 1.040 per 1 mol of Ti.

[0045] In addition, the amount of polyvinyl chloride (PVC) contained in the ceramic slurry that will become the outer portions 32a, 34a of the side margin portions 32, 34 is greater than the amount of polyvinyl chloride (PVC) contained in the ceramic slurry that will become the inner portions 32b, 34b of the side margin portions 32, 34.

[0046] Furthermore, the solvent contained in the ceramic slurry that will form the inner portions 32b, 34b of the side margin portions 32, 34 is appropriately selected to prevent sheet attack on the ceramic green sheets for the outer portions. The ceramic green sheets for the inner portions also serve to adhere to the laminate chip 60.

[0047] Then, the prepared ceramic slurry that will become the outer portions 32a, 34a of the side margin portions 32, 34 is applied onto the resin film and dried to prepare ceramic green sheets for the outer portions.

[0048] Next, the ceramic slurry that will become the inner parts 32b, 34b of the side margin parts 32, 34 is applied to the surface of the ceramic green sheet for the outer part and dried to form a ceramic green sheet for the inner part, resulting in the production of a two-layer ceramic green sheet for the side margin.

[0049] Here, the thickness of the ceramic green sheets for the inner portion is formed to be thinner than the thickness of the ceramic green sheets for the outer portion. For example, the thickness of the ceramic green sheets for the outer portion is formed to be 5 μm or more and 20 μm or less after firing, and the thickness of the ceramic green sheets for the inner portion is formed to be 0.1 μm or more and 20 μm or less after firing. It is preferable that the ceramic green sheets for the outer portion are thicker than the ceramic green sheets for the inner portion. In addition, an interface exists between the outer portions 32a, 34a and the inner portions 32b, 34b, and this interface can relieve stress applied to the multilayer ceramic capacitor 10.

[0050] The above-mentioned two-layered ceramic green sheet for the side margin was produced by printing the ceramic green sheet for the inner part on the surface of the ceramic green sheet for the outer part, but it is also possible to produce the two-layered ceramic green sheet for the side margin by forming the ceramic green sheet for the outer part and the ceramic green sheet for the inner part in advance and then bonding them together.

[0051] Next, the side margin ceramic green sheets are peeled off from the resin film.

[0052] Next, one side surface or the other side surface of the laminate chip 60 where the conductive films 52a, 52b are exposed is pressed against the inner portion ceramic green sheet of the peeled side margin ceramic green sheet and punched out to form layers that will become the side margin portions 32, 34. At this time, it is preferable to apply an organic solvent that will serve as an adhesive to the side surface of the laminate chip 60 in advance.

[0053] Next, the laminated chip 60, on which the layers that will become the side margin portions 32, 34 are formed, is degreased under specified conditions in a nitrogen atmosphere, and then fired at a specified temperature in a nitrogen-hydrogen-water vapor mixed atmosphere to form a sintered ceramic body 12.

[0054] Next, an external electrode paste mainly composed of Cu is applied to both ends of the sintered ceramic body 12 and baked to form electrode layers 40a, 42a electrically connected to the first and second internal electrodes 22, 24. Furthermore, first plating layers 40b, 42b are formed by Ni plating on the surfaces of the electrode layers 40a, 42a, and second plating layers 40c, 42c are formed by Sn plating on the surfaces of the first plating layers 40b, 42b, thereby forming the external electrodes 40, 42.

[0055] In the manner described above, the multilayer ceramic capacitor 10 shown in FIG. 1 is manufactured.

[0056] The side margins 32 and 34 can also be formed by applying ceramic slurry for the side margins to both side surfaces of the laminated chip 60 where the conductive films 52a and 52b are exposed.

[0057] That is, ceramic slurry that will become the inner portions 32b and 34b is applied to both sides of the laminated chip 60 where the conductive films 52a and 52b are exposed, dried, and then ceramic slurry that will become the outer portions 32a and 34a is applied.

[0058] In this case, the thickness of the ceramic slurry that will become the inner portions 32b and 34b or the thickness of the ceramic slurry that will become the outer portions 32a and 34a can be adjusted by adjusting the amount of resin contained in each ceramic slurry.

[0059] Alternatively, the side margins 32, 34 may be formed by masking both end surfaces of the laminate chip 60 with resin or the like, dipping the entire laminate chip 60 into a ceramic slurry that will become the inner portions 32b, 34b, drying it, and then dipping it again into a ceramic slurry that will become the outer portions 32a, 34a. In this case, the side margins 32, 34 are formed into a two-layer structure so as to cover the outer layer portions 28, 30 as well.

[0060] (Experimental example) 1. Examples and Comparative Examples In the experimental examples, samples of multilayer ceramic capacitors of the following examples and comparative examples were manufactured and evaluated by a humidity load test of the multilayer ceramic capacitors.

[0061] (Example) In the example, the multilayer ceramic capacitor 10 shown in FIG. 1 was manufactured using the above-described method. The outer dimensions of the multilayer ceramic capacitor 10 were 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height. In the example, the molar ratio of Ba to Ti:1 mol in the side margin portions 32 and 34 was 1.020 for the outer portions 32a and 34a and 1.028 for the inner portions 32b and 34b. The thicknesses of the side margin portions 32 and 34 were 20 μm, the outer portions 32a and 34a were 16 μm, and the inner portions 32b and 34b were 4 μm. The thickness of each of the inner ceramic layers 20 was 0.83 μm, the thickness of each of the first and second internal electrodes 22 and 24 was 0.40 μm, and the thicknesses of the outer layer portions 28 and 30 were each 25 μm. All thickness values ​​are measured after firing. The number of laminated inner ceramic layers 20 was 280.

[0062] (Comparative Example) In the comparative example, a multilayer ceramic capacitor was manufactured under the same conditions as in the example, except that the molar ratio of Ba to Ti:1 mol was uniformly set to 1.020 for the additive Ba in the side margin portion.

[0063] (Moisture resistance load test) A humidity load test was carried out on each sample of the examples and comparative examples. The humidity load test was carried out under the conditions of a relative humidity of 95%, a temperature of 40°C, and a rated voltage of 6.3 V. The insulation resistance value of each sample was measured, and the value was 1.0 × 10 6 When the insulation resistance deteriorated within [Ω], the sample was judged to be defective. For this humidity load test, 36 samples each of the example and comparative example were prepared.

[0064] As a result of the humidity load test, the number of samples determined to be defective in the comparative multilayer ceramic capacitor was 36 out of 36.

[0065] On the other hand, in the multilayer ceramic capacitor of the example, the number of samples judged to be defective was 0 out of 36. Therefore, in all the samples in the examples, highly reliable multilayer ceramic capacitors were obtained.

[0066] The present invention is not limited to the above-described embodiment, and various modifications may be made within the scope of the invention. Furthermore, the thickness of the ceramic layer, the number of layers, the area of ​​the opposing electrode, and the outer dimensions of the ceramic electronic component are not limited to those described above. [Explanation of symbols]

[0067] 10 Multilayer ceramic capacitors 12 Ceramic element 13 First end face 14 Second end face 15 First Aspect 16 The Second Aspect 17 First principal surface 18 Second main surface 20. Ceramic layer for inner layer 22 First internal electrode 24 Second internal electrode 26 Inner layer 28, 30 outer layer 32, 34 Side margin 32a, 34a outer part 32b, 34b inner part 40, 42 external electrode 40a, 42a electrode layer 40b, 42b First plating layer 40c, 42c Second plating layer 50a, 50b Ceramic green sheets 52a, 52b conductive film 60 stacked chips

Claims

1. preparing a laminated chip having conductive films exposed on both side surfaces; preparing a two-layer ceramic green sheet for side margins; and a step of arranging the side margin ceramic green sheets on the side surfaces of the laminate chip to form side margin portions, a thickness of the side margin ceramic green sheet that forms an inner portion of the two-layer structure is thinner than a thickness of the side margin ceramic green sheet that forms an outer portion of the two-layer structure.

2. preparing a laminated chip having conductive films exposed on both side surfaces; a step of applying a ceramic slurry to form an inner portion onto a ceramic green sheet for an outer portion to form a ceramic green sheet for an inner portion, thereby preparing a ceramic green sheet for a side margin; and a step of arranging the side margin ceramic green sheets on the side surfaces of the laminate chip to form side margin portions, a method for manufacturing a multilayer ceramic capacitor, the method comprising: applying a ceramic slurry to form the inner portion onto the ceramic green sheets for the outer portion so that the thickness of the ceramic green sheets for the inner portion is thinner than the thickness of the ceramic green sheets for the outer portion.

3. 3. The method for producing a multilayer ceramic capacitor according to claim 1, wherein the side margin ceramic green sheets contain Si.

4. The method for manufacturing a multilayer ceramic capacitor according to claim 1 or 2, wherein the multilayer chip contains Si.

5. 3. The method for manufacturing a multilayer ceramic capacitor according to claim 1, wherein the side margin ceramic green sheets are arranged on a multilayer chip with the inner portions facing inward, and the side margin portions are formed by punching.

6. 3. The method for manufacturing a multilayer ceramic capacitor according to claim 1, further comprising the step of applying an organic solvent to the side surfaces of the laminate chip.

7. 3. The method for producing a multilayer ceramic capacitor according to claim 1, wherein the content of Ba contained in the ceramic for the inner portion is greater than the content of Ba contained in the ceramic for the outer portion.

8. 3. The method for manufacturing a multilayer ceramic capacitor according to claim 1, wherein a content of Ba per 1 mol of Ti contained in the ceramic for the inner portion is higher than a content of Ba per 1 mol of Ti contained in the ceramic for the outer portion.

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