receiver

Abstract

This invention provides a receiver that can increase the limiting level using a diode limiter circuit. [Solution] The receiver 1, which receives a received signal and removes interference signals contained in the received signal, comprises a diode limiter circuit (limiter circuit) 14 that limits the signal level of the received signal and outputs a signal within the limit level, and an attenuator 15 that reduces the signal level output from the limiter circuit. The diode limiter circuit 14 is composed of a number of diode limiter circuits corresponding to the signal level of the received signal and the signal level of the interference signal.

Description

Technical Field

[0001] The present invention relates to a receiver for receiving signals, and particularly to a technique suitable for a receiver that performs wireless communication in a direct conversion method.

Background Art

[0002] In a heterodyne receiver for receiving signals, it is configured to be able to remove interference signals in a received signal in an intermediate frequency band (IF band), and when the received signal is input to an A / D converter (analog / digital converter), only signals in a desired band are input. Therefore, it is possible to design the circuit so that the signal level of the received signal does not exceed the rating of the A / D converter.

[0003] Such a heterodyne receiver is disclosed in, for example, Patent Document 1.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] By the way, in a receiver using a direct conversion method in which a wideband (RF band) received signal is input, when a large-power interference signal is received, it often exceeds the rating of the A / D converter. Therefore, it is conceivable to limit the gain using an AGC (automatic gain control device) for protecting the A / D converter, but when performing wideband direct sampling, the signal level in the desired band is restricted, and the desired signal cannot be amplified.

[0006] Therefore, an object of this invention is to provide a receiver capable of increasing the limit level by a diode limiter circuit. [Means for solving the problem]

[0007] To solve the above-mentioned problems, the receiver according to this invention is a receiver that receives a received signal and removes interference signals contained in the received signal, and comprises a limiter circuit that limits the signal level of the received signal and outputs a signal within the limit level, and an attenuator that reduces the signal level output from the limiter circuit, wherein the limiter circuit is composed of a number of diode limiter circuits corresponding to the signal level of the received signal and the signal level of the interference signal.

[0008] The receiver according to this invention may be configured such that the limiter circuit is composed of a plurality of diode limiter circuits connected in series with the received signal.

[0009] The receiver according to this invention may be configured such that the limiter circuit is composed of a number of diode limiter circuits corresponding to the rating of the A / D converter to which the signal output from the attenuator is input.

[0010] The receiver according to this invention may also receive the RF signal, which is the received signal, using a direct conversion method. [Effects of the Invention]

[0011] The receiver according to this invention comprises a limiter circuit and an attenuator, and the limiter circuit is composed of a number of diode limiter circuits corresponding to the signal level of the received signal and the signal level of the interfering signal. This receiver may be configured to receive the RF signal, which is the received signal, using a direct conversion method. Therefore, the saturation level (amplitude limiting level) of the receiver circuit can be increased, and sensitivity suppression of the desired signal by the interfering signal can be avoided. As a result, it is possible to achieve high intercept point performance against intermodulation distortion.

[0012] According to the receiver of this invention, the limiter circuit is composed of multiple diode limiter circuits connected in series with the received signal. Furthermore, the limiter circuit is composed of a number of diode limiter circuits corresponding to the rating of the A / D converter. Therefore, it is possible to increase the saturation level (amplitude limiting level) of the receiver circuit with a simple circuit configuration. [Brief explanation of the drawing]

[0013] [Figure 1] This is a schematic diagram showing a receiver 1 according to an embodiment of the present invention. [Figure 2] Figure 1 is a circuit diagram showing the diode limiter circuit 14. [Figure 3] Figure 2 is a graph showing the limiting level by the diode limiter circuit 14. [Figure 4] This is a schematic diagram showing a conventional receiver 1A. [Figure 5] This is a schematic diagram showing the configuration of a conventional receiver 1B. [Modes for carrying out the invention]

[0014] The present invention will be described below based on the illustrated embodiments. The following description and drawings are illustrative examples for illustrating the present invention, and have been omitted and simplified as appropriate for clarity of explanation. The present invention can also be carried out in various other forms. Unless otherwise specified, each component may be singular or plural. In the following description, identical components are denoted by the same reference numerals. Their names and functions are also the same. Therefore, detailed descriptions of them will not be repeated.

[0015] Furthermore, in the following explanation, only control lines and information lines deemed necessary for the explanation are shown, and not all control lines and information lines in the product are necessarily shown. All components may be interconnected.

[0016] (Embodiment) <1. Configuration of Receiver 1> FIG. 1 is a schematic configuration diagram showing a receiver 1 according to an embodiment of the present invention. This receiver 1 is a device that receives a received signal, which is an analog input signal, and performs A / D conversion processing (analog / digital conversion processing) to obtain a predetermined digital signal, and is, for example, a device used for wireless communication or the like. Here, the receiver 1 will be described by taking as an example a configuration in which a broadband (RF band) radio frequency signal (RF signal) is received by a direct conversion method. The receiver 1 includes an antenna 11, a BPF (Band Pass Filter) 12, an LNA (Low Noise Amplifier) 13, a diode limiter circuit (limiter circuit) 14, an attenuator 15, an A / D converter (A / D converter) 16, and a signal processing unit 17.

[0017] The antenna 11 is a receiving device having a function of receiving an analog radio frequency signal as an input signal. The antenna 11 receives, for example, a broadband (RF band) radio frequency signal and outputs it to the BPF 12.

[0018] The BPF 12 is a filter device having a function of receiving an input of a radio frequency signal transferred from the antenna 11 and passing (in other words, extracting) only the signal components in a predetermined frequency band among the radio frequency signals. The BPF 12 is provided to remove signals other than the signal components in the predetermined frequency band, for example, interference signals. The BPF 12 outputs a radio frequency signal that passes only the signal components in the predetermined frequency band to the LNA 13.

[0019] The LNA 13 is an amplifier having a function of amplifying a radio frequency signal that is output from the BPF 12 and that is only the signal components in a predetermined frequency band. The LNA 13 outputs the amplified radio frequency signal to the diode limiter circuit 14.

[0020] The diode limiter circuit 14 is a circuit that limits the signal level of the received signal output from the LNA 13 and outputs a signal within the limit level. The diode limiter circuit 14 is provided, for example, by being arranged in front of the A / D converter 16, in order to avoid failures and deteriorations caused by excessive signal levels of the input received signal. The diode limiter circuit 14 outputs the received signal within the limit level to the attenuator 15. A specific example of the diode limiter circuit 14 will be described later.

[0021] The attenuator 15 is a device that attenuates the received signal level within the limit level output from the diode limiter circuit 14. The attenuator 15 is provided, for example, to adjust the level / intensity of the received signal output from the diode limiter circuit 14. The attenuator 15 outputs the received signal with attenuated gain to the A / D converter 16.

[0022] The A / D converter 16 is a device having a function of performing A / D conversion processing (analog / digital conversion processing) on the received signal output from the attenuator 15. The A / D converter 16 receives the input of the sampling clock 18 for the input of the analog signal component, samples the analog signal component at a sampling rate (specifically, sampling frequency) according to a predetermined sampling clock, and performs analog-digital conversion processing. The A / D converter 16 outputs the digital signal obtained by performing the analog-digital conversion processing to the signal processing unit 17.

[0023] The signal processing unit 17 is a device having a function of performing predetermined signal processing, which is the function of the receiver 1, on the digital signal output from the A / D converter 16. The signal processing unit 17 performs the predetermined signal processing and outputs the result.

[0024] <2. Configuration of Diode Limiter Circuit 14> FIG. 2 is a circuit configuration diagram showing the diode limiter circuit 14 of FIG. 1.

[0025] The diode limiter circuit 14 shown in Figure 2 is a circuit configuration for limiting the signal level of a received signal, and consists of multiple diode limiters 141 and 142 connected in series. Each diode limiter 141 and 142 has multiple diodes D1 and D2 connected in parallel with different connection directions, and is configured so that the voltage across the diode limiters 141 and 142 does not exceed a predetermined limiting level Vf. Multiple such diode limiters are connected in series to form the diode limiter circuit 14.

[0026] In the example shown in Figure 2, the diode limiter circuit 14 is configured by connecting two diode limiters 141 and 142 in series, but it is not limited to two; it may be configured by connecting three or more diode limiters in series. The number of diode limiters connected may be varied depending on the signal level of the interfering signal, or it may be the number that allows the saturation level (amplitude limiting level) of the receiver circuit to be set to the desired size. In other words, the diode limiter circuit 14 may be configured by connecting diode limiters in series according to the rating of the A / D converter 16.

[0027] Figure 3 is a graph showing the limiting level by the diode limiter circuit 14 in Figure 2.

[0028] The graph shown in Figure 3 illustrates the relationship between the input level and output level of the received signal input to the diode limiter circuit 14. As shown in Figure 3, the output level of the diode limiter circuit 14 is limited so as not to exceed predetermined output levels V1 and V2, even when the input level increases. Here, let's assume that the configuration of the diode limiter circuit 14 is such that it does not exceed the predetermined output level V1, as shown by curve L1. In this case, if it is desired to limit the output level to a higher level due to the rating of the A / D converter 16, increasing the number of diode limiters 141 and 142 in the diode limiter circuit 14 makes it possible to raise the limit level of the output level, as shown by curve L2, which illustrates the relationship so as not to exceed the predetermined output level V2.

[0029] In the example shown in Figure 2, if the diode limiter circuit 14 is composed only of diode limiter 141, the output level V1 will be the limiting level Vf of diode limiter 141. If diode limiter 142 is added, and the diode limiter circuit 14 is composed of diode limiters 141 and 142, the output level V2 will increase by the limiting level Vf of diode limiter 141, resulting in Vf × 2. Thus, the diode limiter circuit 14 allows for adjustment of the limiting level by changing the number of diode limiters.

[0030] <3. Comparison with the conventional method> Figure 4 is a schematic diagram showing a conventional receiver 1A. Figure 5 is a schematic diagram showing a conventional receiver 1B.

[0031] Receiver 1A, shown in Figure 4, differs from receiver 1, shown in Figure 1, in that it does not have a diode limiter circuit 14 and an attenuator 15, but instead has a mixer 101, a local oscillator 102, a band-pass filter 103, and an AGC (Automatic Gain Controller) 104. However, the other configurations are the same. Receiver 1A is an example of a heterodyne receiver that handles received radio waves by frequency mixing them with a reference signal from the local oscillator in a mixer and converting them to a lower frequency.

[0032] Receiver 1A is configured such that a radio frequency signal containing only signal components within a predetermined frequency band, output from LNA 13, is frequency-mixed with a reference signal of a predetermined frequency output by local oscillator 102 in mixer 101 to convert it into an intermediate frequency signal of a desired frequency. The received signal in the predetermined frequency band is then amplified via BPF 103 and AGC 104 and output to A / D converter 16.

[0033] In heterodyne receivers like receiver 1A, the configuration allows for the removal of interfering signals in the intermediate frequency band (IF band) of the received signal. This ensures that only signals within the desired bandwidth are input to the A / D converter 16. Therefore, the circuit can be designed so that the signal level of the received signal does not exceed the rating of the A / D converter.

[0034] Receiver 1B, shown in Figure 5, differs from receiver 1, shown in Figure 1, in that it lacks the diode limiter circuit 14 and attenuator 15, but the other configurations are the same. Receiver 1B is an example of a receiver that receives broadband (RF band) radio frequency signals (RF signals) using a direct conversion method.

[0035] Receiver 1B can secure the desired gain if the received signal is only the minimum level desired signal, but if a high-power interference signal is received, the interference signal level often exceeds the rating of the A / D converter 16. For this reason, to protect the A / D converter 16, it is conceivable to limit the gain using AGC 104 as shown in Figure 4. However, when directly converting a wideband (RF band) radio frequency signal (RF signal), the gain of not only high-power interference signals but also weak desired signals is limited, making it impossible to amplify the desired signal to the desired level.

[0036] Therefore, as in the receiver 1 according to the embodiment of the present invention, it is equipped with a diode limiter circuit 14 and an attenuator 15, and the diode limiter circuit 14 is composed of a number of diode limiters corresponding to the signal level of the received signal and the signal level of the interference signal, or the rating of the A / D converter 16.

[0037] <4. Effects> According to the receiver 1 of this embodiment, it includes a diode limiter circuit 14 and an attenuator 15, and the diode limiter circuit 14 is composed of a number of diode limiters 141, 142 according to the signal level of the received signal and the signal level of the interfering signal, or the rating of the A / D converter 16. Therefore, the saturation level (amplitude limiting level) of the receiver circuit can be increased, and sensitivity suppression of the desired signal by the interfering signal can be avoided. As a result, it is possible to achieve high intercept point performance against intermodulation distortion.

[0038] Furthermore, the diode limiter circuit 14 is composed of a predetermined number of diode limiters 141 and 142. Therefore, it is possible to increase the saturation level (amplitude limiting level) of the receiver circuit with a simple circuit configuration.

[0039] Although embodiments of this invention have been described above, the specific configuration is not limited to the embodiments described above, and any design changes, etc., that do not depart from the gist of this invention are also included. For example, although receiver 1 was described as an example of a configuration that receives a wideband (RF band) radio frequency signal (RF signal) using a direct conversion method, it is also applicable to a heterodyne type receiver that frequency mixes the received radio waves with a reference signal from a local oscillator in a mixer and converts them to a lower frequency for processing. [Explanation of symbols]

[0040] 1: Receiver 1A: Receiver 1B: Receiver 11: Antenna 12: BPF (Bandpass Filter) 14: Diode limiter circuit (limiter circuit) 15: Attenuator 16: A / D converter 17: Signal Processing Unit 18: Sampling Clock 101: Mixer 102: Local oscillator 103: BPF (Bandpass Filter) 141: Diode Limiter 142: Diode Limiter D1: Diode D2: Diode V1: Output level V2: Output level Vf: Limit Level

Claims

1. A receiver capable of receiving a received signal and removing interference signals contained in the received signal, A limiter circuit that limits the signal level of the received signal and outputs a signal within the limit level, The circuit includes an attenuator that reduces the signal level output from the limiter circuit, The limiter circuit is composed of a number of diode limiter circuits corresponding to the signal level of the received signal and the signal level of the interference signal. A receiver characterized by the following features.

2. The limiter circuit is composed of a plurality of diode limiter circuits connected in series with the received signal. The receiver according to feature 1.

3. The limiter circuit is composed of a number of diode limiter circuits corresponding to the rating of the A / D converter to which the signal output from the attenuator is input. The receiver according to claim 1 or 2.

4. The RF signal, which is the received signal, is received using a direct conversion method. The receiver according to feature 1.

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