Package structures, electronic device systems, and optoelectronic fusion devices

Abstract

The present invention aims to provide a technology that can shorten the transmission distance of electrical signals and enable high-speed communication and high integration or high-speed semiconductor chips. [Solution] The present invention provides a package structure in which a chamber including the package substrate, a frame, and a top plate is arranged on a package substrate, the frame is provided with an inlet and / or outlet for a coolant, a semiconductor chip and a photoelectric conversion element are arranged inside the chamber, and the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate.

Description

Technical Field

[0001] The present invention relates to a package structure, a circulation system, and an optoelectronic fusion device compatible with high-speed communication and optical communication.

Background Art

[0002] In recent years, the spread of the Internet and mobile communication has advanced, and both the communication speed and the communication volume have increased significantly. In response, data centers and the like to which optical communication is applied have been developed. For further high-speed and high-capacity high-speed communication, the frequency of communication signals has been increasing, and the concept of optical communication applied to connections between servers and within server racks, and further to connections between semiconductor chips, has been advancing.

[0003] In response to the trend of optical communication implementation, currently, the development of a package structure in which a plurality of semiconductor chips are mounted on a single package substrate, optical communication connectors and optoelectronic conversion elements are arranged at the edges of the package substrate, and the optical signals within the substrate are converted into electrical signals and transmitted to the semiconductor chips is in progress. The insulating material of the package substrate has been developed to have a low dielectric tangent in order to suppress signal attenuation when passing through the substrate in accordance with the high-frequency of electrical signals. However, in recent years, the requirements for high-speed and high-capacity communication, which have been accelerating significantly, cannot be fully met only by material development, and limitations are becoming apparent.

[0004] Therefore, in order to avoid the influence of attenuation in the insulating material, it is required to arrange the optoelectronic conversion element in the vicinity of the semiconductor chip. In addition, since a plurality of semiconductor chips are mounted on the same package substrate and the size of the package substrate is increasing, it is also necessary to consider the layout of the optoelectronic conversion element. Furthermore, due to the high integration and high speed of logic semiconductor chips, the power consumption has increased, and the thermal influence and cooling efficiency due to heat generation have also become issues.

[0005] ​​Regarding the cooling effect of semiconductor chips, many methods have been considered in the past. Among them, the liquid cooling method described in Patent Document 1 is considered to be effective as a cooling method for future packages due to its high cooling efficiency. Specifically, Patent Document 1 aims to "provide a mounting structure for semiconductor devices and electronic components that can operate stably by suppressing the temperature rise associated with the heat generated by semiconductor devices and electronic components with high power consumption," and discloses the following as an invention for a mounting structure for semiconductor devices and electronic components: "It comprises an interposer 10, a semiconductor device 11 mounted on the surface 10a of the interposer 10, and a cover 12 that is in close contact and fixed to the surface 10a of the interposer 10 so as to encompass the semiconductor device 11, and together with the interposer 10 forms an internal space S. The cover 12 has an inlet 13 for introducing a heat-absorbing fluid L from the outside into the internal space S, and an outlet 14 for discharging the fluid L from the internal space S to the outside. The internal space S is a closed space except for the inlet 13 and the outlet 14." [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2012-138473 [Overview of the project] [Problems that the invention aims to solve]

[0007] Integrating optical communication into semiconductor packages presents many challenges. First, high-frequency electrical signals within a semiconductor package are greatly affected by attenuation due to transmission distance. Therefore, photoelectric conversion elements must be placed close to the semiconductor chip to minimize transmission distance. However, since lasers, for example, are sensitive to heat, cooling of the photoelectric conversion elements must also be considered. Other issues include how to connect optical signals from the optical communication cable to the photoelectric conversion element near the semiconductor chip, for example, how to ensure the optical transmission path, connection method, and optical axis alignment accuracy to the photoelectric conversion element without interfering with its cooling.

[0008] Regarding the cooling of semiconductor chips, we believe that liquid cooling methods, such as those described in Patent Document 1, offer high cooling efficiency and are effective as future package cooling methods. In particular, we believe that a method in which a sealed space is created on the package substrate using a cooling chamber equipped with an inlet and an outlet, and the semiconductor chip inside is cooled by a liquid flow, can achieve stable cooling against the heat generated by the semiconductor chip. However, since the sealed space inside the cooling chamber is filled with cooling liquid, it is not easy to connect optical communication to the inside of the cooling chamber while maintaining a sealed state, and it has been difficult to place photoelectric conversion elements inside the cooling chamber.

[0009] Therefore, the present invention aims to provide a technology that can shorten the transmission distance of electrical signals and enable high-speed communication and high integration or high-speed semiconductor chips. [Means for solving the problem]

[0010] To solve the above problems, one representative package structure of the present invention is characterized in that a chamber including the package substrate, a frame, and a top plate is arranged on a package substrate, the frame is provided with an inlet and / or outlet for a cooling liquid, a semiconductor chip and a photoelectric conversion element are arranged inside the chamber, and the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate. [Effects of the Invention]

[0011] According to the present invention, it is possible to provide a technology that can shorten the transmission distance of electrical signals and realize high-speed communication and high integration or high-speed semiconductor chips. Other issues, configurations, and effects not mentioned above will be clarified by the description of the embodiments for carrying out the invention below. [Brief explanation of the drawing]

[0012] [Figure 1] Figure 1 is a cross-sectional view showing an example of a package structure. [Figure 2] Figure 2 is a magnified view of the photoelectric conversion element portion of the package structure. [Figure 3] Figure 3 is a cross-sectional view showing an example of a package structure. [Figure 4] Figure 4 is a schematic diagram illustrating the Θ shift. [Figure 5] Figure 5 is a schematic diagram illustrating the magnitude shift. [Figure 6] Figure 6 shows the case where the core material and cladding material are placed on a glass substrate that will serve as the top plate. [Figure 7] Figure 7 shows the case when a resist has been formed. [Figure 8] Figure 8 shows the result after etching. [Figure 9] Figure 9 shows the result when the resist is removed. [Figure 10] Figure 10 shows the case where unwanted parts of the metal film are removed. [Figure 11] Figure 11 shows the case where the resist is removed. [Figure 12] Figure 12 shows the case where a resist pattern is formed on the glass substrate that will serve as the top plate. [Figure 13] Figure 13 shows the case where grooves are formed by dry etching. [Figure 14] Figure 14 shows the case where a resist pattern is formed in the portion of the glass substrate that will serve as the top plate where the light-emitting part of the optical waveguide circuit will be formed. [Figure 15] Figure 15 shows the case where grooves are formed by dry etching. [Figure 16]FIG. 16 is a diagram showing a case where a laser modified portion is formed on a glass substrate serving as a top plate. [Figure 17] FIG. 17 is a diagram showing a case where wet etching is performed on a glass substrate serving as a top plate. [Figure 18] FIG. 18 is a diagram showing a cross-sectional image of the depth of incidence of a pulsed laser when forming a plurality of laser modified portions. [Figure 19] FIG. 19 is a diagram showing a top view image of the laser modified portion of FIG. 18. [Figure 20] FIG. 20 is a diagram showing a cross-sectional image after etching the laser modified portion of FIG. 18. [Figure 21] FIG. 21 is a diagram showing a top view image after etching. [Figure 22] FIG. 22 is a diagram showing a case where a metal film is formed on a glass substrate serving as a top plate. [Figure 23] FIG. 23 is a diagram showing a case where unnecessary portions of an aluminum film are removed. [Figure 24] FIG. 24 shows a case where a core material is disposed on a glass substrate serving as a top plate. [Figure 25] FIG. 25 is a diagram showing a case where a cladding material and a resist pattern are disposed on a glass substrate serving as a top plate. [Figure 26] FIG. 26 is a diagram showing a case where an embedded resin is disposed. [Figure 27] FIG. 27 is a diagram showing an example of a coolant circulation system. [Figure 28] FIG. 28 is a diagram showing an enlarged view of a chamber. [Figure 29] FIG. 29 is a diagram showing an example of a package structure in cross section. [Figure 30] FIG. 30 is a diagram showing an enlarged view of a portion of a photoelectric conversion element in a package structure. [Figure 31] FIG. 31 is a diagram showing a case where a core material and a cladding material are disposed on a glass substrate serving as a top plate. [Figure 32] FIG. 32 is a diagram showing a case where a resin material is introduced into a through hole. [Figure 33] Figure 33 shows the case where a resist pattern is formed. [Figure 34] Figure 34 shows the case where etching is performed to form a mirror shape. [Figure 35] Figure 35 shows the case where the resist pattern is removed. [Figure 36] Figure 36 is a cross-sectional view showing an example of a package structure. [Figure 37] Figure 37 shows the case where a metal film is formed. [Figure 38] Figure 38 shows the case where a resist pattern is formed. [Figure 39] Figure 39 shows the case where resin is placed. [Figure 40] Figure 40 shows the case where a resist pattern is formed. [Figure 41] Figure 41 shows the case of etching. [Figure 42] Figure 42 shows the case where the resist is peeled off. [Figure 43] Figure 43 shows the case where unwanted parts of the metal film are removed. [Figure 44] Figure 44 shows the case where resin is placed. [Figure 45] Figure 45 is a cross-sectional view showing an example of a package structure. [Figure 46] Figure 46 is a cross-sectional view showing an example of a package structure. [Figure 47] Figure 47 shows an image of the top surface of the package structure. [Figure 48] Figure 48 shows a method for aligning the photoelectric conversion elements. [Figure 49] Figure 49 is a magnified view of the photoelectric conversion element and optical waveguide circuit. [Figure 50] Figure 50 is a cross-sectional view showing an example of a package structure. [Figure 51] Figure 51 is a cross-sectional view showing an example of a package structure. [Figure 52] Figure 52 shows the locations where photoelectric conversion elements are placed in an optical waveguide circuit. [Figure 53] Figure 53 shows a cross-section of Figure 52 aa' when a photoelectric conversion element is placed in the optical waveguide circuit. [Figure 54] Figure 54 shows the cross-section bb' of Figure 52 when a photoelectric conversion element is placed in the optical waveguide circuit. [Figure 55] Figure 55 is a cross-sectional view showing an example of a package structure. [Figure 56] Figure 56 shows the locations where photoelectric conversion elements are placed in an optical waveguide circuit. [Figure 57] Figure 57 shows the cc' cross-section of Figure 56 when an electrical conversion element is placed in the optical waveguide circuit. [Figure 58] Figure 58 is a cross-sectional view showing an example of a package structure. [Modes for carrying out the invention]

[0013] Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to these embodiments. Furthermore, in the drawings, identical parts are denoted by the same reference numerals. When there are multiple components with the same or similar function, they may be described using the same symbol but with different subscripts. Furthermore, when it is not necessary to distinguish between these multiple components, the subscripts may be omitted in the description. The positions, sizes, shapes, ranges, and quantities of each component shown in the drawings may not represent the actual positions, sizes, shapes, ranges, and quantities, in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, ranges, and quantities disclosed in the drawings.

[0014] In this disclosure, a package structure containing semiconductor chips and photoelectric conversion elements will be described. Since the package structure functions as an electronic device, it can also be referred to as, for example, a "photoelectric integrated device."

[0015] [First Embodiment] (composition) The configuration of the first embodiment of the present invention will be described with reference to Figures 1 and 2. Figure 1 is a cross-sectional view of an example of a package structure 1. In the package structure 1, a chamber 52 including the package substrate 10, a frame 34, and a top plate 38 is arranged on the package substrate 10. The frame 34 is provided with a coolant inlet 34i and / or outlet 34o. A semiconductor chip 50 and a photoelectric conversion element 28 are arranged inside the chamber 52, and the photoelectric conversion element 28 is connected to an optical waveguide circuit 36 ​​formed on the top plate 38. Specifically, the package structure 1 has a chamber structure surrounded by the package substrate 10, the top plate 38, and the frame 34. Coolant is filled inside the chamber 52, and the semiconductor chip 50 is cooled.

[0016] In the first embodiment, the package substrate 10 is a rigid substrate with a low CTE (Cold Temperature Equivalent) close to that of the silicon chip (semiconductor chip 50) and sufficient thickness. The package substrate 10 includes, for example, a first wiring layer 10a, a low-stretch CCL (Copper Clad Laminate) 10b, and a second wiring layer 10c, and the first wiring layer 10a and the second wiring layer 10c are electrically connected via an electrode portion 10d. The first wiring layer 10a and the second wiring layer 10c have wiring with a predetermined shape in the xy plane, and the semiconductor chip 50 placed on the first wiring layer 10a is electrically connected to terminals 18 placed on the second wiring layer 10c. A capacitor 20 is placed on the second wiring layer 10c and exhibits a decoupling function, for example, to prevent AC noise from being applied to terminals 18. Note that the configuration of the package substrate 10 is not limited to the above description. The material and configuration of the package substrate 10 can be set according to the package structure 1.

[0017] Furthermore, the package structure 1 includes an interposer 12 placed on the package substrate 10, the semiconductor chip 50 and the photoelectric conversion element 28 are mounted on the interposer 12, and the interposer 12 is made of silicon or glass. Specifically, the interposer 12 made of silicon or glass is placed on the package substrate 10, and the package substrate 10 and the interposer 12 are electrically connected via solder bumps 14. Underfill 16 is filled between the package substrate 10 and the interposer 12.

[0018] Furthermore, multiple semiconductor chips 50 are mounted on the interposer 12, and the semiconductor chips 50 and the interposer 12 are electrically connected via solder bumps 24. Underfill 26 is filled between the semiconductor chips 50 and the interposer 12. The capacitor 22 is positioned on the plane of the interposer 12 in the negative z-axis direction and performs a decoupling function similar to, for example, the capacitor 20.

[0019] The semiconductor chip 50 has connection terminals on both the side facing the interposer 12 (the side in the negative z-axis direction) and the side opposite to the side facing the interposer 12 (the side in the negative z-axis direction). The photoelectric conversion element 28 is positioned to connect to the connection terminal located on the side opposite to the interposer 12. The photoelectric conversion element 28 and the semiconductor chip 50 are electrically connected via solder bumps 30. Underfill 32 is filled between the photoelectric conversion element 28 and the semiconductor chip 50.

[0020] Regarding the use of the connection terminals, the connection terminals on the side of the semiconductor chip 50 facing the interposer 12 (the side facing the negative z-axis) are mainly supplied with power through the package substrate 10 and the interposer 12. The connection terminals on the side of the semiconductor chip 50 opposite to the interposer 12 (the side facing the positive z-axis) include connection terminals for electrical signals and power terminals for the photoelectric conversion element 28.

[0021] In recent years, in order to provide efficient power supply, designs that separate power supply circuits and signal circuits within a semiconductor chip using the transistor formation surface as the boundary have become increasingly common. This embodiment, in which the electrical signal from the photoelectric conversion element 28 is connected from the opposite side of the package substrate 10, can also be applied to such semiconductor chips.

[0022] The frame 34 is positioned on the package substrate 10 so as to surround the interposer 12. The top plate 38 has an optical waveguide circuit 36 ​​formed on its negative z-axis direction, and is positioned on the frame 34 so that the optical waveguide circuit 36 ​​faces the negative z-axis direction. A connector 40 is positioned on the optical waveguide circuit 36, and the optical signal input from the optical cable 42 propagates (connects) to the optical waveguide circuit 36. In the following description, we will mainly describe the case in which an optical signal is input from the optical cable 42 to the package structure 1 and the optical signal is converted to an electrical signal in the photoelectric conversion element 28, but this disclosure is not limited to this case. The electrical signal may be converted to an optical signal in the photoelectric conversion element, and the optical signal may be output to the outside from the optical cable 42.

[0023] The frame 34 and the package substrate 10, and the frame 34 and the top plate 38 are fixed together with adhesive 44. The frame 34 has grooves formed in the parts that contact the package substrate 10 and the parts that contact the top plate 38, so that the area in contact with the frame 34 by the adhesive 44 is increased. In addition, the top plate 38 and the photoelectric conversion element 28 are fixed together with resin 46.

[0024] The space partitioned by the package substrate 10, the frame 34, and the top plate 38 forms a chamber 52. The frame 34 has a coolant inlet 34i and an outlet 34o, and the coolant can be introduced into the chamber 52 in the direction from arrow A1 to arrow A2 to cool the semiconductor chip 50 and the photoelectric conversion element 28. The temperature sensor 54 is located near the outlet 34o of the frame 34, and the temperature of the chamber 52 can be determined by detecting the temperature of the temperature sensor 54. Although the case in which the coolant flows from the inlet 34i to the outlet 34o of the chamber 52 has been described, this disclosure is not limited to the above case. For example, the coolant may be discharged from the inlet 34i, or the coolant may be introduced into the chamber 52 from the outlet 34o. Also, although the case in which the inlet and outlet are provided separately has been shown, the chamber 52 may have a single opening that serves both the function of an inlet and an outlet.

[0025] (Connection structure between the photoelectric conversion element 28 and the top plate 38) Next, with reference to Figure 2, the connection structure between the photoelectric conversion element 28 and the top plate 38 will be described. Figure 2 is an enlarged view of the portion of the package structure 1 that includes the photoelectric conversion element 28. Figure 2 shows, for example, the configuration of the area including the photoelectric conversion element 28 on the positive x-axis side of the two photoelectric conversion elements 28 shown in Figure 1 (including the optical waveguide circuit 36, top plate 38, etc.). Note that the configuration of the area including the photoelectric conversion element 28 on the positive x-axis side has a similar configuration to the area including the photoelectric conversion element 28 on the positive x-axis side, although the orientation may not match. Therefore, one will be described and the other will be omitted. Regarding other configurations and configurations included in other embodiments, unless otherwise specified, a representative configuration will be described, and other descriptions may be omitted. The photoelectric conversion element 28 has an optical signal input section 28i on the side opposite to the semiconductor chip 50. The optical waveguide circuit 36 ​​has a light output section 36o that outputs the optical signal propagated within the core material (core) 360. By aligning the optical axis of the light-emitting section 36o of the optical waveguide circuit 36 ​​with the optical axis of the input section 28i of the photoelectric conversion element 28, the optical signal can be transmitted from the optical waveguide circuit 36 ​​to the photoelectric conversion element 28 with reduced loss. For ease of understanding, the case in which the optical signal propagates from the optical waveguide circuit 36 ​​to the input section 28i of the photoelectric conversion element 28 (for example, when the photoelectric conversion element converts the optical signal into an electrical signal like a photodiode) will be described, but this disclosure is not limited to this case. This disclosure can also be applied when the optical signal output from the photoelectric conversion element 28 propagates through the optical waveguide circuit 36, propagates through the optical cable 422 from the package structure 1, and is output to the outside of the package structure 1. In this case, the light-emitting section 36o of the optical waveguide circuit 36 ​​functions as a light-receiving section, and the input section 28i of the photoelectric conversion element 28 also functions as an output section.

[0026] Furthermore, the connection between the optical waveguide circuit 36 ​​and the photoelectric conversion element 28 is made of a resin with the same refractive index as the core material (core material 360) that forms the core of the optical waveguide circuit 36. Specifically, the connection between the input portion 28i of the photoelectric conversion element 28 and the light-emitting portion 36o of the optical waveguide circuit 36 ​​is made of resin 46, which is transparent and has the same refractive index as the core material 360 of the optical waveguide circuit 36. The reason why the connection portion has the same refractive index as the core material 360 is to suppress the loss of optical signals due to differences in refractive index distribution. Possible causes of optical loss include reflection and scattering of optical signals at the interface between the optical waveguide circuit 36 ​​and the connection portion (resin 46) and at the interface between the connection portion (resin 46) and the photoelectric conversion element 28. The statement that the connecting portion (resin 46) has an equivalent refractive index means, for example, that the difference between the refractive index of resin 46 and the refractive index of core material 360 is smaller than the difference between the refractive index of the cladding material forming the optical waveguide circuit 36 ​​and the refractive index of core material 360. In the following explanation, expressions such as resin having an equivalent refractive index to the core material may be used, but unless otherwise specified, they have the same meaning as above.

[0027] (Alignment) In package structure 1, the optical waveguide circuit 36 ​​is a first optical waveguide circuit formed near the side of the top plate 38 that is bonded to the frame 34, and the top plate 38 is made of a light-transmitting material. Specifically, in the first embodiment, during the manufacturing process of package structure 1, the optical waveguide circuit 36 ​​is formed on a transparent substrate (made of a light-transmitting material) such as glass as the top plate 38, and direct alignment is performed while looking through the transparent top plate 38 at the input portion 28i of the photoelectric conversion element 28 and the light-emitting portion 36o of the optical waveguide circuit 36. In order to improve the alignment accuracy (hereinafter also referred to as "optical axis alignment accuracy"), it is important that the multiple semiconductor chips 50 and the photoelectric conversion elements 28 mounted on them are arranged in a highly accurate manner.

[0028] The core size of the optical waveguide circuit 36 ​​(the width of the core material 360 in a cross-section parallel to the yz plane in Figure 2) is typically several micrometers, and the requirements for accuracy in optical axis alignment are becoming increasingly stringent. As the package size also increases, the effects of misalignment of the photoelectric conversion element 28 cannot be ignored. In this embodiment, solder bumps are used to connect the terminals of the semiconductor chip 50 and the photoelectric conversion element 28, and high placement accuracy is ensured by self-alignment during reflow soldering of the BGA (Ball Grid Array) mounting.

[0029] In order to obtain high positional accuracy through self-alignment, the pattern of the interposer 12 must first be highly accurate. To this end, it is preferable to use equipment with high positional accuracy to form the pattern during the manufacturing of the interposer 12, and it is also preferable to use silicon or glass, which have high flatness, as the material for the interposer 12.

[0030] Furthermore, the top panel 38 is made of glass with the same CTE as the interposer 12, so that the gap between the interposer 12 and the top panel 38 does not become large due to thermal expansion and contraction.

[0031] In this embodiment, a semiconductor chip 50 is mounted on a package substrate 10 using an interposer 12. However, a glass core substrate may be used instead of the package substrate 10 and the interposer 12. A glass core substrate is flat, can be used with semiconductor front-end manufacturing equipment, and can achieve the same rigidity as the package substrate 10 while being about half the thickness of the package substrate 10. Therefore, by adopting a glass core substrate as the package substrate, the size of the package substrate can be suppressed.

[0032] [Modified version of the first embodiment] A modified example of the first embodiment will be described with reference to Figures 3 to 5. In the following description, components that are the same as or equivalent to those in the first embodiment described above will be denoted by the same reference numerals, and their descriptions will be simplified or omitted.

[0033] Figure 3 is a cross-sectional view of an example of package structure 1a. In package structure 1a, semiconductor chips 501 and 502 are arranged on an interposer 12. A photoelectric conversion element 281 is arranged on semiconductor chip 501, and a photoelectric conversion element 282 is arranged on semiconductor chip 502. A memory chip 561 is arranged on the interposer 12 adjacent to semiconductor chip 501, and a memory chip 562 is arranged on the interposer 12 adjacent to semiconductor chip 502. Semiconductor chips 501 and 502 and memory chips 561 and 562 are each electrically connected to the interposer 12 by solder bumps 24. Underfill 26 is filled between each of the semiconductor chips 501 and 502 and memory chips 561 and 562 and the interposer 12. Memory chip 561 is electrically connected to semiconductor chip 501 via the interposer 12, and memory chip 562 is electrically connected to semiconductor chip 502 via the interposer 12.

[0034] As a layout for arranging the photoelectric conversion elements 28 and semiconductor chip 50 to facilitate alignment during manufacturing, as shown in Figure 3, the photoelectric conversion elements 281 and 282 are arranged together in the central part of the chamber 52. This reduces the distance d from the center cp of the top plate 38 (or package substrate 10) to the photoelectric conversion element 281 (for example, the distance from the center cp of the top plate 38 to the light-receiving part 201i of the photoelectric conversion element 281), thereby suppressing the effects of Θ deviation during alignment and magnitude deviations due to differences in CTE between the top plate 38 and the package substrate 10.

[0035] The Θ shift and the magnitude shift will be explained with reference to Figures 4 and 5. Figure 4 is a schematic diagram showing the Θ shift. Figure 4 shows the case where photoelectric conversion elements 28a and 28c are arranged on a semiconductor chip 50. With the center cp of the top plate 38 as the reference, the photoelectric conversion elements 28a and 28c are arranged at different positions, and the distance between the photoelectric conversion element 28a and the center cp of the top plate 38 is denoted as da, the distance between the photoelectric conversion element 28b and the center of the top plate 38 is denoted as db, and the distance between the photoelectric conversion element 28c and the center of the top plate 38 is denoted as dc. Note that the distance from the center is the length obtained by projecting the distance between the center cp of the top plate 38 and the center of the photoelectric conversion element 28 in the x-axis direction. Furthermore, although the case between the center of the top plate 38 and the center of the photoelectric conversion element 28 is explained, this disclosure is not limited to this case. This disclosure can also be applied to the case between the center of the top plate 38 and the input portion 28i of the photoelectric conversion element 28.

[0036] The dashed line indicates the case where a Θ shift occurs between photoelectric element 28a and photoelectric element 28c. Because the position of photoelectric element 28c changes due to the Θ shift, the distance between the center of photoelectric element 28 and the center cp of the top plate 38 also changes. When a Θ shift occurs, let daΘ be the distance between photoelectric element 28a and the center cp of the top plate 38, dbΘ be the distance between photoelectric element 28b and the center cp of the top plate 38, and dcΘ be the distance between photoelectric element 28c and the center cp of the top plate 38. As is clear from Figure 4, the difference between daΘ and da is smaller than the difference between dbΘ and db, and also smaller than the difference between dcΘ and dc. Therefore, if the photoelectric elements are placed close to the center cp of the top plate 38, the effect of the Θ shift can be reduced even if a Θ shift occurs.

[0037] Figure 5 is a schematic diagram illustrating the magnitude shift. Similar to Figure 4, Figure 5 shows the case where the photoelectric conversion elements 28a and 28c are arranged on the semiconductor chip 50.

[0038] The dashed line indicates the occurrence of a magnitude shift from photoelectric element 28a to photoelectric element 28c. Because the position of photoelectric element 28c changes due to the magnitude shift, the distance between the center of photoelectric element 28 and the center cp of the top plate 38 changes. When a Θ shift occurs, let daM be the distance between photoelectric element 28a and the center cp of the top plate 38, dbM be the distance between photoelectric element 28b and the center cp of the top plate 38, and dcM be the distance between photoelectric element 28c and the center cp of the top plate 38. As is clear from Figure 5, the difference between daM and da is smaller than the difference between dbM and db, and also smaller than the difference between dcM and dc. Therefore, when the photoelectric elements are positioned close to the center cp of the top plate 38, the effect of the magnitude shift can be reduced even if a magnitude shift occurs.

[0039] (First method for forming an optical waveguide circuit) Referring to Figures 6 to 11, a method for forming an optical waveguide circuit 36 ​​on a glass top plate 38 will be described. Figures 6 to 11 are enlarged views of, for example, the area near the light-emitting section 36o in Figure 2. Figure 6 shows the case where the core material and cladding material are arranged on a glass substrate which will serve as the top plate.

[0040] First, as shown in Figure 6, a first layer of cladding material 362 is deposited on a glass substrate that will become the top plate 38 (hereinafter sometimes simply referred to as "glass substrate 38"), and a core material 360 is deposited on the cladding material 362. Then, a core pattern, which is a core with a predetermined shape extending in the xy plane, is formed by photolithography, and a second layer of cladding material is deposited on the core material and cladding material on which the core pattern has been formed. As a result, as shown in Figure 6, the core material 360 and cladding material 362 are formed on the glass substrate that will become the top plate 38. Note that the glass substrate is the one that will become the top plate 38 in the package structure 1, and the shape (thickness, etc.) of the top plate 38 of the package structure 1 may differ at the stage of forming the optical waveguide circuit 36, but expressions such as "glass substrate that will become the top plate 38", "top plate 38", and "glass substrate" may be used to show the relationship with the top plate 38 of the package structure 1.

[0041] There are several methods for forming a core pattern, but in this embodiment, a photosensitive resin is used as the core material 361, and the pattern is formed using photolithography.

[0042] Next, a mirror is formed on the light-emitting portion 36o of the optical waveguide circuit 36. Figure 7 shows the case when a resist is formed. Figure 8 shows the case when etching is performed. The method for forming the mirror involves first depositing the second layer of cladding material 362 as shown in Figure 6, then applying the resist 364 as shown in Figure 7, and forming a pattern that is tilted in the thickness direction (tilted by an angle θr from the z-axis direction) on the portion that will become the light-emitting portion 36o of the optical waveguide circuit 36 ​​using gradation exposure. Then, as shown in Figure 8, the resist 364, cladding material 362, and core material 360 are etched by anisotropic dry etching while maintaining the tilted pattern of the resist 364. The arrow A3 pointing in the z-axis direction indicates the irradiation of radicals used for etching. If the etching rates of the resist 364 and cladding material 362 are the same, then it is sufficient to form a resist 364 film with a tilt of θr of 45° as shown in Figure 7. Furthermore, if the etching rate of the cladding material 362 is lower than the etching rate of the resist 364, the inclination angle θr of the resist 364 is made greater than 45°, and if the etching rate of the cladding material 362 is higher than the etching rate of the resist 364, the inclination angle θr of the resist 364 is made less than 45°, so that the angle θc of the cladding material becomes 45°.

[0043] Figure 9 shows the case when the resist is removed. After the process in Figure 8, the resist 364 is removed, and a metal film 366 such as AL, which will become a reflective film (mirror), is sputter-deposited as shown in Figure 9. When sputtering, it is preferable to sputter at an angle as shown by arrow A4 so that it does not adhere to the wall surface 360s where the core is exposed. In this case, by arranging the optical waveguide circuit 36 ​​so that it is in the same orientation as the mirrors in other locations, it is possible to process the entire surface at once by sputtering. In addition, if necessary, a smoothing treatment may be performed on the cladding material 362 before sputtering so that the mirror surface is smooth. The smoothing treatment can be selected according to the material of the cladding material 362, such as heat treatment or chemical treatment.

[0044] Next, Figure 10 shows the case where unwanted portions of the metal film are removed. As shown in Figure 10, an unwanted portion of the metal film 366 is etched away using a resist pattern 368, which is a resist film having a predetermined shape, as a mask. In this way, a mirror portion 370 is formed from the metal film 366. Finally, Figure 11 shows the case where the resist is removed. The resist pattern 368 is removed, and the light-emitting section 36o is completed as shown in Figure 11.

[0045] Furthermore, in order to facilitate the formation of a connection with the photoelectric conversion element 28, it is also possible to pre-fill the recess in the mirror portion 370 with a resin having the same refractive index as the core material 360.

[0046] (Second method for forming an optical waveguide circuit (first groove formation method)) Referring to Figures 12 to 21, other methods for forming optical waveguide circuits will be described. As a means of forming an optical waveguide circuit 36 ​​on the top plate 38, one method is to use the glass substrate that will become the top plate 38 as a cladding layer, form grooves in the glass substrate, and use them as the core of the optical waveguide. After forming the grooves, a reflective film for the light-emitting part, core material filling, and cladding layer formation are performed to form the optical waveguide circuit. First, the groove formation method will be described. In this first groove formation method, a core material is formed on a glass substrate by anisotropic dry etching using a resist as a mask. This will be explained with reference to Figures 12 to 15. Note that in Figures 12 to 21 below, the coordinate orientation is set so that an optical waveguide circuit corresponding to the optical waveguide circuit 36 ​​in Figure 2 is formed.

[0047] Figures 12 and 13 are conceptual diagrams of the cross-section in the direction of cutting the optical waveguide core. Figure 12 shows the case where a resist pattern 480 is formed on the glass substrate that will become the top plate 38. Figure 13 shows the case where grooves are formed by dry etching. The method for forming the grooves can be set as appropriate. For example, one method is to first pattern the glass substrate that will become the top plate 38 using a resist pattern 480, as shown in Figure 12, to expose it in accordance with the core pattern of the optical waveguide circuit 36. Subsequently, as shown in Figure 13, anisotropic dry etching is performed on the glass substrate using the resist pattern 480 as a mask. The arrow 5A in Figure 13 indicates the etching radicals that are irradiated.

[0048] Figures 14 and 15 are conceptual diagrams of a cross-section along the optical waveguide. Figure 14 shows the process of forming a resist pattern in the portion of the glass substrate that will serve as the top plate where the light-emitting portion of the optical waveguide circuit is formed, and Figure 15 shows the process of forming grooves by dry etching. In this case, when patterning the light-emitting portion 36o of the optical waveguide circuit 36, as shown in Figure 14, the angle θp of the wall surface at the end of the core pattern corresponding to the light-emitting portion 36o of the optical waveguide circuit 36 ​​is set to a sloped shape of θp = 45° by gradient exposure, thereby creating a sloped shape in the depth direction (z-axis direction) of the resist pattern 480a. Arrow A6 indicates gradient exposure. Subsequently, as shown in Figure 15, dry etching is performed to etch the resist pattern 480. By doing this, the etching of the glass substrate in the portion where the resist pattern 480 is formed is delayed compared to the etching of the glass substrate in the portion where the resist pattern 480 is not formed, thereby creating a slope in the glass substrate. In Figure 15, the dashed line before dry etching shows the resist pattern 480, and resist pattern 480a shows the shape of the resist pattern after dry etching. Arrow A7 indicates the irradiation of radicals used in dry etching.

[0049] Subsequently, by removing the resist pattern 480, grooves are formed in the glass substrate that will become the top plate 38.

[0050] (Second method for forming an optical waveguide (second groove formation method)) The second groove formation method will be explained with reference to Figures 16 to 21. In this second groove formation method, a modified area is formed on the surface of the glass substrate that will become the top plate 38 using a pulsed laser, and a core material is formed on the glass substrate by wet etching starting from that area. This will be explained with reference to Figures 16 to 21. Figures 16 and 17 are conceptual diagrams of the cross-section in the direction of cutting the core of the optical waveguide. Figure 16 shows the case where a laser-modified portion is formed on the glass substrate that will become the top plate. Figure 17 shows the case where wet etching is performed on the glass substrate that will become the top plate. As a second method of forming grooves in the glass substrate, as shown in Figure 16, the focus of the pulsed laser is set to a part close to the surface of the glass substrate that will become the top plate 38, and the pulsed laser is irradiated onto the part that will form the core pattern of the optical waveguide circuit 36 ​​to modify the glass. The laser-modified portion 38m indicates the modified portion of the glass substrate. As shown in Figure 17, starting from the laser-modified portion 38m, grooves 38e are formed by wet etching with a hydrofluoric acid solution.

[0051] Figures 18 to 21 show the process of forming the core pattern in the portion of the glass substrate that will serve as the top plate, where the light-emitting part of the optical waveguide circuit is formed. Figure 18 is an image of a cross-section along the optical waveguide, showing a cross-sectional image of the depth of pulsed laser incidence when forming the laser-modified section. Figure 19 is a top view image of the laser-modified section in Figure 18. In Figure 19, the laser-modified section 38m is shown by a line, illustrating the area into which multiple pulsed lasers are incident according to the size of the core pattern. Figure 20 shows a cross-sectional image of the laser-modified section in Figure 18 after etching. Figure 21 shows a top view image after etching. As shown in Figure 18, the portion corresponding to the mirror of the light-emitting section of the optical waveguide can be shaped at a 45° angle, as shown in Figure 20, by adjusting the output of the pulsed laser and changing the depth of the laser-modified section 38m. Furthermore, as shown in Figure 19, by changing the shape that forms the laser-modified section 38m when viewed in the xy plane, the planar area of ​​the inclined portion that contacts the mirror can be widened, as shown in Figure 21.

[0052] (Second method for forming optical waveguides (method for forming reflective film and cladding material)) The methods for forming the reflective film and cladding material will be explained with reference to Figures 22 to 26. After forming grooves in the glass substrate using the two groove forming methods described above, a metal material that will become the reflective film is deposited over the entire surface. Figure 22 shows the case where a metal film is formed on a glass substrate that will become the top plate. In Figure 22, an aluminum film 366a is formed by sputtering. Arrow 8A indicates sputtering using aluminum.

[0053] Figure 23 shows the case where unwanted portions of the aluminum film 366a are removed. After sputtering as shown in Figure 22, as shown in Figure 23, only the portion corresponding to the light-emitting part 36o of the optical waveguide circuit 36 ​​is covered with the resist pattern 364a, and the remaining portions of the aluminum film 366a are etched to remove the resist pattern 364a.

[0054] Next, Figure 24 shows the case where the core material is placed on a glass substrate that will serve as the top plate. As shown in Figure 24, a resin with a refractive index different from that of the glass substrate and which will serve as the core material 360a is deposited to fill the grooves of the glass substrate, and the surface is polished to leave the core material 360a only in the groove portions of the glass substrate.

[0055] Figure 25 shows the case where the cladding material and resist pattern are placed on a glass substrate that will serve as the top plate. As shown in Figure 25, a resin having the same refractive index as the glass substrate and which will serve as the cladding material 362a is deposited on it, a resist pattern 368a is formed so as to expose the portion corresponding to the light-emitting part 36o of the optical waveguide circuit 36, and the cladding material 362a is etched.

[0056] Figure 26 shows the case where the embedding resin is placed. After peeling off the resist pattern 368a, it is also advisable to fill the etched portion with a resin (embedding resin 380) that has the same refractive index as the core material in advance in order to connect it to the photoelectric conversion element 28, as shown in Figure 26.

[0057] Alternatively, instead of the resin cladding material 362a, a glass film with pre-placed openings may be attached to the portion corresponding to the light-emitting part 36o of the optical waveguide circuit 36.

[0058] (Method of attaching the top panel to the frame) Referring to Figure 1, the method of bonding the top plate 38 and the frame 34 will be explained. In package structure 1, the adhesive 44 used to bond the frame 34 and the top plate 38 is a photosensitive curing resin. In this embodiment, the specific method of bonding the top plate 38 and the frame 34 involves using a photocurable resin for both the adhesive 44 used to bond the top plate 38 and the frame 34, and for the resin 46 used to connect the optical waveguide circuit 36 ​​and the photoelectric conversion element 28. The photocurable resin is then placed on the frame 34 and the photoelectric conversion element 28. After placement, the top plate 38 is placed over the package substrate 10 (the top plate 38 is brought closer to the package substrate 10 from the positive z-axis direction). When placing the top plate 38, the top plate 38 is positioned by targeting the optical waveguide circuit 36 ​​and the photoelectric conversion element 28 from the top of the top plate 38 (positive z-axis direction), and then placed on the frame 34 and the photoelectric conversion element 28. Subsequently, the adhesive 44 and the resin 46 are cured by irradiating them with light. Thus, it is possible to employ a method that simultaneously fixes the optical axis position and bonds the top plate 38 and the frame 34.

[0059] The adhesive 44 between the frame 34 and the top plate 38 is made of the same material as the resin 46 that connects the optical waveguide circuit 36 ​​and the photoelectric conversion element 28, specifically for alignment purposes, and is not specialized for bonding. If the adhesion between the frame 34 and the top plate 38 is insufficient, there is a concern that delamination or leakage of the coolant 48 may occur due to pressure caused by increases or decreases in the coolant flow or heat generation.

[0060] Therefore, a groove structure is formed on the side of the frame 34 that is in contact with the top plate 38, thereby increasing the contact area between the frame 34 and the adhesive 44, and creating a structure that can withstand stress in the shear direction. Furthermore, the area of ​​the outlet 34o is made larger than the area of ​​the coolant inlet 34i (cross-sectional area of ​​the zy surface) to prevent the internal pressure of the chamber 52 from rising even if the coolant flow velocity fluctuates. Furthermore, by employing a method of suctioning the coolant from the coolant outlet 34o side for circulation, the flow rate of the coolant is controlled, thereby further suppressing the rise in internal pressure.

[0061] A temperature sensor 54 is attached to the frame 34 to measure the temperature of the chamber 52 or the coolant, and the flow rate of the coolant can be controlled based on the measured temperature to maintain a constant temperature range.

[0062] (Coolant circulation system) The coolant circulation system will be described with reference to Figures 27 and 28. Package structure 1 can also be applied to a circulation system that introduces coolant into package structure 1. For example, circulation system 100 for introducing coolant into package structure 1 includes a pump 102 connected to an outlet 34o that discharges coolant from chamber 52 and generates a liquid flow toward inlet 34i, and a controller 106 that monitors the temperature of chamber 52 and controls the flow velocity and coolant temperature of the liquid flow according to the monitored temperature, wherein the outlet 34o can have a larger cross-sectional area for the liquid flow than the inlet 34i. In circulation system 100, the coolant that flows out of chamber 52 is cooled by passing through a chiller or radiator and becomes a liquid flow that returns to chamber 52 again.

[0063] Figure 27 shows an example of a coolant circulation system. Figure 27 shows a system in which the coolant flow rate and chiller temperature are controlled by a controller. Specifically, the circulation system 100 includes a package structure 1, a pump 102, a chiller 104, and a controller 106. The pump 102 is located on the outlet 34o side of the chamber 52 of the package structure 1 and discharges the coolant from the chamber 52. The chiller 104 cools the coolant discharged by the pump 102. The coolant, whose temperature has been adjusted by the chiller 104, is introduced into the chamber 52 from the inlet 34i of the chamber 52.

[0064] Figure 28 is a magnified view of the chamber. The outlet 34o has a larger cross-sectional area for the liquid flow than the inlet 34i. Figure 28 shows the case where the chamber 52 has one outlet 34o and three inlets 34i. Even if the number of semiconductor chips etc. contained in the chamber 52 increases and the chamber 52 needs to be enlarged, as shown in Figure 28, the resistance to the liquid flow can be reduced by tilting the wall on the outlet 34o side of the chamber 52, making it easier to control the temperature of the chamber 52 while suppressing the internal pressure.

[0065] [Second Embodiment] (composition) Referring to Figures 29 and 30, the configuration of a second embodiment of the present invention is shown. Figure 29 is a cross-sectional view of an example of a package structure 1b. In the package structure 1b, the optical waveguide circuit 36b is a second optical waveguide circuit formed near the surface of the top plate 38 opposite to the surface that contacts the frame 34. The top plate 38 is made of a translucent material and has through holes 601 (or 602) that penetrate both sides thereof. The through holes 601 (or 602) are filled with a resin having the same refractive index as the material that forms the core of the second optical waveguide circuit, and the photoelectric conversion element 281 (or 282) is connected to the second optical waveguide circuit via the through holes 601 (or 602). In the following description, components that are the same or equivalent as those in the first embodiment described above are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0066] In the package structure 1 of the first embodiment, the surface of the top plate 38 on which the optical waveguide circuit 36 ​​is formed is the inner surface of the chamber 52, whereas in the package structure 1b of the second embodiment, the optical waveguide circuit 36b forms the outer surface of the chamber 52, which is different from the first embodiment.

[0067] In the package structure 1 of the first embodiment, the optical waveguide circuit 36 ​​is bonded to the frame 34, and there is a risk of deformation of the optical waveguide circuit 36 ​​due to stress caused by pressure and heat inside the chamber 52. In contrast, in the package structure 1b of the second embodiment, the optical waveguide circuit 36b is not in contact with the frame 34 and is positioned away from the chamber 52, thus eliminating this risk. Furthermore, since the optical waveguide circuit 36b is outside the chamber 52, it becomes possible to perform post-formation and modification of the optical waveguide circuit 36a.

[0068] The optical signal from the optical waveguide circuit 36b formed on the outside of the top plate 38 to the photoelectric conversion element 281 is transmitted through a through hole 601 formed in the top plate 38, which is a glass substrate. The through hole 601 is filled with a transparent resin that has a refractive index different from that of the glass, and the resin between the top plate 38 and the photoelectric conversion element 281 has approximately the same refractive index as the resin filling the through hole 601. The relationship between the photoelectric conversion element 282 and the through hole 602 is similar to the relationship between the photoelectric conversion element 281 and the through hole 601.

[0069] The through-holes 601 and 602 in the glass substrate are formed by creating a modified layer (laser-modified layer, micro-destruction layer) in the depth direction of the glass substrate that will become the top plate 38 using a pulsed laser, and then etching it by penetration with a hydrofluoric acid dilution. The size of the formed through-holes 601 and 602 can be, for example, several μm to several tens of μm in diameter (when viewed in the xy plane).

[0070] The x-axis shape of the through-holes 601 and 602 can also be adjusted from an X-shape to a straight shape by adjusting the concentration of the hydrofluoric acid diluent and the intensity of the pulsed laser according to the depth of the glass substrate that forms the top plate 38.

[0071] A transparent resin with a refractive index higher than that of glass is embedded in the formed through holes 601 and 602 and used as a waveguide for optical signals. For example, by embedding epoxy resin with a refractive index difference of about 0.2% to 6% from that of the glass substrate which forms the top plate 38, optical signals can be transmitted with minimal loss.

[0072] In the second embodiment, the mirrors that guide the optical signals from the optical waveguide circuit 36b formed in the top plate 38 to the through holes 601 and 602 in the top plate 38 can be manufactured relatively easily compared to the first embodiment.

[0073] For example, in the first embodiment, when light is bent 90° and emitted from the optical waveguide circuit 36, a 45° bevel is created, and the surface of the bevel is covered with a metal film to form a mirror, which is then filled with a resin having the same refractive index as the core. On the other hand, in the second embodiment, the portion to be bent 90° is filled with a resin having the same refractive index as the core, and then the filled resin is shaved to create a 45° bevel. The opposite side of the surface facing the core becomes air, forming a mirror, and there is no need to cover it with a metal film. Figure 30 is an enlarged view of the photoelectric conversion element 281 portion of the package structure 1b. Figure 30 shows a cross-sectional view of the connection image between the photoelectric conversion element 28 and the optical waveguide circuit 36b. As shown in Figure 30, a 45° bevel is formed in the light-emitting section 36bo. Note that the photoelectric conversion element 282 has the same configuration as the photoelectric conversion element 281, so its explanation is omitted.

[0074] (How to create a mirror) The method for creating the mirror will be explained with reference to Figures 31 to 35. Figures 31 to 35 are, for example, enlarged views of the area near the light-emitting portion 36o in Figure 30. Figure 31 shows the case where the core material and cladding material are arranged on a glass substrate which will serve as the top plate. The specific method for creating the mirror of the optical waveguide circuit 36b is as follows: First, as shown in Figure 31, the first layer of cladding material, the core material, and the second layer of cladding material are formed on the glass substrate which will serve as the top plate 38. Before the cladding material and core material are arranged, through holes 601 are formed in the glass substrate and filled with resin 60r. The resin 60r is a resin having a refractive index equivalent to that of the core material 360 of the optical waveguide circuit 36b. The cladding material 362b is removed from the end portion of the core material 360b of the optical waveguide circuit 36b so that the through holes 601 on the surface of the top plate 38 are exposed. To expose the through holes 60, for example, etching is performed. The resist pattern 364b placed on the cladding material 362b has a shape that exposes the through-holes 60, and arrow A9 indicates the irradiation of radicals used for etching.

[0075] Next, Figure 32 shows the case where resin material is introduced into the through hole. After removing the resist pattern 364b as shown in Figure 32, the area where the cladding material 362b was removed is further filled with resin 60r, and the surface of the resin 60r is polished to match the surface of the cladding material 362b.

[0076] Next, Figure 33 shows the case where a resist pattern is formed. As shown in Figure 33, a photosensitive resist layer is placed on the cladding material 362b and resin 60r formed in Figure 32, and a resist pattern 368b is formed on the embedded resin using a direct writing exposure machine by applying gradation exposure to create a shape identical to the mirror shape. Arrow A10 indicates gradation exposure.

[0077] Next, Figure 34 shows the case where etching is performed to form a mirror shape. As shown in Figure 34, the underlying resin 60r is etched together with the resist pattern 368b by anisotropic dry etching, and the shape of the resist pattern 368b is transferred to the resin 60r on the through hole 601. Arrow A11 shows the irradiation of radicals used for etching.

[0078] Next, Figure 35 shows the case where the resist pattern is removed. As shown in Figure 35, the resist pattern 368b is removed, the mirror is completed, and the light-emitting portion 36bo of the optical waveguide circuit 36b is formed.

[0079] [First modified example of the second embodiment] (composition) Referring to Figure 36, the configuration of the first modified example of the second embodiment will be described. In the following description, components that are the same or equivalent as those in the above-described embodiment and modified example will be denoted by the same reference numerals, and their descriptions will be simplified or omitted.

[0080] Figure 36 is a cross-sectional view of an example of package structure 1c. Figure 36 shows a modified configuration of the second embodiment in which optical waveguide circuits are formed on both sides of the top plate. In the package structure 1c, the top plate 38 is provided with an optical waveguide circuit, which is a first optical waveguide circuit (optical waveguide circuit 36c2) formed near the surface of the top plate 38 that is in contact with the frame 34, and a second optical waveguide circuit (optical waveguide circuit 36c1) formed near the surface of the top plate 38 opposite to the surface that is in contact with the frame 34. The top plate 38 is made of a light-transmitting material and has through holes 601 and 602 that penetrate both sides thereof. The through holes 601 and 602 are filled with resin having the same refractive index as the material that forms the core of the first optical waveguide circuit and the material that forms the core of the second optical waveguide circuit. The photoelectric conversion elements 281 and 282 are connected to the first optical waveguide circuit, and the first optical waveguide circuit is connected to the second optical waveguide circuit via the through holes. Package structure 1c differs from the package structures of the above-described embodiment and modified examples in that optical waveguide circuits (optical waveguide circuit 36c1 arranged on the positive z-axis side and optical waveguide circuit 36c2 arranged on the negative z-axis side) are arranged mainly on both sides of the top plate 38.

[0081] Regarding the package structure 1b of the second embodiment in Figure 29, if the distance (distance in the z-axis direction) between the top plate 38 in the chamber 52 and the photoelectric conversion element 28b is large, the optical signal that has passed through the through holes 601 and 602 may diffuse. In such cases, as shown in Figure 36, optical waveguide circuits 36c1 and 36c2 are formed on both sides of the top plate 38, and mirrors of a predetermined shape are formed on the optical waveguide circuits 361 and 362, so that the optical beam of the optical signal reaches the photoelectric conversion elements 281 and 282 efficiently. In the case of Figure 36, the optical signal incident from the optical cable 421 travels along the optical waveguide circuit 36c1 in the negative x-axis direction, changes direction in the negative z-axis direction at a predetermined position, and enters the through hole 601. The optical signal emitted from the through hole 601 travels along the optical waveguide circuit 36c2 in the positive x-axis direction, changes direction in the negative z-axis direction at a predetermined position, and enters the photoelectric conversion element 281. Furthermore, the optical signal incident from the optical cable 422 travels along the optical waveguide circuit 36c1 in the positive x-axis direction, changes direction in the negative z-axis direction at a predetermined position, and enters the through-hole 601. The optical signal exiting from the through-hole 601 travels along the optical waveguide circuit 36c2 in the positive x-axis direction, changes direction in the negative z-axis direction at a predetermined position, and enters the photoelectric conversion element 282.

[0082] (How to create a mirror) The method for creating the mirror will be explained with reference to Figures 37 to 44. In Figures 37 to 44, the case where the optical waveguide extends in the x-axis direction is shown for ease of understanding, but this does not mean that the content of this disclosure is limited to this case. In the first modification of the second embodiment, the mirror of the optical waveguide circuit 36c2 in the chamber 52 requires the use of a metal film. Figure 37 shows the case where a metal film is formed. Figure 38 shows the case where a resist pattern is formed. Figure 39 shows the case where resin is placed. The specific creation method can be the same as the method shown in the second embodiment. For example, for the part with a through hole, after creating the shape shown in Figure 35 (core material 360c2 and cladding material 362c2), a metal film 366c is formed by sputtering as shown in Figure 37. Arrow A12 indicates sputtering of the metal film. Next, as shown in Figure 38, a resist pattern 364c2 is formed only in the part where the metal film 366c remains, and the metal film of the unnecessary part of the metal film 366c2 is removed. Next, after removing the resist pattern 364c2, resin 60c2r is embedded as shown in Figure 39 to prevent corrosion of the metal film 366c.

[0083] In Figure 39, the embedded resin 60c2r should be a resin with a refractive index equivalent to that of the core material 360c2 of the optical waveguide circuit 36c2, in order to match the mirror that transmits the optical signal from the optical waveguide circuit 36c2 to the photoelectric conversion element 28. In Figure 39, the embedded resin 60cr is polished accordingly so that the surface of the embedded resin 60c2r (the surface in the negative z-axis direction) matches the surface of the cladding material 362c2.

[0084] On the other hand, when transmitting an optical signal from the optical waveguide circuit 36c1 to the photoelectric conversion element 28 arranged in the negative z-axis direction, the mirror in this case is oriented in the opposite direction to the light-emitting part 36c2o of the optical waveguide circuit 36c2 shown in Figure 39. Also, considering the distance to the photoelectric conversion element 28, the mirror shape is formed so as to focus the light onto the photoelectric conversion element 28. Figure 40 shows the case when a resist pattern is formed. Specifically, cladding material 362c1 and core material 360c1 are formed in advance on a glass substrate which will become the top plate 38, and an opening is formed in the area which will become the light-emitting part 36c1o and filled with resin 60c1r. Next, as shown in Figure 40, a concave shape is formed in the resist pattern 368c1 in the area where the mirror is to be formed by gradation exposure (arrow A13) of a direct writing exposure machine. Next, Figure 41 shows the case when etching is performed. As shown in Figure 41, anisotropic etching is used to etch the resist pattern 368c1 and the embedded resin, forming a concave mirror shape and a light-emitting portion 36c1o that emits an optical signal in the negative z-axis direction. Arrow A14 indicates the irradiation of radicals used for etching.

[0085] Next, the resist pattern 368c1 is removed, and sputtering is performed from an oblique direction (arrow A15) so that the sputtered metal film does not adhere to the vertical parts, similar to the sputtering of the metal film shown in Figure 9. Figure 42 shows the case when the resist is peeled off. As shown in Figure 42, the metal film 366c1 does not adhere to the vertical surface of the optical waveguide circuit 36c1 (the surface facing the x-axis) and the slanted part of the mirror that is in contact with the vertical surface (the part of the resin 60c1r).

[0086] Next, Figure 43 shows the case where the unnecessary portion of the metal film 366c1 is removed. As shown in Figure 43, the resist pattern 369c1 is formed only in the portion of the metal film 366c1 that remains, and the unnecessary portion of the metal film 366c1 is removed.

[0087] Next, Figure 44 shows the case where the resin is placed. After removing the resist pattern 369c1, as shown in Figure 44, a resin 366c1r with the same refractive index as the core of the optical waveguide circuit 36c1 is embedded and polished so that the surface is the same as the cladding layer.

[0088] Furthermore, to reduce costs, a large number of through-holes filled with resins having different refractive indices can be pre-formed in the top plate 38, and by selecting the through-holes to be used, the optical waveguide circuit can be formed, making it more versatile and easier to mass-produce. In addition, the refractive indices of the cores of the optical waveguide circuits 36c1 and 36c2, and the refractive indices of the resins filling the through-holes 601 and 602 (the refractive indices of resin 60c1r and resin 60c2r) can be made the same, but this disclosure is not limited to this case. It is also possible to have different refractive indices for resin 60c1r and resin 60c2r.

[0089] [Second variation of the second embodiment] (composition) Referring to Figure 45, the configuration of a second modified example of the second embodiment of the present invention will be described. Figure 45 is a cross-sectional view of an example of the package structure 1d. In the following description, components that are the same or equivalent as those in the above-described embodiments and modified examples will be denoted by the same reference numerals, and their descriptions will be simplified or omitted.

[0090] In the package structure 1d, the top plate 38 is formed of a light-transmitting material, and the optical waveguide circuit 36d is a third optical waveguide circuit formed near the surface of the top plate 38 opposite to the surface that contacts the frame 34, and an electrical wiring layer 62 is formed on the third optical waveguide circuit, which is electrically connected to the package substrate 10 by wire wiring 64 or a flexible substrate, and has a first opening (opening 62o1) that exposes the third optical waveguide circuit, and on the electrical wiring layer 62, Optical components 611 and 612 are mounted on which the optical components 611 and 612 are connected and which are exposed at the first opening of the electrical wiring layer 62. The top plate 38 has through holes 601 and 602 that penetrate both sides thereof. The through holes 601 and 602 are filled with resin having the same refractive index as the material forming the core of the third optical waveguide circuit. The optical components 611 (or 612) and the photoelectric conversion element 281 (or 282) are connected via the through holes 601 (or 602) and the third optical waveguide circuit. The package structure 1d of the second modification of the second embodiment differs from the first modification of the second embodiment in that the optical switch devices 611 and 612 are arranged on the optical waveguide circuit 36.

[0091] By mounting optical switch devices 611 and 612, which are optical components located on the upper part (plus z-axis side) of the top plate 38, to multiple semiconductor chips 501 and 502 in the chamber 52, efficient distribution of optical signals becomes possible.

[0092] Specifically, the optical switch device 611 can switch whether or not the optical signal incident from the optical cable 42 is incident on the photoelectric conversion element 282. Similarly, the optical switch device 612 can switch whether or not the optical signal incident from the optical cable 42 is incident on the photoelectric conversion element 281.

[0093] Generally, chiplets, which incorporate multiple semiconductor chips within a package, are effective in shortening development time and reducing costs. The number of semiconductor chips they can incorporate is increasing, and there is a growing demand for faster communication between semiconductor chips. This requires optical communication between the chips, and in order to efficiently utilize the optical waveguide circuit that forms the communication network, a switching device is needed to distribute the communication.

[0094] In the second modification of the second embodiment, an electrical wiring layer 62 is formed on top of the optical waveguide circuit 36d formed on the outside of the top plate 38, and an opening 62o1 is formed in the electrical wiring layer 62 which serves as the input / output section for optical signals, so that the optical signals of the optical waveguide circuit 36d can be connected to the optical switch devices 611 and 612. The electrical wiring layer 62 is arranged on the optical waveguide circuit 36d using, for example, solder. Furthermore, although the case of forming an opening 62o1 is described, the opening 62o1 does not necessarily have to be left as an empty space. By filling and curing a resin with the same refractive index as the core-forming member (core material 360) between the optical switch device, the opening 62o1, and the electrical wiring layer 62, connection loss of optical signals can be suppressed, and the electrical connection reliability of the optical switch device can also be improved.

[0095] The optical switch devices 611 and 612 are powered by wire wiring 64 from the package substrate 10 to the electrical wiring layer 62. Power can also be supplied by flexible substrates or other means in addition to wire wiring.

[0096] This structure keeps the optical waveguide circuit 36d simple and enables efficient communication between semiconductor chips 501 and 502 within the package. Furthermore, external optical communications can be directly routed to semiconductor chips 501 and 502 within the package by optical switch devices 611 and 612.

[0097] Furthermore, by placing components on the surface of the top plate 38 outside the chamber 52, it becomes necessary to form a mirror that transmits optical signals in the opposite direction to the mirror of the optical waveguide circuit 36d that transmits optical signals to the through holes 601 and 602. Therefore, the method for forming the mirror on the top plate 38 outside the chamber 52 is the same as for the mirrors of the optical waveguide circuits 36c1 and 36c2 inside the chamber 52 in the first modified example of the second embodiment.

[0098] Furthermore, the electrical wiring layer 62 has a second opening (opening 62o2) that, when placed on the third optical waveguide circuit (optical waveguide circuit 36d), exposes one or more of the following locations: the location where the frame 34 and the top plate 38 are bonded, the location where the photoelectric conversion elements 281 and 282 are placed, and the location where alignment marks are placed. When bonding the top plate 38 and the frame 34, alignment is performed while checking the positions of the photoelectric conversion elements 281 and 282, the optical waveguide circuit 36d, the through holes 601 and 602, and the frame 34 through the transparent top plate 38 and opening 62o2, so that the positions of the optical signal connection parts of the photoelectric conversion elements 281 and 282 and the through holes 601 and 602 coincide. After alignment, the photocuring adhesive of the frame 34 and the top plate 38 is fixed with ultraviolet light. While the description has described a case where the opening 62o2 of the electrical wiring layer 62 has a shape that exposes the location where the frame 34 and the top plate 38 are bonded and the location where the photoelectric conversion elements 281 and 282 are placed, this disclosure is not limited to this case. For example, if alignment marks for positioning are placed on the package substrate 10, the opening may expose one or more of the locations where the frame 34 and the top plate 38 are bonded, the location where the photoelectric conversion elements 281 and 282 are placed, and the location where the alignment marks are placed. Specifically, it is conceivable that the opening 62o2 exposes the location where the frame 34 and the top plate 38 are bonded and the location where the photoelectric conversion elements 281 and 282 are placed. Alternatively, if alignment marks are used, it is conceivable that the opening exposes the location where the alignment marks are placed. Alignment marks may or may not be placed. Also, there may be one alignment mark or two or more. The area where the frame 34 and the top plate 38 are glued together may be entirely exposed or partially exposed.

[0099] As a variation of the package structure 1d, it is also possible to arrange an optical waveguide circuit (a fourth optical waveguide circuit) inside the top plate 38 (inside the chamber 52). In this case, the top plate 38 further includes a fourth optical waveguide circuit formed near the surface of the top plate 38 that is in contact with the frame 34. The fourth optical waveguide circuit is connected to the third optical waveguide circuit (optical waveguide circuit 36d) via through holes 601 and 602, and the optical component 611 (or 612) and the photoelectric conversion element 281 (or 282) are connected via through holes 601 (or 602), the third optical waveguide circuit, and the fourth optical waveguide circuit.

[0100] [Third Embodiment] (composition) The configuration of a third embodiment of the present invention will be described with reference to Figures 46 and 47. Figure 46 is a cross-sectional view of an example of a package structure 1d. Package structure 1e differs from the first and second embodiments in that a chamber portion 80 is arranged on the package substrate 10, and a chamber 52 is formed between the chamber portion 80 and the package substrate 10. Cooling liquid flows into the chamber 52 from the inlet 80i of the chamber portion 80 and flows out from the outlet 80o of the chamber portion 80. In the following description, components that are the same or equivalent as those in the embodiments and modifications described above are denoted by the same reference numerals, and their descriptions are simplified or omitted. Note that the "chamber portion" has the function of both a top plate and a frame, so it can also be called a "top plate" and a "frame".

[0101] In the third embodiment, an optical waveguide circuit 36e is formed on the package substrate 10, and photoelectric conversion elements 281 and 282 are bonded together such that the optical signal output portion of the optical waveguide circuit 36e aligns with the optical input portions of the photoelectric conversion elements 281 and 282. The resin 46e used as the adhesive has a refractive index equivalent to that of the optical waveguide circuit 36e.

[0102] Memory chips 701 and 702 are positioned near the center of the package substrate 10, and a semiconductor chip 501, which serves as the processor, is positioned between the photoelectric conversion element 281 and the memory chip 701. A semiconductor chip 502 is also positioned between the photoelectric conversion element 282 and the memory chip 702. The optical waveguide circuit layer 36e is removed from the area where the memory chips 701 and 702 and the semiconductor chips 501 and 502 are positioned. The memory chips 701 and 702 and the semiconductor chips 501 and 502 are electrically connected to the package substrate 10 by solder bumps 71 for power supply. Furthermore, underfill 72 is filled between the package substrate 10, the memory chips 701 and 702, and the semiconductor chips 501 and 502.

[0103] By limiting the terminals on the substrate side (the side facing the package substrate 10) of the semiconductor chips 501 and 502 and the memory chips 701 and 702 to only power supply terminals, the voltage distribution of the power supply can be kept constant, enabling stable operation.

[0104] The optical signal passes through the optical waveguide circuit 36e and is transmitted to the semiconductor chips 501 and 502 via the photoelectric conversion element 281 (or 282). An example of the path of the optical waveguide circuit 36e is shown in Figure 47 as a top view of the package substrate 10. Figure 47 is a diagram showing an image of the top surface of the package structure 1e. The connector 40 receives the optical signal input from outside the package structure 1e. The optical signal passes through the optical waveguide circuit 36eL and is transmitted to the photoelectric conversion element 28L in the chamber 52. The photoelectric conversion element 28L in Figure 47 corresponds to the photoelectric conversion element 281 in Figure 46, and the optical waveguide circuit 36eL in Figure 47 corresponds to the optical waveguide circuit 36e in Figure 46.

[0105] Returning to the explanation of Figure 46, the semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 are arranged on the package substrate 10, and within the chamber 52, a bridge substrate 731 (or 734) is further provided to connect the semiconductor chips 501 (or 502) and the photoelectric conversion elements 281 and 282 from the side opposite to the side of the semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 that are in contact with the package substrate 10. In addition, the bridge substrate can connect multiple components (e.g., semiconductor chips) to each other, not just semiconductor chips and photoelectric conversion elements. Specifically, the photoelectric conversion elements 281 and 282 and the semiconductor chips 501 and 502, and the semiconductor chips 501 and 502 and the memory chips 701 and 702 exchange electrical signals through the bridge substrates 731 to 734, which are connected to electrical connection terminals located on the side opposite to the package substrate 10. For example, the power for semiconductor chips 501 and 502 and memory chips 701 and 702 is supplied from the package substrate 10, and the power for the photoelectric conversion element 281 (or 282) is supplied to semiconductor chip 501 (or 502) via bridge substrate 731 (or 734). Furthermore, semiconductor chip 501 (or 502) transmits and receives electrical signals through the memory chip 701 (or 702) and bridge substrate 731 (or 734). Electrical connections are made between components on bridge substrates 731-734 by solder bumps. Underfill 75 is filled between bridge substrates 731-734 and the components on them. Note that when connecting multiple semiconductor chips using bridge substrates, it is not limited to connecting all of the multiple semiconductor chips; a specific set of semiconductor chips may be connected. Also, when connecting two semiconductor chips, one bridge substrate may be used, or two or more bridge substrates may be used.

[0106] The chamber section 80 surrounding the chamber 52 for cooling the semiconductor chips 501 and 502, memory chips 701 and 702, and photoelectric conversion elements 281 and 282 is bonded to the package substrate 10. A temperature sensor 81 is also placed in the chamber section 80, and a stable temperature can be obtained by measuring the temperature of the chamber 52 and controlling the flow of the coolant. Also, as in the first embodiment shown in Figure 28, the outlet 80o of the coolant is larger than the inlet 80i to prevent the pressure inside the chamber 52 from rising too much. In addition, all connection terminals are covered with underfill.

[0107] (Alignment) The photoelectric conversion elements 281 and 282 and the optical waveguide circuit 36e are aligned using a photocurable resin 46e as an adhesive. The photoelectric conversion elements 281 and 282, coated with the resin 46e, are then aligned using a high-precision mounter. Subsequently, the photoelectric conversion elements 281 and 282 are mounted on the optical waveguide circuit 36e, and simultaneously irradiated with light to temporarily fix them in place. Finally, they are cured by heat. This method enables high-precision alignment.

[0108] (Other methods of alignment) Another method is shown in Figure 48, which illustrates a method for aligning the photoelectric conversion elements. Figure 48 shows a magnified view of the portion of the optical waveguide circuit 36e that includes the light-emitting portion 36eo. As a method of alignment, first, as shown in Figure 48, a metal film 76 with a difference in wettability between the cladding material of the optical waveguide circuit 36b and the resin 46e acting as an adhesive for the photoelectric conversion elements 281 and 282 is formed on the optical waveguide circuit 36e by metal sputtering, photolithography, and etching processes, according to the size and arrangement of the photoelectric conversion elements 281 and 282. The photoelectric conversion elements are placed on top of the metal film 76 with liquid resin 46e in between, and the surface tension of the resin 46e moves the photoelectric conversion elements to the correct position through a self-alignment effect, and they are fixed by thermal curing. Figure 49 shows a magnified view of the photoelectric conversion element 28 and the optical waveguide circuit 36e. When this method is used, a metal film 76 is placed between the photoelectric conversion element 28 and the optical waveguide circuit 36e.

[0109] In a specific implementation of this method, one example is to leave the aluminum film used for mirror formation as a metal film 76, sized to match the photoelectric conversion element 28. Subsequently, by creating a difference in wettability using CF4 / O2 plasma treatment and arranging the photoelectric conversion element 28 using resin 46e as a hydrophilically wettable adhesive, the photoelectric conversion element 28 can be positioned in the predetermined location by the self-alignment effect on the optical waveguide circuit 36e. In such a case, there is no need to use a high-precision mounter for positioning, and the resin 46e does not necessarily have to be a photocurable resin.

[0110] (Effect of bridge board) In addition to shortening the transmission distance of electrical signals, bridge boards 731-734 have a simpler structure and lower manufacturing costs compared to embedding electrical wiring in the package board 10, and they can improve the yield rate because they are connected after chip mounting. To address misalignment during the mounting of semiconductor chips 501 and 502, bridge boards are prepared to account for misalignment, and the yield rate can be improved by selecting the appropriate one.

[0111] Furthermore, the bridge substrates 731-734 are smaller than the semiconductor chips 501 and 502 or the photoelectric conversion elements 281 and 282, and sufficient cooling effect can be obtained without interfering with the cooling of the semiconductor chips 501 and 502 or the photoelectric conversion elements 281 and 282.

[0112] Conventionally, using a bridge substrate on the side opposite to the semiconductor chip's package substrate posed a risk of fracture due to thermal warping of the package substrate, leading to reduced reliability. In this embodiment, liquid cooling is used, and the temperature can be kept constant by the liquid flow, resulting in less thermal fluctuation and reducing the risk of fracture caused by the package substrate.

[0113] [Modified example of the third embodiment] A modified example of the third embodiment will be described with reference to Figure 50. When applying a bridge substrate like the third embodiment to a structure that uses a conventional cooling mechanism such as heat dissipation fins instead of a chamber structure, the risk of fracture can be reduced by making the CTE of the lid material placed between the semiconductor chips equivalent to the CTE of Si or glass used in the package substrate 10. Figure 50 is a cross-sectional view of an example of the package structure 1f. As shown in Figure 50, a recess can be made in the lid 90, and the lid 90 can be bonded to the semiconductor chips 501 and 502, etc., by using solder bumps or a paste 91 with good thermal conductivity. For example, ceramic can be used as the material for the lid 90.

[0114] The package substrate 10 and the semiconductor chip 501, the package substrate 10 and the memory chip 701, the package substrate 10 and the semiconductor chip 502, and the package substrate 10 and the memory chip 702 are connected by solder bumps 93. In addition, underfill 94 is filled between the package substrate 10 and the semiconductor chip 501, the package substrate 10 and the memory chip 701, the package substrate 10 and the semiconductor chip 502, and the package substrate 10 and the memory chip 702.

[0115] Furthermore, the connections between the bridge board 735 and the memory chip 701, between the bridge board 735 and the memory chip 701, between the bridge board 736 and the memory chip 702, and between the bridge board 736 and the memory chip 702 are made by solder bumps 95. Also, underfill 96 is filled between the bridge board 735 and the memory chip 701, between the bridge board 735 and the memory chip 701, between the bridge 736 and the memory chip 702, and between the bridge board 736 and the memory chip 702. In addition, the lid 90 and the heat sink fin 92 are bonded together by paste 97.

[0116] The lid 90 is formed from a material with a low CTE and high thermal conductivity, such as ceramic. The semiconductor chips 501 and 502 are fixed by the lid 90 between the heat dissipation fins 92 and the semiconductor chips 501 and 502, thereby suppressing the stress on the bridge substrates 735 and 736. In particular, silicon carbide (SiC), aluminum nitride (AlN), and silicon nitride (Si3N4) have a CTE similar to that of the semiconductor chips and also have high thermal conductivity, making them suitable materials for the lid 90.

[0117] Figure 50 shows a scenario where an organic package substrate 10 with a small CTE is used, but higher reliability can be obtained if a glass core substrate or ceramic substrate is used instead of the package substrate 10.

[0118] The bridge substrate and lid configuration shown in Figure 50 can be used to shorten the transmission distance of electrical signals in conventional packages and is also effective in improving the yield rate. Furthermore, when using a lid to cool the photoelectric conversion element, it is possible to add a mechanism to forcibly cool the lid.

[0119] [Fourth Embodiment] The configuration of a fourth embodiment of the present invention will be described with reference to Figure 51. Figure 51 is a cross-sectional view of an example of a package structure 1g. The package structure 1g includes an interposer 200 disposed on a package substrate 10, a chamber portion 80 is disposed on the interposer 200, semiconductor chips 501 and 502 and photoelectric conversion elements 281 and 282 are mounted on the interposer 200, and the interposer 200 is made of silicon or glass. In the following description, components that are the same or equivalent as those in the embodiments and modifications described above will be denoted by the same reference numerals, and their descriptions will be simplified or omitted.

[0120] In the fourth embodiment, an interposer 200 with an optical waveguide circuit 36b is mounted on a package substrate 10. Wiring layers are formed on both sides of the interposer 200, and electrical connection terminals (electrical terminals, connection terminals) are formed on the wiring layer 202 on the package substrate 10 side. The electrical connection terminals of the wiring layer 202 are electrically connected to the package substrate 10 through solder bumps 204. In addition, a TGV (Through Glass Via) 203 is formed on the interposer 200, and the wiring layer 202 on the package substrate 10 side and the wiring layer 201 on the opposite side are electrically connected through an electrically conductive layer formed in the TGV 203. Electrical connection terminals are also formed on the wiring layer 201, and the electrical connection terminals of the wiring layer 201 are electrically connected to semiconductor chips 501 and 502 through solder bumps 71.

[0121] Furthermore, underfill 205 is filled between the interposer 200 and the package substrate 10. A capacitor 206 is also positioned on the package substrate 10 side of the interposer 200. The interposer 200 is made of silicon or glass.

[0122] The optical waveguide circuit 36g is formed on the wiring layer 201 of the interposer 200. Photoelectric conversion elements 281 and 282 are bonded to the optical waveguide circuit 36g, and are positioned so that the optical signal output portion 36g of the optical waveguide circuit 36g aligns with the optical input portions of the photoelectric conversion elements 281 and 282. The resin 46g used as the adhesive has a refractive index equivalent to that of the optical waveguide circuit 36g.

[0123] The arrangement of the photoelectric conversion elements 281 and 282, semiconductor chips 501 and 502, and memory chips 701 and 702 is the same as in the third embodiment. The memory chips 701 and 702 and semiconductor chips 501 and 502 are located in the center of the package substrate 10 (or interposer 200). In the region where the memory chips 701 and 702 and semiconductor chips 501 and 502 are located, the optical waveguide circuit 36g is removed (an opening is formed), and the memory chips 701 and 702 and semiconductor chips 501 and 502 are electrically connected to the interposer 200.

[0124] In this embodiment, the photoelectric conversion element 281 and the semiconductor chip 501 are connected by a bridge substrate 731, and the semiconductor chip 501 and the memory chip 701 are connected by a wiring layer 201 of the interposer 200. Similarly, the photoelectric conversion element 282 and the semiconductor chip 502 are connected by a bridge substrate 734, and the semiconductor chip 502 and the memory chip 702 are connected by a wiring layer 201 of the interposer 200.

[0125] The interposer 200 is capable of forming finer wiring than the package substrate 10, and can support multi-channel communication such as HBM (High Bandwidth Memory) standardized by JEDEC.

[0126] (Alignment) The alignment method will be explained with reference to Figures 52 to 54. Figure 52 is a diagram showing the location where the photoelectric conversion element 282 is placed in the optical waveguide circuit 36b. Figure 53 is a diagram showing a cross-section aa' of Figure 52 when the photoelectric conversion element 282 is placed in the optical waveguide circuit 36g. Figure 54 is a diagram showing a cross-section bb' of Figure 52 when the photoelectric conversion element 282 is placed in the optical waveguide circuit 36g. In Figure 52, the optical waveguide circuit 36g is shown to be placed on the wiring layer 201 of the interposer 200. Here, region R1 indicates the location where the photoelectric conversion element 282 is placed. Region R2 indicates the location in the optical waveguide circuit 36g where the interposer 200 is exposed. The light-emitting section 36go of the optical waveguide circuit 36g emits an optical signal toward the photoelectric conversion element 282. As shown in Figure 53, the light-emitting portion 36go is located in a position corresponding to the light-receiving portion of the photoelectric conversion element 282. Also, as shown in Figure 54, in the region R1, resin 46g is filled as an adhesive in the z-axis direction.

[0127] The alignment of the photoelectric conversion elements 281 and 282 with the optical waveguide circuit 36g is the same as in the third embodiment. However, as shown in Figure 52, for example, by partially exposing glass (when the interposer 200 is made of glass) in a region R1 of the same size as the photoelectric conversion element 282, a difference in wettability can be created, thereby causing a self-alignment effect.

[0128] The chamber section 80 for cooling the semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 is bonded to the interposer 200. By measuring the temperature of the chamber 52 with a temperature sensor 81 and controlling the liquid flow, it is possible to set a stable temperature inside the chamber 52. In addition, by making the outlet 80o of the coolant larger than the inlet 80i, it is possible to prevent the pressure inside the chamber 52 from rising too much. Furthermore, the photoelectric conversion elements 281 and 282, the semiconductor chips 501 and 502, the bridge substrates 731 and 734, and the wiring layer 101 all have connection terminals (electrical connection terminals), and all of these connection terminals are covered with underfill.

[0129] [Fifth Embodiment] The configuration of the fifth embodiment of the present invention will be described with reference to Figure 55. Figure 55 is a cross-sectional view of an example of a package structure 1h. In the following description, components that are the same or equivalent as those in the above-described embodiments and modified examples are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0130] In the package structure 1g of the fourth embodiment shown in Figure 51, the photoelectric conversion element and the semiconductor chip are connected by a bridge substrate, whereas the package structure 1h of the fifth embodiment differs in that the electrical signal is transmitted in the wiring layer 201h of the interposer 200.

[0131] Figure 56 shows the location where the photoelectric conversion element 282 is placed in the optical waveguide circuit 36h. Figure 57 shows the cc' cross-section of Figure 56 when the photoelectric conversion element 282 is placed in the optical waveguide circuit 36h.

[0132] As shown in Figure 56, an electrode 2010 is formed in the wiring layer 201h. The optical waveguide circuit 36h has a shape that does not interfere with the location where the electrode 2010 is formed.

[0133] As shown in Figure 57, electrode 2010 is connected to electrode 280, which is the electrical signal terminal of photoelectric conversion element 282, through solder bump 2011. The light-emitting portion 36ho of the optical waveguide circuit 36h is positioned to correspond to the input portion 282i of the photoelectric conversion element 282. The resin 46h filled between the photoelectric conversion element 282 and the wiring layer 201h (interposer 200) has the same refractive index as the core material (core) 360h of the optical waveguide circuit 36h.

[0134] Since the interposer 200 is capable of forming fine wiring, the photoelectric conversion element 281 and the semiconductor chip 501 (or the photoelectric conversion element 282 and the semiconductor chip 502) can be placed close together, which shortens the transmission distance of the transmitted signal and also reduces the signal frequency by increasing the number of channels.

[0135] Furthermore, in this embodiment, the input section 282i of the photoelectric conversion element 282 and the electrode 280, which serves as an electrical signal terminal, are arranged on the same plane (a plane parallel to the xy plane).

[0136] As in previous embodiments, when the electrode 280 as an electrical signal terminal and the optical signal input section 282i are arranged on different surfaces, it is possible to modify the design to increase the number of optical channels by creating an array (array of optical waveguides), but depending on the number of optical communication channels and the available space for the photoelectric conversion elements, selecting the case shown in Figures 55 to 57 may offer advantages in terms of manufacturing costs. Furthermore, the cooling effect of this embodiment is higher than that of the modified cases.

[0137] [Sixth Embodiment] The configuration of the sixth embodiment of the present invention will be described with reference to Figure 58. Figure 58 is a cross-sectional view of an example of a package structure 1i. In the package structure 1i, the top plate 38 is made of glass, and the package substrate is a glass core substrate 300. In the following description, components that are the same or equivalent as those in the above-described embodiments and modifications will be denoted by the same reference numerals, and their descriptions will be simplified or omitted.

[0138] The package structure 1i of the sixth embodiment transmits optical signals to the photoelectric conversion elements 281 and 282 through a top plate 38 on which an optical waveguide circuit 36 ​​is formed, as shown in the first embodiment (package structure 1 in Figure 1, package structure 1a in Figure 3) and the second embodiment (package structure 1b in Figure 29, package structure 1c in Figure 36, package structure 1d in Figure 45). Furthermore, regarding the connection between the photoelectric conversion elements and the semiconductor chip, the package structure uses a bridge substrate as shown in the third embodiment (package structure 1e in Figure 46, package structure 1f in Figure 50), the fourth embodiment (package structure 1g in Figure 51), and the fifth embodiment (package structure 1h in Figure 55) to connect electrical signals.

[0139] Specifically, semiconductor chip 501 and memory chip 561 are connected via bridge substrate 737, and semiconductor chip 502 and memory chip 562 are connected via bridge substrate 738. Bridge substrates 737 and 738 are placed inside chamber 52. In package structure 1i, a glass core substrate 300 is used. In the glass core substrate 300, wiring layers 300a and 300c are formed on the glass core 300b, and the wiring layers 300a and 300c are electrically connected via through-electrodes 300d.

[0140] In the first embodiment (package structure 1 in Figure 1, package structure 1a in Figure 3), semiconductor chips and memory chips are mounted on a Si or glass interposer 12, and since the effects of thermal fluctuations are suppressed, it is possible to use a bridge substrate. However, in order to obtain higher reliability, in the sixth embodiment, the package substrate is a glass core substrate 300 to further suppress the effects of thermal fluctuations, and a chamber 52 is formed on the glass core substrate 300. The glass core substrate 300, semiconductor chips 501 and 502, memory chips 561 and 562, and the top plate 38 formed of glass have equivalent CTEs, making them less susceptible to thermal distortion and providing high rigidity, thus enabling high reliability.

[0141] Furthermore, since the semiconductor chip 501 and the memory chip 561 are connected by a bridge substrate 737 (and the semiconductor chip 502 and the memory chip 562 are connected by a bridge substrate 738), an interposer is not required, and there is an advantage in that the glass core substrate 300, which is the package substrate, does not need to have fine wiring formed on it. It is also possible to use a ceramic substrate in which ceramic is applied to the glass core 300b instead of the glass core substrate 300.

[0142] [Effects / Effects] This disclosure describes a method for introducing optical communication into a package structure, in which a cooling chamber is constructed from a frame and a top plate, an optical waveguide circuit and a connector for an external optical cable are placed on the top plate, an optical signal is connected from an optical fiber to the optical waveguide circuit, and an optical connection is made from the optical waveguide circuit on the top plate to a photoelectric conversion element inside the chamber (First Embodiment (Package Structure 1 in Figure 1, Package Structure 1a in Figure 3), Second Embodiment (Package Structure 1b in Figure 29, Package Structure 1c in Figure 35, Package Structure 1d in Figure 45), Sixth Embodiment (Package Structure 1i in Figure 58)).

[0143] In this structure, by using a glass substrate for the package substrate or interposer, and also using a glass substrate for the top plate, the effects of thermal expansion can be suppressed, improving the placement accuracy of semiconductor chips, photoelectric conversion elements (circuits), and optical waveguide circuits, and resolving issues with optical axis alignment accuracy.

[0144] Furthermore, by 3D mounting semiconductor chips such as processors and photoelectric conversion elements as a Chip-on-Chip, it is possible to shorten the transmission distance of electrical signals.

[0145] Since the photoelectric conversion element is smaller than the semiconductor chip of the processor, even if the photoelectric conversion element is placed together with the semiconductor chip in the chamber, the surface of the semiconductor chip can be in direct contact with the cooling liquid. This ensures sufficient cooling efficiency even when the connection terminals of the photoelectric conversion element and the semiconductor chip are covered with underfill.

[0146] Another method involves connecting a wiring board with an optical waveguide circuit formed on a package substrate, arranging a photoelectric conversion element to align with the optical input / output portion of the optical waveguide circuit, and mounting a semiconductor chip adjacent to the photoelectric conversion element (Third embodiment (Package structure 1e in Figure 46), Fourth embodiment (Package structure 1g in Figure 51), Fifth embodiment (Package structure 1h in Figure 55)).

[0147] In this method, the accuracy of optical axis alignment can be improved by mounting the photoelectric conversion elements to the optical waveguide circuit while individually aligning them directly. Furthermore, while some recent mounting equipment has the capability to mount with an alignment accuracy of a few microns, it is also possible to apply a method of high-precision optical axis alignment using self-alignment. One method of self-alignment involves forming an optical waveguide circuit on a glass substrate, partially exposing the glass in the area where the photoelectric conversion elements are mounted, and allowing the surface tension of the adhesive resin to exert a self-alignment effect, which is then cured.

[0148] Furthermore, shortening the transmission distance of electrical signals can be achieved by employing a bridge substrate, which connects adjacent semiconductor chips and photoelectric conversion elements to the connection terminals on the opposite side of the package substrate from the semiconductor chip and photoelectric conversion element, spanning across both chips and photoelectric conversion elements. In addition, by stabilizing the package temperature through liquid cooling, high reliability can be ensured even when the bridge substrate connection is on the opposite side of the semiconductor chip's package substrate.

[0149] As described above, this disclosure enables shortening of the transmission distance of electrical signals, thereby realizing high-speed communication and high integration or high-speed semiconductor chips. Furthermore, by combining liquid flow cooling and the arrangement structure of the optical waveguide circuit, heat-sensitive photoelectric conversion elements can be placed near the semiconductor chip. In addition, the transmission distance of the electrical signal after photoelectric conversion can be shortened, enabling efficient high-frequency signal communication.

[0150] In particular, the structure in which the optical waveguide circuit is placed on the top plate of the liquid cooling chamber allows for signal exchange from the top, opposite the package substrate, and can accommodate a variety of semiconductor chip arrangements and stacked structures. It also reduces the constraints on the optical waveguide circuit, enabling more efficient design. Furthermore, in structures that employ a bridge structure for connecting the semiconductor chip and the photoelectric conversion element on the opposite side of the package substrate, the yield rate can be improved because the connection is made after mounting the semiconductor chip and other components onto the package substrate.

[0151] Although embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above, and various modifications are possible without departing from the spirit of the invention.

[0152] The following describes, but is not limited to, embodiments that may constitute the present invention. (Aspect 1) A chamber including the package substrate, frame, and top plate is placed on the package substrate. The frame is provided with a coolant inlet and / or outlet, A semiconductor chip and a photoelectric conversion element are arranged inside the chamber. The package structure is characterized in that the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate. (Aspect 2) The optical waveguide circuit is a first optical waveguide circuit formed near the surface of the top plate that is in contact with the frame, The package structure according to embodiment 1, characterized in that the top plate is formed of a light-transmitting material. (Aspect 3) The optical waveguide circuit is a second optical waveguide circuit formed near the surface of the top plate opposite to the surface that contacts the frame, The aforementioned top plate is made of a translucent material and has through holes that penetrate both sides thereof. The through-hole is filled with a resin having the same refractive index as the material forming the core of the second optical waveguide circuit. The package structure according to embodiment 1 or embodiment 2, characterized in that the photoelectric conversion element is connected to the second optical waveguide circuit through the through hole. (Aspect 4) The top plate includes, as the optical waveguide circuit, a first optical waveguide circuit formed near the surface of the top plate that is in contact with the frame, and a second optical waveguide circuit formed near the surface of the top plate opposite to the surface that is in contact with the frame. The aforementioned top plate is made of a translucent material and has through holes that penetrate both sides thereof. The through-hole is filled with a resin having the same refractive index as the member forming the core of the first optical waveguide circuit and the member forming the core of the second optical waveguide circuit. The photoelectric conversion element is connected to the first optical waveguide circuit, The package structure according to any one of embodiments 1 to 3, characterized in that the first optical waveguide circuit is connected to the second optical waveguide circuit via the through hole. (Aspect 5) The package structure according to any one of embodiments 1 to 4, characterized in that the adhesive used to bond the frame and the top plate is a photosensitive curing resin. (Aspect 6) The package structure according to any one of embodiments 1 to 5, characterized in that the connection portion between the first optical waveguide circuit and the photoelectric conversion element is formed of a resin having the same refractive index as the member forming the core of the first optical waveguide circuit. (Aspect 7) The aforementioned top plate is made of a translucent material, The optical waveguide circuit is a third optical waveguide circuit formed near the surface of the top plate opposite to the surface that contacts the frame, An electrical wiring layer is formed on the third optical waveguide circuit, which is electrically connected to the package substrate by wire wiring or a flexible substrate, and has a first opening that exposes the third optical waveguide circuit. An optical component is mounted on the electrical wiring layer, which is electrically connected to the electrical wiring layer and connected to the third optical waveguide circuit exposed at the first opening of the electrical wiring layer. The aforementioned top plate has through holes formed on both sides, The through-hole is filled with a resin having the same refractive index as the material forming the core of the third optical waveguide circuit. The package structure according to any one of embodiments 1 to 6, characterized in that the optical component and the photoelectric conversion element are connected via the through hole and the third optical waveguide circuit. (Pattern 8) The package structure according to any one of embodiments 1 to 7, characterized in that the optical component is an optical switch device. (Aspect 9) The top plate further includes a fourth optical waveguide circuit formed near the surface of the top plate that is in contact with the frame, The fourth optical waveguide circuit is connected to the third optical waveguide circuit via the through-hole, The package structure according to any one of embodiments 1 to 8, characterized in that the optical component and the photoelectric conversion element are connected via the through hole, the third optical waveguide circuit, and the fourth optical waveguide circuit. (Aspect 10) The package structure according to any one of embodiments 1 to 9, characterized in that the electrical wiring layer has a second opening that, when placed on the third optical waveguide circuit, exposes one or more of the following locations: the location where the frame and the top plate are bonded, the location where the photoelectric conversion element is placed, and the location where the alignment mark is placed. (Aspect 11) The package structure includes an interposer disposed on the package substrate, The semiconductor chip and the photoelectric conversion element are mounted on the interposer. The aforementioned top plate is made of glass, The package structure according to any one of embodiments 1 to 10, characterized in that the interposer is formed of silicon or glass. (Aspect 12) The aforementioned tabletop is made of glass, The package structure according to any one of embodiments 1 to 10, characterized in that the package substrate is a glass core substrate. (Aspect 13) The semiconductor chip and the photoelectric conversion element are arranged on the package substrate. The package structure according to any one of embodiments 1 to 12, further comprising a bridge substrate connecting the semiconductor chip and the photoelectric conversion element from the side opposite to the side of the semiconductor chip and the photoelectric conversion element that contacts the package substrate, within the chamber. (Aspect 14) The semiconductor chip is a plurality of semiconductor chips arranged on the package substrate, The package structure according to any one of embodiments 1 to 13, further comprising a bridge substrate that connects the plurality of semiconductor chips to each other, from the side of the plurality of semiconductor chips opposite to the side of the plurality of semiconductor chips that is in contact with the package substrate, within the chamber. (Aspect 15) A circulation system for introducing a coolant into a package structure according to any one of embodiments 1 to 14, A pump connected to the outlet, which discharges the coolant from the chamber and generates a liquid flow toward the inlet, The system includes a controller that monitors the temperature of the chamber and controls the flow velocity of the liquid flow and the temperature of the coolant according to the monitored temperature, A circulation system characterized in that the outlet has a larger cross-sectional area with respect to the liquid flow than the inlet. (Aspect 16) A chamber including the package substrate, frame, and top plate is placed on the package substrate. The frame is provided with a coolant inlet and / or outlet, A semiconductor chip and a photoelectric conversion element are arranged inside the chamber. The photoelectric fusion device is characterized in that the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate.

[0153] Furthermore, this disclosure also includes the following first aspect: [First embodiment (optical waveguide on substrate)] (Aspect 1A) A package structure characterized by having an optical waveguide circuit formed on a package substrate, a cooling chamber equipped with a cooling liquid inlet and outlet installed thereon, and containing a semiconductor chip and a photoelectric conversion element. (Aspect 2A) The package structure according to embodiment 1A, characterized in that the photoelectric conversion element has an optical connection portion on one side and an electrical connection terminal on the opposite side, is attached so as to connect optically to the optical waveguide with the optical connection portion facing the package substrate, and is adjacent to the semiconductor chip, the semiconductor chip has an electrical connection terminal on the opposite side of the package substrate while being electrically connected to the electrical terminal of the package substrate, and adjacent photoelectric conversion elements and semiconductor chips are connected by a bridge substrate at the electrical terminals on the side opposite to the package substrate. (Aspect 3A) A cooling method according to embodiment 1A or embodiment 2A, characterized by monitoring the temperature of the chamber or the liquid inside the chamber and controlling the flow rate and temperature of the supplied coolant so that the internal temperature remains stable. (Aspect 4A) The package structure according to any one of embodiments 1A to 3A, characterized in that the adhesive used to bond the photoelectric conversion element to the package substrate has a refractive index equivalent to that of the optical waveguide core after curing. (Appendix 5A) The package structure according to any one of embodiments 1A to 4A, characterized in that a metal film is formed on the surface of the package substrate to which the photoelectric conversion element is attached, in an area of ​​the same size as the photoelectric conversion element, excluding the optical connection portion, and a hardened adhesive is sandwiched between the metal film and the photoelectric conversion element. (Aspect 6A) A package structure according to any one of embodiments 1A to 5A, characterized in that multiple semiconductor chips electrically connected to the same substrate are electrically connected on the opposite side of the substrate by a bridge substrate.

[0154] Furthermore, this disclosure also includes the following second aspect: [Second embodiment (optical waveguide on substrate)] (Aspect 1B) A package structure characterized by having an optical waveguide circuit formed on a glass-core package substrate, a cooling chamber equipped with a cooling liquid inlet and outlet installed on top of it, and containing a semiconductor chip and a photoelectric conversion element. (Aspect 2B) The package structure according to Embodiment 1B, characterized in that the photoelectric conversion element has an optical connection portion on one side and electrical connection terminals on the opposite side, is attached so as to connect optically to the optical waveguide with the optical connection portion facing the package substrate, and is adjacent to the semiconductor chip, the semiconductor chip has an electrical connection terminal on the opposite side of the package substrate while being electrically connected to the electrical terminals of the package substrate, and adjacent photoelectric conversion elements and semiconductor chips are connected by a bridge substrate at the electrical terminals on the side opposite to the package substrate. (Aspect 3B) A cooling method according to embodiment 1B or embodiment 2B, characterized by monitoring the temperature of the chamber or the liquid inside the chamber and controlling the flow rate and temperature of the supplied coolant so that the internal temperature is stable. (Aspect 4B) The package structure according to any one of embodiments 1B to 3B, characterized in that the adhesive used to bond the photoelectric conversion element to the package substrate has a refractive index equivalent to that of the optical waveguide core after curing. (Appearance 5B) The package structure according to any one of embodiments 1B to 4B, characterized in that a metal film is formed on the surface of the package substrate to which the photoelectric conversion element is attached, in an area of ​​the same size as the photoelectric conversion element, excluding the optical connection portion, and a hardened adhesive is sandwiched between the metal film and the photoelectric conversion element. (Aspect 6B) A package structure according to any one of embodiments 1B to 5B, characterized in that multiple semiconductor chips electrically connected to the same substrate are electrically connected on the opposite side of the substrate by a bridge substrate.

[0155] Furthermore, this disclosure also includes the following third aspect: [Third aspect] (Aspect 1C) A chamber with a coolant inlet and outlet is installed on the package substrate or interposer. The aforementioned chamber contains a semiconductor chip and a photoelectric conversion element. A package structure characterized in that the optical signal connected to the photoelectric conversion element is connected through an optical waveguide circuit formed on the package substrate or interposer. (Aspect 2C) The package structure according to embodiment 1C, characterized in that the photoelectric conversion element has an optical connection portion on one side and an electrical connection terminal on the opposite side, is installed so as to optically connect with the optical waveguide with the optical connection portion facing the package substrate side and adjacent to the semiconductor chip, the semiconductor chip has an electrical connection terminal on the opposite side of the package substrate while being electrically connected to the electrical terminal of the package substrate or interposer, and adjacent photoelectric conversion elements and semiconductor chips are connected by a bridge substrate at the electrical terminals on the side opposite to the package substrate. (Aspect 3C) The package structure according to embodiment 1C or embodiment 2C, characterized in that there is no optical waveguide circuit layer on the surface of the package substrate or interposer that overlaps with the semiconductor chip. (Aspect 4C) A metal film equivalent to that of the photoelectric conversion element is formed on the surface of the optical waveguide layer where the photoelectric conversion element is installed. The package structure according to any one of embodiments 1C to 3C, characterized in that a photoelectric conversion element is installed on the metal film, with a transparent resin having the same refractive index as the core of the optical waveguide sandwiched in between. (Aspect 5C) The package substrate or interposer core on which the photoelectric conversion element is installed is made of glass material. A portion of the optical waveguide layer and electrical wiring layer at the location where the photoelectric conversion element is installed is uniformly removed relative to the placement of the photoelectric conversion element, exposing the glass surface. The package structure according to any one of embodiments 1C to 4C, characterized in that a photoelectric conversion element is installed on top of the transparent resin having the same refractive index as the core of the optical waveguide. (Aspect 6C) A package structure characterized by containing multiple semiconductor chips within a chamber equipped with a cooling liquid inlet and outlet, which is installed on a package substrate or an interposer, wherein each semiconductor chip is arranged adjacent to another and electrically connected to the electrical terminals of the package substrate or interposer, each semiconductor chip also has electrical connection terminals on the opposite side of the package substrate, and the adjacent semiconductor chips are electrically connected to each other by a bridge substrate that connects to the electrical terminals on the opposite side of the package substrate. [Explanation of symbols]

[0156] 1, 1a~1i...Package structure, 10…Package substrate, 12,200... Interposer, 16, 26, 28, 28a, 28b, 28c, 281, 282, 28L... Photoelectric conversion elements, 34...frame body, 36, 36a, 36b, 36c, 36c1, 36c2, 36d, 36e, 36g, 36h, 36eL, 361, 362...Optical waveguide circuit, 38... Tabletop, 50, 501, 502… Semiconductor chips, 52... Chamber, 300... Glass core substrate, 611, 612… Optical components, 731-738...Bridge board, 80... Chamber section

Claims

1. A chamber including the package substrate, frame, and top plate is placed on the package substrate. The frame is provided with a coolant inlet and / or outlet, A semiconductor chip and a photoelectric conversion element are arranged inside the chamber. The package structure is characterized in that the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate.

2. The optical waveguide circuit is a first optical waveguide circuit formed near the surface of the top plate that is in contact with the frame, The package structure according to claim 1, characterized in that the top plate is formed of a light-transmitting material.

3. The optical waveguide circuit is a second optical waveguide circuit formed near the surface of the top plate opposite to the surface that contacts the frame, The aforementioned top plate is made of a translucent material and has through holes that penetrate both sides thereof. The through-hole is filled with a resin having the same refractive index as the material forming the core of the second optical waveguide circuit. The package structure according to claim 1, characterized in that the photoelectric conversion element is connected to the second optical waveguide circuit via the through-hole.

4. The top plate includes, as the optical waveguide circuit, a first optical waveguide circuit formed near the surface of the top plate that is in contact with the frame, and a second optical waveguide circuit formed near the surface of the top plate opposite to the surface that is in contact with the frame. The aforementioned top plate is made of a translucent material and has through holes that penetrate both sides thereof. The through-hole is filled with a resin having the same refractive index as the member forming the core of the first optical waveguide circuit and the member forming the core of the second optical waveguide circuit. The photoelectric conversion element is connected to the first optical waveguide circuit, The package structure according to claim 1, characterized in that the first optical waveguide circuit is connected to the second optical waveguide circuit via the through hole.

5. The package structure according to claim 2, characterized in that the adhesive used to bond the frame and the top plate is a photosensitive curing resin.

6. The package structure according to claim 2, characterized in that the connection portion between the first optical waveguide circuit and the photoelectric conversion element is formed of a resin having the same refractive index as the member forming the core of the first optical waveguide circuit.

7. The aforementioned top plate is made of a translucent material, The optical waveguide circuit is a third optical waveguide circuit formed near the surface of the top plate opposite to the surface that contacts the frame, An electrical wiring layer is formed on the third optical waveguide circuit, which is electrically connected to the package substrate by wire wiring or a flexible substrate, and has a first opening that exposes the third optical waveguide circuit. An optical component is mounted on the electrical wiring layer, which is electrically connected to the electrical wiring layer and connected to the third optical waveguide circuit exposed at the first opening of the electrical wiring layer. The aforementioned top plate has through holes formed on both sides, The through-hole is filled with a resin having the same refractive index as the material forming the core of the third optical waveguide circuit. The package structure according to claim 1, characterized in that the optical component and the photoelectric conversion element are connected via the through-hole and the third optical waveguide circuit.

8. The package structure according to claim 7, characterized in that the optical component is an optical switch device.

9. The top plate further includes a fourth optical waveguide circuit formed near the surface of the top plate that is in contact with the frame, The fourth optical waveguide circuit is connected to the third optical waveguide circuit via the through-hole, The package structure according to claim 7, characterized in that the optical component and the photoelectric conversion element are connected via the through hole, the third optical waveguide circuit, and the fourth optical waveguide circuit.

10. The package structure according to claim 7, characterized in that the electrical wiring layer has a second opening that, when placed on the third optical waveguide circuit, exposes one or more of the following locations: the location where the frame and the top plate are bonded, the location where the photoelectric conversion element is placed, and the location where the alignment mark is placed.

11. The package structure includes an interposer disposed on the package substrate, The semiconductor chip and the photoelectric conversion element are mounted on the interposer. The aforementioned top plate is made of glass, The package structure according to claim 1, characterized in that the interposer is formed of silicon or glass.

12. The aforementioned tabletop is made of glass, The package structure according to claim 1, characterized in that the package substrate is a glass core substrate.

13. The semiconductor chip and the photoelectric conversion element are arranged on the package substrate. The package structure according to claim 1, further comprising a bridge substrate connecting the semiconductor chip and the photoelectric conversion element from the side opposite to the side of the semiconductor chip and the photoelectric conversion element that contacts the package substrate, within the chamber.

14. The semiconductor chip is a plurality of semiconductor chips arranged on the package substrate, The package structure according to claim 1, further comprising a bridge substrate that connects the plurality of semiconductor chips to each other from the side of the plurality of semiconductor chips opposite to the side of the plurality of semiconductor chips that is in contact with the package substrate, within the chamber.

15. A circulation system for introducing a coolant into the package structure described in claim 1, A pump connected to the outlet, which discharges the coolant from the chamber and generates a liquid flow toward the inlet, The system includes a controller that monitors the temperature of the chamber and controls the flow velocity of the liquid flow and the temperature of the coolant according to the monitored temperature, A circulation system characterized in that the outlet has a larger cross-sectional area with respect to the liquid flow than the inlet.

16. A chamber including the package substrate, frame, and top plate is placed on the package substrate. The frame is provided with a coolant inlet and / or outlet, A semiconductor chip and a photoelectric conversion element are arranged inside the chamber. The photoelectric fusion device is characterized in that the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate.

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