Electronic circuit

Abstract

This invention provides an electronic circuit that can reduce the dependence of output current limiting on input voltage. [Solution] The electronic circuit of this embodiment includes a first transistor connected between an input voltage line to which an input voltage is supplied and an output terminal, and a current limiting circuit that limits the output current of the first transistor to a limiting current or less by limiting the variable range of the drive voltage of the first transistor to a predetermined range, wherein the limiting current is determined by a reference current that is dependent on the input voltage.

Description

[Technical Field]

[0001] This embodiment relates to an electronic circuit. [Background technology]

[0002] A linear regulator steps down the input voltage and outputs a predetermined constant voltage by controlling the on-resistance of an output transistor located between the input voltage line and the output terminal. A typical linear regulator includes a current limiting circuit that limits the output current of the output transistor to a predetermined value or less. The current limiting circuit controls the output current of the output transistor to a predetermined value or less by limiting the variable range of the drive voltage of the output transistor to a predetermined range.

[0003] A voltage equivalent to the difference between the input voltage and the output voltage is applied across the drain-source of the output transistor. However, while the output voltage is fixed at a constant value, the input voltage can take any value greater than or equal to the output voltage. Therefore, the voltage across the drain-source of the output transistor changes depending on the input voltage, and the output current changes accordingly. As a result, the output current limiting function of a linear regulator is dependent on the input voltage. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2014-26457 [Overview of the project] [Problems that the invention aims to solve]

[0005] The objective of this embodiment is to provide a linear regulator (electronic circuit) that can reduce the dependence of output current limiting on the input voltage. [Means for solving the problem]

[0006] The electronic circuit according to this embodiment includes a first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, and a current limiting circuit that limits the output current of the first transistor to a limiting current by limiting the variable range of the drive voltage of the first transistor to a predetermined range, wherein the limiting current is determined by a reference current that is dependent on the input voltage.

[0007] The electronic circuit according to this embodiment includes a first transistor connected between an input voltage line to which an input voltage is provided and an output terminal; a current limiting circuit that limits the output current of the first transistor to a limiting current corresponding to a reference current by limiting the variable range of the drive voltage of the first transistor to a predetermined range; a second transistor connected between the input voltage line and a first node; a constant current circuit that keeps the sum of the reference current and the output current of the second transistor constant; and a first voltage fixing circuit that fixes the voltage of the first node to a predetermined first set voltage.

[0008] The electronic circuit according to this embodiment includes a first transistor connected between an input voltage line to which an input voltage is provided and an output terminal; a current limiting circuit that limits the output current of the first transistor to a limiting current corresponding to a reference current by limiting the variable range of the drive voltage of the first transistor to a predetermined range; a second transistor connected between the input voltage line and a first node; a constant current circuit that keeps the sum of the reference current and the output current of the second transistor constant; and a second voltage fixing circuit that fixes the voltage between the drain and source of the second transistor to a predetermined second set voltage. [Brief explanation of the drawing]

[0009] [Figure 1] This figure shows the configuration of a linear regulator according to Embodiment 1. [Figure 2] This diagram shows the characteristics of each current Ip, Is, and In. [Figure 3] This is a diagram showing the characteristics of the second reference current Is. [Figure 4]It is a diagram showing the voltage-current characteristics between the drain and source of a diode-connected transistor. [Figure 5] It is a diagram showing the voltage-current characteristics between the drain and source of an output transistor. [Figure 6] It is a diagram showing the most preferable state of the dependence characteristics of the current Ip and the output current Io on the power supply voltage. [Figure 7] It is a diagram showing the configuration of the linear regulator according to Embodiment 2. [Figure 8] It is a diagram showing the configuration of the linear regulator according to Embodiment 3. [Figure 9] It is a diagram showing the configuration of the linear regulator according to Embodiment 4. [Figure 10] It is a diagram showing the configuration of the linear regulator according to Embodiment 5. [Figure 11] It is a diagram showing the configuration of the linear regulator according to Embodiment 6. [Figure 12] It is a diagram showing the configuration of the linear regulator according to the comparative example. [Figure 13] It is a diagram showing the voltage-current characteristics between the drain and source of a diode-connected transistor. [Figure 14] It is a diagram showing the voltage-current characteristics between the drain and source of an output transistor.

Embodiments of the Invention

[0010] Hereinafter, this embodiment will be described with reference to the drawings. In the drawings, the same or corresponding elements are denoted by the same reference numerals, and detailed descriptions thereof are omitted as appropriate.

[0011] (Comparative Example) Before describing the linear regulator according to this embodiment, the linear regulator according to the comparative example will be described and its problems will be stated.

[0012] Figure 12 shows the configuration of a linear regulator 700 according to a comparative example. The linear regulator 700 includes a voltage control circuit that maintains the output voltage Vo at a predetermined constant value. The voltage control circuit includes an output transistor PM1, resistors R1 to R3, an error amplifier 1, and a transistor NM1. The source of the output transistor PM1 is connected to the input voltage line VDD, and the drain of the output transistor PM1 is connected to the output terminal Vo. Resistors R1 and R2 are connected in series between the output terminal Vo and ground, dividing the output voltage Vo at a predetermined ratio to generate the divided voltage Vd.

[0013] Error amplifier 1 compares the divided voltage Vd with the reference voltage Vref. If the divided voltage Vd is lower than the reference voltage Vref, error amplifier 1 outputs a positive voltage, and transistor NM1 turns on. This causes current to flow from the input voltage line VDD through the drain-source of transistor NM1 to ground, increasing the voltage drop across resistor R3. As a result, the drive voltage Pdr of output transistor PM1 decreases, and the on-resistance between its drain and source decreases, causing the output voltage Vo to increase.

[0014] Conversely, if the divided voltage Vd is higher than the reference voltage Vref, the error amplifier 1 outputs a negative voltage, and transistor NM1 turns off. This prevents current from flowing from the input voltage line VDD through the drain-source of transistor NM1 to ground, and reduces the voltage drop across resistor R3. As a result, the drive voltage Pdr of output transistor PM1 increases, and the on-resistance between its drain and source increases, causing the output voltage Vo to decrease.

[0015] Due to the above operation of the voltage control circuit, the output voltage Vo of the linear regulator 700 is kept at a constant value that satisfies the following relationship.

[0016]

number

[0017] Furthermore, the linear regulator 700 is equipped with a current limiting circuit that limits the output current Io of the output transistor PM1 to a predetermined value or less. The current limiting circuit includes an error amplifier 2, a transistor PM2, a constant current source I1, a diode-connected transistor PM3, and a first reference current source In. The constant current source I1 causes a constant current I1 to flow from the input voltage line VDD through the resistor R3 and the constant current source I1 to ground. The diode-connected transistor PM3 and the first reference current source In provide a reference voltage V LIM This is generated.

[0018] Error amplifier 2 controls the drive voltage Pdr of the output transistor PM1 and the reference voltage V LIM Compare this to the operation described above where the divided voltage Vd < reference voltage Vref, the output voltage Vo decreases and the voltage drop across resistor R3 increases, causing the drive voltage Pdr of output transistor PM1 to be lower than the reference voltage V LIM As the voltage drops further, the output voltage of error amplifier 2 decreases, and transistor PM2 turns on. This causes current to flow from the input voltage line VDD through the drain-source of transistor PM2 and the drain-source of transistor NM1 to ground. In exchange, the current flowing through resistor R3 stagnates, and the voltage drop across resistor R3 stagnates. As a result, the decrease in the drive voltage Pdr of output transistor PM1 stagnates, and the increase in its output current Io is prevented.

[0019] Conversely, in the case where the voltage divider voltage Vd > reference voltage Vref as described above, the output voltage Vo increases and the voltage drop across resistor R3 decreases, so that the drive voltage Pdr of output transistor PM1 becomes the reference voltage V LIM As the voltage increases, the output voltage of error amplifier 2 rises, and transistor PM2 turns off. As a result, the stagnation in the decrease of the drive voltage Pdr of output transistor PM1 is resolved, and its output current Io is no longer hindered.

[0020] Figure 13 shows the voltage-current characteristics between the drain and source of a diode-connected transistor PM3. The vertical axis, Ids3, represents the current between the drain and source of transistor PM3. The horizontal axis, Vds3, represents the voltage between the drain and source of transistor PM3. The voltage value between the drain and source of transistor PM3, i.e., the reference voltage V LIM This is a function of only the first reference current In, which is the current value flowing between the drain and source, and is expressed by the following equation (2).

[0021]

number

[0022] However, L3 and W3 are the gate length and gate width of transistor PM3, μp is the mobility of positive carriers, Cox is the gate oxide capacitance per unit area, and Vth is the threshold voltage.

[0023] Figure 14 shows the given drive voltage Pdr = V LIM This figure shows the voltage-current characteristics between the drain and source of the output transistor PM1. The vertical axis Io represents the current between the drain and source of the output transistor PM1. The horizontal axis Vds1 represents the voltage between the drain and source of the output transistor PM1. The solid line represents the actual characteristics where channel length modulation effects exist, and the dashed line represents the ideal characteristics where channel length modulation effects do not exist. The current value between the drain and source of the output transistor PM1, i.e., the output current Io, is expressed as a function of the voltage Vds1, which is the voltage value between the drain and source, by the following equation (3).

[0024]

number

[0025] However, L1 and W1 are the gate length and gate width of the output transistor PM1, and λ1 is the channel length modulation coefficient.

[0026] Substituting Equation (1) into Equation (3), the output current Io of the output transistor PM1 is the limiting current I expressed by the following Equation (4). LIM It is limited as follows.

[0027] [Number]

[0028] In Equation (4), the voltage Vds1 between the drain and source of the output transistor PM1 is the difference between the input voltage VDD and the output voltage Vo, and |Vds1| = VDD - Vo. While the output voltage Vo is fixed at a constant value, the input voltage VDD can take any value greater than or equal to the output voltage Vo.

[0029] In the ideal characteristic (λ1 = 0) where the channel length modulation effect shown by the dashed line in FIG. 14 does not exist, Equation (4) does not depend on Vds1. However, in the actual characteristic (λ1 ≠ 0) where the channel length modulation effect shown by the solid line in FIG. 14 exists, Equation (4) depends on Vds1, and when the input voltage VDD changes, the limiting current I LIM changes accordingly. Specifically, when the input voltage VDD increases, the limiting current I LIM also increases. Therefore, the output current limiting function of the linear regulator 700 according to the comparative example has a dependency on the input voltage VDD.

[0030] (Embodiment 1) FIG. 1 is a diagram showing the configuration of a linear regulator 100 according to Embodiment 1. The linear regulator 100 includes, in addition to the configuration of the linear regulator 700 according to the comparative example, a current mirror circuit composed of a transistor PM5 and a transistor PM6 (second transistor), and a first voltage fixing circuit 10 composed of a transistor NM2 (third transistor). The sources of the transistors PM5 and PM6 are connected to the input voltage line VDD. The drain of the transistor PM6 is connected to the first node N1.

[0031] The drain of transistor NM2, which constitutes the first voltage fixing circuit 10, is connected to the drain of diode-connected transistor PM3. The source of transistor NM2 is connected to the first node N1. A constant voltage source V1 is connected to the gate of transistor NM2. The constant voltage source V1 generates a voltage by adding a threshold voltage Vth to a predetermined set voltage Vn (first set voltage). As a result, as will be described later, if the first reference current In flowing downstream of the first node N1 is constant, the voltage change at the first node N1 becomes extremely small, and the voltage at the first node N1 is almost fixed at the set voltage Vn. In this embodiment 1, the set voltage Vn is set to be equal to the output voltage Vo, so Vn = Vo. Note that "fixed" in this embodiment means not only when the voltage is completely fixed to the set value, but also when small voltage changes near the set value are allowed.

[0032] Furthermore, the linear regulator 100 includes a constant current source I2, a cascode current mirror circuit composed of transistors NM3 to NM5, and a current mirror circuit composed of transistors NM4 and NM6. The value of the drain-source current Ip of transistor PM6 is determined by the aspect ratios of transistors NM3 to NM5 that constitute the cascode current mirror circuit. The value of the first reference current In flowing downstream of the first node N1 is determined by the aspect ratios of transistors NM4 and NM6 that constitute the current mirror circuit. A second reference current Is, which corresponds to the difference between the first reference current In and the current Ip, flows between the drain and source of the diode-connected transistor PM3.

[0033] The drain-source voltage Vds6 of transistor PM6 is the difference between the input voltage VDD and the setting voltage Vn of the first node N1, so |Vds6| = VDD - Vn. The setting voltage Vn = Vo of the first node N1 is fixed at a constant value, while the input voltage VDD can take any value greater than or equal to the output voltage Vo. Therefore, similar to output transistor PM1, the drain-source current Ip of transistor PM6 depends on the input voltage VDD, and as the input voltage VDD increases, the current Ip also increases.

[0034] The current mirror circuit, composed of transistors NM4 and NM6, functions as a constant current circuit that maintains the first reference current In at a constant value. In detail, transistors NM4 and NM6 are designed with long gate lengths or are composed of multiple transistors connected in a cascode. As a result, the first reference current In flowing between the drain and source of transistor NM6 remains constant with little influence from channel length modulation effects. Therefore, according to the conservation law of current at the first node N1, the following relationship holds between currents Ip, Is, and In.

[0035]

number

[0036] Figure 2 shows the characteristics of each current Ip, Is, and In. The horizontal axis of the graph represents the difference between the input voltage VDD and the output voltage Vo, but the output voltage Vo is fixed at a constant value, and only the input voltage VDD changes. The first reference current In is a constant value, independent of the input voltage VDD. Current Ip depends on the input voltage VDD, and as the input voltage VDD increases, current Ip also increases. The second reference current Is also depends on the input voltage VDD, but unlike current Ip, as the input voltage VDD increases, the second reference current Is decreases.

[0037] Figure 3 is a diagram showing only the characteristics of the second reference current Is, extracted from Figure 2. When the input voltage VDD is large, the second reference current Is decreases (A in the figure), and when the input voltage VDD is small, the second reference current Is increases (B in the figure).

[0038] Figure 4 shows the voltage-current characteristics between the drain and source of a diode-connected transistor PM3. The voltage between the drain and source of transistor PM3, Vds3, i.e., the reference voltage V LIM This is determined solely by the drain-source current Ids3, i.e., the second reference current Is. Specifically, if the second reference current Is is small, the reference voltage V LIMIt also becomes smaller (Figure (A)), and if the second reference current Is is large, the reference voltage V LIM It also becomes larger (Figure (B)).

[0039] Figure 5 shows the voltage-current characteristics between the drain and source of the output transistor PM1. The current Io between the drain and source of the output transistor PM1 depends on the drive voltage Pdr and the drain-source voltage |Vds1|=VDD-Vo. Therefore, the limiting current I LIM The reference voltage V LIM And it depends on the input voltage VDD. Specifically, the reference voltage V LIM When the value is small, the characteristic graph shifts downwards (Figure (A)), and the reference voltage V LIM When the value is large, the characteristic graph shifts upward (Figure (B)). As a result, when the input voltage VDD is large (Figure (A)), the limiting current I LIM And, when the input voltage VDD is small (Figure (B)), the limiting current I LIM These two will be approximately the same size.

[0040] To summarize the above operation, when the input voltage VDD is large, the second reference current Is and the reference voltage V LIM The limiting current I becomes smaller. LIM It becomes smaller. Conversely, when the input voltage VDD is small, the second reference current Is and the reference voltage V LIM The limiting current I becomes larger. LIM It becomes larger. In other words, when the magnitude of the input voltage VDD changes, the limiting current I increases to counteract the effect of that change. LIM The magnitude of this variable changes. This reduces the dependence of the output current limit of the linear regulator 100 on the input voltage VDD.

[0041] As described above, the linear regulator 100 according to this embodiment 1 limits the variable range of the drive voltage Pdr of the output transistor PM1 to a predetermined range, thereby limiting the output current Io to a limiting current I LIM The circuit is equipped with a current limiting circuit that limits the current to the following: and the limiting current I LIM The second reference current Is, which determines the limiting current V, is dependent on the input voltage VDD.LIM The dependence of the input voltage VDD is canceled out. More specifically, the negative correlation between the second reference current Is and the input voltage VDD cancels out the limiting current V LIM The positive correlation between the input voltage VDD and the current is canceled out. Due to this feature, the linear regulator 100 according to this embodiment 1 can reduce the dependence of the output current limit on the input voltage VDD.

[0042] Furthermore, it is most preferable that the dependence characteristics of the drain-source current Ip of transistor PM6 on the input voltage VDD and the dependence characteristics of the output current Io on the input voltage VDD match, as shown in Figure 6. To achieve this, it is preferable that the channel length modulation coefficient λ6 of transistor PM6 is equal to the channel length modulation coefficient λ1 of output transistor PM1. Also, it is preferable that the gate length L6 of transistor PM6 is equal to the gate length L1 of output transistor PM1. Moreover, it is preferable that the drain-source voltage |Vds6|=VDD-Vn of transistor PM6 is equal to the drain-source voltage |Vds|=VDD-Vo of output transistor PM1, that is, it is preferable that the setting voltage Vn of the first node N1 is equal to the output voltage Vo. However, even if these values ​​differ slightly, if there is an approximate similarity between the characteristics of the second reference current Is and the characteristics of the output current Io, the dependence of the output current limit on the input voltage VDD can be reduced.

[0043] (Embodiment 2) Figure 7 shows the configuration of the linear regulator 200 according to Embodiment 2. The gate of transistor NM2 of the first voltage fixing circuit 210 is input with a bias voltage Vb used in a cascode current mirror circuit composed of transistors NM3 to NM5. This makes it possible to omit the constant voltage source V1 that was required in Embodiment 1, and thus reduce the circuit size. It is most preferable that the bias voltage Vb = Vo + Vth, but even if the two do not perfectly match, if they are close values, the dependence of the output current limit on the input voltage VDD can be reduced.

[0044] (Embodiment 3) Figure 8 shows the configuration of the linear regulator 300 according to Embodiment 3. The output signal of the error amplifier 311 (first error amplifier) ​​is input to the gate of transistor NM2 of the first voltage fixing circuit 310. The error amplifier 311 outputs the result of comparing the voltage at the first node N1 with the set voltage Vn generated by the constant voltage source V2. In detail, the positive input terminal of the error amplifier 311 is connected to the constant voltage source V2 that generates the set voltage Vn=Vo. The negative input terminal of the error amplifier 311 is connected to the first node N1. As a result, the voltage at the first node N1 is fixed to the set voltage Vn=Vo. Even with this configuration, the dependence of the output current limit on the input voltage VDD can be reduced.

[0045] (Embodiment 4) Figure 9 shows the configuration of the linear regulator 400 according to Embodiment 4. The first voltage fixing circuit 410 includes a current mirror circuit composed of transistors NM7 (fourth transistor) and NM8 (fifth transistor). The drain of transistor NM7 is connected to the drain of diode-connected transistor PM3. The source of transistor NM7 is connected to the first node N1. The drain of transistor NM8 is connected to a constant current source I3. The source of transistor NM8 is connected to a constant voltage source V3 that generates a set voltage Vn=Vo. As a result, the voltage at the first node N1 is fixed to the set voltage Vn=Vo. Even with this configuration, the dependence of the output current limit on the input voltage VDD can be reduced.

[0046] (Embodiment 5) Figure 10 shows the configuration of the linear regulator 500 according to Embodiment 5. The second voltage fixing circuit 520 fixes the voltage at the drain (second node P2) of transistor PM6 to a predetermined set voltage Vp (second set voltage) = Vo. Specifically, the output signal of the error amplifier 522 (second error amplifier) ​​is input to the gate of transistor NM2 of the voltage fixing circuit 520, and to the gate of transistor NM9 (sixth transistor), which is in a mirror relationship with transistor NM2. The drain of transistor NM9 is connected to the second node P2. The error amplifier 522 outputs the result of comparing the voltage at the second node P2 with the set voltage Vp generated by the constant voltage source V4. As a result, the voltage at the second node P2 is fixed to the set voltage Vp = Vo. Consequently, the voltage between the drain and source of transistor PM6 becomes Vds2 (=VDD-Vp) = VDD-Vo. Even with this configuration, the dependence of the output current limit on the input voltage VDD can be reduced.

[0047] (Embodiment 6) Figure 11 shows the configuration of the linear regulator 600 according to Embodiment 6. The second voltage fixing circuit 620 fixes the voltage at the drain (second node P2) of transistor PM6 to the set voltage Vp = Vo. Specifically, the output signal of the error amplifier 623 (third error amplifier) ​​is input to the gate of transistor PM7 (seventh transistor) of the voltage fixing circuit 620. The source of transistor PM7 is connected to the second node P2. The drain of transistor PM7 is connected to the first node N1. The error amplifier 623 outputs the result of comparing the voltage at the second node P2 with the set voltage Vp generated by the constant voltage source V5. As a result, the voltage at the second node P2 is fixed to the set voltage Vp = Vo. Consequently, the voltage between the drain and source of transistor PM6 becomes Vds2 (=VDD-Vp) = VDD-Vo. Even with this configuration, the dependence of the output current limit on the input voltage VDD can be reduced.

[0048] While several embodiments have been described, these embodiments are presented as examples and are not intended to limit the scope of the embodiments. These embodiments can be implemented in various other forms, and various omissions, substitutions, modifications, and combinations can be made without departing from the spirit of the embodiments. These embodiments and their variations are included in the scope and spirit of the embodiments, as well as in the claims and their equivalents.

[0049] Furthermore, this embodiment can also be configured as follows. [Item 1] A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A current limiting circuit that limits the output current of the first transistor to a limiting current or less by limiting the variable range of the drive voltage of the first transistor to a predetermined range, Equipped with, The limiting current is determined by a reference current that is dependent on the input voltage. electronic circuit. [Item 2] The negative correlation between the reference current and the input voltage cancels out the positive correlation between the limiting current and the input voltage. The electronic circuit described in item 1 or 15. [Item 3] (Examples 1-4) A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A current limiting circuit that limits the output current of the first transistor to a limiting current corresponding to a reference current by limiting the variable range of the drive voltage of the first transistor to a predetermined range, A second transistor connected between the input voltage line and the first node, A constant current circuit that maintains a constant sum between the reference current and the output current of the second transistor, A first voltage fixing circuit that fixes the voltage of the first node to a predetermined first set voltage, An electronic circuit equipped with the following features. [Item 4] The channel length modulation coefficient of the second transistor is equal to the channel length modulation coefficient of the first transistor. Electronic circuits as described in item 3 or 16. [Item 5] The gate length of the second transistor is equal to the gate length of the first transistor. The electronic circuit described in item 3, 4, or 16. [Item 6] The predetermined first setting voltage is equal to the output voltage of the output terminal. An electronic circuit as described in any one of items 3-5 or 16. [Item 7] (Example 1) The first voltage fixing circuit includes a third transistor whose source is connected to the first node, The reference current flows between the drain and source of the third transistor. A voltage is input to the gate of the third transistor, which is the predetermined first set voltage plus a threshold voltage. An electronic circuit as described in any one of items 3-6 or 16. [Item 8] (Example 2) The first voltage fixing circuit includes a third transistor whose source is connected to the first node, The reference current flows between the drain and source of the third transistor. The gate of the third transistor is input to the bias voltage of the current mirror circuit. An electronic circuit as described in any one of items 3-6 or 16. [Item 9] (Example 3) The first voltage fixing circuit is, A third transistor whose source is connected to the first node, A first error amplifier that outputs the result of comparing the voltage of the first node with the predetermined first set voltage, Includes, The reference current flows between the drain and source of the third transistor. The output signal of the first error amplifier is input to the gate of the third transistor. An electronic circuit as described in any one of items 3-6 or 16. [Item 10] (Example 4) The first voltage fixing circuit includes a current mirror circuit composed of a fourth transistor and a fifth transistor, The reference current flows between the drain and source of the fourth transistor. The source of the fourth transistor is connected to the first node, The source of the fifth transistor is input to the predetermined first set voltage. An electronic circuit as described in any one of items 3-6 or 16. [Item 11] The system further includes a voltage control circuit that controls the on-resistance of the first transistor by controlling the drive voltage of the first transistor. An electronic circuit as described in any one of items 3-10 or 16. [Item 12] (Examples 5 and 6) A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A current limiting circuit that limits the output current of the first transistor to a limiting current corresponding to a reference current by limiting the variable range of the drive voltage of the first transistor to a predetermined range, A second transistor connected between the input voltage line and the first node, A constant current circuit that maintains a constant sum between the reference current and the output current of the second transistor, A second voltage fixing circuit that fixes the voltage between the drain and source of the second transistor to a predetermined second set voltage, An electronic circuit equipped with the following features. [Item 13] (Example 5) The second voltage fixing circuit is, A third transistor whose source is connected to the first node, The sixth transistor is in a mirror relationship with the third transistor, A second error amplifier outputs the result of comparing the voltage at the second node, which is the drain of the second transistor, with the predetermined second set voltage. Includes, The reference current flows between the drain and source of the third transistor. The drain of the sixth transistor is connected to the second node, The source of the sixth transistor is connected to the first node, The output signal of the second error amplifier is input to the gates of the third transistor and the sixth transistor. The electronic circuit described in item 12 or 17. [Item 14] (Example 6) The second voltage fixing circuit is, A third transistor whose source is connected to the first node, A third error amplifier that outputs the result of comparing the voltage at the second node, which is the drain of the second transistor, with the predetermined second set voltage, A seventh transistor, the drain of which is connected to the first node and the source of which is connected to the second node, Includes, The reference current flows between the drain and source of the third transistor. The output signal of the third error amplifier is input to the gates of the third transistor and the seventh transistor. The electronic circuit described in item 12 or 17. [Item 15] A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A current limiting circuit that limits the output current of the first transistor to a limiting current or less by limiting the variable range of the drive voltage of the first transistor to a predetermined range, Equipped with, The limiting current is determined by a reference voltage (VLIM) that is dependent on the input voltage. electronic circuit. [Item 16] (Examples 1-4) A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A diode-connected transistor (PM3) generates a reference voltage (VLIM) by generating a reference current (Is) corresponding to the input voltage, A current limiting circuit that limits the output current of the first transistor to a limiting current corresponding to the reference voltage by limiting the variable range of the drive voltage of the first transistor to a predetermined range, A second transistor connected between the input voltage line and the first node, A constant current circuit that maintains a constant sum between the reference current and the output current of the second transistor, A first voltage fixing circuit that fixes the voltage of the first node to a predetermined first set voltage, An electronic circuit equipped with the following features. [Item 17] (Examples 5 and 6) A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A diode-connected transistor (PM3) generates a reference voltage (VLIM) by generating a reference current (Is) corresponding to the input voltage, A current limiting circuit that limits the output current of the first transistor to a limiting current corresponding to the reference voltage by limiting the variable range of the drive voltage of the first transistor to a predetermined range, A second transistor connected between the input voltage line and the first node, A constant current circuit that maintains a constant sum between the reference current and the output current of the second transistor, A second voltage fixing circuit that fixes the voltage between the drain and source of the second transistor to a predetermined second set voltage, An electronic circuit equipped with the following features. [Explanation of Symbols]

[0050] 1. Error Amplifier 2. Error Amplifier 10. First voltage fixed circuit 210 First voltage fixed circuit 310 First voltage fixed circuit 311 Error Amplifier (First Error Amplifier) 410 First voltage fixed circuit 520 Second voltage fixed circuit 612 Error Amplifier (Second Error Amplifier) 620 Second voltage fixed circuit 613 Error Amplifier (Third Error Amplifier) I1 constant current source I2 constant current source I3 constant current source Current between drain and source of Ids1 PM1 Current between drain and source of Ids3 PM3 I LIM Current limit In 1st reference current Io Output Current Current between drain and source of Ip PM6 Is 2nd reference current N1 First Node NM1 transistor NM2 transistor (third transistor) NM3 transistor NM4 transistor NM5 transistor NM6 transistor NM7 transistor (4th transistor) NM8 transistor (5th transistor) NM9 transistor (6th transistor) PDR drive voltage P2 Second Node PM1 Output transistor (first transistor) PM2 Transistor PM3 transistor (8th transistor) PM4 Transistor PM5 Transistor PM6 transistor (second transistor) PM7 transistor (7th transistor) R1 Resistor R2 resistance R3 resistance V1 Constant voltage source V2 Constant voltage source V3 Constant voltage source V4 Constant Voltage Source V5 Constant Voltage Source Vb bias voltage V LIM Reference voltage Vn Set voltage (1st set voltage) Vo Output Voltage Vp setting voltage (second setting voltage) Vref Reference Voltage Vth threshold voltage

Claims

1. A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A current limiting circuit that limits the output current of the first transistor to a limiting current or less by limiting the variable range of the drive voltage of the first transistor to a predetermined range, Equipped with, The limiting current is determined by a reference current that is dependent on the input voltage. electronic circuit.

2. The negative correlation between the reference current and the input voltage cancels out the positive correlation between the limiting current and the input voltage. The electronic circuit according to claim 1.

3. A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A current limiting circuit that limits the output current of the first transistor to a limiting current corresponding to a reference current by limiting the variable range of the drive voltage of the first transistor to a predetermined range, A second transistor connected between the input voltage line and the first node, A constant current circuit that keeps the sum of the reference current and the output current of the second transistor constant, A first voltage fixing circuit that fixes the voltage of the first node to a predetermined first set voltage, An electronic circuit equipped with the following features.

4. The channel length modulation coefficient of the second transistor is equal to the channel length modulation coefficient of the first transistor. The electronic circuit according to claim 3.

5. The gate length of the second transistor is equal to the gate length of the first transistor. The electronic circuit according to claim 3.

6. The predetermined first set voltage is equal to the output voltage of the output terminal. The electronic circuit according to claim 3.

7. The first voltage fixing circuit includes a third transistor whose source is connected to the first node, The reference current flows between the drain and source of the third transistor. A voltage is input to the gate of the third transistor, which is the predetermined first set voltage plus a threshold voltage. The electronic circuit according to claim 3.

8. The first voltage fixing circuit includes a third transistor whose source is connected to the first node, The reference current flows between the drain and source of the third transistor. The gate of the third transistor is input to the bias voltage of the current mirror circuit. The electronic circuit according to claim 3.

9. The first voltage fixing circuit is, A third transistor whose source is connected to the first node, A first error amplifier that outputs the result of comparing the voltage of the first node with the predetermined first set voltage, Includes, The reference current flows between the drain and source of the third transistor. The output signal of the first error amplifier is input to the gate of the third transistor. The electronic circuit according to claim 3.

10. The first voltage fixing circuit includes a current mirror circuit composed of a fourth transistor and a fifth transistor, The reference current flows between the drain and source of the fourth transistor. The source of the fourth transistor is connected to the first node, The predetermined first set voltage is input to the source of the fifth transistor. The electronic circuit according to claim 3.

11. The system further includes a voltage control circuit that controls the on-resistance of the first transistor by controlling the drive voltage of the first transistor. The electronic circuit according to claim 3.

12. A first transistor connected between an input voltage line to which an input voltage is provided and an output terminal, A current limiting circuit that limits the output current of the first transistor to a limiting current corresponding to a reference current by limiting the variable range of the drive voltage of the first transistor to a predetermined range, A second transistor connected between the input voltage line and the first node, A constant current circuit that keeps the sum of the reference current and the output current of the second transistor constant, A second voltage fixing circuit that fixes the voltage between the drain and source of the second transistor to a predetermined second set voltage, An electronic circuit equipped with the following features.

13. The second voltage fixing circuit is, A third transistor whose source is connected to the first node, The sixth transistor is in a mirror relationship with the third transistor mentioned above, A second error amplifier that outputs the result of comparing the voltage at the second node, which is the drain of the second transistor, with the predetermined second set voltage, Includes, The reference current flows between the drain and source of the third transistor. The drain of the sixth transistor is connected to the second node, The source of the sixth transistor is connected to the first node, The output signal of the second error amplifier is input to the gates of the third transistor and the sixth transistor. The electronic circuit according to claim 12.

14. The second voltage fixing circuit is, A third transistor whose source is connected to the first node, A third error amplifier that outputs the result of comparing the voltage at the second node, which is the drain of the second transistor, with the predetermined second set voltage, A seventh transistor, the drain of which is connected to the first node and the source of which is connected to the second node, Includes, The reference current flows between the drain and source of the third transistor. The output signal of the third error amplifier is input to the gate of the seventh transistor. The electronic circuit according to claim 12.

Images