Multilayer ceramic capacitor and method for manufacturing the same

Abstract

The present invention provides a multilayer ceramic capacitor with excellent density and reliability. It also provides a method for manufacturing the multilayer ceramic capacitor. [Solution] A multilayer ceramic capacitor and a method for manufacturing the same are provided, comprising a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers stacked with the dielectric layers in between; and an external electrode disposed on the outside of the capacitor body, wherein the internal electrode layers contain tin (Sn), the dielectric layers contain one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In), the tin (Sn) content in the internal electrode layers is even higher at the interface with the dielectric layers than in the central region of the internal electrode layers in the stacking direction, and the element (X) content in the dielectric layers is even higher at the interface with the internal electrode layers than in the central region of the dielectric layers in the stacking direction.

Description

Technical Field

[0001] The present disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same.

Background Art

[0002] As electronic components using ceramic materials, there are capacitors, inductors, piezoelectric elements, varistors, thermistors, and the like. Among such ceramic electronic components, a multilayer ceramic capacitor (MLCC) can be used in various electronic devices due to its advantages of being small, having a high capacitance, and being easy to mount.

[0003] For example, a multilayer ceramic capacitor (MLCC) can be used as a chip-shaped capacitor that is mounted on the substrates of various electronic products such as video devices such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), computers, personal mobile terminals, and smartphones, and serves to charge or discharge electricity.

[0004] Dielectrics are mainly ferroelectric materials such as BaTiO3 that have a high dielectric constant at room temperature and excellent insulation resistance, and electrode materials are metals such as Ni that are excellent in conductivity and inexpensive. As technology develops, there is a demand for miniaturization and high capacitance of LCCs, and recently, the demand for automotive MLCCs directly related to the safety of passengers has increased, and high reliability such as the product life and technical stability is required.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One embodiment provides a multilayer ceramic capacitor having excellent density and reliability.

[0006] Another embodiment provides a method for manufacturing the multilayer ceramic capacitor. [Means for solving the problem]

[0007] One embodiment provides a multilayer ceramic capacitor comprising a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers stacked with the dielectric layers in between, and an external electrode disposed on the outside of the capacitor body, wherein the internal electrode layers contain tin (Sn), the dielectric layers contain one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In), the tin (Sn) content is even higher in the stacking direction at the interface of the internal electrode layers with the dielectric layers than in the central region of the internal electrode layers, and the element (X) content is higher in the stacking direction at the interface of the dielectric layers with the internal electrode layers than in the central region of the dielectric layers.

[0008] The tin (Sn) may be present in the form of SnO2 at the interface with the dielectric layer.

[0009] The internal electrode layer may further contain nickel (Ni).

[0010] The element (X) may be present at the interface with the internal electrode layer in the form of an intermetallic compound with the nickel (Ni).

[0011] The internal electrode layer may further contain nickel (Ni), the tin (Sn) may be present in the form of SnO2 at the interface with the dielectric layer, and the element (X) may be present with nickel (Ni) in the form of an intermetallic compound at the interface with the internal electrode layer.

[0012] The internal electrode layer may further contain one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In).

[0013] In the internal electrode layer, the content of element (X) may be even higher at the interface with the dielectric layer than at the central region of the internal electrode layer in the stacking direction.

[0014] The dielectric layer may further contain tin (Sn).

[0015] In the dielectric layer, the tin (Sn) content may be even higher at the interface with the internal electrode layer than at the central region of the dielectric layer in the stacking direction.

[0016] During TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis of a linear section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, the atomic percentage of tin (Sn) may have its maximum value at the interface between the dielectric layer and the internal electrode layer.

[0017] During TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis of a linear section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, the atomic percentage of bismuth (Bi) may be at its maximum value at the interface between the dielectric layer and the internal electrode layer.

[0018] The average thickness of the interface between the dielectric layer and the internal electrode layer may be 0.01 nm to 100 nm.

[0019] The dielectric layer may further contain a barium titanate-based compound, and the barium titanate-based compound may contain one or more selected from BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Ca)O3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, and (Ba,Sr)(Ti,Sn)O3.

[0020] The dielectric layer may contain pores in an area of ​​less than 1% per 5 μm × 5 μm area within the dielectric layer.

[0021] Another embodiment includes the steps of: mixing barium titanate-based main component powder and auxiliary component powder to produce a dielectric slurry; mixing nickel (Ni) and tin (Sn)-containing compounds to produce a conductive paste; producing a dielectric green sheet using the dielectric slurry; printing the conductive paste onto the surface of the dielectric green sheet to form a conductive paste layer; laminating the dielectric green sheets on which the conductive paste layer is formed to produce a dielectric green sheet laminate; firing the dielectric green sheet laminate to produce a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body. The invention provides a method for manufacturing a multilayer ceramic capacitor, wherein the auxiliary component powder comprises one or more compounds selected from bismuth (Bi)-containing compounds, aluminum (Al)-containing compounds, gallium (Ga)-containing compounds, and indium (In)-containing compounds; the internal electrode layer comprises tin (Sn); the dielectric layer comprises one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In); the tin (Sn) content is even higher in the stacking direction at the interface between the internal electrode layer and the dielectric layer than in the central region of the internal electrode layer; and the element (X) content is higher in the stacking direction at the interface between the dielectric layer and the internal electrode layer than in the central region of the dielectric layer.

[0022] The tin (Sn)-containing compound may include an oxide, a nitrate, a salt compound, or a sol form dispersed in an organic solvent.

[0023] The bismuth (Bi)-containing compound, aluminum (Al)-containing compound, gallium (Ga)-containing compound, and indium (In)-containing compound may each include an oxide, a nitrate, a salt compound, or a sol form dispersed in an organic solvent.

[0024] The tin (Sn)-containing compound may be mixed in an amount of more than 0.1 mol part and not more than 5 mol parts with respect to 100 mol parts of the barium titanate-based main component powder.

[0025] The sub-component powder may be mixed in an amount of more than 0.1 mol part and not more than 5 mol parts with respect to 100 mol parts of the barium titanate-based main component powder.

[0026] The tin (Sn)-containing compound and the sub-component powder may be mixed such that the molar ratio of the sub-component powder to the tin (Sn)-containing compound is from 0.1 to 1.

Advantages of the Invention

[0027] The multilayer ceramic capacitor according to one embodiment can realize low-temperature firing of the dielectric, improve deterioration of the internal electrode, improve connectivity of the electrodes, and improve density and reliability.

Brief Description of the Drawings

[0028] [Figure 1] FIG. 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment. [Figure 2] FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor cut along line I-I' of FIG. 1. [Figure 3] FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor cut along line II-II' of FIG. 1. [Figure 4]Figure 4 is a separated perspective view showing the stacked structure of the internal electrode layers in the capacitor body of Figure 1. [Figure 5] Figure 5 is a schematic diagram showing a cross-section of a part of the active region according to one embodiment. [Figure 6] Figure 6 shows the phase diagrams of Sn and Bi. [Figure 7] Figure 7 is a graph showing the leakage current degradation behavior of the Ni-Sn electrode in a multilayer ceramic capacitor. [Figure 8] Figure 8 shows a TEM (transmission electron microscope) line profile image of a portion of the active region according to Example 2. [Figure 9] Figure 9 shows an SEM (scanning electron microscope) analysis image of a portion of the active region according to Example 2. [Figure 10] Figure 10 shows an SEM (scanning electron microscope) analysis image of a portion of the active region related to Comparative Example 6. [Modes for carrying out the invention]

[0029] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings so that they can be easily implemented by a person with ordinary skill in the art to which the present invention pertains. In the drawings, parts that are not necessary for the clear explanation of the present invention have been omitted, and the same or similar components are denoted by the same reference numerals throughout the specification. In addition, some components in the attached drawings are exaggerated, omitted, or shown schematically, and the size of each component does not fully reflect its actual size.

[0030] The accompanying drawings are provided solely to facilitate understanding of the embodiments disclosed herein, and should not be understood as limiting the technical ideas disclosed herein, and should be understood to include any modifications, equivalents, or substitutions that fall within the concept and scope of the invention.

[0031] Terms including ordinal numbers, such as "first," "second," etc., can be used to describe a variety of components, but the components are not limited by such terms. These terms are used solely for the purpose of distinguishing one component from another.

[0032] Furthermore, when we say that a layer, membrane, region, plate, or other part is "on top of" another part, this includes not only the case where it is "directly above" the other part, but also the case where the other part is in between. Conversely, when we say that one part is "directly above" another part, it means that there is no other part in between. Also, being "on top of" a reference part means being located above or below the reference part, and does not necessarily mean being located "above" in the opposite direction of gravity.

[0033] Throughout the specification, terms such as “includes” or “have” are intended to indicate the presence of features, figures, steps, actions, components, parts, or combinations thereof described in the specification, and should not be understood to preemptively exclude the presence or possibility of adding one or more other features, figures, steps, actions, components, parts, or combinations thereof. Therefore, when a part “includes” a component, this does not exclude other components unless specifically contradicted, and may further include other components.

[0034] Furthermore, throughout the specification, "on a plane" refers to the view of the part in question from above, and "on a cross-section" refers to the view of the cross-section of the part in question, obtained by cutting it perpendicularly, from the side.

[0035] Furthermore, throughout the specification, the term "connected" does not only mean that two or more components are directly connected, but may also mean that two or more components are indirectly connected through other components, that they can be connected not only physically but also electrically, or that they are a single unit, even though they are referred to by different names depending on their position or function.

[0036] Hereinafter, a multilayer ceramic capacitor according to one embodiment will be described with reference to Figures 1 to 4.

[0037] Figure 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment; Figure 2 is a cross-sectional view of the multilayer ceramic capacitor cut along the line I-I' in Figure 1; Figure 3 is a cross-sectional view of the multilayer ceramic capacitor cut along the line II-II' in Figure 1; and Figure 4 is a separated perspective view showing the laminated structure of the internal electrode layers in the capacitor body of Figure 1.

[0038] The axes, W-axis, and T-axis shown in Figures 1 to 4 represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be perpendicular to the broad surface (main surface) of the sheet-shaped component, and for example, it can be used as the same concept as the stacking direction in which the dielectric layers 111 are stacked. The length direction (L-axis direction) may be a direction that extends alongside the broad surface (main surface) of the sheet-shaped component and is approximately perpendicular to the thickness direction (T-axis direction), and for example, it may be a direction in which the first external electrode 131 and the second external electrode 132 are located on both sides. The width direction (W-axis direction) may be a direction that extends alongside the broad surface (main surface) of the sheet-shaped component and is approximately perpendicular to the thickness direction (T-axis direction) and the length direction (L-axis direction), and the length in the length direction (L-axis direction) of the sheet-shaped component may be even longer than the length in the width direction (W-axis direction).

[0039] Referring to Figures 1 to 4, a multilayer ceramic capacitor 100 according to one embodiment includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outside of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed at opposing ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0040] The capacitor body 110 may, for example, have a roughly hexahedral shape.

[0041] For the convenience of explaining one embodiment, the two surfaces of the capacitor body 110 that face each other in the thickness direction (T-axis direction) are defined as the first and second surfaces, the two surfaces connected to the first and second surfaces and facing each other in the length direction (L-axis direction) are defined as the third and fourth surfaces, and the two surfaces connected to the first and second surfaces and connected to the third and fourth surfaces and facing each other in the width direction (W-axis direction) are defined as the fifth and sixth surfaces.

[0042] For example, the first surface, which is the bottom surface, may be the surface facing the mounting direction. Also, the first to sixth surfaces may be flat, but this is not the only embodiment. For example, the first to sixth surfaces may be curved surfaces with a convex central portion, and the corners that form the boundaries of each surface may be rounded.

[0043] The shape, size, and number of dielectric layers 111 of the capacitor body 110 are not limited to those shown in the drawings of this embodiment.

[0044] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and first internal electrode layers 121 and second internal electrode layers 122 that are alternately arranged in the thickness direction (T-axis direction) with the dielectric layers 111 in between.

[0045] At this time, the boundaries between adjacent dielectric layers 111 of the capacitor body 110 may be so integrated that they are difficult to confirm without using a scanning electron microscope (SEM).

[0046] The capacitor body 110 may include an active region and cover regions 112, 113.

[0047] The active region is a region in which the dielectric layer 111 and the internal electrode layers 121 and 122 are arranged alternately, and is the part that contributes to the formation of the capacitance of the multilayer ceramic capacitor 100. Specifically, the active region may be a region in which the first internal electrode layer 121 or the second internal electrode layer 122, which are stacked along the thickness direction (T-axis direction), overlap.

[0048] The cover regions 112 and 113 are thickness-direction margins and can be located on the first and second surfaces of the active region, respectively, in the thickness direction (T-axis direction). Such cover regions 112 and 113 may be formed by a single dielectric layer 111 or by two or more dielectric layers 111 being laminated on the upper and lower surfaces of the active region, respectively.

[0049] Furthermore, the capacitor body 110 may also include a side margin region.

[0050] The side margin region is a widthwise margin portion and can be located at the opposite ends of the active region in the widthwise direction (W-axis direction), i.e., on the fifth and sixth surfaces, respectively.

[0051] The side margin portion can be formed by applying a conductive paste layer for the internal electrode layer to the surface of the dielectric green sheet, applying the conductive paste layer only to a portion of the surface of the dielectric green sheet, and then stacking dielectric green sheets without the conductive paste layer on both sides of the dielectric green sheet surface, followed by firing. However, the method of formation is not limited to this.

[0052] The cover regions 112, 113 and the side margin regions serve to prevent damage to the first internal electrode layer 121 and the second internal electrode layer 122 due to physical or chemical stress.

[0053] The active region of the capacitor body 110 will be explained in detail with reference to Figure 5.

[0054] Figure 5 is a schematic diagram showing a cross-section of a part of the active region according to one embodiment.

[0055] Referring to Figure 5, the active region of the capacitor body 110 according to one embodiment can include the dielectric layer 111 and the internal electrode layers 121 and 122.

[0056] The internal electrode layers 121 and 122 may contain tin (Sn).

[0057] The internal electrode layers 121 and 122 may have a central region and an interface (A) with the dielectric layer 111 in the stacking direction. In the internal electrode layers 121 and 122, the central region is a region located inward from the interface (A) between the internal electrode layers 121 and 122 and the dielectric layer 111 in the stacking direction, and the interface (A) with the dielectric layer 111 is the interface between the internal electrode layers 121 and 122 and the dielectric layer 111, and is located outward from the central region in the stacking direction.

[0058] Tin (Sn) can be present in both the central region and the interface (A) of the internal electrode layers 121 and 122. Specifically, the tin (Sn) content may be even higher at the interface (A) with the dielectric layer 111 than in the central region of the internal electrode layers 121 and 122. The tin (Sn) content represents the atomic percentage relative to the total amount of the element in each region.

[0059] The dielectric layer 111 may contain one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In).

[0060] The dielectric layer 111 may have a central region and an interface (A) with the internal electrode layers 121 and 122 in the stacking direction. In the dielectric layer 111, the central region is a region located inward from the interface (A) between the internal electrode layers 121 and 122 and the dielectric layer 111 in the stacking direction, and the interface (A) with the internal electrode layers 121 and 122 is the interface between the internal electrode layers 121 and 122 and the dielectric layer 111, and is a region located outward from the central region in the stacking direction.

[0061] Element (X) can be present in both the central region and the interface (A) of the dielectric layer 111. Specifically, the content of element (X) may be even higher at the interface (A) with the internal electrode layers 121 and 122 than in the central region of the dielectric layer 111. The content of element (X), such as bismuth (Bi), represents an atomic percentage relative to the total amount of the element in each region.

[0062] Generally, the reliability of multilayer ceramic capacitors decreases due to the breakage and degradation of internal electrodes such as Ni, and current leakage caused by the generation and migration of oxygen vacancies. Specifically, dielectrics such as BaTiO3 are fired at high temperatures that can cause the internal electrodes to shrink, leading to degradation of the internal electrodes. Furthermore, firing in a reducing atmosphere to prevent oxidation of the internal electrodes induces oxygen vacancies in BaTiO3, contributing to reliability degradation. Therefore, it is important to ensure highly reliable multilayer ceramic capacitors by lowering the firing temperature to minimize firing mismatching between BaTiO3 and Ni internal electrodes, thereby suppressing the generation and migration of oxygen vacancies.

[0063] According to one embodiment, if the tin (Sn) content is higher at the interface (A) than in the central region in the internal electrode layers 121 and 122, and the content of elements such as bismuth (Bi) (X) is higher at the interface (A) than in the central region in the dielectric layer 111, low-temperature firing of the dielectric due to a low melting point can be achieved, improving the degradation of the internal electrodes and enhancing the connectivity of the internal electrodes. Furthermore, by reducing the movement of oxygen vacancies through the formation of a Schottky barrier and a reduction in leakage current, a multilayer ceramic capacitor with excellent density and reliability can be secured even under low-temperature firing conditions.

[0064] The element (X) contained in the dielectric layer 111 may be, for example, bismuth (Bi).

[0065] Because bismuth (Bi) has lower oxidizing properties than nickel (Ni) and tin (Sn), it can also play a role in preventing the oxidation of tin (Sn) and nickel (Ni) at the interface (A) between the dielectric layer 111 and the internal electrode layers 121 and 122.

[0066] Figure 6 shows the phase diagrams of Sn and Bi.

[0067] Referring to Figure 6, it can be seen that the tin (Sn) and bismuth (Bi) contained in the interface (A) between the dielectric layer 111 and the internal electrode layers 121 and 122 have low melting points of 139°C or less, thus enabling low-temperature firing of the dielectric.

[0068] Tin (Sn) can originate from Sn-containing compounds such as SnO2 used during the formation of the internal electrode layer. After firing, the SnO2 component in the internal electrode layer diffuses into the dielectric layer 111 and can exist at the interface (A) mainly in the form of SnO2 oxide. In other words, tin (Sn) may be present at the interface (A) with the dielectric layer 111 in the form of SnO2 oxide.

[0069] Element (X), such as bismuth (Bi), can originate from element (X)-containing compounds, including Bi-containing compounds like Bi2O3, which are added during dielectric layer formation. After firing, the element (X)-containing compound components in the dielectric layer diffuse into the internal electrode layers 121 and 122, allowing element (X) to be mainly present at the interface (A).

[0070] Furthermore, the internal electrode layers 121 and 122 may further contain nickel (Ni). Elements such as bismuth (Bi) (X) may be present in the form of an intermetallic compound with nickel (Ni) that has been reduced at the interface (A) with the internal electrode layers 121 and 122.

[0071] The internal electrode layers 121 and 122 may further contain one or more conductive metals selected from copper (Cu), silver (Ag), palladium (Pd), gold (Au), and alloys thereof, in addition to nickel (Ni).

[0072] The elements present in the internal electrode layers 121, 122 and the dielectric layer 111, as well as the elemental concentration gradients in each layer, can be confirmed through TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) line profiles.

[0073] Specifically, after curing the multilayer ceramic capacitor 100 in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to half a depth in the L-axis direction. After fixing, the sample is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect. Next, the active region of the cross-sectional sample can be measured using a transmission electron microscope (TEM) so that at least one layer each of the dielectric layer 111 and the internal electrode layers 121 and 122 is visible, for example, eight or more layers. For example, the TEM can be used to measure an active region including an area of ​​approximately 7 μm × 7 μm where at least eight layers each of the dielectric layer 111 and the internal electrode layers 121 and 122 are visible, using a Xe-FIB (focused ion beam) under conditions of an acceleration voltage of 200 kV. Next, EDS (energy-dispersive spectroscopy) line analysis can be performed on the TEM image of the measured cross-sectional sample to confirm all the elements present in the internal electrode layer and dielectric layer, as well as the concentration gradients of the elements in each layer. For example, if the active region of the cross-sectional sample is divided into three equal parts—upper, middle, and lower—3 linear sections can be taken from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, allowing for TEM-EDS line analysis on a total of 9 sections.

[0074] Specifically, during TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) line analysis of a linear section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, the atomic percentage of tin (Sn) can be maximized at the interface (A) between the dielectric layer 111 and the internal electrode layers 121 and 122.

[0075] Furthermore, during TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis of a linear section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, the atomic percentage of bismuth (Bi) can be maximized at the interface (A) between the dielectric layer 111 and the internal electrode layers 121 and 122.

[0076] The average thickness of the interface (A) between the dielectric layer 111 and the internal electrode layers 121 and 122 may be 0.01 nm to 100 nm, for example, 0.05 nm to 90 nm, or 0.1 nm to 80 nm. The average thickness of the interface (A) may be measured by scanning electron microscopy (SEM) analysis. Here, the explanation of scanning electron microscopy (SEM) analysis is omitted because it applies the same method as the average thickness measurement method for the dielectric layer 111 described above.

[0077] The dielectric layer 111 and the internal electrode layers 121 and 122 will be described in more detail below.

[0078] The dielectric layer 111 contains a barium titanate-based compound.

[0079] Barium titanate compounds are dielectric base materials that have a high dielectric constant and contribute to the formation of the dielectric constant of the multilayer ceramic capacitor 100.

[0080] Barium titanate compounds may include one or more compounds containing barium (Ba) and titanium (Ti), selected from, for example, BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Ca)O3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, and (Ba,Sr)(Ti,Sn)O3.

[0081] In addition to the aforementioned elements such as bismuth (Bi) (X), the dielectric layer 111 may also further contain tin (Sn).

[0082] Specifically, the tin (Sn) content in the dielectric layer 111 may be even higher at the interface (A) with the internal electrode layers 121 and 122 than in the central region. When the tin (Sn) content in the dielectric layer 111 is higher at the interface (A) than in the central region, it is possible to achieve low-temperature firing of the dielectric, improve the degradation of the internal electrodes, and improve the connectivity of the internal electrodes. Furthermore, it is possible to secure a multilayer ceramic capacitor with excellent density and reliability even under low-temperature firing conditions.

[0083] Furthermore, the dielectric layer 111 may also further contain one or more additional components selected from magnesium (Mg), silicon (Si), vanadium (V), terbium (Tb), and dysprosium (Dy).

[0084] The average thickness (average length in the T-axis direction) of the dielectric layer 111 may be between 0.1 μm and 8.0 μm, for example, between 0.1 μm and 6.0 μm. When the average thickness of the dielectric layer 111 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0085] The average thickness of the dielectric layer 111 may be measured by ion milling and scanning electron microscope (SEM) analysis after polishing the multilayer ceramic capacitor 100 after curing it in an epoxy mixture. For example, a Verios G4 product from Thermofisher Scientific may be used, with measurement conditions of 10kV and 0.2nA, and an analysis magnification of 100x, allowing for measurement so that at least one, three, five, or ten dielectric layers 111 are visible. The SEM image may also be used to obtain the arithmetic mean of the dielectric layer 111 thickness at 10 points separated by a predetermined interval from the reference point, with the reference point being the center point in the length direction (L-axis direction) or width direction (W-axis direction) of the dielectric layer 111. The spacing between the 10 points can be adjusted by the scale of the scanning electron microscope (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the dielectric layer 111. If all 10 points are not located within the dielectric layer 111, the position of the reference point can be changed or the spacing between the 10 points can be adjusted.

[0086] In one embodiment, the dielectric layer 111 may not contain pores, or if it does, the area of ​​pores may be less than 1% of the total area of ​​the dielectric layer, for example, less than 1% per 5 μm × 5 μm area within the dielectric layer. For example, the dielectric layer 111 may contain pores in an area of ​​0% to 0.9%, 0.01% to 0.8%, 0.05% to 0.7%, or 0.07% to 0.6% of the total area of ​​the dielectric layer. When the dielectric layer contains pores in an area within the above ranges, it exhibits excellent density, thereby ensuring a highly reliable multilayer ceramic capacitor.

[0087] The area of ​​the aforementioned pore can be confirmed through scanning electron microscopy (SEM) analysis.

[0088] Specifically, after curing the multilayer ceramic capacitor 100 in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to a depth of 1 / 2 in the L-axis direction. After fixing, the sample is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect. Next, the cross-sectional sample can be measured by SEM so that at least one layer each of the dielectric layer 111 and the internal electrode layers 121 and 122, for example, four or more layers, are visible in the active region. For example, the SEM can be used to measure an area of ​​approximately 5 μm × 5 μm where at least four layers each of the dielectric layer 111 and the internal electrode layers 121 and 122 are visible in the active region, under the condition of an acceleration voltage of 2.0 kV. Through the SEM image of the measured cross-sectional sample, the pores and their area present in the dielectric layer can be confirmed.

[0089] The internal electrode layers 121 and 122, that is, the first internal electrode layer 121 and the second internal electrode layer 122, are electrodes having different polarities, and are arranged alternately facing each other along the T-axis direction with the dielectric layer 111 in between, with one end of each being exposed through the third and fourth surfaces of the capacitor body 110.

[0090] The first internal electrode layer 121 and the second internal electrode layer 122 can be electrically insulated from each other by the dielectric layer 111 placed in between them.

[0091] The ends of the first internal electrode layer 121 and the second internal electrode layer 122, which are alternately exposed through the third and fourth surfaces of the capacitor body 110, can be electrically connected to the first external electrode 131 and the second external electrode 132, respectively.

[0092] As mentioned above, the internal electrode layers 121 and 122 contain a conductive metal including nickel (Ni) and tin (Sn), which reduces leakage current and thereby reduces the movement of oxygen vacancies, thereby improving density and reliability.

[0093] Figure 7 is a graph showing the leakage current degradation behavior of the Ni-Sn electrode in a multilayer ceramic capacitor.

[0094] As can be seen from Figure 7, the leakage current is reduced in the case of a Ni-Sn internal electrode, which uses both Ni and Sn, compared to a Ni internal electrode.

[0095] The internal electrode layers 121 and 122 may further contain one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In), in addition to a conductive metal containing nickel (Ni) and tin (Sn).

[0096] Specifically, the content of element (X) may be even higher at the interface (A) with the dielectric layer 111 than in the central region of the internal electrode layers 121 and 122. When the content of element (X) such as bismuth (Bi) is higher at the interface (A) than in the central region of the internal electrode layers 121 and 122, it is possible to achieve low-temperature firing of the dielectric, improve the degradation of the internal electrodes, and improve the connectivity of the internal electrodes, as well as to ensure a multilayer ceramic capacitor with excellent density and reliability even under low-temperature firing conditions.

[0097] Furthermore, the internal electrode layers 121 and 122 may also further contain one or more additional components selected from magnesium (Mg), silicon (Si), vanadium (V), terbium (Tb), and dysprosium (Dy).

[0098] Furthermore, the internal electrode layers 121 and 122 may also contain dielectric particles of the same composition as the ceramic material contained in the dielectric layer 111.

[0099] The internal electrode layers 121 and 122 can be formed using a conductive metal containing nickel (Ni) and a conductive paste containing tin (Sn). The conductive paste can be printed using screen printing or gravure printing.

[0100] The average thickness of the first internal electrode layer 121 and the second internal electrode layer 122 may be 0.1 μm to 2 μm. The average thickness of the first internal electrode layer 121 and the second internal electrode layer 122 may be measured by scanning electron microscopy (SEM) analysis. Here, the scanning electron microscopy (SEM) analysis is applied in the same way as the method for measuring the average thickness of the dielectric layer 111 described above, so its explanation is omitted.

[0101] The capacitor body 110 can be formed by firing a laminate in which multiple dielectric layers 111 and internal electrode layers 121 and 122 are stacked.

[0102] The external electrodes 131 and 132, namely the first external electrode 131 and the second external electrode 132, are supplied with voltages of different polarities from each other and can be electrically connected to the exposed portions of the first internal electrode layer 121 and the second internal electrode layer 122, respectively.

[0103] With the above configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge is accumulated between the first internal electrode layer 121 and the second internal electrode layer 122, which face each other. At this time, the capacitance of the multilayer ceramic capacitor 100 will be proportional to the overlapping area of ​​the first internal electrode layer 121 and the second internal electrode layer 122, which overlap each other along the T-axis in the active region.

[0104] The first external electrode 131 and the second external electrode 132 are arranged on the third and fourth surfaces of the capacitor body 110, respectively, and may include first and second connecting portions that connect to the first internal electrode layer 121 and the second internal electrode layer 122, and first and second band portions that are arranged at the corners where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.

[0105] The first and second band portions can extend to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 at the first and second connection portions, respectively. The first and second band portions can serve to improve the adhesion strength of the first external electrode 131 and the second external electrode 132.

[0106] The first external electrode 131 and the second external electrode 132 may each include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer positioned to cover the sintered metal layer, and a plating layer positioned to cover the conductive resin layer.

[0107] The sintered metal layer may contain conductive metals and glass.

[0108] Conductive metals may include copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), alloys thereof, or combinations thereof. For example, copper (Cu) may include copper (Cu) alloys. If the conductive metal contains copper, other metals may be included in amounts of 5 moles or less per 100 moles of copper.

[0109] Glass may contain a composition of mixed oxides, for example, one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. Transition metals may be selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni); alkali metals may be selected from the group consisting of lithium (Li), sodium (Na), and potassium (K); and alkaline earth metals may be one or more selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0110] Selectively, the conductive resin layer may be formed on a sintered metal layer, for example, in a manner that completely covers the sintered metal layer. On the other hand, the first external electrode 131 and the second external electrode 132 may not include a sintered metal layer, in which case the conductive resin layer can be in direct contact with the capacitor body 110.

[0111] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the band portion) in which the conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., the band portion) in which the sintered metal layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. In other words, the conductive resin layer may be formed on the sintered metal layer and may be formed in a manner that completely covers the sintered metal layer.

[0112] The conductive resin layer contains a resin and a conductive metal.

[0113] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding and shock-absorbing properties and can be mixed with conductive metal powder to make a paste. For example, it may include phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0114] The conductive metal contained in the conductive resin layer serves to enable electrical connection with the first internal electrode layer 121 and the second internal electrode layer 122 or the sintered metal layer.

[0115] The conductive metal contained in the conductive resin layer may be spherical, flake-shaped, or a combination thereof. In other words, the conductive metal may consist solely of flake-shaped metal, solely of spherical metal, or a mixture of flake-shaped and spherical metal.

[0116] Here, "spherical" can include forms that are not perfectly spherical, for example, forms in which the ratio of the length of the major axis to the length of the minor axis (major axis / minor axis) is 1.45 or less. "Flake-shaped powder" means powder having a flat and elongated shape and is not particularly limited, but for example, the ratio of the length of the major axis to the length of the minor axis (major axis / minor axis) may be 1.95 or more.

[0117] The first external electrode 131 and the second external electrode 132 may further include a plating layer disposed on the outside of the conductive resin layer.

[0118] The plating layer may include nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), either alone or in alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or a configuration in which nickel (Ni) and tin (Sn) plating layers are sequentially laminated, or a configuration in which tin (Sn) plating layers, nickel (Ni) plating layers, and tin (Sn) plating layers are sequentially laminated. The plating layer may also include multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.

[0119] The plating layer can improve the mountability of the multilayer capacitor 100 on the substrate, structural reliability, durability against external elements, heat resistance, and equivalent series resistance (ESR).

[0120] The following describes a method for manufacturing a multilayer ceramic capacitor 100 according to one embodiment.

[0121] A multilayer ceramic capacitor 100 according to one embodiment may be manufactured by the following steps: mixing barium titanate-based main component powder and auxiliary component powder to produce a dielectric slurry; mixing nickel (Ni) and tin (Sn)-containing compounds to produce a conductive paste; manufacturing a dielectric green sheet using the dielectric slurry; printing the conductive paste onto the surface of the dielectric green sheet to form a conductive paste layer; laminating the dielectric green sheets on which the conductive paste layer is formed to produce a dielectric green sheet laminate; firing the dielectric green sheet laminate to produce a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body.

[0122] The barium titanate-based main component powder may contain one or more compounds selected from, for example, BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Ca)O3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, and (Ba,Sr)(Ti,Sn)O3, as compounds containing barium (Ba) and titanium (Ti).

[0123] The auxiliary powder may contain one or more compounds selected from bismuth (Bi)-containing compounds, aluminum (Al)-containing compounds, gallium (Ga)-containing compounds, and indium (In)-containing compounds.

[0124] Furthermore, the auxiliary component powder may further contain one or more compounds selected from Mg-containing compounds, Si-containing compounds, V-containing compounds, Tb-containing compounds, and Dy-containing compounds.

[0125] Each of the auxiliary powders may be mixed in an amount of more than 0.1 moles but no more than 5 moles per 100 moles of barium titanate-based main component powder, for example, in amounts of 0.2 to 4.5 moles, 0.4 to 4 moles, 0.6 to 3.5 moles, or 0.8 to 3.0 moles. When the auxiliary powders are mixed within the above content ranges, it is possible to achieve low-temperature firing of the dielectric, improve the degradation of the internal electrodes, and enhance the connectivity of the internal electrodes. Furthermore, it is possible to reduce the movement of oxygen vacancies through the formation of a Schottky barrier and a reduction in leakage current, thereby improving density and reliability.

[0126] The auxiliary component powders, such as Bi-containing compounds, Al-containing compounds, Ga-containing compounds, and In-containing compounds, may each be included in the form of oxides, nitrates, salt compounds, or sols dispersed in organic solvents.

[0127] The dielectric slurry may be manufactured by further mixing in a solvent with additives such as dispersants, binders, plasticizers, lubricants, and antistatic agents.

[0128] The dispersant may include, for example, a phosphate ester-based dispersant, a polycarboxylic acid-based dispersant, or a combination thereof. The dispersant may be mixed in an amount of 0.1 to 5 parts by weight per 100 parts by weight of the barium titanate-based main component powder, for example, 0.3 to 3 parts by weight. When the dispersant is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0129] The binder may be, for example, an acrylic resin, a polyvinyl butyl resin, a polyvinyl acetal resin, or an ethyl cellulose resin. The binder may be added in an amount of 0.1 to 50 parts by weight per 100 parts by weight of the barium titanate-based main component powder, for example, 3 to 30 parts by weight. When the binder is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0130] The plasticizer may be, for example, phthalate compounds such as dioctyl phthalate, benzyl butyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, and di(2-ethylbutyl) phthalate; adipic acid compounds such as dihexyl adipic acid and di(2-ethylhexyl) adipic acid; glycol compounds such as ethylene glycol, diethylene glycol, and triethylene glycol; or glycol ester compounds such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutylate), and triethylene glycol di(2-ethylhexanoate). The plasticizer may be added in an amount of 0.1 to 20 parts by weight per 100 parts by weight of the barium titanate main component powder, for example, in an amount of 1 to 10 parts by weight. When the plasticizer is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0131] The solvent may be an aqueous solvent such as water; an alcohol solvent such as ethanol, methanol, benzyl alcohol, or methoxyethanol; a glycol solvent such as ethylene glycol or diethylene glycol; a ketone solvent such as acetone, methyl ethyl ketone, methyl isobutyl ketone, or cyclohexanone; an ester solvent such as butyl acetate, ethyl acetate, carbitol acetate, or butyl carbitol acetate; an ether solvent such as methyl cellosolve, ethyl cellosolve, butyl ether, or tetrahydrofuran; or an aromatic solvent such as benzene, toluene, or xylene. The solvent can be an alcohol or aromatic solvent, for example, depending on the solubility and dispersibility of the various additives contained in the dielectric slurry.

[0132] The solvent may be mixed in an amount of 50 to 1000 parts by weight per 100 parts by weight of the barium titanate-based main component powder, for example, 100 to 500 parts by weight. When the solvent is mixed within the above content range, the dielectric slurry component may be sufficiently mixed, and the solvent can be easily removed thereafter.

[0133] The aforementioned dielectric slurry can be mixed using a wet ball mill or a stirring mill.

[0134] When using zirconia balls in a wet ball mill, a large number of zirconia balls with diameters ranging from 0.1 mm to 10 mm can be used for wet mixing for 8 to 48 hours, or 10 to 24 hours.

[0135] The manufactured dielectric slurry is formed into the dielectric layer after firing.

[0136] Methods for forming the manufactured dielectric slurry into a sheet shape include tape molding methods such as the doctor blade method and the calender roll method, or, for example, an on-roll molding coater with a head discharge system. A dielectric green sheet can then be obtained by drying the molded body.

[0137] The conductive paste may be manufactured by mixing nickel (Ni) and tin (Sn)-containing compounds.

[0138] The conductive paste may be manufactured by further mixing one or more conductive metals selected from copper (Cu), silver (Ag), palladium (Pd), gold (Au), and alloys thereof, in addition to nickel (Ni).

[0139] Tin (Sn)-containing compounds may include tin (Sn) oxides, nitrates, salt compounds, or sol forms dispersed in organic solvents.

[0140] The tin (Sn)-containing compound may be mixed in an amount exceeding 0.1 moles but not exceeding 5 moles per 100 moles of barium titanate-based main component powder, for example, in amounts of 0.2 to 4.5 moles, 0.4 to 4 moles, 0.6 to 3.5 moles, or 0.8 to 3.0 moles. When the tin (Sn)-containing compound is included within the above content ranges, the movement of oxygen vacancies can be reduced through a decrease in leakage current, thereby improving density and reliability.

[0141] The tin (Sn)-containing compound and the auxiliary powder may be mixed such that the molar ratio of the auxiliary powder to the tin (Sn)-containing compound is 0.1 to 1, for example, 0.12 to 0.98, 0.14 to 0.96, 0.16 to 0.94, 0.18 to 0.92, or 0.2 to 0.9. When the molar ratio of the auxiliary powder to the tin (Sn)-containing compound is within the above range, it is possible to achieve low-temperature firing of the dielectric, improve the degradation of internal electrodes, improve electrode connectivity, and also improve the density and reliability of the multilayer ceramic capacitor even under low-temperature firing conditions.

[0142] The conductive paste may further contain a binder and a solvent.

[0143] Additionally, barium titanate powder may be mixed in as a co-material if necessary. The co-material can act to suppress the sintering of the conductive powder during the firing process. A conductive paste layer is formed by applying the conductive paste to the surface of the dielectric green sheet in a predetermined pattern using various printing methods such as screen printing or transfer methods.

[0144] Next, a dielectric green sheet laminate is manufactured by stacking multiple dielectric green sheets with internal electrode patterns formed on them in layers, and then pressing them in the stacking direction. At this time, dielectric green sheets and internal electrode layer patterns can be stacked such that dielectric green sheets are positioned on the upper and lower surfaces of the dielectric green sheet laminate in the stacking direction.

[0145] The step of cutting the manufactured dielectric green sheet laminate to a predetermined size by dicing or other means can be selectively performed.

[0146] Furthermore, the dielectric green sheet laminate can be solidified and dried to remove plasticizers and other substances as needed, and after solidification and drying, it can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container along with media and polishing fluid, and rotational motion or vibration is applied to the barrel container to polish away unnecessary parts such as burrs generated during cutting. After barrel polishing, the dielectric green sheet laminate may be washed with a cleaning solution such as water and then dried.

[0147] Next, the dielectric green sheet laminate can be debindered (plasticized) and fired to manufacture a capacitor body.

[0148] The debinding treatment conditions can be appropriately adjusted depending on the composition of the dielectric layer and the internal electrode layer. For example, the heating rate during debinding may be 5°C / hour to 300°C / hour, the support temperature may be 180°C to 400°C, and the temperature maintenance time may be 0.5 hours to 24 hours. The atmosphere during debinding may be air or a reducing atmosphere.

[0149] The firing conditions can be appropriately adjusted depending on the main component composition of the dielectric layer and the main component composition of the internal electrode layer. For example, firing may be carried out at a temperature of 1100°C to 1400°C, or for example, at a temperature of 1200°C to 1350°C. Furthermore, firing may be carried out for 0.5 hours to 8 hours, for example, 1 hour to 3 hours. Also, firing may be carried out in a reducing atmosphere, for example, a humidified atmosphere of a mixed gas of nitrogen and hydrogen, or for example, under conditions of a hydrogen concentration of 1.0% or less. If the internal electrode layer contains nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere should be 1.0 × 10⁻⁶. -14 MPa to 1.0×10 -10 MPa is also acceptable.

[0150] After firing, annealing can be performed as needed. Annealing is a process to re-oxidize the dielectric layer, and it can be performed when firing is carried out in a reducing atmosphere. The conditions for the annealing process can also be appropriately adjusted depending on the composition of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 to 20 hours, and the heating rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be a humidified nitrogen gas (N2) atmosphere, and the oxygen partial pressure may be 1.0 × 10⁻⁶. -9 MPa to 1.0×10 -5 MPa is also acceptable.

[0151] For humidifying nitrogen gas or mixed gases during debinding, calcination, or annealing, a wetter, for example, can be used, in which case the water temperature may be between 5°C and 75°C. Debinding, calcination, and annealing can be performed continuously or independently.

[0152] Selectively, the third and fourth surfaces of the manufactured capacitor body 110 can be subjected to surface treatments such as sand-frusting, laser irradiation, and barrel polishing. By performing such surface treatments, the edges of the first and second internal electrode layers can be exposed on the outermost surfaces of the third and fourth surfaces, thereby improving the electrical connection between the first and second external electrodes and the first and second internal electrode layers, and potentially facilitating the formation of alloy parts.

[0153] Next, an external electrode is formed on one surface of the manufactured capacitor body 110.

[0154] For example, a sintered metal layer can be formed by applying a paste for forming a sintered metal layer with an external electrode and then sintering it.

[0155] The paste for forming a sintered metal layer may contain conductive metals and glass. The explanation of conductive metals and glass is the same as described above, so a repetition of the explanation will be omitted. The paste for forming a sintered metal layer may also selectively contain binders, solvents, dispersants, plasticizers, oxide powders, etc. Binders can be, for example, ethyl cellulose, acrylic, butyral, etc., and solvents can be, for example, organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or aqueous solvents.

[0156] Methods for applying the sintered metal layer-forming paste to the outer surface of the capacitor body 110 include various printing methods such as dipping and screen printing, application methods using dispensers, and spraying methods using sprayers. The sintered metal layer-forming paste is applied to at least the third and fourth surfaces of the capacitor body 110, and may also be applied to a portion of the first, second, fifth, or sixth surfaces where the band portions of the first and second external electrodes are selectively formed.

[0157] Subsequently, the capacitor body 110 coated with the paste for forming a sintered metal layer is dried and sintered at a temperature of 700°C to 1000°C for 0.1 to 3 hours to form a sintered metal layer.

[0158] Selectively, a conductive resin layer can be formed by applying a conductive resin layer-forming paste to the outer surface of the obtained capacitor body 110 and then curing it.

[0159] The paste for forming a conductive resin layer may contain a resin and, selectively, a conductive metal or a non-conductive filler. The explanations of conductive metals and resins are the same as those described above, so repeated explanations will be omitted. The paste for forming a conductive resin layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Binders can be, for example, ethyl cellulose, acrylic, butyral, etc., and solvents can be organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or aqueous solvents.

[0160] As an example, the conductive resin layer can be formed by dipping the capacitor body 110 into a conductive resin layer forming paste and then curing it, printing the conductive resin layer forming paste onto the surface of the capacitor body 110 using screen printing or gravure printing, or applying the conductive resin layer forming paste to the surface of the capacitor body 110 and then curing it.

[0161] Next, a plating layer is formed on the outside of the conductive resin layer.

[0162] For example, the plating layer may be formed by a plating method, or by sputtering or electroplating (electric deposition).

[0163] The embodiments described above will be explained in more detail below through the examples. However, the following examples are for illustrative purposes only and do not limit the scope of rights.

[0164] (Manufacturing of multilayer ceramic capacitors) [Examples 1 to 10 and Comparative Examples 1 to 6] A dielectric slurry was prepared by mixing barium titanate (BaTiO3) as the main component powder and bismuth oxide (Bi2O3) as a secondary component powder. At this time, the Bi2O3 was mixed so that the Bi content was as shown in Table 1 below, relative to 100 moles of the BaTiO3 main component powder.

[0165] During the manufacturing of the dielectric slurry, mixing was carried out by using zirconia balls (ZrO2 balls) as a dispersion medium, adding them together with ethanol / toluene, a wetting dispersant, and polyvinyl butyral (PVB) resin as a binder, and then mechanically milling the mixture.

[0166] Dielectric green sheets were manufactured using a head-dispensing type on-roll molding coater with the manufactured dielectric slurry.

[0167] A conductive paste containing Ni and SnO2 was printed onto the surface of a dielectric green sheet to form a conductive paste layer. The dielectric green sheets with the conductive paste layer were then laminated and compressed to produce a dielectric green sheet laminate. At this time, SnO2 was mixed in the amount shown in Table 1 below, per 100 moles of BaTiO3 main component powder.

[0168] The dielectric green sheet laminate was subjected to a plasticizing process at a temperature of 400°C or lower and in a nitrogen atmosphere, followed by firing at a firing temperature of 1300°C or lower and a hydrogen concentration of 1.0%H2 or lower.

[0169] Next, multilayer ceramic capacitors were manufactured through processes such as external electrode assembly and plating.

[0170] In Table 1 below, the Bi and Sn content is shown based on 100 moles of BaTiO3 main component powder.

[0171] [Table 1]

[0172] [Evaluation 1: TEM-EDS line profile] TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line profiles were performed on the multilayer ceramic capacitors manufactured in Examples 1 to 10 and Comparative Examples 1 to 6, and the results are shown in Figure 8.

[0173] Specifically, after curing the multilayer ceramic capacitor in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body were polished to half a depth in the L-axis direction. After fixing, the samples were maintained in a vacuum atmosphere chamber to obtain cross-sectional samples that allowed observation of the active region where the dielectric layer and the internal electrode layer intersected. Next, the active region of the cross-sectional sample, which included an area of ​​approximately 7 μm × 7 μm where eight dielectric layers and eight internal electrode layers were visible, was measured using a TEM (transmission electron microscope) with an acceleration voltage of 200 kV using a Xe-FIB (focused ion beam). Then, the active region of the cross-sectional sample was divided into three equal parts: upper, middle, and lower. Three linear sections were taken for each region, from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, and TEM-EDS line analysis was performed on a total of nine sections.

[0174] Figure 8 shows a TEM (transmission electron microscope) line profile image of a portion of the active region according to Example 2.

[0175] Referring to Figure 8, observation of the active region of the multilayer ceramic capacitor according to Example 2 revealed that Sn is present in the internal electrode layer and Bi is present in the dielectric layer. It was confirmed that the Sn content in the internal electrode layer is even higher at the interface with the dielectric layer than in the central region, and the Bi content in the dielectric layer is even higher at the interface with the internal electrode layer than in the central region.

[0176] [Evaluation 2: SEM Analysis] SEM (scanning electron microscope) analysis was performed on the multilayer ceramic capacitors manufactured in Examples 1 to 10 and Comparative Examples 1 to 6, and the results are shown in Figures 9 and 10 and Table 2 below.

[0177] Specifically, the active region of the cross-sectional sample obtained in Evaluation 1 was measured using SEM under the condition of an acceleration voltage of 2.0 kV in an area of ​​approximately 5 μm × 5 μm where at least four dielectric layers and internal electrode layers were visible. The density of the dielectric layer was confirmed through the SEM image of the measured cross-sectional sample.

[0178] Figure 9 shows an SEM (scanning electron microscope) analysis image of a portion of the active region according to Example 2, and Figure 10 shows an SEM (scanning electron microscope) analysis image of a portion of the active region according to Comparative Example 6.

[0179] Referring to Figures 9 and 10, it can be seen that in Example 2, the dielectric layer has almost no pores and exhibits high density, while in Comparative Example 6, the dielectric layer has a large area of ​​pores and therefore low density. As a result, the multilayer ceramic capacitor according to one embodiment can have a dielectric layer with excellent density even under low-temperature firing conditions.

[0180] On the other hand, after determining the pore area using the SEM image, if the pore area was 1% or more per 5 μm × 5 μm area within the dielectric layer, the density was determined to be X, and if the pore area was less than 1%, the density was determined to be ○. The results are shown in Table 2 below.

[0181] [Rating 3: Reliability] The accelerated lifetime reliability (MTTF) of the multilayer ceramic capacitors manufactured in Examples 1 to 10 and Comparative Examples 1 to 6 was measured using the method described below, and the results are shown in Table 2 below.

[0182] The mean time to failure (MTTF) was measured by determining the mean time to failure (hr) under conditions of 125°C, 9.45V voltage, and 48 hours.

[0183] In Table 2 below, the MTTF values ​​are shown as ratios based on the results of Comparative Example 5.

[0184] [Table 2]

[0185] As can be seen from Table 2 above, in Examples 1 to 10, where the Sn content is even higher at the interface than in the central region of the internal electrode layer, and the Bi content is higher at the interface than in the central region of the dielectric layer, the density and reliability are all superior compared to Comparative Examples 1 to 6, which do not contain either Sn or Bi.

[0186] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and can be implemented in various ways within the scope of the claims, description of the invention, and attached drawings, and these also naturally fall within the scope of the present invention. [Explanation of symbols]

[0187] 100: Multilayer ceramic capacitor 110: Capacitor body 111: Dielectric layer 121: First internal electrode layer 122: Second internal electrode layer 131: 1st external electrode 132:Second external electrode

Claims

1. A capacitor body comprising multiple dielectric layers and multiple internal electrode layers stacked with the dielectric layers in between, The capacitor body includes an external electrode disposed on the outside of the capacitor body, The aforementioned internal electrode layer contains tin (Sn), The dielectric layer comprises one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In). The tin (Sn) content is even higher in the stacking direction at the interface between the internal electrode layer and the dielectric layer than in the central region of the internal electrode layer. A multilayer ceramic capacitor in which the content of element (X) is higher in the stacking direction at the interface between the dielectric layer and the internal electrode layer than in the central region of the dielectric layer.

2. The tin (Sn) is formed at the interface with the dielectric layer, SnO ２ A multilayer ceramic capacitor according to claim 1, which is included in the form.

3. The multilayer ceramic capacitor according to claim 1, wherein the internal electrode layer further comprises nickel (Ni).

4. The multilayer ceramic capacitor according to claim 3, wherein the element (X) is present at the interface with the internal electrode layer in the form of an intermetallic compound with the nickel (Ni).

5. The internal electrode layer further contains nickel (Ni), The tin (Sn) is formed at the interface with the dielectric layer, SnO ２ Included in form, The multilayer ceramic capacitor according to claim 1, wherein the element (X) is present at the interface with the internal electrode layer in the form of an intermetallic compound with the nickel (Ni).

6. The multilayer ceramic capacitor according to claim 1, wherein the internal electrode layer further comprises one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In).

7. The multilayer ceramic capacitor according to claim 6, wherein the content of element (X) is higher in the internal electrode layer at the interface with the dielectric layer than in the central region of the internal electrode layer in the stacking direction.

8. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer further comprises tin (Sn).

9. The multilayer ceramic capacitor according to claim 8, wherein the tin (Sn) content is higher in the dielectric layer at the interface with the internal electrode layer than in the central region of the dielectric layer in the stacking direction.

10. The multilayer ceramic capacitor according to claim 1, wherein, during TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis of a linear section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, the atomic percentage of tin (Sn) is at its maximum value at the interface between the dielectric layer and the internal electrode layer.

11. The multilayer ceramic capacitor according to claim 1, wherein, during TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis of a linear section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, the atomic percentage of bismuth (Bi) is at its maximum value at the interface between the dielectric layer and the internal electrode layer.

12. The multilayer ceramic capacitor according to claim 1, wherein the average thickness of the interface between the dielectric layer and the internal electrode layer is 0.01 nm to 100 nm.

13. The dielectric layer further comprises a barium titanate-based compound, The barium titanate-based compound is BaTiO ３ , Ba(Ti,Zr)O ３ , Ba(Ti,Sn)O ３ , (Ba,Ca)TiO ３ , (Ba,Ca)(Ti,Ca)O ３ , (Ba,Ca)(Ti,Zr)O ３ , (Ba,Ca)(Ti,Sn)O ３ , (Ba,Sr)TiO ３ , (Ba,Sr)(Ti,Zr)O ３ and (Ba,Sr)(Ti,Sn)O ３ The multilayer ceramic capacitor according to claim 1, comprising one or more selected from the above.

14. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer contains pores in an area of ​​less than 1% per 5 μm × 5 μm area within the dielectric layer.

15. A step of mixing barium titanate-based main component powder and auxiliary component powder to produce a dielectric slurry, A step of mixing nickel (Ni) and tin (Sn)-containing compounds to produce a conductive paste, The steps include: manufacturing a dielectric green sheet using the dielectric slurry, and printing the conductive paste onto the surface of the dielectric green sheet to form a conductive paste layer; The steps include: manufacturing a dielectric green sheet laminate by stacking dielectric green sheets on which the conductive paste layer is formed; The steps include: firing the dielectric green sheet laminate to manufacture a capacitor body including a dielectric layer and an internal electrode layer; The step includes forming an external electrode on one surface of the capacitor body, The aforementioned auxiliary component powder contains one or more compounds selected from bismuth (Bi)-containing compounds, aluminum (Al)-containing compounds, gallium (Ga)-containing compounds, and indium (In)-containing compounds. The internal electrode layer contains tin (Sn), and the dielectric layer contains one or more elements (X) selected from bismuth (Bi), aluminum (Al), gallium (Ga), and indium (In). The tin (Sn) content is even higher in the stacking direction at the interface between the internal electrode layer and the dielectric layer than in the central region of the internal electrode layer. A method for manufacturing a multilayer ceramic capacitor, wherein the content of element (X) in the stacking direction is higher at the interface between the dielectric layer and the internal electrode layer than in the central region of the dielectric layer.

16. The method for producing a multilayer ceramic capacitor according to claim 15, wherein the tin (Sn)-containing compound includes an oxide, a nitrate, a salt compound, or a sol dispersed in an organic solvent.

17. The method for producing a multilayer ceramic capacitor according to claim 15, wherein the bismuth (Bi)-containing compound, aluminum (Al)-containing compound, gallium (Ga)-containing compound, and indium (In)-containing compound each include an oxide, a nitrate, a salt compound, or a sol dispersed in an organic solvent.

18. The method for manufacturing a multilayer ceramic capacitor according to claim 15, wherein the tin (Sn)-containing compound is mixed in an amount of more than 0.1 moles but no more than 5 moles with respect to 100 moles of the barium titanate-based main component powder.

19. The method for manufacturing a multilayer ceramic capacitor according to claim 15, wherein the auxiliary component powder is mixed with 100 moles of the barium titanate-based main component powder in an amount of more than 0.1 moles but no more than 5 moles.

20. The method for manufacturing a multilayer ceramic capacitor according to claim 15, wherein the tin (Sn)-containing compound and the auxiliary component powder are mixed such that the molar ratio of the auxiliary component powder to the tin (Sn)-containing compound is 0.1 to 1.

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