Wireless power receiver and wireless power supply system

Abstract

To achieve low-cost, efficient, and always-on wireless power supply. [Solution] The wireless power receiving device according to this disclosure comprises an antenna, a power generation circuit, a charging capacity, a power consumption circuit, a voltage-frequency conversion circuit, and a backscatter circuit. The charging capacity is charged with power generated by the power generation circuit using a received signal based on radio waves received by the antenna, and discharged by power consumption by the power consumption circuit. The voltage-frequency conversion circuit converts the terminal voltage of the charging capacity into a frequency and generates a control signal with a period corresponding to the reference frequency and the frequency of the signal based on the oscillation signal. The backscatter circuit performs amplitude modulation in the backscatter of the radio waves received by the antenna by changing the impedance of the antenna with a period corresponding to the frequency of the control signal from the voltage-frequency conversion circuit. The antenna transmits a backscatter signal whose amplitude has been modulated according to the control signal by backscatter based on the received radio waves.

Description

Technical Field

[0001] The present disclosure relates to a wireless power receiver and a wireless power supply system.

Background Art

[0002] Conventionally, a technology called ambient power generation using minute energy existing in the environment, such as vibration, heat, electromagnetic waves, and temperature differences, is known. Since this ambient power generation technology can eliminate the need for power supply wiring and battery replacement, it is expected to be used as an independent power source for small electronic devices such as IoT (Internet of Things) sensors and beacon tags. For example, there is a technology related to wireless power supply in which radio waves (electromagnetic waves) are emitted from a transmitter toward small electronic devices (power receivers) such as IoT sensors and beacon tags, and radio wave power generation (ambient power generation) is performed using the radio waves received by the power receivers.

[0003] In such a wireless power supply system, in order to continuously operate small electronic devices (power receivers) such as IoT sensors and beacon tags by constantly supplying power, it is necessary to supply power exceeding the power consumption in the power receiver to stabilize its operation. For example, Patent Document 1 discloses a system that transmits the state of the power receiving side to the transmitting side using short-range wireless communication compliant with the Bluetooth (registered trademark) Low Energy standard.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, when transmitting the status of the receiving side to the transmitting side using short-range wireless communication, there was a problem in that the cost increased because the receiving side's status was transmitted to the transmitting side at a frequency different from the frequency used for radio wave generation, requiring a separate antenna. Furthermore, in a configuration that periodically transmits information from the receiving side, there were efficiency issues, such as the need to continuously raise the generated voltage and discard generated power if the generated power temporarily exceeded the power consumption. Also, there was a risk of power shortage and shutdown if the generated power temporarily fell below the power consumption, while a configuration that compensated for the power shortage by charging a large capacity had efficiency issues, such as the long time it took to complete charging.

[0006] This disclosure is made in view of the above, and one of its purposes is to realize a low-cost and efficient continuous power supply wireless power supply system. [Means for solving the problem]

[0007] The wireless power receiving device according to this disclosure comprises an antenna, a power generation circuit, a charging capacity, a power consumption circuit, a voltage-frequency conversion circuit, and a backscatter circuit. The power generation circuit generates power using a received signal based on radio waves received by the antenna. The charging capacity is charged by the power generated by the power generation circuit. The power consumption circuit consumes the power charged in the charging capacity. The voltage-frequency conversion circuit converts the terminal voltage of the charging capacity into a frequency. The backscatter circuit performs amplitude modulation in the backscatter of radio waves received by the antenna by changing the impedance of the antenna at a period corresponding to the frequency of the control signal from the voltage-frequency conversion circuit. The voltage-frequency conversion circuit includes a first frequency-impedance conversion circuit, a voltage source, a current source, a voltage difference detection circuit, a voltage-controlled oscillation circuit, and a second frequency-impedance conversion circuit. The first frequency-impedance conversion circuit converts the frequency of a periodic signal based on a reference frequency into a first impedance. The voltage source generates a first voltage and an input voltage based on the terminal voltage. The current source generates a current using the first voltage and the first impedance. The voltage difference detection circuit generates a control voltage according to the difference between the input voltage from the voltage source and a second voltage based on the current from the current source. The voltage-controlled oscillator circuit generates an oscillation signal according to the control voltage from the voltage difference detection circuit. The second frequency-impedance conversion circuit converts the frequency of the signal based on the oscillation signal to a second impedance. The voltage difference detection circuit generates the second voltage using the current from the current source and the second impedance. The first frequency-impedance conversion circuit, the current source, and the second frequency-impedance conversion circuit are connected in series between the terminal voltage and the reference potential. The control signal is a signal with a period corresponding to the reference frequency and the frequency of the signal based on the oscillation signal. The antenna transmits a backscatter signal, amplitude-modulated according to the control signal by backscatter based on the received radio waves. [Effects of the Invention]

[0008] According to this disclosure, it is possible to realize a low-cost and efficient continuous power supply wireless power supply system. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 shows an example of the configuration of a wireless power supply system according to an embodiment. [Figure 2] Figure 2 shows an example of the configuration of the transceiver shown in Figure 1. [Figure 3] Figure 3 shows an example of the configuration of the wireless receiver shown in Figure 1. [Figure 4] Figure 4 is a diagram illustrating the transmission and reception signals in wireless power transfer according to an embodiment. [Figure 5] Figure 5 is a diagram illustrating the transmission and reception signals in wireless power transfer according to an embodiment. [Modes for carrying out the invention]

[0010] Hereinafter, embodiments of the wireless power receiver and wireless power supply system according to this disclosure will be described in detail with reference to the drawings.

[0011] In this disclosure, components having the same or substantially the same function as those described above in previously shown drawings are denoted by the same reference numerals, and explanations may be omitted as appropriate. Furthermore, even when representing the same or substantially the same parts, the dimensions and proportions may be shown differently in different drawings. In addition, for example, from the viewpoint of ensuring the readability of the drawings, reference numerals may be assigned only to the main components in the explanation of each drawing, and reference numerals may not be assigned to components having the same or substantially the same function as those described above in previously shown drawings.

[0012] In addition, in the descriptions of this disclosure, components having the same or substantially the same function may be distinguished by adding alphanumeric characters to the end of the reference numeral. Alternatively, if multiple components having the same or substantially the same function are not to be distinguished, they may be described together by omitting the alphanumeric characters at the end of the reference numeral.

[0013] The wireless power supply system described herein is a system that provides wireless power from a transmitting / receiving unit on the transmitting side to a wireless power receiver on the receiving side using a continuous power supply method. In this disclosure, wireless power supply refers to the wireless supply of energy for harvesting from the transmitting side to the receiving side, and the power supply unit obtaining electricity at the receiving side by generating power using the received energy.

[0014] In other words, the wireless power supply system described herein is a system that supplies radio waves from a transceiver to a wireless power receiver as an energy source for generating electricity (environmental power generation) in the wireless power receiver. In other words, the wireless power supply system described herein is a power generation system that generates electricity in a wireless power receiver that receives radio waves from a transceiver, by generating electricity using the energy of the received radio waves.

[0015] In this disclosure, the energy used for energy harvesting is, for example, radio waves, but is not limited to them. The energy supplied wirelessly from the transmitting side to the receiving side can be any energy that can be used for energy harvesting at the receiving side, and may be other electromagnetic waves besides radio waves.

[0016] In this disclosure, "transmission of power" refers to the transmission of "radio waves (energy)" that can be used as energy in radio wave power generation (environmental power generation) at the receiving end. Furthermore, "transmission" of radio waves (power) refers to "transmitting or sending out" radio waves without specifying a destination (recipient). In this disclosure, "connection" means "electrical connection".

[0017] FIG. 1 is a diagram showing an example of the configuration of a wireless power supply system 1 according to an embodiment. As shown in FIG. 1, the wireless power supply system 1 includes a transceiver 3 and a wireless power receiver 5. Each of the transceiver 3 and the wireless power receiver 5 is configured to be able to transmit and receive radio waves in a frequency band including a predetermined frequency for radio wave power generation. Note that the transceiver 3 and the wireless power receiver 5 may be referred to as a master unit and a slave unit, respectively.

[0018] The transceiver 3 is a power supply configured to be able to continuously supply power to the wireless power receiver 5. The transceiver 3 controls the transmission power to the wireless power receiver 5, that is, the signal level of the transmitted radio wave, according to the power supply information from the wireless power receiver 5.

[0019] As shown in FIG. 1, the transceiver 3 has an antenna 31, a transmission unit 301, and a reception unit 302.

[0020] The antenna 31 is configured to be able to transmit and receive radio waves (transmission signals) in a frequency band including a predetermined frequency for radio wave power generation in the wireless power receiver 5.

[0021] The transmission unit 301 is connected to the antenna 31. The transmission unit 301 transmits radio waves in a frequency band including a predetermined frequency for radio wave power generation in the wireless power receiver 5 through the antenna 31, that is, the power generation power.

[0022] The reception unit 302 is connected to the antenna 3; The reception unit 302 receives the power reception transmission signal (reception signal) transmitted from the wireless power receiver 5 through the antenna 31, demodulates two modulation signals included in the reception signal, and controls the output (signal level of the transmission signal) by the transmission unit 301 based on the frequency ratio thereof.

[0023] The wireless receiver 5 is an electronic device configured to operate using radio waves from the transceiver 3. The wireless receiver 5 is a small electronic device such as an IoT sensor or a beacon tag. The wireless receiver 5 receives radio waves from the transceiver 3, generates power using the received radio waves as an energy source, and operates using the generated power. The wireless receiver 5 also transmits power supply information indicating its own power status using backscatter.

[0024] As shown in Figure 1, the wireless receiver 5 includes an antenna 51, a power generation circuit 52, a charging capacity 53, a power consumption circuit 54, a voltage-frequency conversion circuit 55, and a backscatter circuit 56.

[0025] The antenna 51 is configured to transmit and receive radio waves in a frequency band that includes a predetermined frequency for radio wave generation in the wireless receiver 5.

[0026] The input terminal of the power generation circuit 52 is connected to the antenna 51. The power generation circuit 52 generates power by radio wave power generation (environmental power generation) using radio waves received by the antenna 51. Specifically, the power generation circuit 52 includes a rectifier circuit that converts a high-frequency signal (radio wave signal) based on radio waves received by the antenna 51 into DC power.

[0027] The charging capacity 53 has one end connected to ground potential (the negative power supply potential VSS, the reference potential) and the other end connected between the output terminal of the power generation circuit 52 and the input terminal of the power consumption circuit 54. The charging capacity 53 is the capacity that is charged by the DC power generated by the power generation circuit 52 and discharged by the DC power consumed by the power consumption circuit 54.

[0028] The power consumption circuit 54 is a circuit that operates at the terminal voltage VG of the charging capacity 53. In other words, the power consumption circuit 54 is a circuit that uses power generated by radio wave generation using radio waves from the transceiver 3 as its power source. To put it another way, in the wireless receiver 5, the antenna 51, the power generation circuit 52, the charging capacity 53, the voltage-frequency conversion circuit 55, and the backscatter circuit 56 are power supply devices that supply power to the power consumption circuit 54.

[0029] The input terminal of the voltage-frequency conversion circuit 55 is connected between the output terminal of the power generation circuit 52 and the input terminal of the power consumption circuit 54. The voltage-frequency conversion circuit 55 is a circuit that converts the terminal voltage VG of the charging capacity 53 into frequency. Specifically, the voltage-frequency conversion circuit 55 is a circuit that converts the terminal voltage VG of the charging capacity 53 into frequency with high accuracy by performing feedback operation of a frequency synchronization loop with respect to a reference frequency FREF in the voltage domain. The voltage-frequency conversion circuit 55 outputs a signal that corresponds to the frequency FREF of a periodic signal and the oscillation signal FOUT which indicates the voltage state of the terminal voltage VG synchronized with frequency FREF, i.e., a signal containing two pieces of frequency information.

[0030] The input terminal of the backscatter circuit 56 is connected to the output terminal of the voltage-frequency conversion circuit 55. The output terminal of the backscatter circuit 56 is connected to the antenna 51. The backscatter circuit 56 passively performs amplitude modulation by periodically changing the impedance of the antenna 51 in response to a signal containing two frequency pieces of information from the voltage-frequency conversion circuit 55. In other words, the backscatter circuit 56 transmits a backscatter signal (feed information) containing a reference frequency signal and a frequency synchronization signal corresponding to the two frequency pieces of information via the antenna 51, based on backscatter from the signal containing two frequency pieces of information from the voltage-frequency conversion circuit 55.

[0031] The configuration of the wireless power supply system 1 according to this embodiment will be described in more detail below with reference to the drawings.

[0032] (Regarding the configuration of the transmitter and receiver) Figure 2 shows an example of the configuration of the transceiver 3 in Figure 1. As shown in Figure 2, the transceiver 3 has an antenna 31, an oscillator circuit 32, an amplifier circuit 33, a circulator 34, a mixer 35, a bandpass filter 36, and a control unit 37. Here, the oscillator circuit 32, amplifier circuit 33, and circulator 34 are examples of the transmitter 301 in Figure 1. Also, the circulator 34, mixer 35, bandpass filter 36, and control unit 37 are examples of the receiver 302 in Figure 1.

[0033] The oscillation circuit 32 generates an oscillation signal (unmodulated signal) at a predetermined transmission frequency and outputs the generated signal.

[0034] The input terminal of the amplification circuit 33 is connected to the output terminal of the oscillation circuit 32. The output terminal of the amplification circuit 33 is also connected to the antenna 31 via the circulator 34. The amplification circuit 33 drives the antenna 31. The amplification circuit 33 also has a level adjustment function to adjust the signal level of the transmitted signal. Specifically, the amplification circuit 33 amplifies the oscillation signal from the oscillation circuit 32 with a gain controlled by the control unit 37, and adjusts the signal level of the transmitted signal transmitted from the antenna 31, that is, the signal strength of the radio waves from the antenna 31.

[0035] The circulator 34 is connected to the antenna 31, the amplification circuit 33, and the mixer 35. The circulator 34 is a circuit that prevents the transmission signal (unmodulated signal), which is the output of the amplification circuit 33, from being input to the mixer 35, while inputting the backscatter signal (amplitude-modulated signal) from the antenna 31 to the mixer 35. Specifically, the circulator 34 transmits the high-frequency power input from the terminal on the amplification circuit 33 side only to the terminal on the antenna 31 side. Also, the circulator 34 transmits the high-frequency power input from the terminal on the antenna 31 side only to the terminal on the mixer 35 side.

[0036] The pair of input terminals of mixer 35 are connected to the output terminal of the oscillator circuit 32 and the output terminal of the signal from antenna 31 of circulator 34, respectively. Mixer 35 is a frequency conversion circuit that obtains the frequency of the sum and difference from two input frequencies. Specifically, mixer 35 takes the signal from oscillator circuit 32 (unmodulated signal) and the backscatter signal (amplitude-modulated signal) from antenna 31 via circulator 34 as input and performs frequency conversion. This frequency conversion is the multiplication of the same frequencies. Therefore, mixer 35 outputs a DC signal and a modulated signal.

[0037] Here, the backscatter signal is an amplitude-modulated signal containing two frequency-modulated signals, as will be explained later with reference to Figure 3. The two frequency-modulated signals correspond to the periodic signal FREF and the oscillation signal FOUT in the voltage-frequency conversion circuit 55 of the wireless receiver 5 (see Figure 3). The periodic signal FREF is frequency information indicating the reference frequency. The oscillation signal FOUT is frequency-synchronized with respect to the reference frequency and is frequency information indicating the voltage state related to the terminal voltage VG of the charging capacity 53. In other words, the backscatter signal is a signal containing two types of frequency information: frequency information indicating the reference frequency and frequency information indicating the voltage state related to the terminal voltage VG of the charging capacity 53.

[0038] The input terminal of the bandpass filter 36 is connected to the output terminal of the mixer 35. The bandpass filter 36 receives the DC signal and the modulated signal from the mixer 35, removes the DC signal from the input signal, and outputs only the modulated signal (modulation frequency component). In other words, the bandpass filter 36 extracts two frequency modulated signals from the backscatter signal (amplitude modulated signal).

[0039] The input terminal of the control unit 37 is connected to the output terminal of the bandpass filter 36. The output terminal of the control unit 37 is also connected to the control terminal of the amplifier circuit 33. The control unit 37 receives the modulated signal from the bandpass filter 36 and controls the gain of the amplifier circuit 33 based on the modulation frequency information indicated by the input modulated signal. This modulation frequency information is based on two types of frequency information: frequency information indicating the reference frequency and frequency information indicating the voltage state related to the terminal voltage VG of the charging capacity. Specifically, the control unit 37 acquires the absolute value (frequency difference) of the frequency difference between the two frequency modulated signals demodulated from the backscatter signal (amplitude modulated signal) as voltage information.

[0040] As will be described later with reference to Figure 3, the frequency difference of voltage information in the wireless receiver 5 increases as the terminal voltage VG of the charging capacity 53 increases and decreases as it decreases. For this reason, if the frequency difference of the acquired voltage information is smaller than a predetermined threshold or the lower limit of the threshold range, the control unit 37 increases the gain of the amplification circuit 33 to increase the signal level of the transmitted signal (unmodulated signal). Also, if the frequency difference of the acquired voltage information is greater than a predetermined threshold or the upper limit of the threshold range, the control unit 37 decreases the gain of the amplification circuit 33 to decrease the signal level of the transmitted signal (unmodulated signal). On the other hand, if the frequency difference of the acquired voltage information is within a predetermined threshold or threshold range, the control unit 37 does not change the gain of the amplification circuit 33, that is, it does not change the signal level of the transmitted signal (unmodulated signal).

[0041] Furthermore, the voltage information may be the ratio of the frequencies (frequency ratio) of two frequency-modulated signals demodulated from the backscatter signal (amplitude-modulated signal). Here, the threshold or threshold range of the frequency difference or frequency ratio is predetermined and stored in the internal memory of the control unit 37, for example, based on the frequency difference or frequency ratio between the reference frequency signal corresponding to the periodic signal FREF and the frequency synchronization signal corresponding to the oscillation signal FOUT, when the terminal voltage VG of the charging capacity 53 is set from the viewpoint of the operational stability of the wireless receiver 5.

[0042] Thus, the backscatter signal from the wireless receiver 5 has the characteristic of outputting two frequencies: a frequency based on the reference frequency FREF and a frequency that varies according to the terminal voltage VG. The backscatter signal is modulated with respect to the transmission signal from the transceiver 3. For this reason, the transceiver 3 can extract only the backscatter signal by demodulating the transmission signal (oscillation signal) generated by the oscillation circuit 32 and the backscatter signal with the mixer 35. Consequently, in the transceiver 3, even if there are PVT fluctuations such as process (P) of the oscillation frequency of the oscillation circuit 32, power supply voltage (V), and temperature (junction temperature T), the demodulated backscatter signal has the characteristic of being insensitive to the PVT fluctuations of the oscillation circuit 32.

[0043] (Regarding the configuration of the wireless receiver) In wireless power supply intended for continuous power supply, it is important to transmit power supply information from the receiving side (wireless receiver 5) and appropriately control the transmitted power (signal level of the transmitted wave) from the transmitting side (transmitter / receiver 3) in order to suppress malfunctions due to insufficient generated power and reduce power waste due to surplus generated power.

[0044] Therefore, improvement in the conversion accuracy when converting the terminal voltage VG of the charging capacity 53 to frequency in the voltage-frequency conversion circuit 55 is desirable. In the wireless receiver 5, in order to improve the conversion accuracy, it is conceivable to implement the oscillation circuit as a frequency synchronization circuit. The frequency synchronization circuit may also be a frequency negative feedback circuit composed of a frequency comparison circuit, a voltage-controlled oscillator (VCO), etc. The frequency difference between the oscillation frequency of the voltage-controlled oscillator and the reference frequency is detected, and the voltage of the voltage-controlled oscillator is controlled so that the frequency difference approaches zero. By configuring this frequency synchronization circuit to perform feedback operation of the frequency synchronization loop in the voltage domain instead of the frequency domain, the accuracy of the frequency synchronization circuit can be improved.

[0045] For example, the voltage-frequency conversion circuit 55, which includes a frequency synchronization circuit for realizing an oscillation circuit, may be configured as described below. Figure 3 shows an example of the configuration of the wireless receiver 5 in Figure 1.

[0046] The voltage-frequency conversion circuit 55 includes an oscillator circuit 71, a 1 / 2 frequency divider circuit 72 (second frequency divider circuit), a frequency synchronization circuit 73, a 1 / N frequency divider circuit 74 (first frequency divider circuit), and an AND gate 75 (logic gate).

[0047] The output terminal of the oscillator circuit 71 is connected to the 1 / 2 frequency divider circuit 72 and the 1 / N frequency divider circuit 74. The oscillator circuit 71 is supplied with a fixed-level bias voltage (e.g., power supply potential Vdd) and oscillates according to the bias voltage, generating a signal at the reference frequency FREF (periodic signal FREF). The periodic signal FREF is a signal whose level changes periodically at the reference frequency FREF. The oscillator circuit 71 supplies the periodic signal FREF to the 1 / 2 frequency divider circuit 72 and the 1 / N frequency divider circuit 74, respectively.

[0048] As an example, the oscillator circuit 71 may have an inverter chain, a variable resistor element, and a capacitive element, and be configured as a relaxation-type oscillator circuit. The oscillator circuit 71 may also be configured with a circuit similar to that of the voltage-controlled oscillator circuit 81. This ensures circuit symmetry and allows for the construction of a circuit less susceptible to the effects of element variations. In other words, a line-symmetric circuit configuration can be achieved, enabling a layout configuration suitable for integrated circuits.

[0049] The 1 / 2 frequency divider circuit 72 divides the periodic signal FREF generated by the oscillator circuit 71 by 2. The 1 / 2 frequency divider circuit 72 supplies the 2-division periodic signal FREF to the first frequency-impedance conversion circuit 88 of the frequency synchronization circuit 73. The frequency of the 2-division periodic signal FREF is the frequency of the signal based on the periodic signal FREF, and can be expressed as FREF / 2 using the frequency of the periodic signal FREF. Note that the 1 / 2 frequency divider circuit 72 has a division ratio of 2, for example, but its division ratio may be variable.

[0050] The frequency synchronization circuit 73 is connected in parallel with the charging capacitor 53, and its output terminal is connected to one of the pair of input terminals of the AND gate 75. The frequency synchronization circuit 73 oscillates in accordance with the terminal voltage VG of the charging capacitor 53. At this time, the frequency synchronization circuit 73 performs feedback operation of the frequency synchronization loop in the voltage domain and outputs a high-precision oscillation signal FOUT from its output terminal to one of the pair of input terminals of the AND gate 75.

[0051] The frequency synchronization circuit 73 converts the frequency of the divided periodic signal FREF (FREF / 2) into an impedance (referred to as the first impedance Z1) by charging and discharging a capacitive element in accordance with the divided periodic signal FREF. The frequency synchronization circuit 73 generates a current (referred to as the first current IREF_S) corresponding to the first impedance Z1.

[0052] Furthermore, the frequency synchronization circuit 73 converts the frequency FOUT of the oscillation signal FOUT, generated by the oscillation operation, into an impedance (referred to as the second impedance Z2) by charging and discharging a capacitive element according to the frequency FOUT of the oscillation signal FOUT. The frequency synchronization circuit 73 further converts the converted second impedance Z2 into a second voltage VREF_R (second voltage) using a current (referred to as the second current IREF_R) equal to the first current IREF_S corresponding to the first impedance Z1. The frequency synchronization circuit 10 performs feedback operation of the frequency synchronization loop so that the difference between the input voltage VIN, based on the terminal voltage VG of the charged capacity 53, and the second voltage VREF_R approaches zero.

[0053] In the frequency synchronization circuit 73, in order to achieve high-precision frequency synchronization in the voltage domain, a second frequency-impedance conversion circuit 83 that converts the frequency FOUT of the oscillation signal to a second impedance Z2, and a first frequency-impedance conversion circuit 88 that converts the frequency of the divided periodic signal FREF to a first impedance Z1 are connected via a current source 85. The first frequency-impedance conversion circuit 88 and the second frequency-impedance conversion circuit 83 are each composed of corresponding switched-capacitor circuits. A switched-capacitor circuit is a circuit that limits current or voltage like a resistor by combining a switch and a capacitive element. As a result, the frequency synchronization circuit 73 is configured such that the frequency FOUT of the oscillation signal FOUT changes depending on the relative ratio between the input voltage VIN, which is based on the terminal voltage VG of the charging capacitance 53, and the characteristics of the elements in the voltage-frequency conversion circuit 55.

[0054] For example, the frequency synchronization circuit 73 includes a voltage-controlled oscillator circuit 81, a second frequency-impedance conversion circuit 83, a voltage source 84, a current source 85, a voltage difference detection circuit 86, and a first frequency-impedance conversion circuit 88. The voltage difference detection circuit 16, the voltage-controlled oscillator circuit 11, and the second frequency-impedance conversion circuit 13 are connected in a loop. This loop connection constitutes a frequency synchronization loop.

[0055] In the frequency synchronization circuit 73, the first frequency-impedance conversion circuit 88, the current source 85, and the second frequency-impedance conversion circuit 83 are connected in series between the power supply potential VDD and the negative power supply potential VSS (ground potential). In this configuration, the first frequency-impedance conversion circuit 88 and the second frequency-impedance conversion circuit 83 can be considered to be cascode-connected. This configuration allows the current path flowing through the first frequency-impedance conversion circuit 88 and the current path flowing through the second frequency-impedance conversion circuit 83 to be shared.

[0056] In other words, a common element (e.g., a transistor) provided in the common current path can generate a current corresponding to the reference frequency FREF and a current corresponding to the terminal voltage VG of the charging capacity 53. This reduces the effects of manufacturing process variations and improves the conversion accuracy when converting the terminal voltage VG of the charging capacity 53 to frequency, compared to a configuration in which the current flowing through the first frequency-impedance conversion circuit 88 is copied by a current mirror circuit and then passed through the second frequency-impedance conversion circuit 83.

[0057] Furthermore, the number of current paths for frequency impedance conversion can be reduced from two to one. This reduces the power consumption of the frequency synchronization circuit 73 compared to a configuration in which the current flowing through the first frequency-impedance conversion circuit 88 is copied by a current mirror circuit and then passed to the second frequency-impedance conversion circuit 83.

[0058] The voltage source 84 is connected between the potential of the terminal voltage VG of the charging capacity 53 and the negative power supply potential VSS (ground potential). The voltage source 84 may be configured as a resistive voltage divider circuit. The voltage source 84 has a regulator 841 and a plurality of resistive elements 842 to 845. The resistive elements 842 and 843 are connected in series between the potential of the terminal voltage VG of the charging capacity 53 and the ground potential, and generate an input voltage VIN by resistive voltage division. The voltage source 84 supplies the input voltage VIN to the voltage difference detection circuit 86. The regulator 841 also generates the power supply potential VDD. The regulator 841 and the resistive elements 844 and 845 are connected in series between the potential of the terminal voltage VG of the charging capacity 53 and the ground potential. The resistive elements 844 and 845 then generate a reference voltage VREF1 (first voltage) by resistive voltage division. The voltage source 84 supplies the reference voltage VREF1 to the current source 85. If the resistance values ​​of resistors 842 and 843 are R2, and the resistance values ​​of 844 and 845 are R1, then the voltage source 84 can generate the input voltage VIN and reference voltage VREF1 shown in the following equation 1. VREF1 = 1 / 2VDD VIN = 1 / 2VG ···Formula 1

[0059] The first frequency-impedance conversion circuit 88 includes a capacitive element 881, a capacitive element 882, a switch 883, a switch 884, and a phase splitter 885. One end of the capacitive element 881 is connected to the power supply potential VDD, and the other end is connected between switches 883 and 884. One end of the capacitive element 882 is connected to the power supply potential VDD, and the other end is connected to the current source 85. One end of the switch 883 is connected to the current source 85, the other end is connected to switch 884, and the control terminal is connected to the phase splitter 885. The switch 884 is connected to switch 883, the other end is connected to the power supply potential VDD, and the control terminal is connected to the phase splitter 885. The input terminal of the phase splitter 885 is connected to the output terminal of the 1 / 2 frequency divider circuit 72, the in-phase output terminal is connected to switch 883, and the out-of-phase output terminal is connected to switch 884. The first frequency-impedance conversion circuit 88 may be configured using an inverter connected between the 1 / 2 frequency divider circuit 72 and the switch 884 instead of the phase splitter 885.

[0060] In the first frequency-impedance conversion circuit 88, switches 883 and 884 are switched on and off complementaryly according to the level of the divided-by-2 periodic signal FREF. This causes the capacitive element 881 to be charged and discharged. When the divided-by-2 periodic signal FREF is at a high level, switch 883 is kept off and switch 884 is kept on, and the charge (electrons) of the capacitive element 881 is discharged to the power supply potential VDD, causing the capacitive element 881 to discharge. When the divided-by-2 periodic signal FREF is at a low level, switch 883 is kept on and switch 884 is kept off, and a charge (electrons) corresponding to the current IREF_S is accumulated in the capacitive element 881, causing the capacitive element 881 to charge. At this time, the capacitive element 882 maintains a state in which it has accumulated a charge corresponding to the current IREF_S, regardless of the level of the divided-by-2 periodic signal FREF.

[0061] In other words, the first frequency-impedance conversion circuit 88 can generate a first impedance Z1 equivalent to frequency FREF / 2 and the capacitive element 881 by periodically charging and discharging the capacitive element 881 with a periodic signal FREF divided by 2 having frequency FREF / 2. At this time, the voltage at the output terminal of the first frequency-impedance conversion circuit 88 changes time-dependently when the capacitive element 881 is being charged, but it converges to a stable point while being averaged by the capacitive element 882 that maintains the accumulation of charge. The voltage VREF_S at the output terminal at this stable point is controlled by the current source 85 to be equal to the reference voltage VREF1. Therefore, the current IREF_S generated at the input terminal of the current source 85 when it converges to the stable point can be expressed as shown in the following equation 2, using the first impedance Z1 generated by the first frequency-impedance conversion circuit 88. IREF_S=VREF1 / Z1···Formula 2

[0062] In other words, if the capacitance value of the capacitive element 881 is C1, the current IREF_S generated at the input terminal of the current source 85 when it converges to the stable point is given by the following equation 3. IREF_S=VREF1·(FREF / 2)·C1···Formula 3

[0063] As shown in equations 2 and 3, in the state where the system converges to a stable point, the frequency FREF / 2 of the divided periodic signal is converted to the first impedance Z1 = 2 / (FREF·C1) by the first frequency-impedance conversion circuit 88. Equivalently, one end of the first impedance Z1 = 2 / (FREF·C1) is connected to the input terminal of the current source 85, and the other end is connected to the power supply potential VDD. Therefore, at the input terminal of the current source 85, a current IREF_S shown in equation 3 is generated according to the applied voltage VREF1. The current IREF_S corresponds to the frequency FREF of the periodic signal FREF, specifically the frequency FREF / 2 of the divided periodic signal FREF.

[0064] The current source 85 is connected to the voltage source 84, the voltage difference detection circuit 86, the first frequency-impedance conversion circuit 88, and the second frequency-impedance conversion circuit 83. The control terminal of the current source 85 is connected to the voltage source 84, the input terminal is connected to the first frequency-impedance conversion circuit 88, and the output terminal is connected to the voltage difference detection circuit 86 and the second frequency-impedance conversion circuit 83. The current source 85 generates a current using the reference voltage VREF1 generated by the voltage source 84 and the first impedance Z1. Specifically, the current source 85 generates a current IREF_S corresponding to the frequency FREF / 2 of the divided periodic signal FREF and sends it to the voltage difference detection circuit 86.

[0065] For example, the current source 85 has an NMOS transistor 851 and a differential amplifier circuit 852. The source of the NMOS transistor 851 is connected to the input terminal of the voltage difference detection circuit 86, the drain is connected to the output terminal of the first frequency-impedance conversion circuit 88, and the gate is connected to the output terminal of the differential amplifier circuit 852. The non-inverting input terminal (+) of the differential amplifier circuit 852 is connected to the output terminal of the first frequency-impedance conversion circuit 88, and the inverting input terminal (-) is connected between the resistors 844 and 845 of the voltage source 84 to receive a reference voltage VREF1.

[0066] The NMOS transistor 851 and the differential amplifier circuit 852 form a feedback loop. Using the feedback loop of differential amplifier circuit 852 → NMOS transistor 851 → input terminal of current source 85 (output terminal of first frequency-impedance conversion circuit 88) → differential amplifier circuit 852, the differential amplifier circuit 852 controls the gate voltage of the NMOS transistor 851 so that the potential at the input terminal of current source 85 becomes equal to the reference voltage VREF1. As a result, the current IREF_S flowing through the first impedance Z1 of the first frequency-impedance conversion circuit 88 becomes as shown in equations 2 and 3 above.

[0067] The current IREF_R flowing from the current source 85 to the input terminal of the voltage difference detection circuit 86 is equal to the current IREF_S, and is given by the following equation 4. IREF_R=IREF_S=VREF1 / Z1 =VREF1·(FREF / 2)·C1···Formula 4

[0068] As shown in Equation 4, the current IREF_R of the current source 85 depends on the first impedance Z1 corresponding to the frequency FREF / 2 of the periodic signal FREF divided by 2.

[0069] The voltage-controlled oscillator circuit 81 is connected between the voltage difference detection circuit 86 and the 1 / 2 frequency divider circuit 82. The voltage-controlled oscillator circuit 81 oscillates in response to the control voltage VC received from the voltage difference detection circuit 86 and generates an oscillation signal FOUT having a frequency FOUT corresponding to the control voltage VC. For example, the voltage-controlled oscillator circuit 81 may have an inverter chain, a variable resistor element, and a capacitive element and be configured as a relaxation-type oscillator circuit. The voltage-controlled oscillator circuit 81 generates the oscillation signal FOUT, outputs it to the AND gate 75, and feeds it back to the second frequency-impedance conversion circuit 83 via the 1 / 2 frequency divider circuit 82.

[0070] The 1 / 2 frequency divider circuit 82 is connected between the voltage-controlled oscillator circuit 81 and the second frequency-impedance conversion circuit 83. The 1 / 2 frequency divider circuit 82 divides the oscillation signal FOUT generated by the voltage-controlled oscillator circuit 81 by 2. The 1 / 2 frequency divider circuit 82 supplies the 2-division oscillation signal FOUT to the second frequency-impedance conversion circuit 83. The frequency of the 2-division oscillation signal FOUT is the frequency of the signal based on the oscillation signal FOUT, and can be expressed as FOUT / 2 using the frequency FOUT of the oscillation signal FOUT. Note that the 1 / 2 frequency divider circuit 82 has a division ratio of 2, for example, but its division ratio may be variable.

[0071] The second frequency-impedance conversion circuit 83 includes a capacitive element 831, a capacitive element 832, a switch 833, a switch 834, and a phase splitter 835. Capacitive element 831 has one end connected to the power supply potential VSS (ground potential) and the other end connected between switches 833 and 834. Capacitive element 832 has one end connected to ground potential and the other end connected to the input terminal of the voltage difference detection circuit 86. Switch 833 has one end connected to the input terminal of the voltage difference detection circuit 86, the other end connected between capacitive element 831 and switch 834, and its control terminal connected to the phase splitter 835. Switch 834 has one end connected between switch 833 and capacitive element 831, the other end connected to ground potential, and its control terminal connected to the phase splitter 835. The phase splitter 835 has its input terminal connected to the 1 / 2 frequency divider circuit 82 and its output terminals connected to switches 833 and 834, respectively. The second frequency-impedance conversion circuit 83 may be configured using an inverter connected between the 1 / 2 frequency divider circuit 82 and the switch 834, instead of the phase splitter 835.

[0072] In the second frequency-impedance conversion circuit 83, switches 833 and 834 are switched on and off complementaryly according to the level of the divided-by-2 oscillation signal FOUT. This causes the capacitive element 831 to be charged and discharged. When the divided-by-2 oscillation signal FOUT is at a high level, switch 833 is kept off and switch 834 is kept on, and the charge (holes) of the capacitive element 831 is discharged to ground potential, causing the capacitive element 831 to discharge. When the divided-by-2 oscillation signal FOUT is at a low level, switch 833 is kept on and switch 834 is kept off, and a charge (holes) corresponding to the current IREF_R is accumulated in the capacitive element 831, causing the capacitive element 831 to charge. At this time, the capacitive element 832 maintains a state in which it has accumulated a charge corresponding to the current IREF_R, regardless of the level of the divided-by-2 oscillation signal FOUT.

[0073] In other words, the second frequency-impedance conversion circuit 83 can generate a second impedance Z2 equivalent to frequency FOUT / 2 by periodically charging and discharging the capacitive element 831 with a divided oscillation signal FOUT having frequency FOUT / 2. The output voltage of the second frequency-impedance conversion circuit 83 appears as the voltage VREF_R at the input terminal of the voltage difference detection circuit 86. The voltage VREF_R changes over time when the capacitive element 831 is being charged, but it is averaged out by the capacitive element 832, which maintains the accumulation of charge corresponding to the current IREF_R, and converges to a stable point. The voltage VREF_R at the input terminal of the voltage difference detection circuit 86 when it converges to a stable point can be expressed using the second impedance Z2 generated by the second frequency-impedance conversion circuit 83 as shown in the following equation 5. VREF_R=IREF_R·Z2···Formula 5

[0074] For example, in the second frequency-impedance conversion circuit 83, as the incoming current IREF_R increases, the voltage VREF_R at the point of convergence to the stable point rises approximately proportionally. That is, if the capacitance value of the capacitive element 831 is C2, the voltage VREF_R at the input terminal of the voltage difference detection circuit 86 at the point of convergence to the stable point is given by the following equation 6. VREF_R = IREF_R / {(FOUT / 2)·C2}···Formula 6

[0075] As shown in equations 5 and 6, in the state where the signal converges to a stable point, the frequency FOUT / 2 of the divided oscillation signal FOUT is converted to the second impedance Z2 = 2 / (FOUT·C2) by the second frequency-impedance conversion circuit 83. Equivalently, one end of the second impedance Z2 = 2 / (FOUT·C2) is connected to the input terminal of the voltage difference detection circuit 86, and the other end is connected to ground potential. Therefore, at the input terminal of the voltage difference detection circuit 86, the current IREF_R from the current source 85 flows into the second impedance Z2 (equivalent impedance) = 2 / (FOUT·C2), and the current IREF_R is converted to voltage VREF_R by the second impedance Z2 (equivalent impedance) = 2 / (FOUT·C2). The voltage VREF_R includes the frequency FOUT and corresponds to the oscillation frequency FOUT of the voltage-controlled oscillation circuit 81.

[0076] The voltage difference detection circuit 86 has its input terminal connected to a voltage source 84, a current source 85, and a second frequency-impedance conversion circuit 83, and its output terminal connected to a voltage-controlled oscillator circuit 81. The voltage difference detection circuit 86 also has a differential amplifier circuit 861. The differential amplifier circuit 861 has its non-inverting input terminal (+) connected to the voltage source 84 to receive the input voltage VIN, its inverting input terminal (-) connected to the current source 85 and the second frequency-impedance conversion circuit 83 to receive the voltage VREF_R, and its output terminal connected to the voltage-controlled oscillator circuit 81. The differential amplifier circuit 861 generates a control voltage VC to control the difference between the input voltage VIN and the voltage VREF_R, and supplies it to the voltage-controlled oscillator circuit 81.

[0077] In the frequency synchronization circuit 73, the voltage difference detection circuit 86 uses a frequency synchronization loop consisting of the voltage difference detection circuit 86 → voltage-controlled oscillator circuit 81 → 1 / 2 frequency divider circuit 82 → second frequency-impedance conversion circuit 83 → voltage difference detection circuit 86 to feedback control the control voltage VC so that the voltage VREF_R is equal to the input voltage VIN. That is, if the feedback control functions correctly, the following equation 7 holds true. VIN=VREF_R···Formula 7

[0078] Substituting equation 6 into equation 7 yields equation 8. VIN = IREF_R / {(FOUT / 2)·C2}···Formula 8

[0079] Substituting equation 4 into equation 8, we obtain the following equation 9. VIN=VREF1·(FREF / 2)·C1 / {(FOUT / 2)·C2} ...Formula 9

[0080] Substituting Equation 1 into Equation 9 and solving for frequency FOUT, we obtain the following Equation 10. FOUT = FREF · (VDD / VG) · (C1 / C2) ··· Formula 10

[0081] As shown in Equation 10, the frequency FOUT of the oscillation signal FOUT is obtained according to the ratio of the power supply potential VDD to the terminal voltage VG of the charging capacity 53.

[0082] In the voltage-frequency conversion circuit 55, in order to generate a backscatter signal corresponding to the terminal voltage VG of the charging capacity 53 with high precision, an oscillator circuit 71 that generates a periodic signal of reference frequency FREF and a frequency synchronization circuit 73 that generates an oscillator signal of frequency FOUT are connected to the backscatter circuit 56 via an AND gate 75. This formally configures the output signal of the voltage-frequency conversion circuit 55 to change according to the relative ratio of frequency FOUT and reference frequency FREF. In substance, the output signal of the voltage-frequency conversion circuit 55 is configured to change according to the terminal voltage VG of the charging capacity 53, and does not depend on the reference frequency FREF.

[0083] The 1 / N frequency divider circuit 74 is connected between the oscillator circuit 71 and the AND gate 75. The 1 / N frequency divider circuit 74 divides the periodic signal FREF generated by the oscillator circuit 71 by 2. N is, for example, any integer greater than or equal to 2. The division ratio N may be a fixed value or a variable value. If the division ratio N is variable, the voltage-frequency conversion circuit 55 may determine the division ratio in response to an external control signal, supply a division control signal indicating the determined division ratio to the 1 / N frequency divider circuit 74, and change the value of the division ratio N in response to the division control signal.

[0084] For example, although not shown in the diagram, a configuration with a variable frequency division ratio can be achieved by connecting multiple flip-flops in series and changing the number of flip-flops that pass between the oscillator circuit 71 and the AND gate 75 according to the frequency division control signal. The same applies when the frequency division ratio of the 1 / 2 frequency divider circuits 72 and 82 is made variable.

[0085] The 1 / N frequency divider circuit 74 divides the periodic signal FREF generated by the oscillator circuit 71 by N to generate a divided signal. The 1 / N frequency divider circuit 74 supplies the divided signal to the AND gate 75. The frequency FREF' of the divided signal can be expressed using the reference frequency FREF of the periodic signal FREF as shown in the following equation 11. FREF' = FREF / N... Formula 11

[0086] The AND gate 75 has a pair of input terminals connected to a 1 / N frequency divider circuit 74 and a frequency synchronization circuit 73, and an output terminal connected to a backscatter circuit 56. The AND gate 75 receives a frequency divider signal FREF' from the 1 / N frequency divider circuit 74 and an oscillation signal FOUT from the frequency synchronization circuit 73, performs a logical AND operation on these signals, and supplies the result to the backscatter circuit 56.

[0087] The backscatter circuit 56 passively performs amplitude modulation by periodically changing the impedance of the antenna 51 in accordance with the output signal from the voltage-frequency conversion circuit 55. The backscatter circuit 56 has an NMOS transistor 561. The source of the NMOS transistor 561 is connected to the negative power supply potential (ground potential), the drain is connected to the antenna 51, and the gate is connected to the output terminal of the voltage-frequency conversion circuit 55. The NMOS transistor 561 receives the result of the operation from the AND gate 75 (referred to as the control signal FG) as input to its gate and turns on and off according to the control signal FG.

[0088] Here, the voltage-frequency conversion circuit 55 can output an oscillation signal FOUT, which is generated by running a frequency synchronization loop with the input voltage VIN and voltage VREF_R corresponding to the terminal voltage VG of the charging capacity 53 at the reference frequency FREF, by thinning it with a frequency-divided signal of frequency FREF' from the 1 / N frequency divider circuit 74. For this reason, the control signal FG supplied to the gate of the NMOS transistor 561 of the backscatter circuit 56 formally changes according to the relative ratio between frequency FOUT and frequency FREF' based on the reference frequency FREF, and can be expressed as shown in the following equation 12. FG = FOUT / FREF'... Formula 12

[0089] Substituting equation 11 into equation 12 yields the following equation 13. FG = FOUT / (FREF / N) ... Formula 13

[0090] Substituting equation 10 into equation 13 yields the following equation 14. FG=FREF (VDD / VG) (C1 / C2) / (FREF / N) =(VDD / VG)·(C1 / C2)·N···Formula 14

[0091] Here, if the capacitance elements 881 and 831 fluctuate in approximately the same way due to the influence of fluctuating factors such as the manufacturing process, power supply voltage, and / or temperature, then the relative ratio (C1 / C2) will remain almost unchanged.

[0092] Figures 4 and 5 are diagrams illustrating the transmit and receive signals in wireless power transfer according to the respective embodiments. As shown in Equation 14, the control signal FG supplied to the gate of the NMOS transistor 561 of the backscatter circuit 56 changes according to the relative ratio (VDD / VG), independent of the reference frequency FREF. Therefore, the NMOS transistor 561 can periodically change the impedance of the antenna 51 according to the relative ratio (VDD / VG), independent of the reference frequency FREF. As a result, as shown in Figures 4 and 5, a backscatter signal (power supply information) including a frequency synchronization signal corresponding to the terminal voltage VG can be generated, which is being charged in the charging capacity 53 by the power generation circuit 52 according to the signal level of the transmit signal from the transceiver 3. Specifically, according to the relative ratio (VDD / VG), the frequency of the frequency synchronization signal corresponding to the terminal voltage VG changes in frequency difference with the frequency FREF (frequency FREF / N).

[0093] For example, the higher the terminal voltage VG, the smaller the relative ratio (VDD / VG), and the frequency of the frequency synchronization signal corresponding to the terminal voltage VG approaches the frequency FREF (frequency FREF / N) of the reference frequency signal. For example, the lower the terminal voltage VG, the larger the relative ratio (VDD / VG), and the frequency of the frequency synchronization signal corresponding to the terminal voltage VG moves away from the frequency FREF (frequency FREF / N) of the reference frequency signal. Thus, the backscatter signal from the wireless receiver 5 has the characteristic that its frequency changes according to the terminal voltage VG with respect to the reference frequency FREF.

[0094] Furthermore, as shown in Equation 14, the gain of the signal FG with respect to the terminal voltage VG can be increased by increasing the division ratio N of the 1 / N frequency divider circuit 74. This makes it easy to increase the sensitivity of the voltage-to-frequency conversion with respect to the terminal voltage VG.

[0095] As described above, the wireless receiver 5 according to this embodiment includes a backscatter circuit 56 that passively performs amplitude modulation by periodically changing the impedance of the antenna 51, and a voltage-frequency conversion circuit 55 that controls the periodicity of the backscatter circuit 56 in changing the impedance of the antenna 51. In order to stabilize the periodicity, the voltage-frequency conversion circuit 55 generates a frequency FOUT by frequency-synchronizing a signal corresponding to the terminal voltage VG of the charging capacity 53 with a reference frequency FREF. Based on the reference frequency FREF and the frequency of the frequency-synchronized signal corresponding to the terminal voltage VG of the charging capacity 53, the voltage-frequency conversion circuit 55 controls the periodicity of the backscatter circuit 56 in changing the impedance of the antenna 51.

[0096] With this configuration, the wireless receiver 5 can transmit a backscatter signal (amplitude-modulated signal) that includes modulation frequency information based on two types of frequency information: frequency information indicating a reference frequency FREF and frequency information indicating the voltage state related to the terminal voltage VG of the charging capacity. Therefore, the transceiver 3 can observe the terminal voltage VG of the wireless receiver 5 (the power generation state on the receiving side) based on the backscatter signal from the wireless receiver 5, using the ratio of the reference frequency and the frequency-synchronized frequency, and thus control the transmission power according to that state.

[0097] In other words, with the above configuration, in which the wireless receiver 5 transmits power generation information (power supply information) via backscatter in response to power from the transceiver 3, that is, transmits power generation information as frequency information, there is no need to provide a separate antenna to transmit the power generation status of the wireless receiver 5. Furthermore, since backscatter signals are generated at two frequencies, the power generation status of the wireless receiver 5 can be monitored with high accuracy by calculating the ratio of the two frequencies in the transceiver 3, and power supply can be controlled in real time to transmit power according to the power consumption.

[0098] Furthermore, in the transceiver 3, a circuit configuration can be realized that demodulates the two modulated signals contained in the backscatter signal transmitted from the wireless receiver 5 using low-cost circuits such as synchronous detection.

[0099] Furthermore, in the wireless receiver 5, the use of the voltage-frequency conversion circuit 55 enables the conversion of the terminal voltage VG to frequency with high accuracy, low cost, and low power consumption.

[0100] According to at least one embodiment described above, a low-cost and efficient continuous power supply wireless power transfer method can be realized.

[0101] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of symbols]

[0102] 1. Wireless power supply system 3 Transmitter and receiver 301 Transmitter 302 Receiving Unit 31 Antenna 32 Oscillator Circuit 33 Amplifier Circuit 34 Circulator 35 Mixer 36 Bandpass Filter 37 Control Unit 5 Wireless Receiver 51 Antenna 52 Power Generation Circuit 53 Charging capacity 54 Power consumption circuit 55 Voltage-Frequency Conversion Circuit 56 Backscatter Circuit 561 NMOS transistors 71 Oscillator Circuit 72 1 / 2 frequency divider circuit 73 Frequency Synchronization Circuit 74 1 / N frequency divider circuit 75 AND gate (logic gate) 81 Voltage-controlled oscillator circuit 82 1 / 2 frequency divider circuit 83. Second frequency-impedance conversion circuit 831,832 Capacitive elements 833,834 switches 835 Phase Splitter 84 Voltage source 841 Regulator 842, 843, 844, 845 Resistor elements 85 Current source 851 NMOS transistors 852 Differential Amplifier Circuit 86 Voltage difference detection circuit 861 Differential Amplifier Circuit 88. First frequency-impedance conversion circuit 881,882 Capacitive elements 883,884 switches 885 Phase Splitter

Claims

1. Antenna and, A power generation circuit that generates electricity using a received signal based on radio waves received by the aforementioned antenna, The charging capacity is charged by the power generated by the aforementioned power generation circuit, A power consumption circuit that consumes the power stored in the aforementioned charging capacity, A voltage-frequency conversion circuit that converts the terminal voltage of the charging capacity into a frequency, The system includes a backscatter circuit that performs amplitude modulation in the backscatter of radio waves received by the antenna by changing the impedance of the antenna at a period corresponding to the frequency of the control signal from the voltage-frequency conversion circuit, The aforementioned voltage-frequency conversion circuit is A first frequency-impedance conversion circuit that converts the frequency of a periodic signal based on a reference frequency into a first impedance, A voltage source that generates a first voltage and an input voltage based on the terminal voltage, A current source that generates a current using the first voltage and the first impedance, A voltage difference detection circuit that generates a control voltage according to the difference between the input voltage from the voltage source and a second voltage based on the current from the current source, A voltage-controlled oscillator circuit that generates an oscillation signal according to the control voltage from the voltage difference detection circuit, A second frequency-impedance conversion circuit that converts the frequency of the signal based on the oscillation signal into a second impedance, It has, The voltage difference detection circuit generates the second voltage using the current from the current source and the second impedance. The first frequency-impedance conversion circuit, the current source, and the second frequency-impedance conversion circuit are connected in series between the terminal voltage and the reference potential. The control signal is a signal with a period corresponding to the reference frequency and the frequency of the signal based on the oscillation signal. The antenna transmits a backscatter signal whose amplitude is modulated according to the control signal by backscatter based on the received radio waves. Wireless receiver.

2. The backscatter circuit has a transistor whose source is connected to the reference potential, whose drain is connected to the antenna, and whose gate is connected to the voltage-frequency conversion circuit. The transistor turns on and off in response to the control signal input to the gate. The wireless receiver according to claim 1.

3. The voltage-frequency conversion circuit further includes a logic gate that takes the reference frequency and the frequency of the signal based on the oscillation signal as inputs and outputs the logical AND of the reference frequency and the frequency of the signal based on the oscillation signal as the control signal. The wireless receiver according to claim 1.

4. A wireless power receiver according to any one of claims 1 to 3, The wireless receiver transmits radio waves used for power generation, and the transceiver receives the backscatter signal transmitted from the wireless receiver by backscatter based on the transmitted radio waves, The transceiver demodulates the backscatter signal and controls the radio wave intensity of the transmitted radio wave according to two frequency pieces of information: the reference frequency and the frequency of the signal based on the oscillation signal. Wireless power supply system.

5. The aforementioned transceiver is Antenna and, Oscillator circuit, An amplification circuit that amplifies the oscillation signal from the oscillation circuit and adjusts the signal level of the transmission signal to be transmitted as radio waves from the antenna, A mixer that takes the oscillation signal from the oscillation circuit and the backscatter signal received by the antenna as input and performs frequency conversion, A bandpass filter that extracts two frequency-modulated signals contained in the backscatter signal from the signal obtained by the frequency conversion by the mixer, The system includes a control unit that acquires the frequency difference or frequency ratio of the two frequency-modulated signals extracted by the bandpass filter, and controls the gain of the amplification circuit based on the acquired frequency difference or frequency ratio. The wireless power supply system according to claim 4.

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