Printed wiring board

The printed wiring board design addresses the challenge of signal transmission by using insulating layers with varying permittivity and adhesion properties to optimize signal propagation and reduce leakage, resulting in improved transmission characteristics.

JP2026059813APending Publication Date: 2026-04-08KYOCERA CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-02-28
Publication Date
2026-04-08

AI Technical Summary

Technical Problem

Existing printed wiring boards face challenges in achieving good transmission characteristics for high-frequency signals due to the difficulty in using an insulator material that maintains effective signal transmission across the waveguide from one end to the other.

Method used

A printed wiring board design with specific insulating layers and conductors, where the relative permittivity of certain insulating layers is lower than others, and the insulators are made of materials with high adhesion properties, allowing for continuous integration and filling of the waveguide with insulators of a relatively small dielectric constant, thereby optimizing signal propagation.

Benefits of technology

The design achieves improved signal transmission characteristics by reducing electromagnetic wave leakage and simplifying the waveguide structure, enhancing reliability and freedom in wiring design.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a printed circuit board that can achieve good transmission characteristics for waveguides. [Solution] The printed circuit board has a first surface and a second surface located opposite the first surface, and comprises a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer consisting of one or more insulating layers located between the first and second insulating layers, a fifth insulating layer consisting of one or more insulating layers located between the first and third insulating layers, a through-hole located across the fourth insulating layer, the first insulating layer and the fifth insulating layer, and a first inner wall conductor covering the inner wall of the first through-hole. The insulator of the second insulating layer and an insulator continuous with the insulator of the third insulating layer are located in the through-hole, and the relative permittivity of the insulator of the second insulating layer and the insulator of the third insulating layer is smaller than the relative permittivity of the insulators of the first, fourth, and fifth insulating layers.
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Description

Technical Field

[0001] This disclosure relates to a printed wiring board.

Background Art

[0002] Patent Document 1 describes a printed wiring board having a core substrate and a build-up layer.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Some printed wiring boards have a waveguide for transmitting a high-frequency signal from one surface to the other surface. Good transmission characteristics of the high-frequency signal are required for the waveguide. However, it has not been easy to provide an insulator made of a material that realizes good transmission characteristics from one end to the other end of the waveguide.

[0005] An object of this disclosure is to provide a printed wiring board capable of realizing good transmission characteristics of a waveguide.

Means for Solving the Problems

[0006] The printed wiring board according to this disclosure is a printed wiring board having a first surface and a second surface located opposite to the first surface, a first insulating layer located between the first surface and the second surface and separated from the first surface and the second surface, a second insulating layer including the first surface, a third insulating layer including the second surface, a fourth insulating layer composed of one or more insulating layers located between the first insulating layer and the second insulating layer, A fifth insulating layer consisting of one or more insulating layers located between the first insulating layer and the third insulating layer, A through portion located across the fourth insulating layer, the first insulating layer, and the fifth insulating layer, extending from the first surface to the second surface, A first penetration portion which is part of the penetration portion and located in the first insulating layer, A first inner wall conductor covering the inner wall of the first penetration portion, In a planar perspective view, the first signal conductor overlaps the through portion and is located on the first surface, In a planar perspective view, the second signal conductor overlaps the through portion and is located on the second surface, Equipped with, An insulator continuous with the insulator of the second insulating layer and the insulator of the third insulating layer is located at the through-port, The first inner wall conductor includes a first land located between the first insulating layer and the fourth insulating layer, along the opening of the first penetration, and a second land located between the first insulating layer and the fifth insulating layer. The relative permittivity of the insulator of the second insulating layer and the insulator of the third insulating layer is smaller than the relative permittivity of the insulators of the first insulating layer, the fourth insulating layer, and the fifth insulating layer, respectively. [Effects of the Invention]

[0007] According to this disclosure, it is possible to provide a printed circuit board that can achieve good transmission characteristics for waveguides. [Brief explanation of the drawing]

[0008] [Figure 1] This is a longitudinal cross-sectional view showing a printed circuit board according to Embodiment 1 of the present disclosure. [Figure 2] Figure 1 shows a printed circuit board, where (A) is a plan view, (B) is a plan section view along line AA in Figure 1, (C) is a plan section view along line BB in Figure 1, and (D) is a plan view seen from the back. [Figure 3] This figure shows an example of the use of the printed circuit board according to Embodiment 1. [Figure 4] This diagram illustrates the manufacturing method of the printed circuit board shown in Figure 1. [Figure 5] This is a longitudinal cross-sectional view showing a printed circuit board according to Embodiment 2 of the present disclosure. [Modes for carrying out the invention]

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Figure 1 is a longitudinal cross-sectional view showing a printed circuit board according to Embodiment 1 of the present disclosure. Figure 2 is a diagram showing the printed circuit board of Figure 1, where (A) is a plan view, (B) is a plan section view along line AA in Figure 1, (C) is a plan section view along line BB in Figure 1, and (D) is a plan view seen from the back. Figure 3 is a diagram showing an example of use of the printed circuit board of Embodiment 1.

[0010] The printed circuit board 100 in this embodiment may be a build-up substrate in which a build-up layer is laminated on a core substrate. The printed circuit board 100 has a first surface S1 and a second surface S2 located opposite the first surface S1. The printed circuit board 100 may have five or more insulating layers, such as a first insulating layer 11 to a fifth insulating layer 15.

[0011] The first insulating layer 11 may be located away from the first surface S1 and the second surface S2, and between the first surface S1 and the second surface S2. The second insulating layer 12 may be an insulating layer that includes the first surface S1. The third insulating layer 13 may be an insulating layer that includes the second surface S2. The fourth insulating layer 14 may be located between the first insulating layer 11 and the second insulating layer 12. The fifth insulating layer 15 may be located between the first insulating layer 11 and the third insulating layer 13.

[0012] The first insulating layer 11 has a third surface S3 and a fourth surface S4. The second insulating layer 12 has a fifth surface S5 and a sixth surface S6. The third insulating layer 13 has a seventh surface S7 and an eighth surface S8. The fourth insulating layer 14 has a ninth surface S9 and a tenth surface S10. The fifth insulating layer 15 has an eleventh surface S11 and a twelfth surface S12. The third surface S3, the fifth surface S5, the seventh surface S7, the ninth surface S9, and the eleventh surface S11 are the surfaces on the side of the first surface S1 in the first insulating layer 11 to the fifth insulating layer 15, respectively. The fourth surface S4, the sixth surface S6, the eighth surface S8, the tenth surface S10, and the twelfth surface S12 are the surfaces on the side of the second surface S2 in the first insulating layer 11 to the fifth insulating layer 15, respectively.

[0013] The printed wiring board 100 may further include wiring layers 21 to 26 respectively located on the third surface S3, the fourth surface S4, the ninth surface S9, the twelfth surface S12, the fifth surface S5, and the eighth surface S8. Each of the wiring layers 21 to 26 may be a conductor layer having a wiring pattern. The wiring pattern may include a grounding pattern, and the grounding conductor layer may be referred to as a grounding conductor. As the conductor layer, copper foil, copper plating, copper plating on copper foil, etc. may be applied.

[0014] In a region where the conductor layer in the wiring layer 23 is not located, the third surface S3 of the first insulating layer 11 and the tenth surface S10 of the fourth insulating layer 14 may be in contact. Similarly, the fourth surface S4 of the first insulating layer 11 and the eleventh surface S11 of the fifth insulating layer 15, the sixth surface S6 of the second insulating layer 12 and the ninth surface S9 of the fourth insulating layer 14, the twelfth surface S12 of the fifth insulating layer 15 and the seventh surface S7 of the third insulating layer 13, etc., the two opposing surfaces of two adjacent insulating layers may be in contact with each other in a region where the wiring pattern is not located. In a region where the conductor layer in the wiring layer 21 is not located, the fifth surface S5 of the second insulating layer 12 may correspond to the first surface S1 of the printed wiring board 100. In a region where the conductor layer in the wiring layer 26 is not located, the eighth surface S8 of the third insulating layer 13 may correspond to the second surface S2 of the printed wiring board 100.

[0015] The first insulating layer 11 and the wiring layers 23 and 24 may be core substrates.

[0016] For the material of the first insulating layer 11, for example, organic resins such as epoxy resin, bismaleimide - triazine resin, polyimide resin, polyphenylene ether (PPE) resin, polyphenylene oxide (PPO) resin, cyanate ester resin, and liquid crystal polymer may be applied. Two or more of these organic resins may be mixed. A reinforcing material may be blended with one or more of these organic resins. Examples of the reinforcing material include reinforcing materials such as glass fiber, glass non - woven fabric, aramid fiber, aramid non - woven fabric, polyester fiber, and polyester non - woven fabric. One or more of these organic resins may contain inorganic fillers such as silica, alumina, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide.

[0017] The second insulating layer 12 and the wiring layer 21, the third insulating layer 13 and the wiring layer 26, the fourth insulating layer 14 and the wiring layer 22, and the fifth insulating layer 15 and the wiring layer 25 may each be a build - up layer.

[0018] For the material of the second insulating layer 12 to the fifth insulating layer 15, for example, organic resins such as epoxy resin, bismaleimide - triazine resin, polyimide resin, polyphenylene ether (PPE) resin, polyphenylene oxide (PPO) resin, cyanate ester resin, polytetrafluoroethylene (PTFE) resin, and liquid crystal polymer may be applied. Two or more of these organic resins may be mixed. A reinforcing material may be blended with one or more of these organic resins. Examples of the reinforcing material include reinforcing materials such as glass fiber, glass non - woven fabric, aramid fiber, aramid non - woven fabric, polyester fiber, and polyester non - woven fabric. One or more of these organic resins may contain inorganic fillers such as silica, alumina, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide.

[0019] Materials with different relative dielectric constants may be applied to the insulators of the second insulating layer 12 and the third insulating layer 13 and the insulators of the first insulating layer 11, the fourth insulating layer 14, and the fifth insulating layer 15.

[0020] The printed circuit board 100 may further have a through-hole 40 and a first inner wall conductor 51.

[0021] The through-hole 40 may be located across the first insulating layer 11, the fourth insulating layer 14, and the fifth insulating layer 15, extending from the ninth surface S9 to the twelfth surface S12. The through-hole 40 includes a first through-hole 41 located in the first insulating layer 11, a second through-hole 42 located in the fourth insulating layer 14, and a third through-hole 43 located in the fifth insulating layer 15. The through-hole 40 is not hollow, and an insulator 53 may be located inside the through-hole 40. More specifically, the through-hole 40 may be filled with an insulator 53.

[0022] The first inner wall conductor 51 may cover the inner wall of the first penetration 41. The first inner wall conductor 51 may include a first land 51a located between the first insulating layer 11 and the fourth insulating layer 14 along one opening of the first penetration 41. The first inner wall conductor 51 may include a second land 51b located between the first insulating layer 11 and the fifth insulating layer 15 along the other opening of the first penetration 41. The first land 51a may be part of the conductor of the wiring layer 23. The second land 51b may be part of the conductor of the wiring layer 24. The first penetration 41 and the first inner wall conductor 51 may be an IVH (Interstitial Via Hole).

[0023] The insulator 53 located at the penetration 40 may be continuous with the insulator of the second insulating layer 12. The insulator 53 located at the penetration 40 may be continuous with the insulator of the third insulating layer 13. Continuous insulation means that the insulators are of the same component and are integrally melted and hardened. Furthermore, the insulator 53 located at the penetration 40 may include both the insulator of the second insulating layer 12 and the insulator of the third insulating layer 13. In this case, the insulator of the second insulating layer 12 and the insulator of the third insulating layer 13 are mutually molten and hardened at the penetration 40. Note that the insulator of the second insulating layer 12 and the insulator of the third insulating layer 13 must not be different insulators.

[0024] The printed circuit board 100 may further include a first signal conductor 211 and a second signal conductor 261 (see Figures 1, 2(A), and 2(D)).

[0025] The first signal conductor 211 may be part of the pattern of the wiring layer 21. The second signal conductor 261 may be part of the pattern of the wiring layer 26. The first signal conductor 211 may overlap the through-port 40 and be located on the first surface S1 in a planar view. The second signal conductor 261 may overlap the through-port 40 and be located on the second surface S2 in a planar view. The first signal conductor 211 may be an antenna conductor (e.g., a patch antenna) that transmits or receives radio waves. The second signal conductor 261 may be a feeding conductor to which a high-frequency signal is input for transmitting radio waves to the first signal conductor 211. The second signal conductor 261 may be a receiving conductor to which a high-frequency signal is output for receiving radio waves from the first signal conductor 211. The second signal conductor 261 may be a pad-shaped conductor.

[0026] The planar shapes of the first signal conductor 211 and the second signal conductor 261 may be rectangular, as shown in Figures 2(A) and 2(D), or they may be various shapes such as circles or ovals.

[0027] The wiring layer 21 may include a first ground conductor 212 located around the first signal conductor 211. The first ground conductor 212 may surround the first signal conductor 211, but at a distance from it. The wiring layer 26 may include a second ground conductor 262 located around the second signal conductor 261. The second ground conductor 262 may surround the second signal conductor 261, but at a distance from it.

[0028] As shown in Figure 3, the terminal 301 of the electronic element 300 may be connected to the second signal conductor 261. The electronic element 300 may include a circuit that outputs or inputs a high-frequency signal. The second signal conductor 261 may be a conductor to which a high-frequency signal is sent from the electronic element 300, or a conductor that sends a high-frequency signal to the electronic element 300.

[0029] Note that the patterns of wiring layers 21 and 26 are not limited to the illustrated examples. The pattern of wiring layer 21 may include a linear pattern in plan view, and the conductors of this pattern may be connected to the first signal conductor 211. The pattern of wiring layer 26 may include a linear pattern in plan view, and the conductors of this pattern may be connected to the second signal conductor 261. The electronic element 300 may be electrically connected to the second signal conductor 261 via the conductors of the above patterns.

[0030] <Waveguide> The printed circuit board 100 may include a waveguide 50 for transmitting high-frequency signals from the first surface S1 to the second surface S2. The waveguide 50 may have an insulator 53 located at the penetration portion 40, an insulator 54 located at the first region 121, an insulator 55 located at the second region 131, and a conductor surrounding the insulators 53 to 55.

[0031] "Enclosing the perimeter" means enclosing the entire circumference of the penetration portion 40, from the radial direction centered on the central axis A0 to the circumferential direction centered on the central axis A0. The first region 121 is the region in the second insulating layer 12 that overlaps with the penetration portion 40 in a planar view. The second region 131 is the region in the third insulating layer 13 that overlaps with the penetration portion 40 in a planar view. The central axis A0 mentioned above refers to the axis that passes through the center of the penetration portion 40 from the first surface S1 side to the second surface S2 side.

[0032] The conductor surrounding the insulators 53-55 may include the first inner wall conductor 51, the third ground conductor 222 included in the wiring layer 22, and the fourth ground conductor 252 included in the wiring layer 25.

[0033] According to the above configuration, as shown in Figure 3, when a high-frequency signal is sent from the electronic element 300 to the second signal conductor 261, the electromagnetic wave R0 of the high-frequency signal propagates through the waveguide 50, and the high-frequency signal can be transmitted to the first signal conductor 211. If the first signal conductor 211 is an antenna conductor, the high-frequency signal transmitted to the first signal conductor 211 can transmit radio waves R1 from the first signal conductor 211 to the outside of the printed circuit board 100.

[0034] The relative permittivity of the insulator of the second insulating layer 12 and the insulator of the third insulating layer 13 may be smaller than the relative permittivity of the insulators of the first insulating layer 11, the fourth insulating layer 14, and the fifth insulating layer 15. Insulator 54 may be part of the insulator of the second insulating layer 12. Insulator 55 may be part of the insulator of the third insulating layer 13. Insulators 53 to 55 in the waveguide 50 may be in a continuous configuration. A continuous configuration of insulators means that insulators of the same component are integrally melted and hardened. With this configuration, the relative permittivity in the waveguide 50 can be set to a value suitable for the propagation of electromagnetic waves R0. Therefore, good signal transmission characteristics of the waveguide 50 can be achieved.

[0035] <Comparison with the comparative example> The insulators of the second insulating layer 12 and the third insulating layer 13 may have a relatively small dielectric constant, while being made of a material that makes it difficult to laminate multiple insulators of the same component as build-up layers. Specifically, the material of the insulator may have a characteristic (hereinafter referred to as "first characteristic") in which high adhesion between the insulators cannot be obtained when a semi-cured insulator of the same material is laminated onto a cured insulator of the same material, and then the insulators are melted and cured.

[0036] In a build-up substrate, if a first-characteristic insulator is applied to multiple consecutive build-up layers, high adhesion cannot be obtained between two adjacent insulating layers in those multiple build-up layers. On the other hand, if a first-characteristic insulator is applied to one of the multiple build-up layers, and an insulating material of a different type is used for the other build-up layers, high adhesion can be obtained between the multiple build-up layers. However, in conventional build-up substrates, the IVH of the core substrate is filled with the insulating material of the next build-up layer or an insulating material for filling holes. Therefore, in the above case, an insulating material other than the first-characteristic insulator is included in some layers of the waveguide. Consequently, it is difficult to occupy the entire waveguide from one end to the other with an insulating material of a relatively small dielectric constant.

[0037] On the other hand, the printed circuit board 100 of Embodiment 1 has first insulating layers 11 to fifth insulating layers 15, but the second insulating layer 12 having an insulator with first characteristics is stacked on top of the fourth insulating layer 14 having an insulator of a different material. Therefore, high adhesion between the second insulating layer 12 and the fourth insulating layer 14 is obtained. Similarly, the third insulating layer 13 having an insulator with first characteristics is stacked on top of the fifth insulating layer 15 having an insulating layer of a different material. Therefore, high adhesion between the third insulating layer 13 and the fifth insulating layer 15 is obtained. In addition, in the printed circuit board 100 of Embodiment 1, the insulator inside the waveguide 50 is occupied by insulators 53 to 55 having first characteristics. Therefore, the relative permittivity inside the waveguide 50 becomes a relatively small value that is advantageous for the propagation of electromagnetic waves, and good signal transmission characteristics of the waveguide 50 can be realized. The relative permittivity of the second insulating layer 12 and the third insulating layer 13 is approximately 2.8 to 3.3. The relative permittivity of the first insulating layer 11, the fourth insulating layer 14, and the fifth insulating layer 15 is approximately 3.5 to 5.0.

[0038] <Conducting structure of a waveguide> The printed circuit board 100 may be configured such that there are no grounding conductors (e.g., via hole conductors, filled via conductors, conductor walls, etc.) located around the through-hole 40 that connect the first grounding conductor 212 and the third grounding conductor 222. In other words, the insulator of the second insulating layer 12 may occupy the area around the through-hole 40 and between the first grounding conductor 212 and the third grounding conductor 222.

[0039] Similarly, the printed circuit board 100 may have a configuration in which grounding conductors (e.g., via hole conductors, filled via conductors, conductor walls, etc.) connecting the third grounding conductor 222 and the first land 51a, the fourth grounding conductor 252 and the second land 51b, and the second grounding conductor 262 and the fourth grounding conductor 252 are not located around the through-hole 40. That is, the insulators of the fourth insulating layer 14, the fifth insulating layer 15, and the third insulating layer 13 may occupy the area around the through-hole 40 and the spaces between them, respectively.

[0040] The area around the penetration 40 means the range from the penetration 40 to within the minimum width of the penetration 40 in a plan view. A plan view means a cross-section parallel to the third surface S3. The minimum width means the distance between two parallel lines when the object is sandwiched between two parallel lines in a plan view and the two parallel lines are closest together.

[0041] The thicknesses W1 of the second insulating layer 12, W2 of the third insulating layer 13, W3 of the fourth insulating layer 14 from the first surface S1 side (9th surface S9) to the first land 51a, and W4 of the fifth insulating layer 15 from the second surface S2 side (12th surface S12) to the second land 51b, as shown in Figure 3, must each be 1 / 10 or less of the wavelength of the electromagnetic wave propagating through the penetration portion 40. The above wavelength refers to the effective wavelength of the electromagnetic wave at the center frequency of the signal frequency band assumed to be the transmitted signal.

[0042] With the above configuration, it becomes unnecessary to form conductors (lands, via hole conductors, filled via conductors, etc.) around the waveguide 50 of the second insulating layer 12, fourth insulating layer 14, fifth insulating layer 15, and third insulating layer 13. This increases the degree of freedom in the wiring that can be formed in the second insulating layer 12, fourth insulating layer 14, fifth insulating layer 15, and third insulating layer 13. Furthermore, the structure of the waveguide 50 can be simplified.

[0043] This configuration reduces the leakage of electromagnetic waves from parts of the waveguide 50 that are not surrounded by conductors, thereby further improving the signal transmission characteristics of the waveguide 50.

[0044] <Waveguide diameter> As described above, the penetration portion 40 may include a second penetration portion 42 located in the fourth insulating layer 14 and a third penetration portion 43 located in the fifth insulating layer 15. As shown in Figures 2(B) and 2(C), in a plan view, the inner surface 51d of the first inner wall conductor 51 may be located inside the third penetration portion 43. Similarly, in a plan view, the inner surface 51d of the first inner wall conductor 51 may be located inside the second penetration portion 42. With this configuration, it becomes easier to fill the inside of the waveguide 50 with insulators 53 to 55 during the manufacturing stage. Therefore, the reliability of the waveguide 50 can be further improved.

[0045] The planar shape of the through-hole 40 may be circular, elongated, rectangular, or the like.

[0046] <Manufacturing method> Figure 4 is a diagram illustrating the manufacturing method of the printed circuit board shown in Figure 1. The printed circuit board 100 having waveguides 50 can be manufactured by the following method. The manufacturing method may include an IVH formation step J1, a first build-up step J2, a wiring step J3, a through-hole formation step J4, and a second build-up step J5.

[0047] The IVH formation step J1 is a step of forming a first through-hole 41 and a first inner wall conductor 51 in the first insulating layer 11. If the first insulating layer 11 has a plurality of insulating layers, the first through-hole 41 that penetrates the plurality of insulating layers is formed, and the first inner wall conductor 51 is formed on the inner wall of the first through-hole 41. The inside of the first through-hole 41 formed in the IVH formation step J1 is a void. Step J1 may be a conventional step of forming an IVH on a core substrate. Specifically, the first through-hole 41 is formed in the first insulating layer 11 by drilling or irradiation with a laser beam. Subsequently, electroless plating (e.g., copper plating) is applied to the first insulating layer 11 to form a base plating layer, and then electrolytic plating (e.g., copper plating) is applied to form a plating layer of a desired thickness. As a result, a conductor layer is formed along the inner wall of the first through-hole 41, and a plating layer is formed on the copper foil (not shown) on the third surface S3 and fourth surface S4 of the first insulating layer 11. Subsequently, the first inner wall conductor 51 is fabricated by etching to remove a portion of the copper foil and plating layer and forming patterns (first land 51a and second land 51b) on the third surface S3 and fourth surface S4 of the first insulating layer 11.

[0048] The first build-up step J2 is a step in which the fourth insulating layer 14 and the fifth insulating layer 15 are formed. In step J2, the insulating layer material is superimposed on the third surface S3 and the fourth surface S4 of the first insulating layer 11, respectively, and then heated and pressurized. This process causes the insulator of the first insulating layer 11 and the insulator of the above material to adhere closely together. This process forms the fourth insulating layer 14 and the fifth insulating layer 15. During heating and pressurization, the molten insulator moves from the insulating layer material and fills the first penetration portion 41.

[0049] In the first build-up process J2, a conductor layer 61 is further formed on the ninth surface S9 of the fourth insulating layer 14 and the twelfth surface S12 of the fifth insulating layer 15.

[0050] The wiring process J3 is a process for forming the patterns of wiring layers 22 and 25. In this process J3, the patterns of wiring layers 22 and 25 are formed on the 9th surface S9 and the 12th surface S12 by methods such as the subtractive method. This process J3 forms the patterns of wiring layers 22 and 25 from which the conductor layer has been removed from the opening of the through-hole 40.

[0051] If the printed circuit board 100 has more build-up layers, the first build-up step J2 and the wiring step J3 can be repeated multiple times.

[0052] The through-hole formation step J4 is a step in which the through-hole 40 is formed by irradiation with a laser beam or the like. The through-hole 40 may be formed to a size that exposes the inner periphery of the first land 51a and the inner periphery of the second land 51b. Furthermore, the through-hole 40 may be formed in such a way that no insulator remains on the inner wall surface of the first inner wall conductor 51.

[0053] In addition, in the first build-up process J2, the materials to be layered may have a configuration in which the reinforcing material has been removed from the portion corresponding to the penetration 40.

[0054] The second build-up step J5 is a step in which the outermost insulating layers of the printed circuit board 100 (i.e., the second insulating layer 12 and the third insulating layer 13) are formed. In the second build-up step J5, a material different from the first insulating layer 11 and the insulating layers laminated in the first build-up step J2 is used. This material may have the first characteristic described above. In step J5, after the insulating layer material is layered on top of the wiring layers 22 and 25, heating and pressurizing are applied. This process causes the insulator of the fourth insulating layer 14 and the insulator of the fifth insulating layer 15 to adhere closely to the insulator of the material. Since one of the insulating materials has the first characteristic, but the other insulating material is a different material, high adhesion is obtained between the fourth insulating layer 14 and the second insulating layer 12, and between the fifth insulating layer 15 and the third insulating layer 13. The second insulating layer 12 and the third insulating layer 13 are formed by the above process. During heating and pressurization, molten insulator 53 moves from the insulating layer material and fills the penetration 40. The insulator that moves from the first surface S1 to the penetration 40 and the insulator that moves from the second surface S2 to the penetration 40 come into contact in a molten state. Therefore, high adhesion can be obtained even at the parts 57 in the penetration 40 where the insulator comes into contact after hardening. The materials of the second insulating layer 12 and the third insulating layer 13 may contain an amount of insulator that is sufficiently large compared to the volume of the penetration 40. By using such materials, the penetration 40 can be sufficiently filled with insulator.

[0055] In the second build-up step J5, a conductor layer 62 is further formed on the fifth surface S5 of the second insulating layer 12 and the eighth surface S8 of the third insulating layer 13.

[0056] After the second build-up process J5, although not shown in the diagram, the wiring process for the wiring layers 21 and 26 is carried out, and the printed circuit board 100 is manufactured. After the wiring process, a step of forming a solder resist layer on the wiring layers 21 and 26 may be added.

[0057] (Embodiment 2) Figure 5 is a longitudinal cross-sectional view showing a printed circuit board according to Embodiment 2 of the present disclosure. The printed circuit board 100A of Embodiment 2 may be the same as that of Embodiment 1, except that the configuration of the first insulating layer 11, the fourth insulating layer 14, and the fifth insulating layer 15 is different.

[0058] The first insulating layer 11 located between the first land 51a and the second land 51b may include a plurality of insulating layers 11a to 11c. Furthermore, wiring layers 27 and 28 may be located between the plurality of insulating layers 11a to 11c, respectively. Figure 5 shows an example with three insulating layers 11a to 11c and two wiring layers 27 and 28, but the number is not limited to this. Each of the insulating layers 11a to 11c may include a reinforcing material. The plurality of insulating layers 11a to 11c and the plurality of wiring layers 23, 24, 27, and 28 may be a core substrate.

[0059] The fourth insulating layer 14, located between the first insulating layer 11 and the second insulating layer 12, may include a plurality of insulating layers 14a and 14b. Furthermore, a wiring layer 29 may be located between the plurality of insulating layers 14a and 14b. Figure 5 shows an example with two insulating layers 14a and 14b and one wiring layer 29, but the number is not limited to this. Each of the insulating layers 14a and 14b may include a reinforcing material. The plurality of insulating layers 14a and 14b and the plurality of wiring layers 22 and 29 may also be a plurality of build-up layers.

[0060] The fifth insulating layer 15, located between the first insulating layer 11 and the third insulating layer 13, may include multiple insulating layers 15a and 15b. Furthermore, a wiring layer 30 may be located between the multiple insulating layers 15a and 15b. Figure 5 shows an example with two insulating layers 15a and 15b and one wiring layer 30, but the number is not limited to this. Each of the insulating layers 15a and 15b may include a reinforcing material. The multiple insulating layers 15a and 15b and the multiple wiring layers 25 and 30 may be multiple build-up layers.

[0061] The same effects as in Embodiment 1 are achieved in the printed circuit board 100A of Embodiment 2.

[0062] Although embodiments of the present disclosure have been described above, the printed circuit boards of the present disclosure are not limited to the embodiments described above, and the details shown in the embodiments can be modified as appropriate without departing from the spirit of the invention.

[0063] The following describes one embodiment of this disclosure. In one embodiment, (1) Printed circuit boards are A printed circuit board having a first surface and a second surface located opposite the first surface, A first insulating layer located between the first and second surfaces, away from the first and second surfaces, A second insulating layer including the first surface, A third insulating layer including the second surface, A fourth insulating layer consisting of one or more insulating layers located between the first insulating layer and the second insulating layer, A fifth insulating layer consisting of one or more insulating layers located between the first insulating layer and the third insulating layer, A through portion located across the fourth insulating layer, the first insulating layer, and the fifth insulating layer, extending from the first surface to the second surface, A first penetration portion which is part of the penetration portion and located in the first insulating layer, A first inner wall conductor covering the inner wall of the first penetration portion, In a planar perspective view, the first signal conductor overlaps the through portion and is located on the first surface, In a planar perspective view, the second signal conductor overlaps the through portion and is located on the second surface, Equipped with, An insulator continuous with the insulator of the second insulating layer and the insulator of the third insulating layer is located at the through-port, The first inner wall conductor includes a first land located between the first insulating layer and the fourth insulating layer, along the opening of the first penetration, and a second land located between the first insulating layer and the fifth insulating layer. The relative permittivity of the insulator of the second insulating layer and the insulator of the third insulating layer is smaller than the relative permittivity of the insulators of the first insulating layer, the fourth insulating layer, and the fifth insulating layer, respectively.

[0064] (2) The printed circuit board described in (1) above is The first signal conductor is an antenna conductor, The aforementioned second signal conductor is a power supply conductor.

[0065] (3) The printed circuit board described in (1) or (2) above is In the first surface, a first ground conductor located around the first signal conductor, In the second surface, a second ground conductor located around the second signal conductor, Between the second insulating layer and the fourth insulating layer, a third grounding conductor is located around the opening of the through-port, The third insulating layer and the fifth insulating layer further include a fourth grounding conductor located around the opening of the through-port, There are no grounding conductors located around the through-hole that connect the first grounding conductor to the third grounding conductor, the third grounding conductor to the first land, the fourth grounding conductor to the second land, and the second grounding conductor to the fourth grounding conductor.

[0066] (4) The printed circuit board described in (3) above is The thickness W1 of the second insulating layer, the thickness W2 of the third insulating layer, the thickness W3 of the fourth insulating layer from the first surface to the first land, and the thickness W4 of the fifth insulating layer from the second surface to the second land are all less than or equal to 1 / 10 of the wavelength of the electromagnetic wave propagating through the penetration portion.

[0067] (5) Any of the printed circuit boards described in (1) to (4) above, The aforementioned through-port includes a second through-port located in the fourth insulating layer and a third through-port located in the fifth insulating layer. In a planar perspective view, the inner wall of the first inner wall conductor is located inside the second and third penetration portions. [Explanation of Symbols]

[0068] 100, 100A Printed Circuit Board 11. First insulating layer 12. Second insulating layer 13. Third insulating layer 14. Fourth insulating layer 15. Fifth insulating layer 11a~11c, 14a, 14b, 15a, 15b Insulating layer 21~30 wiring layer 211 First signal conductor 212 First Ground Conductor 222 Third ground conductor 252 Fourth Ground Conductor 261 Second signal conductor 262 Second Ground Conductor 40 Penetration section 41 First penetration section 42 Second penetration section 43 Third penetration section 50 waveguide 51 First inner wall conductor 51a First Round 51b Second Round 51d Inner surface 53-55 Insulator S1 page 1 S2 side 2 W1~W4 Thickness 300 electronic elements

Claims

1. A printed circuit board having a first surface and a second surface located opposite the first surface, A first insulating layer located between the first and second surfaces, away from the first and second surfaces, A second insulating layer including the first surface, A third insulating layer including the second surface, A fourth insulating layer consisting of one or more insulating layers located between the first insulating layer and the second insulating layer, A fifth insulating layer consisting of one or more insulating layers located between the first insulating layer and the third insulating layer, A through portion located across the fourth insulating layer, the first insulating layer, and the fifth insulating layer, extending from the first surface side to the second surface side, A first penetration portion which is part of the penetration portion and located in the first insulating layer, A first inner wall conductor covering the inner wall of the first penetration portion, In a planar perspective view, the first signal conductor overlaps the through portion and is located on the first surface, In a planar perspective view, the second signal conductor overlaps the through portion and is located on the second surface, Equipped with, An insulator continuous with the insulator of the second insulating layer and the insulator of the third insulating layer is located at the through-port, The first inner wall conductor includes a first land located between the first insulating layer and the fourth insulating layer, along the opening of the first penetration, and a second land located between the first insulating layer and the fifth insulating layer. The relative permittivity of the insulator of the second insulating layer and the insulator of the third insulating layer is smaller than the relative permittivity of the insulators of the first insulating layer, the fourth insulating layer, and the fifth insulating layer. Printed wiring board.

2. The first signal conductor is an antenna conductor, The second signal conductor is a power supply conductor. The printed circuit board according to claim 1.

3. In the first surface, a first ground conductor located around the first signal conductor, In the second surface, a second ground conductor is located around the second signal conductor, Between the second insulating layer and the fourth insulating layer, a third grounding conductor is located around the opening of the through-port, The third insulating layer and the fifth insulating layer further include a fourth grounding conductor located around the opening of the through-port, There are no grounding conductors located around the aforementioned penetration that connect the first grounding conductor and the third grounding conductor, the third grounding conductor and the first land, the fourth grounding conductor and the second land, and the second grounding conductor and the fourth grounding conductor. The printed circuit board according to claim 1.

4. The thickness W1 of the second insulating layer, the thickness W2 of the third insulating layer, the thickness W3 of the fourth insulating layer from the first surface to the first land, and the thickness W4 of the fifth insulating layer from the second surface to the second land are 1 / 10 or less of the wavelength of the electromagnetic wave propagating through the penetration portion. The printed circuit board according to claim 3.

5. The aforementioned through-port includes a second through-port located in the fourth insulating layer and a third through-port located in the fifth insulating layer. In a planar perspective view, the inner wall of the first inner wall conductor is located inside the second and third penetration portions. The printed circuit board according to claim 1.

Citation Information

Patent Citations

  • Printed wiring board and method of manufacturing the same

    JP2017084913A