Semiconductor equipment

Abstract

In a semiconductor device equipped with an integrated circuit that controls the charging and discharging of a secondary battery, the integrated circuit is protected from abnormally high voltages applied to external terminals. [Solution] The semiconductor device is characterized by comprising: a first integrated circuit having a first power terminal, a first voltage terminal connected to an external terminal that outputs a voltage received from a secondary battery to the outside, a second power terminal connected to the negative terminal of the secondary battery, a first signal terminal connected to the external terminal and to which a signal is input or output, a second signal terminal electrically connected to the first signal terminal, and a first diode having an anode connected to the first signal terminal and a cathode connected to the first voltage terminal; a second integrated circuit having a third power terminal electrically connected to the positive terminal of the secondary battery, a fourth power terminal that outputs a power supply voltage generated based on the voltage received at the third power terminal to the first power terminal, and a third signal terminal that inputs or outputs a signal to the second signal terminal, and controlling the charging and discharging of the secondary battery.

Description

Technical Field

[0001] The present invention relates to a semiconductor device.

Background Art

[0002] In an integrated circuit, a technique for protecting the integrated circuit from ESD (Electro-Static Discharge) with respect to input / output terminals by disposing diodes between an input / output terminal and a ground line and between the input / output terminal and a power supply line, respectively, is known (see, for example, Patent Document 1).

[0003] Also, an ESD protection circuit is known that protects not only the integrated circuit itself from ESD but also the integrated circuit from ESD generated during the operation of a system in which the integrated circuit is mounted. This type of ESD protection circuit includes a voltage detection circuit having a low-pass filter structure and a discharge transistor that operates according to the detection result of the voltage detection circuit. The ESD protection circuit turns on the discharge transistor only when ESD occurs and maintains the discharge transistor in an off state when noise is generated by the system operation (see, for example, Patent Document 2).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] For example, in a semiconductor device that includes transistors arranged in the charge / discharge path of a secondary battery and a control IC (Integrated Circuit) that controls the transistors based on signals received at the signal terminals, it is necessary to protect the control IC from ESD at the signal terminals. However, no specific method has been proposed to protect the control IC from ESD.

[0006] The disclosed technology aims to protect an integrated circuit from abnormally high voltages applied to external terminals in a semiconductor device equipped with an integrated circuit that controls the charging and discharging of a secondary battery. [Means for solving the problem]

[0007] To solve the above technical problems, a semiconductor device according to one embodiment of the present invention is characterized by comprising: a first integrated circuit having a first external terminal connected to the positive electrode of a secondary battery; a second external terminal connected to the negative electrode of the secondary battery; a third external terminal electrically connected to the first external terminal and outputting a voltage received from the secondary battery to the outside; a fourth external terminal to which a signal is input or output to the outside; a first power terminal; a first voltage terminal connected to the third external terminal; a second power terminal connected to the second external terminal; a first signal terminal connected to the fourth external terminal and to which a signal is input or output; a second signal terminal electrically connected to the first signal terminal; and a first diode to which the anode is electrically connected to the first signal terminal and the cathode is electrically connected to the first voltage terminal; and a second integrated circuit having a third power terminal electrically connected to the first external terminal; a fourth power terminal to which a power supply voltage generated based on the voltage received at the third power terminal is output to the first power terminal; and a third signal terminal to which a signal is input or output to the second signal terminal, and which controls the charging and discharging of the secondary battery. [Effects of the Invention]

[0008] In a semiconductor device equipped with an integrated circuit that controls the charging and discharging of a secondary battery, the integrated circuit can be protected from abnormally high voltages applied to external terminals. [Brief explanation of the drawing]

[0009] [Figure 1] This is a block diagram showing one embodiment of a semiconductor device according to the present invention. [Figure 2] Block diagram showing examples of other semiconductor devices. [Figure 3] A block diagram showing a modified example of the semiconductor device shown in Figure 1. [Figure 4] A modified example of the semiconductor device shown in Figure 2 is a block diagram. [Modes for carrying out the invention]

[0010] The embodiments will be described below with reference to the drawings. In the following, the same reference numerals as the signal names may be used for signal lines, signal terminals, and signal nodes through which signals are transmitted. The same reference numerals as the voltage names may be used for voltage lines, voltage terminals, and voltage nodes through which voltage is supplied. In each drawing, the same reference numerals are used for identical components, and redundant explanations may be omitted.

[0011] (Example of a semiconductor device in one embodiment) Figure 1 is a block diagram showing one embodiment of a semiconductor device according to the present invention. For example, the battery protection module 100 shown in Figure 1 is mounted on a battery pack 200 together with a secondary battery 300 such as a Li-ion battery. The battery protection module 100 includes a control IC 110, a protection IC 120, transistors TR1 and TR2, resistors R1 and R2, and capacitors C1, C2, C3, and C4.

[0012] In Figure 1, the external terminals of the battery protection module 100 are shown as circles, and the internal terminals of the battery protection module 100 are shown as squares. For example, the external terminals of the battery protection module 100 are terminals provided on the connector for connecting the secondary battery 300 and the connector for connecting electronic equipment or a charger. The internal terminals are also the external terminals of the control IC 110 and the protection IC 120. The battery protection module 100 is an example of a semiconductor device. The protection IC 120 is an example of a first integrated circuit, and the control IC 110 is an example of a second integrated circuit.

[0013] The battery protection module 100 has external terminals B+, B-, P+, P-, E1, and E2. External terminals B+, B-, and P+ are examples of the first, second, and third external terminals, respectively. External terminal E1 is an example of a fourth external terminal to which a signal is input or output to the outside. External terminal B+ is connected to the positive terminal of the secondary battery 300, and external terminal B- is connected to the negative terminal of the secondary battery 300.

[0014] External terminals P+ and P- are connected to the power terminal and ground terminal of an electronic device (not shown), respectively. External terminals P+ and P- may also be connected to the power terminal and ground terminal of a charger (not shown), respectively. The charger may be connected to the battery pack 200 via an electronic device. External terminal P+ outputs the high voltage appearing at the positive terminal of the secondary battery 300 to the outside. External terminal P- outputs the low voltage appearing at the negative terminal of the secondary battery 300 to the outside. Although not particularly limited, for example, the secondary battery 300 outputs a maximum of 4.2V when fully charged.

[0015] For example, the electronic devices connected to the battery pack 200 are portable devices such as mobile phones, smartphones, tablets, and earphones. However, the electronic devices are not limited to portable devices; any device that can operate using the power of the secondary battery 300 when the battery pack 200 is connected to it is acceptable.

[0016] Resistor R1 and transistors TR1 and TR2 are connected in series between external terminals B+ and P+. Resistor R2 and capacitor C1 are connected in series between external terminals B+ and B-. External terminal B- is connected to external terminal P-. Capacitors C2 and C3 are connected in series between the source of transistor TR1 and the source of transistor TR2. Capacitor C4 is connected between external terminals P+ and P-.

[0017] The control IC 110 has a power supply terminal VDD1, REG, a ground terminal GND1, a terminal BAT, a charge control terminal COUT, a discharge control terminal DOUT, a terminal V+, S1, and S2. The protection IC 120 has a power supply terminal VDD2, a ground terminal GND2, terminals CH1A, CH2A, CH3A, CH1B, CH2B, and CH3B. The power supply terminal REG and the terminal V+ are examples of a fourth power supply terminal and a third voltage terminal, respectively. The terminals S1 and S2 are examples of a third signal terminal for inputting or outputting signals, respectively. The power supply terminal VDD2, the terminals CH1A, CH2A, CH1B, and CH2B are examples of a first power supply terminal, a second voltage terminal, a second signal terminal, a first voltage terminal, and a first signal terminal, respectively.

[0018] Also, the protection IC 120 has an under-voltage protection circuit UVP (Under Voltage Protect), resistors R3 and R4, switches SW1 and SW2, drivers DRV1, DRV2, and DRV3, and transistors TR3, TR4, and TR5. Further, the protection IC 120 has diodes D1, D2, D3, D4, D5, D6, D7, D8, and D9. The diodes D6 and D7 are examples of a third diode. The diodes D8 and D9 are examples of a first diode. The transistors TR3 and TR4 are examples of a second switch and a first switch, respectively.

[0019] In the control IC 110, the power supply terminal VDD1 is connected to an external terminal B+ via a resistor R2 and is also connected to the external terminal B+ via a capacitor C1. That is, the resistor R2 and the capacitor C1 are connected in series between the external terminals B+ and B- via the connection node of the power supply terminal VDD1. The ground terminal GND1 is connected to the external terminals B+ and P-. The power supply terminal REG is connected to the power supply terminal VDD2 of the protection IC 120. The terminal BAT is connected to the external terminal B+ via a resistor R1. The charge control terminal COUT is connected to the gate of the transistor TRl, and the discharge control terminal DOUT is connected to the gate of the transistor TR2. The terminal V+ is connected to the terminal CH1A of the protection IC 120. The terminal S1 is connected to the terminal CH2A of the protection IC 120, and the terminal S2 is connected to the terminal CH3A of the protection IC 120.

[0020] Transistors TR1 and TR2 are, for example, N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and function as switches. Transistor TR1 has a parasitic diode DD, and transistror TR2 has a parasitic diode CD. The anode of the parasitic diode DD is connected to the source of the transistror TR1, and the cathode is connected to the drain of the transistror TR1. The anode of the parasitic diode CD is connected to the source of the transistror TR2, and the cathode is connected to the drain of the transistror TR2.

[0021] The control IC110 outputs a charge control signal COUT for controlling conduction / blocking between the source and drain of the transistror TR1 to the gate of the transistror TR1. The transistror TR1 conducts while receiving a high-level charge control signal COUT and is blocked while receiving a low-level charge control signal COUT. Also, the control IC110 outputs a discharge control signal DOUT for controlling conduction / blocking of the transistror TR2 to the gate of the transistror TR2. The transistror TR2 conducts while receiving a high-level discharge control signal DOUT and is blocked while receiving a low-level discharge control signal DOUT. Hereinafter, conduction and blocking between the source and drain of the transistror are referred to as on and off, respectively.

[0022] While the transistror TR1 is on and the transistror TR2 is off, a charging path from the external terminal P+ side toward the positive electrode side of the secondary battery 300 is formed by the parasitic diode CD. On the other hand, while the transistror TR1 is off and the transistror TR2 is on, a discharging path from the positive electrode side of the secondary battery 300 toward the external terminal P+ side is formed by the parasitic diode CD.

[0023] The control IC 110 monitors the voltage at the external terminal P+ received at terminal V+ during charging of the secondary battery 300. If it detects that the voltage at external terminal P+ is higher than the overcharge detection voltage, it turns off transistor TR1 to protect the secondary battery 300 from overcharging and other charging abnormalities. In other words, even when the voltage at external terminal P+ is supplied to terminal V+ of the control IC 110 via the protection IC 120, the control IC 110 can detect an overvoltage at external terminal P+ and turn off transistor TR1, thereby protecting the secondary battery 300 from overvoltage.

[0024] Furthermore, the control IC 110 monitors the voltage received at terminal BAT during the discharge of the secondary battery 300. If it detects that the voltage is lower than the over-discharge detection voltage, it turns off transistor TR2 to protect the secondary battery 300 from discharge abnormalities such as over-discharge.

[0025] The control IC 110 operates by receiving the power supply voltage and ground voltage from the secondary battery 300 at the power supply terminal VDD1 and the ground terminal GND1. The control IC 110 also generates the power supply voltage VDD2 from the power supply voltage VDD1 using, for example, an internal regulator (not shown), and supplies the generated power supply voltage VDD2 to the power supply terminal VDD2 of the protection IC 120 via the power supply terminal REG. For example, the value of the power supply voltage VDD2 may be the same as the value of the power supply voltage VDD1, or it may be lower than the power supply voltage VDD1. When the power supply voltage VDD1 falls below a predetermined value, the power supply voltage VDD2 decreases in accordance with the decrease in the power supply voltage VDD1.

[0026] Terminals S1 and S2 are electrically connected to external terminals E1 and E2, respectively, via the protection IC 120. For example, external terminals E1 and E2 receive sensor data detected by various sensors mounted on electronic equipment when the electronic equipment is connected to the battery protection module 100. For example, the various sensors include a temperature sensor that detects the temperature of the electronic equipment and a pressure sensor that detects the expansion of the electronic equipment. If the sensor data received by terminals S1 and S2 indicates an abnormality, the control IC 110 turns off transistors TR1 and TR2 and stops charging and discharging the secondary battery 300. For example, the sensor data is I 2The data is transmitted using a C interface, with terminal S1 being the clock terminal and terminal S2 being the data terminal.

[0027] The control IC 110 may also detect the state of the secondary battery 300 (remaining capacity, fully charged) based on the voltage received at terminal BAT during discharge or charging of the secondary battery 300. The control IC 110 then transmits the detected state to the charger via terminals S1, S2, protection IC 120, and external terminals E1, E2. Upon receiving the state of the secondary battery 300, the charger transmits a charging instruction or a charging stop instruction to terminals S1, S2 of the control IC 110 via external terminals E1, E2, and protection IC 120. The control IC 110 controls transistors TR1, TR2 according to the received instruction to start charging the secondary battery 300 or stop charging the secondary battery 300.

[0028] The protection IC 120 operates using the power supply voltage VDD2 or the voltage received at terminal CH1B supplied by the control IC 110, and the ground voltage received at the ground terminal GND2. In the protection IC 120, terminal CH1A is connected to terminal V+ of the control IC 110, terminal CH2A is connected to terminal S1 of the control IC 110, and terminal CH3A is connected to terminal S2 of the control IC 110. Terminal CH1B is connected to external terminal P+, terminal CH2B is connected to external terminal E1, and terminal CH3B is connected to external terminal E2. The ground terminal GND2 is connected to external terminals P- and B-. Capacitor C4 is connected between external terminals P+ and P-.

[0029] Diode D1 has its anode connected to the ground terminal GND2 and its cathode connected to the power terminal VDD2 via resistor R3. Diode D2 has its anode connected to the ground terminal GND2 and its cathode connected to terminal CH1A. Diode D3 has its anode connected to the ground terminal GND2 and its cathode connected to terminal CH2A. Diode D4 has its anode connected to the ground terminal GND2 and its cathode connected to terminal CH3A.

[0030] Diode D5 has its anode connected to the ground terminal GND2 and its cathode connected to terminal CH1B. Diode D6 has its anode connected to the ground terminal GND2 and its cathode connected to terminal CH2B. Diode D7 has its anode connected to the ground terminal GND2 and its cathode connected to terminal CH3B. Diode D8 has its anode connected to terminal CH2B and its cathode connected to terminal CH1B (i.e., external terminal P+). Diode D9 has its anode connected to terminal CH3B and its cathode connected to terminal CH1B (i.e., external terminal P+).

[0031] As shown by the dashed line, the protection IC 120 may also have a diode D10 whose anode is connected to terminal CH2A and its cathode is connected to terminal CH1B. Also, as shown by the dashed line, the protection IC 120 may also have a diode D11 whose anode is connected to terminal CH3A and its cathode is connected to terminal CH1B. Diodes D10 and D11 are examples of second diodes.

[0032] Furthermore, if diodes D5, D6, D7, D8, and D9 can protect the control IC 110 from ESD to the external terminals of the battery protection module 100, then one or more of diodes D1, D2, D3, D4, D10, and D11 do not need to be placed on the protection IC 120.

[0033] For example, transistors TR3, TR4, and TR5 are N-channel MOSFETs and function as switches. Transistor TR3 is located between terminals CH1A and CH1B and operates by receiving a control signal from driver DRV1 at its gate. Transistor TR4 is located between terminals CH2A and CH2B and operates by receiving a control signal from driver DRV2 at its gate. Transistor TR5 is located between terminals CH3A and CH3B and operates by receiving a control signal from driver DRV3 at its gate.

[0034] For example, each switch SW1 and SW2 may be a transistor such as a MOSFET. Switches SW1 and SW2 are exclusively turned on by a switch control circuit (not shown), and the power supply voltage VDD2 or the voltage at terminal CH1B is supplied as the internal power supply voltage IVDD to the internal power line IVDD in the protection IC120. The internal power supply voltage IVDD is supplied to the internal circuit of the protection IC120. In this way, the power supply voltage VDD2 and the voltage at terminal CH1B are used as the operating power supply for the protection IC120. The protection IC120 may also have a regulator that converts the voltages at the power line VDD2 and terminal CH1B, respectively, received via switches SW1 and SW2, into the internal power supply voltage IVDD.

[0035] By operating switches SW1 and SW2 exclusively, it is possible to suppress the shoot-through current between terminal CH1B and power terminal VDD2 caused by switches SW1 and SW2 being turned on simultaneously. As a result, damage to control IC110 or protection IC120 due to shoot-through current can be prevented.

[0036] Furthermore, even when switches SW1 and SW2 are temporarily turned on simultaneously, the resistor R3 placed between the power terminal VDD2 and switch SW1, and the resistor R4 placed between terminal CH1B and switch SW2, can mitigate the through-current flowing between the power line VDD2 and terminal CH1B. This allows for the temporary simultaneous turning of switches SW1 and SW2 when they are switched on or off, even when the exclusive on / off (conductive) switching of switches SW1 and SW2 is performed with a single control signal. Consequently, the configuration of the circuit that controls the switching of switches SW1 and SW2 can be simplified, and the power consumption of the protection IC 120 can be reduced. As a result, the cost and power consumption of the battery protection module 100 can be reduced.

[0037] For example, the protection IC 120 controls the supply of the voltage received at terminal CH1B to the internal power line IVDD, prioritizing it over the power supply voltage VDD2 received at power supply terminal VDD2. When the charger is connected to the battery protection module 100, transistor TR1 is turned on, and the secondary battery 300 is being charged, the protection IC 120 turns on only switch SW2. Also, when the charger is disconnected from the battery protection module 100, transistor TR2 is turned on, and the secondary battery 300 is being discharged, the protection IC 120 turns on only switch SW2.

[0038] On the other hand, when the charger is disconnected from the battery protection module 100, and the discharge voltage of the secondary battery 300 is lower than a predetermined voltage, and transistors TR1 and TR2 are turned off, the external terminals P+ and CH1B become floating. In this case, the protection IC 120 turns on only switch SW1.

[0039] Thus, the protection IC 120 turns on only switch SW2 when voltage is supplied to terminal CH1B, and turns on only switch SW1 when no voltage is supplied to terminal CH1B. The battery protection module 100 can detect whether a charger or electronic device is connected to the battery protection module 100 by monitoring the voltage of the external terminal P-.

[0040] The undervoltage protection circuit UVP outputs a control signal TCNT1 to drivers DRV1, DRV2, and DRV3, respectively, which turns off transistors TR3, TR4, and TR5, when the power supply voltage VDD2 received through resistor R3 falls below a preset voltage V1. Voltage V1 is an example of a first voltage. It is not particularly limited, but voltage V1 may be, for example, 1.7V.

[0041] For example, when the power supply voltage VDD2 is lower than voltage V1, the power supply voltage VDD1 used to generate the power supply voltage VDD2 supplied to the control IC 110 is a voltage that makes it difficult for the control IC 110 to operate normally. In other words, when the power supply voltage VDD2 is lower than voltage V1, the control IC 110 may not be able to correctly receive the logic of the signals supplied to terminals S1 and S2, and may not be able to transmit signals with the correct logic from terminals S1 and S2.

[0042] If the power supply voltage VDD1 is low and the control IC 110 cannot correctly receive the logic of the signals supplied to terminals S1 and S2, the malfunction of the protection IC 120 can be suppressed by turning off transistors TR4 and TR5. Also, if the power supply voltage VDD1 is low and the control IC 110 cannot transmit signals with the correct logic from terminals S1 and S2, turning off transistors TR4 and TR5 can stop the transmission of signals from terminals S1 and S2 to the outside, thereby suppressing malfunctions of electronic equipment or chargers that receive signals transmitted from the control IC 110.

[0043] The low-voltage protection circuit UVP outputs a control signal TCNT1 to drivers DRV1, DRV2, and DRV3, which turns on transistors TR3, TR4, and TR5 respectively, when the power supply voltage VDD2 is greater than or equal to voltage V1. When the power supply voltage VDD2 is greater than or equal to voltage V1 and the power supply voltage VDD1 has returned to a normal value, the control IC 110 turns on transistors TR4 and TR5, thereby resuming the reception of signals supplied to terminals S1 and S2, and resuming the transmission of signals from terminals S1 and S2.

[0044] If no charger is connected to the battery protection module 100, the control IC 110 operates while receiving a power supply voltage VDD1 of a predetermined value or higher from the secondary battery 300, generating a power supply voltage VDD2 and outputting it to the power supply terminal REG. The protection IC 120 operates upon receiving the power supply voltage VDD2 from the power supply terminal REG. In other words, the battery protection module 100 operates by receiving power from the secondary battery 300 even when no charger is connected to it.

[0045] When the battery protection module 100 is operating and the power supply voltage VDD1 is greater than or equal to voltage V1, transistors TR3, TR4, and TR5 turn on, and external terminals P+, E1, and E2 are electrically connected to terminals V+, S1, and S2 of the control IC 110, respectively. In this state, if a charged electronic device or a charged charger is connected to the battery protection module 100, or if a charged user's finger or the like touches external terminals E1 or E2, a positive ESD may occur with respect to the ground terminal GND2 for one or both of terminals CH2B and CH3B of the protection IC 120.

[0046] When a positive ESD occurs at terminal CH2B, the discharge current due to the ESD can be passed to the external terminal P+ via diode D8 and terminal CH1B, as shown by the dashed line in Figure 1. Similarly, when a positive ESD occurs at terminal CH3B, the discharge current can be passed to the external terminal P+ via diode D9 and terminal CH1B. In addition, a portion of the discharge current can be stored as charge in capacitors C3 and C4. This prevents the discharge current due to the ESD from flowing to terminals S1 and S2 of the control IC110, thereby preventing damage to the control IC110.

[0047] Furthermore, if the protection IC 120 has diode D10, the discharge current flowing into terminal CH2B due to positive ESD can be routed not only through the path of diode D8, but also through transistor TR4, diode D10, and terminal CH1B to the external terminal P+. Similarly, if the protection IC 120 has diode D11, the discharge current flowing into terminal CH3B due to positive ESD can be routed not only through the path of diode D9, but also through transistor TR5, diode D11, and terminal CH1B to the external terminal P+. This further improves the ESD immunity of terminals S1 and S2 of the control IC 110 compared to when the protection IC 120 does not have diodes D10 and D11.

[0048] Furthermore, when the battery protection module 100 is operating and a negative ESD occurs at terminal CH2B of the protection IC 120 with respect to the ground terminal GND2, the discharge current can be channeled from the ground terminal GND2 to terminal CH2B via diode D6 and then to the external terminal E1, as shown by the dashed line in Figure 1. Similarly, when the battery protection module 100 is operating and a negative ESD occurs at terminal CH3B of the protection IC 120 with respect to the ground terminal GND2, the discharge current can be channeled from the ground terminal GND2 to terminal CH3B via diode D7 and then to the external terminal E1.

[0049] Furthermore, if no abnormally high voltage or abnormally negative voltage such as ESD is applied to the battery protection module 100, the high-level voltage of the signals input to or output to terminals CH2B and CH3B will be lower than the voltage at terminal CH1B. Therefore, a reverse voltage is applied to diodes D8 and D9, which prevents through-current from flowing from terminals CH2B and CH3B to terminal CH1B via diodes D8 and D9.

[0050] (Examples of other semiconductor devices) Figure 2 is a block diagram showing examples of other semiconductor devices. Elements similar to those in Figure 1 are denoted by the same reference numerals, and detailed explanations are omitted. For example, the battery protection module 100A shown in Figure 2 is mounted on a battery pack 200A together with a secondary battery 300. The battery protection module 100A is an example of a semiconductor device. The battery protection module 100A has the same configuration as the battery protection module 100 in Figure 1, except that it has a protection IC 120A instead of the protection IC 120 in Figure 1. Note that the battery protection module 100A illustrated in Figure 2 corresponds to a comparative example of the present invention. The protection IC 120A has the same configuration as the protection IC 120 in Figure 1, except that it has diodes D8A and D9A instead of diodes D8, D9, D10, and D11 in Figure 1.

[0051] If the diode D8 shown in Figure 1 is not installed on the protection IC 120A, when the positive ESD voltage across the external terminal E1 exceeds the breakdown voltage of diode D6, the ESD discharge current flows from the external terminal E1 through diode D6 to the ground terminal GND2 of the protection IC 120A.

[0052] However, until the positive ESD voltage across external terminal E1 exceeds the breakdown voltage of diode D6, the ESD discharge current flows from external terminal E1 through terminal S1 of the protection IC 120A and control IC 110 to the ground terminal GND1 of the control IC 110, as shown by the dashed line. Similarly, if diode D9 shown in Figure 1 is not mounted on the protection IC 120A, the ESD discharge current flows from external terminal E2 through terminal S2 of the protection IC 120A and control IC 110 to the ground terminal GND1 of the control IC 110, until the positive ESD voltage across external terminal E2 exceeds the breakdown voltage of diode D7.

[0053] For example, the rated voltage of control IC110 is lower than the breakdown voltage of diodes D6 and D7. Therefore, if diodes D8A, D9A and diodes D8 and D9 shown in Figure 1 are not installed in protection IC120A, the control IC110 may be damaged if a positive voltage due to the discharge current is applied to terminals S1 and S2 until diodes D6 and D7 break down. In other words, by installing diodes D8 and D9 in protection IC120 as shown in Figure 1, damage to control IC110 can be suppressed even if ESD occurs at external terminals E1 and E2.

[0054] Furthermore, if diode D8A is used instead of diode D8 shown in Figure 1, as shown in Figure 2, with its anode connected to terminal CH2B and its cathode connected to power terminal VDD2 via resistor R3, the following problem occurs: When a positive ESD occurs at external terminal E1, the discharge current flows through diode D8A, resistor R3, and power terminal VDD2 to the power terminal REG of the control IC 110. If the rated voltage of the power terminal REG of the control IC is low and the protection against ESD is insufficient, the control IC 110 may be damaged.

[0055] On the other hand, as shown in Figure 1, if the discharge current due to positive ESD at the external terminal E1 can be channeled to terminal P+ via diode D8 and terminal CH1B, the discharge current will flow to the power line connecting terminal B+ and terminal P+, which are connected to the positive electrode of the secondary battery 300, and therefore the control IC 110 will not be damaged. However, if diode D9A, as shown in Figure 2, is used instead of diode D9 shown in Figure 1, with its anode connected to terminal CH3B and its cathode connected to power terminal VDD2 via resistor R3, the control IC 110 may still be damaged if positive ESD occurs at the external terminal E2, similar to the above.

[0056] In the embodiment shown in Figure 1, when ESD occurs at terminals CH2B and CH3B, the discharge current due to the positive ESD can be passed to the external terminal P+ via diodes D8 and D9. This prevents the discharge current due to the ESD from flowing to terminals S1 and S2 of the control IC 110, thereby preventing damage to the control IC 110.

[0057] If the protection IC 120A has diodes D10 and D11, the discharge current flowing into terminals CH2B and CH3B due to ESD can be routed not only through the path of diodes D8 and D9, but also through diodes D10 and D11 to the external terminal P+. This further improves the ESD immunity of terminals S1 and S2 of the control IC 110 compared to when the protection IC 120A does not have diodes D10 and D11.

[0058] When the battery protection module 100 is operating, if a negative ESD occurs at terminals CH2B and CH3B of the protection IC 120A with respect to the ground terminal GND2, the discharge current can be flowed from the ground terminal GND2 to the external terminals E1 and E2 via diodes D6 and D7 and terminals CH2B and CH3B. This prevents damage to the control IC 110 due to negative ESD at the external terminals E1 and E2.

[0059] Furthermore, if no abnormally high voltage such as ESD is applied to the battery protection module 100, the high-level voltage of the signals input to or output to terminals CH2B and CH3B will be lower than the voltage at terminal CH1B. Therefore, a reverse voltage is applied to diodes D8 and D9, which prevents through-current from flowing from terminals CH2B and CH3B to terminal CH1B via diodes D8 and D9.

[0060] The protection IC 120A turns off transistors TR4 and TR5 when it detects that the power supply voltage VDD1, which the control IC 110 uses to generate power supply voltage VDD2, is also low, based on the power supply voltage VDD2 being lower than voltage V1. This prevents the protection IC 120A from malfunctioning when the power supply voltage VDD1 is low and the control IC 110 cannot correctly receive the logic of the signals supplied to terminals S1 and S2. Furthermore, if the power supply voltage VDD1 is low and the control IC 110 cannot transmit signals with the correct logic from terminals S1 and S2, it can stop transmitting signals from terminals S1 and S2 to the outside, thereby preventing malfunctions in electronic equipment or chargers that receive signals transmitted from the control IC 110.

[0061] Furthermore, when the protection IC 120A detects that the power supply voltage VDD2 has risen from a state where it was lower than voltage V1 to a state where it is higher than or equal to voltage V1, and that the power supply voltage VDD1 has returned to its normal value, it turns on transistors TR4 and TR5. This allows the control IC 110 to resume receiving signals supplied to terminals S1 and S2, and to resume transmitting signals from terminals S1 and S2.

[0062] Furthermore, the diodes D1 to D11 shown in Figure 1 can be replaced with MOS transistors DM1 to DM11 that function as ESD elements, with the gate electrode connected to the source electrode, as shown in Figure 3. Specifically, the MOS transistor placed between the power terminal VDD2 and the ground terminal GND2 is an N-type MOS transistor DM1, with its drain electrode connected to the power terminal VDD2 and its source and gate electrodes connected to the ground terminal GND2. The MOS transistor placed between terminal CH1A and the ground terminal GND2 is an N-type MOS transistor DM2, with its drain electrode connected to terminal CH1A and its source and gate electrodes connected to the ground terminal GND2. Similarly, N-type MOS transistors DM3 to DM7 are used as ESD elements connected to the ground terminal GND2, with their source and gate electrodes connected to the ground terminal GND2.

[0063] Furthermore, when no ESD occurs, the source and gate electrodes of each N-type MOS transistor DM1 to DM7 are at the voltage of the ground terminal GND2, causing each N-type MOS transistor DM1 to DM7 to turn off, and the connection between the source and drain electrodes becomes non-conductive.

[0064] On the other hand, the MOS transistor located between terminals CH2B and CH1B is a P-type MOS transistor DM8, with its source electrode and gate electrode connected to terminal CH1B and its drain electrode connected to terminal CH2B. The MOS transistor located between terminals CH3B and CH1B is a P-type MOS transistor DM9, with its source electrode and gate electrode connected to terminal CH1B and its drain electrode connected to terminal CH3B. P-type MOS transistors DM8 and DM9 are examples of first-generation MOS transistors.

[0065] The MOS transistor located between terminals CH2A and CH1B is a P-type MOS transistor DM10, with its source electrode and gate electrode connected to terminal CH1B and its drain electrode connected to terminal CH2A. The MOS transistor located between terminals CH3A and CH1B is a P-type MOS transistor DM11, with its source electrode and gate electrode connected to terminal CH1B and its drain electrode connected to terminal CH3A. P-type MOS transistors DM10 and DM11 are examples of second-generation MOS transistors.

[0066] For example, when a positive ESD occurs at terminals CH2B, CH3B, CH2A, or CH3A, the PN junction between the drain electrode and back gate of the corresponding P-type MOS transistors DM8, DM9, DM10, and DM11 becomes forward-biased. As a result, the ESD current flows from the drain electrode to the back gate.

[0067] On the other hand, when negative ESD occurs at terminals CH2B, CH3B, CH2A, or CH3A, the PN junction between the substrate and the drain electrode of the corresponding N-type MOS transistors DM6, DM7, DM3, and DM4 becomes forward-biased. As a result, the ESD current flows from the ground terminal GND2 to the drain electrode.

[0068] Furthermore, when no ESD occurs at terminals CH2B, CH3B, CH2A, or CH3A, the source and gate electrodes of the corresponding P-type MOS transistors DM8 to DM11 become the voltage of terminal CHB1, i.e., the voltage of terminal P+. As a result, each P-type MOS transistor DM8 to DM11 turns off, and the connection between the source and drain electrodes becomes non-conductive.

[0069] Similarly, the diodes D1 to D7 shown in Figure 2 can be replaced with N-type MOS transistors DM1 to DM7 as shown in Figure 4. Furthermore, the diodes D8A and D9A shown in Figure 2 can be replaced with P-type MOS transistors DM8A and DM9A as shown in Figure 4.

[0070] Although the present invention has been described above based on various embodiments, the present invention is not limited to the requirements shown in the above embodiments. These points can be modified as long as they do not impair the spirit of the present invention, and can be appropriately determined according to their application. [Explanation of symbols]

[0071] 100...Battery protection module, 110...Control IC, 120...Protection IC, 200...Battery pack, 300...Secondary battery, B+, B-...External terminals, BAT...Terminal, C1, C2, C3, C4...Capacitance, CD...Parasitic diode, CH1A, CH1B...Terminal, CH2A, CH2B...Terminal, CH3A, CH3B...Terminal, COUT...Charging control terminal, D1, D2, D3, D4, D5...Diode, D6, D7, D8, D8A, D9, D9A, D10, D11...Diode, DD...Parasitic diode, DM1, DM2, DM3, DM4, DM5, DM6, DM7...N-type MOS transistor DM8, DM9, DM10, DM11...P-type MOS transistors, DM8A, DM9A...P-type MOS transistors, DOUT...Discharge control terminal, DRV1, DRV2, DRV3...Driver, E1, E2...External terminals, GND1, GND2...Ground terminals, IVDD...Internal power line, P+, P-...External terminals, R1, R2, R3, R4...Resistors, REG...Power terminal, S1, S2...Terminals, SW1, SW2...Switches, TCNT1...Control signal, TR1, TR2, TR3, TR4, TR5...Transistors, UVP...Low voltage protection circuit, V+...Terminal, VDD1, VDD2...Power supply voltage

Claims

1. The first external terminal connected to the positive electrode of the secondary battery, A second external terminal connected to the negative electrode of the aforementioned secondary battery, A third external terminal is electrically connected to the first external terminal and outputs the voltage received from the secondary battery to the outside, A fourth external terminal from which signals are input or output to the outside, A first integrated circuit having a first power terminal, a first voltage terminal connected to the third external terminal, a second power terminal connected to the second external terminal, a first signal terminal connected to the fourth external terminal and on which a signal is input or output, a second signal terminal electrically connected to the first signal terminal, and a first diode whose anode is electrically connected to the first signal terminal and whose cathode is electrically connected to the first voltage terminal, The second integrated circuit includes a third power supply terminal electrically connected to the first external terminal, a fourth power supply terminal that outputs a power supply voltage generated based on the voltage received at the third power supply terminal to the first power supply terminal, and a third signal terminal that inputs or outputs a signal to the second signal terminal, and controls the charging and discharging of the secondary battery. A semiconductor device characterized by the following features.

2. The first integrated circuit includes a first switch positioned between the first signal terminal and the second signal terminal, and a second diode whose anode is electrically connected to the second signal terminal and whose cathode is electrically connected to the first voltage terminal. The semiconductor device according to feature 1.

3. The first integrated circuit has a third diode whose anode is electrically connected to the second power supply terminal and whose cathode is electrically connected to the first signal terminal. The rated voltage of the second integrated circuit is lower than the breakdown voltage of the third diode. The semiconductor device according to feature 1.

4. The high-level voltage of the aforementioned signal is lower than the voltage supplied to the first voltage terminal. The semiconductor device according to feature 1.

5. The first integrated circuit includes a first switch positioned between the first signal terminal and the second signal terminal, and a first control circuit for controlling the first switch. The first control circuit shuts off the first switch when the voltage received at the first power supply terminal becomes lower than the first voltage. The semiconductor device according to feature 1.

6. The first integrated circuit includes a second voltage terminal, a second switch positioned between the second voltage terminal and the first voltage terminal, and a second control circuit for controlling the second switch. The second integrated circuit has a third voltage terminal electrically connected to the second voltage terminal, The second control circuit shuts off the second switch when the voltage received at the first power supply terminal becomes lower than the first voltage. The semiconductor device according to feature 5.

7. The first control circuit causes the first switch to conduct when the voltage received at the first power supply terminal becomes equal to or greater than the first voltage. The semiconductor device according to feature 5.

8. The first external terminal connected to the positive electrode of the secondary battery, A second external terminal connected to the negative electrode of the aforementioned secondary battery, A third external terminal is electrically connected to the first external terminal and outputs the voltage received from the secondary battery to the outside, A fourth external terminal from which signals are input or output to the outside, A first integrated circuit having a first power supply terminal, a first voltage terminal connected to the third external terminal, a second power supply terminal connected to the second external terminal, a first signal terminal connected to the fourth external terminal and to which a signal is input or output, a second signal terminal electrically connected to the first signal terminal, and a first MOS transistor whose drain is electrically connected to the first signal terminal and whose source and gate are electrically connected to the first voltage terminal, The second integrated circuit includes a third power supply terminal electrically connected to the first external terminal, a fourth power supply terminal that outputs a power supply voltage generated based on the voltage received at the third power supply terminal to the first power supply terminal, and a third signal terminal that inputs or outputs a signal to the second signal terminal, and controls the charging and discharging of the secondary battery. A semiconductor device characterized by the following features.

9. The first integrated circuit includes a first switch positioned between the first signal terminal and the second signal terminal, and a second MOS transistor whose drain is electrically connected to the second signal terminal and whose source and gate are electrically connected to the first voltage terminal. The semiconductor device according to feature 8.

10. The semiconductor device according to claim 9, characterized in that the first MOS transistor and the second MOS transistor are P-type.

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