Semiconductor equipment

Abstract

To provide a semiconductor device capable of improving characteristics. 【Solution means】According to an embodiment, the semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and a first insulating member. The semiconductor member includes a first semiconductor region containing Al x1 Ga 1-x1 N (0 ≦ x1 < 1), a second semiconductor region containing Al x2 Ga 1-x2 N (0 < x2 < 1, x1 < x2), and Al x3 Ga 1-x3 N (0

Description

Technical Field

[0001] Embodiments of the present invention relate to semiconductor devices.

Background Art

[0002] For example, in semiconductor devices, improvement in characteristics is desired.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments of the present invention provide a semiconductor device capable of improving characteristics.

Means for Solving the Problems

[0005] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and a first insulating member. The third electrode includes a first electrode portion. The position of the first electrode portion of the third electrode in a first direction from the first electrode to the second electrode is between the position of the first electrode of the first electrode in the first direction and the position of the second electrode of the second electrode in the first direction. The semiconductor member includes a first semiconductor region containing Al x1 Ga 1-x1 N (0 ≦ x1 < 1), a second semiconductor region containing Al x2 Ga 1-x2 N (0 < x2 < 1, x1 < x2), and Al x3 Ga 1-x3It includes a third semiconductor region including N(0 < x3 < 1, x1 < x3). The third semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The direction from the first partial region to the first electrode is along a second direction intersecting the first direction. The direction from the second partial region to the second electrode is along the second direction. The direction from the third partial region to the first electrode portion is along the second direction. The position of the fourth partial region in the first direction is between the position of the first partial region in the first direction and the position of the third partial region in the first direction. The position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and the position of the second partial region in the first direction. The first semiconductor region includes a first semiconductor portion and a second semiconductor portion. The second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion. The first semiconductor portion is between the fourth partial region and the third semiconductor portion in the second direction. The second semiconductor portion is between the fifth partial region and the fourth semiconductor portion in the second direction. The first electrode portion is between the first semiconductor portion and the second semiconductor portion, and between the third semiconductor portion and the fourth semiconductor portion. The first insulating member includes a first insulating region, a second insulating region, and a third insulating region. At least a part of the second insulating region is between the first semiconductor portion and the first electrode portion. At least a part of the third insulating region is between the first electrode portion and the second semiconductor portion. The first insulating region is between the third partial region and the first electrode portion in the second direction. At least a part of the first insulating region is between the fourth partial region and the fifth partial region in the first direction.

Brief Description of the Drawings

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. [Figure 2] FIG. 2 is a graph illustrating the characteristics of the semiconductor device. [Figure 3] FIG. 3 is a graph illustrating the characteristics of the semiconductor device. [Figure 4] Figure 4 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. [Figure 5] Figure 5 is a schematic cross-sectional view illustrating a semiconductor device according to the third embodiment. [Figure 6] Figure 6 is a schematic cross-sectional view illustrating a semiconductor device according to the fourth embodiment. [Modes for carrying out the invention]

[0007] Embodiments of the present invention will be described below with reference to the drawings. Drawings are schematic or conceptual, and the relationships between the thickness and width of each part, as well as the ratios of the sizes of different parts, are not necessarily identical to those of reality. Even when representing the same part, the dimensions and ratios may be depicted differently in different drawings. In this specification and in each figure, elements similar to those described above are denoted by the same reference numerals with respect to previously shown figures, and detailed explanations are omitted as appropriate.

[0008] (First Embodiment) Figure 1 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. As shown in Figure 1, the semiconductor device 110 according to this embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a semiconductor member 10M, and a first insulating member 41.

[0009] The first direction D1 from the first electrode 51 to the second electrode 52 is defined as the X-axis direction. One direction perpendicular to the X-axis direction is defined as the Z-axis direction. The directions perpendicular to both the X-axis direction and the Z-axis direction are defined as the Y-axis direction.

[0010] The first electrode 51, the second electrode 52, and the third electrode 53 may extend, for example, along a third direction D3. The third direction D3 intersects a plane containing the first direction D1 and the second direction D2. The third direction D3 is, for example, the Y-axis direction.

[0011] The third electrode 53 includes a first electrode portion 53a. The position of the first electrode portion 53a in the first direction D1 (the third electrode position) is between the position of the first electrode 51 in the first direction D1 (the first electrode position) and the position of the second electrode 52 in the first direction D1 (the second electrode position). For example, at least a part of the first electrode portion 53a may be between the first electrode 51 and the second electrode 52 in the first direction D1.

[0012] The semiconductor member 10M includes a first semiconductor region 11, a second semiconductor region 12, and a third semiconductor region 13. The first semiconductor region 11 contains Al x1 Ga 1-x1 N (0 ≦ x1 < 1). The composition ratio x1 may be, for example, 0 or more and 0.05 or less. The first semiconductor region 11 may contain, for example, GaN (i-GaN).

[0013] The second semiconductor region 12 contains Al x2 Ga 1-x2 N (0 < x2 < 1, x1 < x2). The composition ratio x2 may be, for example, 0.15 or more and 0.3 or less. The second semiconductor region 12 contains, for example, AlGaN.

[0014] The third semiconductor region 13 contains Al x3 Ga 1-x3 N (0 < x3 < 1, x1 < x3). The composition ratio x3 may be, for example, more than 0.05 and 0.3 or less. The third semiconductor region 13 contains, for example, AlGaN. The third semiconductor region 13 does not have to contain In.

[0015] In the second direction D2 intersecting the first direction D1, the first semiconductor region 11 is between the third semiconductor region 13 and the second semiconductor region 12. The second direction D2 is, for example, the Z-axis direction.

[0016] The third semiconductor region 13 includes a first subregion 13a, a second subregion 13b, a third subregion 13c, a fourth subregion 13d, and a fifth subregion 13e. The direction from the first subregion 13a to the first electrode 51 follows the second direction D2, which intersects the first direction D1. The direction from the second subregion 13b to the second electrode 52 follows the second direction D2. The direction from the third subregion 13c to the first electrode portion 53a follows the second direction D2.

[0017] In the second direction D2, the region overlapping with the first electrode 51 corresponds to the first subregion 13a. In the second direction D2, the region overlapping with the second electrode 52 corresponds to the second subregion 13b. In the second direction D2, the region overlapping with the first electrode portion 53a corresponds to the third subregion 13c.

[0018] The position of the fourth subregion 13d in the first direction D1 lies between the position of the first subregion 13a in the first direction D1 and the position of the third subregion 13c in the first direction D1. The position of the fifth subregion 13e in the first direction D1 lies between the position of the third subregion 13c in the first direction D1 and the position of the second subregion 13b in the first direction D1. In the first subregion 13a, the second subregion 13b, the third subregion 13c, the fourth subregion 13d, and the fifth subregion 13e, the boundaries between them may be clear or unclear.

[0019] The first semiconductor region 11 includes a first semiconductor portion 11a and a second semiconductor portion 11b. The second semiconductor region 12 includes a third semiconductor portion 12c and a fourth semiconductor portion 12d. The first semiconductor portion 11a is located between the fourth partial region 13d and the third semiconductor portion 12c in the second direction D2. The second semiconductor portion 11b is located between the fifth partial region 13e and the fourth semiconductor portion 12d in the second direction D2.

[0020] The first electrode portion 53a is located between the first semiconductor portion 11a and the second semiconductor portion 11b, and between the third semiconductor portion 12c and the fourth semiconductor portion 12d.

[0021] The first insulating member 41 includes a first insulating region 41a, a second insulating region 41b, and a third insulating region 41c. At least a portion of the second insulating region 41b is located between the first semiconductor portion 11a and the first electrode portion 53a. A portion of the second insulating region 41b may be provided between the third semiconductor portion 12c and the first electrode portion 53a.

[0022] At least a portion of the third insulating region 41c is located between the first electrode portion 53a and the second semiconductor portion 11b. A portion of the third insulating region 41c may be provided between the first electrode portion 53a and the fourth semiconductor portion 12d.

[0023] The first insulating region 41a is located between the third subregion 13c and the first electrode portion 53a in the second direction D2. At least a portion of the first insulating region 41a is located between the fourth subregion 13d and the fifth subregion 13e in the first direction D1.

[0024] For example, the first electrode 51 is electrically connected to the first semiconductor portion 11a. The second electrode 52 is electrically connected to the second semiconductor portion 11b.

[0025] For example, the current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 is, for example, a potential referenced to the potential of the first electrode 51. The first electrode 51 is, for example, a source electrode. The second electrode 52 is, for example, a drain electrode. The third electrode 53 is, for example, a gate electrode. The semiconductor device 110 is, for example, a transistor.

[0026] The first semiconductor region 11 includes a region opposite to the second semiconductor region 12. For example, a carrier region 10c is formed in this region. The carrier region 10c is, for example, a two-dimensional electron gas. The semiconductor device 110 is, for example, a HEMT (High Electron Mobility Transistor).

[0027] The distance along the first direction D1 between the first electrode 51 and the third electrode 53 is shorter than the distance along the first direction D1 between the third electrode 53 and the second electrode 52. This makes it easier to obtain stable operation.

[0028] As described above, a portion of the first insulating member 41 is provided between two sub-regions of the third semiconductor region 13. For example, a recess is provided in the semiconductor member 10M, and the first insulating member 41 and the first electrode portion 53a are provided inside it. The third electrode 53 is, for example, a recessed gate electrode. For example, a high threshold voltage is easily obtained. For example, normally-off operation is easily and stably obtained.

[0029] In this embodiment, the third semiconductor region 13 is provided. This makes it easier to obtain a higher threshold voltage compared to the first reference example in which the third semiconductor region 13 is not provided.

[0030] On the other hand, a second reference example is conceivable in which a third semiconductor region 13 is provided, and the recess does not reach the interior of the third semiconductor region 13. In the second reference example, the first insulating region 41a is not provided between the two regions of the third semiconductor region 13 in the first direction D1.

[0031] On the other hand, as described above, in the embodiment, the first insulating region 41a is provided between two regions (fourth partial region 13d and fifth partial region 13e) of the third semiconductor region 13 in the first direction D1. In such a configuration, leakage current can be suppressed. Leakage current is, for example, the current that flows between the drain and source in the off state. In the off state, the gate voltage may be, for example, 0V. For example, the leakage current in the embodiment can be 0.1 times or less of the leakage current in the second reference example.

[0032] According to the embodiment, leakage current can be reduced. For example, a high threshold voltage can be obtained. According to the embodiment, a semiconductor device with improved characteristics can be provided.

[0033] In an embodiment, for example, in a current path including the first semiconductor portion 11a, it becomes difficult for current to flow in the recess portion of the third semiconductor region 13. Thereby, it is considered that the leakage current is suppressed. This is presumably due to the effect of the potential barrier at the interface between the third semiconductor region 13 and the first semiconductor region 11.

[0034] In the example shown in FIG. 1, a part of the first electrode portion 53a is between the fourth partial region 13d and the fifth partial region 13e in the first direction D1. A high threshold voltage can be obtained more stably.

[0035] As shown in FIG. 1, the first semiconductor region 11 may be in contact with the third semiconductor region 13. The second semiconductor region 12 may be in contact with the first semiconductor region 11.

[0036] As shown in FIG. 1, let the thickness of the first semiconductor region 11 in the second direction D2 be the first thickness t1. Let the thickness of the second semiconductor region 12 in the second direction D2 be the second thickness t2. Let the thickness along the second direction D2 of the third semiconductor region 13 be the third thickness t3. The first thickness t1 may be thicker than the second thickness t2. The third thickness t3 may be thicker than the second thickness t2.

[0037] The first thickness t1 may be, for example, 60 nm or more and 300 nm or less. The first thickness t1 may be, for example, 100 nm or more and 300 nm or less. The second thickness t2 may be, for example, 10 nm or more and 50 nm or less. The third thickness t3 may be, for example, 300 nm or more and 1000 nm or less.

[0038] As shown in FIG. 1, the semiconductor member 10M may further include a fourth semiconductor region 14. The fourth semiconductor region 14 contains Al x4 Ga 1-x4 N (0 ≦ x4 < 1, x4 < x3). The composition ratio x4 may be, for example, 0 or more and 0.1 or less. The fourth semiconductor region 14 contains, for example, GaN. The third semiconductor region 13 is between the fourth semiconductor region 14 and the second semiconductor region 12. The third semiconductor region 13 is between the fourth semiconductor region 14 and the first semiconductor region 11.

[0039] The concentration of carbon in the fourth semiconductor region 14 (the fourth concentration) is higher than the concentration of carbon in the first semiconductor region 11 (the first concentration). Alternatively, the fourth semiconductor region 14 contains carbon, and the first semiconductor region 11 does not contain carbon. The fourth semiconductor region 14 may contain GaN containing carbon. With the fourth semiconductor region 14, for example, a good breakdown voltage can be easily obtained.

[0040] In an embodiment, the recess in which the third electrode 53 is provided does not reach the fourth semiconductor region 14. A third partial region 13c is provided between the first electrode portion 53a of the third electrode 53 and the fourth semiconductor region 14. This makes it easier to suppress current collapse.

[0041] As shown in FIG. 1, the semiconductor device 110 may include a substrate 18s. A semiconductor member 10M is provided between the substrate 18s and the above-described electrode. The substrate 18s may include, for example, a silicon substrate or the like. The semiconductor member 10M may include a nitride layer 18b. The nitride layer 18b is provided between the substrate 18s and the fourth semiconductor region 14. The nitride layer 18b may include, for example, Al, Ga, and N.

[0042] As shown in FIG. 1, the first insulating member 41 may include a first compound layer 31 and a second compound layer 32. At least a part of the first compound layer 31 is between the second compound layer 32 and the semiconductor member 10M. The first compound layer 31 contains, for example, Al z1 Ga 1-z1 N (where x3 < z1 ≤ 1). The composition ratio z1 may be, for example, 0.6 or more and 1 or less. The first compound layer 31 may include, for example, AlN.

[0043] The second compound layer 32 contains a first element and a second element. The first element contains at least one of Si and Al. The second element contains at least one of oxygen and nitrogen. The second compound layer 32 may include silicon oxide.

[0044] The first compound layer 31 may include, for example, a first compound region 31a, a second compound region 31b, and a third compound region 31c. The second compound layer 32 may include, for example, a first compound portion 32a, a second compound portion 32b, and a third compound portion 32c.

[0045] The first insulating region 41a includes the first compound region 31a and the first compound portion 32a. The second insulating region 41b includes the second compound region 31b and the second compound portion 32b. The third insulating region 41c includes the third compound region 31c and the third compound portion 32c.

[0046] The semiconductor device 110 may further include a second insulating member 42. The second insulating member 42 includes a first insulating portion 42a and a second insulating portion 42b. The first insulating member 41 may further include a fourth insulating region 41d and a fifth insulating region 41e. The first insulating portion 42a is located between the third semiconductor portion 12c and the fourth insulating region 41d in the second direction D2. The second insulating portion 42b is located between the fourth semiconductor portion 12d and the fifth insulating region 41e in the second direction D2.

[0047] The second insulating member 42 may include at least one selected from the group consisting of silicon nitride, silicon oxide, and silicon oxynitride.

[0048] In this embodiment, the composition ratio x3 may be lower than the composition ratio x2. This results in, for example, the stress in the region of the first semiconductor region 11 facing the third semiconductor region 13 being greater than the stress in the region of the first semiconductor region 11 facing the second semiconductor region 12. For example, the generation of hole carriers is effectively suppressed.

[0049] The ratio of composition ratio x3 to composition ratio x2 can be, for example, between 0.1 and 0.5. The absolute value of the difference between composition ratio x3 and composition ratio x1 can be between 0.05 and 0.15. The absolute value of the difference between composition ratio x3 and composition ratio x1 can also be between 0.05 and 0.1.

[0050] Figure 2 is a graph illustrating the characteristics of a semiconductor device. Figure 2 illustrates the simulation results of the characteristics when the composition ratio x3 is changed. The horizontal axis in Figure 2 is the gate voltage Vg. The vertical axis in Figure 2 is the drain current Id. As shown in Figure 2, the threshold voltage increases as the composition ratio x3 increases.

[0051] Figure 3 is a graph illustrating the characteristics of a semiconductor device. The horizontal axis in Figure 3 represents the difference Δx between the composition ratio x3 and the composition ratio x1. The composition ratio x3 is higher than the composition ratio x1. The vertical axis in Figure 3 represents the first parameter P1. The first parameter P1 corresponds to the ratio of the threshold voltage to the threshold current. The first parameter P1 is normalized by the ratio of the on-state gate voltage to the on-current. In this example, the threshold current is 0.05 mA / mm. The on-state gate voltage is 8 V. A high first parameter P1 is preferable. A high first parameter P1 results in a high threshold. Figure 3 shows the characteristics when the composition ratio x1 is 0 and when the composition ratio x1 is 0.05.

[0052] As shown in Figure 3, a high first parameter P1 is obtained when the difference Δx in the composition ratio is between 0.05 and 0.1. It is preferable that the difference Δx is between 0.05 and 0.1 when the composition ratio x1 is between 0 and 0.05.

[0053] As shown in Figure 1, the first insulating region 41a includes a first surface F1. The first surface F1 faces the third subregion 13c in the second direction D2. The first surface F1 corresponds, for example, to the bottom surface of a recess. The first distance d1 is defined as the distance along the second direction D2 between the position of the boundary between the third semiconductor region 13 and the first semiconductor region 11 in the second direction D2 and the position of the first surface F1 in the second direction D2. The first distance d1 may be, for example, 10 nm or more and 150 nm or less. The first distance d1 may also be, for example, 50 nm or more. At such a first distance d1, for example, the effect of the potential barrier at the interface between the third semiconductor region 13 and the first semiconductor region 11 is effectively utilized. For example, a high threshold voltage can be stably obtained.

[0054] The third semiconductor portion 12c includes a second surface F2. The second surface F2 faces the first insulating portion 42a. The second distance d2 is defined as the distance along the second direction D2 between the position of the second surface F2 in the second direction D2 and the position of the first surface F1 in the second direction D2. The second distance d2 corresponds, for example, to the depth of a recess. The second distance d2 may be, for example, between 150 nm and 300 nm. For example, it is easier to obtain an appropriate threshold voltage.

[0055] Figure 4 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. As shown in Figure 4, in the semiconductor device 110a according to this embodiment, the configuration of the first electrode portion 53a differs from that of the semiconductor device 110. The configuration of the semiconductor device 110a, excluding this portion, may be the same as that of the semiconductor device 110.

[0056] In the semiconductor device 110a, at least a portion of the first insulating region 41a lies between the fourth subregion 13d and the fifth subregion 13e in the first direction D1. The first electrode portion 53a does not include the portion between the fourth subregion 13d and the fifth subregion 13e in the first direction D1. Even in such a semiconductor device 110a, leakage current is suppressed. A high threshold value is obtained. Characteristics can be improved.

[0057] In the first embodiment, the third semiconductor region 13 does not need to contain substantially no Mg. This makes it easier to obtain high crystallinity and lower on-resistance. When the third semiconductor region 13 contains Al, the concentration of Mg in the third semiconductor region 13 is 1 × 10⁻⁶. 17 cm -3 Less than is fine.

[0058] (Second Embodiment) Figures 1 and 4 also illustrate the configuration of a semiconductor device according to the second embodiment. As shown in FIG. 1, in the semiconductor device 111 according to the embodiment, a first electrode 51, a second electrode 52, a third electrode 53, a semiconductor member 10M, and a first insulating member 41 are provided. The semiconductor member 10M includes a first semiconductor region 11, a second semiconductor region 12, and a third semiconductor region 13. In the semiconductor device 111, the material of the third semiconductor region 13 is different from that in the semiconductor device 110. Except for this, the configuration of the semiconductor device 111 may be the same as that of the semiconductor device 110.

[0059] In the semiconductor device 111, the third semiconductor region 13 is Al x3 Ga 1-x3 N (0 ≦ x3 < 1). The composition ratio x3 may be, for example, 0 or more and 0.1 or less. The third semiconductor region 13 contains Mg. The third semiconductor region 13 may be, for example, p-type GaN.

[0060] In the semiconductor device 111 as well, the first insulating region 41a is between the third partial region 13c and the first electrode portion 53a in the second direction D2. At least a part of the first insulating region 41a is between the fourth partial region 13d and the fifth partial region 13e in the first direction D1. In the semiconductor device 111, leakage current can be suppressed. A high threshold voltage can be obtained. The characteristics can be improved.

[0061] In the semiconductor device 111 as well, the semiconductor member 10M may further include a fourth semiconductor region 14 containing Al x4 Ga 1-x4 N (0 ≦ x4 < 1, x4 < x3). The third semiconductor region 13 is between the fourth semiconductor region 14 and the second semiconductor region 12. The third semiconductor region 13 is between the fourth semiconductor region 14 and the first semiconductor region 11. The fourth concentration of carbon in the fourth semiconductor region 14 is higher than the first concentration of carbon in the first semiconductor region 11. Or, the fourth semiconductor region 14 contains carbon and the first semiconductor region 11 does not contain carbon.

[0062] In the semiconductor device 111, the first insulating member 41 may include a first compound layer 31 and a second compound layer 32. At least a part of the first compound layer 31 is between the second compound layer 32 and the semiconductor member 10M. The first compound layer 31 contains Al z1 Ga 1-z1 N (where x3 < z1 ≤ 1). The second compound layer 32 contains a first element and a second element. The first element contains at least one of Si and Al. The second element contains at least one of oxygen and nitrogen.

[0063] The semiconductor device 111 may include a second insulating member 42. The second insulating member 42 includes a first insulating portion 42a and a second insulating portion 42b. The first insulating member 41 includes a fourth insulating region 41d and a fifth insulating region 41e. The first insulating portion 42a is between the third semiconductor portion 12c and the fourth insulating region 41d in the second direction D2. The second insulating portion 42b is between the fourth semiconductor portion 12d and the fifth insulating region 41e in the second direction D2.

[0064] In the example of FIG. 1, a part of the first electrode portion 53a is between the fourth partial region 13d and the fifth partial region 13e in the first direction D1.

[0065] As shown in FIG. 4, in the semiconductor device 111a according to the embodiment, the configuration of the first electrode portion 53a is different from that in the semiconductor device 111. The configuration of the semiconductor device 111a except this may be the same as that of the semiconductor device 111. In the semiconductor device 111a, the third semiconductor region 13 contains Mg.

[0066] Also in the semiconductor device 111a, at least a part of the first insulating region 41a is between the fourth partial region 13d and the fifth partial region 13e in the first direction D1. The first electrode portion 53a does not include the portion between the fourth partial region 13d and the fifth partial region 13e in the first direction D1. Even in such a semiconductor device 111a, the leakage current is suppressed. A high threshold value can be obtained. The characteristics can be improved.

[0067] (Third Embodiment) FIG. 5 is a schematic cross-sectional view illustrating a semiconductor device according to the third embodiment. As shown in FIG. 5, the semiconductor device 112 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a semiconductor member 10M, and a first insulating member 41.

[0068] The position of the third electrode 53 (the third electrode position) in the first direction D1 from the first electrode 51 to the second electrode 52 is between the position of the first electrode 51 (the first electrode position) in the first direction D1 and the position of the second electrode 52 (the second electrode position) in the first direction D1.

[0069] The semiconductor member 10M is Al x1 Ga 1-x1 a first semiconductor region 11 containing N (0 ≦ x1 < 1), Al x2 Ga 1-x2 a second semiconductor region 12 containing N (0 < x2 < 1, x1 < x2), Al x3 Ga 1-x3 a third semiconductor region 13 containing N (0 < x3 < 1, x1 < x3).

[0070] The third semiconductor region 13 includes a first partial region 13a, a second partial region 13b, a third partial region 13c, a fourth partial region 13d, and a fifth partial region 13e. The direction from the first partial region 13a to the first electrode 51 is along a second direction D2 that intersects the first direction D1. The direction from the second partial region 13b to the second electrode 52 is along the second direction D2. The direction from the third partial region 13c to the third electrode 53 is along the second direction D2. The position of the fourth partial region 13d in the first direction D1 is between the position of the first partial region 13a in the first direction D1 and the position of the third partial region 13c in the first direction D1. The position of the fifth partial region 13e in the first direction D1 is between the position of the third partial region 13c in the first direction D1 and the position of the second partial region 13b in the first direction D1.

[0071] In the second direction D2, the first semiconductor region 11 is between the fourth partial region 13d and the second semiconductor region 12.

[0072] The first insulating member 41 includes a first insulating region 41a and a second insulating region 41b. The first insulating region 41a is located between the third partial region 13c and the third electrode 53 in the second direction D2. The first insulating region 41a is located between the fourth partial region 13d and the second electrode 52 in the first direction D1.

[0073] At least a part of the second insulating region 41b is located between the first semiconductor region 11 and the third electrode 53, and between the second semiconductor region 12 and the third electrode 53 in the first direction D1. The first electrode 51 is connected to the first semiconductor region 11. The second electrode 52 is connected to the second partial region 13b.

[0074] Also in the semiconductor device 112, the current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The fourth partial region 13d of the third semiconductor region 13 faces the first insulating region 41a in the first direction D1. The leakage current can also be suppressed in the semiconductor device 112. A high threshold voltage can be obtained. The characteristics can be improved.

[0075] In the example of FIG. 5, a part of the third electrode 53 is located between the fourth partial region 13d and the second electrode 52 in the first direction D1. A more stable and high threshold voltage can be obtained. The leakage current can be further reduced.

[0076] In the semiconductor device 112, the absolute value of the difference between the composition ratio x3 and the composition ratio x1 may be, for example, 0.05 or more and 0.1 or less. The ratio of the composition ratio x3 to the composition ratio x2 may be, for example, 0.1 or more and 0.5 or less.

[0077] Also in the semiconductor device 112, the first insulating member 41 may include a first compound layer 31 and a second compound layer 32. At least a part of the first compound layer 31 is located between the second compound layer 32 and the semiconductor member 10M. The first compound layer 31 includes, for example, Al z1 Ga 1-z1 N (x3 < z1 ≤ 1). The second compound layer 32 includes a first element and a second element. The first element includes at least one of Si and Al. The second element includes at least one of oxygen and nitrogen.

[0078] (Fourth Embodiment) Figure 6 is a schematic cross-sectional view illustrating a semiconductor device according to the fourth embodiment. As shown in Figure 6, the semiconductor device 113 according to this embodiment is also provided with a first electrode 51, a second electrode 52, a third electrode 53, a semiconductor member 10M, and a first insulating member 41. The semiconductor member 10M includes a first semiconductor region 11, a second semiconductor region 12, and a third semiconductor region 13. In the semiconductor device 113, the material of the third semiconductor region 13 is different from that of the semiconductor device 112. The configuration of the semiconductor device 113, apart from this, may be the same as that of the semiconductor device 112.

[0079] In semiconductor device 113, the third semiconductor region 13 is Al x3 Ga 1-x3 It includes N(0≦x3<1). The composition ratio x3 can be, for example, 0 or more and 0.1 or less. The third semiconductor region 13 contains Mg. The third semiconductor region 13 can be, for example, p-type GaN. In the semiconductor device 113, leakage current can be suppressed. A high threshold voltage can be obtained. Characteristics can be improved.

[0080] In the embodiment, information regarding the shape of semiconductor regions and electrodes, etc., can be obtained, for example, by electron microscope images. Information regarding composition and elemental concentration can be obtained, for example, by EDX (Energy Dispersive X-ray Spectroscopy) or SIMS (Secondary Ion Mass Spectrometry). Information regarding composition may also be obtained, for example, by reciprocal lattice space mapping.

[0081] The embodiments may include the following technical proposals. (Technical proposal 1) First electrode and, The second electrode and, A third electrode including a first electrode portion, wherein a third electrode position of the first electrode portion in a first direction from the first electrode to the second electrode is between a first electrode position of the first electrode in the first direction and a second electrode position of the second electrode in the first direction, the third electrode, a semiconductor member, a first insulating member, and comprising, the semiconductor member is, Al x1 Ga 1-x1 a first semiconductor region containing N (0 ≦ x1 < 1), Al x2 Ga 1-x2 a second semiconductor region containing N (0 < x2 < 1, x1 < x2), Al x3 Ga 1-x3 a third semiconductor region containing N (0 < x3 < 1, x1 < x3), and including, the third semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region and a fifth partial region, a direction from the first partial region to the first electrode is along a second direction intersecting the first direction, a direction from the second partial region to the second electrode is along the second direction, a direction from the third partial region to the first electrode portion is along the second direction, a position of the fourth partial region in the first direction is between a position of the first partial region in the first direction and a position of the third partial region in the first direction, a position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and a position of the second partial region in the first direction, the first semiconductor region includes a first semiconductor portion and a second semiconductor portion, the second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion, the first semiconductor portion is between the fourth partial region and the third semiconductor portion in the second direction, The second semiconductor portion is located between the fifth subregion and the fourth semiconductor portion in the second direction. The first electrode portion is located between the first semiconductor portion and the second semiconductor portion, and between the third semiconductor portion and the fourth semiconductor portion. The first insulating member includes a first insulating region, a second insulating region, and a third insulating region. At least a portion of the second insulating region is located between the first semiconductor portion and the first electrode portion. At least a portion of the third insulating region is located between the first electrode portion and the second semiconductor portion. The first insulating region is located between the third partial region and the first electrode portion in the second direction. A semiconductor device wherein at least a portion of the first insulating region is located between the fourth and fifth subregions in the first direction.

[0082] (Technical proposal 2) A semiconductor device according to Technical Proposal 1, wherein a portion of the first electrode portion is located between the fourth and fifth subregions in the first direction.

[0083] (Technical proposal 3) The first semiconductor region is in contact with the third semiconductor region, The second semiconductor region is in contact with the first semiconductor region, and is a semiconductor device according to Technical Proposal 1 or 2.

[0084] (Technical proposal 4) The semiconductor device according to any one of Technical Proposals 1 to 3, wherein x3 is lower than x2.

[0085] (Technical proposal 5) The semiconductor device according to any one of Technical Proposals 1 to 3, wherein the ratio of x3 to x2 is 0.1 or more and 0.5 or less.

[0086] (Technical proposal 6) The semiconductor device described in any one of Technical Proposals 1 to 5, wherein the absolute value of the difference between x3 and x1 is 0.05 or more and 0.1 or less.

[0087] (Technical Solution 7) The semiconductor device according to any one of Technical Solutions 1 to 6, wherein a third thickness along the second direction of the third semiconductor region is greater than a second thickness along the second direction of the second semiconductor region.

[0088] (Technical Solution 8) The first electrode is electrically connected to the first semiconductor portion. The semiconductor device according to any one of Technical Solutions 1 to 7, wherein the second electrode is electrically connected to the second semiconductor portion.

[0089] (Technical Solution 9) The semiconductor member is Al x4 Ga 1-x4 N (0 ≤ x4 < 1, x4 < x3), and further includes a fourth semiconductor region, The third semiconductor region is between the fourth semiconductor region and the second semiconductor region. The third semiconductor region is between the fourth semiconductor region and the first semiconductor region. The fourth concentration of carbon in the fourth semiconductor region is higher than the first concentration of carbon in the first semiconductor region, or The fourth semiconductor region contains carbon and the first semiconductor region does not contain carbon. The semiconductor device according to any one of Technical Solutions 1 to 8.

[0090] (Technical Solution 10) The first insulating member includes a first compound layer and a second compound layer. At least a part of the first compound layer is between the second compound layer and the semiconductor member. The first compound layer contains Al z1 Ga 1-z1 N (x3 < z1 ≤ 1), The second compound layer contains a first element and a second element. The first element includes at least one of Si and Al, and the second element includes at least one of oxygen and nitrogen. The semiconductor device according to any one of Technical Solutions 1 to 9.

[0091] (Technical Solution 11) Further comprising a second insulating member including a first insulating portion and a second insulating portion, The first insulating member further includes a fourth insulating region and a fifth insulating region, The first insulating portion is between the third semiconductor portion and the fourth insulating region in the second direction, The second insulating portion is between the fourth semiconductor portion and the fifth insulating region in the second direction. The semiconductor device according to any one of Technical Solutions 1 to 10.

[0092] (Technical Solution 12) A first electrode, A second electrode, A third electrode including a first electrode portion, wherein the third electrode position of the first electrode portion in the first direction from the first electrode to the second electrode is between the first electrode position of the first electrode in the first direction and the second electrode position of the second electrode in the first direction. The third electrode, A semiconductor member, A first insulating member, Comprising, The semiconductor member is, Al x1 Ga 1-x1 A first semiconductor region containing N (0≦x1<1), Al x2 Ga 1-x2 A second semiconductor region containing N (0<x2<1, x1<x2), Al x3 Ga 1-x3 A third semiconductor region containing N (0≦x3<1), Including, The third semiconductor region contains Mg, The third semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region and a fifth partial region, The direction from the first partial region to the first electrode is along a second direction intersecting the first direction, The direction from the second partial region to the second electrode is along the second direction, The direction from the third partial region to the first electrode portion is along the second direction, The position of the fourth partial region in the first direction is between the position of the first partial region in the first direction and the position of the third partial region in the first direction. The position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and the position of the second partial region in the first direction. The first semiconductor region includes a first semiconductor portion and a second semiconductor portion. The second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion. The first semiconductor portion is between the fourth partial region and the third semiconductor portion in the second direction. The second semiconductor portion is between the fifth partial region and the fourth semiconductor portion in the second direction. The first electrode portion is between the first semiconductor portion and the second semiconductor portion, and between the third semiconductor portion and the fourth semiconductor portion. The first insulating member includes a first insulating region, a second insulating region, and a third insulating region. At least a part of the second insulating region is between the first semiconductor portion and the first electrode portion. At least a part of the third insulating region is between the first electrode portion and the second semiconductor portion. The first insulating region is between the third partial region and the first electrode portion in the second direction. At least a part of the first insulating region is between the fourth partial region and the fifth partial region in the first direction, a semiconductor device.

[0093] (Technical Proposal 13) A part of the first electrode portion is between the fourth partial region and the fifth partial region in the first direction, the semiconductor device according to Technical Proposal 12.

[0094] (Technical Proposal 14) The semiconductor member is Al x4 Ga 1-x4 It further includes a fourth semiconductor region containing N (0 ≦ x4 < 1, x4 < x3). The third semiconductor region is between the fourth semiconductor region and the second semiconductor region, The third semiconductor region is between the fourth semiconductor region and the first semiconductor region, The fourth carbon concentration in the fourth semiconductor region is higher than the first carbon concentration in the first semiconductor region, or The fourth semiconductor region contains carbon and the first semiconductor region does not contain carbon. The semiconductor device according to Technical Proposal 12 or 13.

[0095] (Technical Proposal 15) The first insulating member includes a first compound layer and a second compound layer, At least a part of the first compound layer is between the second compound layer and the semiconductor member, The first compound layer is Al z1 Ga 1-z1 N (x3 < z1 ≦ 1), The second compound layer contains a first element and a second element. The first element includes at least one of Si and Al, and the second element includes at least one of oxygen and nitrogen. The semiconductor device according to any one of Technical Proposals 12 to 14.

[0096] (Technical Proposal 16) Further includes a second insulating member including a first insulating portion and a second insulating portion, The first insulating member further includes a fourth insulating region and a fifth insulating region, The first insulating portion is between the third semiconductor portion and the fourth insulating region in the second direction, The second insulating portion is between the fourth semiconductor portion and the fifth insulating region in the second direction. The semiconductor device according to any one of Technical Proposals 12 to 15.

[0097] (Technical Proposal 17) A first electrode, A second electrode, A third electrode, wherein a third electrode position of the third electrode in a first direction from the first electrode to the second electrode is between a first electrode position of the first electrode in the first direction and a second electrode position of the second electrode in the first direction, the third electrode, A semiconductor member, A first insulating member, Comprising, The semiconductor member is, Al x1 Ga 1-x1 A first semiconductor region containing N(0≦x1<1), Al x2 Ga 1-x2 A second semiconductor region containing N(0<x2<1, x1<x2), Al x3 Ga 1-x3 A third semiconductor region containing N(0<x3<1, x1<x3), Including, The third semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, The direction from the first partial region to the first electrode is along a second direction intersecting the first direction, The direction from the second partial region to the second electrode is along the second direction, The direction from the third partial region to the third electrode is along the second direction, A position of the fourth partial region in the first direction is between a position of the first partial region in the first direction and a position of the third partial region in the first direction, A position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and a position of the second partial region in the first direction, In the second direction, the first semiconductor region is between the fourth partial region and the second semiconductor region, The first insulating member includes a first insulating region and a second insulating region, The first insulating region is between the third partial region and the third electrode in the second direction, The first insulating region is between the fourth partial region and the second electrode in the first direction. At least a part of the second insulating region is between the first semiconductor region and the third electrode, and between the second semiconductor region and the third electrode in the first direction. The first electrode is connected to the first semiconductor region. The second electrode is connected to the second partial region, a semiconductor device.

[0098] (Technical proposal 18) A part of the third electrode is between the fourth partial region and the second electrode in the first direction, the semiconductor device according to Technical proposal 17.

[0099] (Technical proposal 19) The absolute value of the difference between x3 and x1 is 0.05 or more and 0.1 or less, the semiconductor device according to Technical proposal 17 or 18.

[0100] (Technical proposal 20) A first electrode, A second electrode, A third electrode, the third electrode position of the third electrode in the first direction from the first electrode to the second electrode is between the first electrode position of the first electrode in the first direction and the second electrode position of the second electrode in the first direction, the third electrode, A semiconductor member, A first insulating member, Comprising, The semiconductor member is, Al x1 Ga 1-x1 A first semiconductor region containing N(0≦x1<1), Al x2 Ga 1-x2 A second semiconductor region containing N(0<x2<1, x1<x2), Al x3 Ga 1-x3 A third semiconductor region containing N(0≦x3<1), Including, The third semiconductor region contains Mg, The third semiconductor region includes a first subregion, a second subregion, a third subregion, a fourth subregion, and a fifth subregion. The direction from the first subregion to the first electrode is along a second direction intersecting the first direction, The direction from the second subregion to the second electrode is along the second direction, The direction from the third subregion to the third electrode is along the second direction, The position of the fourth sub-region in the first direction is between the position of the first sub-region in the first direction and the position of the third sub-region in the first direction. The position of the fifth subregion in the first direction is between the position of the third subregion in the first direction and the position of the second subregion in the first direction. In the second direction, the first semiconductor region is located between the fourth subregion and the second semiconductor region. The first insulating member includes a first insulating region and a second insulating region. The first insulating region is located between the third subregion and the third electrode in the second direction. The first insulating region is located between the fourth subregion and the second electrode in the first direction. At least a portion of the second insulating region is located between the first semiconductor region and the third electrode, and between the second semiconductor region and the third electrode, in the first direction. The first electrode is connected to the first semiconductor region, The second electrode is connected to the second subregion, and is a semiconductor device.

[0101] According to the embodiment, a semiconductor device capable of improving characteristics is provided.

[0102] Embodiments of the present invention have been described above with reference to examples. However, the present invention is not limited to these examples. For example, the specific configuration of each element such as electrodes, semiconductor members, and insulating members included in a semiconductor device is included within the scope of the present invention as long as those skilled in the art can appropriately select from the known range to implement the present invention in the same way and obtain similar effects.

[0103] Combinations of two or more elements from each example, to the extent technically feasible, are also included within the scope of the present invention, insofar as they encompass the gist of the invention.

[0104] All semiconductor devices that a person skilled in the art can implement by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also fall within the scope of the present invention, insofar as they encompass the gist of the present invention.

[0105] Within the scope of the concept of this invention, a person skilled in the art would be able to conceive of various modifications and alterations, and it is understood that such modifications and alterations also fall within the scope of this invention.

[0106] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0107] 10M: Semiconductor material, 10c: Carrier region, 11-14: 1st-4th semiconductor regions, 11a, 11b: 1st and 2nd semiconductor portions, 12c, 12d: 3rd and 4th semiconductor portions, 13a-13e: 1st-5th partial regions, 18b: Nitride layer, 18s: Substrate, 31, 32: 1st and 2nd compound layers, 31a-31c: 1st-3rd compound regions, 32a-32c: 1st-3rd compound portions, 41, 42: 1st and 2nd insulating materials, 41a-41e: 1st-5th insulating regions, 42a, 42b: 1st and 2nd insulating portions, 51-53: 1st-3rd electrodes, 53a: 1st electrode portion, 110, 110a, 111, 111a, 112, 113: Semiconductor device, D1~D3: 1st~3rd direction, d1, d2: 1st~2nd distance, t1~t3: 1st~3rd thickness

Claims

1. First electrode and, The second electrode and A third electrode including a first electrode portion, wherein the third electrode position of the first electrode portion in a first direction from the first electrode to the second electrode is between the first electrode position of the first electrode in the first direction and the second electrode position of the second electrode in the first direction, Semiconductor components and First insulating member and Equipped with, The aforementioned semiconductor member is Al ｘ１ Ga １－ｘ１ A first semiconductor region including N (0 ≤ x1 < 1), Al ｘ２ Ga １－ｘ２ A second semiconductor region including N (0 < x² < 1, x¹ < x²), Al ｘ３ Ga １－ｘ３ A third semiconductor region including N (0 < x3 < 1, x1 < x3), Includes, The aforementioned third semiconductor region includes a first subregion, a second subregion, a third subregion, a fourth subregion, and a fifth subregion. The direction from the first subregion to the first electrode is along a second direction intersecting the first direction, The direction from the second subregion to the second electrode is along the second direction, The direction from the third subregion to the first electrode portion is along the second direction, The position of the fourth subregion in the first direction is between the position of the first subregion in the first direction and the position of the third subregion in the first direction. The position of the fifth subregion in the first direction is between the position of the third subregion in the first direction and the position of the second subregion in the first direction. The first semiconductor region includes a first semiconductor portion and a second semiconductor portion. The second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion, The first semiconductor portion is located between the fourth subregion and the third semiconductor portion in the second direction. The second semiconductor portion is located between the fifth subregion and the fourth semiconductor portion in the second direction. The first electrode portion is located between the first semiconductor portion and the second semiconductor portion, and between the third semiconductor portion and the fourth semiconductor portion. The first insulating member includes a first insulating region, a second insulating region, and a third insulating region. At least a portion of the second insulating region is located between the first semiconductor portion and the first electrode portion. At least a portion of the third insulating region is located between the first electrode portion and the second semiconductor portion. The first insulating region is located between the third partial region and the first electrode portion in the second direction. A semiconductor device in which at least a portion of the first insulating region lies between the fourth and fifth subregions in the first direction.

2. The semiconductor device according to claim 1, wherein a portion of the first electrode portion is located between the fourth and fifth subregions in the first direction.

3. The first semiconductor region is in contact with the third semiconductor region. The semiconductor device according to claim 1, wherein the second semiconductor region is in contact with the first semiconductor region.

4. The semiconductor device according to any one of claims 1 to 3, wherein x3 is lower than x2.

5. The semiconductor device according to any one of claims 1 to 3, wherein the ratio of x3 to x2 is 0.1 or more and 0.5 or less.

6. The semiconductor device according to any one of claims 1 to 3, wherein the absolute value of the difference between x3 and x1 is 0.05 or more and 0.1 or less.

7. The semiconductor device according to any one of claims 1 to 3, wherein the third thickness of the third semiconductor region along the second direction is greater than the second thickness of the second semiconductor region along the second direction.

8. The first electrode is electrically connected to the first semiconductor portion. The semiconductor device according to any one of claims 1 to 3, wherein the second electrode is electrically connected to the second semiconductor portion.

9. The aforementioned semiconductor material is Al ｘ４ Ga １－ｘ４ It further includes a fourth semiconductor region containing N (0 ≤ x₄ < 1, x₄ < x₃), The third semiconductor region is located between the fourth semiconductor region and the second semiconductor region. The third semiconductor region is located between the fourth semiconductor region and the first semiconductor region. The fourth concentration of carbon in the fourth semiconductor region is higher than the first concentration of carbon in the first semiconductor region, or The semiconductor device according to any one of claims 1 to 3, wherein the fourth semiconductor region contains carbon and the first semiconductor region does not contain carbon.

10. The first insulating member includes a first compound layer and a second compound layer, At least a portion of the first compound layer is located between the second compound layer and the semiconductor member. The first compound layer contains Al ｚ１ Ga １－ｚ１ N (x3 < z1 ≤ 1). The semiconductor device according to any one of claims 1 to 3, wherein the second compound layer comprises a first element and a second element, the first element comprises at least one of Si and Al, and the second element comprises at least one of oxygen and nitrogen.

11. The second insulating member further includes a first insulating portion and a second insulating portion, The first insulating member further includes a fourth insulating region and a fifth insulating region, The first insulating portion is located between the third semiconductor portion and the fourth insulating region in the second direction. The semiconductor device according to any one of claims 1 to 3, wherein the second insulating portion is located between the fourth semiconductor portion and the fifth insulating region in the second direction.

12. First electrode and, The second electrode and A third electrode including a first electrode portion, wherein the third electrode position of the first electrode portion in a first direction from the first electrode to the second electrode is between the first electrode position of the first electrode in the first direction and the second electrode position of the second electrode in the first direction, Semiconductor components and First insulating member and Equipped with, The aforementioned semiconductor member is Al ｘ１ Ga １－ｘ１ A first semiconductor region including N (0 ≤ x1 < 1), Al ｘ２ Ga １－ｘ２ A second semiconductor region including N (0 < x² < 1, x¹ < x²), Al ｘ３ Ga １－ｘ３ A third semiconductor region including N (0 ≤ x³ < 1), Includes, The aforementioned third semiconductor region contains Mg, The aforementioned third semiconductor region includes a first subregion, a second subregion, a third subregion, a fourth subregion, and a fifth subregion. The direction from the first subregion to the first electrode is along a second direction intersecting the first direction, The direction from the second subregion to the second electrode is along the second direction, The direction from the third subregion to the first electrode portion is along the second direction, The position of the fourth subregion in the first direction is between the position of the first subregion in the first direction and the position of the third subregion in the first direction. The position of the fifth subregion in the first direction is between the position of the third subregion in the first direction and the position of the second subregion in the first direction. The first semiconductor region includes a first semiconductor portion and a second semiconductor portion. The second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion, The first semiconductor portion is located between the fourth subregion and the third semiconductor portion in the second direction. The second semiconductor portion is located between the fifth subregion and the fourth semiconductor portion in the second direction. The first electrode portion is located between the first semiconductor portion and the second semiconductor portion, and between the third semiconductor portion and the fourth semiconductor portion. The first insulating member includes a first insulating region, a second insulating region, and a third insulating region. At least a portion of the second insulating region is located between the first semiconductor portion and the first electrode portion. At least a portion of the third insulating region is located between the first electrode portion and the second semiconductor portion. The first insulating region is located between the third partial region and the first electrode portion in the second direction. A semiconductor device in which at least a portion of the first insulating region lies between the fourth and fifth subregions in the first direction.

13. The semiconductor device according to claim 12, wherein a portion of the first electrode portion is located between the fourth and fifth subregions in the first direction.

14. The aforementioned semiconductor material is Al ｘ４ Ga １－ｘ４ It further includes a fourth semiconductor region containing N (0 ≤ x₄ < 1, x₄ < x₃), The third semiconductor region is located between the fourth semiconductor region and the second semiconductor region. The third semiconductor region is located between the fourth semiconductor region and the first semiconductor region. The fourth concentration of carbon in the fourth semiconductor region is higher than the first concentration of carbon in the first semiconductor region, or The semiconductor device according to claim 12, wherein the fourth semiconductor region contains carbon and the first semiconductor region does not contain carbon.

15. The first insulating member includes a first compound layer and a second compound layer, At least a portion of the first compound layer is located between the second compound layer and the semiconductor member. The first compound layer is Al ｚ１ Ga １－ｚ１ N (including x3 < z1 ≤ 1), The semiconductor device according to claim 12, wherein the second compound layer comprises a first element and a second element, the first element comprises at least one of Si and Al, and the second element comprises at least one of oxygen and nitrogen.

16. The second insulating member further includes a first insulating portion and a second insulating portion, The first insulating member further includes a fourth insulating region and a fifth insulating region, The first insulating portion is located between the third semiconductor portion and the fourth insulating region in the second direction. The semiconductor device according to claim 12, wherein the second insulating portion is located between the fourth semiconductor portion and the fifth insulating region in the second direction.

17. First electrode and, The second electrode and A third electrode, wherein the position of the third electrode in the first direction from the first electrode to the second electrode is between the first electrode position of the first electrode in the first direction and the second electrode position of the second electrode in the first direction. Semiconductor components and First insulating member and Equipped with, The aforementioned semiconductor member is Al ｘ１ Ga １－ｘ１ A first semiconductor region including N (0 ≤ x1 < 1), Al ｘ２ Ga １－ｘ２ A second semiconductor region including N (0 < x² < 1, x¹ < x²), Al ｘ３ Ga １－ｘ３ A third semiconductor region including N (0 < x3 < 1, x1 < x3), Includes, The aforementioned third semiconductor region includes a first subregion, a second subregion, a third subregion, a fourth subregion, and a fifth subregion. The direction from the first subregion to the first electrode is along a second direction intersecting the first direction, The direction from the second subregion to the second electrode is along the second direction, The direction from the third subregion to the third electrode is along the second direction, The position of the fourth subregion in the first direction is between the position of the first subregion in the first direction and the position of the third subregion in the first direction. The position of the fifth subregion in the first direction is between the position of the third subregion in the first direction and the position of the second subregion in the first direction. In the second direction, the first semiconductor region is located between the fourth subregion and the second semiconductor region. The first insulating member includes a first insulating region and a second insulating region, The first insulating region is located between the third partial region and the third electrode in the second direction. The first insulating region is located between the fourth subregion and the second electrode in the first direction. At least a portion of the second insulating region is located between the first semiconductor region and the third electrode, and between the second semiconductor region and the third electrode, in the first direction. The first electrode is connected to the first semiconductor region, The second electrode is connected to the second subregion, and is a semiconductor device.

18. The semiconductor device according to claim 17, wherein a portion of the third electrode is located between the fourth subregion and the second electrode in the first direction.

19. The semiconductor device according to claim 17 or 18, wherein the absolute value of the difference between x3 and x1 is 0.05 or more and 0.1 or less.

20. First electrode and, The second electrode and A third electrode, wherein the position of the third electrode in the first direction from the first electrode to the second electrode is between the first electrode position of the first electrode in the first direction and the second electrode position of the second electrode in the first direction. Semiconductor components and First insulating member and Equipped with, The aforementioned semiconductor member is Al ｘ１ Ga １－ｘ１ A first semiconductor region including N (0 ≤ x1 < 1), Al ｘ２ Ga １－ｘ２ A second semiconductor region including N (0 < x² < 1, x¹ < x²), Al ｘ３ Ga １－ｘ３ A third semiconductor region including N (0 ≤ x³ < 1), Includes, The aforementioned third semiconductor region contains Mg, The aforementioned third semiconductor region includes a first subregion, a second subregion, a third subregion, a fourth subregion, and a fifth subregion. The direction from the first subregion to the first electrode is along a second direction intersecting the first direction, The direction from the second subregion to the second electrode is along the second direction, The direction from the third subregion to the third electrode is along the second direction, The position of the fourth subregion in the first direction is between the position of the first subregion in the first direction and the position of the third subregion in the first direction. The position of the fifth subregion in the first direction is between the position of the third subregion in the first direction and the position of the second subregion in the first direction. In the second direction, the first semiconductor region is located between the fourth subregion and the second semiconductor region. The first insulating member includes a first insulating region and a second insulating region, The first insulating region is located between the third partial region and the third electrode in the second direction. The first insulating region is located between the fourth subregion and the second electrode in the first direction. At least a portion of the second insulating region is located between the first semiconductor region and the third electrode, and between the second semiconductor region and the third electrode, in the first direction. The first electrode is connected to the first semiconductor region, The second electrode is connected to the second subregion, and is a semiconductor device.

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