Multilayer ceramic capacitor and method for manufacturing the same

Abstract

One embodiment provides a multilayer ceramic capacitor with excellent high-temperature reliability and durability. [Solution] A multilayer ceramic capacitor and a method for manufacturing the same is provided, comprising a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers laminated with the dielectric layers in between; and an external electrode disposed on the outside of the capacitor body, wherein the internal electrode layer includes a metal layer and an insulating layer disposed at the interface with the dielectric layer on the surface of the metal layer, the insulating layer includes an oxide containing tantalum (Ta), and the oxide is represented by the following chemical formula 1. A x B y O z (In the above chemical formula 1, A, B, x, y, and z are as defined in the specification.)

Description

[Technical Field]

[0001] This disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same. [Background technology]

[0002] Electronic components that use ceramic materials include capacitors, inductors, piezoelectric elements, varistors, and thermistors. Among these ceramic electronic components, multilayer ceramic capacitors (MLCCs) can be used in a wide variety of electronic devices due to their advantages of being small, having guaranteed high capacitance, and being easy to mount.

[0003] For example, multilayer ceramic capacitors can be used as chip-type capacitors mounted on substrates of various electronic products such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), computers, personal portable devices, and smartphones, playing a role in charging or discharging electricity.

[0004] Recently, there has been a demand for even smaller and higher-capacity multilayer ceramic capacitors to improve the performance of electronic products. This has led to various attempts to thin and multilayer the dielectric and internal electrodes, resulting in the manufacture of multilayer ceramic capacitors with thinner dielectrics and increased layer counts. However, this thinning of the dielectric increases the electric field strength per unit area, leading to a degradation in the high-temperature reliability of the multilayer ceramic capacitor and a decrease in durability. [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] One embodiment provides a multilayer ceramic capacitor with excellent high-temperature reliability and durability.

[0006] Another embodiment provides a method for manufacturing the multilayer ceramic capacitor. [Means for solving the problem]

[0007] One embodiment provides a multilayer ceramic capacitor comprising a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers stacked with the dielectric layers in between; and an external electrode disposed on the outside of the capacitor body, wherein the internal electrode layers include a metal layer and an insulating layer disposed at the interface with the dielectric layer on the surface of the metal layer, the insulating layer includes an oxide containing tantalum (Ta), and the oxide is represented by the following chemical formula 1.

[0008] [Chemical formula 1] A x B y O z (In the above chemical formula 1, A contains Ni, B contains Ta, 0 ≤ x ≤ 0.2, 0.2 ≤ y ≤ 0.5, and x + y + z = 1.)

[0009] The oxide may contain one or more selected from Ta2O5, TaO2, and NiTa2O6.

[0010] The metal layer may also contain nickel (Ni) and tantalum (Ta).

[0011] The tantalum (Ta) content may be even higher in the insulating layer than in the metal layer.

[0012] When the tantalum (Ta) content in the insulating layer is X and the tantalum (Ta) content in the metal layer is Y, the following equation 1 can be satisfied.

[0013] [Formula 1] 0 < (|XY|) / X ≤ 1 The metal layer may contain tantalum (Ta) in an amount greater than 0 and less than or equal to 15 atomic parts per 100 atomic parts of nickel (Ni).

[0014] The insulating layer may contain tantalum (Ta) in an amount of 30 atomic% to 100 atomic% relative to the total amount of the insulating layer.

[0015] The average thickness of the insulating layer may be 0.5 nm to 6.0 nm.

[0016] The insulating layer may be arranged at the interface with the dielectric layer in the stacking direction of the internal electrode layer.

[0017] The insulating layer may be arranged at the interface with the dielectric layer in the direction perpendicular to the stacking direction of the internal electrode layer.

[0018] The insulating layer may be arranged at the interface between the dielectric layer and the internal electrode layer in the stacking direction and perpendicular to the stacking direction.

[0019] The insulating layer may be further arranged at the interface with the external electrode in the direction perpendicular to the stacking direction of the internal electrode layer.

[0020] When performing TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis on a linear section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, the atomic percentage of tantalum (Ta) can be maximized in the insulating layer.

[0021] Another embodiment includes the steps of mixing nickel (Ni) and tantalum (Ta)-based raw materials to produce a conductive paste; manufacturing a dielectric green sheet using a dielectric slurry and printing the conductive paste on the surface of the dielectric green sheet to form a conductive paste layer; laminating the dielectric green sheets with the conductive paste layer formed thereon to produce a laminate of dielectric green sheets; firing the laminate of dielectric green sheets to produce a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers laminated with the dielectric layers interposed therebetween; and forming an external electrode on the outside of the capacitor body. The internal electrode layer includes a metal layer and an insulating layer disposed at the interface with the dielectric layer on the surface of the metal layer. The insulating layer contains tantalum (Ta) and an oxide represented by Chemical Formula 1 above, and provides a method for manufacturing a multilayer ceramic capacitor.

[0022] The tantalum (Ta)-based raw material may include one or more selected from tantalum (Ta) and tantalum (Ta) oxides, and the tantalum (Ta) oxide may include one or more selected from Ta2O5 and TaO2.

[0023] The tantalum (Ta)-based raw material may be mixed at 0.6 to 12.0 parts by weight with respect to 100 parts by weight of the nickel (Ni).

Advantages of the Invention

[0024] The multilayer ceramic capacitor according to one embodiment can have excellent high-temperature reliability and durability by preventing the occurrence of defects at the interface between the dielectric layer and the internal electrode layer.

Brief Description of the Drawings

[0025] [Figure 1] FIG. 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment. [Figure 2] FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor cut along line I-I' of FIG. 1. [Figure 3] Figure 3 is a cross-sectional view of a multilayer ceramic capacitor cut along the line II-II' in Figure 1. [Figure 4] Figure 4 is a separated perspective view showing the stacked structure of the internal electrode layers in the capacitor body of Figure 1. [Figure 5] Figure 5 is a TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis image of the active region according to Example 1. [Figure 6a] Figure 6a shows an image and graph of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line profile for the active region in Example 1. [Figure 6b] Figure 6b shows an image and graph of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line profile for the active region in Example 1. [Figure 7] Figure 7 shows the X-ray diffraction (XRD) graph for the internal electrode layer according to Example 1. [Modes for carrying out the invention]

[0026] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings so that they can be easily implemented by a person with ordinary skill in the art to which the present invention pertains. In the drawings, parts that are not necessary for the clear explanation of the present invention have been omitted, and the same or similar components are denoted by the same reference numerals throughout the specification. In addition, some components in the attached drawings are exaggerated, omitted, or shown schematically, and the size of each component does not fully reflect its actual size.

[0027] The accompanying drawings are provided solely to facilitate understanding of the embodiments disclosed herein, and should not be understood as limiting the technical ideas disclosed herein, and should be understood to include any modifications, equivalents, or substitutions that fall within the concept and scope of the invention.

[0028] Terms including ordinal numbers, such as "first," "second," etc., are used to describe various components, but these components are not limited by such terms. These terms are used solely for the purpose of distinguishing one component from others.

[0029] Furthermore, when we say that a layer, membrane, region, plate, or other part is "on top of" another part, this includes not only when it is "directly above" the other part, but also when the other part is in between. Conversely, when we say that one part is "directly above" another part, it means that there is no other part in between. Also, being "on top of" a reference part means being located above or below the reference part, and does not necessarily mean being located "above" in the opposite direction of gravity.

[0030] Throughout the specification, terms such as “includes” or “has” should be understood as indicating the presence of features, figures, steps, actions, components, parts, or combinations thereof described in the specification, without prejudice to the existence or possibility of adding one or more other features, figures, steps, actions, components, parts, or combinations thereof. Therefore, when a part “includes” a component, this does not exclude other components unless otherwise stated, and may further include other components.

[0031] Furthermore, throughout the specification, "on a plane" refers to the view of the part in question from above, and "on a cross-section" refers to the view of the cross-section of the part in question, obtained by cutting it perpendicularly, from the side.

[0032] Furthermore, throughout the specification, the term "connected" does not only mean that two or more components are directly connected, but may also mean that two or more components are indirectly connected through other components, that they are not only physically connected but also electrically connected, or that they are a single unit, even though they are referred to by different names depending on their location or function.

[0033] Hereinafter, a multilayer ceramic capacitor according to one embodiment will be described with reference to Figures 1 to 4.

[0034] Figure 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment; Figure 2 is a cross-sectional view of the multilayer ceramic capacitor cut along the line I-I' in Figure 1; Figure 3 is a cross-sectional view of the multilayer ceramic capacitor cut along the line II-II' in Figure 1; and Figure 4 is a separated perspective view showing the laminated structure of the internal electrode layers in the capacitor body of Figure 1.

[0035] The L-axis, W-axis, and T-axis shown in Figures 1 to 4 represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be perpendicular to the broad surface (main surface) of the sheet-shaped component, and for example, it can be used as the same concept as the stacking direction in which the dielectric layers 111 are stacked. The length direction (L-axis direction) may be approximately perpendicular to the thickness direction (T-axis direction) in the direction extending alongside the broad surface (main surface) of the sheet-shaped component, and for example, it may be the direction in which the first external electrode 131 and the second external electrode 132 are located on both sides. The width direction (W-axis direction) may be approximately perpendicular to the thickness direction (T-axis direction) and the length direction (L-axis direction) in the direction extending alongside the broad surface (main surface) of the sheet-shaped component, and the length in the length direction (L-axis direction) of the sheet-shaped component may be even longer than the length in the width direction (W-axis direction).

[0036] Referring to Figures 1 to 4, a multilayer ceramic capacitor 100 according to one embodiment includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outside of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed at opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0037] The capacitor body 110 may, for example, be approximately hexahedral in shape.

[0038] For the convenience of explaining one embodiment, the two surfaces of the capacitor body 110 that face each other in the thickness direction (T-axis direction) are defined as the first and second surfaces, the two surfaces connected to the first and second surfaces and facing each other in the length direction (L-axis direction) are defined as the third and fourth surfaces, and the two surfaces connected to the first and second surfaces and connected to the third and fourth surfaces and facing each other in the width direction (W-axis direction) are defined as the fifth and sixth surfaces.

[0039] For example, the first surface, which is the bottom surface, may be the surface facing the mounting direction. Also, the first to sixth surfaces may be flat, but this is not the only embodiment. For example, the first to sixth surfaces may be curved surfaces with a convex central portion, and the corners that form the boundaries of each surface may be rounded.

[0040] The shape, size, and number of dielectric layers 111 of the capacitor body 110 are not limited to those shown in the drawings of this embodiment.

[0041] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and first internal electrode layers 121 and second internal electrode layers 122 that are alternately arranged in the thickness direction (T-axis direction) with the dielectric layers 111 in between.

[0042] At this time, the boundaries between adjacent dielectric layers 111 of the capacitor body 110 may be so integrated that they are difficult to confirm without using a scanning electron microscope (SEM).

[0043] The capacitor body 110 may include an active region and cover regions 112 and 113.

[0044] The active region is a region in which the dielectric layer 111 and the internal electrode layers 121 and 122 are arranged alternately, and is the part that contributes to the formation of the capacitance of the multilayer ceramic capacitor 100. Specifically, the active region may be a region in which the first internal electrode layer 121 or the second internal electrode layer 122, which are stacked along the thickness direction (T-axis direction), overlap.

[0045] The cover regions 112 and 113 are thickness-direction margins and can be located on the first and second surfaces of the active region, respectively, in the thickness direction (T-axis direction). Such cover regions 112 and 113 may be formed by a single dielectric layer 111 or by two or more dielectric layers 111 being laminated on the upper and lower surfaces of the active region, respectively.

[0046] Furthermore, the capacitor body 110 may also include a side margin region.

[0047] The side margin region is a widthwise margin portion and can be located on both opposite ends of the active region in the widthwise direction (W-axis direction), i.e., on the sides of the fifth and sixth surfaces, respectively. The side margin region can be formed by applying a conductive paste layer for the internal electrode layer to the surface of the dielectric green sheet, applying the conductive paste layer only to a portion of the surface of the dielectric green sheet, and then laminating dielectric green sheets without the conductive paste layer on both sides of the surface of the dielectric green sheet, followed by firing, but is not limited to this method of formation.

[0048] The cover regions 112, 113 and the side margin regions serve to prevent damage to the first internal electrode layer 121 and the second internal electrode layer 122 due to physical or chemical stress.

[0049] The internal electrode layer, dielectric layer, and external electrode will be explained in detail below.

[0050] internal electrode layer The internal electrode layers 121 and 122, that is, the first internal electrode layer 121 and the second internal electrode layer 122, are electrodes having different polarities, and are arranged alternately facing each other along the T-axis direction with the dielectric layer 111 in between, with one end of each potentially exposed through the third and fourth surfaces of the capacitor body 110.

[0051] The first internal electrode layer 121 and the second internal electrode layer 122 can be electrically insulated from each other by a dielectric layer 111 placed in between them.

[0052] The ends of the first internal electrode layer 121 and the second internal electrode layer 122, which are alternately exposed through the third and fourth surfaces of the capacitor body 110, can be electrically connected to the first external electrode 131 and the second external electrode 132, respectively.

[0053] Referring to Figure 2, the internal electrode layers 121 and 122 according to one embodiment include metal layers 121a and 122a and insulating layers 121b and 122b disposed at the interface with the dielectric layer 111 on the surfaces of the metal layers 121a and 122a. Specifically, the first internal electrode layer 121 includes the first metal layer 121a and the first insulating layer 121b located on the surface of the first metal layer 121a, and the second internal electrode layer 122 includes the second metal layer 122a and the second insulating layer 122b located on the surface of the second metal layer 122a.

[0054] The insulating layers 121b and 122b may contain an oxide containing tantalum (Ta). The oxide may be represented by the following chemical formula 1.

[0055] [Chemical formula 1] A x B y O z

[0056] In chemical formula 1, A contains Ni, B contains Ta, 0 ≤ x ≤ 0.2, 0.2 ≤ y ≤ 0.5, and x + y + z = 1.

[0057] Generally, during the manufacturing of multilayer ceramic capacitors, a conductive paste layer is formed by printing a conductive paste onto a dielectric green sheet, and then a dielectric green sheet laminate is formed. The dielectric green sheet laminate undergoes calcination and firing processes to become a multilayer ceramic capacitor consisting of an internal electrode layer and a dielectric layer. However, when the main component of the internal electrode layer is nickel (Ni), defects that occur at the interface between the internal electrode layer and the dielectric layer weaken the high-temperature reliability and durability of the multilayer ceramic capacitor.

[0058] According to one embodiment, the internal electrode layers 121 and 122 have insulating layers 121b and 122b made of an oxide containing tantalum (Ta) at the interface with the dielectric layer 111. This delays the entry of carriers into the conduction band and prevents the formation of metal-dielectric junctions at the interface between the internal electrode layer and the dielectric layer, thereby preventing the occurrence of defects. As a result, leakage current is reduced in multilayer ceramic capacitors with even thinner dielectric layers, ensuring a multilayer ceramic capacitor with excellent durability and high-temperature load life.

[0059] Specifically, the insulating layers 121b and 122b may also be barrier layers that hinder electron movement, preventing the formation of a junction between the metal of the internal electrode layer and the dielectric having semiconductor properties at the interface between the internal electrode layer and the dielectric layer. In other words, by being placed between the internal electrode layer and the dielectric layer, the insulating layers 121b and 122b prevent metal-dielectric junctions and prevent carriers from entering the conduction band, thereby reducing leakage current.

[0060] In the above chemical formula 1, A may further contain Cu, Ag, Pd, or Au, and B may further contain Sn, Bi, In, Zn, or Pb.

[0061] The oxides contained in the insulating layers 121b and 122b may specifically include one or more selected from Ta2O5, TaO2, and NiTa2O6.

[0062] The oxide of the insulating layer can be derived by firing a conductive paste mainly composed of nickel (Ni) with added tantalum (Ta)-based raw materials. During the firing process, some of the tantalum (Ta)-based raw materials may chemically react with nickel (Ni) to form NiTa2O6, while others may migrate to the surface of the internal electrode layer, forming an insulating layer at the interface between the dielectric layer and the internal electrode layer.

[0063] The oxide can have a higher bandgap energy than the BaTiO3 dielectric. The size of the bandgap provides a sufficient energy barrier to prevent electrons from directly ionizing and jumping into the conduction band. Furthermore, the oxide can minimize direct carrier tunneling and FN (Fowler-Nordheim) tunneling effects.

[0064] The insulating layers 121b and 122b cause the current to flow through the band gap of the dielectric, rather than through the conduction band beyond the band gap, and through conduction paths that include defects within the band gap. Carriers traveling through such defect paths within the band gap require more energy to move, thus hindering the flow of current.

[0065] The metal layers 121a and 122a mainly contain nickel (Ni), but may also contain tantalum (Ta).

[0066] In other words, tantalum (Ta) may be present in all of the insulating layers 121b, 122b and the metal layers 121a, 122a. According to one embodiment, the tantalum (Ta) content may be even higher in the insulating layers 121b, 122b than in the metal layers 121a, 122a. In other words, the tantalum (Ta) content may be even higher at the interface of the internal electrode layer than in the internal region. In this case, it is possible to delay the entry of carriers into the conduction band and prevent the formation of metal-dielectric junctions at the interface between the internal electrode layer and the dielectric layer, thereby preventing the occurrence of defects. This reduces leakage current in multilayer ceramic capacitors with even thinner dielectric layers, ensuring multilayer ceramic capacitors with excellent high-temperature reliability and durability.

[0067] Specifically, when X is the tantalum (Ta) content in the insulating layers 121b and 122b, and Y is the tantalum (Ta) content in the metal layers 121a and 122a, the following equation 1 can be satisfied.

[0068] [Formula 1] 0 < (|XY|) / X ≤ 1

[0069] The metal layers 121a and 122a may contain tantalum (Ta) in an amount greater than 0 and less than or equal to 15 atomic parts per 100 atomic parts of nickel (Ni), for example, 0.1 to 14 atomic parts, 0.5 to 13 atomic parts, 1 to 12 atomic parts, 1.5 to 11 atomic parts, or 2 to 10 atomic parts. When the tantalum (Ta) content in the metal layers is within the above range, the high-temperature reliability and durability of the multilayer ceramic capacitor can be improved.

[0070] In addition to nickel (Ni), the metal layers 121a and 122a may further contain one or more conductive metals selected from copper (Cu), silver (Ag), palladium (Pd), gold (Au), and alloys thereof.

[0071] The insulating layers 121b and 122b may contain tantalum (Ta) in an amount of 30 to 100 atomic percent relative to the total amount of the insulating layer, for example, 40 to 95 atomic percent, or 50 to 90 atomic percent. When the tantalum (Ta) content in the insulating layers 121b and 122b is within the above range, it is possible to delay the entry of carriers into the conduction band and prevent the formation of metal-dielectric junctions at the interface between the internal electrode layer and the dielectric layer, thereby preventing the occurrence of defects. This improves the high-temperature reliability and durability of the multilayer ceramic capacitor.

[0072] The average thickness of the insulating layers 121b and 122b may be 0.5 nm to 6.0 nm, for example, 0.7 nm to 5.8 nm, 0.9 nm to 5.6 nm, 1.1 nm to 5.4 nm, or 1.3 nm to 5.2 nm. When the thickness of the insulating layer is within the above range, it is possible to prevent the occurrence of defects at the interface between the internal electrode layer and the dielectric layer, thereby obtaining a multilayer ceramic capacitor with excellent high-temperature reliability and durability.

[0073] The average thickness of insulating layers 121b and 122b can be confirmed by transmission electron microscopy (TEM) analysis.

[0074] Specifically, after curing the multilayer ceramic capacitor 100 in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to a depth of 1 / 2 in the L-axis direction. After fixing, the capacitor is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect. Next, the cross-sectional sample can be measured using a transmission electron microscope (TEM) so that at least one, three, five, or ten internal electrode layers are visible in the active region. The TEM can be performed using a Xe-FIB (focused ion beam) under conditions of an acceleration voltage of 200 kV. The thickness of the first insulating layer 121b or the second insulating layer 122b can be determined by using a scanning electron microscope (SEM) image of the measured cross-sectional sample, with the center point in the length direction (L-axis direction) or width direction (W-axis direction) of the first insulating layer 121b or the second insulating layer 122b as the reference point, and calculating the arithmetic mean of the thickness of the first insulating layer 121b or the second insulating layer 122b at 10 points separated by a predetermined interval from the reference point. The interval of the 10 points can be adjusted by the scale of the scanning electron microscope (SEM) image, for example, between 1 μm and 100 μm, between 1 μm and 50 μm, or between 1 μm and 10 μm. In this case, all 10 points must be located within the first insulating layer 121b or the second insulating layer 122b. If all 10 points are not located within the first insulating layer 121b or the second insulating layer 122b, the position of the reference point can be changed or the interval between the 10 points can be adjusted.

[0075] Furthermore, the internal electrode layers 121 and 122 may contain dielectric particles with the same composition as the ceramic material contained in the dielectric layer 111.

[0076] The structure of the internal electrode layers 121 and 122 according to one embodiment can be specifically described with reference to Figure 2.

[0077] Referring to Figure 2, the insulating layers 121b and 122b may be placed at the interface with the dielectric layer 111 in the stacking direction, i.e., in the thickness direction (T-axis direction), of the internal electrode layers 121 and 122. Alternatively, the insulating layers 121b and 122b may be placed at the interface with the dielectric layer 111 in the direction perpendicular to the stacking direction, i.e., in the length direction (L-axis direction), of the internal electrode layers 121 and 122. They may also be placed at the interface with the dielectric layer 111 in both of the aforementioned directions. Furthermore, the insulating layers 121b and 122b may be placed at the interface with the external electrodes 131 and 132 in the direction perpendicular to the stacking direction of the internal electrode layers 121 and 122.

[0078] As an example, the insulating layers 121b and 122b may have a structure that surrounds the entire surface of the metal layers 121a and 122a. Figure 2 shows a structure in which the insulating layers 121b and 122b surround the entire surface of the metal layers 121a and 122a, but this is merely one example structure for convenience. The present invention is not limited to Figure 2 as long as the insulating layer has a structure in which it is positioned at the interface with the dielectric layer on the surface of the metal layer.

[0079] The structure of the metal layers 121a, 122a and insulating layers 121b, 122b of the internal electrode layers 121, 122, and the composition of the metal layers and insulating layers can be confirmed by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy).

[0080] Specifically, after curing the multilayer ceramic capacitor 100 in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to half a depth in the L-axis direction. After fixing, the capacitor is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect. Next, the cross-sectional sample can be measured using a transmission electron microscope (TEM) so that at least one dielectric layer and at least one internal electrode layer are visible in the active region. For example, when the active region of the cross-sectional sample is divided into three equal parts, upper, middle, and lower, the TEM can be measured so that at least one dielectric layer and at least one internal electrode layer are visible in each region. The TEM can be measured using a Xe-FIB (focused ion beam) at an acceleration voltage of 200 kV.

[0081] Next, EDS (energy-dispersive spectroscopy) mapping analysis can be performed on the TEM image of the measured cross-sectional sample, and EDS line analysis can be performed on a straight section from any point in the dielectric layer to a point in the internal electrode layer adjacent to the dielectric layer. By performing EDS mapping analysis and EDS line analysis, the structure of the metal layers 121a, 122a and insulating layers 121b, 122b of the internal electrode layer and the components present in the metal layers and insulating layers can be confirmed.

[0082] According to such TEM-EDS line analysis, the metal layers 121a and 122a in one embodiment may be regions where the atomic percentage of nickel (Ni) is at its maximum, and the insulating layers 121b and 122b may be regions where the atomic percentage of tantalum (Ta) is at its maximum.

[0083] Furthermore, according to one embodiment, tantalum (Ta) contained in the insulating layer of the internal electrode layer can exist in oxide form, which can be confirmed by X-ray diffraction analysis (XRD) of the internal electrode layer.

[0084] Specifically, after curing the multilayer ceramic capacitor 100 in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to a depth of 1 / 2 in the L-axis direction, fixed, and then maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer and the internal electrode layer intersect. Next, CuK is applied to the internal electrode layer within the active region of the cross-sectional sample. α X-ray diffraction (XRD) analysis can be performed using a line. For example, when the active region of a cross-sectional sample is divided into three equal parts, upper, middle, and lower, CuK can be applied to the internal electrode layer in each region. α X-ray diffraction (XRD) analysis can be performed using the line.

[0085] The average thickness of the internal electrode layers 121 and 122 may be 0.1 μm to 2 μm, for example, 0.1 μm to 1 μm. When the average thickness of the internal electrode layers 121 and 122 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0086] The average thickness of the internal electrode layers 121 and 122 can be measured by scanning electron microscope (SEM) analysis after the multilayer ceramic capacitor 100 has been cured in an epoxy mixture, polished, and then ion milled. For example, a Verios G4 product from Thermo Fisher Scientific can be used, with measurement conditions of 10kV and 0.2nA, and the analysis magnification may be 100x. The measurement can be performed so that at least one, three, five, or ten internal electrode layers are visible. The arithmetic mean of the thickness of the first internal electrode layer 121 or the second internal electrode layer 122 at 10 points separated by a predetermined interval from the reference point, using the center point in the length direction (L-axis direction) or width direction (W-axis direction) of the measured cross-sectional sample as the reference point. The spacing between the 10 points can be adjusted by the scale of the scanning electron microscope (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the first internal electrode layer 121 or the second internal electrode layer 122. If none of the 10 points are located within the first internal electrode layer 121 or the second internal electrode layer 122, the position of the reference point can be changed or the spacing between the 10 points can be adjusted.

[0087] Dielectric layer In one embodiment, the dielectric layer 111 may mainly contain a barium titanate-based compound containing barium (Ba) and titanium (Ti).

[0088] Barium titanate-based compounds are dielectric base materials that have a high dielectric constant and contribute to the formation of the dielectric constant of the multilayer ceramic capacitor 100.

[0089] As an example, the barium titanate compound may contain one or more selected from BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, and (Ba,Sr)(Ti,Sn)O3.

[0090] The dielectric layer 111 may further contain minor components. These minor components may further contain one or more selected from, for example, manganese (Mn), chromium (Cr), silicon (Si), aluminum (Al), magnesium (Mg), tin (Sn), antimony (Sb), germanium (Ge), gallium (Ga), indium (In), barium (Ba), lanthanum (La), yttrium (Y), actinium (Ac), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), ruthenium (Lu), hafnium (Hf), and vanadium (V).

[0091] The average thickness (average length in the T-axis direction) of the dielectric layer 111 may be 0.1 μm to 8.0 μm, for example, 0.1 μm to 6.0 μm, or 0.1 μm to 2.0 μm. When the average thickness of the dielectric layer 111 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0092] This can be determined by using a scanning electron microscope (SEM) image of the cross-sectional sample measured as described above, with the center point in the length direction (L-axis direction) or width direction (W-axis direction) of the dielectric layer 111 as the reference point, and calculating the arithmetic mean of the dielectric layer 111 thickness at 10 points separated by a predetermined interval from the reference point. The interval between the 10 points can be adjusted by the scale of the scanning electron microscope (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the dielectric layer 111. If all 10 points are not located within the dielectric layer 111, the position of the reference point can be changed or the interval between the 10 points can be adjusted.

[0093] The capacitor body 110 may be formed by firing a laminate in which multiple dielectric layers 111 and internal electrode layers 121 and 122 are stacked.

[0094] external electrode External electrodes 131 and 132, namely the first external electrode 131 and the second external electrode 132, are supplied with voltages of different polarities from each other and can be electrically coupled by connecting to the exposed portions of the first internal electrode layer 121 and the second internal electrode layer 122, respectively.

[0095] With the above configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge is accumulated between the first internal electrode layer 121 and the second internal electrode layer 122, which face each other. At this time, the capacitance of the multilayer ceramic capacitor 100 becomes proportional to the overlapping area of ​​the first internal electrode layer 121 and the second internal electrode layer 122, which overlap each other along the T-axis in the active region.

[0096] The first external electrode 131 and the second external electrode 132 are arranged on the third and fourth surfaces of the capacitor body 110, respectively, and may include first and second connecting portions that connect to the first internal electrode layer 121 and the second internal electrode layer 122, and first and second band portions that are arranged at the corners where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.

[0097] The first and second band portions can extend to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 at the first and second connection portions, respectively. The first and second band portions can serve to improve the adhesion strength of the first external electrode 131 and the second external electrode 132.

[0098] The first external electrode 131 and the second external electrode 132 may each include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer positioned to cover the sintered metal layer, and a plating layer positioned to cover the conductive resin layer.

[0099] The sintered metal layer may also contain conductive metal and glass.

[0100] The conductive metal may include one or more selected from copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof. For example, copper (Cu) may include copper (Cu) alloys. If the conductive metal includes copper, other metals may be included in amounts of 5 moles or less per 100 moles of copper.

[0101] The glass may contain a composition of mixed oxides, for example, one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal is selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni); the alkali metal is selected from the group consisting of lithium (Li), sodium (Na), and potassium (K); and the alkaline earth metal is one or more selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0102] Selectively, the conductive resin layer may be formed on a sintered metal layer, for example, in a manner that completely covers the sintered metal layer. On the other hand, the first external electrode 131 and the second external electrode 132 may not include a sintered metal layer, in which case the conductive resin layer may be in direct contact with the capacitor body 110.

[0103] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the band portion) in which the conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., the band portion) in which the sintered metal layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. In other words, the conductive resin layer may be formed on the sintered metal layer and may be formed in a manner that completely covers the sintered metal layer.

[0104] The conductive resin layer contains a resin and a conductive metal.

[0105] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding properties and shock absorption and is mixed with conductive metal powder to make a paste, and may include, for example, phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0106] The conductive metal contained in the conductive resin layer serves to electrically connect with the first internal electrode layer 121 and the second internal electrode layer 122 or the sintered metal layer.

[0107] The conductive metal contained in the conductive resin layer may be spherical, flake-shaped, or a combination of these forms. In other words, the conductive metal may consist solely of flake-shaped elements, solely of spherical elements, or a mixture of flake-shaped and spherical elements.

[0108] Here, "spherical" may include forms that are not perfectly spherical, for example, forms in which the ratio of the length of the long axis to the short axis (long axis / short axis) is 1.45 or less. "Flake-shaped powder" means powder having a flat, elongated shape and is not particularly limited, but for example, the ratio of the length of the long axis to the short axis (long axis / short axis) may be 1.95 or more.

[0109] The first external electrode 131 and the second external electrode 132 may further include a plating layer disposed on the outside of the conductive resin layer.

[0110] The plating layer may consist of nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), either alone or in alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or a nickel (Ni) plating layer and a tin (Sn) plating layer stacked sequentially, or a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer stacked sequentially. The plating layer may also consist of multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.

[0111] The plating layer can improve the mountability of the multilayer capacitor 100 on the substrate, structural reliability, durability against external elements, heat resistance, and equivalent series resistance (ESR).

[0112] Manufacturing method for multilayer ceramic capacitors The following describes a method for manufacturing a multilayer ceramic capacitor 100 according to one embodiment.

[0113] A multilayer ceramic capacitor 100 according to one embodiment can be manufactured by the following steps: mixing nickel (Ni) and tantalum (Ta) based raw materials to produce a conductive paste; producing a dielectric green sheet using a dielectric slurry and printing the conductive paste onto the surface of the dielectric green sheet to form a conductive paste layer; laminating the dielectric green sheets on which the conductive paste layer is formed to produce a dielectric green sheet laminate; firing the dielectric green sheet laminate to produce a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers laminated with the dielectric layers sandwiched between them; and forming external electrodes on the outside of the capacitor body.

[0114] Conductive paste can be manufactured by mixing nickel (Ni) and tantalum (Ta)-based raw materials.

[0115] The tantalum (Ta)-based raw material may contain one or more selected from tantalum (Ta) and tantalum (Ta) oxides. The tantalum (Ta) oxide may contain one or more selected from Ta2O5 and TaO2.

[0116] During the firing process of conductive paste, in the case of Ta2O5, some may chemically react with Ni to form NiTa2O6, and some may migrate to the surface of the internal electrode layer, forming an insulating layer at the interface between the dielectric layer and the internal electrode layer.

[0117] The tantalum (Ta)-based raw material may be mixed in an amount of 0.6 to 12.0 parts by weight per 100 parts by weight of nickel (Ni), for example, 1.0 to 11.5 parts by weight, or 1.5 to 11.0 parts by weight. When the tantalum (Ta)-based raw material is mixed within the above content range, an insulating layer of appropriate thickness is formed, thereby preventing the formation of metal-dielectric junctions at the interface between the internal electrode layer and the dielectric layer, and thus preventing the occurrence of defects. This ensures a multilayer ceramic capacitor with excellent high-temperature reliability and durability.

[0118] In addition to nickel (Ni), conductive paste can also be manufactured by further mixing one or more conductive metals selected from copper (Cu), silver (Ag), palladium (Pd), gold (Au), and their alloys.

[0119] Furthermore, the conductive paste can be manufactured by further mixing a conductive metal, a binder, and a solvent. Additionally, a barium titanate compound may be mixed in as a co-material if necessary. This co-material can suppress the sintering of the conductive powder during the firing process.

[0120] According to one embodiment, a conductive paste layer can be formed by printing a conductive paste onto the surface of a dielectric green sheet, and then the aforementioned tantalum (Ta)-based raw material can be deposited onto the conductive paste layer to manufacture a laminate. The deposition may be carried out by methods such as sputtering.

[0121] In the step of manufacturing a dielectric green sheet, the dielectric slurry can be produced by selectively mixing a barium titanate-based compound, which is the main component powder, with a secondary component powder. The secondary component powder may be an oxide or a salt compound, or it may be used in sol form dispersed in an organic solvent.

[0122] Furthermore, dielectric slurry can be manufactured by further mixing a solvent with additives such as dispersants, binders, plasticizers, lubricants, and antistatic agents.

[0123] The dispersant may include, for example, at least one selected from phosphate ester-based dispersants and polycarboxylic acid-based dispersants. The dispersant may be mixed in an amount of 0.1 to 5 parts by weight per 100 parts by weight of the barium titanate compound, for example, 0.3 to 3 parts by weight. When the dispersant is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0124] The binder may be, for example, an acrylic resin, a polyvinyl butyl resin, a polyvinyl acetal resin, or an ethyl cellulose resin. The binder may be added in an amount of 0.1 to 50 parts by weight per 100 parts by weight of the barium titanate compound, for example, 3 to 30 parts by weight. When the binder is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0125] The plasticizer may be, for example, phthalate compounds such as dioctyl phthalate, benzyl butyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, and di(2-ethylbutyl) phthalate; adipic acid compounds such as dihexyl adipic acid and di(2-ethylhexyl) adipic acid; glycol compounds such as ethylene glycol, diethylene glycol, and triethylene glycol; or glycol ester compounds such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutyrate), and triethylene glycol di(2-ethylhexanoate). The plasticizer may be added in an amount of 0.1 to 20 parts by weight per 100 parts by weight of the barium titanate compound, for example, 1 to 10 parts by weight. When the plasticizer is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0126] The solvent may be an aqueous solvent such as water; an alcohol solvent such as ethanol, methanol, benzyl alcohol, or methoxyethanol; a glycol solvent such as ethylene glycol or diethylene glycol; a ketone solvent such as acetone, methyl ethyl ketone, methyl isobutyl ketone, or cyclohexanone; an ester solvent such as butyl acetate, ethyl acetate, carbitol acetate, or butyl carbitol acetate; an ether solvent such as methyl cellosolve, ethyl cellosolve, butyl ether, or tetrahydrofuran; or an aromatic solvent such as benzene, toluene, or xylene. The solvent can be an alcohol or aromatic solvent, for example, considering the solubility and dispersibility of the various additives contained in the dielectric slurry. The solvent may be mixed in an amount of 50 to 1000 parts by weight per 100 parts by weight of the barium titanate compound, for example, 100 to 500 parts by weight. When the solvent is mixed within the above content range, the dielectric slurry components may be thoroughly mixed, and the solvent can be easily removed thereafter.

[0127] The aforementioned dielectric slurry can be mixed using a wet ball mill or a stirring mill. When using zirconia balls in a wet ball mill, a large number of zirconia balls with diameters of 0.1 mm to 10 mm can be used for wet mixing for 8 to 48 hours, or 10 to 24 hours.

[0128] The manufactured dielectric slurry is formed into the dielectric layer after firing.

[0129] Methods for forming the manufactured dielectric slurry into a sheet shape include tape molding methods such as the doctor blade method and the calender roll method, or, for example, an on-roll molding coater with a head discharge system. By drying the molded body thereafter, a dielectric green sheet can be obtained.

[0130] A conductive paste layer is formed on the surface of a dielectric green sheet by applying a conductive paste in a predetermined pattern using various printing methods such as screen printing or transfer methods.

[0131] Next, a dielectric green sheet laminate is manufactured by stacking multiple dielectric green sheets with internal electrode patterns formed on them, and then pressing them in the stacking direction. At this time, dielectric green sheets and internal electrode layer patterns can be stacked such that dielectric green sheets are positioned on the upper and lower surfaces of the dielectric green sheet laminate in the stacking direction.

[0132] The step of cutting the manufactured dielectric green sheet laminate to a predetermined size by dicing or other means can be selectively performed.

[0133] Furthermore, the dielectric green sheet laminate can be solidified and dried to remove plasticizers and other substances as needed, and after solidification and drying, it can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container along with media and polishing fluid, and unwanted parts such as burrs generated during cutting can be polished off by applying rotational motion or vibration to the barrel container. After barrel polishing, the dielectric green sheet laminate can be washed with a cleaning solution such as water and then dried.

[0134] Next, the dielectric green sheet laminate can be debindered (calcined) and fired to manufacture a capacitor body.

[0135] The debinding treatment conditions can be appropriately adjusted depending on the composition of the dielectric layer and the internal electrode layer. For example, the heating rate during debinding may be 5°C / hour to 300°C / hour, the support temperature may be 180°C to 400°C, and the temperature maintenance time may be 0.5 hours to 24 hours. The atmosphere during debinding may be air or a reducing atmosphere.

[0136] The conditions of the firing process can be appropriately adjusted according to the main component composition of the dielectric layer and the main component composition of the internal electrode layer. For example, the firing may be performed at a temperature of 1100°C to 1400°C, or for example, at a temperature of 1200°C to 1350°C. Also, the firing may be performed for 0.5 hours to 8 hours, for example, for 1 hour to 3 hours. Further, the firing may be performed in a reducing atmosphere, for example, in an atmosphere in which a mixed gas of nitrogen and hydrogen is humidified, or for example, under the condition that the hydrogen concentration is 1.0% or less. When the internal electrode layer contains nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere is 1.0×10 -14 MPa to 1.0×10 -10 MPa may be used.

[0137] After the firing process, annealing can be performed as necessary. Annealing is a process for re-oxidizing the dielectric layer, and when the firing process is performed in a reducing atmosphere, annealing can be performed. The conditions of the annealing process can also be appropriately adjusted according to the components of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 hours to 20 hours, and the heating rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be a humidified nitrogen gas (N2) atmosphere, and the oxygen partial pressure may be 1.0×10 -9 MPa to 1.0×10 -5 MPa may be used.

[0138] In order to humidify nitrogen gas, a mixed gas, etc. in the debinding process, the firing process, or the annealing process, for example, a wetter can be used. In this case, the water temperature may be 5°C to 75°C. The debinding process, the firing process, and the annealing process can be performed continuously or independently.

[0139] Selectively, the third and fourth surfaces of the manufactured capacitor body 110 can be subjected to surface treatments such as sandblasting, laser irradiation, and barrel polishing. By performing such surface treatments, the edges of the first and second internal electrode layers may be exposed on the outermost surfaces of the third and fourth surfaces, thereby improving the electrical connection between the first and second external electrodes and the first and second internal electrode layers, and potentially facilitating the formation of alloy parts.

[0140] Next, an external electrode is formed on one surface of the manufactured capacitor body 110.

[0141] For example, a sintered metal layer can be formed by applying a paste for forming a sintered metal layer with an external electrode and then sintering it.

[0142] The paste for forming a sintered metal layer may contain a conductive metal and glass. The explanation of the conductive metal and glass is the same as described above, so a repetition of the explanation will be omitted. The paste for forming a sintered metal layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Binders can be, for example, ethyl cellulose, acrylic, butyral, etc., and solvents can be, for example, organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or aqueous solvents.

[0143] Methods for applying the sintered metal layer-forming paste to the outer surface of the capacitor body 110 include various printing methods such as dipping and screen printing, application methods using dispensers, and spraying methods using sprayers. The sintered metal layer-forming paste may be applied to at least the third and fourth surfaces of the capacitor body 110, and may also be applied selectively to a portion of the first, second, fifth, or sixth surfaces where the band portions of the first and second external electrodes are formed.

[0144] Subsequently, the capacitor body 110 coated with the paste for forming a sintered metal layer is dried and sintered at a temperature of 700°C to 1000°C for 0.1 to 3 hours to form a sintered metal layer.

[0145] Selectively, a conductive resin layer-forming paste can be applied to the outer surface of the obtained capacitor body 110, and then cured to form a conductive resin layer.

[0146] The paste for forming a conductive resin layer may contain a resin and, selectively, a conductive metal or a non-conductive filler. The explanation of conductive metals and resins is the same as described above, so a repetition of the explanation will be omitted. The paste for forming a conductive resin layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Binders can be, for example, ethyl cellulose, acrylic, butyral, etc., and solvents can be organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or aqueous solvents.

[0147] As an example, the conductive resin layer can be formed by dipping the capacitor body 110 into a conductive resin layer forming paste and then curing it, printing the conductive resin layer forming paste onto the surface of the capacitor body 110 using a screen printing method or gravure printing method, or applying the conductive resin layer forming paste to the surface of the capacitor body 110 and then curing it.

[0148] Next, a plating layer is formed on the outside of the conductive resin layer.

[0149] For example, the plating layer may be formed by a plating method, or by sputtering or electroplating (electric deposition).

[0150] The implementation examples described above will be explained in more detail below through the examples provided. However, the following examples are for illustrative purposes only and do not limit the scope of rights.

[0151] (Manufacturing of multilayer ceramic capacitors) Examples 1 to 6 and Reference Examples 1 to 3 A conductive paste was prepared by mixing nickel (Ni) and tantalum pentoxide (Ta2O5) nanoparticles in the quantities shown in Table 1 below.

[0152] Next, a dielectric slurry was prepared using barium titanate (BaTiO3) powder. The dielectric slurry was produced by mechanical milling after adding zirconia balls (ZrO2 balls) as a dispersion medium, along with ethanol / toluene, a dispersant, and a binder.

[0153] Next, a dielectric green sheet was manufactured using a head-dispensing type on-roll molding coater with the manufactured dielectric slurry. The manufactured conductive paste was printed onto the surface of the dielectric green sheet to form a conductive paste layer.

[0154] A dielectric green sheet laminate was manufactured by laminating and pressing together dielectric green sheets on which conductive paste layers were formed.

[0155] The dielectric green sheet laminate was subjected to a calcination process at a temperature of 400°C or lower and in a nitrogen atmosphere, followed by firing at a firing temperature of 1300°C or lower and a hydrogen concentration of 1.0%H2 or lower.

[0156] Next, multilayer ceramic capacitors were manufactured through processes such as external electrode assembly and plating.

[0157] Comparative Example 1 A multilayer ceramic capacitor was manufactured in the same manner as in Example 1, except that the conductive paste was manufactured without using tantalum pentoxide (Ta2O5) nanoparticles.

[0158] [Table 1]

[0159] Evaluation 1: Thickness of the insulating layer The thickness of the insulating layer was measured by TEM (transmission electron microscopy) analysis of the multilayer ceramic capacitors manufactured in Examples 1 to 6, Reference Examples 1 to 3, and Comparative Example 1 using the method described below. The results are shown in Table 2 below.

[0160] After curing the multilayer ceramic capacitor in an epoxy mixture, the W-axis and T-axis planes (WT planes) of the capacitor body were polished to half a depth in the L-axis direction. After fixing the capacitor, it was maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allowed observation of the active region where the dielectric layer and the internal electrode layer intersect. Next, the cross-sectional sample was measured using a transmission electron microscope (TEM) so that at least one, three, five, or ten layers of the internal electrode layer were visible in the active region. The TEM was measured using a Xe-FIB (focused ion beam) at an acceleration voltage of 200 kV. The scanning electron microscope (SEM) image of the measured cross-sectional sample was used, and the arithmetic mean of the thickness of the insulating layer at 10 points at predetermined intervals from the reference point, with the reference point being the center point in the length direction (L-axis direction) or width direction (W-axis direction).

[0161] Evaluation 2: TEM-EDS analysis The multilayer ceramic capacitors manufactured in Example 1 were subjected to TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis using the method described below, and the results are shown in Figures 5 and 6.

[0162] After curing the multilayer ceramic capacitor manufactured in Example 1 in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body were polished to a depth of 1 / 2 in the L-axis direction. After fixing, the capacitor was maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allowed observation of the active region where the dielectric layer and the internal electrode layer intersected. Next, the active region of the cross-sectional sample was divided into three equal parts: upper, middle, and lower. The middle section was measured using a transmission electron microscope (TEM) so that at least one dielectric layer and one internal electrode layer were visible. The TEM was measured using a Xe-FIB (focused ion beam) at an acceleration voltage of 200 kV. Next, EDS (energy-dispersive spectroscopy) mapping analysis was performed on the TEM images of the measured cross-sectional sample. In addition, EDS (energy-dispersive spectroscopy) line analysis was performed on a straight section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer to confirm the structure and composition of the internal electrode layer.

[0163] Figure 5 is a TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) mapping analysis image of the active region according to Example 1, and Figures 6a to 6b are images and graphs of the TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line profile of the active region according to Example 1.

[0164] Referring to Figures 5 and 6a to 6b, it can be seen that in Example 1, an insulating layer containing tantalum (Ta) is formed at the interface between the internal electrode layer and the dielectric layer, and that an oxide containing tantalum (Ta) is present in the insulating layer. Specifically, the TEM-EDS line analysis results show that the region with the highest atomic percentage of nickel (Ni) corresponds to the metal layer of the internal electrode layer, and the region with the highest atomic percentage of tantalum (Ta) corresponds to the insulating layer located at the interface between the internal electrode layer and the dielectric layer. Furthermore, it can be seen that tantalum (Ta) is present in a higher content in the insulating layer than in the metal layer of the internal electrode layer.

[0165] Rating 3: XRD analysis X-ray diffraction analysis (XRD) was performed on the internal electrode layer of the multilayer ceramic capacitor manufactured in Example 1, and the results are shown in Figure 7.

[0166] Specifically, after curing the multilayer ceramic capacitor in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body were polished to a depth of 1 / 2 in the L-axis direction, fixed, and then maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample so that the active region where the dielectric layer and the internal electrode layer intersect could be observed. Next, when the active region of the cross-sectional sample was divided into three equal parts, upper, middle, and lower, CuK was applied to the internal electrode layer in the middle section. α X-ray diffraction (XRD) analysis was performed using a line to confirm the material composition of the internal electrode layer.

[0167] Figure 7 shows the X-ray diffraction (XRD) graph for the internal electrode layer according to Example 1.

[0168] Referring to Figure 7, it can be confirmed that in Example 1, Ta2O5 and NiTa2O6 are present in the internal electrode layer. Therefore, from the results in Figures 5 to 7, it can be seen that Ta is present in the insulating layer located at the interface between the internal electrode layer and the dielectric layer as oxides such as Ta2O5 and NiTa2O6.

[0169] Rating 4: High-temperature reliability The capacitance and accelerated lifetime reliability (MTTF) of the multilayer ceramic capacitors manufactured in Examples 1 to 6 and Comparative Example 1 were measured using the method described below, and the results are shown in Table 2.

[0170] Capacitance was measured as capacitance (F) under the conditions of a frequency of 1 kHz and a voltage of 0.5 V.

[0171] The mean time to failure (MTTF) was determined by measuring the mean time to failure (hr) under conditions of 125°C, 9.45V voltage, and 48 hours.

[0172] In Table 1 below, the capacitance and MTTF values ​​correspond to their respective ratios based on the results from Comparative Example 1.

[0173] [Table 2]

[0174] Table 2 confirms that the multilayer ceramic capacitors according to Examples 1 to 6 are superior to those in Comparative Example 1 in both capacitance and high-temperature reliability. This indicates that when the internal electrode layer is located at the interface with the dielectric layer and has an insulating layer made of an oxide containing Ta, the multilayer ceramic capacitor exhibits superior high-temperature reliability and durability.

[0175] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and can be implemented in various ways within the scope of the claims, description of the invention, and attached drawings, and these also naturally fall within the scope of the present invention. [Explanation of Symbols]

[0176] 100: Multilayer ceramic capacitor 110: Capacitor body 111: Dielectric layer 121: First internal electrode layer 121a: 1st metal layer 121b: First insulating layer 122: Second internal electrode layer 122a: Second metal layer 122b: Second insulating layer 131: 1st external electrode 132:Second external electrode

Claims

1. A capacitor body comprising a plurality of dielectric layers and a plurality of internal electrode layers stacked with the dielectric layers in between; and Includes external electrodes disposed on the outside of the capacitor body; The internal electrode layer includes a metal layer and an insulating layer disposed at the interface between the metal layer and the dielectric layer on the surface of the metal layer. The insulating layer comprises an oxide containing tantalum (Ta), The oxide is a multilayer ceramic capacitor represented by the following chemical formula 1. [Chemical formula 1] A ｘ B ｙ O ｚ (In the above chemical formula 1, A contains Ni, B contains Ta, and 0 ≤ x ≤ 0.2, 0.2 ≤ y ≤ 0.5, and x + y + z = 1.

2. The aforementioned oxide is Ta ２ O ５ , TaO ２ and NiTa ２ O ６ A multilayer ceramic capacitor according to claim 1, comprising one or more selected from the following.

3. The multilayer ceramic capacitor according to claim 1, wherein the metal layer comprises nickel (Ni) and tantalum (Ta).

4. The multilayer ceramic capacitor according to claim 3, wherein the tantalum (Ta) content in the insulating layer is higher than that in the metal layer.

5. The multilayer ceramic capacitor according to claim 3, wherein the tantalum (Ta) content in the insulating layer is X, and the tantalum (Ta) content in the metal layer is Y, and the following formula 1 is satisfied. [Formula 1] 0<(|X-Y|) / X≦1

6. The multilayer ceramic capacitor according to claim 3, wherein the metal layer contains tantalum (Ta) in an amount greater than 0 and less than or equal to 15 atomic parts per 100 atomic parts of nickel (Ni).

7. The multilayer ceramic capacitor according to claim 1, wherein the insulating layer contains tantalum (Ta) in an amount of 30 atomic% or more and 100 atomic% or less relative to the total amount of the insulating layer.

8. The multilayer ceramic capacitor according to claim 1, wherein the average thickness of the insulating layer is 0.5 nm or more and 6.0 nm or less.

9. The multilayer ceramic capacitor according to claim 1, wherein the insulating layer is arranged at the interface with the dielectric layer in the stacking direction of the internal electrode layer.

10. The multilayer ceramic capacitor according to claim 1, wherein the insulating layer is arranged at the interface with the dielectric layer in the direction perpendicular to the stacking direction of the internal electrode layer.

11. The multilayer ceramic capacitor according to claim 1, wherein the insulating layer is arranged at the interface between the internal electrode layer and the dielectric layer in the stacking direction and perpendicular to the stacking direction.

12. The multilayer ceramic capacitor according to claim 1, wherein the insulating layer is further disposed at the interface with the external electrode in the direction perpendicular to the stacking direction of the internal electrode layer.

13. During TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) line analysis of a linear section from one point in the dielectric layer to one point in the internal electrode layer adjacent to the dielectric layer, The multilayer ceramic capacitor according to claim 1, wherein the atomic percentage of tantalum (Ta) in the insulating layer is at its maximum value.

14. A step of manufacturing a conductive paste by mixing nickel (Ni) and tantalum (Ta) based raw materials; A step of manufacturing a dielectric green sheet using a dielectric slurry, and printing the conductive paste onto the surface of the dielectric green sheet to form a conductive paste layer; A step of manufacturing a dielectric green sheet laminate by stacking dielectric green sheets on which the conductive paste layer is formed; A step of firing the dielectric green sheet laminate to manufacture a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers laminated with the dielectric layers in between; and The step of forming an external electrode on the outside of the capacitor body; A method for manufacturing a multilayer ceramic capacitor, wherein the internal electrode layer includes a metal layer and an insulating layer disposed at the interface between the metal layer and the dielectric layer on the surface of the metal layer, and the insulating layer includes tantalum (Ta) and an oxide represented by the following chemical formula 1. [Chemical formula 1] A ｘ B ｙ O ｚ (In the above chemical formula 1, A contains Ni, B contains Ta, and 0 ≤ x ≤ 0.2, 0.2 ≤ y ≤ 0.5, and x + y + z = 1.

15. The tantalum (Ta)-based raw material comprises one or more selected from tantalum (Ta) and tantalum (Ta) oxide. The tantalum (Ta) oxide is Ta ２ O ５ and TaO ２ A method for manufacturing a multilayer ceramic capacitor according to claim 14, comprising one or more selected from among the following.

16. The method for manufacturing a multilayer ceramic capacitor according to claim 14, wherein the tantalum (Ta)-based raw material is mixed in an amount of 0.6 parts by weight or more and 12.0 parts by weight or less with respect to 100 parts by weight of nickel (Ni).

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