Method for predicting the electrical characteristics of semiconductor devices

By learning the process flow and electrical characteristics of semiconductor equipment through a multimodal learning model, the problem of difficulty in predicting electrical characteristics is solved, and accurate and efficient electrical characteristic prediction is achieved.

JP2026071333APending Publication Date: 2026-04-28SEMICON ENERGY LAB CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
SEMICON ENERGY LAB CO LTD
Filing Date
2026-02-05
Publication Date
2026-04-28

AI Technical Summary

Technical Problem

Predicting electrical characteristics is difficult during the development of semiconductor devices. Due to various factors such as the sequence of process steps, manufacturing equipment, process conditions, and the thin film thickness and processing accuracy caused by miniaturization, existing technologies cannot accurately predict their electrical characteristics.

Method used

A multimodal learning model is adopted, which uses multiple neural networks to learn the process flow, electrical characteristics and cross-sectional images of semiconductor equipment through feature calculation unit and feature prediction unit, and outputs variable values ​​for calculating electrical characteristics.

Benefits of technology

It enables simple and accurate prediction of the electrical characteristics of semiconductor devices, reducing development cycles and resource consumption.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2026071333000001_ABST
    Figure 2026071333000001_ABST
Patent Text Reader

Abstract

This invention provides an electrical characteristic prediction method for predicting the electrical characteristics of semiconductor devices from a process list. [Solution] A method for predicting the electrical characteristics of a semiconductor device using a feature calculation unit and a characteristic prediction unit, wherein the feature calculation unit has a first learning model 210 and a second learning model 220, and the first learning model has the steps of learning a process list for producing a semiconductor device and generating a first feature. The second learning model has the steps of learning the electrical characteristics of a semiconductor device produced by the process list and generating a second feature. The characteristic prediction unit has a third learning model 230, and the third learning model has the steps of performing multimodal learning using the first feature and the second feature and outputting the values ​​of variables used in the calculation formula for semiconductor device characteristics. Furthermore, the first to third learning models each have different neural networks.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] One aspect of the present invention relates to a method for training a multimodal learning model using any one or more of a process recipe, electrical characteristics, or image data. Another aspect of the present invention relates to a method for predicting the electrical characteristics of a semiconductor device using a trained multimodal learning model using any one or more of a process recipe, electrical characteristics, or image data. One aspect of the present invention relates to a method for predicting the electrical characteristics of a semiconductor device using a computer. Note that, in this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. As an example, it is a semiconductor device such as a transistor, diode, light-emitting device, or light-receiving device. Another example of a semiconductor device is a passive device generated by a conductive film such as a capacitor, resistor, inductor, or an insulating film. Another example of a semiconductor device is a semiconductor device including a circuit having a semiconductor device or a passive device.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. As an example, it is a semiconductor device such as a transistor, diode, light-emitting device, or light-receiving device. Another example of a semiconductor device is a passive device generated by a conductive film such as a capacitor, resistor, inductor, or an insulating film. Another example of a semiconductor device is a semiconductor device such as a transistor, diode, light-emitting device, or light-receiving device. Another example of a semiconductor device is a passive device generated by a conductive film such as a capacitor, resistor, inductor, or an insulating film. Another example of a semiconductor device is a passive device generated by a conductive film such as a capacitor, resistor, inductor, or an insulating film. Another example of a semiconductor device is a passive device generated by a conductive film such as a capacitor, resistor, inductor, or an insulating film. Another example of a semiconductor device is a semiconductor device including a circuit having a semiconductor device or a passive device.

Background Art

[0003] In recent years, in fields using artificial intelligence (AI), the field of robots, or the energy field handling high power such as power ICs, new semiconductor devices have been developed to solve problems such as an increase in the amount of calculation or an increase in power consumption. The integrated circuits or semiconductor devices used in integrated circuits required by the market are becoming more complex, while an early start-up of integrated circuits having new functions is required. However, in process design, device design, or circuit design in the development of semiconductor devices, skilled personnel are required. personnel are required. personnel are required. personnel are required. However, in process design, device design, or circuit design in the development of semiconductor devices, skilled The knowledge, know-how, and experience of engineers are necessary.

[0004] In recent years, genetic algorithms have been used to tune the parameters of the physical model of transistors. It is known that... Patent Document 1 describes a genetic algorithm for the physical model of a transistor... A parameter adjustment device used for adjusting the parameters of the device is disclosed. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2005-38216 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] Developing semiconductor devices requires process design, device design, and circuit design. For example, when forming a semiconductor device, the semiconductor device incorporates multiple process steps. It is formed by combining. If the order of the process steps changes, the semiconductor element will change. There is a problem that the electrical characteristics will differ. Furthermore, even with the same process, the manufacturing equipment or process may differ. A problem arises when the electrical characteristics of semiconductor devices differ under different set conditions.

[0007] Furthermore, semiconductor devices are manufactured using the same process, different equipment with the same function, and under the same conditions. Even if formed in the same way, there is a problem that the electrical properties will differ as miniaturization progresses. This can be due to factors such as the film thickness accuracy or processing accuracy of the manufacturing equipment, or due to physical modeling caused by miniaturization. The cause may be that the values ​​differ. To investigate the cause, various experiments or There are issues that require time for evaluation.

[0008] As mentioned above, the order of process steps, manufacturing equipment, process conditions, miniaturization, film thickness accuracy, and The electrical characteristics of semiconductor devices are influenced by a wide range of factors, including processing accuracy. Predicting its electrical characteristics accurately was extremely difficult.

[0009] In view of the above problems, one aspect of the present invention provides a simple method for predicting the electrical characteristics of a semiconductor device. One of the challenges is to address this. Alternatively, one aspect of the present invention relates to semiconductors using a simple computer. One objective is to provide a method for predicting the electrical characteristics of a body element. Alternatively, one aspect of the present invention is: It is equipped with a neural network that learns the process list of semiconductor devices and outputs a first feature quantity. One of the challenges is to achieve this. Alternatively, one aspect of the present invention relates to the process list of a semiconductor device. Therefore, the neural network learns the electrical properties of the generated semiconductor device and outputs a second feature. One of the challenges is to provide a network. Alternatively, one aspect of the present invention relates to the semiconductor element. Learn the schematic cross-sectional diagram or cross-sectional observation image of the semiconductor device generated by the process list, One of the challenges is to provide a neural network that outputs three feature quantities. One aspect of the present invention is a neural network that performs multimodal learning using first to third features. One of the objectives is to provide a multi-mode network. Alternatively, one aspect of the present invention provides a multi-mode network. A neural network that performs sluggish learning uses a formula to represent the electrical properties of semiconductor devices. One of the tasks is to output the value of a variable.

[0010] Furthermore, the description of these problems does not preclude the existence of other problems. One approach does not require that all of these issues be resolved. The problem will become obvious from the descriptions in the specification, drawings, claims, etc., and it is possible to extract other problems from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problem

[0011] One aspect of the present invention is a method for predicting the electrical characteristics of a semiconductor device having a feature quantity calculation unit and a characteristic prediction unit. The feature quantity calculation unit has a first learning model and a second learning model, and the characteristic prediction unit has a third learning model. The first learning model has a step of learning a process list for generating a semiconductor device. Further, the first learning model has a step of generating a first feature quantity. The second learning model has a step of learning the electrical characteristics of the semiconductor device generated by the process list. Further, the second learning model has a step of generating a second feature quantity. The third learning model has a step of performing multimodal learning using the first feature quantity and the second feature quantity. Further, the third learning model has a step of outputting the value of a variable used in a calculation formula representing the electrical characteristics of the semiconductor device. It is a method for predicting the electrical characteristics of a semiconductor device. In the above configuration, the feature quantity calculation unit has a fourth learning model. The fourth learning model has a step of learning a cross-sectional schematic diagram generated using the process list. Further, the fourth learning model has a step of generating a third feature quantity. The third learning model has a step of performing multimodal learning using the first feature quantity, the second feature quantity, and the third feature quantity. The third learning model has a step of outputting the value of a variable used in a calculation formula representing the electrical characteristics of the semiconductor device. A method for predicting the electrical characteristics of a semiconductor device is preferable. feature quantity and the second feature quantity. The third learning model has a step of performing multimodal learning using the first feature quantity, the second feature quantity, and the third feature quantity. The third learning model has a step of outputting the value of a variable used in a calculation formula representing the electrical characteristics of the semiconductor device. It is a method for predicting the electrical characteristics of a semiconductor device. 量と、を用いてマルチモーダルな学習をするステップを有する。さらに、第3の学習モデ ルが、半導体素子の電気特性を表す計算式に用いる変数の値を出力するステップを有する 半導体素子の電気特性予測方法である。

[0012] 上記構成において、特徴量算出部は、第4の学習モデルを有する。第4の学習モデルが 、工程リストを用いて生成する断面模式図を学習するステップを有する。さらに、第4の 学習モデルが、第3の特徴量を生成するステップを有する。第3の学習モデルが、第1の 特徴量と、第2の特徴量と、第3の特徴量と、を用いてマルチモーダルな学習をするステ ップを有する。第3の学習モデルが、半導体素子の電気特特性を表す計算式に用いる変数 の値を出力するステップを有する半導体素子の電気特性予測方法が好ましい。

[0013] In the above configuration, the first learning model has a first neural network and a second The learning model has a second neural network. The first feature generated by the first neural network updates the weight coefficients of the second neural network. A method for predicting the electrical characteristics of a semiconductor device having a chip is preferred.

[0014] In the above configuration, the first learning model is given a list of inference processes, and the second In the learning model, if the voltage value applied to the terminals of the semiconductor device is given, the second learning model Dell predicts the electrical characteristics of a semiconductor device having a step of outputting a current value corresponding to a voltage value. A measurement method is preferred.

[0015] In the above configuration, the first learning model is given a list of inference processes, and the second In the learning model, if the voltage value applied to the terminals of the semiconductor device is given, the third learning model Dell has a step of outputting the values ​​of variables used in the formula for calculating the electrical characteristics of semiconductor devices. A method for predicting the electrical characteristics of semiconductor devices is preferred.

[0016] In the above configuration, the semiconductor element is a transistor, and the method for predicting the electrical characteristics of the semiconductor element is This is preferable. Furthermore, it is preferable that the transistor contains a metal oxide in its semiconductor layer. [Effects of the Invention]

[0017] One aspect of the present invention can provide a simple method for predicting the electrical characteristics of semiconductor devices. Alternatively, in one aspect of the present invention, a method for predicting the electrical characteristics of a semiconductor device using a simple computer. A method can be provided. Alternatively, one aspect of the present invention involves learning the process list of a semiconductor device. The present invention may include a neural network that outputs a first feature quantity. One aspect involves learning the electrical properties of a semiconductor device produced by the process list of the semiconductor device. It can be equipped with a neural network that learns and outputs a second feature. Alternatively, this One aspect of the invention is a schematic cross-sectional view of a semiconductor device produced by the process list of the semiconductor device. This includes a neural network that learns from diagrams or cross-sectional images and outputs a third feature. This can be done. Alternatively, one aspect of the present invention uses the first to third feature quantities to perform multimodal It can be equipped with a neural network that performs learning. Alternatively, one aspect of the present invention is a A neural network that performs multimodal learning can calculate the electrical properties of a semiconductor device. The values ​​of the variables used can be output.

[0018] The effects of one embodiment of the present invention are not limited to those listed above. This does not preclude the existence of other effects. These other effects are described in the following section. This is an effect not mentioned in the specification. Effects not mentioned in this section can be described in the specification or by those skilled in the art. This can be derived from drawings and other descriptions, and can be extracted appropriately from these descriptions. Furthermore, one aspect of the present invention includes at least the effects listed above and / or other effects. It also has another effect. Therefore, one aspect of the present invention may, in some cases, be described above It may not always have the effects listed. [Brief explanation of the drawing]

[0019] [Figure 1] Figure 1 illustrates a method for predicting the electrical characteristics of semiconductor devices. [Figure 2] Figures 2A, 2B, 2C, and 2D are tables illustrating the process list. [Figure 3] Figures 3A and 3B illustrate the process list. Figure 3C illustrates the neural network that learns the process list. [Figure 4] Figures 4A and 4B illustrate the electrical properties of semiconductor devices. Figure 4C illustrates a neural network that learns electrical properties. [Figure 5] Figure 5 illustrates a method for predicting the electrical characteristics of semiconductor devices. [Figure 6] Figure 6A illustrates a neural network that learns from image data. Figure 6B illustrates a schematic cross-sectional view of a semiconductor device. Figure 6C illustrates a cross-sectional observation image of a semiconductor device. [Figure 7] Figure 7 illustrates a method for predicting the electrical characteristics of semiconductor devices. [Figure 8] Figure 8 illustrates a method for predicting the electrical characteristics of semiconductor devices. [Figure 9] Figure 9 is a diagram illustrating the computer on which the program runs. [Modes for carrying out the invention]

[0020] Embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. Without departing from the spirit and scope of the present invention, its form and details may be modified in various ways. Those skilled in the art will readily understand that this is possible. Therefore, the present invention is as shown in the following embodiments. It is not to be interpreted solely in terms of the description of the form.

[0021] In the configuration of the invention described below, the same part or part having a similar function is The same reference numerals are used consistently across different drawings, and explanations of their repetition are omitted. When referring to the function of [this], the hatch pattern is the same, and sometimes no specific symbol is assigned.

[0022] Furthermore, the position, size, and scope of each component shown in the drawings are, for the sake of ease of understanding, actual The position, size, and range of the edges may not be shown. Therefore, the disclosed invention is not necessarily However, this is not limited to the location, size, and scope disclosed in the drawings.

[0023] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" used in this specification refer to the constituent elements. This note is added to avoid confusion and does not imply any numerical limitation.

[0024] (Embodiment) One aspect of the present invention describes a method for predicting the electrical characteristics of a semiconductor device. As an example, The method for predicting the electrical characteristics of semiconductor devices uses a feature calculation unit and a characteristic prediction unit. The calculation unit has a first learning model and a second learning model, and the characteristic prediction unit has a third learning It has a model. The first learning model has a first neural network, and the The second learning model has a second neural network, and the third learning model has a third It has a neural network. Note that the first to third neural networks are It is preferable that they be different.

[0025] First, we will explain the learning method for predicting the electrical characteristics of semiconductor devices.

[0026] As an example, the first learning model learns a process list for manufacturing semiconductor devices. Let me explain the case. The first learning model is a process list for producing a semiconductor device. The weight coefficients of the first neural network are updated by the given values. In other words, the first A neural network learns from a list of processes as training data. This is the case. In the following explanation, we will use the term "transistor" as an example to refer to semiconductor devices. Note that semiconductor devices are not limited to transistors. Transistors are just one example; semiconductors are also semiconductors. The elements include diodes, thermistors, gyro sensors, accelerometers, light-emitting elements, or receivers. Optical elements may also be used. Furthermore, semiconductor elements may include resistors or capacitors.

[0027] The above-mentioned process list is a combination of multiple processes necessary to form a transistor. This is combined information. Next, we will explain one of the process items listed in the process list. The process items preferably include at least a process ID, equipment ID, and conditions. The types of processes include film formation, cleaning, resist coating, exposure, development, and processing. At least one or more processes, such as a baking process, a peeling process, or a doping process. The process involves the following steps. Furthermore, the conditions include the setting conditions for each device.

[0028] Furthermore, the process content represented by each process ID is performed by equipment with different functions. There are cases where this is the case. For example, the film deposition process may involve metal-organic vapor deposition (MOCVD) or chemical vapor deposition. These include the CVD (Chemical Vapor Deposition) method or sputtering method. Therefore, when given to the first learning model... In the case of information, representing the process ID and equipment ID with a single code transforms two-dimensional information into one-dimensional information. This information can be managed as such. By using codes to represent the process ID and equipment ID, This reduces the number of learning items and thus the amount of computation required. The code generation method is explained in detail in Figure 2. .

[0029] Furthermore, the first learning model is trained by the process list. The first feature is generated by the mark.

[0030] In one aspect of the future, in parallel with the learning of the first learning model, the second learning model is trained Learn the electrical properties of the transistor generated by the model. More specifically, the second The learning model is the transistor generated by the process list given to the first learning model. The electrical characteristics of the transistor are learned. The second learning model is given the electrical characteristics of the transistor. This updates the weight coefficients of the second neural network. The network is a neural network that learns from the electrical properties of transistors as training data. This is a workpiece. For example, the electrical characteristics of a transistor are the temperature characteristics of the transistor or Id-Vgs characteristics are used to evaluate threshold voltages, etc., and Id-Vgs characteristics are used to evaluate transistor saturation characteristics. Vds characteristics and can be used.

[0031] The drain current Id is the current at the gate, drain, and source terminals of the transistor. This indicates the magnitude of the current flowing through the drain terminal when a voltage is applied. Note that the Id-Vgs characteristic and This is the change in drain current Id when different voltages are applied to the gate terminal of a transistor. Furthermore, the Id-Vds characteristic refers to the behavior when different voltages are applied to the drain terminal of a transistor. This is the change in the drain current value Id.

[0032] Furthermore, the second learning model analyzes the electrical characteristics of the transistor generated by the process list. A second neural network, which has learned the previous steps, generates a second feature.

[0033] Next, the third learning model uses the first feature and the second feature to perform multi-mode The learning process is tedious. The third learning model is given the first feature and the second feature. This updates the weight coefficients of the third neural network. The network teaches the process list and the electrical characteristics of the transistors corresponding to the process list. This is a neural network that learns using training data.

[0034] Furthermore, multimodal learning is generated from a process list for manufacturing semiconductor devices. The first characteristic quantity is generated from the electrical characteristics of the semiconductor device produced by the process list. This involves learning using different types of information, such as the second feature. A neural network that uses features generated from multiple pieces of information in different formats as input. This can be called a neural network with a multimodal interface. In one aspect of the present invention, a third neural network is a multimodal interface. This corresponds to a neural network with a specific set of parameters.

[0035] As an example, the third learning model is a variable used in the formula that represents the electrical characteristics of a transistor. The value of the variable is output. In other words, the value of the variable is predicted by the method for predicting the electrical characteristics of semiconductor devices. It will be that value.

[0036] As an example, the gradient channel approximation formula for a transistor is used to describe the electrical characteristics of a transistor. It is used as a formula to represent calculations. Equation (1) represents the electrical characteristics of the transistor in the saturation region. Equation (2) represents the electrical characteristics of the transistor in the linear region.

[0037]

number

[0038]

number

[0039] The variables predicted by the transistor electrical characteristic prediction method are those used in equation (1) or (2). Drain current Id, field-effect mobility μFE, unit area capacitance Cox of gate insulating film, The parameters include channel length L, channel width W, or threshold voltage Vth. Note that the gate terminal... The gate voltage Vg applied to the terminal or the drain voltage Vd applied to the drain terminal is followed by It is preferable that the inference data described above is provided. The third learning model is the modified version described above. It can output all numerical values, or output the values ​​of one or more variables. You may do so.

[0040] The method for predicting the electrical characteristics of semiconductor devices utilizes supervised learning, and therefore requires a third learning model. The first to third neural networks are rewarded based on the output results of the first neural network. For example, the first to third neural networks are derived from the electrical characteristics of transistors using the formula ( Update the weight coefficients to approximate the result calculated from (1) or (2).

[0041] The feature calculation unit further includes a fourth learning model. The fourth learning model is process ris The system learns the schematic cross-sectional diagram of the transistor generated using the system. Alternatively, the fourth learning model is Next, learn the cross-sectional SEM image of the transistor generated using the process list. The fourth learning mode Dell learns a third feature by studying schematic cross-sectional diagrams or cross-sectional SEM images of transistors. This generates the third feature. If the fourth learning model generates the third feature, the first learning model generates the fourth feature in parallel. It is preferable that the first feature is generated by the first learning model, and the second learning model generates the second feature. It seems so.

[0042] Therefore, the third learning model uses the first feature, the second feature, and the third feature. Therefore, it performs multimodal learning. Thus, the third learning model is the electrical characteristics of transistors. Outputs the values ​​of the variables used in the formula that represents gender.

[0043] Furthermore, the first feature updates the weight coefficients of the second neural network. The features are the output of the first learning model that learned the process list. In other words, the first features The quantity is related to the electrical characteristics of the transistor produced by the process list.

[0044] Next, we will explain how to perform inference using the above-described method for predicting the electrical characteristics of transistors. The first learning model is given a list of inference processes, and the second learning model is given a list of inference processes. Given the voltage values ​​applied to the terminals of a semiconductor device, the third learning model will determine the transistor Outputs the values ​​of the variables used in the calculation formula for the electrical characteristics of the device.

[0045] Furthermore, if the first feature updates the weight coefficients of the second neural network, This section describes a method for performing inference using a method for predicting the electrical characteristics of a transistor. The first learning model... Dell is given a list of inference processes, and the second learning model is a transistor The values ​​of the voltages applied to the terminals (gate terminal, drain terminal, source terminal) are given. The learning model outputs a predicted value for the current flowing through the drain terminal, corresponding to the voltage value. do.

[0046] Next, methods for predicting the electrical characteristics of semiconductor devices will be explained using Figures 1 to 8. Next, we will explain the case where a transistor is used as the semiconductor device.

[0047] The transistor electrical characteristic prediction method described in Figure 1 consists of a feature calculation unit 110 and a characteristic prediction unit. The feature calculation unit 110 includes a learning model 210 and a learning model 220. The characteristic prediction unit 120 has a learning model 230.

[0048] The learning model 210 consists of a neural network 211 and a neural network It has a neural network 211 and a neural network The details of item 212 will be explained in Figure 3C.

[0049] The learning model 220 comprises a neural network 221 and an activation function 222. The neural network 221 preferably has an input layer, a hidden layer, and an output layer. It seems so. Furthermore, the neural network 221 will be explained in detail in Figure 4C.

[0050] The learning model 230 consists of a connected layer 231, a fully connected layer 232, and a fully connected layer 233. It has a neural network. The connected layer 231 is a multimodal neural network. It has a face. In Figure 1, the bonded layer 231 has a first feature quantity generated from the process list and , a second feature quantity generated from the electrical characteristics of the transistor generated by the process list and The data is combined to generate output data to be provided to the fully connected layer 232.

[0051] The fully coupled layer 233 has electrical characteristics (for example, drain current) at output terminals OUT_1 to OUT_w. Outputs the predicted value of the flow. The values ​​of the variables in equation (1) or equation (2) described above are output at the output terminal. This corresponds to child OUT_1 through OUT_w. Note that a different example is a semiconductor element with a resistor or In the case of capacitance, the value of the variable output by the fully coupled layer 233 is the formula for calculating the resistance or capacitance. It is preferable to use a formula to calculate the magnitude of w. Note that w is an integer greater than or equal to 1.

[0052] Figures 2A to 2D are tables illustrating the process list provided to the learning model 210. .

[0053] Figure 2A is a table that explains the smallest unit of process items included in the process list. The list consists of multiple process items. The process items include process ID, equipment ID, and It is configured by the settings and conditions of the device. Note that although not shown in Figure 2A, You may also describe which part of the transistor each process item forms. Process List Examples of process items included are process ID, equipment ID, conditions, and formation location. This can be achieved. Possible formation sites include oxide films and electrodes (gate, source, or drain, etc.). These include semiconductor layers, etc. In the actual semiconductor device formation process, further steps include contact formation, It involves multiple steps, such as forming the wiring.

[0054] Figure 2B is a table illustrating the process items of a semiconductor device as an example. The process ID is: Film process, cleaning process, resist coating process, exposure process, development process, processing process 1, processing process 2, These include baking, delamination, and doping processes. The equipment ID corresponds to each process. It is preferable that the device to be used is assigned. The setting conditions for the device are as follows: It is preferable that this is an item set on the equipment used in the process. If D is different, each device may be given different device configuration conditions.

[0055] The equipment ID used in the process can be set as follows. For example, for the film deposition process: C VD1, Washing process: WAS1, Resist coating process: REG1, Exposure process: PAT1, Development Process: DEV1, Processing Process 1: ETC1, Processing Process 2: CMP1, Bake Process: OVN1 The process ID is represented as PER1 for the peeling process, DOP1 for the doping process, etc. The process ID is the same as the equipment ID. It is preferable that the process ID be managed in association with the equipment ID. It can be represented by two codes. For example, if the process ID is the film deposition process and the equipment ID is CV For D1, the code will be 0011. However, the assigned code must be a unique number. It is managed by [this method]. Furthermore, the conditions set for each device have multiple setting items. In Figure 2B, j, k, m, n, p, r, s, t, u, and v are integers greater than or equal to 1. be.

[0056] Figure 2C shows that even for the same process item, the code changes if different equipment is used. This is a table that explains the process. For example, even if the process ID is the same film deposition process, the equipment used will differ. This method involves deposition using chemical vapor deposition, and deposition using sputtering (equipment ID: SPT1). There is a method for this. Furthermore, even with chemical vapor deposition, plasma can be used for deposition. The apparatus (apparatus ID: CVD1), or the apparatus that uses heat to deposit films (apparatus ID: CVD2) There are also cases where, as a different example, when there are multiple identical devices, each device may have different properties. You may use code. For example, in a factory, there are multiple devices that use plasma to deposit films. In such cases, even if the devices have the same function, the quality of the film that is deposited may differ. It is necessary to manage the production unit. For example, the electrical characteristics of a transistor are recorded in the process list. It may be affected by the location ID.

[0057] Figure 2D is a table that describes the process items included in the process list provided to the learning model 210. As an example, code:0011, which represents the film deposition process, will be explained. Code:0011 This means process ID: film deposition process, equipment ID: CVD1. Also, as shown in Figure 2C The film deposition conditions given for code:0011 are film thickness, temperature, pressure, power, gas 1, and This includes the flow rate of gas 1, etc. To explain in detail, the film deposition strips given in code:0011 The specifications are: film thickness: 5nm, temperature: 500℃, pressure: 200Pa, power: 150W, gas 1:S iH and the flow rate of gas 1 are 2000 sccm. Note that this can be set as a process item. It is preferable that the conditions can be set differently depending on the device.

[0058] Figures 3A and 3B illustrate a portion of the process list. Figure 3C shows the complete process list. This is a diagram illustrating a learning neural network.

[0059] As an example, Figure 3A shows the process of processing the film formed by the film deposition process. This will be explained using a portion of the process list. First, the film specified in the film deposition process is deposited. For simplicity of explanation, details regarding film deposition conditions will be omitted. Note that the equipment used in the film deposition process will not be described. The device ID is CVD1, starting from code: 0011. Further details will be explained below. In the process, refer to the drawings (Figure 2B, etc.), and the explanation of the conditions for each process will be omitted. do.

[0060] Next, in the resist coating process, a photoresist is coated onto the formed film. Next, in the exposure process, the mask pattern of the film is transferred to the photoresist. Then, development In the process, photoresist other than the transferred mask pattern is removed with a developer, and the photoresist is then removed. The mask pattern of the photoresist is formed. The development process includes a step of firing the photoresist. It may include the following. Next, in processing step 1, a mask pattern is formed on the photoresist. The film is processed using [a specific method]. Next, in the peeling step, the photoresist is peeled off.

[0061] Unlike Figure 3A, Figure 3B shows an additional cleaning step after the film formation step, and a base coat after the peeling step. A cleaning step has been added. For example, a cleaning step is added after the film formation process. Removal of impurities remaining on the formed film, or making the surface of the film uniform. In addition, by adding a bake process after the peeling process, a residue remains on the processed film. Removal of retained impurities (organic solvents, water, etc.) or by baking the film The film properties can be changed by promoting the reaction of the elements contained within. This increases the density of the membrane, making the membrane material firmer.

[0062] Figure 3B shows that a different process is added compared to Figure 3A, resulting in a different film being deposited during the film deposition process. It has characteristics. Therefore, the process list is the power of the transistor produced by the process list. It affects the air characteristics.

[0063] Figure 3C is a diagram illustrating a learning model 210 that learns using a process list as training data. The learning model 210 uses neural network 211 and neural network 21 It has 2.

[0064] The neural network 211 is given process items in process order according to the process list. As shown in Figure 2D, process items are assigned a single code that includes both the process and the name of the equipment used in the process. It can be obtained. Each code is given multiple conditions to be set on the device to be used. Each condition is given as a number or a number with a unit attached. Even if network 211 is given a file in which multiple process items are listed in process order, good.

[0065] For example, neural network 211 uses Word2Vec (W2V) It is preferable to vectorize the process items. Note that to vectorize text data... , Word2VecGloVe( Global Vectors for Word You can use Representation, Bag-of-words, etc. Vectorizing text data can be rephrased as converting it into a distributed representation. Furthermore, distributed representation can be rephrased as embedding representation (feature vector or embedding vector). It is possible.

[0066] In one aspect of the present invention, the conditions of the process items are treated as a set of words, not as a sentence. It is preferable to treat the process list as a set of words. For example, a neural network Workpiece 211 has an input layer 211a, a hidden layer 211b, and a hidden layer 211c. The neural network 211 outputs feature vectors generated from the process list. The feature vector can output multiple values, or it may be aggregated into a single value. The following section will discuss the case where neural network 211 outputs multiple feature vectors. To illuminate. Note that the hidden layer may have one or more hidden layers.

[0067] Next, neural network 212 is generated by neural network 211. Given multiple feature vectors, the neural network 212 uses DAN(D It is preferable to use an eep Averageing Network. The neural network 212 consists of an AGGREGATE layer 212a and a fully connected layer 212b. , and has a fully connected layer 212c. The AGGREGATE layer 212a is a neural network The multiple feature vectors output by twerk211 can be handled together.

[0068] The fully connected layers 212b and 212c use the sigmoid function as their activation function. Step function, or ramp function (Rectifield Linear Unit), etc. It is preferable to have a nonlinear activation function. A nonlinear function is used to feature complex training data. It is effective for refactoring. Therefore, the neural network 212 processes the process list. The feature vectors of the constituent process items can be averaged and aggregated into a single feature vector. The aggregated feature vectors are given to the learning model 230. Note that the fully connected layer is 1 There may be layers or multiple layers.

[0069] Figure 4A or Figure 4B is generated by the process list used by the learning model 210 for learning. This is a diagram illustrating the electrical characteristics of a transistor. Figure 4C shows the electrical characteristics of a transistor. This is a diagram illustrating a learning neural network.

[0070] Figure 4A shows the Id-Vds characteristics used to evaluate the saturation characteristics of a transistor. The Id-Vds characteristic is measured at the gate terminal, drain terminal, and source of the transistor. This indicates the current flowing through the drain terminal when a voltage is applied to the terminal. In other words, the Id-Vds characteristic and Id is the value of the drain current when different voltages are applied to the drain terminal of the transistor. When a fixed potential is applied to the gate terminal of the transistor, in Figure 4A, the transistor's dre This graph plots the drain current Id when a potential A1 to A10 is applied to the input terminal. ru.

[0071] Figure 4B shows the Id-Vgs characteristic used to evaluate the linear characteristics of a transistor. The Id-Vgs characteristic is measured at the gate terminal, drain terminal, and source of the transistor. This indicates the current flowing through the drain terminal when a voltage is applied to the terminal. In other words, the Id-Vgs characteristic and This is the value of the drain current Id when different voltages are applied to the gate terminal of the transistor. When a fixed potential is applied to the drain terminal of the transistor, in Figure 4B, the gate of the transistor This figure plots the drain current Id when a potential of A1 to A10 is applied to the terminal. .

[0072] Figure 4C shows how to learn the electrical characteristics of a transistor using the data from Figure 4A or Figure 4B. This is a diagram illustrating neural network 221. As an example, a neural network 221 is the voltage Vd applied to the drain terminal of the transistor in the input layer, and the gate of the transistor. The voltage Vg applied to the source terminal and the voltage Vs applied to the source terminal of the transistor are given. Furthermore, under the conditions described above, the current Id flowing through the drain terminal of the transistor is given. It's okay.

[0073] As an example, neural network 221 has an input layer with neurons X1 to X4 The hidden layer has neurons Y1 to Y10, and the output layer has neuron Z1. Ron Z1 features vectorized electrical characteristics, and the activation function 222 outputs predicted values. The number of neurons in the hidden layer should ideally be equal to the number of plots provided as training data. It seems so. Or, the number of neurons in the hidden layer is the plot given as training data. A number is preferable to a certain number. The number of neurons in the hidden layer is the training data. If the number of plots is greater than the given number, the trained model 220 will analyze the electrical properties of the transistor in detail. It learns in this way. Furthermore, neuron Z1 has the function of activation function 222.

[0074] As an example, here's how neural network 221 learns the electrical properties of a transistor. Let me explain. First, neuron X1 receives the power supplied to the drain terminal of the transistor. When a voltage Vd is applied, neuron X2 receives the voltage Vg applied to the gate terminal of the transistor. Given, neuron X3 is given the voltage Vs applied to the source terminal of the transistor. Neuron X4 is supplied with a drain current Id flowing through the drain terminal of the transistor. At this time, the drain current Id is given as training data. The weighting coefficients of the hidden layer such that the force or the output of the activation function 222 approaches the drain current Id. The data will be updated. Note that if drain current Id is not provided as training data, the neuron will be updated. Learn to make the output of Z1 or the output of activation function 222 approach the drain current Id. ru.

[0075] Note that Figure 4C shows an example where the electrical characteristics of the transistor are given sequentially according to the plotted points. As explained above, all plot points are given to the neural network 221 simultaneously. This is also acceptable. The neural network 221 will be able to process calculations at high speed, It is effective in shortening the development period for semiconductor devices.

[0076] Furthermore, it is preferable that the learning model 220 be trained in parallel with the learning model 210. The process list given to the learning model 210 is related to the electrical characteristics given to the learning model 220. The correlation is high. Therefore, for learning to predict the electrical characteristics of a transistor, the learning model is It is effective to train both L220 and the learning model 210 in parallel.

[0077] Next, the characteristic prediction unit 120 will be explained. The characteristic prediction unit 120 will be explained with reference to Figure 1. The characteristic prediction unit 120 has a learning model 230. The learning model 230 has a coupled layer 2 31 is a neural network having fully connected layers 232 and 233. Oh, there can be one or more fully connected layers. Connected layer 231 is a different learning model (learning The feature vectors output by the training model 210 and the learning model 220 are combined, and the combined feature vector The culvert is further converted into a single feature vector. In other words, by providing a coupling layer 231, the characteristic is predicted. The measurement unit 120 is a neural network with a multimodal interface It works.

[0078] The fully coupled layer 233 outputs predicted values ​​of electrical characteristics to output terminals OUT_1 to OUT_w. Output. In one aspect of the present invention, the predicted value of the electrical characteristics, which is the output, is given by the above-mentioned equation (1). Alternatively, (2) field-effect mobility μFE, unit area capacitance Cox of the gate insulating film, channel length This corresponds to L, channel width W, or threshold voltage Vth. Furthermore, the drain voltage Vd... Alternatively, it is preferable to output the gate voltage Vg, etc. Furthermore, based on the electrical characteristics of the transistor... The calculated values ​​of each variable may be provided to the connected layer 231 as training data. (Learning model 230) The weight coefficients are updated when training data is provided.

[0079] Figure 5 illustrates a method for predicting the electrical characteristics of a semiconductor device that differs from that shown in Figure 1. 5 has a feature calculation unit 110A. The feature extraction unit 110A has a learning model 240. This differs from the feature calculation unit 110 shown in Figure 1. The learning model 240 is image data This is a neural network that learns data. The image data that the learning model 240 learns is... The data is a schematic cross-sectional view of a transistor formed by the process list or a scanning electron microscope image. These include cross-sectional images observed using a mirror (SEM).

[0080] Furthermore, the bonding layer 231A of the characteristic prediction unit 120 is a characteristic vector generated from the process list. Feature vectors generated from the electrical properties of transistors produced by the process list. , and feature vectors generated from a schematic cross-sectional diagram or an actual cross-sectional observation image are combined. Then, it generates output data to be given to the fully connected layer 232.

[0081] Figure 6A is a diagram illustrating the learning model 240 in detail. The learning model 240 is a convolutional model. It has a convolutional neural network 241 and a fully connected layer 242. The workpiece 241 has convolutional layers 241a to 241e. The number of is not limited and can be any integer greater than or equal to 1. Figure 6A shows a 5-layer convolution as an example. This shows the case with a dense layer. Fully bonded layer 242 is a fully bonded layer 242a to fully bonded layer 2 It has 42c. Therefore, the learning model 240 is CNN (Convolutional Neural Network). This can be called a Neural Network.

[0082] The feature calculation unit 110A has a learning model 240, which allows it to calculate three different feature vectors. This makes it easier to predict the electrical characteristics of semiconductor devices using this method. An example of image data to be used for training is... Figure 6B shows the transistors generated by the process list given to the learning model 210. A schematic cross-sectional view is shown. Figure 6C is generated by the process list provided to the learning model 210. This shows a cross-sectional view of a transistor. Note that this is a study of transistor cross-sectional schematics. The learning model 240 is a different learning model that learns the cross-sectional view of a transistor. You may also use [this].

[0083] As an example, Figure 6B shows the semiconductor layer, gate oxide film, and gate electrode, and also, Figure 6C shows the semiconductor layer, gate oxide film, and gate electrode corresponding to Figure 6C. In cross-sectional observation images, it is difficult to recognize the gate oxide film of transistors and other components because they are thin films. There is a possibility of misidentification. However, the schematic cross-sectional diagram is designed to recognize thin films that might otherwise be misdetected. It may be included. Therefore, by studying schematic cross-sectional diagrams, you can better understand cross-sectional observation images. It can be learned correctly. Therefore, the process list is the electrical characteristics of the transistor and practical The correlation with the cross-sectional observation image is improved. Therefore, it becomes easier to predict the electrical characteristics of semiconductor devices. .

[0084] Figures 6B and 6C show examples of transistors having a metal oxide in the semiconductor layer. Furthermore, one aspect of the present invention is a method for predicting the electrical characteristics of a semiconductor device, wherein silicon is used in the semiconductor layer. It can also be applied to transistors, or compound semiconductors or oxide semiconductors. It can also be applied to transistors that include a body. The invention is not limited to the present invention. One aspect of the present invention is a method for predicting the electrical characteristics of a semiconductor device, which includes resistance and capacitance. Quantity, diode, thermistor, gyro sensor, accelerometer, light-emitting element, or photodetector It can also be applied to children, etc.

[0085] Figure 7 illustrates a method for predicting the electrical characteristics of a semiconductor device that differs from that shown in Figure 1. In 7, there is a feature calculation unit 110B. The feature calculation unit 110B is the learning model 210 The difference is that the output updates the weight coefficients of neural network 221. By reflecting the feature vectors of the process list in the weight coefficients of the linear network 221, The neural network 221 improves the prediction of the electrical characteristics of transistors.

[0086] Figure 7 shows a method for predicting the electrical characteristics of a transistor using a method for predicting the electrical characteristics of semiconductor devices. This will be explained. Note that when predicting the electrical characteristics of a transistor, the learning model 210 is used. It is preferable that the training model 220 and the learning model 230 have already been trained. First, New The network 211 is given a list of steps for the new configuration as inference data 1. Furthermore, the neural network 221 uses the drain terminal of a transistor as inference data 2. The drain voltage applied to the child, the gate voltage applied to the gate terminal of the transistor, the transistor Provides the source voltage and other parameters to the source terminal.

[0087] The feature prediction unit 120 uses the feature vector generated by the inference data 1 and the inference data 2 Using the feature vector generated by and the variables in equation (1) or (2) described above, The value of is predicted. Furthermore, the activation function 222 outputs inference result 1 based on inference data 2. It is possible. Inference result 1 is the drain voltage applied to the drain terminal of the transistor, The gate voltage applied to the gate terminal of the transistor, the source voltage applied to the source terminal of the transistor. The drain current Id can be predicted based on voltage and other factors.

[0088] Figure 8 illustrates a different method for predicting the electrical characteristics of semiconductor devices than that shown in Figure 5. 8 has a feature calculation unit 110C. The feature calculation unit 110C calculates the output of the learning model 210. The point where force updates the weight coefficients of the neural network 221 is the feature calculation unit shown in Figure 5. It is different from 110A.

[0089] Figure 8 shows a method for predicting the electrical characteristics of a transistor using a method for predicting the electrical characteristics of semiconductor devices. This will be explained. Note that when predicting the electrical characteristics of a transistor, the learning model 210 is used. It is preferable that training model 220, training model 230, and training model 240 are already trained. First, the neural network 211 has a new configuration process as inference data 1. A list is provided. Also, neural network 221 receives a transaction as inference data 2. The drain voltage applied to the drain terminal of the transistor, and the gate voltage applied to the gate terminal of the transistor. It provides voltage, such as the source voltage applied to the source terminal of a transistor. Also, neural networks Network 241 contains a new cross-sectional schematic diagram or cross-sectional observation image as inference data 3. give.

[0090] The feature prediction unit 120 uses the feature vector generated by the inference data 1 and the inference data 2. Therefore, the feature vector generated and the feature vector generated by the inference data 3 are Using this, predict the values ​​of each variable in equation (1) or (2) described above. Also, activation function 22 2 can output inference result 1 using inference data 2. Inference result 1 is, The drain voltage applied to the drain terminal of the transistor, and the gate voltage applied to the gate terminal of the transistor. The drain voltage is predicted by the voltage, the source voltage applied to the source terminal of the transistor, etc. The flow ID can be predicted.

[0091] The fully coupled layer 233 in Figure 7 or Figure 8 supplies power to output terminals OUT_1 to OUT_w. Outputs predicted values ​​of atmospheric characteristics. As an example, in one aspect of the present invention, the above-described formula (1) or (2) Field-effect mobility μFE, unit area capacitance Cox of gate insulating film, channel length L, This corresponds to the channel width W or threshold voltage Vth.

[0092] Figure 9 is a diagram illustrating the computer on which the program runs. Computer 10 This involves accessing database 21 via the network, and remote computers. Connect 22, or remote computer 23. Computer 10 has an arithmetic unit 11 , memory 12, input / output interface 13, communication device 14, and storage 15 The computer 10 has an input / output interface 13 that connects to the display device 16a , and is electrically connected to the keyboard 16b. The computer 10 also has a communication device. The cable 14 is electrically connected to the network interface 17, and the network Interface 17 connects to database 21 and remote computers via the network. 22. It is electrically connected to a remote computer 23.

[0093] Here, networks include local area networks (LANs) and internet networks. This includes [unclear text]. Furthermore, the above network may be either wired or wireless, or both. Communication can be used via the above method. Furthermore, wireless communication can be used within the above network. In some cases, short-range communication methods such as Wi-Fi (registered trademark) and Bluetooth (registered trademark) are used. In addition, there are communication methods compliant with the third-generation mobile communication system (3G), and LTE (also known as 3.9G). Communication methods compliant with (in some cases) and communication compliant with the fourth-generation mobile communication system (4G) Various communication methods, such as means of communication or communication methods compliant with the fifth-generation mobile communication system (5G) Steps can be used.

[0094] One aspect of the present invention is a method for predicting the electrical characteristics of a semiconductor device using a computer 10. The electrical characteristics of the conductive element are predicted. The program on computer 10 is stored in memory 12. Alternatively, it is stored in storage 15. The program uses the arithmetic unit 11 to learn The program generates a display. The program displays it on the display device via the input / output interface 13. The user can input the program displayed on the display device 16a using the keyboard. From the program, learning data such as process lists, electrical characteristics, schematic cross-sectional diagrams, or cross-sectional observation images are provided. It can be given in grams. The display device 16a is determined by a method for predicting the electrical characteristics of a semiconductor element. The predicted electrical characteristics of semiconductor devices are displayed in numerical form, mathematical formulas, or graphs.

[0095] Furthermore, this program can be accessed via the network from a remote computer 22, or a remote computer 22. It can also be used with the remote computer 23. Alternatively, it can be used with database 21, remote computer 23. Memory or storage of the remote computer 22 or the remote computer 23 The program can be run on computer 10 using the program saved in [location]. Notebook computer 22 is a personal digital assistant, or tablet computer, or notebook computer. Portable devices such as computers are also acceptable. In the case of portable information terminals or other portable devices, wireless communication is required. Communication can be conducted using signals.

[0096] Therefore, one aspect of the present invention is a method for predicting the electrical characteristics of a semiconductor device using a computer. It can be provided. The method for predicting the electrical characteristics of semiconductor devices uses a process list as training data. , the electrical properties of semiconductor devices produced by the process list, or produced by the process list By providing a schematic cross-sectional diagram or cross-sectional observation image of the semiconductor device, multimodal learning is possible. It is possible to do so. Furthermore, the method for predicting the electrical characteristics of semiconductor devices can use new data as inference data. By providing a list of parameters, voltage conditions applied to semiconductor devices, a schematic cross-sectional diagram, or a cross-sectional observation image, It is possible to predict the electrical characteristics of a semiconductor device or the values ​​of variables in the equations representing those characteristics. For example... Therefore, when a new process is added to the process list, the electrical characteristics of the transistor can be easily predicted. It can be measured. Therefore, one aspect of the present invention is a method for predicting the electrical characteristics of a semiconductor device. This reduces the number of verification experiments in the development of semiconductor devices, and also allows for the use of past experiments. This information can be effectively utilized.

[0097] This embodiment can be implemented by combining parts of it as appropriate. [Explanation of Symbols]

[0098] OUT_w: Output terminal, OUT_1: Output terminal, 10: Computer, 11: Arithmetic unit, 12: Memory, 13: Input / Output Interface, 14: Communication Device, 15: Storage , 16a: Display device, 16b: Keyboard, 17: Network interface, 21 :Database, 22:Remote computer, 23:Remote computer, 110: Feature calculation unit, 110A: Feature calculation unit, 110B: Feature calculation unit, 110C: Feature calculation unit Output section, 120: Characteristic prediction section, 210: Learning model, 211: Neural network, 2 11a: Input layer, 211b: Hidden layer, 211c: Hidden layer, 212: Neural network 212a: AGGREGATE layer, 212b: fully connected layer, 212c: fully connected layer, 22 0: Learning model, 221: Neural network, 230: Learning model, 231: Coupling Layers, 231A: Connected layer, 232: Fully connected layer, 233: Fully connected layer, 240: Learning model, 2 41: Neural network, 241a: Convolutional layer, 241e: Convolutional layer, 242 :Fully connected layer, 242a: Fully connected layer, 242c: Fully connected layer

Claims

[Claim 1] A method for predicting the electrical characteristics of a semiconductor device, comprising a feature calculation unit and a characteristic prediction unit, The feature calculation unit comprises a first learning model and a second learning model, The characteristic prediction unit has a third learning model, The first learning model has a step of learning a process list for producing the semiconductor device, The second learning model has a step of learning the electrical characteristics of the semiconductor device generated by the process list, The first learning model has a step of generating a first feature, The second learning model has a step of generating a second feature, The third learning model has a step of performing multimodal learning using the first feature and the second feature, A method for predicting the electrical characteristics of a semiconductor device, wherein the third learning model has a step of outputting the values ​​of variables used in a calculation formula representing the electrical characteristics of the semiconductor device.

Citation Information

Patent Citations

  • Parameter adjusting device

    JP2005038216A