Monolithic semiconductor LED display system and device thereof

Abstract

Providing monolithic semiconductor LED display systems and devices thereof. [Solution] A monolithic semiconductor LED display system comprising a layered semiconductor material system fabricated to form multiple light-emitting switch devices. Each light-emitting switch device extends from a common substrate along different axes and includes a driver device and a light-emitting diode. Each driver device includes, in adjacent order and in series from the substrate, a first type of doped region, a second type of doped region, and another first type of doped region. Regions of the layered semiconductor material not used for the LED elements are fabricated to form circuits in two or more of the doped regions for each of the light-emitting switch devices.

Description

Technical Field

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 114,247, filed on Nov. 16, 2020, which is hereby incorporated by reference in its entirety.

[0002] Field This technology relates to monolithic semiconductor LED display systems and their devices.

Background Art

[0003] Background Generally, there are two types of display technologies, including passive matrix display technology and active matrix display technology as shown in FIG. 1. In passive matrix display technology, the anode and cathode connections of LEDs are connected to each other in rows and columns, respectively. This passive matrix display technology is the easiest display technology to implement, but due to its inability to maintain its charge state and the additional nature of current leakage in each LED element, passive matrix display technology cannot support high resolution. In active matrix display technology, transistors (FETs) and capacitors separate the LEDs from the matrix row / column lines and store the charge state for LED brightness. The fundamental element of an active matrix display device is a subpixel that includes two transistors (pass and drive) and one storage capacitor, and three subpixels constitute one pixel.

[0004] To date, in order to create micro-LEDs, and even organic LED (OLED) displays, the industry has used various material systems and methods to integrate these added transistor and / or capacitor elements and implement the desired active-matrix or passive-matrix display technology. In particular, the industry's main approach has been to fabricate transistors on glass or in silicon, and then pair these transistors with LEDs fabricated on a second substrate, as shown in Figure 2. Unfortunately, this main industry approach is time-consuming, expensive, and space-inefficient, limiting higher resolution and / or more compact display footprints. [Overview of the Initiative] [Means for solving the problem]

[0005] overview A monolithic semiconductor LED display system comprising a layered semiconductor material system fabricated to form multiple light-emitting switch devices. Each light-emitting switch device extends from a common substrate along different axes and includes a driver device and a light-emitting diode. Each driver device includes, in adjacent order and in series from the substrate, a first type of doped region, a second type of doped region, and another first type of doped region. Regions of the layered semiconductor material not used for the LED elements are fabricated for each light-emitting switch device to form circuits in two or more doped regions.

[0006] A method for manufacturing a monolithic semiconductor LED display system, comprising the steps of fabricating a layered semiconductor material system to form multiple light-emitting switch devices, and fabricating circuits in two or more doped regions within a region of the layered semiconductor material system not used for LED elements. Each light-emitting switch device extends from a common substrate along different axes and includes a driver device and a light-emitting diode. Each driver device includes, in adjacent order and in series from the substrate, a first type of doped region, a second type of doped region, and another first type of doped region.

[0007] Therefore, this technology provides a monolithic LED display system with higher resolution, a more compact display area, better performance, and reduced manufacturing costs compared to prior industry designs and methods. In this technology, the monolithic semiconductor LED display system advantageously utilizes the same layer used to form one or more light-emitting switch devices for adjacent integrated circuits. The present invention provides, for example, the following items: (Item 1) A monolithic semiconductor light-emitting diode display system, the following: A layered semiconductor material system fabricated to form a plurality of light-emitting switch devices, wherein each of the light-emitting switch devices extends from a common substrate along different axes and comprises a driver device and a light-emitting diode, and each of the driver devices comprises, in adjacent order and in series from the substrate, a first type of doped region, a second type of doped region, and another first type of doped region, the layered semiconductor material system, A region of the layered semiconductor material system that is not used to form the light-emitting switch device, is adjacent to the light-emitting switch device, and is manufactured to form a circuit for the light-emitting switch device. The system comprising the above. (Item 2) The system according to item 1, wherein the layered semiconductor material system is a layered GaN material system. (Item 3) The system according to item 1, wherein the circuits in two or more of the doped regions further comprise active matrix circuits. (Item 4) The aforementioned active matrix circuit is as follows: At least one field-effect transistor formed in two or more of the doped regions, A capacitor formed between the light-emitting switch device and the at least one field-effect transistor The system described in item 3 further includes the features described therein. (Item 5) The system according to item 1, wherein the circuits in two or more of the doped regions further comprise CMOS circuits. (Item 6) The aforementioned CMOS circuit is as follows: One or more P-MOS transistors in selected portions of the first type of doped region and the second type of doped region, One or more N-MOS transistors in the P-type region and other selected portions of the adjacent second N-type region The system described in item 5, which further includes the features described therein. (Item 7) The system according to item 1, wherein the circuits in two or more of the doped regions further comprise a passive matrix control circuit. (Item 8) A method for manufacturing a monolithic semiconductor light-emitting diode display system, comprising the following steps: A process for fabricating a layered semiconductor material system to form a plurality of light-emitting switch devices, wherein each of the light-emitting switch devices extends from a common substrate along different axes and comprises a driver device and a light-emitting diode, and each of the driver devices comprises, in adjacent order and in series from the substrate, a first type of doped region, a second type of doped region, and another first type of doped region, and the process of fabricating, and A process of fabricating circuits in two or more of the doped regions for each of the light-emitting switch devices in a region of the layered semiconductor material system that is not used for the LED element and is adjacent to the LED element. The method, including the method described above. (Item 9) The method according to item 8, wherein the layered semiconductor material system is a layered GaN material system. (Item 10) The method according to item 8, wherein the circuits in two or more of the doped regions include an active matrix control circuit. (Item 11) The active matrix circuit, At least one field-effect transistor formed in two or more of the doped regions, A capacitor formed between the light-emitting switch device and the at least one field-effect transistor The method described in item 10, further comprising: (Item 12) The method according to item 8, wherein the circuits in two or more of the doped regions further comprise CMOS circuits. (Item 13) The CMOS circuit described above, One or more P-MOS transistors in selected portions of the first type of doped region and the second type of doped region, One or more N-MOS transistors in the P-type region and other selected portions of the adjacent second N-type region The method described in item 12, further comprising: (Item 14) The method according to item 8, wherein the circuits in two or more of the doped regions further comprise a passive matrix control circuit.

Brief Description of the Drawings

[0008] [Figure 1] It is a prior art diagram of passive matrix display technology and active matrix display technology. [Figure 2] It is a prior art diagram of an LED fabricated on a second substrate. [Figure 3] It is a partial circuit diagram and a partial cross-sectional view of an example of a part of a monolithic semiconductor LED display system having a fully integrated LED. [Figure 4] ]Figure 3 shows a partial circuit diagram, a partial perspective view, and a partial exploded view of the integrated LED. [Figure 5] This is a cross-sectional view of an example of a method for manufacturing a monolithic semiconductor LED display system including one or more light-emitting switch devices and integrated circuits. [Figure 6] This is a cross-sectional view of an example of a method for manufacturing a monolithic semiconductor LED display system including one or more light-emitting switch devices and integrated circuits. [Figure 7] This is a partial cross-sectional view of an element of the control circuit in an example system using a monolithic semiconductor LED display. [Figure 8] This is a diagram of a control circuit used to drive hundreds / thousands of rows and columns of light-emitting switch devices in an exemplary monolithic semiconductor LED display system by forming a series input to a parallel output. [Modes for carrying out the invention]

[0009] Detailed explanation An example of a portion of a monolithic semiconductor LED display system 100 configured as an active matrix display technology is shown in Figure 3 (an exemplary diagram of a larger portion of the monolithic semiconductor LED display system 100 is shown in Figure 8). This exemplary portion of the monolithic semiconductor LED display system 100 includes one light-emitting switch device 102(1) and an integrated circuit 104(1). However, the monolithic semiconductor LED display system 100 may include other types and numbers of systems, devices, components, or other elements of other configurations, such as multiple light-emitting switch devices, each having an integrated control circuit, as is merely an example. The technology offers several advantages compared to prior industry designs and techniques, including providing a monolithic LED display system with higher resolution, a more compact display area, better performance, and reduced manufacturing costs. An example of the technology advantageously utilizes the same layer used to form one or more light-emitting switch devices for adjacent integrated control circuits.

[0010] In this example, each of the light-emitting switch devices 102(1) to 102(n) shown in Figures 3 to 8 (also referred to herein as vertical LED / FETs; however, other orientations may also be used) extends along an axis from the surface of a substrate such as a sapphire wafer, for example only. For ease of illustration and description, one of the light-emitting switch devices 102(1) and the corresponding one of the integrated circuits 104(1) are illustrated and described in more detail herein. In this example, other light-emitting switch devices 102(2) to 102(n) and other corresponding integrated circuits 104(2) to 104(n) of the monolithic semiconductor LED display system 100 have the same structure and operation as one of the light-emitting switch devices 102(1) and the corresponding one of the integrated circuits 104(1). However, in other examples, one or more of the other light-emitting switch devices and / or integrated circuits may include other components or other elements of a different configuration.

[0011] Referring more closely to Figures 3 and 4, in this example, one of the light-emitting switch devices 102(1) includes a light-emitting diode 118, a driving field-effect transistor (FET) 114, or other device driver. However, the light-emitting switch device may include other types and / or numbers of other components and / or other elements of other configurations. Furthermore, in this example, as illustrated and described as an example in U.S. Patent No. 11,011,571, which is incorporated herein by reference in its entirety, the light-emitting diode 118 is powered by a power supply V dd 120 and the drive FET 114 are connected in series, and the drive FET 114 is also connected in series to ground to control the operating state of the light-emitting diode 118.

[0012] Other types of drivers or switches may be used, but the driver FET 114 or other device is coupled to control the operating state of the LED 118, i.e., the on or off state in this example. Each subpixel 105(1) to 105(n) includes one of the light-emitting switch devices 102(1) to 102(n), the corresponding integrated circuit 104(1) to 104(n), and a capacitor 112, shown as an example in the larger part of Figure 8, and can have a brightness modulated by the driver FET 114 or the corresponding device driver.

[0013] In this example, the driver FET 114 includes an n-type GaN layer 122 located on the surface of the substrate 121. This layer of the driver FET 114 is the electron-rich source region of the FET, grown or otherwise formed on the substrate 121. However, other types of source regions, such as (u-GaN) or p-GaN, which are doped unintentionally, may also be used.

[0014] Next, the driving FET 114 or other device driver has a p-type GaN layer 124 of the FET 114 located on the n-type GaN layer 122 described above. This p-type GaN layer 124 is an electron-deficient channel region of the FET 114, grown or otherwise formed on the n-type GaN layer 122. However, other types of channel regions such as u-GaN or n-GaN may also be used.

[0015] Next, the driving FET 114 or other device driver has an n-type GaN layer 126 of the FET formed on the p-type GaN layer 124 described above. This n-type GaN layer 126 is the electron-rich drain region of the FET 114, grown on or otherwise formed on the p-type GaN layer 124. However, other types of drain regions or charge collection regions, such as a p-type GaN layer, may also be used. As shown in Figures 3-4, these etched layers of the FET extend from the surface of the substrate along the vertical axis AA.

[0016] Next is the LED 118 of one of the light-emitting switch devices 102(1), which extends coaxially from the surface of the substrate 121, above the driver FET 114. In this example, the n-type GaN layer 126 of the drain region or charge collection region of the driver FET 114 is advantageously shared with the LED 118 and serves as an electron-rich region of the LED 118. Furthermore, although other configurations may be used, as described above, the LED 118 and the driver FET 114 are constructed to extend from the surface of the substrate along a single axis AA, respectively, allowing for a much more compact and narrower design and enabling a denser spacing of the light-emitting switch devices 102-102(n) to achieve much higher resolution.

[0017] Next, other types of layers and / or wells, as well as other barriers, may be used, but LED118 has a layer 128 that includes, for example, an InGaN or AlGaN quantum well for LEDs that efficiently generates light, and multiple quantum wells (MQW) with GaN or AlGaN barriers. More specifically, in this example, the light emitted from LED118 utilizes this layer 128, which includes MQW regions where layers of indium gallium nitride (InGaN) or aluminum gallium nitride (AlGaN) are confined between GaN or AlGaN layers to trap electron-hole pairs for light generation. In other examples, one or more other layers of material that modifies spectral emission may be used. As a further example, one or more additional layers may include a color converter.

[0018] Next, although other types of layers may be used, the LED 118 has a p-GaN layer 130 formed on layer 128 which has an MQW region. This p-GaN layer 130 and shared n-GaN layer 126, with layer 128 containing a multiple quantum well (MQW) region, completes this example of LED 118 for one of the light-emitting switch devices 102(1). However, the LED may have other types and / or numbers of other layers and / or elements. Thus, in this example, the LED 118 and the driver FET 114 are connected in series with the shared layer 126 and the driver FET 114, allowing the LED 118 to be switched between an "on" operating state and an "off" operating state, and this light-emitting switch device 102 can be repeated in multiple other light-emitting switch devices 102(1) to 102(n) through the monolithic semiconductor LED display system 100.

[0019] On the other hand, this design of the exemplary light-emitting switch device 102(1) extending along axis AA from the surface of the substrate 121 allows circuit 104(1) to also be advantageously formed adjacent to the exemplary light-emitting switch device 102(2) to 102(n) and the corresponding circuits 104(2) to 104(n), and can utilize the same portion of the same layer used for one of the driver FETs 114 and LED 118 of the light-emitting switch device 102(1). For ease of illustration and description, circuit 104(1) for one of the light-emitting switch devices 102(1) is illustrated and described in more detail herein.

[0020] In this example, other types of circuits, such as those for passive matrix display technology, may be used, but circuit 104(1) for one of the light-emitting switch devices 102(1) implements active matrix display technology. Furthermore, in this example, circuits 104(1) to 104(n) for other light-emitting switch devices 102(1) to 102(n) of other monolithic semiconductor LED display systems 100 have the same elements, configuration, and operation as circuit 104(1) for one of the light-emitting switch devices 102(1). However, in other examples, one or more of circuits 104(1) to 104(n) for their correspondings in the light-emitting switch devices 102(1) to 102(n) may include other components or other elements of other configurations. The etched space between the exemplary light-emitting switch device 102(1) and the planar FET 110 may be optionally filled with dielectric and metal to form a capacitor 112. Furthermore, in different examples illustrated and described herein, the planar FET may include planar FET 110, which is a planar FET used in the active matrix circuit 104(1), and in other examples, “planar FET” may also refer to an external planar FET of a display device used to manufacture a control circuit as shown in Figure 7, in the illustrated examples, the NMOS FET is called planar FET 136 and the PMOS FET is called planar FET 140.

[0021] Therefore, as shown in the examples in Figures 3 and 6, the circuit 104(1) includes a planar FET 110 having a source, gate, and drain coupled to the gate of the drive FET 114, along with a capacitor 112 coupled between the gate and source of the drive FET 114. However, the circuit may include other types and / or numbers of components or other configuration elements.

[0022] As shown in the example above, the n-GaN layer 126 shared by FET 114 and LED 118 can be etched to be adjacent to but separated from one of the light-emitting switch devices 102(1) to form the source and drain of the planar FET 110. As shown in Figure 7, the n-GaN layer 126 shared by FET 114 and LED 118 can also be etched to be separated from the active matrix circuit 104(1) to form the source and drain of the planar FET 136 as part of an additional control circuit 107(1) shown in Figure 8, which is coupled to one of the light-emitting switch devices 102(1) and the corresponding one 104(1) of the circuit. Similar additional control circuits can be coupled to each of the other light-emitting switch devices 102(2)~102(n) and the corresponding ones of the circuits 104(1)~104(n). Furthermore, in this example, the p-type GaN layer 124, which forms an electron-deficient channel region for the driver FET 114 or other devices, may be etched adjacent to but separated from one of the light-emitting switch devices 102(1) to form the channel region of the planar FET 110. Similarly, the p-type layer 124 may be etched adjacent to but separated from circuit 104(1), which is an active matrix circuit in this example, to form the channel region of the planar FET 136 for part of the control circuit 107(1), or the source and drain of the planar FET 140.

[0023] Conductive contacts 132 and 134 may be coupled as needed to the exemplary light-emitting switch device 102(1), planar FET 136, and planar FET 140 for both operation and routing. Other types of configurations may be used for the contacts, but in this example, conductive contact 132 may be formed on the p-type GaN layer 130 of the LED 118 and on the p-type layer 124 of the planar FET 140. Conductive contact 134 may be formed on the n-type GaN 126 of the planar FET 136 and the n-type GaN 122 of the monolithic semiconductor LED display system 100 for both operation and routing. Subsequent formation of gate capacitors may be carried out in the region between the contacts of both the planar FET 136 and the planar FET 140. Therefore, in order to form an effective and compact monolithic semiconductor LED display system 100, the deposition and etching of each layer 122, 124, 126, 128, and / or 130 in this monolithic semiconductor LED display system 100 results in exemplary circuits for control circuits such as integrated circuits 104(1) to 104(n) and exemplary control circuits 107(1), as well as one of the light-emitting switch devices 102(1) to 102(n), etc.

[0024] As a result, in this example, the exemplary light-emitting switch device 102(1), as well as the planar FET 110 and capacitor 112 for the active matrix circuit 104(1) and control circuit 107(1) (although other types of circuits may also be formed in these layers), can be advantageously formed from the same material, such as GaN-based material, in the monolithic display system structure 100 (Figure 8), thereby reducing the number of materials required for manufacturing and consequently providing efficiency. Furthermore, this design eliminates previous errors that may arise from, for example, manufacturing the active matrix circuit 104(1) and / or control circuit 107(1) separately and then attempting to pair them with the LED 118. Moreover, in this example, the monolithic semiconductor LED display system 100 of Figure 8 can have high density and consequently high resolution due to the multiple light-emitting switch devices 102(1), along with the spatially efficient integration of the control circuits for each in the monolithic semiconductor LED display system 100.

[0025] Referring to Figures 5 and 6, an example of a method for manufacturing this example of an active matrix LED display system 100, which includes one of the light-emitting switch devices 102(1) and the corresponding integrated circuit 104(1). In this example, the other light-emitting switch devices 102(1) and the corresponding active matrix integrated circuit 104(1) for each can be manufactured in the same manner. However, in other examples, one or more other manufacturing methods may be used.

[0026] First, a portion of the unetched stack of the active-matrix semiconductor LED display system 100 is shown in Figure 5. Before etching, the stack in this example includes an n-type GaN layer 122, a p-type GaN layer 124, a shared n-type GaN layer 126, a layer having an MQW region 128, and a p-type GaN layer 130 on the surface of a substrate (not shown in Figure 5). However, the stack may also include other layers and / or conductive contacts of other types and / or numbers as shown in other examples herein.

[0027] As shown in the present example in Figure 6, layers 122, 124, 126, 128, and 130 of this stack for a portion of the active matrix semiconductor LED display system 100 can be etched to form an exemplary light-emitting switch device 102(1) extending axially from the surface of the substrate, and to form adjacent and spaced-apart circuits 104(1) further including a capacitor 112 and a planar FET 110, which will be described in more detail with respect to Figures 3 and 4.

[0028] Referring to Figure 7, apart from the active matrix element 104(1), an additional control circuit 107(1) can also be fabricated in these same layers for controlling the light-emitting switch device 102(1), and similarly, throughout the exemplary system 100 for other light-emitting switch devices 102(2) to 102(n). Additional planar FETs 136 and 140 can be selectively etched into the same exemplary first stack of layers 122, 124, 126, 128, and 130 shown in Figure 5, and are shown. In particular, the same layers utilized by the planar FET 110 and light-emitting switch device 102 for the active matrix circuit 100 shown in Figure 3 can be further selectively etched and patterned with the adjacent p-type layer 124 together with the n-type layer 122 to create the planar FET 140, as shown on the right side of Figure 7. In this example in Figure 7, the N-MOS 136 transistor and the P-MOS transistor 140 are coupled in series (as schematically shown on the right side of Figure 7) to form a CMOS inverter for, for example, the elements of the control circuit 107(1). However, these layers can be advantageously etched for other types of control circuits.

[0029] Referring to Figure 8, an example of a display control circuit 107(1) and other control circuits for other light-emitting switch devices is shown, which receive a serial input and generate parallel outputs to drive hundreds / thousands of rows and columns of active matrix circuits 104(1)-104(n) for light-emitting switch devices 102(1)-102(n). In this example, the additional control circuits shown by the example with control circuit 107(1) in Figure 7 include shift register circuits 142(1) and 142(2) and latches 144(1) and 144(2) used to manage signals to be transmitted to the active matrix circuits 104(1)-104(n) that form each subpixel 105(1)-105(n). In this example, the present technology would result in each outlined subpixel 105(1)–105(n) having a circuit including one of the active matrix control circuits 104(1)–104(n), which are integrated within layers 122, 124, 126, 128, and 130 as described above, and are illustrated and described with respect to Figures 3–6 as an example. Conventionally, each element of these circuits 104(1)–104(n), and each of the control circuits shown by the exemplary control circuit 107(1), would be a separate material system and would be connected either by ribbon cables to the PCB or by bonding silicon chips to the display itself, which would become incredibly cumbersome with high-resolution displays using thousands of external contacts. However, in this exemplary technique, where planar transistors are advantageously integrated within the same layers 122, 124, 126, 128, and 130 used to form each of the light-emitting switch devices 102(1) to 102(n), such as light-emitting switch device 102(1), the number of external off-chip connections is dramatically reduced.

[0030] Accordingly, as illustrated and described herein by example, the present technology provides a monolithic LED display system 100 with higher resolution, a more compact display area, better performance, and reduced manufacturing costs compared to prior industry designs and techniques. Furthermore, as illustrated by the present technology, the monolithic semiconductor LED display system 100 advantageously utilizes the same layer used to form one or more light-emitting switch devices 102(1) for adjacent integrated control circuits 104(1) and 107(1).

[0031] Having thus described the basic concepts of this technology, it will be rather apparent to those skilled in the art that the detailed disclosures described above are intended merely as examples and are not limited thereto. Various changes, improvements, and modifications will occur and are contemplated for those skilled in the art, although they are not expressly stated herein. These changes, improvements, and modifications are intended to be suggested herein and fall within the spirit and scope of this technology. Therefore, in addition, the order in which processing elements or processing sequences are described, or the use of numbers, letters, or other names, is not intended to limit the claimed process to any particular order, except as specified in the claims. Thus, this technology is limited only by the appended claims and their equivalents.

Claims

[Claim 1] The invention described herein.

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