Semiconductor equipment

Abstract

To provide a semiconductor device that can improve reliability. [Solution] The semiconductor device 1 includes a chip 2 having a first main surface 5 on one side and a second main surface 6 on the other side, an active surface 8 set in the inner part of the first main surface 5, and an outer surface 9 set in the peripheral edge of the first main surface 5; a functional device formed on the active surface 8 side; a mesa portion 21 formed on the outer surface 9, which is part of the chip 2 and protrudes toward the opposite side from the second main surface 6; a first inorganic film 26 covering at least a part of the mesa portion 21; a second inorganic film 29 covering at least a part of the first inorganic film 26 and forming a protruding structure 20A together with the mesa portion 21 and the first inorganic film 26; and an organic film 33 covering at least the second inorganic film 29.

Description

Technical Field

[0001] This application corresponds to Japanese Patent Application No. 2020-196698 filed with the Japan Patent Office on November 27, 2020, and the entire disclosure of this application is incorporated herein by reference. The present invention relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device including a semiconductor substrate, an interlayer insulating layer, an electrode, an inorganic protective layer, and an organic protective layer. The interlayer insulating layer covers the semiconductor substrate. The electrode covers the semiconductor substrate and the interlayer insulating layer. The inorganic protective layer covers the electrode and the interlayer insulating layer. The organic protective layer covers the inorganic protective layer, the electrode, and the interlayer insulating layer.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] One embodiment of the present invention provides a semiconductor device with improved reliability.

Means for Solving the Problems

[0005] One embodiment of the present invention provides a semiconductor device including a chip having a first main surface on one side and a second main surface on the other side, an active surface set in an inner part of the first main surface, and an outer surface set in a peripheral part of the first main surface, a functional device formed on the active surface side, a protruding structure containing an inorganic substance and protruding on the outer surface side, and an organic film covering the protruding structure.

[0006] The aforementioned or any other objectives, features, and effects will be made clearer by the following description of embodiments with reference to the accompanying drawings. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1 is a plan view showing a SiC semiconductor device according to a first embodiment of the present invention. [Figure 2] Figure 2 is a plan view showing the internal structure of the SiC semiconductor device. [Figure 3] Figure 3 is a cross-sectional view taken along the line III-III shown in Figure 2. [Figure 4] Figure 4 is an enlarged cross-sectional view showing the first protruding structure according to the first embodiment. [Figure 5A] Figure 5A is an enlarged cross-sectional view showing the first protruding structure according to the second embodiment. [Figure 5B] Figure 5B is an enlarged cross-sectional view showing the first protruding structure according to the third embodiment. [Figure 5C] Figure 5C is an enlarged cross-sectional view showing the first protruding structure according to the fourth embodiment. [Figure 6] Figure 6 is an enlarged cross-sectional view corresponding to Figure 4, showing a SiC semiconductor device according to a second embodiment of the present invention together with the second protruding structure according to the first embodiment. [Figure 7A] Figure 7A is an enlarged cross-sectional view showing the second protruding structure according to the second embodiment. [Figure 7B] Figure 7B is an enlarged cross-sectional view showing the second protruding structure according to the third embodiment. [Figure 7C] Figure 7C is an enlarged cross-sectional view showing the second protruding structure according to the fourth embodiment. [Figure 7D] Figure 7D is an enlarged cross-sectional view showing the second protruding structure according to the fifth embodiment. [Figure 8] Figure 8 is an enlarged cross-sectional view corresponding to Figure 4, showing a SiC semiconductor device according to a third embodiment of the present invention together with a third protruding structure according to the first embodiment. [Figure 9A] Figure 9A is an enlarged cross-sectional view showing the third protruding structure according to the second embodiment. [Figure 9B]FIG. 9B is an enlarged cross-sectional view showing a third protruding structure according to the third exemplary form. [Figure 9C] FIG. 9C is an enlarged cross-sectional view showing a third protruding structure according to the fourth exemplary form. [Figure 9D] FIG. 9D is an enlarged cross-sectional view showing a third protruding structure according to the fifth exemplary form. [Figure 9E] FIG. 9E is an enlarged cross-sectional view showing a third protruding structure according to the sixth exemplary form. [Figure 9F] FIG. 9F is an enlarged cross-sectional view showing a third protruding structure according to the seventh exemplary form. [Figure 9G] FIG. 9G is an enlarged cross-sectional view showing a third protruding structure according to the eighth exemplary form. [Figure 9H] FIG. 9H is an enlarged cross-sectional view showing a third protruding structure according to the ninth exemplary form. [Figure 9I] FIG. 9I is an enlarged cross-sectional view showing a third protruding structure according to the tenth exemplary form. [Figure 9J] FIG. 9J is an enlarged cross-sectional view showing a third protruding structure according to the eleventh exemplary form. [Figure 9K] FIG. 9K is an enlarged cross-sectional view showing a third protruding structure according to the twelfth exemplary form. [Figure 10] FIG. 10 corresponds to FIG. 4 and is an enlarged cross-sectional view showing a SiC semiconductor device according to the fourth embodiment of the present invention together with a fourth protruding structure according to the first exemplary form. [Figure 11A] FIG. 11A is an enlarged cross-sectional view showing a fourth protruding structure according to the second exemplary form. [Figure 11B] FIG. 11B is an enlarged cross-sectional view showing a fourth protruding structure according to the third exemplary form. [Figure 11C] FIG. 11C is an enlarged cross-sectional view showing a fourth protruding structure according to the fourth exemplary form. [Figure 12] FIG. 12 corresponds to FIG. 4 and is an enlarged cross-sectional view showing a SiC semiconductor device according to the fifth embodiment of the present invention together with a fifth protruding structure according to the first exemplary form. [Figure 13A] FIG. 13A is an enlarged cross-sectional view showing a fifth protruding structure according to the second exemplary form. [Figure 13B]Figure 13B is an enlarged cross-sectional view showing the fifth protruding structure according to the third embodiment. [Figure 13C] Figure 13C is an enlarged cross-sectional view showing the fifth protruding structure according to the fourth embodiment. [Figure 14] Figure 14 is a plan view illustrating an example of a configuration in which a SiC-MISFET is applied as a functional device in the first to fifth embodiments. [Figure 15] Figure 15 is a cross-sectional view along the line XV-XV shown in Figure 14. [Figure 16A] Figure 16A is a cross-sectional view showing the cross-sectional structure along the line XVI-XVI shown in Figure 15, along with the third protruding structure. [Figure 16B] Figure 16B is a cross-sectional view showing the cross-sectional structure along the line XVI-XVI shown in Figure 15, along with the fifth protruding structure. [Modes for carrying out the invention]

[0008] Figure 1 is a plan view showing a SiC semiconductor device 1 according to a first embodiment of the present invention. Figure 2 is a plan view showing the internal structure of the SiC semiconductor device 1. Figure 3 is a cross-sectional view taken along the line III-III shown in Figure 2. Figure 4 is an enlarged cross-sectional view showing the first protruding structure 20A according to the first embodiment.

[0009] Referring to Figures 1 to 4, the SiC semiconductor device 1 in this embodiment is an electronic component that includes a SiC chip 2 (chip / semiconductor chip) made of a hexagonal SiC (silicon carbide) single crystal. Hexagonal SiC single crystals have multiple polytypes, including 2H (Hexagonal)-SiC single crystals, 4H-SiC single crystals, 6H-SiC single crystals, etc. In this embodiment, an example is shown in which the SiC chip 2 is made of a 4H-SiC single crystal, but this does not exclude other polytypes.

[0010] The SiC chip 2 is formed in a rectangular parallelepiped shape. In this embodiment, the SiC chip 2 has a laminated structure including a SiC substrate 3 (semiconductor substrate) and a SiC epitaxial layer 4 (epitaxial layer). The SiC epitaxial layer 4 has an impurity concentration different from that of the SiC substrate 3. Preferably, the SiC epitaxial layer 4 has an impurity concentration lower than that of the SiC substrate 3.

[0011] The thickness of the SiC substrate 3 may be 5 μm or more and 300 μm or less. Preferably, the thickness of the SiC substrate 3 is 50 μm or more and 250 μm or less. Preferably, the SiC epitaxial layer 4 has a thickness less than the thickness of the SiC substrate 3. The thickness of the SiC epitaxial layer 4 may be 1 μm or more and 50 μm or less. Preferably, the thickness of the SiC epitaxial layer 4 is 5 μm or more and 20 μm or less.

[0012] The SiC chip 2 has a first main surface 5 on one side, a second main surface 6 on the other side, and first to fourth side surfaces 7A to 7D connecting the first main surface 5 and the second main surface 6. The first main surface 5 is formed by a SiC epitaxial layer 4, the second main surface 6 is formed by a SiC substrate 3, and the first to fourth side surfaces 7A to 7D are formed by the SiC substrate 3 and the SiC epitaxial layer 4. The first main surface 5 is the device surface on which a functional device is formed, and the second main surface 6 is the non-device surface on which no functional device is formed.

[0013] The first principal surface 5 and the second principal surface 6 are formed in a quadrilateral shape in a plan view (hereinafter simply referred to as "plan view") as seen from their normal direction Z. The first principal surface 5 and the second principal surface 6 may be formed in a square or rectangular shape in a plan view. The first principal surface 5 and the second principal surface 6 face the c-face of the SiC single crystal, respectively. Preferably, the first principal surface 5 is formed by the silicon face of the SiC single crystal, and the second principal surface 6 is formed by the carbon face of the SiC single crystal.

[0014] The first principal surface 5 and the second principal surface 6 may have an off-angle that is inclined at a predetermined angle in a predetermined off-direction with respect to the c-plane. The off-direction is preferably the a-axis direction ([11-20] direction) of the SiC single crystal. The off-angle may be greater than 0° and less than or equal to 10°. The off-angle is preferably 5° or less. The off-angle is particularly preferably 2° or more and less than or equal to 4.5°.

[0015] The first side surface 7A and the second side surface 7B extend in a first direction X along the first main surface 5 and face a second direction Y that intersects (specifically orthogonal to) the first direction X. The third side surface 7C and the fourth side surface 7D extend in a second direction Y and face a first direction X. In this configuration, the first direction X is the m-axis direction ([1-100] direction) of the SiC single crystal, and the second direction Y is the a-axis direction ([11-20] direction) of the SiC single crystal. That is, the first side surface 7A and the second side surface 7B are formed by the a-plane of the SiC single crystal, and the third side surface 7C and the fourth side surface 7D are formed by the m-plane of the SiC single crystal. The first to fourth side surfaces 7A to 7D form the periphery of the first main surface 5 and the periphery of the second main surface 6, respectively.

[0016] The first main surface 5 has an active surface 8, an outside surface 9, and first to fourth connecting surfaces 10A to 10D. The active surface 8, the outside surface 9, and the first to fourth connecting surfaces 10A to 10D demarcate an active mesa 11 on the first main surface 5. The active surface 8 may be referred to as the "first surface," the outside surface 9 as the "second surface" or "peripheral surface," and the active mesa 11 may be referred to as the "mesa."

[0017] The active surface 8 is formed with a gap inward from the periphery (first to fourth side surfaces 7A to 7D) of the first main surface 5. The active surface 8 has a flat surface extending in the first direction X and the second direction Y, exposing the SiC epitaxial layer 4. In other words, the active surface 8 has an off-angle corresponding to the first main surface 5. In a plan view, the active surface 8 is formed in a quadrilateral shape with four sides parallel to the periphery of the first main surface 5. In this configuration, the corners of the active surface 8 are formed in a curved shape toward the periphery of the first main surface 5. Therefore, in this configuration, the active surface 8 is formed in a quadrilateral shape with curved corners in a plan view.

[0018] The outer surface 9 is located outside the active surface 8 and is recessed from the active surface 8 in the thickness direction of the SiC chip 2 (towards the second main surface 6). Specifically, the outer surface 9 is recessed to a depth less than the thickness of the SiC epitaxial layer 4. In other words, the outer surface 9 is located on the second main surface 6 side relative to the active surface 8 and exposes the SiC epitaxial layer 4. In a plan view, the outer surface 9 is formed in a band shape extending along the active surface 8. Specifically, in a plan view, the outer surface 9 is formed in an annular shape (specifically, a square annular shape) surrounding the active surface 8.

[0019] The outer surface 9 has a flat surface extending in the first direction X and the second direction Y, and is formed substantially parallel to the active surface 8. In other words, the outer surface 9 has an off-angle corresponding to the first main surface 5. The outer surface 9 is in communication with the first to fourth sides 7A to 7D. The outer surface 9 is recessed from the active surface 8 in the thickness direction of the SiC chip 2 (towards the second main surface 6) with a recess depth DO. The recess depth DO may be 0.1 μm or more and 10 μm or less. The recess depth DO is preferably 5 μm or less. The recess depth DO is particularly preferably 2.5 μm or less.

[0020] The first to fourth connecting surfaces 10A to 10D extend in the normal direction Z and connect the active surface 8 and the outer surface 9. The first connecting surface 10A is located on the side of the first surface 7A, the second connecting surface 10B is located on the side of the second surface 7B, the third connecting surface 10C is located on the side of the third surface 7C, and the fourth connecting surface 10D is located on the side of the fourth surface 7D. The first connecting surfaces 10A and 10B extend in the first direction X and face the second direction Y. The third connecting surface 10C and 10D extend in the second direction Y and face the first direction X. The first connecting surfaces 10A and 10B face the a-plane of the SiC single crystal, and the third connecting surface 10C and 10D face the m-plane of the SiC single crystal. The first to fourth connection surfaces 10A to 10D expose the SiC epitaxial layer 4.

[0021] The first to fourth connecting surfaces 10A to 10D may be formed substantially perpendicular to the active surface 8 and the outer surface 9. In this case, a rectangular prism-shaped active plateau 11 is demarcated by the first main surface 5. The first to fourth connecting surfaces 10A to 10D may be inclined diagonally downward from the active surface 8 toward the outer surface 9. In this case, a pyramidal cone-shaped active plateau 11 is demarcated by the first main surface 5.

[0022] The inclination angles of the first to fourth connection surfaces 10A to 10D may be between 90° and 135°. The inclination angles of the first to fourth connection surfaces 10A to 10D are the angles that the first to fourth connection surfaces 10A to 10D make with the active surface 8 within the SiC chip 2. Preferably, the inclination angles of the first to fourth connection surfaces 10A to 10D are 95° or less.

[0023] Thus, the SiC semiconductor device 1 includes an active platform 11 formed on the SiC epitaxial layer 4 on the first main surface 5. The active platform 11 is formed only on the SiC epitaxial layer 4 and not on the SiC substrate 3.

[0024] Although specific illustrations are omitted, the SiC semiconductor device 1 includes a functional device formed on the active surface 8 side. In Figure 3, the location where the functional device is formed is indicated by cross-hatching. The functional device is formed on the active surface 8 side, utilizing both the inside and outside of the SiC chip 2. The functional device may include at least one of a semiconductor switching device, a semiconductor rectifier device, and a passive device.

[0025] The semiconductor switching device may include at least one of MISFET (Metal Insulator Semiconductor Field Effect Transistor), BJT (Bipolar Junction Transistor), IGBT (Insulated Gate Bipolar Junction Transistor), and JFET (Junction Field Effect Transistor). The semiconductor rectifier device may include at least one of pn junction diode, pin junction diode, Zener diode, SBD (Schottky Barrier Diode), and FRD (Fast Recovery Diode). The passive device may include at least one of resistor, capacitor, inductor, and fuse.

[0026] The functional device may include a network of at least two of the following: semiconductor switching devices, semiconductor rectifiers, and passive devices. The network may be an integrated circuit such as an LSI (Large Scale Integration), SSI (Small Scale Integration), MSI (Medium Scale Integration), VLSI (Very Large Scale Integration), or ULSI (Ultra-Very Large Scale Integration). The functional device formed on the SiC chip 2 (active surface 8) is typically either or both of a MISFET and an SBD.

[0027] The SiC semiconductor device 1 includes a main surface insulating film 12 that covers the first main surface 5. The main surface insulating film 12 includes at least one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. Preferably, the main surface insulating film 12 has a single-layer structure made of a silicon oxide film. Particularly preferable is that the main surface insulating film 12 includes a silicon oxide film made of the oxide of the SiC chip 2. The thickness of the main surface insulating film 12 may be 10 nm or more and 500 nm or less.

[0028] The main surface insulating film 12 coats the active surface 8, the outer surface 9, and the first to fourth connecting surfaces 10A to 10D in a film-like manner. Specifically, the main surface insulating film 12 has one side facing the SiC chip 2 and the other side opposite to the first side. The main surface insulating film 12 is formed in a film-like manner so that both the first and the other side extend along the active surface 8, the outer surface 9, and the first to fourth connecting surfaces 10A to 10D. The main surface insulating film 12 is formed with a gap inward from the periphery of the outer surface 9 (first to fourth sides 7A to 7D) and has a peripheral wall that exposes the peripheral edge of the outer surface 9 (SiC chip 2).

[0029] The SiC semiconductor device 1 includes a sidewall structure 13 formed on the main surface insulating film 12 so as to cover at least one (all in this embodiment) of the first to fourth connection surfaces 10A to 10D. Preferably, the sidewall structure 13 does not have a nitride film (nitride) at least on its outer surface. Examples of nitride films (nitrides) include silicon nitride films (silicon nitride) and silicon oxynitride films (silicon oxynitride).

[0030] The sidewall structure 13 is preferably made of an inorganic material other than a nitride. The sidewall structure 13 is particularly preferably made of a polysilicon film. The sidewall structure 13 may be made of a conductive polysilicon film containing impurities, or it may be made of an impurity-free polysilicon film that does not contain impurities. The sidewall structure 13 may be made of an n-type polysilicon film with n-type impurities added, and / or a p-type polysilicon film with p-type impurities added.

[0031] The sidewall structure 13 is formed in a band shape that extends along the first to fourth connecting surfaces 10A to 10D in a plan view. In this configuration, the sidewall structure 13 is formed in an annular shape (specifically, a square annular shape) that surrounds the active surface 8 in a plan view and covers the first to fourth connecting surfaces 10A to 10D. The portion of the sidewall structure 13 that covers the four corners of the active surface 8 (the corners of the first to fourth connecting surfaces 10A to 10D) is formed in a curved shape toward the periphery of the first main surface 5. In this configuration, the sidewall structure 13 is formed in a square annular shape with curved corners in a plan view.

[0032] The sidewall structure 13 includes a portion that extends in a membrane-like manner along the outer surface 9, and a portion that extends in a membrane-like manner along the first to fourth connecting surfaces 10A to 10D. The portion of the sidewall structure 13 that extends in a membrane-like manner along the outer surface 9 covers the outer surface 9 in the region on the outer surface 9 side relative to the active surface 8. The portion of the sidewall structure 13 that extends in a membrane-like manner along the outer surface 9 may have a thickness less than the thickness (depression depth DO) of the active plateau 11. The portion of the sidewall structure 13 that extends in a membrane-like manner along the first to fourth connecting surfaces 10A to 10D may have an outer surface that slopes diagonally downward from the active surface 8 toward the outer surface 9.

[0033] The outer surface of the sidewall structure 13 may be formed in a curved shape that protrudes away from the first to fourth connecting surfaces 10A to 10D. The outer surface of the sidewall structure 13 may be formed in a curved shape that is recessed toward the first to fourth connecting surfaces 10A to 10D. The sidewall structure 13 may have an overlapping portion that rides up on the edge of the active surface 8 from at least one of the first to fourth connecting surfaces 10A to 10D. In this case, the overlapping portion faces the peripheral edge of the active surface 8 with the main surface insulating film 12 in between.

[0034] Referring to Figure 4, the SiC semiconductor device 1 includes at least one (one in this embodiment) first protruding structure 20A (protruding structure) according to a first embodiment, which is projected toward the outer surface 9. The first protruding structure 20A includes an inorganic material (inorganic film). In this embodiment, the first protruding structure 20A consists of a protruding portion (projection) that extends from the SiC chip 2 toward the opposite side from the second main surface 6, forming an uneven structure on the outer surface 9. The first protruding structure 20A faces the active base 11 in the planar direction of the outer surface 9.

[0035] In this configuration, the first protruding structure 20A has a thickness exceeding the thickness of the active base 11 and includes a portion located below the active surface 8 and a portion located above the active surface 8. In other words, if a straight line is drawn horizontally (in the first direction X or second direction Y) from the active surface 8 in a cross-sectional view, the upper end (tip) of the first protruding structure 20A crosses this straight line along the normal direction Z. The first protruding structure 20A consists of a decorative structure electrically isolated from the functional device. A decorative structure means a structure that does not function as a functional device (the same applies hereinafter). The "decorative structure" may also be called an "accessory pattern". The first protruding structure 20A is formed in an electrically floating state.

[0036] The first protruding structure 20A preferably does not have a nitride film (nitride) at least on its outer surface. The first protruding structure 20A preferably consists of an inorganic material other than a nitride. In this embodiment, the first protruding structure 20A includes a mesa portion 21 which is part of the SiC chip 2. Specifically, the mesa portion 21 consists of part of the SiC epitaxial layer 4. The mesa portion 21 forms a protruding portion that projects in a plateau-like manner on the outer surface 9 toward the opposite side from the second main surface 6. The mesa portion 21 forms the main body of the first protruding structure 20A.

[0037] The mesa portion 21 is formed in the region between the periphery of the active surface 8 and the periphery of the outer surface 9, with a gap between them in a plan view, and the periphery of the active surface 8 (first to fourth connecting surfaces 10A to 10D) and the periphery of the outer surface 9 (first to fourth side surfaces 7A to 7D). Specifically, the mesa portion 21 is formed with a gap between it and the sidewall structure 13.

[0038] The mesa portion 21 is preferably positioned closer to the periphery of the outer surface 9 than to the periphery of the active surface 8. The distance between the periphery of the outer surface 9 and the mesa portion 21 is preferably less than the distance between the periphery of the active surface 8 and the mesa portion 21. The mesa portion 21 is formed in a band shape extending along the active surface 8 in a plan view. In this embodiment, the mesa portion 21 is formed in an annular shape (specifically a square annular shape) surrounding the active surface 8 in a plan view. The mesa portion 21 (first protruding structure 20A) may be formed with ends or without ends in a plan view.

[0039] The mesa portion 21 has a top surface 22, a first wall surface 23 on the active surface 8 side, and a second wall surface 24 on the peripheral side of the outer surface 9. The top surface 22 is located substantially coplanar with the active surface 8 and extends parallel to the active surface 8 and the outer surface 9. In other embodiments, the top surface 22 may be located on the outer surface 9 side relative to the active surface 8. That is, if a straight line is set extending horizontally (first direction X or second direction Y) from the active surface 8 in a cross-sectional view, the top surface 22 may be formed at a distance from that straight line on the outer surface 9 side.

[0040] The top surface 22 has an off-angle corresponding to the active surface 8 (outer surface 9). The first wall surface 23 and the second wall surface 24 form the first and second sides of the first protruding structure 20A. The first wall surface 23 has four sides parallel to the active surface 8 in a plan view. The second wall surface 24 has four sides parallel to the first wall surface 23 in a plan view. The planar shapes of the first wall surface 23 and the second wall surface 24 are arbitrary and do not necessarily have to be formed parallel to the active surface 8; they may be meandering.

[0041] The first wall surface 23 and the second wall surface 24 may be formed substantially perpendicular to the top surface 22. In this case, a rectangular prism-shaped mesa portion 21 is demarcated on the first main surface 5 in cross-sectional view. The first wall surface 23 and the second wall surface 24 may be inclined diagonally downward from the top surface 22 toward the outer surface 9. In this case, a trapezoidal mesa portion 21 is demarcated on the first main surface 5 in cross-sectional view.

[0042] The inclination angles of the first wall surface 23 and the second wall surface 24 may be between 90° and 135°. The inclination angles of the first wall surface 23 and the second wall surface 24 are the angles that the first wall surface 23 and the second wall surface 24 make with respect to the top surface 22 within the mesa portion 21. It is preferable that the inclination angles of the first wall surface 23 and the second wall surface 24 are 95° or less.

[0043] The first protruding structure 20A includes a mesa insulating film 25 that covers the mesa portion 21. The mesa insulating film 25 is preferably made of an inorganic material other than a nitride. The mesa insulating film 25 is preferably made of a silicon oxide film. The mesa insulating film 25 is particularly preferably made of a silicon oxide film made of the oxide of the mesa portion 21. The mesa insulating film 25 coats the top surface 22, the first wall surface 23, and the second wall surface 24 of the mesa portion 21 in a film-like manner.

[0044] The mesa insulating film 25 specifically has one side facing the SiC chip 2 and the other side opposite to the first side. The mesa insulating film 25 is formed in a film-like manner so that both the first and second sides extend along the top surface 22, the first wall surface 23, and the second wall surface 24. Preferably, the mesa insulating film 25 covers the entire top surface 22, the entire first wall surface 23, and the entire second wall surface 24 of the mesa portion 21. The mesa insulating film 25 electrically insulates the mesa portion 21 from the outside. The mesa insulating film 25 is connected to the main surface insulating film 12 at the base of the mesa portion 21. The mesa insulating film 25 may be considered as part of the main surface insulating film 12.

[0045] The first protruding structure 20A includes a first inorganic film 26 that selectively coats the mesa portion 21. The first inorganic film 26 is made of an inorganic material other than a nitride. Preferably, the first inorganic film 26 is made of an inorganic material that has relatively high adhesion to organic materials. Particularly preferable is that the first inorganic film 26 is made of a polysilicon film. The first inorganic film 26 may be made of a conductive polysilicon film containing impurities, or of an impurity-free polysilicon film that does not contain impurities. The first inorganic film 26 may be made of an n-type polysilicon film with n-type impurities added, and / or a p-type polysilicon film with p-type impurities added. Preferably, the first inorganic film 26 is made of the same material as the sidewall structure 13.

[0046] The first inorganic film 26 has a first thickness T1. Preferably, the first thickness T1 is less than the thickness (depression depth DO) of the active plateau 11 (mesa portion 21). Preferably, the first thickness T1 exceeds the thickness of the main surface insulating film 12. Preferably, the first thickness T1 is approximately equal to the thickness of the portion of the sidewall structure 13 that extends in a film-like manner along the outer surface 9. The first thickness T1 may be 10 nm or more and 1000 nm or less.

[0047] The first inorganic film 26 is formed on the main surface insulating film 12 and the mesa insulating film 25 so as to cover at least one of the first wall surface 23 and the second wall surface 24 of the mesa portion 21. In this embodiment, the first inorganic film 26 includes a first coating film 27 covering the first wall surface 23 and a second coating film 28 covering the second wall surface 24, selectively exposing the top surface 22. The first coating film 27 and the second coating film 28 each have a similar configuration to the sidewall structure 13. The first coating film 27 may be referred to as the "first mesa side sidewall structure," and the second coating film 28 may be referred to as the "second mesa side sidewall structure."

[0048] The first coating film 27 is formed at a distance from the active surface 8 (sidewall structure 13) in a plan view and is formed in a band shape extending along the first wall surface 23. In this embodiment, the first coating film 27 is formed in an annular shape (specifically, a square annular shape) extending along the first wall surface 23 in a plan view. The first coating film 27 may cover almost the entire area of ​​the first wall surface 23.

[0049] The first coating film 27 may cover the first wall surface 23 with a gap between the top surface 22 of the mesa portion 21 and the base side, exposing the upper wall portion of the first wall surface 23. The first coating film 27 includes a portion that extends in a film-like manner along the outer surface 9 and a portion that extends in a film-like manner along the first wall surface 23. The portion of the first coating film 27 that extends in a film-like manner along the outer surface 9 covers the outer surface 9 in the region on the outer surface 9 side relative to the top surface 22.

[0050] The second coating film 28 is formed in a strip shape extending along the second wall surface 24, spaced apart from the periphery (first to fourth sides 7A to 7D) of the outer surface 9 in a plan view. In this embodiment, the second coating film 28 is formed in an annular shape (specifically, a rectangular annular shape) extending along the second wall surface 24 in a plan view. The second coating film 28 may cover almost the entire area of ​​the second wall surface 24.

[0051] The second coating film 28 may cover the second wall surface 24 with a gap between the top surface 22 of the mesa portion 21 and the base side, exposing the upper wall portion of the second wall surface 24. The second coating film 28 includes a portion that extends in a film-like manner along the outer surface 9 and a portion that extends in a film-like manner along the second wall surface 24. The portion of the second coating film 28 that extends in a film-like manner along the outer surface 9 covers the outer surface 9 in the region on the outer surface 9 side relative to the top surface 22.

[0052] The first protruding structure 20A includes a second inorganic film 29. The second inorganic film 29 may be referred to as an "interlayer insulating film" or an "intermediate insulating film". The second inorganic film 29 is made of an inorganic substance other than a nitride different from the first inorganic film 26. The second inorganic film 29 may be made of an inorganic insulator having a smaller adhesion to an organic substance than the first inorganic film 26. The second inorganic film 29 may have a laminated structure including a plurality of inorganic films, or may have a single-layer structure composed of a single inorganic film. The second inorganic film 29 preferably includes a silicon oxide film. The second inorganic film 29 may have a single-layer structure composed of a single silicon oxide film, or may have a laminated structure composed of a plurality of silicon oxide films.

[0053] When the second inorganic film 29 includes a plurality of silicon oxide films, the properties of the plurality of silicon oxide films are arbitrary. The second inorganic film 29 may include at least one of an NSG film (Nondoped Silicate Glass film), a PSG film (Phosphorus Silicate Glass film), and a BPSG film (Boron Phosphorus Silicate Glass film). The NSG film is made of a silicon oxide film without added impurities. The PSG film is made of a silicon oxide film with added phosphorus. The BPSG film is made of a silicon oxide film with added boron and phosphorus.

[0054] The thickness of the NSG film may be 10 nm or more and 500 nm or less. The thickness of the PSG film may be 10 nm or more and 500 nm or less. The thickness of the BPSG film may be 10 nm or more and 500 nm or less. The second inorganic film 29 may include an NSG film and a PSG film laminated in this order from the SiC chip 2 side. The second inorganic film 29 has a second thickness T2 (total thickness). The second thickness T2 is preferably 10 nm or more and 1500 nm or less. The second thickness T2 preferably exceeds the thickness of the main surface insulating film 12. The second thickness T2 preferably exceeds the first thickness T1 of the first inorganic film 26 (T1 < T2).

[0055] The second inorganic film 29 covers the main surface insulating film 12 on the outer surface 9. The second inorganic film 29 has one side facing the SiC chip 2 and the other side opposite to the first side. Both sides of the second inorganic film 29 are formed to extend along the outer surface of the main surface insulating film 12 and the outer surface of the first inorganic film 26. In this embodiment, the second inorganic film 29 overlaps the first coating film 27 and the second coating film 28 from both sides of the first wall surface 23 and the second wall surface 24 of the mesa portion 21, selectively covering the top surface 22 of the mesa portion 21. Specifically, the second inorganic film 29 selectively covers the portion of the mesa insulating film 25 that covers the top surface 22.

[0056] The second inorganic film 29, together with the mesa portion 21, the mesa insulating film 25, and the first inorganic film 26 (first coating film 27 and second coating film 28), forms a single first protruding structure 20A. The second inorganic film 29 may partially cover the first coating film 27 so as to partially expose the first coating film 27. The second inorganic film 29 may cover the entire area of ​​the first coating film 27. The second inorganic film 29 may partially cover the second coating film 28 so as to partially expose the second coating film 28. The second inorganic film 29 may cover the entire area of ​​the second coating film 28.

[0057] In this embodiment, the second inorganic film 29 has at least one opening 30 that selectively exposes the portion of the mesa insulating film 25 that covers the top surface 22. In cross-sectional view, the opening area of ​​the opening 30 is preferably greater than or equal to the area of ​​the portion of the top surface 22 covered by the second inorganic film 29. Of course, the opening area of ​​the opening 30 may be less than the area of ​​the covered portion. The opening 30 only needs to expose at least a part of the top surface 22, and its planar shape is arbitrary.

[0058] The opening 30 may be formed in a polygonal shape (for example, a quadrilateral) or a circular shape in a plan view. The opening 30 may be formed in a linear or annular shape extending along the mesa portion 21 in a plan view. Of course, the opening 30 may be formed in a linear shape (for example, a zigzag shape) extending in any direction. In addition, multiple openings 30 may be formed at intervals along the mesa portion 21.

[0059] The second inorganic film 29 extends from the mesa portion 21 side toward the peripheral edge (first to fourth side surfaces 7A to 7D) of the outer surface 9, and coats the main surface insulating film 12 in a film-like manner in the region between the peripheral edge of the outer surface 9 and the mesa portion 21. The second inorganic film 29 is formed with a gap extending inward from the peripheral edge of the outer surface 9 and has a peripheral end wall that exposes the peripheral edge (SiC chip 2) of the outer surface 9. The peripheral end wall of the second inorganic film 29, together with the peripheral end wall of the main surface insulating film 12, defines a notched opening 31 that exposes the peripheral edge (SiC chip 2) of the outer surface 9.

[0060] The second inorganic film 29 is drawn out from the mesa portion 21 side toward the active surface 8 side, and covers the main surface insulating film 12 in a film-like manner in the region between the active surface 8 and the first inorganic film 26. The second inorganic film 29 rides up on top of the sidewall structure 13 from above the main surface insulating film 12. The second inorganic film 29 covers the entire area of ​​the sidewall structure 13 in a film-like manner and is drawn out onto the active surface 8 across the first to fourth connecting surfaces 10A to 10D. The second inorganic film 29 covers the active surface 8 with the main surface insulating film 12 in between.

[0061] The second inorganic film 29 has a portion that covers the active surface 8 and a portion that covers the top surface 22 of the mesa portion 21. The portion of the second inorganic film 29 that covers the top surface 22 of the mesa portion 21 is located on the same plane as the portion of the second inorganic film 29 that covers the active surface 8. In this way, the second inorganic film 29 forms a part of the first protruding structure 20A on the outer surface 9, while simultaneously covering the active surface 8, the outer surface 9, and the first to fourth connecting surfaces 10A to 10D (sidewall structure 13).

[0062] The SiC semiconductor device 1 includes a first main surface electrode 32 formed on a main surface insulating film 12 and electrically connected to a functional device. Figures 1 to 3 show an example in which one first main surface electrode 32 is located on the active surface 8 and not on the outer surface 9. The first main surface electrode 32 only needs to be located in the region on the active surface 8 side of the first protruding structure 20A in a plan view, and the planar shape and number of the first main surface electrodes 32 are arbitrary.

[0063] It is preferable that the first main surface electrode 32 does not cover the first protruding structure 20A. It is also preferable that the first main surface electrode 32 is not formed in the region between the first protruding structure 20A and the periphery of the outer surface 9 on the second inorganic film 29 (outer surface 9). In other words, it is preferable that no metal film is formed in the region between the periphery of the SiC chip 2 and the first protruding structure 20A in a plan view. The first main surface electrode 32 is electrically connected to the functional device by penetrating the main surface insulating film 12 and the second inorganic film 29.

[0064] The first main surface electrode 32 preferably has a laminated structure including a barrier metal film and a main electrode film, which are stacked in this order from the SiC chip 2 side. The barrier metal film is preferably made of a Ti-based metal film. The barrier metal film may have a single-layer structure or a laminated structure including at least one of a Ti film and a TiN film. The main electrode film is preferably made of a Cu-based metal film or an Al-based metal film. The main electrode film may include at least one of a pure Cu film (Cu film with a purity of 99% or more), a pure Al film (Al film with a purity of 99% or more), an AlCu alloy film, an AlSi alloy film, and an AlSiCu alloy film.

[0065] The SiC semiconductor device 1 does not have a nitride film covering the first protruding structure 20A (mesa portion 21). The SiC semiconductor device 1 does not have a nitride film covering the region between the first protruding structure 20A (mesa portion 21) and the active surface 8. The SiC semiconductor device 1 does not have a nitride film covering the region between the first protruding structure 20A (mesa portion 21) and the periphery of the outer surface 9. The SiC semiconductor device 1 does not have a nitride film covering the first main surface electrode 32.

[0066] The SiC semiconductor device 1 includes an organic film 33 covering the first protruding structure 20A on the outer surface 9 side. The organic film 33 may also be called a "protective film" or "organic insulating film". The organic film 33 has a hardness lower than that of the first inorganic film 26 and the second inorganic film 29. In other words, the organic film 33 has an elastic modulus smaller than that of the first inorganic film 26 and the second inorganic film 29, and functions as a buffer (protective film) against external forces. The organic film 33 protects the SiC chip 2, the first main surface electrode 32, etc. from external forces.

[0067] The organic film 33 preferably contains a photosensitive resin. The photosensitive resin may be a negative type or a positive type. The organic film 33 may contain at least one of a polyimide film, a polyamide film, and a polybenzoxazole film. The organic film 33 preferably has a thickness exceeding the thickness of the active plate 11. The thickness of the organic film 33 is particularly preferably exceeding the thickness of the first main surface electrode 32. The thickness of the organic film 33 may be 1 μm or more and 50 μm or less. The thickness of the organic film 33 is preferably 5 μm or more and 20 μm or less.

[0068] The organic film 33 directly coats the first protruding structure 20A. Therefore, no nitride film is interposed between the first protruding structure 20A and the organic film 33. Also, no nitride film is interposed between the mesa portion 21 (SiC chip 2) and the organic film 33. Only inorganic materials other than the nitride film are interposed between the mesa portion 21 and the organic film 33. The organic film 33 directly coats the second inorganic film 29 on the first protruding structure 20A, and coats the first inorganic film 26 with the second inorganic film 29 in between. Specifically, the organic film 33 overlaps the second inorganic film 29 from both sides of the first wall surface 23 and the second wall surface 24 of the mesa portion 21, and coats the entire area of ​​the first coating film 27 and the entire area of ​​the second coating film 28 with the second inorganic film 29 in between.

[0069] The organic film 33 enters the opening 30 from above the second inorganic film 29 and directly covers the mesa insulating film 25 within the opening 30. Within the opening 30, the organic film 33 covers the top surface 22 of the mesa portion 21 with the mesa insulating film 25 in between. The organic film 33 engages with the first protruding structure 20A and simultaneously engages with the opening 30. In this way, the organic film 33 directly covers the entire area of ​​the first protruding structure 20A in a plan view.

[0070] The organic film 33 is drawn out from the first protruding structure 20A towards the periphery of the outer surface 9 (first to fourth side surfaces 7A to 7D), and covers the second inorganic film 29 in the region between the periphery of the outer surface 9 and the first inorganic film 26. The organic film 33 has a periphery wall formed at a distance inward from the periphery of the outer surface 9.

[0071] In other words, the peripheral wall of the organic film 33 is located in the region between the mesa portion 21 and the periphery of the outer surface 9, and defines the dicing street 34 that exposes the periphery of the outer surface 9 (the periphery of the first main surface 5). The peripheral wall of the organic film 33 may be formed with a gap between it and the peripheral wall (notch opening 31) of the second inorganic film 29 towards the active surface 8. In other words, the dicing street 34 may expose the second inorganic film 29 in addition to the periphery of the outer surface 9. Of course, the organic film 33 may cover the notch opening 31 and the periphery of the outer surface 9.

[0072] The organic film 33 is drawn out from the first protruding structure 20A towards the active surface 8, and covers the second inorganic film 29 in the region between the active surface 8 and the first protruding structure 20A. The organic film 33 covers the sidewall structure 13 with the second inorganic film 29 in between, and is drawn out onto the active surface 8, crossing the first to fourth connecting surfaces 10A to 10D. It is preferable that the organic film 33 covers the entire area of ​​the sidewall structure 13.

[0073] The organic film 33 directly covers the peripheral portion of the first main electrode 32 on the active surface 8. In other words, there is no nitride film interposed between the first main electrode 32 and the organic film 33. Preferably, the organic film 33 covers the entire peripheral portion of the first main electrode 32. The organic film 33 has at least one pad opening 35 that exposes the inner portion of the first main electrode 32. In this way, the organic film 33 fills in the step between the active surface 8 and the outer surface 9 and covers the active surface 8 (periphery of the first main electrode 32), the outer surface 9 (first protruding structure 20A), and the first to fourth connecting surfaces 10A to 10D (sidewall structure 13).

[0074] The SiC semiconductor device 1 includes a second main surface electrode 36 formed on a second main surface 6. The second main surface electrode 36 covers the entire area of ​​the second main surface 6 and is connected to the first to fourth side surfaces 7A to 7D. The second main surface electrode 36 is electrically connected to the SiC chip 2 (SiC substrate 3). Specifically, the second main surface electrode 36 forms ohmic contact with the SiC chip 2 (SiC substrate 3). The second main surface electrode 36 may include at least one of a Ti film, a Ni film, a Pd film, an Au film, and an Ag film. As an example, the second main surface electrode 36 may include a Ti film, a Ni film, a Pd film, and an Au film stacked in this order from the second main surface 6 side.

[0075] The first protruding structure 20A is not limited to the form shown in Figure 4, etc., and can have various forms. Other examples of the first protruding structure 20A are shown below with reference to Figures 5A to 5C. Figure 5A is an enlarged cross-sectional view showing the first protruding structure 20A according to the second embodiment. Hereafter, the same reference numerals are used for structures corresponding to those shown in Figure 4, etc., and their descriptions are omitted.

[0076] Referring to Figure 5A, the second inorganic film 29 has an opening 30 that partially exposes either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 of the first inorganic film 26. The organic film 33 directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 within the opening 30.

[0077] Figure 5B is an enlarged cross-sectional view showing the first protruding structure 20A according to the third embodiment. Hereafter, the same reference numerals are used for structures corresponding to those shown in Figure 4, etc., and their descriptions are omitted. Referring to Figure 5B, the second inorganic film 29 has an opening 30 that exposes the entire area of ​​either or both (both in this embodiment) of the first coating film 27 and the second coating film 28 of the first inorganic film 26. The opening 30 forms a gap 37 between the first coating film 27 and the second coating film 28, or both (both in this embodiment).

[0078] In other words, in this embodiment, the first protruding structure 20A includes a gap 37 formed between the first inorganic film 26 and the second inorganic film 29. The width of the gap 37 is arbitrary, but may be between 0.1 μm and 50 μm. The organic film 33 directly covers the first inorganic film 26 within the opening 30. The organic film 33 penetrates the gap 37 and directly covers either or both (both in this embodiment) of the first coating film 27 and the second coating film 28 within the gap 37.

[0079] Figure 5C is an enlarged cross-sectional view showing the first protruding structure 20A according to the fourth embodiment. Hereafter, the same reference numerals are used for structures corresponding to those shown in Figure 4, etc., and their descriptions are omitted. Referring to Figure 5C, in this embodiment, the second inorganic film 29 covers the entire top surface 22 of the mesa portion 21 and does not have an opening 30. The organic film 33 faces the entire mesa portion 21 and the entire first inorganic film 26, with the second inorganic film 29 in between.

[0080] The SiC semiconductor device 1 may simultaneously include at least two of the first protruding structures 20A according to the first to fourth embodiments. The SiC semiconductor device 1 may also include a first protruding structure 20A that simultaneously includes at least two of the features of the first protruding structures 20A according to the first to fourth embodiments.

[0081] As described above, the SiC semiconductor device 1 includes a SiC chip 2 (chip), a functional device, a first protruding structure 20A (protruding structure), and an organic film 33. The SiC chip 2 has a first main surface 5 on one side and a second main surface 6 on the other side. The first main surface 5 includes an active surface 8 set on the inner part and an outer surface 9 set on the peripheral edge. The functional device is formed on the active surface 8 side. The first protruding structure 20A contains inorganic material and protrudes toward the outer surface 9 side. In other words, the first protruding structure 20A is formed toward the outer surface 9 side so as to protrude toward the opposite side from the second main surface 6. The organic film 33 covers the first protruding structure 20A.

[0082] Semiconductor devices are used in a variety of environments depending on their application, and therefore require durability to withstand diverse operating conditions. In particular, SiC semiconductor devices, which contain SiC as a substrate, are expected to be installed in vehicles that use motors as a power source, such as hybrid vehicles, electric vehicles, and fuel cell vehicles, due to the physical properties (electrical characteristics) of SiC. For this reason, SiC semiconductor devices require superior durability to withstand harsh operating conditions compared to Si (silicon) semiconductor devices.

[0083] The durability of SiC semiconductor devices is evaluated, for example, by high-temperature, high-humidity bias testing. In high-temperature, high-humidity bias testing, the electrical properties of the SiC semiconductor device are evaluated under conditions of high temperature and high humidity. Under high temperature conditions, external stress due to thermal expansion is applied to the organic film 33, which may cause the organic film 33 to delaminate from the SiC chip 2. Under high humidity conditions, moisture may penetrate the delaminated portion of the organic film 33, which may cause fluctuations (decreases) in the electrical properties of the SiC semiconductor device. These events can lead to a decrease in the reliability of the SiC semiconductor device.

[0084] In this regard, the SiC semiconductor device 1 can enhance the adhesion of the organic film 33 to the SiC chip 2 through the first protruding structure 20A. This suppresses the peeling of the organic film 33 from the SiC chip 2. Therefore, a SiC semiconductor device 1 with improved reliability can be provided.

[0085] The first protruding structure 20A is preferably formed in an electrically floating state. In other words, the first protruding structure 20A is preferably a decorative structure that is electrically isolated from the functional device. This structure makes it possible to suppress fluctuations in the electrical characteristics of the functional device caused by the first protruding structure 20A.

[0086] It is preferable that no nitride film is interposed between the first protruding structure 20A and the organic film 33. It is also preferable that no nitride film is interposed between the outer surface 9 and the organic film 33. It is preferable that the first protruding structure 20A does not have a nitride film. With these structures, it is possible to prevent the peeling of the organic film 33 starting from the peeling of the nitride film.

[0087] The first protruding structure 20A is preferably made of an inorganic material. In a plan view, it is preferable that no metal film is formed in the region between the periphery of the SiC chip 2 and the protruding structure. In a plan view, it is preferable that the first protruding structure 20A is formed at a distance from the periphery of the SiC chip 2 and the active surface 8.

[0088] The first protruding structure 20A may have a first edge (first wall surface 23) on the active surface 8 side and a second edge (second wall surface 24) on the peripheral side of the outer surface 9. Preferably, the organic film 33 covers the first protruding structure 20A so as to cover both the first edge and the second edge in a plan view. Preferably, the organic film 33 covers the entire area of ​​the first protruding structure 20A in a plan view.

[0089] The first protruding structure 20A may be formed in a strip shape extending along the active surface 8 in a plan view. The first protruding structure 20A may surround the active surface 8 in a plan view. The first protruding structure 20A may be formed in an annular shape in a plan view. The organic film 33 may cover a part of the active surface 8 in a plan view.

[0090] The SiC semiconductor device 1 may include a first main surface electrode 32 that covers the active surface 8 in a plan view. The organic film 33 may cover a portion of the first main surface electrode 32. In a high-temperature environment, stress due to thermal expansion occurs in the first main surface electrode 32. If a nitride film is formed covering the first main surface electrode 32, the nitride film may peel off from the first main surface electrode 32 due to the stress on the first main surface electrode 32. In a high-humidity environment, the first main surface electrode 32 and other components may deteriorate due to moisture (humidity) that penetrates the peeled portion of the nitride film.

[0091] Therefore, it is preferable that no nitride film is interposed between the first main surface electrode 32 and the organic film 33. This structure reduces the starting point for delamination of the structure covering the first main surface electrode 32. In other words, it prevents the delamination of the organic film 33 that would start from the delamination of the nitride film on the first main surface electrode 32.

[0092] The stress on the first main surface electrode 32 is concentrated near the edge (periphery) of the first main surface electrode 32. Therefore, if a nitride film is formed covering the area near the edge of the first main surface electrode 32, peeling of the nitride film is likely to occur. Accordingly, in a structure having an organic film 33 covering the edge of the first main surface electrode 32, it is particularly preferable that no nitride film is interposed between the periphery of the first main surface electrode 32 and the organic film 33.

[0093] The first main surface 5 may include an active surface 8, an outer surface 9 recessed toward the second main surface 6 relative to the active surface 8, and first to fourth connecting surfaces 10A to 10D connecting the active surface 8 and the outer surface 9. In other words, the SiC semiconductor device 1 may have an active base 11 partitioned by the active surface 8, the outer surface 9, and the first to fourth connecting surfaces 10A to 10D on the first main surface 5. In this case, it is preferable that the first protruding structure 20A faces the active base 11 in the planar direction of the outer surface 9.

[0094] Furthermore, in this case, it is preferable that the organic film 33 fills the step between the active surface 8 and the outer surface 9 and covers the active surface 8 and the outer surface 9. With this structure, the adhesion force of the organic film 33 to the SiC chip 2 can be increased by the active base 11 and the first protruding structure 20A. The SiC semiconductor device 1 may also include a sidewall structure 13 that covers the first to fourth connection surfaces 10A to 10D. In this case, it is preferable that the organic film 33 covers the sidewall structure 13.

[0095] The first protruding structure 20A preferably consists of a part of the SiC chip 2 and includes a mesa portion 21 formed on the outer surface 9 so as to protrude toward the opposite side from the second main surface 6. The first protruding structure 20A preferably includes a first inorganic film 26 that covers at least a part of the mesa portion 21 on the outer surface 9. The first protruding structure 20A preferably includes a second inorganic film 29 that covers at least a part of the first inorganic film 26 on the outer surface 9.

[0096] In this case, it is preferable that the organic film 33 covers at least the second inorganic film 29 on the outer surface 9. With this structure, the adhesion force of the organic film 33 to the SiC chip 2 can be increased by the first protruding structure 20A, which includes the mesa portion 21, the first inorganic film 26, and the second inorganic film 29. This suppresses the peeling of the organic film 33 from the SiC chip 2. Thus, a SiC semiconductor device 1 with improved reliability can be provided.

[0097] It is preferable that the second inorganic film 29 contains an inorganic substance different from the first inorganic film 26. It is preferable that the first inorganic film 26 and the second inorganic film 29 are each formed in an electrically suspended state. It is preferable that the first inorganic film 26 and the second inorganic film 29 each contain an inorganic substance other than a nitride. It is preferable that no nitride film is interposed between the second inorganic film 29 and the organic film 33. It is preferable that no nitride film is interposed between the first inorganic film 26 and the organic film 33.

[0098] It is preferable that no nitride film is interposed between the mesa portion 21 and the organic film 33. It is preferable that no nitride film is formed on the region between the active surface 8 and the mesa portion 21 on the outer surface 9. It is preferable that no metal film is formed on the periphery of the SiC chip 2 and the region between the mesa portion 21 in a plan view.

[0099] Preferably, the mesa portion 21 is formed at a distance from the periphery and active surface 8 of the SiC chip 2 in a plan view. The mesa portion 21 may have a first side (first wall surface 23) on the active surface 8 side and a second side (second wall surface 24) on the periphery side of the outer surface 9. In this case, preferably, the organic film 33 covers the mesa portion 21 so as to cover both the first and second sides in a plan view. Preferably, the organic film 33 covers the entire area of ​​the mesa portion 21 in a plan view.

[0100] The mesa portion 21 may be formed in a band shape extending along the active surface 8 in a plan view. The mesa portion 21 may surround the active surface 8 in a plan view. The mesa portion 21 may be formed in an annular shape in a plan view. The organic film 33 may cover a portion of the active surface 8 in a plan view.

[0101] The SiC semiconductor device 1 may include a first main surface electrode 32 that covers the active surface 8 in a plan view. In this case, the organic film 33 may cover a portion of the first main surface electrode 32 on the active surface 8 side. In this case, it is preferable that no nitride film is interposed between the first main surface electrode 32 and the organic film 33.

[0102] The first protruding structure 20A may include a mesa insulating film 25 that covers the mesa portion 21. In this case, it is preferable that the first inorganic film 26 covers the mesa insulating film 25. The mesa insulating film 25 is preferably made of a silicon oxide film. It is preferable that no nitride film is interposed between the mesa portion 21 and the mesa insulating film 25. It is preferable that the mesa portion 21 faces the active plateau 11 in the planar direction of the outer surface 9. It is preferable that the mesa portion 21 has a top surface 22 that is located on the same plane as the active surface 8.

[0103] The first inorganic film 26 may include a polysilicon film, and the second inorganic film 29 may include a silicon oxide film. Preferably, the first inorganic film 26 includes a polysilicon film that is exposed from the outer surface. Preferably, the organic film 33 directly coats the first inorganic film 26 and the second inorganic film 29. Preferably, the adhesion force of the organic film 33 to the first inorganic film 26 is greater than the adhesion force of the organic film 33 to the second inorganic film 29.

[0104] The SiC chip 2 may include a SiC substrate 3 and a SiC epitaxial layer 4. In this case, the mesa portion 21 may consist of a part of the SiC epitaxial layer 4. The SiC epitaxial layer 4 may have a different impurity concentration than the SiC substrate 3.

[0105] The second inorganic film 29 may have an opening 30 that overlaps with at least a portion of the top surface 22 of the mesa portion 21 in a plan view (see Figures 4 to 5B). In this case, the second inorganic film 29 may cover the entire area of ​​the first inorganic film 26 (see Figure 4). The second inorganic film 29 may expose at least a portion of the first inorganic film 26 (see Figures 5A and 5B). The second inorganic film 29 may expose the entire area of ​​the first inorganic film 26 (see Figure 5B).

[0106] In this case, the second inorganic film 29 may be formed on the outer surface 9 at a distance from the first inorganic film 26 such that a gap 37 is formed between it and the first inorganic film 26 (see Figure 5B). In this case, the organic film 33 may fill the gap 37 on the outer surface 9 and cover the mesa portion 21, the first inorganic film 26, and the second inorganic film 29 (see Figure 5B). Of course, the second inorganic film 29 may cover the entire area of ​​the mesa portion 21 (see Figure 5C).

[0107] Figure 6 corresponds to Figure 4 and is an enlarged cross-sectional view showing the SiC semiconductor device 41 according to the second embodiment of the present invention together with the second protruding structure 20B according to the first embodiment. Hereinafter, the same reference numerals are used for structures corresponding to the structures described for the SiC semiconductor device 1, and their descriptions are omitted.

[0108] Referring to Figure 6, the SiC semiconductor device 41 includes, in place of the first protruding structure 20A, at least one (one in this embodiment) second protruding structure 20B (protruding structure) according to a first embodiment, which protrudes toward the outer surface 9. The second protruding structure 20B, like the first protruding structure 20A, includes a mesa portion 21, a mesa insulating film 25, a first inorganic film 26, and a second inorganic film 29. In this embodiment, the first inorganic film 26 includes, in addition to the first coating film 27 and the second coating film 28, a top surface covering portion 42 that covers the top surface 22 of the mesa portion 21 in a film-like manner on the mesa insulating film 25. The top surface covering portion 42 covers the entire top surface 22 and is connected to the first coating film 27 and the second coating film 28.

[0109] In other words, the first inorganic film 26 coats the top surface 22, the first wall surface 23, and the second wall surface 24 of the mesa portion 21 in a film-like manner. Specifically, the first inorganic film 26 has one side facing the SiC chip 2 and the other side opposite to the first side. The first inorganic film 26 coats the top surface 22, the first wall surface 23, and the second wall surface 24 in a film-like manner on both the one side and the other side. It is preferable that the first inorganic film 26 coats the entire area of ​​the mesa portion 21 in a film-like manner.

[0110] The second inorganic film 29 is formed in a film-like manner such that both one side and the other side extend along the outer surface of the first inorganic film 26 (the first coating film 27, the second coating film 28, and the top surface coating portion 42). In this configuration, the second inorganic film 29 overlaps the first coating film 27 and the second coating film 28 from both sides of the first wall surface 23 and the second wall surface 24 of the mesa portion 21, selectively covering the top surface coating portion 42.

[0111] In this embodiment, the second inorganic film 29 has at least one opening 30 that selectively exposes the top surface covering portion 42. In a cross-sectional view, it is preferable that the opening area of ​​the opening 30 is greater than or equal to the area of ​​the portion of the top surface covering portion 42 covered by the second inorganic film 29. Of course, the opening area of ​​the opening 30 may be less than the area of ​​the covered portion. The shape of the opening 30 and other details have been described above and will be omitted here.

[0112] In this embodiment, the organic film 33 includes a portion that directly covers the first inorganic film 26 and a portion that covers the first inorganic film 26 with the second inorganic film 29 in between. Specifically, the organic film 33 overlaps the second inorganic film 29 from both sides of the first wall surface 23 and the second wall surface 24 of the mesa portion 21, and covers the entire area of ​​the first coating film 27 and the second coating film 28 with the second inorganic film 29 in between.

[0113] The organic film 33 enters the opening 30 from above the second inorganic film 29 and directly covers the top surface covering portion 42 of the first inorganic film 26 within the opening 30. Within the opening 30, the organic film 33 covers the top surface 22 of the mesa portion 21, sandwiching the top surface covering portion 42 and the mesa insulating film 25. In this way, the organic film 33 directly covers the entire area of ​​the second protruding structure 20B in a plan view. The organic film 33 engages with the second protruding structure 20B and simultaneously engages with the opening 30. Furthermore, the organic film 33 is in contact with the top surface covering portion 42 within the opening 30.

[0114] The second protruding structure 20B is not limited to the form shown in Figure 6, but can have various forms. Other examples of the second protruding structure 20B are shown below with reference to Figures 7A to 7D. Figure 7A is an enlarged cross-sectional view showing the second protruding structure 20B according to the second embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 6, and their descriptions are omitted.

[0115] Referring to Figure 7A, the top surface covering portion 42 of the first inorganic film 26 may have at least one removal portion 42a and at least one covering portion 42b that are alternately formed along either or both of the first direction X and the second direction Y in a cross-sectional view. The removal portion 42a consists of an opening or notch in which the first inorganic film 26 is partially removed so as to selectively expose the mesa insulating film 25. The covering portion 42b consists of a portion of the first inorganic film 26 that selectively covers the mesa insulating film 25.

[0116] The top surface covering portion 42 only needs to have an uneven structure formed by the removal portion 42a and the covering portion 42b, and the position, size, planar shape, etc., of the removal portion 42a and the covering portion 42b are arbitrary. The top surface covering portion 42 can take various forms depending on the shape of at least one removal portion 42a and at least one covering portion 42b.

[0117] For example, if the top surface covering portion 42 has at least one removal portion 42a, the at least one removal portion 42a may be formed in the shape of a strip, annular, or zigzag (cross-shaped) extending in a first direction X and / or a second direction Y in a plan view. If the top surface covering portion 42 has a plurality of removal portions 42a, the plurality of removal portions 42a may be formed in the shape of dots or stripes (a plurality of strips) spaced apart in the first direction X and / or the second direction Y.

[0118] Similarly, if the top surface covering portion 42 has at least one covering portion 42b, the at least one covering portion 42b may be formed in a strip-like, annular, or zigzag (cross-fold) shape extending in a first direction X and / or a second direction Y in a plan view. If the top surface covering portion 42 has multiple covering portions 42b, the multiple covering portions 42b may be formed in a dot-like or stripe-like (multiple strip-like) shape with spacing in the first direction X and / or the second direction Y.

[0119] The organic film 33 enters the removal portion 42a from above the covering portion 42b of the top covering portion 42 within the opening 30, and directly covers the mesa insulating film 25 and the top covering portion 42 within the removal portion 42a. In this embodiment, an example in which the removal portion 42a exposes the mesa insulating film 25 has been described. However, the removal portion 42a may penetrate the mesa insulating film 25 and expose the SiC chip 2 (SiC epitaxial layer 4). In this case, the organic film 33 directly covers the SiC chip 2, the mesa insulating film 25 and the top covering portion 42 within the removal portion 42a.

[0120] Figure 7B is an enlarged cross-sectional view showing the second protruding structure 20B according to the third embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 6, and their descriptions are omitted. Referring to Figure 7B, the second inorganic film 29 has an opening 30 that partially exposes either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 of the first inorganic film 26, in addition to the top surface coating portion 42. Within the opening 30, the organic film 33 directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28, in addition to the top surface coating portion 42.

[0121] Figure 7C is an enlarged cross-sectional view showing the second protruding structure 20B according to the fourth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 6, and their descriptions are omitted. Referring to Figure 7C, the second inorganic film 29 has an opening 30 that exposes the entire area of ​​either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 of the first inorganic film 26, in addition to the top surface coating portion 42. The opening 30 forms a gap 37 between the first coating film 27 and the second coating film 28, or both (in this embodiment, both).

[0122] In other words, in this embodiment, the second protruding structure 20B includes a gap 37 formed between the first inorganic film 26 and the second inorganic film 29. The width of the gap 37 is arbitrary, but may be between 0.1 μm and 50 μm. In this embodiment, the organic film 33 directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28, in addition to the top surface covering portion 42, within the opening 30. The organic film 33 penetrates into the gap 37 and directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 within the gap 37.

[0123] Figure 7D is an enlarged cross-sectional view showing the second protruding structure 20B according to the fifth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 6, and their descriptions are omitted. Referring to Figure 7D, in this embodiment, the second inorganic film 29 covers the entire top surface covering portion 42 of the first inorganic film 26 and does not have an opening 30. In this embodiment, the second inorganic film 29 covers the entire area of ​​the first inorganic film 26. The organic film 33 faces the entire area of ​​the mesa portion 21 and the entire area of ​​the first inorganic film 26, with the second inorganic film 29 in between.

[0124] The SiC semiconductor device 41 may simultaneously include at least two of the second protruding structures 20B according to the first to fifth embodiments. The SiC semiconductor device 41 may also include a second protruding structure 20B that simultaneously includes at least two of the features of the second protruding structure 20B according to the first to fifth embodiments.

[0125] As described above, the SiC semiconductor device 41 includes a SiC chip 2 (chip), a functional device, a second protruding structure 20B (protruding structure), and an organic film 33. The SiC chip 2 has a first main surface 5 on one side and a second main surface 6 on the other side. The first main surface 5 includes an active surface 8 set in the inner part and an outer surface 9 set in the peripheral part. The functional device is formed on the active surface 8 side. The second protruding structure 20B contains inorganic material and protrudes toward the outer surface 9 side. In other words, the second protruding structure 20B is formed toward the outer surface 9 side so as to protrude toward the opposite side from the second main surface 6. The organic film 33 covers the second protruding structure 20B.

[0126] This structure allows the adhesion force of the organic film 33 to the SiC chip 2 to be increased by the second protruding structure 20B. This suppresses the peeling of the organic film 33 from the SiC chip 2. Therefore, a SiC semiconductor device 41 with improved reliability can be provided.

[0127] The second protruding structure 20B preferably consists of a part of the SiC chip 2 and includes a mesa portion 21 formed on the outer surface 9 so as to protrude toward the opposite side from the second main surface 6. The mesa portion 21 preferably has a top surface 22, a first wall surface 23 on the active surface 8 side, and a second wall surface 24 on the peripheral side of the outer surface 9. The second protruding structure 20B preferably includes a first inorganic film 26 that coats the top surface 22, the first wall surface 23, and the second wall surface 24 in a film-like manner. The second protruding structure 20B preferably includes a second inorganic film 29 that coats at least a part of the first inorganic film 26 and forms a protruding structure together with the mesa portion 21 and the first inorganic film 26.

[0128] In this case, it is preferable that the organic film 33 covers the second protruding structure 20B. With this structure, the adhesion force of the organic film 33 to the SiC chip 2 can be increased by the second protruding structure 20B, which includes the mesa portion 21, the first inorganic film 26, and the second inorganic film 29. This suppresses the peeling of the organic film 33 from the SiC chip 2. Thus, a SiC semiconductor device 41 with improved reliability can be provided.

[0129] The first inorganic film 26 preferably includes a top surface covering portion 42 that covers the top surface 22, a first coating film 27 that covers the first wall surface 23, and a second coating film 28 that covers the second wall surface 24. The second inorganic film 29 preferably covers either or both of the first coating film 27 and the second coating film 28 so as to expose at least a part of the top surface covering portion 42 (see Figures 6 to 7C). The organic film 33 is preferably in contact with the top surface covering portion 42.

[0130] The second inorganic film 29 may cover the entire area of ​​the first coating film 27 and the entire area of ​​the second coating film 28, selectively exposing the top surface coating portion 42 (see Figures 6 and 7A). The second inorganic film 29 may expose at least a portion of the top surface coating portion 42, at least a portion of the first coating film 27, and at least a portion of the second coating film 28 (see Figures 7B and 7C). The second inorganic film 29 may expose the entire area of ​​the first inorganic film 26 (see Figure 7C).

[0131] In this case, the second inorganic film 29 may be formed on the outer surface 9 at a distance from the first inorganic film 26 such that a gap 37 is formed between it and the first inorganic film 26 (see Figure 7C). In this case, the organic film 33 may fill the gap 37 on the outer surface 9 and cover the mesa portion 21, the first inorganic film 26, and the second inorganic film 29 (see Figure 7C). Of course, the second inorganic film 29 may cover the entire area of ​​the first inorganic film 26 (see Figure 7D).

[0132] Figure 8 corresponds to Figure 4 and is an enlarged cross-sectional view showing the SiC semiconductor device 51 according to the third embodiment of the present invention together with the third protruding structure 20C according to the first embodiment. Hereinafter, the same reference numerals are used for structures corresponding to the structures described for the SiC semiconductor device 1, and their descriptions are omitted.

[0133] Referring to Figure 8, the SiC semiconductor device 51 includes, in place of the first protruding structure 20A, at least one (one in this embodiment) third protruding structure 20C (protruding structure) according to the first embodiment, which protrudes toward the outer surface 9. The third protruding structure 20C includes a mesa portion 21, a mesa insulating film 25, a first inorganic film 26, and a second inorganic film 29, similar to the first protruding structure 20A.

[0134] In this embodiment, the third protruding structure 20C includes at least one (three in cross-sectional view in this embodiment) trench structure 52 formed on the top surface 22 of the mesa portion 21. The trench structures 52 consist of decorative structures electrically isolated from the functional devices on the top surface 22. The trench structures 52 are formed in an electrically floating state.

[0135] The number of trench structures 52 is arbitrary and can be adjusted as appropriate according to the width of the mesa section 21. The third protruding structure 20C may include a single trench structure 52 in cross-sectional view. Preferably, the third protruding structure 20C includes two or more trench structures 52 in cross-sectional view. Particularly preferable is that the third protruding structure 20C includes two or more trench structures 52 in both cross-sectional and plan views.

[0136] The multiple trench structures 52 are formed at intervals in a direction perpendicular to the direction in which the mesa portion 21 extends in a cross-sectional view. The planar shape of the multiple trench structures 52 is arbitrary. The multiple trench structures 52 may each be formed in a stripe shape extending in the direction in which the mesa portion 21 extends in a planar view. In other words, the multiple trench structures 52 may be formed in a stripe shape (multiple strips) in a planar view. The multiple trench structures 52 may each be formed in an annular shape extending along the mesa portion 21 in a planar view. The multiple trench structures 52 may be formed in a dot shape at intervals in the direction in which the mesa portion 21 extends and in a direction perpendicular to the direction in which the mesa portion 21 extends.

[0137] Each of the multiple trench structures 52 includes side walls and bottom walls. Each of the multiple trench structures 52 may be formed in a vertical shape having a substantially constant opening width. Each of the multiple trench structures 52 may be formed in a tapered shape having an opening width that narrows towards the bottom wall. Preferably, each of the bottom walls of the multiple trench structures 52 is formed in a curved shape toward the second main surface 6. Of course, each of the bottom walls of the multiple trench structures 52 may have a flat surface parallel to the active surface 8.

[0138] The multiple trench structures 52 are formed at intervals from the bottom (SiC substrate 3) of the SiC epitaxial layer 4 toward the top surface 22, and each faces the SiC substrate 3 with a portion of the SiC epitaxial layer 4 in between. In this embodiment, the multiple trench structures 52 are formed at a thickness position between the outer surface 9 and the top surface 22.

[0139] Each of the multiple trench structures 52 has a trench width WT. The trench width WT is the width of the trench structure 52 in a direction perpendicular to the direction in which the mesa portion 21 extends. The trench width WT may be 0.1 μm or more and 3 μm or less. Preferably, the trench width WT is 0.5 μm or more and 1.5 μm or less.

[0140] The plurality of trench structures 52 each have a trench depth DT. The trench depth DT may be 0.1 μm or more and 10 μm or less. The trench depth DT is preferably 5 μm or less. The trench depth DT is particularly preferably 2.5 μm or less. The trench depth DT preferably has a value within the range of ±10% based on the recess depth DO of the outer surface 9. The trench depth DT is particularly preferably approximately equal to the recess depth DO (DT≒DO). That is, the bottom wall of the trench structure 52 is preferably located substantially on the same plane as the outer surface 9.

[0141] The plurality of trench structures 52 are arranged with a first interval I1. The first interval I1 is the distance between two adjacent trench structures 52. The first interval I1 may be 0.1 μm or more and 2.5 μm or less. The first interval I1 is preferably 0.5 μm or more and 1.5 μm or less. The first interval I1 is preferably less than the trench width WT (I1<WT). Of course, the first interval I1 may be equal to or greater than the trench width WT.

[0142] The plurality of trench structures 52 each include a trench 53 and an embedded object 54. Hereinafter, one trench structure 52 will be described. The trench 53 extends downward from the top surface 22 toward the second main surface 6. The trench 53 forms the wall surface (side wall and bottom wall) of the trench structure 52. The opening edge portion of the trench 53 slopes obliquely downward from the top surface 22 toward the trench 53. The opening edge portion is the connecting portion of the top surface 22 and the side wall of the trench 53. The opening edge portion may slope obliquely downward in a curved shape toward the outside of the mesa portion 21.

[0143] The embedded object 54 is made of an inorganic substance other than nitride. In this form, the embedded object 54 includes an insulating film 55 and an inorganic embedded object 56. The insulating film 55 is made of an inorganic substance other than nitride. The insulating film 55 preferably includes a silicon oxide film. The insulating film 55 particularly preferably includes a silicon oxide film made of the oxide of the mesa portion 21. The insulating film 55 is formed in a film shape on the inner wall of the trench 53 and partitions a recess space in the trench 53.

[0144] The inorganic buried material 56 consists of an inorganic material other than a nitride. Preferably, the inorganic buried material 56 is made of polysilicon. The inorganic buried material 56 may consist of conductive polysilicon containing impurities, or it may consist of impurity-free polysilicon without impurities. The inorganic buried material 56 may consist of n-type polysilicon with added n-type impurities, and / or p-type polysilicon with added p-type impurities. Preferably, the inorganic buried material 56 is made of the same material as the sidewall structure 13.

[0145] The inorganic embedded object 56 is embedded in the trench 53 with an insulating film 55 in between. The inorganic embedded object 56 has an end that is exposed from the trench 53. The end of the inorganic embedded object 56 may be recessed toward the bottom wall side of the trench 53. In this embodiment, the end of the inorganic embedded object 56 is located on the opening side of the trench 53, rather than the midpoint in the depth direction. In other words, the inorganic embedded object 56 is embedded in the trench 53 so as to cross the midpoint in the depth direction of the trench 53 from the bottom wall of the trench 53.

[0146] The inorganic embedded material 56 may be embedded in the trench 53 with a gap between it and the bottom wall of the trench 53, so as to expose the insulating film 55 within the trench 53. In this case, the inorganic embedded material 56 may be embedded in the trench 53 with a gap between it and the bottom wall, from the opening side of the trench 53. The inorganic embedded material 56 forms an uneven structure with respect to the top surface 22. As a result, the multiple trench structures 52 form an uneven structure on their top surface 22 due to the trenches 53, the insulating film 55, and the inorganic embedded material 56.

[0147] The mesa insulating film 25 is connected to the insulating film 55 of the multiple trench structures 52 at the top surface 22. The mesa insulating film 25 and the insulating film 55 may be considered to be part of the main surface insulating film 12. The first inorganic film 26 includes a first coating film 27 and a second coating film 28, as in the first embodiment. That is, the first inorganic film 26 exposes at least one or all of the multiple trench structures 52 from the top surface 22.

[0148] In this embodiment, the second inorganic film 29 has at least one opening 30 that selectively exposes at least one or all of the multiple trench structures 52. In this embodiment, the opening 30 exposes all of the trench structures 52 in a cross-sectional view. Preferably, the opening 30 exposes all of the trench structures 52 in a plan view. Preferably, the opening area of ​​the opening 30 in a cross-sectional view is greater than or equal to the area of ​​the portion covered by the second inorganic film 29 on the top surface 22. Of course, the opening area of ​​the opening 30 may be less than the area of ​​the covered portion. The opening 30 only needs to expose a portion of the multiple trench structures 52, and its planar shape is arbitrary. The description of the shape of the opening 30, etc., is as described above and will be omitted here.

[0149] The SiC semiconductor device 51 does not have a nitride film covering the multiple trench structures 52. The organic film 33 covers the mesa portion 21 in such a way that it conceals the multiple trench structures 52 in a plan view. In this embodiment, the organic film 33 includes a portion that directly covers the first inorganic film 26, a portion that covers the first inorganic film 26 with the second inorganic film 29 in between, and a portion that directly covers the multiple trench structures 52. Specifically, the organic film 33 overlaps the second inorganic film 29 from both sides of the first wall surface 23 and the second wall surface 24 of the mesa portion 21, and covers the entire area of ​​the first coating film 27 and the second coating film 28 with the second inorganic film 29 in between.

[0150] The organic film 33 penetrates the opening 30 from above the second inorganic film 29 and directly covers the multiple trench structures 52 within the opening 30. Specifically, the organic film 33 directly covers the insulating film 55 and inorganic embedded material 56 of the multiple trench structures 52. In other words, there is no nitride film interposed between the organic film 33 and the multiple trench structures 52. Thus, in a plan view, the organic film 33 directly covers the entire area of ​​the third protruding structure 20C. The organic film 33 engages with the third protruding structure 20C and simultaneously engages with the opening 30. Furthermore, the organic film 33 is in contact with the multiple trench structures 52 within the opening 30.

[0151] The third protruding structure 20C is not limited to the form shown in Figure 8, but can have various forms. Other examples of the third protruding structure 20C are shown below with reference to Figures 9A to 9K. Figure 9A is an enlarged cross-sectional view showing the third protruding structure 20C according to the second embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 8, and their descriptions are omitted.

[0152] Referring to Figure 9A, the inorganic embedded material 56 is embedded on the bottom wall side of the trench 53 such that the insulating film 55 is exposed from the inner wall (side wall) of the trench 53. The end of the inorganic embedded material 56 may be located closer to the bottom wall than the midpoint in the depth direction of the trench 53. The inorganic embedded material 56 forms an uneven structure along the inner wall of the trench 53 in relation to the top surface 22. In other words, the multiple trench structures 52 form an uneven structure on the top surface 22 due to the trench 53, the insulating film 55, and the inorganic embedded material 56.

[0153] In this embodiment, the organic film 33 extends into at least one (or more in this embodiment) trenches 53 from above the top surface 22 within the opening 30. In other words, the organic film 33 has portions embedded in multiple trenches 53 with the insulating film 55 in between. The organic film 33 is in contact with the insulating film 55 and the inorganic embedded material 56 within the multiple trenches 53.

[0154] Figure 9B is an enlarged cross-sectional view showing the third protruding structure 20C according to the third embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structures shown in Figure 8, and their descriptions are omitted. Referring to Figure 9B, in this embodiment, the multiple trench structures 52 each include trenches 53 and insulating films 55, and do not have inorganic buried objects 56.

[0155] In this configuration, the organic film 33 extends into at least one (or more in this configuration) trench 53 from above the top surface 22 within the opening 30. In other words, the organic film 33 has portions embedded in multiple trenches 53 with the insulating film 55 in between. The organic film 33 is in contact with the insulating film 55 within the multiple trenches 53. The organic film 33 does not come into contact with the inorganic embedded material 56 within the multiple trenches 53.

[0156] Figure 9C is an enlarged cross-sectional view showing the third protruding structure 20C according to the fourth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 8, and their descriptions are omitted. Referring to Figure 9C, the insulating film 55 covers the bottom wall surface of the trench 53 so as to expose the wall surface on the opening side of the trench 53. In other words, the insulating film 55 defines a recess space on the bottom wall side of the trench 53. The insulating film 55 may expose a portion of the trench 53 from the opening side for 1 / 3 or more (preferably 1 / 2 or more) of the trench depth DT. In other words, the insulating film 55 may be located on the bottom wall side of the middle portion in the depth direction of the trench 53.

[0157] The inorganic embedded object 56 is embedded in the bottom wall side of the trench 53 with the insulating film 55 in between, exposing the wall surface on the opening side of the trench 53. The end of the inorganic embedded object 56 may be located (protruding) on ​​the opening side of the trench 53 than the end of the insulating film 55. In other words, the inorganic embedded object 56 may define a recess between the wall surface of the trench 53 and the insulating film 55. The end of the inorganic embedded object 56 may be located on the bottom wall side of the middle part of the trench 53 in the depth direction.

[0158] In this embodiment, the mesa insulating film 25 has a mesa opening 57 that exposes the top surface 22 of the mesa portion 21. The mesa opening 57 exposes a plurality of trench structures 52 (trenches 53). In this embodiment, the opening 30 of the second inorganic film 29 communicates with the mesa opening 57 and exposes a plurality of trench structures 52 (trenches 53).

[0159] In this embodiment, the organic film 33 extends into at least one (or more in this embodiment) trenches 53 from above the top surface 22 within the opening 30. In other words, the organic film 33 has portions embedded in multiple trenches 53. Within the multiple trenches 53, the organic film 33 is in contact with the SiC chip 2 (SiC epitaxial layer 4), the insulating film 55, and the inorganic embedded material 56.

[0160] Figure 9D is an enlarged cross-sectional view showing the third protruding structure 20C according to the fifth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structures shown in Figure 8, and their descriptions are omitted. Referring to Figure 9D, in this embodiment, the multiple trench structures 52 each contain only trenches 53 and do not have insulating films 55 or inorganic embedded materials 56.

[0161] In this embodiment, the mesa insulating film 25 has a mesa opening 57 that exposes the top surface 22 of the mesa portion 21. The mesa opening 57 exposes a plurality of trench structures 52 (trenches 53). In this embodiment, the opening 30 of the second inorganic film 29 communicates with the mesa opening 57 and exposes a plurality of trench structures 52. In this embodiment, the organic film 33 extends into at least one (multiple in this embodiment) trench 53 from above the top surface 22 within the opening 30. In other words, the organic film 33 has a portion embedded in a plurality of trenches 53. The organic film 33 is in contact only with the SiC chip 2 (SiC epitaxial layer 4) within the plurality of trenches 53.

[0162] Figure 9E is an enlarged cross-sectional view showing the third protruding structure 20C according to the sixth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structures shown in Figure 8, and their descriptions are omitted. Referring to Figure 9E, the second inorganic film 29 has multiple trench structures 52 (top surfaces 22 of the mesa portion 21) as well as an opening 30 that partially exposes either or both (both in this embodiment) of the first coating film 27 and the second coating film 28 of the first inorganic film 26. Within the opening 30, the organic film 33 directly covers either or both (both in this embodiment) of the first coating film 27 and the second coating film 28 as well as the multiple trench structures 52 (top surfaces 22 of the mesa portion 21).

[0163] Figure 9F is an enlarged cross-sectional view showing the third protruding structure 20C according to the seventh embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structures shown in Figure 8, and their descriptions are omitted. Referring to Figure 9F, the second inorganic film 29 has multiple trench structures 52 (top surfaces 22 of the mesa portion 21), as well as an opening 30 that exposes the entire area of ​​either or both (both in this embodiment) of the first coating film 27 and the second coating film 28 of the first inorganic film 26. The opening 30 forms a gap 37 between the first coating film 27 and the second coating film 28, or both (both in this embodiment).

[0164] In other words, in this embodiment, the third protruding structure 20C includes a gap 37 formed between the first inorganic film 26 and the second inorganic film 29. The width of the gap 37 is arbitrary, but may be between 0.1 μm and 50 μm. In this embodiment, the organic film 33 directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28, in addition to the multiple trench structures 52 (top surface 22 of the mesa portion 21) within the opening 30. The organic film 33 penetrates into the gap 37 and directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 within the gap 37.

[0165] Figure 9G is an enlarged cross-sectional view showing the third protruding structure 20C according to the eighth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structures shown in Figure 8, and their descriptions are omitted. Referring to Figure 9G, in this embodiment, the second inorganic film 29 covers the entire top surface 22 of the mesa portion 21 and does not have an opening 30. In other words, the second inorganic film 29 covers the entire area of ​​the multiple trench structures 52.

[0166] The second inorganic film 29 may have a plurality of depressions 58 that are recessed toward the plurality of trench structures 52 in the portion that covers the plurality of trench structures 52. In other words, the second inorganic film 29 may have an uneven structure caused by the plurality of depressions 58 in the portion that covers the top surface 22 of the mesa portion 21. The organic film 33 faces the entire area of ​​the mesa portion 21 and the entire area of ​​the first inorganic film 26, with the second inorganic film 29 in between. The organic film 33 fills the plurality of depressions 58 of the second inorganic film 29. In the portion that fills the plurality of depressions 58, the organic film 33 faces the plurality of trench structures 52, with the second inorganic film 29 in between.

[0167] Figure 9H is an enlarged cross-sectional view showing the third protruding structure 20C according to the ninth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 8, and their descriptions are omitted. Referring to Figure 9H, the inorganic embedded material 56 is embedded on the bottom wall side of the trench 53 such that the insulating film 55 is exposed from the inner wall (side wall) of the trench 53. The end of the inorganic embedded material 56 may be located closer to the bottom wall than the midpoint in the depth direction of the trench 53. The inorganic embedded material 56 forms an uneven structure along the inner wall of the trench 53 between itself and the top surface 22. In other words, the multiple trench structures 52 form an uneven structure on the top surface 22 due to the trench 53, the insulating film 55, and the inorganic embedded material 56.

[0168] In this embodiment, the second inorganic film 29 covers the entire top surface 22 of the mesa portion 21 and does not have an opening 30. In other words, the second inorganic film 29 covers the entire area of ​​the multiple trench structures 52. The second inorganic film 29 penetrates into at least one (multiple in this embodiment) trench 53 from above the top surface 22. In other words, the second inorganic film 29 has a portion embedded in the multiple trenches 53 with the insulating film 55 in between. The second inorganic film 29 is in contact with the insulating film 55 and the inorganic embedded material 56 within the multiple trenches 53.

[0169] The second inorganic film 29 may have a plurality of depressions 58 that are recessed toward the plurality of trench structures 52 in the portion that covers the plurality of trench structures 52. In other words, the second inorganic film 29 may have an uneven structure caused by the plurality of depressions 58 in the portion that covers the top surface 22 of the mesa portion 21. The organic film 33 faces the entire area of ​​the mesa portion 21 and the entire area of ​​the first inorganic film 26, with the second inorganic film 29 in between. The organic film 33 fills the plurality of depressions 58 of the second inorganic film 29. In the portion that fills the plurality of depressions 58, the organic film 33 faces the plurality of trench structures 52, with the second inorganic film 29 in between.

[0170] Figure 9I is an enlarged cross-sectional view showing the third protruding structure 20C according to the tenth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structures shown in Figure 8, and their descriptions are omitted. Referring to Figure 9I, in this embodiment, the multiple trench structures 52 each include trenches 53 and insulating films 55, and do not have inorganic buried objects 56.

[0171] In this embodiment, the second inorganic film 29 covers the entire top surface 22 of the mesa portion 21 and does not have an opening 30. In other words, the second inorganic film 29 covers the entire area of ​​the multiple trench structures 52. The second inorganic film 29 penetrates into at least one (multiple in this embodiment) trench 53 from above the top surface 22. In other words, the second inorganic film 29 has a portion embedded in the multiple trenches 53 with the insulating film 55 in between. The second inorganic film 29 is in contact with the insulating film 55 within the multiple trenches 53.

[0172] The second inorganic film 29 may have a plurality of depressions 58 that are recessed toward the plurality of trench structures 52 in the portion that covers the plurality of trench structures 52. In other words, the second inorganic film 29 may have an uneven structure caused by the plurality of depressions 58 in the portion that covers the top surface 22 of the mesa portion 21. The organic film 33 faces the entire area of ​​the mesa portion 21 and the entire area of ​​the first inorganic film 26, with the second inorganic film 29 in between. The organic film 33 fills the plurality of depressions 58 of the second inorganic film 29. In the portion that fills the plurality of depressions 58, the organic film 33 faces the plurality of trench structures 52, with the second inorganic film 29 in between.

[0173] Figure 9J is an enlarged cross-sectional view showing the third protruding structure 20C according to the 11th embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 8, and their descriptions are omitted. Referring to Figure 9J, the insulating film 55 covers the bottom wall surface of the trench 53 so as to expose the opening side wall surface of the trench 53. In other words, the insulating film 55 defines a recess space on the bottom wall side of the trench 53. The insulating film 55 may expose a portion of the trench 53 from the opening side for 1 / 3 or more (preferably 1 / 2 or more) of the trench depth DT. In other words, the insulating film 55 may be located on the bottom wall side of the middle portion of the trench 53 in the depth direction.

[0174] The inorganic embedded object 56 is embedded in the bottom wall side of the trench 53, with the insulating film 55 in between, so as to expose the wall surface on the opening side of the trench 53. The end of the inorganic embedded object 56 may be located closer to the opening side of the trench 53 than the end of the insulating film 55. In other words, the inorganic embedded object 56 may define a recess between the wall surface of the trench 53 and the insulating film 55. The end of the inorganic embedded object 56 may be located closer to the bottom wall than the midpoint in the depth direction of the trench 53.

[0175] In this embodiment, the mesa insulating film 25 has a mesa opening 57 that exposes the top surface 22 of the mesa portion 21. The mesa opening 57 exposes a plurality of trench structures 52 (trenches 53). In this embodiment, the second inorganic film 29 covers the entire top surface 22 of the mesa portion 21 and does not have an opening 30. That is, the second inorganic film 29 covers the entire trench structures 52. The second inorganic film 29 penetrates into at least one (multiple in this embodiment) trench 53 from above the top surface 22. That is, the second inorganic film 29 has a portion embedded in the plurality of trenches 53. The second inorganic film 29 is in contact with the SiC chip 2 (SiC epitaxial layer 4), the insulating film 55, and the inorganic embedded material 56 within the plurality of trenches 53.

[0176] The second inorganic film 29 may have a plurality of depressions 58 that are recessed toward the plurality of trench structures 52 in the portion that covers the plurality of trench structures 52. In other words, the second inorganic film 29 may have an uneven structure caused by the plurality of depressions 58 in the portion that covers the top surface 22 of the mesa portion 21. The organic film 33 faces the entire area of ​​the mesa portion 21 and the entire area of ​​the first inorganic film 26, with the second inorganic film 29 in between. The organic film 33 fills the plurality of depressions 58 of the second inorganic film 29. In the portion that fills the plurality of depressions 58, the organic film 33 faces the plurality of trench structures 52, with the second inorganic film 29 in between.

[0177] Figure 9K is an enlarged cross-sectional view showing the third protruding structure 20C according to the twelfth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structures shown in Figure 8, and their descriptions are omitted. Referring to Figure 9K, in this embodiment, the multiple trench structures 52 each contain only trenches 53 and do not have insulating films 55 or inorganic embedded materials 56.

[0178] In this embodiment, the mesa insulating film 25 has a mesa opening 57 that exposes the top surface 22 of the mesa portion 21. The mesa opening 57 exposes a plurality of trench structures 52 (trenches 53). In this embodiment, the second inorganic film 29 covers the entire top surface 22 of the mesa portion 21 and does not have an opening 30. That is, the second inorganic film 29 covers the entire area of ​​the plurality of trench structures 52. The second inorganic film 29 penetrates into at least one (multiple in this embodiment) trench 53 from above the top surface 22. That is, the second inorganic film 29 has a portion embedded in the plurality of trenches 53. The second inorganic film 29 is in contact with the SiC chip 2 (SiC epitaxial layer 4) within the plurality of trenches 53.

[0179] The second inorganic film 29 may have a plurality of depressions 58 that are recessed toward the plurality of trench structures 52 in the portion that covers the plurality of trench structures 52. In other words, the second inorganic film 29 may have an uneven structure caused by the plurality of depressions 58 in the portion that covers the top surface 22 of the mesa portion 21. The organic film 33 faces the entire area of ​​the mesa portion 21 and the entire area of ​​the first inorganic film 26, with the second inorganic film 29 in between. The organic film 33 fills the plurality of depressions 58 of the second inorganic film 29. In the portion that fills the plurality of depressions 58, the organic film 33 faces the plurality of trench structures 52, with the second inorganic film 29 in between.

[0180] The SiC semiconductor device 51 may simultaneously include at least two of the third protruding structures 20C according to the first to twelfth embodiments. The SiC semiconductor device 51 may also include a third protruding structure 20C that simultaneously includes at least two of the features of the third protruding structure 20C according to the first to twelfth embodiments.

[0181] As described above, the SiC semiconductor device 51 includes a SiC chip 2 (chip), a functional device, a third protruding structure 20C (protruding structure), and an organic film 33. The SiC chip 2 has a first main surface 5 on one side and a second main surface 6 on the other side. The first main surface 5 includes an active surface 8 set on the inner part and an outer surface 9 set on the peripheral edge. The functional device is formed on the active surface 8 side. The third protruding structure 20C contains inorganic material and protrudes toward the outer surface 9 side. In other words, the third protruding structure 20C is formed toward the outer surface 9 side so as to protrude toward the opposite side from the second main surface 6. The organic film 33 covers the third protruding structure 20C.

[0182] This structure allows the adhesion force of the organic film 33 to the SiC chip 2 to be increased by the third protruding structure 20C. This suppresses the peeling of the organic film 33 from the SiC chip 2. Therefore, a SiC semiconductor device 51 with improved reliability can be provided.

[0183] The third protruding structure 20C preferably consists of a part of the SiC chip 2, is formed on the outer surface 9 so as to protrude toward the opposite side from the second main surface 6, and includes a mesa portion 21 having a top surface 22. The third protruding structure 20C preferably includes a trench 53 formed on the top surface 22 of the mesa portion 21. The third protruding structure 20C preferably includes a first inorganic film 26 that covers at least a part of the mesa portion 21 on the outer surface 9. The third protruding structure 20C preferably includes a second inorganic film 29 that covers at least a part of the first inorganic film 26 on the outer surface 9 and forms a protruding structure together with the mesa portion 21 and the first inorganic film 26.

[0184] In this case, it is preferable that the organic film 33 covers the mesa portion 21 in a plan view such that it conceals the trench 53. With this structure, the adhesion of the organic film 33 to the SiC chip 2 can be increased by utilizing the uneven structure formed on the top surface 22 of the mesa portion 21 due to the trench 53. This suppresses the peeling of the organic film 33 from the SiC chip 2. Thus, a SiC semiconductor device 51 with improved reliability can be provided.

[0185] The SiC semiconductor device 51 may include a trench structure 52 that includes a trench 53 and an embedded object 54 embedded in the trench 53. With this structure, the adhesion force of the organic film 33 to the SiC chip 2 can be increased by utilizing the uneven structure formed on the top surface 22 of the mesa portion 21 due to the trench structure 52.

[0186] The buried object 54 may include an insulating film 55 covering the wall surface of the trench 53, and an inorganic buried object 56 embedded in the trench 53 with the insulating film 55 in between (see Figures 8, 9A, 9C, 9E-9H and 9J). The inorganic buried object 56 may be embedded in the trench 53 with a gap between the opening side and the bottom wall side of the trench 53 so that the insulating film 55 is exposed within the trench 53.

[0187] Preferably, the insulating film 55 is made of an oxide film, and the inorganic embedded material 56 is made of polysilicon. Preferably, the first inorganic film 26 exposes the trench structure 52, and the second inorganic film 29 exposes the trench structure 52. In this case, preferably, the organic film 33 is in contact with the embedded material 54. Preferably, the organic film 33 is in contact with the inorganic embedded material 56.

[0188] The inorganic embedded material 56 may be embedded in the trench 53 from the bottom wall of the trench 53 across the middle of the trench 53 in the depth direction (see Figures 8, 9A, 9E-9G). The inorganic embedded material 56 may also be embedded closer to the bottom wall than the middle of the trench 53 in the depth direction (see Figures 9C, 9H, and 9J). In these cases, it is preferable that the inorganic embedded material 56 is embedded in the trench 53 with a gap between the opening side of the trench 53 and the bottom wall side, so that the insulating film 55 is exposed within the trench 53. Furthermore, the organic film 33 may include a portion located inside the trench 53 (see Figures 8, 9A, 9C, 9E, and 9F), and the second inorganic film 29 may include a portion located inside the trench 53 (see Figures 9G, 9H, and 9J).

[0189] The SiC semiconductor device 51 may include a trench structure 52 that includes a trench 53 and an insulating film 55 covering the walls of the trench 53, and does not have inorganic embedded objects 56 (see Figures 9B and 9I). In this case, the organic film 33 may include a portion located within the trench 53 (see Figure 9B), or the second inorganic film 29 may include a portion located within the trench 53 (see Figure 9I).

[0190] The SiC semiconductor device 51 may include a trench structure 52 consisting only of trenches 53 (see Figures 9D and 9K). In this case, the organic film 33 may include a portion located within the trenches 53 (see Figure 9D), or the second inorganic film 29 may include a portion located within the trenches 53 (see Figure 9K).

[0191] The SiC semiconductor device 51 may include a trench structure 52 that includes a trench 53, an insulating film 55 covering the bottom wall surface of the trench 53 so as to expose the opening wall surface of the trench 53, and an inorganic embedded object 56 embedded in the bottom wall side of the trench 53 with the insulating film 55 in between so as to expose the opening wall surface of the trench 53 (see Figures 9C and 9J). In this case, the organic film 33 may include a portion located inside the trench 53 (see Figure 9C), or the second inorganic film 29 may include a portion located inside the trench 53 (see Figure 9J).

[0192] The first inorganic film 26 preferably includes a first coating film 27 that covers the first wall surface 23 of the mesa portion 21, and a second coating film 28 that covers the second wall surface 24 of the mesa portion 21. The second inorganic film 29 may have an opening 30 that overlaps at least a part of the top surface 22 of the mesa portion 21 in a plan view (see Figures 8 to 9F). In this case, the second inorganic film 29 may cover the entire area of ​​the first coating film 27 and the entire area of ​​the second coating film 28 (see Figures 8 to 9D). The second inorganic film 29 may expose at least a part of the first coating film 27 and at least a part of the second coating film 28 (see Figures 9E and 9F). The second inorganic film 29 may expose the entire area of ​​the first coating film 27 and the entire area of ​​the second coating film 28 (see Figure 9F).

[0193] In this case, the second inorganic film 29 may be formed on the outer surface 9 at a distance from the first coating film 27 and the second coating film 28 such that a gap 37 is formed between the second inorganic film 29 and the first coating film 27 and the second coating film 28 (see Figure 9F). In this case, the organic film 33 may fill the gap 37 on the outer surface 9 and cover the mesa portion 21, the first inorganic film 26 and the second inorganic film 29 (see Figure 9F). Of course, the second inorganic film 29 may cover the entire area of ​​the mesa portion 21 (see Figure 9G).

[0194] Figure 10 corresponds to Figure 4 and is an enlarged cross-sectional view showing a SiC semiconductor device 61 according to a fourth embodiment of the present invention together with the fourth protruding structure 20D according to the first embodiment. The SiC semiconductor device 61 has a modified form of the SiC semiconductor device 51 according to the third embodiment. Hereinafter, the same reference numerals are used for structures corresponding to the structures described for the SiC semiconductor device 51, and their descriptions are omitted.

[0195] Referring to Figure 10, the SiC semiconductor device 61 includes, in place of the third protruding structure 20C, at least one (one in this embodiment) fourth protruding structure 20D according to a first embodiment, which protrudes toward the outer surface 9. The fourth protruding structure 20D, like the third protruding structure 20C, includes a mesa portion 21, a mesa insulating film 25, a first inorganic film 26, and a second inorganic film 29. In this embodiment, the first inorganic film 26 includes, in addition to the first coating film 27 and the second coating film 28, a top surface covering portion 42 that covers the top surface 22 of the mesa portion 21 in a film-like manner on the mesa insulating film 25. The top surface covering portion 42 covers the entire top surface 22 and is connected to the first coating film 27 and the second coating film 28.

[0196] In other words, the first inorganic film 26 coats the top surface 22, the first wall surface 23, and the second wall surface 24 of the mesa portion 21 in a film-like manner. Specifically, the first inorganic film 26 has one side facing the SiC chip 2 and the other side opposite to the first side. The first inorganic film 26 coats the top surface 22, the first wall surface 23, and the second wall surface 24 in a film-like manner on both the one side and the other side. It is preferable that the first inorganic film 26 coats the entire area of ​​the mesa portion 21 in a film-like manner.

[0197] The top surface covering portion 42 is connected to the inorganic embedded objects 56 of the multiple trench structures 52. In this embodiment, the first inorganic film 26 also serves as the inorganic embedded objects 56 of the multiple trench structures 52. That is, the first inorganic film 26 includes a portion that extends into the trench 53 from above the top surface 22 of the mesa portion 21 as an inorganic embedded object 56. The first inorganic film 26 may have a plurality of depressions 62 that are recessed toward the plurality of trench structures 52 in the portion that covers the plurality of trench structures 52. In other words, the first inorganic film 26 may have an uneven structure caused by the plurality of depressions 62 in the portion that covers the top surface 22 of the mesa portion 21.

[0198] The second inorganic film 29 is formed such that both one side and the other side extend along the outer surface of the first inorganic film 26 (the first coating film 27, the second coating film 28, and the top surface coating portion 42). In this configuration, the second inorganic film 29 overlaps the first coating film 27 and the second coating film 28 from both sides of the first wall surface 23 and the second wall surface 24 of the mesa portion 21, selectively covering the top surface coating portion 42.

[0199] In this embodiment, the second inorganic film 29 has at least one opening 30 that selectively exposes the top surface covering portion 42. In a cross-sectional view, it is preferable that the opening area of ​​the opening 30 is greater than or equal to the area of ​​the portion of the top surface covering portion 42 covered by the second inorganic film 29. Of course, the opening area of ​​the opening 30 may be less than the area of ​​the covered portion. The shape of the opening 30 and other details have been described above and will be omitted here.

[0200] In this embodiment, the organic film 33 includes a portion that directly covers the first inorganic film 26 and a portion that covers the first inorganic film 26 with the second inorganic film 29 in between. Specifically, the organic film 33 overlaps the second inorganic film 29 from both sides of the first wall surface 23 and the second wall surface 24 of the mesa portion 21, and covers the entire area of ​​the first coating film 27 and the second coating film 28 with the second inorganic film 29 in between.

[0201] The organic film 33 enters the opening 30 from above the second inorganic film 29 and directly covers the top surface covering portion 42 of the first inorganic film 26 within the opening 30. Within the opening 30, the organic film 33 covers the top surface 22 of the mesa portion 21, sandwiching the top surface covering portion 42 and the mesa insulating film 25. The organic film 33 fills in multiple depressions 62 of the top surface covering portion 42.

[0202] The organic film 33 faces multiple trench structures 52 with the first inorganic film 26 in between in the portion that fills the multiple depressions 62. In this way, the organic film 33 directly covers the entire area of ​​the fourth protruding structure 20D in a plan view. The organic film 33 engages with the fourth protruding structure 20D and simultaneously engages with the opening 30. Furthermore, the organic film 33 is in contact with the top surface covering portion 42 within the opening 30.

[0203] The fourth protruding structure 20D is not limited to the form shown in Figure 10, but can have various forms. Other examples of the fourth protruding structure 20D are shown below with reference to Figures 11A to 11C.

[0204] Figure 11A is an enlarged cross-sectional view showing the fourth protruding structure 20D according to the second embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 10, and their descriptions are omitted. Referring to Figure 11A, the second inorganic film 29 has an opening 30 that partially exposes either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 of the first inorganic film 26, in addition to the top surface coating portion 42. Within the opening 30, the organic film 33 directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28, in addition to the top surface coating portion 42.

[0205] Figure 11B is an enlarged cross-sectional view showing the fourth protruding structure 20D according to the third embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 10, and their descriptions are omitted. Referring to Figure 11B, the second inorganic film 29 has an opening 30 that exposes the entire area of ​​either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 of the first inorganic film 26, in addition to the top surface covering portion 42. The opening 30 forms a gap 37 between the first coating film 27 and the second coating film 28, or both (in this embodiment, both).

[0206] In other words, in this embodiment, the fourth protruding structure 20D includes a gap 37 formed between the first inorganic film 26 and the second inorganic film 29. The width of the gap 37 is arbitrary, but may be between 0.1 μm and 50 μm. In this embodiment, the organic film 33 directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28, in addition to the top surface coating portion 42, within the opening 30. The organic film 33 penetrates into the gap 37 and directly covers either or both (in this embodiment, both) of the first coating film 27 and the second coating film 28 within the gap 37.

[0207] Figure 11C is an enlarged cross-sectional view showing the fourth protruding structure 20D according to the fifth embodiment. Hereafter, the same reference numerals are used for structures corresponding to the structure shown in Figure 10, and their descriptions are omitted. Referring to Figure 11C, in this embodiment, the second inorganic film 29 covers the entire area of ​​the first inorganic film 26 and does not have an opening 30.

[0208] The second inorganic film 29 may have a plurality of depressions 58 that are recessed toward a plurality of trench structures 52 in the portion that covers the depressions 62 of the first inorganic film 26. In other words, the second inorganic film 29 may have an uneven structure caused by the plurality of depressions 58 in the portion that covers the top surface 22 of the mesa portion 21. The organic film 33 faces the entire mesa portion 21 and the entire first inorganic film 26 with the second inorganic film 29 in between.

[0209] The SiC semiconductor device 61 may simultaneously include at least two of the fourth protruding structures 20D according to the first to fourth embodiments. The SiC semiconductor device 61 may include a fourth protruding structure 20D that simultaneously includes at least two of the features of the fourth protruding structure 20D according to the first to fourth embodiments.

[0210] As described above, the SiC semiconductor device 61 includes a SiC chip 2 (chip), a functional device, a fourth protruding structure 20D (protruding structure), and an organic film 33. The SiC chip 2 has a first main surface 5 on one side and a second main surface 6 on the other side. The first main surface 5 includes an active surface 8 set on the inner part and an outer surface 9 set on the peripheral edge. The functional device is formed on the active surface 8 side. The fourth protruding structure 20D contains inorganic material and protrudes toward the outer surface 9 side. In other words, the fourth protruding structure 20D is formed toward the outer surface 9 side so as to protrude toward the opposite side from the second main surface 6. The organic film 33 covers the fourth protruding structure 20D.

[0211] This structure allows the adhesion force of the organic film 33 to the SiC chip 2 to be increased by the fourth protruding structure 20D. This suppresses the peeling of the organic film 33 from the SiC chip 2. Therefore, a SiC semiconductor device 61 with improved reliability can be provided.

[0212] The fourth protruding structure 20D preferably includes a mesa portion 21 that is formed on the outer surface 9 so as to protrude toward the opposite side from the second main surface 6 and has a top surface 22, and is made up of a part of the SiC chip 2. The fourth protruding structure 20D preferably includes a trench structure 52 which includes a trench 53 formed on the top surface 22, an insulating film 55 covering the inner wall of the trench 53, and an inorganic embedded object 56 embedded in the trench 53 with the insulating film 55 in between. The fourth protruding structure 20D preferably includes a first inorganic film 26 covering the top surface 22 of the mesa portion 21. The fourth protruding structure 20D preferably includes a second inorganic film 29 which covers at least a part of the first inorganic film 26 and forms a protruding structure together with the mesa portion 21 and the first inorganic film 26.

[0213] In this case, it is preferable that the organic film 33 covers the mesa portion 21. With this structure, the adhesion of the organic film 33 to the SiC chip 2 can be increased by utilizing the uneven structure caused by the mesa portion 21 and the trench structure 52. This suppresses the peeling of the organic film 33 from the SiC chip 2. Thus, a SiC semiconductor device 61 with improved reliability can be provided.

[0214] Preferably, the first inorganic film 26 is made of the same material as the inorganic embedded object 56 and is integrally formed with the inorganic embedded object 56. In other words, preferably the inorganic embedded object 56 consists of a part of the first inorganic film 26. That is, preferably the first inorganic film 26 includes a portion that has entered the trench 53 as the inorganic embedded object 56 from above the top surface 22. Preferably, the insulating film 55 is made of an oxide film, the inorganic embedded object 56 is made of polysilicon, and the first inorganic film 26 is made of polysilicon.

[0215] The mesa portion 21 may have a first wall surface 23 on the active surface 8 side and a second wall surface 24 on the peripheral side of the outer surface 9. In this case, the first inorganic film 26 preferably includes a top surface covering portion 42 that covers the top surface 22, a first coating film 27 that covers the first wall surface 23, and a second coating film 28 that covers the second wall surface 24. The second inorganic film 29 preferably covers the first coating film 27 and the second coating film 28 such that at least a part of the top surface covering portion 42 is exposed (see Figures 10 to 11B). In this case, the organic film 33 preferably is in contact with the top surface covering portion 42.

[0216] The second inorganic film 29 may cover the entire area of ​​the first coating film 27 and the entire area of ​​the second coating film 28, selectively exposing the top surface coating portion 42 (see Figure 10). The second inorganic film 29 may expose at least a portion of the top surface coating portion 42, at least a portion of the first coating film 27, and at least a portion of the second coating film 28 (see Figures 10 to 11B). The second inorganic film 29 may expose the entire area of ​​the first inorganic film 26 (see Figure 11B).

[0217] In this case, the second inorganic film 29 may be formed on the outer surface 9 at a distance from the first inorganic film 26 such that a gap 37 is formed between it and the first inorganic film 26 (see Figure 11B). In this case, the organic film 33 may fill the gap 37 on the outer surface 9 and cover the mesa portion 21, the first inorganic film 26, and the second inorganic film 29 (see Figure 11B). Of course, the second inorganic film 29 may cover the entire area of ​​the first inorganic film 26 (see Figure 11C).

[0218] Figure 12 corresponds to Figure 4 and is an enlarged cross-sectional view showing a SiC semiconductor device 71 according to a fifth embodiment of the present invention together with a fifth protruding structure 20E according to the first embodiment. Hereinafter, the same reference numerals are used for structures corresponding to the structures described for the SiC semiconductor device 1, and their descriptions are omitted.

[0219] Referring to Figure 12, the SiC semiconductor device 71 includes, in place of the first protruding structure 20A, at least one (one in this embodiment) fifth protruding structure 20E (protruding structure) according to a first embodiment, which protrudes toward the outer surface 9. Specifically, the fifth protruding structure 20E includes an inorganic material (film-like inorganic material) and is formed on the main surface insulating film 12. In this embodiment, the fifth protruding structure 20E consists of a protruding portion (projection) that extends from the main surface insulating film 12 toward the opposite side from the second main surface 6, forming an uneven structure on the outer surface 9.

[0220] The fifth protruding structure 20E has a thickness less than the thickness of the active base 11 and is formed on the outer surface 9 side of the active surface 8. In other words, if a straight line is set extending horizontally (first direction X or second direction Y) from the active surface 8 in a cross-sectional view, the upper end (tip) of the fifth protruding structure 20E is formed with a gap from that straight line toward the SiC chip 2 side. The fifth protruding structure 20E faces the active base 11 (at least one of the first to fourth connecting surfaces 10A to 10D) in the plane direction of the outer surface 9. The fifth protruding structure 20E consists of a decorative structure that is electrically isolated from the functional device.

[0221] The fifth protruding structure 20E preferably does not have a nitride film (nitride) at least on its outer surface. The fifth protruding structure 20E preferably consists of an inorganic material other than a nitride. Unlike the first to fourth protruding structures 20A to 20E, the fifth protruding structure 20E does not have a mesa portion 21 and a mesa insulating film 25, and includes a first inorganic film 26 and a second inorganic film 29. The first inorganic film 26 consists of an inorganic material other than a nitride. The second inorganic film 29 consists of an inorganic material other than a nitride that is different from the first inorganic film 26.

[0222] The first inorganic film 26 may be made of the same material and have the same thickness (first thickness T1) as the first inorganic film 26 according to the first embodiment. The first inorganic film 26 is formed in a film-like manner on the main surface insulating film 12 and forms a protruding portion on the main surface insulating film 12 toward the opposite side from the second main surface 6. In other words, the first inorganic film 26 forms the main body of the fifth protruding structure 20E. In a plan view, the first inorganic film 26 is formed in the region between the periphery of the active surface 8 and the periphery of the outer surface 9, spaced apart from the periphery of the active surface 8 (first to fourth connecting surfaces 10A to 10D) and the periphery of the outer surface 9 (first to fourth side surfaces 7A to 7D). Specifically, the first inorganic film 26 is formed spaced apart from the sidewall structure 13.

[0223] The first inorganic film 26 is formed in a strip shape that extends along the active surface 8 (first to fourth connecting surfaces 10A to 10D) in a plan view. In this form, the first inorganic film 26 is formed in an annular shape (specifically, a square annular shape) that surrounds the active surface 8 in a plan view. The first inorganic film 26 (fifth protruding structure 20E) may be formed with ends or without ends in a plan view. The first inorganic film 26 has a first edge on the active surface 8 side and a second edge on the peripheral edge side of the outer surface 9.

[0224] The first and second edges of the first inorganic film 26 form the first and second edges of the fifth protruding structure 20E. The first edge has four sides parallel to the active surface 8 in a plan view. The second edge has four sides parallel to the first edge in a plan view. The planar shapes of the first and second edges are arbitrary and do not necessarily have to be formed parallel to the active surface 8; they may be meandering.

[0225] The second inorganic film 29 may be made of the same material and have the same thickness (second thickness T2) as the second inorganic film 29 according to the first embodiment. The second inorganic film 29 has one side facing the SiC chip 2 and the other side opposite to the first side. Both the first and second sides of the second inorganic film 29 are formed to extend along the outer surface of the main surface insulating film 12 and the outer surface of the first inorganic film 26.

[0226] In this embodiment, the second inorganic film 29 overlaps the periphery of the first inorganic film 26 from both the first and second sides, covering the periphery of the first inorganic film 26 on the first side and the periphery on the second side. The portion of the second inorganic film 29 that covers the first inorganic film 26 is located on the outer surface 9 side of the active surface 8. The second inorganic film 29 together with the first inorganic film 26 forms a single fifth protruding structure 20E. The second inorganic film 29 may partially cover the first side so that the first side is partially exposed. The second inorganic film 29 may cover the first side over its entire circumference. Alternatively, the second inorganic film 29 may partially cover the second side so that the second side is partially exposed. The second inorganic film 29 may cover the second side over its entire circumference.

[0227] In this embodiment, the second inorganic film 29 has at least one opening 30 that selectively exposes the first inorganic film 26. In a cross-sectional view, it is preferable that the opening area of ​​the opening 30 is greater than or equal to the area of ​​the portion of the first inorganic film 26 covered by the second inorganic film 29. Of course, the opening area of ​​the opening 30 may be less than the area of ​​the covered portion. The opening 30 only needs to expose at least a part of the first inorganic film 26, and its planar shape is arbitrary. The description of the shape of the opening 30, etc., is as described above and will be omitted here.

[0228] The second inorganic film 29 is drawn out from the first inorganic film 26 side toward the periphery of the outer surface 9, and coats the main surface insulating film 12 in a film-like manner in the region between the periphery of the outer surface 9 and the first inorganic film 26. The second inorganic film 29 is formed with a gap inward from the periphery of the outer surface 9 (first to fourth sides 7A to 7D), and has a periphery end wall that exposes the periphery of the outer surface 9. The periphery end wall of the second inorganic film 29, together with the periphery end wall of the main surface insulating film 12, defines a notched opening 31 that exposes the periphery of the outer surface 9.

[0229] The second inorganic film 29 is drawn out from the first inorganic film 26 side toward the active surface 8 side, and covers the main surface insulating film 12 in a film-like manner in the region between the active surface 8 and the first inorganic film 26. The second inorganic film 29 is drawn out from above the main surface insulating film 12 onto the sidewall structure 13. The second inorganic film 29 covers the entire area of ​​the sidewall structure 13 in a film-like manner and is drawn out from above the active surface 8 onto the outer surface 9, crossing the first to fourth connecting surfaces 10A to 10D. The second inorganic film 29 covers the entire area of ​​the active surface 8 with the main surface insulating film 12 in between.

[0230] Thus, the second inorganic film 29 has a portion that covers the active surface 8 and a portion that covers the first inorganic film 26. The portion of the second inorganic film 29 that covers the first inorganic film 26 is located on the second main surface 6 side of the portion of the second inorganic film 29 that covers the active surface 8. The second inorganic film 29 forms a part of the fifth protruding structure 20E on its outer surface 9, and at the same time covers the active surface 8, the outer surface 9, and the first to fourth connecting surfaces 10A to 10D (sidewall structure 13).

[0231] In this embodiment, the SiC semiconductor device 71 does not have a nitride film covering the fifth protruding structure 20E. The SiC semiconductor device 71 does not have a nitride film covering the region between the fifth protruding structure 20E and the active surface 8. The SiC semiconductor device 71 does not have a nitride film covering the region between the fifth protruding structure 20E and the periphery of the outer surface 9. The SiC semiconductor device 71 does not have a nitride film covering the first main surface electrode 32.

[0232] The SiC semiconductor device 71 includes an organic film 33 that covers the fifth protruding structure 20E on the outer surface 9 side. The organic film 33 may be made of the same material and thickness as the organic film 33 according to the first embodiment. The organic film 33 directly covers the fifth protruding structure 20E on the outer surface 9 side. Therefore, no nitride film is interposed between the fifth protruding structure 20E and the organic film 33. No nitride film is interposed between the outer surface 9 and the organic film 33. Only inorganic materials other than nitride film are interposed between the outer surface 9 and the organic film 33.

[0233] The organic film 33 overlaps the second inorganic film 29 from both the first and second edges of the first inorganic film 26, covering the first inorganic film 26. Specifically, the organic film 33 enters the opening 30 from above the second inorganic film 29 and covers the first inorganic film 26 within the opening 30. The organic film 33 directly covers both the first inorganic film 26 and the second inorganic film 29. In this configuration, the organic film 33 directly covers the entire area of ​​the fifth protruding structure 20E. The organic film 33 engages with the fifth protruding structure 20E and simultaneously engages with the opening 30.

[0234] The organic film 33 extends from the fifth protruding structure 20E towards the periphery of the outer surface 9 and covers the second inorganic film 29 in the region between the periphery of the outer surface 9 and the first inorganic film 26. The organic film 33 is formed with a gap inward from the periphery of the outer surface 9 (first to fourth sides 7A to 7D) and has a periphery end wall that exposes the periphery of the outer surface 9. The periphery end wall of the organic film 33 defines a dicing street 34 that exposes the periphery of the outer surface 9. The periphery end wall of the organic film 33 may also be formed with a gap towards the active surface 8 from the periphery end wall (notch opening 31) of the second inorganic film 29. In other words, the dicing street 34 may expose the second inorganic film 29 in addition to the periphery of the outer surface 9.

[0235] The organic film 33 is drawn out from the fifth protruding structure 20E side toward the active surface 8 side, and covers the second inorganic film 29 in the region between the active surface 8 and the fifth protruding structure 20E. The organic film 33 is drawn out from above the second inorganic film 29 onto the sidewall structure 13. The organic film 33 covers the entire area of ​​the sidewall structure 13 with the second inorganic film 29 in between, and is drawn out from above the active surface 8 onto the outer surface 9, crossing the first to fourth connecting surfaces 10A to 10D.

[0236] The organic film 33 covers the peripheral edge of the first main electrode 32 on the active surface 8. Preferably, the organic film 33 covers the entire peripheral edge of the first main electrode 32. In other words, the organic film 33 covers the active surface 8 (periphery of the first main electrode 32), the outer surface 9 (fifth protruding structure 20E), and the first to fourth connecting surfaces 10A to 10D (sidewall structure 13) in such a way that it fills in the step between the active surface 8 and the outer surface 9.

[0237] The fifth protruding structure 20E is not limited to the form shown in Figure 12, but can take various forms. Other examples of the fifth protruding structure 20E are shown below with reference to Figures 13A to 13C. Figure 13A is an enlarged cross-sectional view showing the fifth protruding structure 20E according to the second embodiment. Hereinafter, structures corresponding to the structure shown in Figure 12 will be given the same reference numerals, and their descriptions will be omitted. Referring to Figure 13A, the second inorganic film 29 may have an opening 30 that exposes either one or both of the first and second sides of the first inorganic film 26. The opening 30 may form a gap 37 between itself and either one or both of the first and second sides of the first inorganic film 26.

[0238] In other words, in this embodiment, the fifth protruding structure 20E includes a gap 37 formed between the first inorganic film 26 and the second inorganic film 29. The width of the gap 37 is arbitrary, but may be between 0.1 μm and 50 μm. The opening 30 is formed at a distance from the first inorganic film 26, and may expose the entire area of ​​the first inorganic film 26. In this embodiment, the organic film 33 directly covers the first inorganic film 26 within the opening 30. The organic film 33 extends into the gap 37 and directly covers either or both of the first and second sides of the first inorganic film 26 within the gap 37.

[0239] Figure 13B is an enlarged cross-sectional view showing the fifth protruding structure 20E according to the third embodiment. Hereinafter, structures corresponding to the structure shown in Figure 12 will be given the same reference numerals, and their descriptions will be omitted. Referring to Figure 13B, the first inorganic film 26 may have at least one removal portion 42a and at least one covering portion 42b alternately formed along either or both of the first direction X and the second direction Y. The removal portion 42a consists of an opening or notch in which the first inorganic film 26 is partially removed so as to selectively expose the main surface insulating film 12. The covering portion 42b consists of a portion of the first inorganic film 26 that selectively covers the main surface insulating film 12.

[0240] The first inorganic film 26 only needs to have an uneven structure formed by the removal portion 42a and the coating portion 42b, and the position, size, planar shape, etc. of the removal portion 42a and the coating portion 42b are arbitrary. The first inorganic film 26 can take various forms depending on the shape of at least one removal portion 42a and at least one coating portion 42b.

[0241] For example, if the first inorganic film 26 has at least one removal portion 42a, the at least one removal portion 42a may be formed in the shape of a strip, annular, or zigzag (cross-shaped) extending in a first direction X and / or a second direction Y in a plan view. If the first inorganic film 26 has a plurality of removal portions 42a, the plurality of removal portions 42a may be formed in the shape of dots or stripes (a plurality of stripes) spaced apart in the first direction X and / or the second direction Y.

[0242] Similarly, if the first inorganic film 26 has at least one coating portion 42b, the at least one coating portion 42b may be formed in a strip-like, annular, or zigzag (folded) shape extending in a first direction X and / or a second direction Y in a plan view. If the first inorganic film 26 has a plurality of coating portions 42b, the plurality of coating portions 42b may be formed in a dot-like or stripe-like (multiple strip-like) shape with intervals in the first direction X and / or the second direction Y.

[0243] In this embodiment, the organic film 33 directly coats the first inorganic film 26 within the opening 30 of the second inorganic film 29. Specifically, the organic film 33 enters the removal portion 42a from above the coating portion 42b within the opening 30, and directly coats the main surface insulating film 12 and the first inorganic film 26 within the removal portion 42a. In this embodiment, an example in which the removal portion 42a exposes the main surface insulating film 12 has been described. However, the removal portion 42a may penetrate the main surface insulating film 12 and expose the SiC chip 2 (SiC epitaxial layer 4). In this case, the organic film 33 directly coats the SiC chip 2, the main surface insulating film 12 and the first inorganic film 26 within the removal portion 42a.

[0244] Figure 13C is an enlarged cross-sectional view showing the fifth protruding structure 20E according to the fourth embodiment. Hereafter, structures corresponding to the structure shown in Figure 12 will be given the same reference numerals, and their descriptions will be omitted. Referring to Figure 13C, in this embodiment, the second inorganic film 29 covers the entire area of ​​the first inorganic film 26 and does not have an opening 30. The organic film 33 faces the entire area of ​​the first inorganic film 26 with the second inorganic film 29 in between. A fifth protruding structure 20E having such an embodiment may be adopted.

[0245] The SiC semiconductor device 71 may simultaneously include at least two of the fifth protruding structures 20E according to the first to fourth embodiments. The SiC semiconductor device 71 may also include a fifth protruding structure 20E that simultaneously includes at least two of the features of the fifth protruding structure 20E according to the first to fourth embodiments.

[0246] As described above, the SiC semiconductor device 71 includes a SiC chip 2 (chip), a functional device, a fifth protruding structure 20E (protruding structure), and an organic film 33. The SiC chip 2 has a first main surface 5 on one side and a second main surface 6 on the other side. The first main surface 5 includes an active surface 8 set on the inner part and an outer surface 9 set on the peripheral edge. The functional device is formed on the active surface 8 side. The fifth protruding structure 20E contains inorganic material and protrudes toward the outer surface 9 side. In other words, the fifth protruding structure 20E is formed toward the outer surface 9 side so as to protrude toward the opposite side from the second main surface 6. The organic film 33 covers the fifth protruding structure 20E.

[0247] This structure allows the adhesion force of the organic film 33 to the SiC chip 2 to be increased by the fifth protruding structure 20E. This suppresses the peeling of the organic film 33 from the SiC chip 2. Therefore, a SiC semiconductor device 71 with improved reliability can be provided.

[0248] The fifth protruding structure 20E preferably includes a first inorganic film 26 that protrudes from the outer surface 9. The fifth protruding structure 20E may also include a second inorganic film 29 that covers at least a portion of the first inorganic film 26 on the outer surface 9 and forms a protruding structure together with the first inorganic film 26 (see Figures 12 to 13C).

[0249] In this case, it is preferable that the organic film 33 covers at least the second inorganic film 29 on the outer surface 9. With this structure, the adhesion force of the organic film 33 to the SiC chip 2 can be increased by the fifth protruding structure 20E including the first inorganic film 26 and the second inorganic film 29. This suppresses the peeling of the organic film 33 from the SiC chip 2. Thus, a SiC semiconductor device 71 with improved reliability can be provided.

[0250] The second inorganic film 29 may have an opening 30 that overlaps with at least a portion of the first inorganic film 26 in a plan view (see Figures 12 to 13C). In other words, the second inorganic film 29 may expose at least a portion of the first inorganic film 26. It is preferable that the organic film 33 directly covers the first inorganic film 26.

[0251] The second inorganic film 29 may expose the entire area of ​​the first inorganic film 26 (see Figure 13B). In this case, the second inorganic film 29 may be formed on the outer surface 9 at a distance from the first inorganic film 26 such that a gap 37 is formed between it and the first inorganic film 26. In this case, the organic film 33 may fill the gap 37 on the outer surface 9 and cover the first inorganic film 26 and the second inorganic film 29. Of course, the second inorganic film 29 may cover the entire area of ​​the mesa portion 21 (see Figure 13C).

[0252] Figure 14 is a plan view illustrating an example of a configuration in which a SiC-MISFET is applied as a functional device in the first to fifth embodiments. Figure 15 is a cross-sectional view along the line XV-XV shown in Figure 14. Hereinafter, a SiC semiconductor device including a SiC-MISFET will be referred to as a "SiC semiconductor device SD". Any one of the SiC semiconductor devices 1, 41, 51, 61, and 71 of the first to fifth embodiments will be applied as a "SiC semiconductor device SD". Hereinafter, the same reference numerals will be used for structures corresponding to the structures described in the first to fifth embodiments, and their descriptions will be omitted.

[0253] Referring to Figures 14 and 15, the SiC semiconductor device SD includes a SiC-MISFET as an example of a functional device. The SiC semiconductor device SD includes an n-type (first conductivity type) first semiconductor region 81 formed on the surface layer of the second main surface 6. The first semiconductor region 81 forms the drain of the SiC-MISFET. The first semiconductor region 81 may also be referred to as the drain region. The first semiconductor region 81 has a substantially constant n-type impurity concentration in the thickness direction. The first semiconductor region 81 is formed over the entire surface layer of the second main surface 6 and includes the second main surface 6 and parts of the first to fourth sides 7A to 7D. In this embodiment, the first semiconductor region 81 is formed by an n-type SiC substrate 3.

[0254] The SiC semiconductor device SD includes an n-type second semiconductor region 82 formed on the surface of the first main surface 5. The second semiconductor region 82 is electrically connected to the first semiconductor region 81 and together with the first semiconductor region 81 forms the drain of the SiC-MISFET. The second semiconductor region 82 may also be referred to as the drift region. The second semiconductor region 82 has an n-type impurity concentration lower than that of the first semiconductor region 81. The second semiconductor region 82 is formed over the entire surface of the first main surface 5 and includes the first main surface 5 and parts of the first to fourth side surfaces 7A to 7D. In this embodiment, the second semiconductor region 82 is formed by an n-type SiC epitaxial layer 4.

[0255] The SiC semiconductor device SD includes a p-type (second conductivity type) body region 83 formed on the surface layer of the active surface 8. The body region 83 forms part of the body diode of the SiC-MISFET. The body region 83 may be formed over the entire surface layer of the active surface 8.

[0256] The SiC semiconductor device SD includes an n-type source region 84 formed on the surface of the body region 83. The source region 84 forms the source of the SiC-MISFET. The source region 84 may be formed over the entire surface of the body region 83. The source region 84 has an n-type impurity concentration that exceeds the n-type impurity concentration of the second semiconductor region 82. The source region 84 forms a channel of the SiC-MISFET with the second semiconductor region 82 within the body region 83.

[0257] The SiC semiconductor device SD includes a plurality of trench gate structures 85 formed on the active surface 8 so as to extend across the body region 83 and the source region 84 to the second semiconductor region 82. The plurality of trench gate structures 85 form the gate of the SiC-MISFET and control the on / off state of the channel. In other words, the SiC-MISFET is of the trench gate type.

[0258] The plurality of trench gate structures 85 are each formed in a strip shape (rectangular shape) extending in the first direction X in a plan view, and may be formed at intervals in the second direction Y. Each trench gate structure 85 is formed at a distance from the bottom of the second semiconductor region 82 toward the active surface 8 side, and faces the first semiconductor region 81 across a part of the second semiconductor region 82.

[0259] The plurality of trench gate structures 85 each have a gate width WG. The gate width WG is the width in a direction orthogonal to the direction in which the trench gate structure 85 extends. The gate width WG may be 0.1 μm or more and 3 μm or less. The gate width WG is preferably 0.5 μm or more and 1.5 μm or less. The gate width WG preferably has a value within the range of ±10% of the value of the trench width WT of the trench structure 52. The gate width WG is preferably substantially equal to the trench width WT (WG≒WT).

[0260] The plurality of trench gate structures 85 each have a first depth D1. The first depth D1 is preferably less than the depression depth DO (D1 < DO). That is, the first depth D1 is preferably less than the trench depth DT of the trench structure 52 (D1 < DT).

[0261] Each trench gate structure 85 includes a gate trench 86, a gate insulating film 87, and a gate electrode 88. The gate trench 86 is formed on the active surface 8 and forms the side wall and the bottom wall of the trench gate structure 85. The gate insulating film 87 is formed in a film shape on the inner wall of the gate trench 86 and covers the second semiconductor region 82, the body region 83, and the source region 84. The gate electrode 88 is embedded in the gate trench 86 with the gate insulating film 87 interposed therebetween. The gate electrode 88 faces the second semiconductor region 82, the body region 83, and the source region 84 with the gate insulating film 87 interposed therebetween. A gate potential is applied to the gate electrode 88.

[0262] The SiC semiconductor device SD includes a plurality of trench source structures 89 formed on the active surface 8 so as to reach the second semiconductor region 82 across the body region 83 and the source region 84. The plurality of trench source structures 89 are respectively formed in the region between two adjacent trench gate structures 85 on the active surface 8. The plurality of trench source structures 89 may each be formed in a strip shape extending in the first direction X in a plan view. Each trench source structure 89 is formed at an interval from the bottom of the second semiconductor region 82 toward the active surface 8 side, and faces the first semiconductor region 81 across a part of the second semiconductor region 82.

[0263] The plurality of trench source structures 89 each have a source width WS. The source width WS is the width in a direction orthogonal to the direction in which the trench source structure 89 extends. The source width WS may be 0.1 μm or more and 3 μm or less. The source width WS is preferably 0.5 μm or more and 1.5 μm or less. The source width WS preferably has a value within the range of ±10% of the value of the trench width WT of the trench structure 52. The source width WS is preferably substantially equal to the trench width WT (WS≈WT).

[0264] Each trench source structure 89 has a second depth D2 (D1 < D2) that exceeds the first depth D1 of the trench gate structure 85. The second depth D2 is preferably 1.5 times or more and 3 times or less the first depth D1. The bottom wall of each trench source structure 89 is located on the bottom side of the second semiconductor region 82 with respect to the bottom wall of each trench gate structure 85. The second depth D2 preferably has a value within the range of ±10% of the value of the trench depth DT of the trench structure 52. The second depth D2 is preferably substantially equal to the trench depth DT (D2≈DT). Of course, each trench source structure 89 may have a second depth D2 that is substantially equal to the first depth D1 (D1≈D2).

[0265] The plurality of trench source structures 89 are arranged at a second interval I2 from the plurality of trench gate structures 85. The second interval I2 is the distance between adjacent trench gate structures 85 and trench source structures 89. The second interval I2 may be 0.1 μm or more and 2.5 μm or less. The second interval I2 is preferably 0.5 μm or more and 1.5 μm or less.

[0266] The second interval I2 is preferably less than the gate width WG (source width WS) (I2 < WG, WS). Of course, the second interval I2 may be equal to or greater than the gate width WG (source width WS). The second interval I2 preferably has a value within the range of ±10% of the value of the first interval I1 of the trench structure 52. The second interval I2 is preferably substantially equal to the first interval I1 (I1 ≒ I2).

[0267] Each trench source structure 89 includes a source trench 90, a source insulating film 91, and a source electrode 92. The source trench 90 is formed on the active surface 8 and forms the side walls and the bottom wall of the trench source structure 89. The source insulating film 91 is formed in a film shape on the inner wall of the source trench 90 and covers the second semiconductor region 82, the body region 83, and the source region 84. The source electrode 92 is embedded in the source trench 90 with the source insulating film 91 interposed therebetween. A source potential is applied to the source electrode 92.

[0268] The SiC semiconductor device SD includes a plurality of p-type well regions 93 formed respectively in regions along the plurality of trench source structures 89 in the surface layer portion of the active surface 8. The p-type impurity concentration of the plurality of well regions 93 is preferably higher than the p-type impurity concentration of the body region 83. The plurality of well regions 93 respectively cover the corresponding trench source structures 89 in a one-to-one correspondence. Each well region 93 may be formed in a strip shape extending along the corresponding trench source structure 89. Each well region 93 covers the side walls and the bottom wall of each trench source structure 89 and is electrically connected to the body region 83.

[0269] The SiC semiconductor device SD includes a plurality of p-type gate well regions 94 formed in regions along a plurality of trench gate structures 85 in the surface layer portion of the active surface 8. The p-type impurity concentration of the plurality of gate well regions 94 is preferably substantially equal to the p-type impurity concentration of the well region 93. The plurality of gate well regions 94 may cover the corresponding trench gate structures 85 in a one-to-one correspondence.

[0270] Each gate well region 94 may be formed in a strip shape extending along the corresponding trench gate structure 85. Each gate well region 94 covers the side walls and the bottom wall of each trench gate structure 85 and is electrically connected to the body region 83. The bottoms of the plurality of gate well regions 94 are located on the bottom wall side of the trench gate structure 85 with respect to the bottoms of the plurality of well regions 93.

[0271] FIG. 16A is a cross-sectional view showing a cross-sectional structure along the XVI-XVI line shown in FIG. 15 together with the third protruding structure 20C. Here, an example in which the third protruding structure 20C is formed on the outer surface 9 side will be described. However, instead of the third protruding structure 20C, at least one of the first protruding structure 20A, the second protruding structure 20B, and the fourth protruding structure 20D may be formed. Further, instead of the third protruding structure 20C, a protruding structure including at least two features of the first protruding structure 20A, the second protruding structure 20B, and the fourth protruding structure 20D may be included.

[0272] Referring to FIG. 16A, the SiC semiconductor device SD may include a p-type floating body region 95 formed in an electrically floating state in the surface layer portion of the top surface 22 of the mesa portion 21. The floating body region 95 has a p-type impurity concentration equal to the p-type impurity concentration of the body region 83. The floating body region 95 is formed over the entire surface layer portion of the top surface 22 and is exposed from the first wall surface 23 and the second wall surface 24 of the mesa portion 21.

[0273] The SiC semiconductor device SD may include an n-type floating source region 96 that is electrically suspended in the surface layer of the floating body region 95. The floating source region 96 has an n-type impurity concentration equal to that of the source region 84. The floating source region 96 is formed over the entire surface layer of the floating body region 95 and is exposed from the first wall surface 23 and the second wall surface 24 of the mesa portion 21. The floating source region 96, together with the floating body region 95, forms a single floating impurity region on the surface layer of the top surface 22. The aforementioned trench structure 52 is formed on the top surface 22 so as to penetrate the floating body region 95 and the floating source region 96.

[0274] The SiC semiconductor device SD may include a plurality of p-type floating well regions 97 that are electrically floating in regions along a plurality of trench structures 52 on the surface layer of the top surface 22 of the mesa portion 21. In the case of the first and second protruding structures 20A to 20B that do not have trench structures 52, the floating well regions 97 may be removed.

[0275] Each of the floating well regions 97 has a p-type impurity concentration equal to that of the well region 93. Each of the floating well regions 97 covers a corresponding trench structure 52 in a one-to-one correspondence. Each of the floating well regions 97 may be formed in a strip shape extending along the corresponding trench source structure 89. Each floating well region 97 covers the side and bottom walls of each trench source structure 89 and is connected to the floating body region 95.

[0276] The SiC semiconductor device SD may include a plurality of p-type second floating well regions 98 that are electrically floating in regions along either or both of the first wall surface 23 and the second wall surface 24 within the mesa portion 21. In this embodiment, the SiC semiconductor device SD includes a plurality of second floating well regions 98 formed on the surface of the first wall surface 23 and the surface of the second wall surface 24.

[0277] Multiple second floating well regions 98 have a p-type impurity concentration equal to that of the well region 93. Multiple second floating well regions 98 may cover the entire area of ​​the first wall surface 23 and the entire area of ​​the second wall surface 24. The second floating well regions 98 may be drawn out towards the active surface 8 side at the surface of the outer surface 9 via the first wall surface 23 and the corners of the outer surface 9. The second floating well regions 98 may be drawn out towards the peripheral area of ​​the outer surface 9 via the second wall surface 24 and the corners of the outer surface 9 at the surface of the outer surface 9. Each second floating well region 98 covers the side and bottom walls of each trench source structure 89 and is connected to the floating body region 95.

[0278] Figure 16A illustrates an example in which the SiC semiconductor device SD includes a floating body region 95, a floating source region 96, a floating well region 97, and a second floating well region 98. However, the SiC semiconductor device SD does not necessarily need to include all of the floating body region 95, floating source region 96, floating well region 97, and second floating well region 98 simultaneously. The SiC semiconductor device SD may have at least one of the floating body region 95, floating source region 96, floating well region 97, and second floating well region 98. Of course, a SiC semiconductor device SD that does not have all of the floating body region 95, floating source region 96, floating well region 97, and second floating well region 98 may also be used.

[0279] Referring again to Figures 14 and 15, the SiC semiconductor device SD includes a p-type outer contact region 99 formed on the surface layer of the outer surface 9. The outer contact region 99 may also be referred to as the "anode region". Preferably, the outer contact region 99 has a p-type impurity concentration that exceeds the p-type impurity concentration of the body region 83.

[0280] The outer contact region 99 is formed in the region between the periphery of the active surface 8 and the periphery of the outer surface 9, spaced apart from the periphery of the active surface 8 (first to fourth connecting surfaces 10A to 10D) and the periphery of the outer surface 9 (first to fourth sides 7A to 7D) in a plan view. Specifically, the outer contact region 99 is formed in the region between the active surface 8 and the mesa portion 21 (third protruding structure 20C), spaced apart from the active surface 8 and the mesa portion 21 in a plan view. The outer contact region 99 is formed in a band shape extending along the mesa portion 21 in a plan view. The outer contact region 99 may also be formed in an annular shape (specifically, a square annular shape) surrounding the active surface 8 in a plan view.

[0281] The outer contact region 99 is formed with a gap between the bottom of the second semiconductor region 82 and the outer surface 9. The entire outer contact region 99 is located on the bottom side of the second semiconductor region 82 relative to the bottom walls of the multiple trench gate structures 85. The bottom of the outer contact region 99 is located on the bottom side of the second semiconductor region 82 relative to the bottom walls of the trench structure 52 and the multiple trench source structures 89. The outer contact region 99 forms a pn junction with the second semiconductor region 82. This forms a pn junction diode with the outer contact region 99 as the anode and the second semiconductor region 82 as the cathode.

[0282] The SiC semiconductor device SD includes a p-type outer well region 100 formed on the surface layer of the outer surface 9. The outer well region 100 has a p-type impurity concentration less than that of the outer contact region 99. Preferably, the p-type impurity concentration of the outer well region 100 is approximately equal to that of the well region 93. In a plan view, the outer well region 100 is formed in the region between the periphery of the active surface 8 (first to fourth connecting surfaces 10A to 10D) and the outer contact region 99.

[0283] The outer well region 100 is formed in a band shape extending along the active surface 8 in a plan view. The outer well region 100 may also be formed in an annular shape (specifically, a square annular shape) surrounding the active surface 8 in a plan view. The outer well region 100 is electrically connected to the outer contact region 99. The outer well region 100 may extend from the outer surface 9 toward the first to fourth connection surfaces 10A to 10D and cover the first to fourth connection surfaces 10A to 10D within the SiC chip 2. The outer well region 100 may be electrically connected to the body region 83 and the well region 93 at the surface layer of the first to fourth connection surfaces 10A to 10D.

[0284] The outer well region 100 is formed deeper than the outer contact region 99. The outer well region 100 is formed with a gap between the bottom of the second semiconductor region 82 and the outer surface 9. The outer well region 100 is located on the bottom side of the second semiconductor region 82 with respect to the bottom walls of the multiple trench gate structures 85. The bottom of the outer well region 100 is located on the bottom side of the second semiconductor region 82 with respect to the bottom walls of the trench structure 52 and the trench source structure 89.

[0285] The outer well region 100, together with the outer contact region 99, forms a pn junction with the second semiconductor region 82. The outer well region 100 forms a pn junction with the second semiconductor region 82 in the portion along the first to fourth connection surfaces 10A to 10D. In other words, a pn junction is formed in the portion along the first to fourth connection surfaces 10A to 10D within the SiC chip 2.

[0286] The SiC semiconductor device SD includes at least one (preferably two to twenty) p-type field regions 101 formed in the surface layer of the outer surface 9 between the outer contact region 99 and the peripheral edge of the outer surface 9 (first to fourth side surfaces 7A to 7D). In this embodiment, the SiC semiconductor device SD includes four field regions 101.

[0287] Multiple field regions 101 are formed in the region between the outer contact region 99 and the mesa portion 21 (third protruding structure 20C) in a plan view. The multiple field regions 101 are formed with spacing between them, from the outer contact region 99 side toward the mesa portion 21 side. At least one of the field regions 101 may overlap the first coating film 27 of the third protruding structure 20C in a plan view.

[0288] The field regions 101 relax the electric field within the SiC chip 2 on the outer surface 9. The number, width, depth, and p-type impurity concentration of the field regions 101 are arbitrary and can take various values ​​depending on the electric field to be relaxed. Each field region 101 may be formed in a band shape extending along the active surface 8 in a plan view. Each field region 101 may be formed in an annular shape (specifically, a square annular shape) surrounding the active surface 8 in a plan view. Each field region 101 may also be called an FLR (Field Limiting Ring) region.

[0289] The innermost field region 101 may be connected to the outer contact region 99. The innermost field region 101 may form a pn junction with the second semiconductor region 82 together with the outer contact region 99. Field regions 101 other than the innermost field region 101 may be formed in an electrically floating state. Each field region 101 is formed deeper than the outer contact region 99.

[0290] Each field region 101 is formed with a gap between the bottom of the second semiconductor region 82 and the outer surface 9. Each field region 101 is located on the bottom side of the second semiconductor region 82 with respect to the bottom walls of the multiple trench gate structures 85. The bottom of each field region 101 is located on the bottom side of the second semiconductor region 82 with respect to the bottom walls of the trench structure 52 and the bottom walls of the trench source structure 89.

[0291] The SiC semiconductor device SD includes the main surface insulating film 12 covering the active surface 8. The main surface insulating film 12 is continuous with the gate insulating film 87 and the source insulating film 91, and exposes the gate electrode 88 and the source electrode 92. The SiC semiconductor device SD includes the aforementioned second inorganic film 29 formed on the main surface insulating film 12. The second inorganic film 29 selectively covers the active surface 8 on the main surface insulating film 12. The second inorganic film 29 has a plurality of contact openings 102 that selectively expose the plurality of trench gate structures 85, the plurality of trench source structures 89, and the outer contact region 99, respectively.

[0292] The SiC semiconductor device SD includes the aforementioned first main surface electrode 32 formed on the second inorganic film 29 on the active surface 8. The first main surface electrode 32 includes a gate main surface electrode 111, a source main surface electrode 112, a gate wiring electrode 113, and a source wiring electrode 114. The gate main surface electrode 111 may be referred to as a gate pad electrode. The source main surface electrode 112 may be referred to as a source pad electrode. The gate wiring electrode 113 may be referred to as a gate finger electrode. The source wiring electrode 114 may be referred to as a source finger electrode.

[0293] In this form, the gate main surface electrode 111 is disposed in a region close to the central portion of the first connection surface 10A at the peripheral portion of the active surface 8. The gate main surface electrode 111 is formed in a rectangular shape having four sides parallel to the first main surface 5 (active surface 8) in plan view. The gate main surface electrode 111 is electrically connected to the plurality of trench gate structures 85 (gate electrodes 88) and transmits the gate potential (gate signal) input from the outside to the plurality of trench gate structures 85.

[0294] The source main surface electrode 112 is disposed on the active surface 8 at a distance from the gate main surface electrode 111. In this form, the source main surface electrode 112 is formed in a rectangular shape having four sides parallel to the active surface 8 in plan view. Specifically, the source main surface electrode 112 is formed in a polygonal shape having a recess that is recessed inwardly of the active surface 8 so as to be aligned with the gate main surface electrode 111 along the side along the first connection surface 10A in plan view.

[0295] The source main surface electrode 112 penetrates through multiple contact openings 102 from above the second inorganic film 29 and is electrically connected to multiple trench source structures 89, multiple source regions 84, and multiple well regions 93. The source main surface electrode 112 transmits the source potential input from the outside to the multiple trench source structures 89, multiple source regions 84, and multiple well regions 93.

[0296] The gate wiring electrode 113 is drawn out from the gate main surface electrode 111 onto the second inorganic film 29. In a plan view, the gate wiring electrode 113 is formed within a region surrounded by the periphery of the active surface 8 (first to fourth connection surfaces 10A to 10D). In a plan view, the gate wiring electrode 113 is formed in a strip shape extending along the periphery of the active surface 8 and faces the source main surface electrode 112 from multiple directions.

[0297] The gate wiring electrode 113 intersects (specifically, perpendicularly) the end of the trench gate structure 85 in a plan view. The gate wiring electrode 113 enters into multiple contact openings 102 from above the second inorganic film 29 and is electrically connected to multiple trench gate structures 85 (gate electrodes 88). The gate wiring electrode 113 transmits the gate potential applied to the gate main surface electrode 111 to the multiple trench gate structures 85.

[0298] The source wiring electrode 114 is drawn out from the source main surface electrode 112 onto the second inorganic film 29. In a plan view, the source wiring electrode 114 is formed in a strip shape extending along the periphery of the active surface 8 (first to fourth connection surfaces 10A to 10D) and faces the source main surface electrode 112 from multiple directions. In this configuration, the source wiring electrode 114 is formed in an annular shape (specifically, a square annular shape) that collectively surrounds the gate main surface electrode 111, the source main surface electrode 112, and the gate wiring electrode 113 in a plan view.

[0299] In this configuration, the source wiring electrode 114 covers the sidewall structure 13 with the second inorganic film 29 in between, and is routed from the active surface 8 side to the outer surface 9 side. The source wiring electrode 114 covers the outer contact region 99 on the outer surface 9. Preferably, the source wiring electrode 114 covers the entire area of ​​the sidewall structure 13 and the entire area of ​​the outer contact region 99 around its entire circumference. The source wiring electrode 114 enters the contact opening 102 from above the second inorganic film 29 and is electrically connected to the outer contact region 99. The source wiring electrode 114 transmits the source potential applied to the source main surface electrode 112 to the multiple outer contact regions 99.

[0300] The SiC semiconductor device SD includes the aforementioned organic film 33 that selectively coats the second inorganic film 29 and the first main surface electrode 32. The organic film 33 has a plurality of pad openings 35. The plurality of pad openings 35 include a gate pad opening 115 and a source pad opening 116. The gate pad opening 115 exposes the inner portion of the gate main surface electrode 111. The source pad opening 116 exposes the inner portion of the source main surface electrode 112.

[0301] The SiC semiconductor device SD includes the aforementioned second main surface electrode 36 that covers the second main surface 6. The second main surface electrode 36 may also be called a drain electrode. The second main surface electrode 36 covers the entire area of ​​the second main surface 6 and is connected to the periphery of the second main surface 6 (first to fourth side surfaces 7A to 7D). The second main surface electrode 36 forms ohmic contact with the first semiconductor region 81 (second main surface 6).

[0302] Figure 16B is a cross-sectional view showing the cross-sectional structure along the line XVI-XVI shown in Figure 15, together with the fifth protruding structure 20E. Hereafter, the same reference numerals are used for structures corresponding to those described in Figures 14 to 16A, and their descriptions are omitted. Referring to Figure 16B, the SiC semiconductor device SD has a fifth protruding structure 20E instead of the first to fourth protruding structures 20D. On the outer surface 9 side, the SiC semiconductor device SD includes an outer contact region 99, an outer well region 100, and at least one (or more in this embodiment) field regions 101, similar to the case in Figure 16A.

[0303] Multiple field regions 101 are formed in the region between the active surface 8 and the fifth protruding structure 20E, spaced apart from the active surface 8 and the fifth protruding structure 20E in a plan view. At least one field region 101 may overlap the first inorganic film 26 in a plan view. When the fifth protruding structure 20E is employed, the floating body region 95, floating source region 96, floating well region 97, and second floating well region 98 are not formed.

[0304] In a SiC semiconductor device SD, the sidewall structure 13 may be a sidewall wiring electrically connected to a trench source structure 89 (source electrode 92). In this case, the trench source structure 89 may penetrate at least one of the first to fourth connection surfaces 10A to 10D. In this case, the sidewall structure 13 may be connected to the trench source structure 89 at the first to fourth connection surfaces 10A to 10D. Furthermore, in this case, the source electrode 92 may be integral with the sidewall structure 13.

[0305] In the SiC semiconductor device SD, a SiC-MISFET without a trench source structure 89 may be used. Alternatively, a planar gate type SiC-MISFET may be used in the SiC semiconductor device SD.

[0306] The present invention can be implemented in yet other forms.

[0307] For example, the first to fifth protruding structures 20A to 20E may be combined in any manner among them. That is, a SiC semiconductor device may be used that simultaneously includes at least two of the first to fifth protruding structures 20A to 20E. Alternatively, a SiC semiconductor device may be used that includes a protruding structure that simultaneously includes at least two of the features of the first to fifth protruding structures 20A to 20E.

[0308] In the embodiments described above, examples were given in which a single first to fifth protruding structure 20A to 20E is formed on the outer surface 9 side. However, in the embodiments described above, a plurality of first to fifth protruding structures 20A to 20E may be formed. The plurality of first to fifth protruding structures 20A to 20E may be formed at intervals from the active surface 8 side to the outer surface 9 side, or they may be formed at intervals along the active surface 8 so as to surround the active surface 8 in a plan view.

[0309] In each of the embodiments described above, the opening 30 may penetrate the mesa insulating film 25 to expose the top surface 22 (SiC chip 2) of the mesa portion 21. In this case, the organic film 33 directly covers the top surface 22 of the mesa portion 21 within the opening 30.

[0310] In each of the embodiments described above, a SiC-SBD may be used as the functional device. In this case, the first main surface electrode 32 is formed as a cathode electrode that forms a Schottky junction with the SiC chip 2 (SiC epitaxial layer 4). The second main surface electrode 36 is formed as an anode electrode that forms an ohmic contact with the SiC chip 2 (SiC substrate 3).

[0311] In the embodiments described above, examples were given in which the outer surface 9 is recessed in the thickness direction (towards the second main surface 6) of the SiC chip 2. However, the outer surface 9 may be formed to be coplanar with the active surface 8.

[0312] In the embodiments described above, an example was given in which the first direction X is the m-axis direction of the SiC single crystal and the second direction Y is the a-axis direction of the SiC single crystal. However, the first direction X may be the a-axis direction of the SiC single crystal and the second direction Y may be the m-axis direction of the SiC single crystal. That is, the first side surface 7A and the second side surface 7B may be formed by the m-plane of the SiC single crystal, and the third side surface 7C and the fourth side surface 7D may be formed by the a-plane of the SiC single crystal. In this case, the off-direction may be the a-axis direction of the SiC single crystal. The specific configuration in this case can be obtained by replacing the m-axis direction related to the first direction X with the a-axis direction, and replacing the a-axis direction related to the second direction Y with the m-axis direction, as shown in the above description and attached drawings.

[0313] In each of the embodiments described above, a WBG (Wide Band Gap) semiconductor chip made of a WBG semiconductor other than SiC may be used instead of the SiC chip 2. A WBG semiconductor is a semiconductor that has a band gap that exceeds the band gap of Si (silicon). Examples of WBG semiconductors include GaAs (gallium arsenide), GaN (gallium nitride), and diamond. Of course, a Si chip may be used instead of the SiC chip 2 in each of the embodiments described above.

[0314] In the embodiments described above, an example was given in which the first conductivity type is n-type and the second conductivity type is p-type. However, the first conductivity type may be p-type and the second conductivity type may be n-type. In this case, the specific configuration can be obtained by replacing the n-type region with a p-type region and the p-type region with an n-type region, as shown in the above description and attached drawings.

[0315] The following are examples of features extracted from this specification and drawings. [A1]~[A32], [B1]~[B29], [C1]~[C30], [D1]~[D40], [E1]~[E33], and [F1]~[F29] shown below provide semiconductor devices that can improve reliability. The alphanumeric characters in parentheses below represent corresponding components in the embodiments described above, but this is not intended to limit the scope of each item to the embodiments.

[0316] [A1] A semiconductor device (1, 41, 51, 61, 71) comprising: a chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, an active surface (8) set in the inner part of the first main surface (5), and an outer surface (9) set in the peripheral part of the first main surface (5); a functional device formed on the active surface (8) side; protruding structures (20A, 20B, 20C, 20D, 20E (hereinafter simply referred to as "20A~20E")) made of inorganic material and protruding from the outer surface (9) side; and an organic film (33) covering the protruding structures (20A~20E).

[0317] [A2] The protruding structures (20A to 20E) are formed in an electrically floating state in the semiconductor device described in A1 (1, 41, 51, 61, 71).

[0318] [A3] The semiconductor device according to A1 or A2 (1, 41, 51, 61, 71), wherein no nitride film is interposed between the protruding structure (20A~20E) and the organic film (33).

[0319] [A4] A semiconductor device according to any one of A1 to A3 (1, 41, 51, 61, 71), wherein no nitride film is interposed between the outer surface (9) and the organic film (33).

[0320] [A5] The protruding structure (20A~20E) is a semiconductor device according to any one of A1~A4 (1, 41, 51, 61, 71) and does not have a nitride film.

[0321] [A6] The protruding structure (20A~20E) is made of inorganic material, and is a semiconductor device (1, 41, 51, 61, 71) as described in any one of A1 to A5.

[0322] [A7] A semiconductor device according to any one of A1 to A6 (1, 41, 51, 61, 71), wherein, in a plan view, no metal film is formed in the region between the periphery of the chip (2) and the protruding structures (20A to 20E).

[0323] [A8] The protruding structure (20A~20E) is formed at a distance from the periphery of the chip (2) and the active surface (8) in a plan view, as described in any one of A1~A7 (1, 41, 51, 61, 71).

[0324] [A9] The semiconductor device (1, 41, 51, 61, 71) according to any one of A1 to A8, wherein the protruding structure (20A to 20E) has a first side on the active surface (8) side and a second side on the peripheral edge side of the chip (2), and the organic film (33) covers the protruding structure (20A to 20E) such that it covers both the first side and the second side in a plan view.

[0325] [A10] The organic film (33) covers the entire area of ​​the protruding structure (20A to 20E) in a plan view, as described in any one of A1 to A9 (1, 41, 51, 61, 71).

[0326] [A11] The protruding structure (20A~20E) is formed in a strip shape that extends along the active surface (8) in a plan view, according to any one of A1 to A10 (1, 41, 51, 61, 71).

[0327] [A12] The protruding structure (20A~20E) surrounds the active surface (8) in a plan view, as described in any one of A1~A11, semiconductor device (1, 41, 51, 61, 71).

[0328] [A13] The protruding structure (20A~20E) is formed in an endless manner in a plan view, as described in any one of A1~A12, semiconductor device (1, 41, 51, 61, 71).

[0329] [A14] The organic film (33) covers a portion of the active surface (8) in a plan view, as described in any one of A1 to A13 (1, 41, 51, 61, 71).

[0330] [A15] A semiconductor device according to any one of A1 to A14 (1, 41, 51, 61, 71), further comprising a main surface electrode (32) that covers the active surface (8) in a plan view, wherein the organic film (33) covers a part of the main surface electrode (32).

[0331] [A16] The semiconductor device according to A15 (1, 41, 51, 61, 71), wherein no nitride film is interposed between the main surface electrode (32) and the organic film (33).

[0332] [A17] The first main surface (5) includes the active surface (8), the outer surface (9) recessed toward the second main surface (6) relative to the active surface (8), and connecting surfaces (10A to 10D) connecting the active surface (8) and the outer surface (9), and has a plateau (11) partitioned by the active surface (8), the outer surface (9) and the connecting surfaces (10A to 10D), and the protruding structures (20A to 20E) face the plateau (11) in the plane direction of the outer surface (9), as described in any one of A1 to A16 (1, 41, 51, 61, 71).

[0333] [A18] The protruding structure (20A to 20E) comprises at least one of polysilicon and silicon oxide, as described in any one of A1 to A17 (1, 41, 51, 61, 71).

[0334] [A19] The functional device is a semiconductor device (1, 41, 51, 61, 71) according to any one of A1 to A18, which includes a Schottky barrier diode formed on the active surface (8).

[0335] [A20] The functional device is a semiconductor device (1, 41, 51, 61, 71) according to any one of A1 to A19, including an insulated gate type transistor formed on the active surface (8).

[0336] [A21] The chip (2) is a SiC chip (2) and is a semiconductor device (1, 41, 51, 61, 71) as described in any one of A1 to A20.

[0337] [A22] The semiconductor device (1, 41, 51, 61, 71) described in A21, wherein the SiC chip (2) includes a SiC substrate (3) and a SiC epitaxial layer (4).

[0338] [A23] The semiconductor device (1, 41, 51, 61, 71) according to A22, wherein the SiC epitaxial layer (4) has a different impurity concentration than the SiC substrate (3).

[0339] [A24] A semiconductor device (1, 41, 51, 61, 71) consisting of SiC semiconductor devices (1, 41, 51, 61, 71) as described in any one of A1 to A23.

[0340] [A25] A semiconductor device (1, 41, 51, 61, 71) comprising: a chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side; a plateau (11) partitioned on the first main surface (5) by an active surface (8) set in the inner part of the first main surface (5), an outer surface (9) set on the periphery of the first main surface (5) and recessed toward the second main surface (6) relative to the active surface (8), and connecting surfaces (10A~10D) connecting the active surface (8) and the outer surface (9); a functional device formed on the active surface (8) side; a protruding structure (20A~20E) containing inorganic material, protruding toward the outer surface (9) and facing the plateau (11) in the plane direction of the outer surface (9); and an organic film (33) covering the protruding structure (20A~20E).

[0341] [A26] The semiconductor device (1, 41, 51, 61, 71) according to A25, wherein the chip (2) includes a semiconductor substrate (3) and an epitaxial layer (4), and includes a first main surface (5) formed by the epitaxial layer (4) and a second main surface (6) formed by the semiconductor substrate (3), and the base (11) is formed on the epitaxial layer (4).

[0342] [A27] The semiconductor device (1, 41, 51, 61, 71) according to A26, wherein the plateau (11) is formed only on the epitaxial layer (4).

[0343] [A28] A semiconductor device according to any one of A25 to A27 (1, 41, 51, 61, 71), wherein no nitride film is formed in the region between the plateau (11) and the protruding structure (20A to 20E).

[0344] [A29] A semiconductor device according to any one of A25 to A28 (1, 41, 51, 61, 71), wherein no nitride film is formed between the protruding structure (20A to 20E) and the peripheral edge of the first main surface (5).

[0345] [A30] A semiconductor device according to any one of A25 to A29 (1, 41, 51, 61, 71), wherein no nitride film is formed covering the protruding structure (20A to 20E).

[0346] [A31] A semiconductor device according to any one of A25 to A30 (1, 41, 51, 61, 71), further comprising a main surface electrode (32) that covers the active surface (8) in a plan view, wherein the organic film (33) covers a part of the main surface electrode (32).

[0347] [A32] The semiconductor device according to A31 (1, 41, 51, 61, 71), wherein no nitride film is interposed between the main surface electrode (32) and the organic film (33).

[0348] [B1] A semiconductor device (1) comprising: a chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, an active surface (8) set in the inner part of the first main surface (5), and an outer surface (9) set in the peripheral part of the first main surface (5); a functional device formed on the active surface (8) side; a mesa portion (21) formed on the outer surface (9) which is part of the chip (2) and protrudes toward the opposite side from the second main surface (6); a first inorganic film (26) covering at least a part of the mesa portion (21); a second inorganic film (29) covering at least a part of the first inorganic film (26) and forming a protruding structure (20A) together with the mesa portion (21) and the first inorganic film (26); and an organic film (33) covering at least the second inorganic film (29).

[0349] [B2] A chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, including an active surface (8) set in the inner part of the first main surface (5) and an outer surface (9) set in the peripheral edge of the first main surface (5), a functional device formed on the active surface (8) side, a mesa portion (21) formed on the outer surface (9) which is part of the chip (2) and protrudes toward the opposite side from the second main surface (6), and at least a part of the mesa portion (21) A semiconductor device (1) comprising: a first inorganic film (26) to cover; a second inorganic film (29) formed on the outer surface (9) at a distance from the first inorganic film (26) such that a gap (37) is formed between it and the first inorganic film (26), and together with the mesa portion (21) and the first inorganic film (26) to form a protruding structure (20A); and an organic film (33) that fills the gap (37) and covers the mesa portion (21), the first inorganic film (26), and the second inorganic film (29).

[0350] [B3] The semiconductor device (1) according to B1 or B2, wherein the second inorganic film (29) contains an inorganic substance different from the first inorganic film (26).

[0351] [B4] The semiconductor device (1) according to any one of B1 to B3, wherein the first inorganic film (26) is formed in an electrically floating state and the second inorganic film (29) is formed in an electrically floating state.

[0352] [B5] The semiconductor device (1) according to any one of B1 to B4, wherein the first inorganic film (26) contains an inorganic substance other than a nitride, and the second inorganic film (29) contains an inorganic substance other than a nitride.

[0353] [B6] A semiconductor device (1) according to any one of B1 to B5, wherein no nitride film is interposed between the second inorganic film (29) and the organic film (33).

[0354] [B7] A semiconductor device (1) according to any one of B1 to B6, wherein no nitride film is interposed between the first inorganic film (26) and the organic film (33).

[0355] [B8] A semiconductor device (1) according to any one of B1 to B7, wherein no nitride film is interposed between the mesa portion (21) and the organic film (33).

[0356] [B9] A semiconductor device (1) according to any one of B1 to B8, wherein no nitride film is formed on the region between the active surface (8) and the mesa portion (21).

[0357] [B10] A semiconductor device (1) according to any one of B1 to B9, wherein, in a plan view, no metal film is formed in the region between the periphery of the chip (2) and the mesa portion (21).

[0358] [B11] The semiconductor device (1) according to any one of B1 to B10, wherein the mesa portion (21) is formed at a distance from the periphery of the chip (2) and the active surface (8) in a plan view.

[0359] [B12] The semiconductor device (1) according to any one of B1 to B11, wherein the mesa portion (21) has a first side on the active surface (8) side and a second side on the peripheral edge side of the chip (2), and the organic film (33) covers the mesa portion (21) such that it covers both the first side and the second side in a plan view.

[0360] [B13] The semiconductor device (1) according to any one of B1 to B12, wherein the organic film (33) covers the entire area of ​​the mesa portion (21) in a plan view.

[0361] [B14] The semiconductor device (1) according to any one of B1 to B13, wherein the mesa portion (21) is formed in a strip shape extending along the active surface (8) in a plan view.

[0362] [B15] The semiconductor device (1) according to any one of B1 to B14, wherein the mesa portion (21) surrounds the active surface (8) in a plan view.

[0363] [B16] The semiconductor device (1) according to any one of B1 to B15, wherein the mesa portion (21) is formed in an endless manner in a plan view.

[0364] [B17] The semiconductor device (1) according to any one of B1 to B16, wherein the organic film (33) covers a portion of the active surface (8) in a plan view.

[0365] [B18] A semiconductor device (1) according to any one of B1 to B17, further comprising a main surface electrode (32) that covers the active surface (8) in a plan view, wherein the organic film (33) covers a portion of the main surface electrode (32).

[0366] [B19] The semiconductor device (1) according to B18, wherein no nitride film is interposed between the main surface electrode (32) and the organic film (33).

[0367] [B20] A semiconductor device (1) according to any one of B1 to B19, further comprising a mesa insulating film (25) covering the mesa portion (21), wherein the first inorganic film (26) covers the mesa insulating film (25).

[0368] [B21] The first main surface (5) includes the active surface (8), the outer surface (9) recessed toward the second main surface (6) relative to the active surface (8), and connecting surfaces (10A to 10D) connecting the active surface (8) and the outer surface (9), and has a plateau (11) partitioned by the active surface (8), the outer surface (9) and the connecting surfaces (10A to 10D), and the mesa portion (21) faces the plateau (11) in the plane direction of the outer surface (9), the semiconductor device (1) according to any one of B1 to B20.

[0369] [B22] The semiconductor device (1) according to B21, wherein the mesa portion (21) has a top surface (22) located on the same plane as the active surface (8).

[0370] [B23] The semiconductor device (1) according to any one of B1 to B22, wherein the first inorganic film (26) comprises a polysilicon film and the second inorganic film (29) comprises a silicon oxide film.

[0371] [B24] The functional device is a semiconductor device (1) according to any one of B1 to B23, which includes a Schottky barrier diode formed on the active surface (8).

[0372] [B25] The functional device is a semiconductor device (1) according to any one of B1 to B24, which includes an insulated gate type transistor formed on the active surface (8).

[0373] [B26] The chip (2) is a SiC chip (2), and the semiconductor device (1) is one of the B1 to B25.

[0374] [B27] The semiconductor device (1) according to B26, wherein the SiC chip (2) includes a SiC substrate (3) and a SiC epitaxial layer (4), and the mesa portion (21) is made up of a part of the SiC epitaxial layer (4).

[0375] [B28] The semiconductor device (1) according to B27, wherein the SiC epitaxial layer (4) has a different impurity concentration than the SiC substrate (3).

[0376] [B29] A semiconductor device (1) consisting of a SiC semiconductor device (1), as described in any one of B1 to B28.

[0377] [C1] A chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, including an active surface (8) set in the inner part of the first main surface (5) and an outer surface (9) set in the peripheral part of the first main surface (5), a functional device formed on the active surface (8) side, and a part of the chip (2) formed on the outer surface (9) so as to protrude toward the opposite side from the second main surface (6), having a top surface (22), a first wall surface (23) on the active surface (8) side, and A semiconductor device (41) comprising: a mesa portion (21) having a second wall surface (24) on the peripheral edge side of the outer surface (9); a first inorganic film (26) that covers the top surface (22), the first wall surface (23), and the second wall surface (24) in a film-like manner; a second inorganic film (29) that covers at least a part of the first inorganic film (26) and forms a protruding structure (20B) together with the mesa portion (21) and the first inorganic film (26); and an organic film (33) that covers at least the second inorganic film (29).

[0378] [C2] The semiconductor device (41) according to C1, wherein the first inorganic film (26) includes a top surface covering portion (42) that covers the top surface (22), a first covering portion (27) that covers the first wall surface (23), and a second covering portion (28) that covers the second wall surface (24), the second inorganic film (29) covers the first covering portion (27) and the second covering portion (28) such that at least a part of the top surface covering portion (42) is exposed, and the organic film (33) is in contact with the top surface covering portion (42).

[0379] [C3] A chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, including an active surface (8) set in the inner part of the first main surface (5) and an outer surface (9) set in the peripheral part of the first main surface (5), a functional device formed on the active surface (8) side, and a mesa portion (21) which is part of the chip (2), formed on the outer surface (9) so as to protrude toward the opposite side from the second main surface (6), and having a top surface (22), a first wall surface (23) on the active surface (8) side, and a second wall surface (24) on the peripheral side of the outer surface (9), A semiconductor device (41) comprising: a first inorganic film (26) that covers the top surface (22), the first wall surface (23), and the second wall surface (24) in a film-like manner; a second inorganic film (29) formed on the outer surface (9) at a distance from the first inorganic film (26) such that a gap (37) is formed between it and the first inorganic film (26), and together with the mesa portion (21) and the first inorganic film (26) forms a protruding structure (20B); and an organic film (33) that fills the gap (37) and covers the mesa portion (21), the first inorganic film (26), and the second inorganic film (29).

[0380] [C4] The semiconductor device (41) according to any one of C1 to C3, wherein the second inorganic film (29) contains an inorganic substance different from the first inorganic film (26).

[0381] [C5] The semiconductor device (41) according to any one of C1 to C4, wherein the first inorganic film (26) is formed in an electrically floating state and the second inorganic film (29) is formed in an electrically floating state.

[0382] [C6] The semiconductor device (41) according to any one of C1 to C5, wherein the first inorganic film (26) contains an inorganic substance other than a nitride, and the second inorganic film (29) contains an inorganic substance other than a nitride.

[0383] [C7] A semiconductor device (41) according to any one of C1 to C6, wherein no nitride film is interposed between the second inorganic film (29) and the organic film (33).

[0384] [C8] A semiconductor device (41) according to any one of C1 to C7, wherein no nitride film is interposed between the first inorganic film (26) and the organic film (33).

[0385] [C9] A semiconductor device (41) according to any one of C1 to C8, wherein no nitride film is interposed between the mesa portion (21) and the organic film (33).

[0386] [C10] A semiconductor device (41) according to any one of C1 to C9, wherein no nitride film is formed on the region between the active surface (8) and the mesa portion (21).

[0387] [C11] A semiconductor device (41) according to any one of C1 to C10, wherein, in a plan view, no metal film is formed in the region between the periphery of the chip (2) and the mesa portion (21).

[0388] [C12] The semiconductor device (41) according to any one of C1 to C11, wherein the mesa portion (21) is formed at a distance from the periphery of the chip (2) and the active surface (8) in a plan view.

[0389] [C13] The semiconductor device (41) according to any one of C1 to C12, wherein the organic film (33) covers the mesa portion (21) such that it covers the top surface (22), the first wall surface (23), and the second wall surface (24) in a plan view.

[0390] [C14] The semiconductor device (41) according to any one of C1 to C13, wherein the organic film (33) covers the entire area of ​​the mesa portion (21) in a plan view.

[0391] [C15] The semiconductor device (41) according to any one of C1 to C14, wherein the mesa portion (21) is formed in a strip shape that extends along the active surface (8) in a plan view.

[0392] [C16] The mesa portion (21) surrounds the active surface (8) in a plan view, and is a semiconductor device (41) according to any one of C1 to C15.

[0393] [C17] The semiconductor device (41) according to any one of C1 to C16, wherein the mesa portion (21) is formed in an endless manner in a plan view.

[0394] [C18] The organic film (33) covers a portion of the active surface (8) in a plan view, the semiconductor device (41) according to any one of C1 to C17.

[0395] [C19] A semiconductor device (41) according to any one of C1 to C18, further comprising a main surface electrode (32) that covers the active surface (8) in a plan view, wherein the organic film (33) covers a portion of the main surface electrode (32).

[0396] [C20] The semiconductor device (41) according to C19, wherein no nitride film is interposed between the main surface electrode (32) and the organic film (33).

[0397] [C21] A semiconductor device (41) according to any one of C1 to C20, further comprising a mesa insulating film (25) covering the mesa portion (21), wherein the first inorganic film (26) covers the mesa insulating film (25).

[0398] [C22] The first main surface (5) includes the active surface (8), the outer surface (9) recessed toward the second main surface (6) relative to the active surface (8), and connecting surfaces (10A to 10D) connecting the active surface (8) and the outer surface (9), and has a plateau (11) partitioned by the active surface (8), the outer surface (9) and the connecting surfaces (10A to 10D), and the mesa portion (21) faces the plateau (11) in the plane direction of the outer surface (9), the semiconductor device (41) according to any one of C1 to C21.

[0399] [C23] The semiconductor device (41) according to C22, wherein the top surface (22) is located on the same plane as the active surface (8).

[0400] [C24] The semiconductor device (41) according to any one of C1 to C23, wherein the first inorganic film (26) comprises a polysilicon film and the second inorganic film (29) comprises a silicon oxide film.

[0401] [C25] The functional device is a semiconductor device (41) according to any one of C1 to C24, which includes a Schottky barrier diode formed on the active surface (8).

[0402] [C26] The functional device is a semiconductor device (41) according to any one of C1 to C25, which includes an insulated gate type transistor formed on the active surface (8).

[0403] [C27] The chip (2) is a SiC chip (2), and the semiconductor device (41) is one of the C1 to C26.

[0404] [C28] The semiconductor device (41) according to C27, wherein the SiC chip (2) includes a SiC substrate (3) and a SiC epitaxial layer (4), and the mesa portion (21) is made up of a part of the SiC epitaxial layer (4).

[0405] [C29] The semiconductor device (41) according to C28, wherein the SiC epitaxial layer (4) has a different impurity concentration than the SiC substrate (3).

[0406] [C30] A semiconductor device (41) made of SiC, as described in any one of C1 to C29.

[0407] [D1] A chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, including an active surface (8) set in the inner part of the first main surface (5) and an outer surface (9) set in the peripheral part of the first main surface (5), a functional device formed on the side of the active surface (8), and a mesa portion (21) which is part of the chip (2), formed on the outer surface (9) so as to protrude toward the opposite side from the second main surface (6), and having a top surface (22) A semiconductor device (51) comprising: a trench (53) formed on the top surface (22); a first inorganic film (26) covering at least a portion of the mesa portion (21); a second inorganic film (29) covering at least a portion of the first inorganic film (26) and forming a protruding structure (20C) together with the mesa portion (21) and the first inorganic film (26); and an organic film (33) covering the mesa portion (21) so as to conceal the trench (53) in a plan view.

[0408] [D2] A chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, including an active surface (8) set in the inner part of the first main surface (5) and an outer surface (9) set in the peripheral edge of the first main surface (5), a functional device formed on the active surface (8) side, a mesa portion (21) consisting of a part of the chip (2), formed on the outer surface (9) so as to protrude toward the opposite side from the second main surface (6), having a top surface (22), a trench (53) formed on the top surface (22), and at least the mesa portion (21) A semiconductor device (51) comprising: a first inorganic film (26) that partially covers the surface; a second inorganic film (29) formed on the outer surface (9) at a distance from the first inorganic film (26) such that a gap (37) is formed between it and the first inorganic film (26), and together with the mesa portion (21) and the first inorganic film (26) forming a protruding structure (20C); and an organic film (33) that fills the gap (37) and covers the mesa portion (21), the first inorganic film (26) and the second inorganic film (29), and also conceals the trench (53) in a plan view.

[0409] [D3] The semiconductor device (51) according to D1 or D2, further comprising a trench structure (52) including the trench (53) and an object (54) embedded in the trench (53).

[0410] [D4] The semiconductor device (51) according to D3, wherein the embedded object (54) includes an insulating film (55) that covers the wall surface of the trench (53), and an inorganic embedded object (56) embedded in the trench (53) with the insulating film (55) in between.

[0411] [D5] The semiconductor device (51) described in D4, wherein the inorganic embedded object (56) is embedded in the trench (53) at a distance from the opening side to the bottom wall side of the trench (53) so as to expose the insulating film (55) within the trench (53).

[0412] [D6] The semiconductor device (51) according to D4 or D5, wherein the insulating film (55) is made of an oxide film and the inorganic embedding (56) is made of polysilicon.

[0413] [D7] A semiconductor device (51) according to any one of D3 to D6, wherein the first inorganic film (26) exposes the trench structure (52), the second inorganic film (29) exposes the trench structure (52), and the organic film (33) is in contact with the buried object (54).

[0414] [D8] The semiconductor device (51) according to D1 or D2, further comprising a trench structure (52) including the trench (53) and an insulating film (55) covering the wall surface of the trench (53).

[0415] [D9] The insulating film (55) is made of an oxide film, the semiconductor device (51) as described in D8.

[0416] [D10] The semiconductor device (51) according to D8 or D9, wherein the first inorganic film (26) exposes the trench structure (52), the second inorganic film (29) exposes the trench structure (52), and the organic film (33) penetrates into the trench (53) from above the top surface (22).

[0417] [D11] A semiconductor device (51) according to D1 or D2, further comprising a trench structure (52) including a trench (53), an insulating film (55) covering the bottom wall surface of the trench (53) so as to expose the opening wall surface of the trench (53), and an inorganic embedded object (56) embedded in the bottom wall side of the trench (53) with the insulating film (55) in between so as to expose the opening wall surface of the trench (53).

[0418] [D12] The semiconductor device (51) according to D11, wherein the insulating film (55) is made of an oxide film and the inorganic embedding (56) is made of polysilicon.

[0419] [D13] The semiconductor device (51) according to D11 or D12, wherein the first inorganic film (26) exposes the trench structure (52), the second inorganic film (29) exposes the trench structure (52), and the organic film (33) penetrates into the trench (53) from above the top surface (22).

[0420] [D14] The semiconductor device (51) according to any one of D1 to D13, wherein the second inorganic film (29) contains an inorganic substance different from the first inorganic film (26).

[0421] [D15] The semiconductor device (51) according to any one of D1 to D14, wherein the first inorganic film (26) is formed in an electrically floating state and the second inorganic film (29) is formed in an electrically floating state.

[0422] [D16] The semiconductor device (51) according to any one of D1 to D15, wherein the first inorganic film (26) contains an inorganic substance other than a nitride, and the second inorganic film (29) contains an inorganic substance other than a nitride.

[0423] [D17] A semiconductor device (51) according to any one of D1 to D16, wherein no nitride film is interposed between the second inorganic film (29) and the organic film (33).

[0424] [D18] A semiconductor device (51) according to any one of D1 to D17, wherein no nitride film is interposed between the first inorganic film (26) and the organic film (33).

[0425] [D19] A semiconductor device (51) according to any one of D1 to D18, wherein no nitride film is interposed between the mesa portion (21) and the organic film (33).

[0426] [D20] A semiconductor device (51) according to any one of D1 to D19, wherein no nitride film is formed on the region between the active surface (8) and the mesa portion (21).

[0427] [D21] A semiconductor device (51) according to any one of D1 to D20, wherein, in a plan view, no metal film is formed in the region between the periphery of the chip (2) and the mesa portion (21).

[0428] [D22] The semiconductor device (51) according to any one of D1 to D21, wherein the mesa portion (21) is formed at a distance from the periphery of the chip (2) and the active surface (8) in a plan view.

[0429] [D23] The semiconductor device (51) according to any one of D1 to D22, wherein the mesa portion (21) has a first side on the active surface (8) side and a second side on the peripheral edge side of the chip (2), and the organic film (33) covers the mesa portion (21) such that it covers both the first side and the second side in a plan view.

[0430] [D24] The semiconductor device (51) according to any one of D1 to D23, wherein the organic film (33) covers the entire area of ​​the mesa portion (21) in a plan view.

[0431] [D25] The semiconductor device (51) according to any one of D1 to D24, wherein the mesa portion (21) is formed in a strip shape extending along the active surface (8) in a plan view.

[0432] [D26] The mesa portion (21) surrounds the active surface (8) in a plan view, and is a semiconductor device (51) according to any one of D1 to D25.

[0433] [D27] The semiconductor device (51) according to any one of D1 to D26, wherein the mesa portion (21) is formed in an endless manner in a plan view.

[0434] [D28] The semiconductor device (51) according to any one of D1 to D27, wherein the organic film (33) covers a portion of the active surface (8) in a plan view.

[0435] [D29] A semiconductor device (51) according to any one of D1 to D28, further comprising a main surface electrode (32) that covers the active surface (8) in a plan view, wherein the organic film (33) covers a portion of the main surface electrode (32).

[0436] [D30] The semiconductor device (51) according to D29, wherein no nitride film is interposed between the main surface electrode (32) and the organic film (33).

[0437] [D31] A semiconductor device (51) according to any one of D1 to D30, further comprising a mesa insulating film (25) covering the mesa portion (21), wherein the first inorganic film (26) covers the mesa insulating film (25).

[0438] [D32] The first main surface (5) includes the active surface (8), the outer surface (9) recessed toward the second main surface (6) relative to the active surface (8), and connecting surfaces (10A to 10D) connecting the active surface (8) and the outer surface (9), and has a plateau (11) partitioned by the active surface (8), the outer surface (9) and the connecting surfaces (10A to 10D), and the mesa portion (21) faces the plateau (11) in the plane direction of the outer surface (9), the semiconductor device (51) according to any one of D1 to D31.

[0439] [D33] The semiconductor device (51) according to D32, wherein the top surface (22) is located on the same plane as the active surface (8).

[0440] [D34] The semiconductor device (51) according to any one of D1 to D33, wherein the first inorganic film (26) includes a polysilicon film and the second inorganic film (29) includes a silicon oxide film.

[0441] [D35] The functional device is a semiconductor device (51) according to any one of D1 to D34, which includes a Schottky barrier diode formed on the active surface (8).

[0442] [D36] The functional device is a semiconductor device (51) according to any one of D1 to D35, which includes an insulated gate type transistor formed on the active surface (8).

[0443] [D37] The chip (2) is a SiC chip (2), and the semiconductor device (51) is one of the D1 to D36.

[0444] [D38] The semiconductor device (51) according to D37, wherein the SiC chip (2) includes a SiC substrate (3) and a SiC epitaxial layer (4), and the mesa portion (21) is made up of a part of the SiC epitaxial layer (4).

[0445] [D39] The semiconductor device (51) according to D38, wherein the SiC epitaxial layer (4) has a different impurity concentration than the SiC substrate (3).

[0446] [D40] A semiconductor device (51) made of SiC semiconductor device (51), as described in any one of D1 to D39.

[0447] [E1] A chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, including an active surface (8) set in the inner part of the first main surface (5) and an outer surface (9) set in the peripheral part of the first main surface (5), a functional device formed on the active surface (8) side, a mesa portion (21) consisting of a part of the chip (2), formed on the outer surface (9) so as to protrude toward the opposite side from the second main surface (6), having a top surface (22), a trench (53) formed on the top surface (22), and an insulating film covering the inner wall of the trench (53) ( A semiconductor device (61) comprising: 55), and a trench structure (52) including an inorganic embedded object (56) embedded in the trench (53) with the insulating film (55) in between; a first inorganic film (26) covering the top surface (22) so as to conceal the trench structure; a second inorganic film (29) covering at least a portion of the first inorganic film (26) and forming a protruding structure (20D) together with the mesa portion (21) and the first inorganic film (26); and an organic film (33) covering the mesa portion (21) so as to conceal the trench structure (52) in a plan view.

[0448] [E2] A chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, including an active surface (8) set in the inner part of the first main surface (5) and an outer surface (9) set in the peripheral part of the first main surface (5), a functional device formed on the active surface (8) side, a mesa portion (21) consisting of a part of the chip (2), formed on the outer surface (9) so as to protrude toward the opposite side from the second main surface (6) and having a top surface (22), a trench (53) formed on the top surface (22), an insulating film (55) covering the inner wall of the trench (53), and the trench (53) sandwiching the insulating film (55) A semiconductor device (61) comprising: a trench structure (52) including an inorganic embedded object (56) embedded therein; a first inorganic film (26) covering the top surface (22); a second inorganic film (29) formed on the outer surface (9) at a distance from the first inorganic film (26) such that a gap (37) is formed between it and the first inorganic film (26), and together with the mesa portion (21) and the first inorganic film (26) forming a protruding structure (20D); and an organic film (33) that fills the gap (37) and covers the mesa portion (21), the first inorganic film (26) and the second inorganic film (29), and also conceals the trench structure (52) in a plan view.

[0449] [E3] The semiconductor device (61) according to E1 or E2, wherein the first inorganic film (26) is made of the same material as the inorganic embedded object (56) and is integrally formed with the inorganic embedded object (56).

[0450] [E4] The semiconductor device (61) according to any one of E1 to E3, wherein the mesa portion (21) has a first wall surface (23) on the active surface (8) side and a second wall surface (24) on the peripheral edge side of the outer surface (9), and the first inorganic film (26) coats the top surface (22), the first wall surface (23), and the second wall surface (24) in a film-like manner.

[0451] [E5] The semiconductor device (61) according to any one of E1 to E4, wherein the insulating film (55) is made of an oxide film, the inorganic embedding (56) is made of polysilicon, and the first inorganic film (26) is made of polysilicon.

[0452] [E6] The organic film (33) is in contact with the first inorganic film (26), and the semiconductor device (61) is one of the E1 to E5.

[0453] [E7] The semiconductor device (61) according to any one of E1 to E6, wherein the second inorganic film (29) contains an inorganic substance different from the first inorganic film (26).

[0454] [E8] The semiconductor device (61) according to any one of E1 to E7, wherein the first inorganic film (26) is formed in an electrically floating state, and the second inorganic film (29) is formed in an electrically floating state.

[0455] [E9] The semiconductor device (61) according to any one of E1 to E8, wherein the first inorganic film (26) contains an inorganic substance other than a nitride, and the second inorganic film (29) contains an inorganic substance other than a nitride.

[0456] [E10] A semiconductor device (61) according to any one of E1 to E9, wherein no nitride film is interposed between the second inorganic film (29) and the organic film (33).

[0457] [E11] A semiconductor device (61) according to any one of E1 to E10, wherein no nitride film is interposed between the first inorganic film (26) and the organic film (33).

[0458] [E12] A semiconductor device (61) according to any one of E1 to E11, wherein no nitride film is interposed between the mesa portion (21) and the organic film (33).

[0459] [E13] A semiconductor device (61) according to any one of E1 to E12, wherein no nitride film is formed on the region between the active surface (8) and the mesa portion (21).

[0460] [E14] A semiconductor device (61) according to any one of E1 to E13, wherein, in a plan view, no metal film is formed in the region between the periphery of the chip (2) and the mesa portion (21).

[0461] [E15] The semiconductor device (61) according to any one of E1 to E14, wherein the mesa portion (21) is formed at a distance from the periphery of the chip (2) and the active surface (8) in a plan view.

[0462] [E16] The semiconductor device (61) according to any one of E1 to E15, wherein the mesa portion (21) has a first side on the active surface (8) side and a second side on the peripheral edge side of the chip (2), and the organic film (33) covers the mesa portion (21) such that it covers both the first side and the second side in a plan view.

[0463] [E17] The semiconductor device (61) according to any one of E1 to E16, wherein the organic film (33) covers the entire area of ​​the mesa portion (21) in a plan view.

[0464] [E18] The semiconductor device (61) according to any one of E1 to E17, wherein the mesa portion (21) is formed in a strip shape extending along the active surface (8) in a plan view.

[0465] [E19] The semiconductor device (61) according to any one of E1 to E18, wherein the mesa portion (21) surrounds the active surface (8) in a plan view.

[0466] [E20] The semiconductor device (61) according to any one of E1 to E19, wherein the mesa portion (21) is formed in an endless manner in a plan view.

[0467] [E21] The semiconductor device (61) according to any one of E1 to E20, wherein the organic film (33) covers a portion of the active surface (8) in a plan view.

[0468] [E22] A semiconductor device (61) according to any one of E1 to E21, further comprising a main surface electrode (32) that covers the active surface (8) in a plan view, wherein the organic film (33) covers a portion of the main surface electrode (32).

[0469] [E23] The semiconductor device (61) according to E22, wherein no nitride film is interposed between the main surface electrode (32) and the organic film (33).

[0470] [E24] A semiconductor device (61) according to any one of E1 to E23, further comprising a mesa insulating film (25) covering the mesa portion (21), wherein the first inorganic film (26) covers the mesa insulating film (25).

[0471] [E25] The first main surface (5) includes the active surface (8), the outer surface (9) recessed toward the second main surface (6) relative to the active surface (8), and connecting surfaces (10A to 10D) connecting the active surface (8) and the outer surface (9), and has a plateau (11) partitioned by the active surface (8), the outer surface (9) and the connecting surfaces (10A to 10D), and the mesa portion (21) faces the plateau (11) in the plane direction of the outer surface (9), the semiconductor device (61) according to any one of E1 to E24.

[0472] [E26] The semiconductor device (61) according to E25, wherein the top surface (22) is located on the same plane as the active surface (8).

[0473] [E27] The semiconductor device (61) according to any one of E1 to E26, wherein the second inorganic film (29) includes a silicon oxide film.

[0474] [E28] The functional device is a semiconductor device (61) according to any one of E1 to E27, which includes a Schottky barrier diode formed on the active surface (8).

[0475] [E29] The functional device is a semiconductor device (61) according to any one of E1 to E28, comprising an insulated gate type transistor formed on the active surface (8).

[0476] [E30] The chip (2) is a semiconductor device (61) according to any one of E1 to E29, comprising a SiC chip (2).

[0477] [E31] The semiconductor device (61) according to E30, wherein the SiC chip (2) includes a SiC substrate (3) and a SiC epitaxial layer (4), and the mesa portion (21) is made up of a part of the SiC epitaxial layer (4).

[0478] [E32] The semiconductor device (61) according to E31, wherein the SiC epitaxial layer (4) has a different impurity concentration than the SiC substrate (3).

[0479] [E33] A semiconductor device (61) made of SiC semiconductor device (61), as described in any one of E1 to E32.

[0480] [F1] A semiconductor device (71) comprising: a chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, an active surface (8) set in the inner part of the first main surface (5), and an outer surface (9) set in the peripheral part of the first main surface (5); a functional device formed on the active surface (8) side; a first inorganic film (26) formed on the outer surface (9); a second inorganic film (29) covering at least a part of the first inorganic film (26) and forming a protruding structure (20E) together with the first inorganic film (26); and an organic film (33) covering at least the second inorganic film (29).

[0481] [F2] A semiconductor device (71) comprising: a chip (2) having a first main surface (5) on one side and a second main surface (6) on the other side, an active surface (8) set in the inner part of the first main surface (5), and an outer surface (9) set in the peripheral part of the first main surface (5); a functional device formed on the active surface (8) side; a first inorganic film (26) formed on the outer surface (9); a second inorganic film (29) formed on the outer surface (9) at a distance from the first inorganic film (26) such that a gap (37) is formed between it and the first inorganic film (26), and forming a protruding structure (20E) together with the first inorganic film (26); and an organic film (33) that fills the gap (37) and covers the first inorganic film (26) and the second inorganic film (29).

[0482] [F3] The semiconductor device (71) according to F1 or F2, wherein the second inorganic film (29) contains an inorganic substance different from the first inorganic film (26).

[0483] [F4] The semiconductor device (71) according to any one of F1 to F3, wherein the first inorganic film (26) is formed in an electrically floating state and the second inorganic film (29) is formed in an electrically floating state.

[0484] [F5] The semiconductor device (71) according to any one of F1 to F4, wherein the first inorganic film (26) contains an inorganic substance other than a nitride, and the second inorganic film (29) contains an inorganic substance other than a nitride.

[0485] [F6] A semiconductor device (71) according to any one of F1 to F5, wherein no nitride film is interposed between the second inorganic film (29) and the organic film (33).

[0486] [F7] A semiconductor device (71) according to any one of F1 to F6, wherein no nitride film is interposed between the first inorganic film (26) and the organic film (33).

[0487] [F8] A semiconductor device (71) according to any one of F1 to F7, wherein no nitride film is interposed between the outer surface (9) and the organic film (33).

[0488] [F9] A semiconductor device (71) according to any one of F1 to F8, wherein, in a plan view, no metal film is formed in the region between the periphery of the chip (2) and the first inorganic film (26).

[0489] [F10] The semiconductor device (71) according to any one of F1 to F9, wherein the first inorganic film (26) is formed at a distance from the periphery of the chip (2) and the active surface (8) in a plan view.

[0490] [F11] The semiconductor device (71) according to any one of F1 to F10, wherein the first inorganic film (26) has a first side on the active surface (8) side and a second side on the peripheral edge side of the chip (2), and the organic film (33) covers the first inorganic film (26) so as to cover both the first side and the second side in a plan view.

[0491] [F12] The semiconductor device (71) according to any one of F1 to F11, wherein the organic film (33) covers the entire area of ​​the first inorganic film (26) in a plan view.

[0492] [F13] The semiconductor device (71) according to any one of F1 to F12, wherein the first inorganic film (26) is formed in a strip shape extending along the active surface (8) in a plan view.

[0493] [F14] The first inorganic film (26) surrounds the active surface (8) in a plan view, and is a semiconductor device (71) according to any one of F1 to F13.

[0494] [F15] The first inorganic film (26) is formed in an endless manner in a plan view, as described in any one of F1 to F14, semiconductor device (71).

[0495] [F16] The semiconductor device (71) according to any one of F1 to F15, wherein the organic film (33) covers a portion of the active surface (8) in a plan view.

[0496] [F17] A semiconductor device (71) according to any one of F1 to F16, further comprising a main surface electrode (32) that covers the active surface (8) in a plan view, wherein the organic film (33) covers a portion of the main surface electrode (32).

[0497] [F18] The semiconductor device (71) according to F17, wherein no nitride film is interposed between the main surface electrode (32) and the organic film (33).

[0498] [F19] A semiconductor device (71) according to any one of F1 to F18, further comprising a main surface insulating film (12) covering the outer surface (9), wherein the first inorganic film (26) is formed on the main surface insulating film (12).

[0499] [F20] The first main surface (5) includes the active surface (8), the outer surface (9) recessed toward the second main surface (6) relative to the active surface (8), and connecting surfaces (10A to 10D) connecting the active surface (8) and the outer surface (9), and has a plateau (11) partitioned by the active surface (8), the outer surface (9) and the connecting surfaces (10A to 10D), and the first inorganic film (26) faces the plateau (11) in the plane direction of the outer surface (9), the semiconductor device (71) according to any one of F1 to F19.

[0500] [F21] The semiconductor device (71) according to F20, wherein the first inorganic film (26) has a thickness less than the thickness of the base (11).

[0501] [F22] The semiconductor device (71) according to F20 or F21, wherein the second inorganic film (29) covers the first inorganic film (26) with a gap from the straight line extending horizontally from the active surface (8) in a cross-sectional view toward the outer surface (9).

[0502] [F23] The semiconductor device (71) according to any one of F1 to F22, wherein the first inorganic film (26) comprises a polysilicon film and the second inorganic film (29) comprises a silicon oxide film.

[0503] [F24] The functional device is a semiconductor device (71) according to any one of F1 to F23, which includes a Schottky barrier diode formed on the active surface (8).

[0504] [F25] The functional device is a semiconductor device (71) according to any one of F1 to F24, including an insulated gate type transistor formed on the active surface (8).

[0505] [F26] The chip (2) is a SiC chip (2), and the semiconductor device (71) is one of the F1 to F25.

[0506] [F27] The semiconductor device (71) according to F26, wherein the SiC chip (2) includes a SiC substrate (3) and a SiC epitaxial layer (4).

[0507] [F28] The semiconductor device (71) according to F27, wherein the SiC epitaxial layer (4) has a different impurity concentration than the SiC substrate (3).

[0508] [F29] A semiconductor device (71) made of SiC semiconductor device (71), as described in any one of F1 to F28.

[0509] Although embodiments of the present invention have been described in detail, these are merely specific examples used to clarify the technical content of the present invention, and the present invention should not be interpreted as being limited to these specific examples. The scope of the present invention is limited by the appended claims. [Explanation of symbols]

[0510] 1: SiC semiconductor device (semiconductor device), 2: SiC chip (chip), 5: First main surface, 6: Second main surface, 8: Active surface, 9: Outer surface, 10A: First connection surface, 10B: Second connection surface, 10C: Third connection surface, 10D: Fourth connection surface, 11: Active plateau (plateau), 20A: First protruding structure, 20B: Second protruding structure, 20C: Third protruding structure, 20D: Fourth protruding structure, 20E: Fifth protruding structure, 32: First main surface electrode (main surface electrode), 33: Organic film, 41: SiC semiconductor device (semiconductor device), 51: SiC semiconductor device (semiconductor device), 61: SiC semiconductor device (semiconductor device), 71: SiC semiconductor device (semiconductor device)

Claims

1. A tip having a first main surface on one side and a second main surface on the other side, including an active surface set in the inner part of the first main surface and an outer surface set in the peripheral edge of the first main surface, The functional device formed on the active surface side, A mesa portion formed on the outer surface of the chip, which is part of the chip and protrudes toward the opposite side from the second main surface, A first inorganic film covering at least a portion of the mesa portion, A second inorganic film that covers at least a portion of the first inorganic film and forms a protruding structure together with the mesa portion and the first inorganic film, A semiconductor device comprising at least an organic film coating the second inorganic film.

2. A tip having a first main surface on one side and a second main surface on the other side, including an active surface set in the inner part of the first main surface and an outer surface set in the peripheral edge of the first main surface, The functional device formed on the active surface side, A mesa portion formed on the outer surface of the chip, which is part of the chip and protrudes toward the opposite side from the second main surface, A first inorganic film covering at least a portion of the mesa portion, A second inorganic film is formed on the outer surface at a distance from the first inorganic film such that a gap is formed between it and the first inorganic film, and together with the mesa portion and the first inorganic film, it forms a protruding structure. A semiconductor device comprising an organic film that fills the gap and covers the mesa portion, the first inorganic film, and the second inorganic film.

3. The semiconductor device according to claim 1 or 2, wherein the second inorganic film comprises an inorganic substance different from the first inorganic film.

4. The first inorganic film is formed in an electrically suspended state, The semiconductor device according to any one of claims 1 to 3, wherein the second inorganic film is formed in an electrically floating state.

5. The first inorganic film contains inorganic substances other than nitrides, The semiconductor device according to any one of claims 1 to 4, wherein the second inorganic film includes an inorganic substance other than a nitride.

6. A semiconductor device according to any one of claims 1 to 5, wherein no nitride film is interposed between the second inorganic film and the organic film.

7. A semiconductor device according to any one of claims 1 to 6, wherein no nitride film is interposed between the first inorganic film and the organic film.

8. The semiconductor device according to any one of claims 1 to 7, wherein no nitride film is interposed between the mesa portion and the organic film.

9. The semiconductor device according to any one of claims 1 to 8, wherein no nitride film is formed on the region between the active surface and the mesa portion.

10. A semiconductor device according to any one of claims 1 to 9, wherein, in a plan view, no metal film is formed in the region between the periphery of the chip and the mesa portion.

11. The semiconductor device according to any one of claims 1 to 10, wherein the mesa portion is formed at a distance from the periphery of the chip and the active surface in a plan view.

12. The mesa portion has a first side on the active surface side and a second side on the peripheral edge side of the tip, The semiconductor device according to any one of claims 1 to 11, wherein the organic film covers the mesa portion such that it covers both the first and second sides in a plan view.

13. The semiconductor device according to any one of claims 1 to 12, wherein the organic film covers the entire area of ​​the mesa portion in a plan view.

14. The semiconductor device according to any one of claims 1 to 13, wherein the mesa portion is formed in a strip shape extending along the active surface in a plan view.

15. The semiconductor device according to any one of claims 1 to 14, wherein the mesa portion surrounds the active surface in a plan view.

16. The semiconductor device according to any one of claims 1 to 15, wherein the mesa portion is formed in an endless manner in a plan view.

17. The semiconductor device according to any one of claims 1 to 16, wherein the organic film covers a portion of the active surface in a plan view.

18. The system further includes a main surface electrode that covers the active surface in a plan view, The semiconductor device according to any one of claims 1 to 17, wherein the organic film covers a portion of the main surface electrode.

19. The semiconductor device according to claim 18, wherein no nitride film is interposed between the main surface electrode and the organic film.

20. The material further includes a mesa insulating film that covers the mesa portion, The semiconductor device according to any one of claims 1 to 19, wherein the first inorganic film coats the mesa insulating film.

21. The first main surface includes the active surface, the outer surface recessed toward the second main surface relative to the active surface, and a connecting surface connecting the active surface and the outer surface. The plateau is partitioned by the active surface, the outer surface, and the connecting surface, The semiconductor device according to any one of claims 1 to 20, wherein the mesa portion faces the base in the planar direction of the outer surface.

22. The semiconductor device according to claim 21, wherein the mesa portion has a top surface located on the same plane as the active surface.

23. The first inorganic film includes a polysilicon film, The semiconductor device according to any one of claims 1 to 22, wherein the second inorganic film includes a silicon oxide film.

24. The semiconductor device according to any one of claims 1 to 23, wherein the functional device includes a Schottky barrier diode formed on the active surface.

25. The semiconductor device according to any one of claims 1 to 24, wherein the functional device includes an insulated gate type transistor formed on the active surface.

26. The semiconductor device according to any one of claims 1 to 25, wherein the chip is made of a SiC chip.

27. The SiC chip includes a SiC substrate and a SiC epitaxial layer. The semiconductor device according to claim 26, wherein the mesa portion is made up of a part of the SiC epitaxial layer.

28. The semiconductor device according to claim 27, wherein the SiC epitaxial layer has a different impurity concentration than the SiC substrate.

29. A semiconductor device according to any one of claims 1 to 28, comprising a SiC semiconductor device.

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