Silicon substrate for photoelectric conversion and method for manufacturing the same

Abstract

To provide a novel silicon substrate for photoelectric conversion used as a component of an image sensor, which can suitably contribute to improving the characteristics of the image sensor, and a method for manufacturing the same. [Solution] A silicon substrate having one or more recesses, wherein the recesses have a bottom surface and a side surface, the side surface has an oxide film, and the bottom surface does not have an oxide film.

Description

[Technical Field]

[0001] The present invention relates to a silicon substrate for photoelectric conversion and a method for manufacturing the same. [Background technology]

[0002] Image sensors are currently widely used in electronic devices such as smartphones and digital cameras, but their applications are expanding further with their use in automotive, security, and IoT. An image sensor is a semiconductor that captures information emitted from an object, forms an image on its light-receiving surface through optical elements such as lenses, converts the brightness of the image into an electrical charge, and then reads it out and converts it into an electrical signal. It is also called an imaging sensor.

[0003] An image sensor is a component that includes a photoelectric conversion unit. Light incident on the image sensor first passes through a lens so as to be focused near the center of each pixel, then passes through a color filter to separate it into colors according to the wavelength of light, and finally is converted into electric charge in the photoelectric conversion unit. By reading the amount of this charge with the sensor, the brightness of each color of an object can be quantified. The photoelectric conversion unit may include, for example, a silicon substrate as a component. Patent Document 1 discloses an image sensor that includes a photoelectric conversion layer made of a silicon layer. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2022-175849 [Non-patent literature]

[0005] [Non-Patent Document 1] Takeshi Eto, "History and Prospects of Ultra-High-Speed ​​Camera Development," Applied Physics, Vol. 90, No. 6, pp. 332-338 (2021). [Overview of the project] [Problems that the invention aims to solve]

[0006] The present invention aims to provide a novel silicon substrate for photoelectric conversion used as a component of an image sensor, etc., which can suitably contribute to improving the characteristics of the image sensor, etc., and a method for manufacturing the same. [Means for solving the problem]

[0007] The present invention includes the following embodiments: [Section 1] A silicon substrate having one or more recesses, The recess has a bottom surface and side surfaces, The aforementioned side surface has an oxide film, and the aforementioned bottom surface does not have an oxide film. Silicon substrate. [Section 2] The silicon substrate according to item 1, wherein the bottom surface is parallel to the opening surface of the recess. [Section 3] The silicon substrate according to item 1 or item 2, wherein the shape of the bottom surface and the opening surface of the recess is rectangular when viewed from above. [Section 4] The silicon substrate according to item 3, wherein the length of each side of the bottom surface is independently 0.3 μm to 100 μm. [Section 5] A silicon substrate according to any one of items 2 to 4, wherein the distance between the opening surface and the bottom surface is 0.5 μm to 3 μm. [Section 6] The silicon substrate according to any one of claims 1 to 5, wherein the area of ​​the bottom surface is smaller than the area of ​​the opening surface. [Section 7] The silicon substrate according to any one of items 1 to 6, wherein the side surface is inclined with respect to the bottom surface. [Section 8] A silicon substrate according to any one of items 1 to 7, wherein the angle between the bottom surface and the side surface is 30° to 70°. [Section 9] The silicon substrate according to any one of Items 1 to 8, wherein the thickness of the oxide film is 10 nm to 50 nm. [Item 10] The silicon substrate according to any one of Items 1 to 9, further having a photoelectric conversion material in the recess. [Item 11] The silicon substrate according to Item 10, wherein the photoelectric conversion material is germanium. [Item 12] The silicon substrate according to any one of Items 1 to 11, which is for photoelectric conversion. [Item 13] The following steps (i) to (iii): (i) A step of forming a recess by etching a silicon substrate; (ii) A step of coating the recess with an oxide film; and (iii) A step of removing the oxide film on the bottom surface of the recess while leaving the oxide film on the side surface of the recess by anisotropically etching the oxide film; The method for manufacturing a silicon substrate according to any one of Items 1 to 12, including the above steps. [Item 14] The manufacturing method according to Item 13, wherein the step (i) is performed on the surface of a substrate whose crystal orientation of silicon is the plane orientation (100). [Item 15] The manufacturing method according to Item 13 or 14, wherein the formation of the recess in the step (i) is performed by anisotropically etching the substrate. [Item 16] The manufacturing method according to Item 15, wherein the anisotropic etching in the step (i) is performed by wet etching. [Item 17] The manufacturing method according to any one of Items 13 to 16, wherein in the step (ii), the crystal orientation of silicon on the bottom surface of the recess is the plane orientation (100), and the crystal orientation of silicon on the side surface is the plane orientation (111). [Item 18] The manufacturing method according to any one of Items 13 to 17, wherein the anisotropic etching in the step (iii) is performed by dry etching. [Advantages of the Invention]

[0008] According to the present invention, it is possible to provide a novel silicon substrate for photoelectric conversion used in image sensors and the like, which can suitably contribute to the characteristics of image sensors and the like, and a method for manufacturing the same. [Brief explanation of the drawing]

[0009] [Figure 1] This is a schematic top view showing the silicon substrate of the present invention. [Figure 2] This is a schematic cross-sectional view showing one recess in the silicon substrate of the present invention. [Figure 3] This diagram shows three types of structures considered effective as photoelectric conversion units, along with simulated values ​​of the time resolution for each structure. [Figure 4A] This is a schematic cross-sectional view showing a state in which an oxide film is coated over the entire surface of the substrate. [Figure 4B] This is a schematic cross-sectional view showing a state in which a resist has been applied to an oxide film. [Figure 4C] This is a schematic cross-sectional view showing the state after the resist has been removed from the recessed area. [Figure 4D] This is a schematic cross-sectional view showing the state after the oxide film has been removed from the recessed area. [Figure 5A] This is a schematic cross-sectional view showing a state in which a recess has been formed at the desired position. [Figure 5B] This is a schematic cross-sectional view showing a state in which an oxide film is coated over the entire surface of a substrate having a recess. [Figure 6] This is a schematic cross-sectional view showing a state in which an oxide film is coated over the entire surface of the substrate, excluding the bottom surface of the recess. [Figure 7] This is a schematic cross-sectional view showing the state in which the recess is filled with photoelectric conversion material. [Modes for carrying out the invention]

[0010] <Definitions of Terms, etc.> The structure of the silicon substrate of the present invention and the method for manufacturing the silicon substrate will be described in more detail below. Although the explanation will be given with reference to the drawings as necessary, the various elements in the drawings are shown schematically and illustratively only for the purpose of understanding the structure of the silicon substrate of the present invention and the method for manufacturing the same, and the appearance, dimensional ratios, etc., may differ from the actual product. In particular, in this disclosure, the drawings schematically show the state changes in each process, focusing only on the surface on the substrate where the recess is formed, and do not limit the state of other surfaces (surfaces relative to the recess-forming surface and side surfaces) in any way.

[0011] The various numerical ranges referred to herein are intended to include the lower and upper numerical values ​​themselves. For example, a numerical range such as 1 to 10, or 1 or more and 10 or less, can be interpreted as including both the lower limit of "1" and the upper limit of "10".

[0012] In this specification, "rectangle" refers to a quadrilateral in which all angles are right angles, and includes not only rectangles but also squares. Furthermore, "short side of a rectangle" includes not only the short side of a rectangle but also one side of a square.

[0013] <Silicon substrate> The silicon substrate of the present invention has a plurality of recesses, The recess has a bottom surface and side surfaces, The aforementioned side surface has an oxide film, and the aforementioned bottom surface does not have an oxide film. It is a silicon substrate.

[0014] Figure 1 is a top view of a silicon substrate 10 having the recesses of the present invention. The silicon substrate 10 has a plurality of recesses 12 on a base material 11.

[0015] Any substrate material 11 may be used for the silicon substrate 10, for example, a polycrystalline silicon substrate or a single-crystal silicon wafer may be used, but in terms of the manufacturing process of the article of the present invention, it is preferable to use a single-crystal silicon wafer as the substrate material 11. When using a single-crystal silicon wafer, any silicon wafer with a plane orientation of (100), (110), (111), etc. may be used, but from the viewpoint of the manufacturing processability of the silicon substrate of the present invention, it is preferable to use a silicon wafer with a (100) plane. Furthermore, any intrinsic, P-type, or N-type substrate material may be used for the substrate material 11 of the silicon substrate 10, but when used in the photoelectric conversion part of an image sensor, it is preferable to use either a P-type or N-type substrate material. In this specification, "silicon wafer" refers to a substantially circular flat plate obtained by processing a silicon ingot.

[0016] The shape of the silicon substrate 10 may vary depending on the application and manufacturing process. For example, the silicon substrate of the present invention may be a rectangular flat plate. Alternatively, for example, the silicon substrate of the present invention may be a circular flat plate. In one embodiment, the silicon substrate 10 may use a chip obtained by cutting a silicon wafer into a square shape as the base material 11.

[0017] The dimensions of the silicon substrate 10 may vary depending on the application and manufacturing process. If the silicon substrate is a rectangular flat plate, the lengths of its short and long sides are not particularly limited, but may be, for example, 1 mm to 1000 mm, or 1 mm or more, 3 mm or more, 5 mm or more, 10 mm or more, 30 mm or more, 50 mm or more, 100 mm or more, 150 mm or more, 200 mm or more, or 300 mm or more, or 1000 mm or less, 500 mm or less, 300 mm or less, 200 mm or less, 150 mm or less, 100 mm or less, 50 mm or less, 30 mm or less, or 10 mm or less. If the silicon substrate 10 is a circular flat plate, its diameter is not particularly limited, but may be, for example, 1 mm to 1000 mm, or may be 1 mm or more, 3 mm or more, 5 mm or more, 10 mm or more, 30 mm or more, 50 mm or more, 100 mm or more, 150 mm or more, 200 mm or more, or 300 mm or more, or may be 1000 mm or less, 500 mm or less, 300 mm or less, 200 mm or less, 150 mm or less, 100 mm or less, 50 mm or less, 30 mm or less, or 10 mm or less, for example, about 50 mm, about 76 mm, about 100 mm, about 125 mm, about 150 mm, about 200 mm, or about 300 mm.

[0018] In one embodiment, the silicon substrate 10 is a disc with a diameter of approximately 100 mm.

[0019] The thickness of the silicon substrate 10 is not particularly limited, but may be, for example, 1 μm to 1000 μm, or 1 μm or more, 3 μm or more, 5 μm or more, 10 μm or more, 30 μm or more, 50 μm or more, 100 μm or more, 150 μm or more, 200 μm or more, or 300 μm or more, or 1000 μm or less, 500 μm or less, 300 μm or less, 200 μm or less, 150 μm or less, 100 μm or less, 50 μm or less, 30 μm or less, or 10 μm or less, for example, about 280 μm, about 300 μm, about 380 μm, about 500 μm, about 525 μm, about 625 μm, about 725 μm, or about 775 μm.

[0020] The silicon substrate 10 may have one or more arbitrary numbers of recesses. The number of recesses and the arrangement of each recess may vary depending on the application, specifications, or characteristics of the device used (e.g., device dimensions, shape, imaging speed, resolution, sensitivity). In a preferred embodiment, the recesses are arranged in a grid pattern of M rows × N columns on the substrate 11. M and N are integers of 1 or more, where M>N, M=N, and M <Nのいずれであってもよい。

[0021] In the silicon substrate 10, the distance between the centers of adjacent recesses in the vertical and horizontal directions (hereinafter referred to as "pitch") is not particularly limited, but a smaller pitch is preferable from the viewpoint of miniaturizing the device. However, if the pitch is too small, there are problems from the viewpoint of processability, and it is also undesirable because light incident on one recess may penetrate into other recesses, causing malfunctions. The pitch may be, for example, 0.1 μm to 1500 μm, or may be 0.1 μm or more, 1 μm or more, 3 μm or more, 5 μm or more, 10 μm or more, 30 μm or more, 50 μm or more, 100 μm or more, 150 μm or more, 200 μm or more, 300 μm or more, 500 μm or more, or 1000 μm or more, or 1500 μm or less, 1000 μm or less, 500 μm or less, 300 μm or less, 200 μm or less, 150 μm or less, 100 μm or less, 50 μm or less, 30 μm or less, or 10 μm or less, or 5 μm or less. Furthermore, the pitch values ​​within a single silicon substrate 10 may all be uniform or not. If all are uniform, the value of each pitch may be, for example, within ±20%, ±10%, or ±1% of the average value of all pitches.

[0022] The surface of the silicon substrate 10 other than the recesses may have an oxide film. The thickness of the oxide film is not particularly limited, but may be, for example, 10 nm or more, 50 nm or more, 100 nm or more, 200 nm or more, 300 nm or more, 500 nm or more, or 700 nm or more, and may also be 2000 nm or less, 1500 nm or less, 1000 nm or less, 700 nm or less, or 500 nm or less.

[0023] When the silicon substrate of the present invention is used as the photoelectric conversion unit of an image sensor, each recess can function as a pixel.

[0024] Figure 2 is a schematic cross-sectional view of a recess in the silicon substrate of the present invention. The recess 20 on the silicon substrate 10 has a bottom surface 22 and a side surface 23, with an oxide film 24 on the side surface 23 and no oxide film on the bottom surface 22.

[0025] The shape of the opening surface 21 of the recess may be a variety of shapes, such as triangle, rhombus, trapezoid, rectangle, hexagon, ellipse, crescent, partial circle, sector, or circle, independently of each other. From the viewpoint of ensuring a high opening ratio, the shape is preferably circular or rectangular, from the viewpoint of processability, it is more preferably rectangular, and even more preferably square. The shapes of the opening surfaces 21 in the silicon substrate 10 may all be the same or not, but it is preferable that they be uniform. In this specification, "shape of the surface" means the shape of the surface when viewed from above, and "the surfaces are the same shape" means that one surface and another surface are similar to each other at an arbitrary similarity ratio (for example, 0.001 to 1000 times).

[0026] If the opening surface 21 is rectangular, the length of its shorter side may vary depending on the application of the device used. For example, the length of each shorter side may be independently between 0.2 μm and 3000 μm, or may be 0.2 μm or more, 0.5 μm or more, 1 μm or more, 3 μm or more, 5 μm or more, 10 μm or more, 30 μm or more, 50 μm or more, 100 μm or more, 150 μm or more, 200 μm or more, 300 μm or more, 500 μm or more, 1000 μm or more, or 2000 μm or more, or 3000 μm or less, 1500 μm or less, 1000 μm or less, 500 μm or less, 300 μm or less, 200 μm or less, 150 μm or less, 100 μm or less, 50 μm or less, 30 μm or less, or 10 μm or less, or 5 μm or less. Furthermore, the length of the short side of the aperture surface 21 within the silicon substrate 10 may be uniform or not, but it is preferable that it be uniform. If it is uniform, the length of the short side may be, for example, within ±20%, ±10%, or ±1% of the average value of all aperture surfaces. From the viewpoint of increasing pixel density, miniaturization, and device miniaturization, or from the viewpoint of suppressing the occurrence of crystal defects when pixels are heteroepitaxially grown from the bottom surface 22, and from the viewpoint of suppressing the horizontal motion of electrons when light is incident on the photoelectric conversion section, it is preferable that the length of the short side be short, for example, 30 μm or less, 10 μm or less, or 5 μm or less.

[0027] In one recess, the opening surfaces 21 facing the bottom surface 22 may be parallel to each other independently. When the silicon substrate of the present invention is used in a device for photoelectric conversion or the like, it is preferable that they are parallel.

[0028] When the opening surface 21 and the bottom surface 22 are parallel in a single recess, the distance between them (hereinafter also referred to as the depth of the recess) can vary depending on the application of the device used. For example, the depth of the recess may be 0.1 μm to 500 μm, or it may be 0.1 μm or more, 0.5 μm or more, 1 μm or more, 3 μm or more, 5 μm or more, 10 μm or more, 30 μm or more, 50 μm or more, 100 μm or more, 150 μm or more, 200 μm or more, or 300 μm or more, or it may be 500 μm or less, 300 μm or less, 200 μm or less, 150 μm or less, 100 μm or less, 50 μm or less, 30 μm or less, or 10 μm or less, 5 μm or less, 1 μm or less, or 0.5 μm or less. Furthermore, the depth of the recesses in the silicon substrate 10 may be uniform or not, but uniformity is preferred. If all recesses are standardized, the depth of each recess may be, for example, within ±20%, ±10%, or ±1% of the average depth of all recesses.

[0029] To improve the temporal resolution of an image sensor, it is important that the photoelectrically converted charge reaches the signal processing circuit quickly. Therefore, when using the silicon substrate of the present invention in an image sensor or the like, a small recess depth is preferable, not only from the viewpoint of miniaturizing the device, but also from the viewpoint of improving temporal resolution by allowing the charge to reach the signal processing circuit in a short time. However, a certain depth is necessary to completely photoelectrically convert the incident light, and the required depth depends on the wavelength range of the light to be detected, the absorption coefficient of the material used in the photoelectric conversion part, etc. For example, when germanium is used as the photoelectric conversion material, a recess depth of 0.5 μm is sufficient to completely photoelectrically convert 550 nm light, which is visible light. Also, a recess depth of 3 μm is sufficient to completely photoelectrically convert 1100 nm light, which is near-infrared light. Therefore, a recess depth of 0.5 μm to 3 μm is preferable.

[0030] The shape of each base surface 22 can be a variety of shapes, such as triangle, rhombus, trapezoid, rectangle, hexagon, ellipse, crescent, partial circle, sector, or circle, independently of each other. From the viewpoint of ensuring high time resolution, a circular or rectangular shape is preferable, from the viewpoint of processability, a rectangular shape is more preferable, and a square shape is even more preferable. The shapes of the base surfaces 22 within the silicon substrate 10 may all be the same or not, but uniformity is preferable.

[0031] The shapes of the opposing opening surface 21 and bottom surface 22 in one recess 20 may be the same or different, but from the viewpoint of machinability and other factors, it is preferable that they be the same shape.

[0032] In a preferred embodiment, the shapes of the opening surface 21 and the bottom surface 22 are rectangular.

[0033] If the base surface 22 is rectangular, the length of its shorter side may vary depending on the application of the device used. For example, the length of each shorter side may be independently between 0.1 μm and 1500 μm, or may be 0.1 μm or more, 0.5 μm or more, 1 μm or more, 3 μm or more, 5 μm or more, 10 μm or more, 30 μm or more, 50 μm or more, 100 μm or more, 150 μm or more, 200 μm or more, 300 μm or more, 500 μm or more, or 1000 μm or more, or 1500 μm or less, 1000 μm or less, 500 μm or less, 300 μm or less, 200 μm or less, 150 μm or less, 100 μm or less, 50 μm or less, 30 μm or less, 10 μm or less, 5 μm or less, or 1 μm or less. Furthermore, the dimensions of the bottom surface 22 within a single silicon substrate 10 may be uniform or not, but uniformity is preferred. If uniformity is maintained, the length of the shorter side (the length of one side in the case of a square) may be, for example, within ±20%, ±10%, or ±1% of the average value of the entire aperture surface. From the viewpoint of suppressing the generation of crystal defects when photoelectric conversion material (e.g., germanium, etc.) is heteroepitaxially grown from the bottom surface 22, and from the viewpoint of suppressing the horizontal motion of electrons when light is incident on the photoelectric conversion part, it is preferable that the length of the shorter side be small, for example, 30 μm or less, 10 μm or less, or 5 μm or less.

[0034] When the silicon substrate of the present invention is used in an image sensor or the like, the bottom surface 22 is particularly preferably square. This is because a square shape is desirable from the viewpoint of increasing pixel density, miniaturization, and device miniaturization. Furthermore, if the bottom surface 22 is rectangular, it is desirable to have a square shape in order to minimize the length of the longer side, from the viewpoint of suppressing the horizontal motion of electrons when light is incident on the photoelectric conversion unit. The length of one side of the bottom surface is also preferably small within the range that is feasible to manufacture, from the same viewpoint as above, for example, preferably 0.3 μm to 100 μm, or 0.5 μm to 26 μm.

[0035] Area of ​​base 22 (hereinafter, S b (S) and the area of ​​the opening surface 21 (hereinafter, S O Area ratio r s =S b / S O may vary depending on the use of the device and the like. When the silicon substrate of the present invention is used for an image sensor or the like, from the viewpoint of suppressing the horizontal movement of electrons when light enters the photoelectric conversion unit, r s is preferably less than 1. r s The preferable range of r may be, for example, 0.999 or less, 0.99 or less, 0.95 or less, 0.90 or less, 0.80 or less, 0.70 or less, 0.60 or less, 0.50 or less, 0.40 or less, or 0.30 or less, or 0.05 or more, 0.10 or more, 0.15 or more, 0.20 or more, or 0.25 or more.

[0036] When the silicon substrate of the present invention is used for an image sensor or the like, the bottom surface 22 can be an epitaxial growth surface for filling a photoelectric conversion material such as germanium in the concave portion. Therefore, there is no oxide film on the bottom surface 22, and the base material 11 (preferably the (100) surface of single crystal silicon) is exposed.

[0037] The side surface 23 of the concave portion is defined by connecting the outer edge of the opening surface 21 and the outer edge of the bottom surface 22. In a preferred embodiment, the side surface 23 is defined by connecting the outer edge of the rectangular opening surface 21 and the outer edge of the rectangular bottom surface 22. In a more preferred embodiment, the side surface 23 is defined by connecting the outer edge of the rectangular opening surface 21 and the outer edge of the rectangular bottom surface 22, and S b <S O is satisfied. At this time, the side surface 23 is inclined with respect to the bottom surface 22, and the angle of the angle formed by the bottom surface and the side surface (hereinafter referred to as the inclination angle) is more preferably 20° to 8°, or 30° to 70°, and even more preferably 40° to 60°. The shape of the concave portion in this embodiment can be a quadrangular frustum, that is, a pyramid type. The inclination angle is particularly preferably 54.7° from the viewpoint of workability during manufacturing.

[0038] To improve the temporal resolution of an image sensor, it is crucial to suppress the horizontal motion of photoelectrically converted electrons and ensure they reach the sensor efficiently. Conventionally, attempts have been made to improve the shape of the photoelectric conversion section to suppress the horizontal motion of electrons. For example, Non-Patent Literature 1 discloses an image sensor that includes a device with a structure called a "p-well structure" intended to collect charge in the sensor's readout section as a prior art. However, this document states that although signal charges accumulate in the center along the p-well structure, the charges undergo horizontal motion during this process, causing delays in reaching the sensor (see Figure 5 in the document, etc.). Therefore, Figure 3 shows a comparison of another photoelectric conversion section proposed to further improve temporal resolution with the p-well type structure. The pipe-type structure has very high temporal resolution because it can suppress the horizontal motion of charges, but because the aperture ratio on the light source side is low at 10%, a microlens with a high refractive index is required, and it cannot be used with light that passes through the lens and cannot be focused, such as X-rays, or light that is absorbed by the lens. On the other hand, the theoretical time resolution of the pyramidal structure is about one-tenth that of the p-well structure, and it also has the advantage of having a 100% aperture ratio compared to the pipe-shaped structure. For the reasons above, the shape of the recess is preferably pyramidal.

[0039] The recess 20 has an oxide film 24 on its side surface 23. The oxide film 24 is preferably a silicon oxide film (SiO2). The oxide film 24 not only acts as an insulating film on the side surface, but also has the effect of preventing light that has entered one recess (pixel) from moving to the silicon on the substrate or to an adjacent pixel by utilizing the total internal reflection of light due to the difference in refractive index between the photoelectric conversion material (e.g., silicon) that the recess may have and the oxide film, thereby ensuring reliable photoelectric conversion within the pixel.

[0040] Furthermore, although not bound by theory, the oxide film 24 may also play a role in reducing the contact area between the silicon substrate and the photoelectric conversion material when the photoelectric conversion material is epitaxially grown on the bottom surface 22. For example, when considering the heteroepitaxial growth of germanium on the bottom surface 22, the lattice constant of silicon is approximately 0.5431 nm and the lattice constant of germanium is approximately 0.5675 nm, a difference of about 4.4%, which can lead to large crystal defects at the germanium / silicon substrate interface. These crystal defects can cause misfit dislocations and through dislocations, which can adversely affect device performance. If the recess 20 has an oxide film 24 on the side surface 23, the contact area between the silicon substrate and the photoelectric conversion material can be reduced, and the occurrence of crystal defects can be suppressed.

[0041] The thickness of the oxide film 24 is not particularly limited, as long as it is within the range in which the oxide film can perform the above-mentioned role. For example, the thickness of the oxide film 24 may be, for example, 1 nm to 1000 nm, or 1 nm or more, 3 nm or more, 5 nm or more, 10 nm or more, 30 nm or more, 50 nm or more, or 100 nm or more, or 1000 nm or less, 500 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less. Furthermore, from the viewpoint of processability, the thickness of the oxide film 24 is preferably 5 nm to 100 nm, more preferably 10 nm to 50 nm, and even more preferably 15 nm to 40 nm.

[0042] Furthermore, the silicon substrate of the present invention may have a recess 20 that contains a photoelectric conversion material capable of converting light incident on the recess into photoelectric energy.

[0043] The recess 20 may be made of, for example, silicon. Silicon has a band gap of approximately 1.1 eV and can convert the entire visible light spectrum into photoelectric energy, and is therefore widely used as a photoelectric conversion element in visible light image sensors.

[0044] In one embodiment, the silicon substrate of the present invention has silicon as a photoelectric conversion material in a recess of a single-crystal silicon substrate.

[0045] As a method for manufacturing a silicon substrate having silicon in recesses, for example, it may be manufactured by homoepitaxial growth of silicon on the bottom surface 22 of the silicon substrate of the present invention. The embodiment in which the photoelectric conversion material is silicon has the advantage that no crystal defects occur due to the difference in lattice constants between the substrate and the photoelectric conversion material. Furthermore, light incident on the photoelectric conversion material can be totally reflected due to the difference in refractive index between the photoelectric conversion material and the oxide film 24 on the side surface 23. Therefore, the silicon substrate of the present invention has the advantage that the oxide film on the side surface prevents light that has entered one pixel from entering other pixels, and that photoelectric conversion can be reliably performed within the incident pixel.

[0046] In another embodiment, the silicon substrate of the present invention comprises a photoelectric conversion material other than silicon. The type of such material is not particularly limited, but metals, semiconductors, etc., that can efficiently perform photoelectric conversion are preferred. To improve the time resolution of the image sensor compared to when the photoelectric conversion section is silicon, it is necessary to make the photoelectric conversion section thinner and deliver the charge to the readout section in a shorter time. For this purpose, it is preferable to fill the substrate with a material that has a shallow penetration depth, that is, a light absorption coefficient greater than that of silicon in the target wavelength region. However, when selecting such a material, it is preferable to comprehensively consider not only the light absorption coefficient but also the lattice constant of the crystal of the filling material, the mobility in the crystal, the degree of dark current generation, the band gap, etc. Examples of such photoelectric conversion materials include germanium (Ge), selenium (Se), silicon germanium (SiGe), silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium phosphide (GaP), aluminum phosphide (AlP), indium phosphide (InP), calcium fluoride (CaF2), and indium gallium arsenide (InGaAs).

[0047] In a preferred embodiment, the silicon substrate of the present invention is filled with germanium in the recesses. Although germanium is a single-crystal material, it has an optical absorption coefficient several tens of times larger than that of silicon in the visible light region, and therefore, theoretically, a time resolution of a fraction of that of silicon can be expected. Furthermore, because its band gap is about 0.7 eV, which is smaller than the band gap of silicon (about 1.1 eV), it has an excellent optical absorption coefficient even in the infrared region and can transport signal charges at a drift rate similar to that of Si with a smaller voltage.

[0048] One method for filling the recesses 20 of the silicon substrate with germanium is to fill them by heteroepitaxial growth on the bottom surface 22, for example. In this embodiment, since the lattice constant of silicon is about 0.5431 nm and the lattice constant of germanium is about 0.5675 nm, which differs by about 4.4%, crystal defects occurring at the germanium / silicon substrate interface may become a problem. However, the silicon substrate of the present invention has the advantage that the contact area between germanium and silicon is reduced by the oxide film 24 covering the side surface 23, thereby suppressing the occurrence of crystal defects.

[0049] The filling rate of the photoelectric conversion material in one recess 20 may be any value depending on the device design, for example, it may be 1% or more, 10% or more, 30% or more, 50% or more, 70% or more, 90% or more, or 95% or more, or it may be 120% or less, 100% or less, 90% or less, 70% or less, 60% or less, or 50% or less. In this disclosure, the filling rate of the photoelectric conversion material means 100 × (volume of photoelectric conversion material) / (volume of recess).

[0050] The silicon substrate of the present invention can be suitably used as a device for photoelectric conversion, for example, for an image sensor.

[0051] Furthermore, this disclosure further details the method for manufacturing the silicon substrate of the present invention. For the purpose of understanding the manufacturing method, the following figures are schematic cross-sectional diagrams that schematically represent each step in a cross-sectional view of the substrate. Those skilled in the art will be able to clearly understand the three-dimensional process by referring to the description herein and the said cross-sectional diagrams.

[0052] The method for manufacturing a silicon substrate according to the present invention involves the following steps (i) to (iii): (i) A step of forming a recess by etching a silicon substrate; (ii) A step of covering the recess with an oxide film; and (iii) A step of removing the oxide film on the bottom surface of the recess while leaving the oxide film on the side surface of the recess by anisotropic etching; Includes.

[0053] <Process (i)> Step (i) may involve forming an oxide film on the substrate, coating it with a resist, patterning it by lithography, and then etching to form recesses. The lithography method is not particularly limited, and patterning may be performed using known lithography methods such as photolithography, electron beam lithography, ion beam lithography, and X-ray lithography.

[0054] In one embodiment, patterning is performed by photolithography.

[0055] In one embodiment, patterning is performed by electron beam lithography.

[0056] [Formation of oxide film] First, a substrate is prepared. Next, as shown in Figure 4, an oxide film 41 is formed to cover the surface of the substrate 40. The oxide film 41 covering the surface of the substrate 40 may be formed by thermal oxidation of the substrate 40. Alternatively, a substrate with an oxide film already formed on it may be obtained and used.

[0057] -Base material As the substrate 40, any of the silicon substrates exemplified in the section on articles of the present invention may be used, but it is preferable to use a single-crystal silicon substrate in which the crystal orientation of the silicon is the surface orientation (100). When the anisotropic etching in step (i) is performed by wet etching, it is particularly preferable to use the above-mentioned single-crystal silicon substrate from the viewpoint of processability. For example, when using a silicon wafer, the wafer may be used as is, or chip-shaped substrates cut in the orientation flat or notch direction and perpendicular thereto using a dicer or the like may be used.

[0058] -Thermal oxidation The oxide film 41 shown in Figure 4A may be formed by thermal oxidation of the substrate 40. The temperature during thermal oxidation is not particularly limited, but may be 800°C or higher, 900°C or higher, or 1000°C or higher, and may also be 1200°C or lower, 1100°C or lower, or 1000°C or lower. Thermal oxidation may be carried out, for example, using a thermal oxidation furnace, or by means of commercially available methods.

[0059] The thermal oxidation time may be 1 hour or more, 2 hours or more, or 3 hours or more, and may be 6 hours or less, 5 hours or less, or 4 hours or less.

[0060] The thermal oxidation atmosphere is not particularly limited, but may be an atmosphere containing water vapor and / or oxygen.

[0061] In one embodiment, the substrate may be placed in an oxidation furnace at 1000°C and water and oxygen may be introduced for 3 hours to form an oxide film 41 on the substrate. In another embodiment, the substrate may be placed in an oxidation furnace at 1000°C and water and oxygen may be introduced for 1 hour and 30 minutes to form an oxide film 41 on the substrate.

[0062] The thickness of the oxide film 41 may be, for example, 10 nm or more, 50 nm or more, 100 nm or more, 200 nm or more, 300 nm or more, 500 nm or more, or 700 nm or more, and may also be 2000 nm or less, 1500 nm or less, 1000 nm or less, 700 nm or less, or 500 nm or less.

[0063] Next, as shown in Figure 4B, a resist 41R is formed to cover the oxide film 41. The resist 41R may be formed by the method illustrated below.

[0064] - Dehydrated baking Before applying the resist to the oxide film, a dehydration bake may be performed to improve the adhesion of the resist. The conditions for the dehydration bake are not particularly limited, but the temperature may be 100°C or higher, 120°C or higher, or 140°C or higher, and may also be 200°C or lower, 180°C or lower, or 160°C or lower. The time may be 3 minutes or more, 5 minutes or more, 10 minutes or more, or 30 minutes or more, and may also be 60 minutes or less, 50 minutes or less, or 40 minutes or less. In one embodiment, the dehydration bake may be performed at 120°C for 5 minutes.

[0065] -OAP processing After dehydration baking and before applying the resist onto the oxide film, hexamethyldisilazane treatment (OAP treatment) may be performed to improve the adhesion of the resist. OAP treatment makes it easier to suppress peeling of the resist layer during development.

[0066] The conditions for the OAP treatment are not particularly limited, but from the viewpoint of uniformly coating the substrate with hexamethyldisilazane, the OAP treatment may be performed by first coating the substrate with hexamethyldisilazane at a low rotation speed, and then rotating the substrate at a high rotation speed. Here, low rotation speed means between 300 rpm and 700 rpm. High rotation speed means between 2000 rpm and 4000 rpm. The rotation time is not particularly limited, but may be adjusted as appropriate between 1 second and 30 seconds. In one embodiment, the OAP treatment may be performed by coating the substrate with hexamethyldisilazane while rotating the substrate at 500 rpm for 5 seconds, and then at 3000 rpm for 20 seconds.

[0067] Although the above OAP treatment conditions were given using spin coating as an example, OAP treatment can also be performed using known methods. For example, OAP treatment may be carried out using an appropriate coating method such as roll coating, flow coating, dip coating, spray coating, or doctor coating to achieve a predetermined coating film thickness.

[0068] - Resist coating The resist is applied so as to cover the entire oxide film covering the substrate surface. The application conditions for the resist are not particularly limited, but conditions similar to those for the OAP treatment described above may be used. The first resist may be a commercially available resist; for example, OFPR800LB (manufactured by Tokyo Ohka Kogyo Co., Ltd.) may be used as a photoresist, and ZEP520A (manufactured by Nippon Zeon Co., Ltd.) may be used as an electron beam resist. The resist may also be diluted with a commonly used diluent, such as anisole.

[0069] After applying the first resist and before exposure, pre-baking may be performed to evaporate the solvent inside the resist. The conditions for pre-baking are not particularly limited, but the temperature may be 80°C or higher, 90°C or higher, or 100°C or higher, and may also be 150°C or lower, 130°C or lower, or 110°C or lower. The time may be 60 seconds or higher, 90 seconds or higher, or 120 seconds or higher, and may also be 240 seconds or lower, 210 seconds or lower, or 180 seconds or lower. In one embodiment, pre-baking may be performed at 100°C for 90 seconds.

[0070] By the above method, a resist 41R can be formed to cover the oxide film 41, as shown in Figure 4B. Next, by patterning the resist 41R using lithography as detailed below, a substrate can be obtained from which the resist has been removed from the desired recess formation locations, as shown in Figure 4C.

[0071] -exposure In one embodiment, patterning is performed by photolithography after coating a photoresist, which is a resist 41R. Specifically, the resist 41R formed on the substrate is exposed through a mask having one or more desired patterns. When the resist is exposed through such a mask, the resist is patterned to correspond to the shape of the mask pattern.

[0072] The shape of the mask pattern described above may be a variety of shapes, such as a triangle, rhombus, trapezoid, rectangle, hexagon, ellipse, crescent, partial circle, sector, or circle. In a preferred embodiment, the shape of the mask pattern is a rectangle.

[0073] If the above mask pattern is rectangular, the length of its shorter side is not particularly limited, but may be 0.1 μm or more, 0.2 μm or more, 0.5 μm or more, 1 μm or more, 3 μm or more, 5 μm or more, 10 μm or more, 30 μm or more, 50 μm or more, 100 μm or more, 150 μm or more, 200 μm or more, 300 μm or more, 500 μm or more, 1000 μm or more, or 2000 μm or more, or 3000 μm or less, 1500 μm or less, 1000 μm or less, 500 μm or less, 30 μm or less, 150 μm or less, 100 μm or less, 50 μm or less, 30 μm or less, or 10 μm or less, 3 μm or less, or 1 μm or less. In one embodiment, the length of the shorter side is 7.8 μm.

[0074] In a more preferred embodiment, the shape of the mask pattern is square.

[0075] For example, when performing photolithography using a positive type, if the mask pattern area is used as a light-shielding area, a substrate from which the resist has been removed from the desired recess formation location can be obtained by subsequent development, as shown in Figure 4C.

[0076] For example, when performing photolithography using a negative type, if the mask pattern area is used as an opening in a light-shielding plate, a substrate from which the resist has been removed from the desired recess formation position can be obtained by subsequent development, as shown in Figure 4C.

[0077] Exposure conditions are not particularly limited, but an illuminance of 10 w / cm² is required. 2 Above, 20w / cm 2 Above 30 w / cm² 2 The above is sufficient, or 50 w / cm² 2 Below, 40w / cm 2 The following, or 30 w / cm² 2 The following may apply: The exposure time may be 3 seconds or more, 4 seconds or more, or 5 seconds or more, and may also be 10 seconds or less, 8 seconds or less, or 6 seconds or less. The exposure conditions may be adjusted arbitrarily, provided that illuminance × time ≥ 100. In one embodiment, the illuminance is 20 w / cm². 2 The exposure time can be 5.5 seconds.

[0078] - Pattern drawing In one embodiment, patterning is performed by electron beam lithography, which involves applying a resist 41R, an electron beam resist, and then irradiating it with an electron beam to transfer the desired pattern. Electron beam lithography allows for the production of silicon substrates with finer depressions than those produced by photolithography.

[0079] The drawing conditions are not particularly limited, but the acceleration voltage may be 1kV or more, 10kV or more, 20kV or more, 30kV or more, 50kV or more, or 100kV or more, or 300kV or less, or 200kV or less. The beam current may be 1pA or more, 10pA or more, 50pA or more, 100pA or more, 500pA or more, 1nA or more, 5nA or more, 10nA or more, or 50nA or more, or 100nA or less, 50nA or less, 30nA or less, 10nA or less, or 1nA or less. Generally, the higher the acceleration voltage and the lower the beam current, the finer the pattern that can be drawn. In one embodiment, the acceleration voltage may be 50.3kV and the beam current may be 10nA.

[0080] Electron beam lithography may be performed using either a positive or negative beam. In one embodiment, electron beam lithography may be performed using a positive beam.

[0081] After development following electron beam lithography, a substrate can be obtained in which the resist has been removed from the desired recess formation locations, as shown in Figure 4B.

[0082] -developing After exposure, the first resist is developed using a developer. The developer may be a commercially available developer. For example, NMD-3 (manufactured by Tokyo Ohka Kogyo Co., Ltd.) may be used as a developer for photoresists, and other developers such as alkaline solutions of tetramethylammonium hydroxide (TMAH), tetraethylammonium hydroxide (TEAH), tetrapropylammonium hydroxide (TPAH), and tetrabutylammonium hydroxide (TBAH) can be used. Also, for example, ZED-N50 (manufactured by Nippon Zeon Co., Ltd.) may be used as a developer for electron beam resists, and other developers such as n-amyl acetate, propylene glycol monomethyl ether acetate (PGMEA), and solvents having at least two chemical structures from among acetate groups, ketone groups, ethone groups, ether groups, and phenyl groups may be used. The solution concentration of the developer may be, for example, 0.1 to 10% by mass, preferably 2 to 5% by mass.

[0083] The development conditions are not particularly limited, but the development time may be 60 seconds or more, 90 seconds or more, or 120 seconds or more, and may be 300 seconds or less, 240 seconds or less, or 180 seconds or less.

[0084] Washing may be performed after development. Washing may be done by immersing the substrate in water collected in a container. Alternatively, washing may be done by exposing the substrate to running water. The washing time is not particularly limited, but it may be performed for 60 seconds or more and 120 seconds or less.

[0085] -Post-bake Post-baking may be performed after development. There are no particular restrictions on the conditions for post-baking, but the temperature may be 100°C or higher, 120°C or higher, or 140°C or higher, and may be 200°C or lower, 180°C or lower, or 160°C or lower. The time may be 1 minute or more, 2 minutes or more, 3 minutes or more, or 4 minutes or more, and may be 8 minutes or less, 7 minutes or less, or 6 minutes or less. In one embodiment, post-baking may be performed at 120°C for 5 minutes.

[0086] -Oxide film etching By following the above steps, a silicon substrate can be obtained in which the resist is removed from the desired recess formation location and the oxide film is exposed. By removing this exposed oxide film portion by oxide film etching, a substrate can be obtained in which the substrate surface is exposed at the desired recess formation location, as shown in Figure 4D.

[0087] Oxide film etching may be performed by wet etching. Commercially available etching solutions may be used, such as HF or BHF. The step of supplying the etching solution to the substrate may be performed by discharging the etching solution from a nozzle or the like, or by immersing the substrate in the etching solution.

[0088] The time required to remove the oxide film with the etching solution is not particularly limited, but may be 1 minute or more, 3 minutes or more, 5 minutes or more, 7 minutes or more, or 10 minutes or more, or it may be 20 minutes or less, 15 minutes or less, 10 minutes or less, or 7 minutes or less. In one embodiment, the oxide film etching may be performed by immersing the substrate in BHF as the etching solution for 4 minutes and 40 seconds.

[0089] Furthermore, oxide film etching may be performed by dry etching. The etching gas may be a commercially available etching gas, such as CF4, C4F6, C4F8, SF6, NF3, CH3F, Cl2, Ar, O2, etc., either individually or in mixtures. In a preferred embodiment, the oxide film may be removed by reactive ion etching using the above etching gas. Alternatively, it may be performed by other known dry etching methods, such as plasma etching or ion beam etching.

[0090] After etching the oxide film, the surface may be washed with running water. The washing time is not particularly limited, but it may be performed for 1 to 10 minutes.

[0091] -etching After etching the oxide film, the substrate is etched to form one or more recesses on the substrate. The etching may be isotropic or anisotropic, but anisotropic etching is preferred from the viewpoint of suppressing the occurrence of undercuts. The etching may be performed by wet etching or dry etching, but wet etching is preferred from the viewpoint of processability and productivity.

[0092] Wet etching is not particularly limited, but may be either a dip etching method or a spin etching method.

[0093] The chemical solution used for wet etching may be an alkaline solution, such as a TMAH (Tetramethyl ammonium hydroxide) solution, a sodium hydroxide solution, or a potassium hydroxide solution, with TMAH solution being preferred. The concentration may be 10% by mass or more and 30% by mass or less, preferably 15% by mass or more and 25% by mass or less.

[0094] The etching temperature may be 30°C or higher and 90°C or lower, and preferably 60°C or higher and 90°C or lower. The etching time may vary depending on the shape and size of the substrate or recess, but may be, for example, 1 minute or more and 30 minutes or less. In one embodiment, the etching time may be 100 seconds, and in another embodiment, the etching time may be 13 minutes.

[0095] Furthermore, etching may be performed using dry etching. Dry etching offers advantages such as avoiding undercuts that may occur with wet etching and forming recesses at arbitrary angles. The etching gas may be a commercially available etching gas, such as CF4, C4F6, C4F8, SF6, NF3, CH3F, Cl2, Ar, O2, etc., either individually or in mixtures. In a preferred embodiment, the oxide film may be removed by reactive ion etching using the above etching gas. Alternatively, other known dry etching methods, such as plasma etching or ion beam etching, may be used.

[0096] After etching, the surface may be washed with running water. The washing time is not particularly limited, but it may be carried out for 1 to 10 minutes.

[0097] -Removal of resist After etching as described above, remove the resist 41R. The resist may also be removed by ultrasonic cleaning. The ultrasonic cleaning may be carried out until the resist is removed, for example, for 1 minute or more and 10 minutes or less.

[0098] The removal of resist 41R may be performed between the etching and oxide film etching processes described above.

[0099] By performing the above-described step (i), a substrate can be obtained in which the portion of the substrate surface other than the recessed area 50 is coated with an oxide film, as shown in Figure 5A.

[0100] <Process (ii)> Step (ii) is a step in which the entire surface of a silicon substrate having recesses is coated with an oxide film by thermal oxidation or the like.

[0101] The present invention relates to a method for manufacturing a silicon substrate having an oxide film on the side surfaces of recesses, but no oxide film on the bottom surface. To achieve this configuration, it is preferable that the oxide film formed in step (ii) on the bottom surface is thinner than the oxide film formed on the side surfaces. By creating this difference in the thickness of the oxide film, it becomes possible to remove the oxide film on the bottom surface while leaving the oxide film on the side surfaces during etching in the subsequent step (iii).

[0102] As a result of the applicant's investigation, it was found that when a single-crystal silicon substrate is thermally oxidized, the speed of oxide film formation differs depending on the crystal orientation of the silicon. In other words, when a single-crystal silicon substrate is thermally oxidized under the same conditions, the oxide film thickness is larger for silicon with a crystal orientation of (111) than for silicon with a crystal orientation of (100). Therefore, in step (ii), it is preferable to perform thermal oxidation on a substrate in which the crystal orientation of silicon at the bottom of the recess is (100) and the crystal orientation of silicon on the side surface is (111) in order to manufacture a silicon substrate having the above configuration.

[0103] The temperature during thermal oxidation is not particularly limited, but may be 800°C or higher, 900°C or higher, or 1000°C or higher, and may also be 1200°C or lower, 1100°C or lower, or 1000°C or lower. The duration of thermal oxidation may be 10 minutes or more, 20 minutes or more, or 30 minutes or more, and may also be 3 hours or less, 2 hours or less, or 1 hour or less. A shorter oxidation time is preferable because it allows the rate of thermal oxidation due to differences in surface orientation to be more readily apparent. For example, an oxidation time of 10 minutes to 1 hour is preferred.

[0104] In one embodiment, the substrate may be placed in an oxidation furnace at 1000°C, and water and oxygen may be introduced for 30 minutes to form an oxide film 41 on the substrate.

[0105] Other conditions may be the same as those for thermal oxidation described above with respect to process (i).

[0106] By performing the above-described process (ii), a substrate can be obtained in which the entire surface of the substrate is coated with an oxide film, as shown in Figure 5B.

[0107] <Step (iii)> Step (iii) is a process of completely removing the oxide film from the bottom surface while leaving an oxide film on the sides of the recesses by anisotropic etching of the silicon substrate after thermal oxidation.

[0108] Etching can be performed by either wet etching or dry etching, as long as it is anisotropic etching, but dry etching is preferred because it is anisotropic etching of the oxide film. Dry etching may employ reactive ion etching (RIE), plasma etching, sputter etching, etc., but reactive ion etching (RIE) is preferred, and ICP (inductively coupled plasma)-RIE is even more preferred.

[0109] Anisotropic etching by RIE is performed by impacting the (100) plane of the recess bottom surface with reactive gases or radicals perpendicular to it. The side surface, which is the (111) plane and has an inclination angle of 54.7° with respect to the (100) plane of the bottom surface, may have a lower etching rate compared to the (100) plane. Due to this principle, even when the oxide film is completely removed from the bottom surface, an oxide film can remain on the side surface.

[0110] The gases used for dry etching may include CF4, SF6, CHF3, C4F8, NF3, O2, and mixtures thereof.

[0111] The etching gas flow rate may be between 10 sccm and 200 sccm, and preferably between 20 sccm and 150 sccm.

[0112] The etching gas pressure may be between 3 mtorr and 500 mtorr, and preferably between 100 mtorr and 400 mtorr.

[0113] The etching pressure may be between 100W and 700W, and preferably between 300W and 600W.

[0114] The processing time may be between 10 and 60 minutes, and preferably between 20 and 40 minutes.

[0115] By following the above steps, the silicon substrate of the present invention, as shown in Figure 6, can be manufactured.

[0116] Furthermore, by filling the recesses of the silicon substrate of the present invention with a photoelectric conversion material such as germanium, a silicon substrate as shown in Figure 7 can be manufactured. The method of filling with the photoelectric conversion material is not particularly limited and may be done by known epitaxial growth methods such as liquid-phase epitaxy, gas-phase epitaxy, or molecular beam epitaxy (MBE). In one embodiment, epitaxial growth is performed by molecular beam epitaxy. [Examples]

[0117] The present disclosure will be described in detail below with reference to examples, but the present disclosure is not limited to these examples.

[0118] Four Si wafers were used as substrates. Each Si wafer had a diameter of 4 inches, a plane orientation of (100), a P-type orientation, and a thickness of 500 μm.

[0119] First, the wafer was placed in an oxidation furnace at 1000°C, and water and oxygen were introduced for 3 hours to grow an oxide film on the substrate.

[0120] Photolithography was performed under the conditions shown in Table 1, and patterning was carried out using a square pattern mask. Subsequently, oxide film etching was performed according to the conditions in Table 2, and the resist was removed by ultrasonic cleaning for a total of 2 minutes.

[0121] [Table 1]

[0122] [Table 2]

[0123] Next, wet etching was performed under the conditions shown in Table 3. The etching times for each of the four wafers were 100 seconds, 100 seconds, 113 seconds, and 106 seconds, respectively.

[0124] [Table 3]

[0125] Next, to form another oxide film on the wet-etched surface, the wafer was subjected to thermal oxidation in an oxidation furnace at 1000°C for 30 minutes. Subsequently, the silicon substrate of the present invention was manufactured by dry etching under the conditions shown in Table 4.

[0126] [Table 4]

[0127] Next, single-crystal germanium was epitaxially grown from single-crystal silicon on the bottom surface of the substrate using MBE. [Industrial applicability]

[0128] The silicon substrate of the present invention can be used for a variety of applications. For example, by filling the silicon substrate of the present invention with germanium or the like, it can be applied to photoelectric conversion devices for image sensors and the like. [Explanation of Symbols]

[0129] 10 Silicon substrate 11 Base material 12, 20 recesses 21 Opening surface 22 Bottom 23 Side view 24 Oxide film 40 Base material 41 Oxide film 41R Resist 50 recesses 70 Photoelectric conversion materials

Claims

1. A silicon substrate having one or more recesses, The recess has a bottom surface and side surfaces, The aforementioned side surface has an oxide film, and the aforementioned bottom surface does not have an oxide film. Silicon substrate.

2. The silicon substrate according to claim 1, wherein the bottom surface is parallel to the opening surface of the recess.

3. The silicon substrate according to claim 1, wherein the shape of the bottom surface and the opening surface of the recess is rectangular when viewed from above.

4. The silicon substrate according to claim 3, wherein the length of each side of the bottom surface is independently 0.3 μm to 100 μm.

5. The silicon substrate according to claim 2, wherein the distance between the opening surface and the bottom surface is 0.5 μm to 3 μm.

6. The silicon substrate according to claim 1, wherein the area of ​​the bottom surface is smaller than the area of ​​the opening surface.

7. The silicon substrate according to claim 1, wherein the side surface is inclined with respect to the bottom surface.

8. The silicon substrate according to claim 1, wherein the angle between the bottom surface and the side surface is 30° to 70°.

9. The silicon substrate according to claim 1, wherein the thickness of the oxide film is 10 nm to 50 nm.

10. Furthermore, the silicon substrate according to claim 1, further comprising a photoelectric conversion material in the recess.

11. The silicon substrate according to claim 10, wherein the photoelectric conversion material is germanium.

12. A silicon substrate according to claim 1, for use in photoelectric conversion.

13. The following steps (i) to (iii): (i) A step of forming a recess by etching a silicon substrate; (ii) A step of coating the recess with an oxide film; and (iii) A step of removing the oxide film on the bottom surface of the recess while leaving the oxide film on the side surface of the recess by anisotropic etching; A method for manufacturing a silicon substrate according to claim 1, including the method described in claim 1.

14. The manufacturing method according to claim 13, wherein step (i) is performed on the surface of a substrate in which the crystal orientation of silicon is the surface orientation (100).

15. The manufacturing method according to claim 13, wherein the formation of the recess in step (i) is performed by anisotropic etching of the substrate.

16. The manufacturing method according to claim 15, wherein the anisotropic etching in step (i) is performed by wet etching.

17. The manufacturing method according to claim 13, wherein in step (ii), the crystal orientation of silicon on the bottom surface of the recess is the surface orientation (100), and the crystal orientation of silicon on the side surface is the surface orientation (111).

18. The manufacturing method according to claim 13, wherein the anisotropic etching in step (iii) above is performed by dry etching.

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