Multilayer ceramic capacitor and method for manufacturing the same

The multilayer ceramic capacitor achieves enhanced connectivity and moisture resistance by employing a bridge-structured interface layer with Cu-Ni alloy and glass, addressing the connectivity and cost issues in existing technologies.

JP2026082622APending Publication Date: 2026-05-19SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
SAMSUNG ELECTRO MECHANICS CO LTD
Filing Date
2025-06-03
Publication Date
2026-05-19

AI Technical Summary

Technical Problem

The challenge in manufacturing multilayer ceramic capacitors lies in achieving improved connectivity between internal and external electrodes while maintaining cost-effectiveness, as the use of smaller metal particles increases polymer content, affecting viscosity and rheological properties, and the production of fine-particle Cu becomes costly.

Method used

A multilayer ceramic capacitor design with an interface layer having a bridge structure, comprising a body region, leg regions connected to internal electrode layers, and a spacing region on the dielectric layer, utilizing a Cu-Ni alloy and glass composition to enhance connectivity and form a hermetic sealing structure.

Benefits of technology

The solution results in a capacitor with excellent capacitance characteristics and moisture resistance reliability by ensuring strong connections between internal and external electrodes, reducing material costs through the use of MOD ink and fine Cu particles.

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Abstract

This invention provides a multilayer ceramic capacitor with improved connectivity between the internal electrode layer and the external electrode, and excellent capacitance characteristics and moisture resistance reliability, as well as a method for manufacturing the same. [Solution] The multilayer ceramic capacitor includes a capacitor body including a dielectric layer 111 and an internal electrode layer 121, and an external electrode 131 disposed on the outside thereof. The capacitor body includes an active region A and a cover region. The external electrode includes a first interface layer 10 disposed on one surface of the active region and a first external layer 20 covering the interface layer. The first interface layer has a bridge structure including a body region and a plurality of leg regions connected to its lower surface, and spacing regions disposed between the leg regions. The leg regions are connected to the internal electrode layer, and the spacing regions are disposed on one surface of the dielectric layer.
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Description

Technical Field

[0001] The present disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same.

Background Art

[0002] As electronic components using ceramic materials, there are capacitors, inductors, piezoelectric elements, varistors, thermistors, and the like. Among such ceramic electronic components, a multilayer ceramic capacitor (MLCC) can be used in various electronic devices because of its advantages of being small in size, having a guaranteed high capacitance, and being easy to mount.

[0003] For example, a multilayer ceramic capacitor can be used as a chip-shaped capacitor that is mounted on the substrates of various electronic products such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), and the like, computers, personal mobile terminals, and smartphones, and serves to charge or discharge electricity.

[0004] Recently, with the miniaturization and high capacitance of MLCCs, research on the miniaturization of the thickness of internal electrodes and dielectrics has been progressing, and research on improving the contact between internal electrodes and external electrodes has been actively carried out. In order to improve the connectivity between internal electrodes and external electrodes, a paste for forming an external electrode to which small-sized metal particles are applied must be used.

[0005] However, as the metal particles used become smaller, the unit price of the particles increases due to the difficulty of synthesis, and problems occur such that the contents of other polymers required for the dispersion and adhesion of the paste, such as dispersants, binders, and the like, become relatively high. When the contents of other polymers increase, the metal solid content becomes relatively low, and the viscosity and rheological properties change, affecting the printing properties. [Overview of the project] [Problems that the invention aims to solve]

[0006] One embodiment provides a multilayer ceramic capacitor with improved connectivity between the internal electrode layer and the external electrode, resulting in excellent capacitance characteristics and moisture resistance reliability.

[0007] Another embodiment provides a method for manufacturing the multilayer ceramic capacitor. [Means for solving the problem]

[0008] One embodiment provides a multilayer ceramic capacitor comprising a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers stacked with the dielectric layers in between, and an external electrode disposed on the outside of the capacitor body, wherein the capacitor body includes an active region in which the dielectric layers and the internal electrode layers are arranged alternately with respect to each other, and a cover region in which the dielectric layers are arranged on the upper and lower surfaces of the active region in the stacking direction, and the external electrode includes an interface layer disposed on one surface of the active region and an external layer covering the interface layer, wherein the interface layer has a bridge structure including a body region, a plurality of leg regions connected to the lower part of the body region, and a spacing region disposed between the plurality of leg regions, the leg regions of the interface layer being connected to the internal electrode layers, and the spacing region of the interface layer being disposed on one surface of the dielectric layer, and the ratio of the number of internal electrode layers connected to the leg regions of the interface layer to the total number of internal electrode layers in the active region being 90% or more and 100% or less.

[0009] The leg regions of the interface layer extend into the interior of the capacitor body and can be connected to the internal electrode layer.

[0010] The leg regions of the interface layer may include an alloy of a conductive metal.

[0011] The leg region of the interface layer may contain a Cu-Ni alloy.

[0012] The leg region of the interface layer may contain the alloy of the conductive metal in an amount of 60% to 100% by volume relative to the total amount of the leg region.

[0013] The interfacial layer spacing region may include glass.

[0014] The glass may include one or more materials selected from aluminum oxide (Al2O3) and silicon dioxide (SiO2).

[0015] The intervening region of the interface layer may contain the glass in an amount of 60% to 100% by volume relative to the total volume of the intervening region.

[0016] The body region of the interface layer may contain a conductive metal.

[0017] The body region of the interface layer may contain copper (Cu).

[0018] The body region of the interface layer may contain the conductive metal in an amount of 60% to 100% by volume relative to the total amount of the body region.

[0019] The leg regions of the interface layer may include an alloy of a conductive metal, the interstitial regions of the interface layer may include glass, and the body regions of the interface layer may include a conductive metal.

[0020] The leg regions of the interface layer may include a Cu-Ni alloy, the interstitial regions of the interface layer may include glass, and the body regions of the interface layer may include copper (Cu).

[0021] The internal electrode layer may include an alloy of a conductive metal at its interface with the interface layer.

[0022] Another embodiment provides a multilayer ceramic capacitor comprising a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers stacked with the dielectric layers in between, and an external electrode disposed outside the capacitor body, wherein the capacitor body includes an active region in which the dielectric layers and the internal electrode layers are alternately arranged, and a cover region in which the dielectric layers are arranged on the upper and lower surfaces of the active region in the stacking direction, and the external electrode includes an interface layer disposed on one surface of the active region and an external layer covering the interface layer, wherein the interface layer has a bridge structure including a body region, a plurality of leg regions connected to the lower part of the body region, and a spacing region disposed between the plurality of leg regions, wherein the leg regions of the interface layer are connected to the internal electrode layers, the spacing region of the interface layer is disposed on one surface of the dielectric layer, the body region of the interface layer includes a conductive metal, the leg regions of the interface layer include an alloy of the conductive metal, and the spacing region of the interface layer includes glass.

[0023] The body region of the interface layer may contain copper (Cu), the leg region of the interface layer may contain a Cu-Ni alloy, and the interstitial region of the interface layer may contain glass containing aluminum oxide (Al2O3) and silicon dioxide (SiO2).

[0024] Another embodiment includes the steps of applying and reducing a metal-organic decomposition (MOD) ink on one surface of a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers laminated with the dielectric layers interposed therebetween to form a metal particle film, applying a paste including a conductive metal and a glass composition on one surface of the capacitor body on which the metal particle film is formed, and firing the paste to form an external electrode including an interface layer formed from the metal particle film and an external layer covering the interface layer and formed from the paste. The interface layer has a bridge structure including a body region, a plurality of leg regions connected to the lower part of the body region, and a spacing region disposed between the plurality of leg regions. The leg regions of the interface layer are connected to the internal electrode layer, and the spacing region of the interface layer is disposed on one surface of the dielectric layer, providing a method for manufacturing a multilayer ceramic capacitor.

[0025] The metal-organic decomposition (MOD) ink may include a metal ligand substance, an amine compound, a binder, an antioxidant, and a solvent.

[0026] The metal particle film may include metal nanoparticles of 10 nm to 100 nm.

[0027] The glass composition may be included in an amount of 20 wt% to 40 wt% based on the total amount of the paste.

Advantages of the Invention

[0028] According to one embodiment, a multilayer ceramic capacitor can have excellent capacitance characteristics and moisture resistance reliability by improving the connectivity between the internal electrode layer and the external electrode.

Brief Description of the Drawings

[0029] [Figure 1] It is a perspective view showing a multilayer ceramic capacitor according to one embodiment. [Figure 2] It is a cross-sectional view of the multilayer ceramic capacitor taken along the line I-I' of FIG. 1. [Figure 3]This is a cross-sectional view of a multilayer ceramic capacitor along the line II-II' in Figure 1. [Figure 4] Figure 1 is a separated perspective view showing the stacked structure of the internal electrode layers in the capacitor body. [Figure 5a] This is a schematic diagram showing the external electrodes of a multilayer ceramic capacitor according to one embodiment. [Figure 5b] This is a magnified view of the R region in Figure 5a. [Figure 6] This is a schematic diagram showing a method for manufacturing the external electrodes of a multilayer ceramic capacitor according to one embodiment. [Figure 7] This is an SEM (scanning electron microscope) analysis image of the external electrode of the multilayer ceramic capacitor according to Example 1. [Figure 8] This is an SEM (scanning electron microscope) analysis image of the external electrodes of the multilayer ceramic capacitor according to Comparative Example 1. [Figure 9a] This is an image of the SEM-EDS (scanning electron microscope-energy dispersive spectroscopy) mapping analysis of the external electrodes of the multilayer ceramic capacitor according to Example 1. [Figure 9b] This is an image of the SEM-EDS (scanning electron microscope-energy dispersive spectroscopy) mapping analysis of the external electrodes of the multilayer ceramic capacitor according to Example 1. [Figure 10a] This is an image of the SEM-EDS (scanning electron microscope-energy dispersive spectroscopy) mapping analysis of the external electrodes of a multilayer ceramic capacitor according to Comparative Example 1. [Figure 10b] This is an image of the SEM-EDS (scanning electron microscope-energy dispersive spectroscopy) mapping analysis of the external electrodes of a multilayer ceramic capacitor according to Comparative Example 1. [Figure 11] This graph shows the capacitance characteristics of the multilayer ceramic capacitors according to Example 1 and Comparative Example 1. [Figure 12] This graph shows the moisture resistance reliability of the multilayer ceramic capacitor according to Example 1. [Figure 13] This graph shows the moisture resistance reliability of the multilayer ceramic capacitor according to Comparative Example 1. [Modes for carrying out the invention]

[0030] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings, so that those with ordinary skill in the art to which the present invention pertains can easily implement it. In the drawings, parts that are not necessary for the explanation of the present invention have been omitted, and the same or similar components are denoted by the same reference numerals throughout the specification. In addition, some components in the attached drawings are exaggerated, omitted, or shown schematically, and the size of each component does not fully reflect its actual size.

[0031] The accompanying drawings are provided solely to facilitate understanding of the embodiments disclosed herein, and it should be understood that they do not limit the technical ideas disclosed herein and include all modifications, equivalents, or substitutions that fall within the concept and scope of the invention.

[0032] Terms including ordinal numbers, such as "first," "second," etc., can be used to describe a variety of components, but the components are not limited by such terms. These terms are used solely for the purpose of distinguishing one component from another.

[0033] Furthermore, when we say that a layer, membrane, region, plate, or other part is "on top" of another part, this includes not only the case where it is "directly above" the other part, but also the case where the other part is in between. Conversely, when we say that one part is "directly above" another part, it means that there is no other part in between. Moreover, being "on top" of a reference part means being located above or below the reference part, and does not necessarily mean being located "on top" in the opposite direction of gravity.

[0034] Throughout the specification, terms such as “includes” or “have” are intended to indicate the presence of features, figures, stages, operations, components, parts, or combinations thereof described in the specification, and should be understood not to preemptively exclude the possibility of the presence or addition of one or more other features, figures, stages, operations, components, parts, or combinations thereof. Therefore, when a part “includes” a component, this means, unless otherwise stated, that it may further include other components rather than excluding them.

[0035] Furthermore, throughout the specification, "on a plane" means when the subject is viewed from above, and "on a cross-section" means when the subject is viewed from the side of a cross-section obtained by cutting the subject perpendicularly.

[0036] Furthermore, throughout the specification, when the term "connected" is used, it does not only mean that two or more components are directly connected, but can also mean that two or more components are indirectly connected through other components, that they are not only physically connected but also electrically connected, or that they are all referred to by different names depending on their location or function.

[0037] Furthermore, throughout the specification, when it is stated that a substance "is included as a main component," this means that among the at least one component present in a given region, one component has the highest content relative to the total amount of the components.

[0038] A multilayer ceramic capacitor according to one embodiment will be described below with reference to Figures 1 to 4.

[0039] Figure 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment; Figure 2 is a cross-sectional view of the multilayer ceramic capacitor along the line I-I' in Figure 1; Figure 3 is a cross-sectional view of the multilayer ceramic capacitor along the line II-II' in Figure 1; and Figure 4 is a separated perspective view showing the layered structure of the internal electrode layers in the capacitor body of Figure 1.

[0040] The L-axis, W-axis, and T-axis shown in Figures 1 to 4 represent the longitudinal direction, width direction, and thickness direction of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be perpendicular to the broad surface (main surface) of the sheet-shaped component, and can be used, for example, with the same concept as the stacking direction in which the dielectric layers 111 are stacked. The longitudinal direction (L-axis direction) is the direction that extends alongside the broad surface (main surface) of the sheet-shaped component and is approximately perpendicular to the thickness direction (T-axis direction), and may be the direction in which the first external electrode 131 and the second external electrode 132 are located on both sides, for example. The width direction (W-axis direction) is the direction that extends alongside the broad surface (main surface) of the sheet-shaped component and may be approximately perpendicular to the thickness direction (T-axis direction) and the longitudinal direction (L-axis direction), and the length of the sheet-shaped component in the longitudinal direction (L-axis direction) may be longer than the length in the width direction (W-axis direction).

[0041] Referring to Figures 1 to 4, a multilayer ceramic capacitor 100 according to one embodiment includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outside of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed at opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0042] The capacitor body 110 may, for example, have a roughly hexahedral shape.

[0043] For the convenience of describing one embodiment, in the capacitor body 110, the two surfaces facing each other in the thickness direction (T-axis direction) are defined as the first and second surfaces, the two surfaces connected to the first and second surfaces are defined as the third and fourth surfaces, the two surfaces facing each other in the longitudinal direction (L-axis direction) are defined as the first and second surfaces, the two surfaces connected to the third and fourth surfaces are defined as the fifth and sixth surfaces, and the two surfaces facing each other in the width direction (W-axis direction) are defined as the fifth and sixth surfaces.

[0044] For example, the first surface on the bottom may be the surface facing the mounting direction. Also, the first to sixth surfaces may be flat, but this is not the only embodiment. For example, the first to sixth surfaces may be curved surfaces with a convex central portion, and the corners that form the boundaries of each surface may be rounded.

[0045] The shape, dimensions, and number of dielectric layers 111 of the capacitor body 110 are not limited to those shown in this embodiment.

[0046] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and first internal electrode layers 121 and second internal electrode layers 122 that are alternately arranged in the thickness direction (T-axis direction) with the dielectric layers 111 in between.

[0047] At this time, the boundaries between adjacent dielectric layers 111 of the capacitor body 110 can become so integrated that they are difficult to confirm without using a scanning electron microscope (SEM).

[0048] The capacitor body 110 may include an active region and cover regions 112 and 113.

[0049] The active region is a region in which the dielectric layer 111 and the internal electrode layers 121 and 122 are arranged alternately, and is the part that contributes to the formation of the capacitance of the multilayer ceramic capacitor 100. Specifically, the active region may be a region in which the first internal electrode layer 121 or the second internal electrode layer 122, which are stacked along the thickness direction (T-axis direction), overlap.

[0050] The cover regions 112 and 113 are margin portions in the thickness direction and can be located on the first and second surfaces of the active region, respectively, in the thickness direction (T-axis direction). Such cover regions 112 and 113 may be formed by a single dielectric layer 111 or by two or more dielectric layers 111 being laminated on the upper and lower surfaces of the active region, respectively.

[0051] Furthermore, the capacitor body 110 may also include a side margin region.

[0052] The side margin region is a margin portion in the width direction and can be located on both sides of the active region opposite to each other in the width direction (W-axis direction), i.e., on the fifth and sixth surfaces, respectively. The side margin region can be formed by applying a conductive paste layer for the internal electrode layer to the surface of the dielectric green sheet, applying the conductive paste layer only to a portion of the surface of the dielectric green sheet, and not applying the conductive paste layer to the sides of the dielectric green sheet surface, then laminating the dielectric green sheet and firing it, but the method of formation is not limited to this.

[0053] The cover regions 112, 113 and the side margin regions serve to prevent damage to the internal electrode layers 121, 122 due to physical or chemical stress.

[0054] A detailed explanation of the dielectric layer 111 and the internal electrode layers 121 and 122 will be provided later.

[0055] [External electrode] In one embodiment, external electrodes 131 and 132, namely the first external electrode 131 and the second external electrode 132, are supplied with voltages of different polarities and are electrically connectable to the exposed portions of the first internal electrode layer 121 and the second internal electrode layer 122, respectively.

[0056] With the above configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge is accumulated between the first internal electrode layer 121 and the second internal electrode layer 122, which are opposite each other. At this time, the capacitance of the multilayer ceramic capacitor 100 is proportional to the overlapping area of ​​the first internal electrode layer 121 and the second internal electrode layer 122, which overlap each other along the T-axis in the active region.

[0057] The first external electrode 131 and the second external electrode 132 may each include first and second connecting portions arranged on the third and fourth surfaces of the capacitor body 110 and connected to the first internal electrode layer 121 and the second internal electrode layer 122, respectively, and first and second band portions arranged at the corners where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.

[0058] The first and second band portions can extend from the first and second connection portions to parts of the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, respectively. The first and second band portions can serve to improve the adhesion strength of the first external electrode 131 and the second external electrode 132.

[0059] Figure 5a is a schematic diagram showing the external electrodes of a multilayer ceramic capacitor according to one embodiment, and Figure 5b is an enlarged view of the R region in Figure 5a.

[0060] Referring to Figures 5a and 5b, the external electrodes 131 and 132 according to one embodiment include interface layers 10 and 30 arranged on one surface of the active region A of the capacitor body 110, and external layers 20 and 40 covering the interface layers 10 and 30. The interface layers 10 and 30 are arranged in connection with the internal electrode layers 121 and 122. Specifically, the first external electrode 131 includes a first interface layer 10 connected to the first internal electrode 121, and a first external layer 20 covering the first interface layer 10. The second external electrode 132 includes a second interface layer 30 connected to the second internal electrode 122, and a second external layer 40 covering the second interface layer 30.

[0061] As an example, the interface layers 10 and 30 may be regions extending from the interface between the external electrodes 131 and 132 and the internal electrode layers 121 and 122 in a direction perpendicular to the stacking direction, that is, in the longitudinal direction (L-axis) of the multilayer ceramic capacitor, toward the external electrodes, to a depth of 1 μm to 5 μm, for example, 2 μm to 4 μm.

[0062] The interface layers 10 and 30, that is, the first interface layer 10 and the second interface layer 30, may have a bridge structure including a body region 12, a plurality of leg regions 14 connected to the lower part of the body region 12, and spacing regions 16 arranged between the plurality of leg regions 14.

[0063] Here, the leg region 14 is connectable to the internal electrode layers 121 and 122, specifically extending into the interior of the capacitor body 110 and connectable to the internal electrode layers 121 and 122. The spacing region 16 may also be arranged on one surface of the dielectric layer 111.

[0064] For example, the body region 12 may be a region extending from the interface between the interface layers 10, 30 and the outer layers 20, 40 to a depth of 5% to 15% of the thickness of the interface layers 10, 30, extending inward towards the interior of the interface layers 10, 30. The leg region 14 may be a region extending from the interface between the outer electrodes 131, 132 and the inner electrode layers 121, 122 to a depth of 85% to 95% of the thickness of the interface layers 10, 30, extending inward towards the outer electrodes 131, 132. The spacing region 16 may be a region extending from the interface between the outer electrodes 131, 132 and the dielectric layer 111 to a depth of 85% to 95% of the thickness of the interface layers 10, 30, extending inward towards the outer electrodes 131, 132.

[0065] By including an interface layer having the bridge structure in the external electrode, the contact between the external electrode and the internal electrode layer is improved, enabling the formation of a hermetic sealing structure that is completely sealed and prevents external moisture from entering. This ensures a multilayer ceramic capacitor with excellent capacitance characteristics and moisture resistance reliability.

[0066] According to one embodiment, the leg regions 14 of the interface layers 10 and 30 are connected to the internal electrode layers 121 and 122. Specifically, the ratio of the number of internal electrode layers 121 and 122 connected to the leg regions 14 of the interface layers 10 and 30, based on the total number of internal electrode layers 121 and 122 in the active region A, may be 90% or more and 100% or less, for example, 93% to 100% or 95% to 100%. When the internal electrode layers and the leg regions of the interface layers are connected within this ratio range, the contact between the external electrode and the internal electrode layer is increased, and a hermetic sealing structure, which is a completely sealed structure that prevents external moisture from entering, can be formed.

[0067] The interface layers 10 and 30 having a bridge structure may include conductive metal and glass.

[0068] In one embodiment, the interface layers 10 and 30 of the external electrodes 131 and 132 can be formed by applying a metal-organic decomposition (MOD) ink containing a metal ligand substance to one surface of the capacitor body 110.

[0069] Generally, when small-sized Cu particles are applied to an external electrode formation paste to improve contactability, the specific surface area of ​​the particles becomes very large, leading to the problem of needing to increase the amount of dispersant required. Furthermore, as the number of fine particles increases, the frictional force due to the increased specific surface area greatly increases the static viscosity of the paste, potentially causing many problems with the formation of external electrodes using existing dipping methods. Additionally, fine-particle Cu particles are not readily available, and their production is costly, making it uneconomical.

[0070] In one embodiment, the application of MOD ink forms interfacial layers 10 and 30 of the external electrodes 131 and 132. As a result, metals such as Cu form complexes with organic matter and exist as ions, eliminating dispersibility issues, resulting in very low static viscosity and inexpensive raw materials. By removing the organic matter through a simple reduction process, very small Cu particles of 100 nm or less can be obtained, and such fine Cu particles can be used to improve the contact between the internal electrode layer and the external electrode.

[0071] The conductive metal contained in the interface layers 10 and 30 may be one or more metals selected from copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and lead (Pb). Furthermore, the interface layers 10 and 30 may further contain an alloy of the conductive metal.

[0072] Specifically, the body region 12 of the interface layers 10 and 30 may contain a conductive metal such as Cu, the leg region 14 of the interface layers 10 and 30 may contain an alloy of conductive metals such as Cu-Ni, and the spacing region 16 of the interface layers 10 and 30 may contain glass.

[0073] External electrodes 131 and 132, including interface layers 10 and 30 and external layers 20 and 40, can be formed by applying a MOD ink containing a metal ligand substance to one surface of a capacitor body 110 to form a metal particle film, then applying a paste containing a conductive metal and glass composition onto the metal particle film, and subsequently firing it.

[0074] At this time, during the firing process, the material is sintered at the interface by small-sized metal particles such as Cu that constitute the metal particle film, and an alloy is first formed between the metal particles such as Cu and the metal such as Ni in the internal electrode layer, after which the glass composition paste may penetrate. As a result, the internal electrode layer and the external electrode are firmly connected to each other by the formation of an alloy such as Cu-Ni at the interface between the internal electrode layer and the external electrode, and the glass component of the glass composition can penetrate one surface of the dielectric layer during firing to form a bridge-structured interface layer. An external electrode having such a bridge-structured interface layer not only improves connectivity with the internal electrode layer but also has a hermetic sealing structure, which is a completely sealed structure in which external moisture cannot enter because glass is present on one surface of the dielectric layer.

[0075] The following provides a more detailed explanation of each area.

[0076] The body regions 12 of the interface layers 10 and 30 may contain a conductive metal, such as copper (Cu). The body regions 12 may also further contain a Cu-Ni alloy.

[0077] The conductive metal contained in the body region 12 can originate from the metal ligand material of the MOD ink, and by being formed from the MOD ink, it can be fine metal particles of 100 nm or less.

[0078] The body region 12 may contain a conductive metal as its main component. Specifically, the body region 12 may contain copper (Cu) in an amount of 60% to 100% by volume relative to the total amount of the body region 12, for example, 65% to 95% by volume, or 70% to 90% by volume. When the body region 12 contains a conductive metal within the above content range, the connectivity between the external electrode and the internal electrode layer can be improved.

[0079] The body region 12 may further include glass.

[0080] The leg regions 14 of the interface layers 10 and 30, which are connected to the internal electrode layers 121 and 122, specifically extending into the interior of the internal electrode layers 121 and 122 and connected to the internal electrode layers, may include an alloy of conductive metal.

[0081] The conductive metal alloy may be an alloy formed from two or more metals selected from the aforementioned conductive metals, namely copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and lead (Pb), for example, a Cu-Ni alloy.

[0082] The conductive metal alloy, such as Cu-Ni, included in the leg region 14 may be formed by an alloy of a metal such as Cu derived from the metal ligand material of the MOD ink and a metal such as Ni, which is the main component of the internal electrode layer. When the leg region 14 includes the alloy, the internal electrode layer and the external electrode can be firmly connected.

[0083] The leg region 14 may contain an alloy of a conductive metal as its main component. Specifically, the leg region 14 may contain an alloy of a conductive metal in an amount of 60% to 100% by volume relative to the total amount of the leg region 14, for example, 65% to 95% by volume, or 70% to 90% by volume. When the alloy of a conductive metal is contained in the leg region 14 within the above content range, the connectivity between the internal electrode layer and the external electrode can be greatly improved.

[0084] The leg region 14 may further include one or more materials selected from conductive metals and glass.

[0085] The spacing region 16 between the interface layers 10 and 30 may contain glass.

[0086] In one embodiment, the external electrodes 131 and 132 can have a hermetic sealing structure, which is a completely sealed structure that prevents external moisture from entering, by including glass in the spacing region 16, which is arranged between a plurality of leg regions 14 in the interface layers 10 and 30 and is located on one surface of the dielectric layer 111.

[0087] The glass contained in the spacing region 16 may originate from a glass composition paste applied onto the formed metal particle film.

[0088] The glass may include corrosion-resistant glass. Specifically, the glass may include one or more selected from aluminum oxide (Al2O3) and silicon dioxide (SiO2). For example, the glass may include aluminum oxide (Al2O3) and silicon dioxide (SiO2). When the gap region 16 of the interface layers 10 and 30 includes the glass, the moisture resistance reliability can be greatly improved.

[0089] The spacing region 16 can contain glass as its main component. Specifically, the spacing region 16 can contain glass in an amount of 60% to 100% by volume relative to the total amount of the spacing region 16, for example, 65% to 95% by volume, or 70% to 90% by volume. When glass is included in the spacing region 16 within the above content range, the moisture resistance reliability can be greatly improved.

[0090] The spacing region 16 may further include one or more materials selected from conductive metals and alloys of conductive metals.

[0091] For example, the body region 12 of the interface layers 10 and 30 may contain copper (Cu), the leg region 14 of the interface layers 10 and 30 may contain a Cu-Ni alloy, and the spacing region 16 of the interface layers 10 and 30 may contain glass, such as glass containing aluminum oxide (Al2O3) and silicon dioxide (SiO2).

[0092] In the interface layers 10 and 30, which are arranged at the interface between the active region A of the capacitor body 110 and the external electrodes 131 and 132 and have a bridge structure, a Cu-Ni alloy is included in the leg region 14 connected to the internal electrode layers 121 and 122, glass is included in the spacing region 16 arranged on one surface of the dielectric layer 111, and Cu is included in the body region 12 that abuts the external layers 20 and 40. This not only firmly maintains the connection between the external electrodes and the internal electrode layers, but also forms a completely sealed structure that prevents external moisture from entering, thereby ensuring a multilayer ceramic capacitor with excellent capacitance characteristics and moisture resistance reliability.

[0093] The outer layers 20 and 40 covering the aforementioned interface layers 10 and 30 may include conductive metal and glass. The types of conductive metal and glass are the same as those described above, so their explanation is omitted here.

[0094] The structure, composition, and content of the external electrodes 131 and 132 according to one embodiment can be confirmed by SEM (scanning electron microscope) and SEM-EDS (scanning electron microscope-energy dispersive spectroscopy) analysis.

[0095] Specifically, the multilayer ceramic capacitor 100 is loaded onto a tape with the L-axis and T-axis planes (LT planes) facing upwards, and then cured in an epoxy mixture. After that, the LT plane of the capacitor body 110 is polished to a point halfway along the W-axis to obtain a cross-sectional sample with an LT plane that allows observation of the external electrodes. Next, the obtained cross-sectional sample is measured with a scanning electron microscope (SEM) so that one side of the capacitor body and external electrodes are visible, allowing not only confirmation of the interface layer of the external electrodes but also confirmation that the interface layer has a bridge structure with body regions, leg regions, and spacing regions. For example, the SEM can be used to measure with an acceleration voltage of 20kV and a magnification of 10k.

[0096] Furthermore, in the SEM image of the obtained cross-sectional sample, the ratio of the number of internal electrode layers connected to the leg region of the interface layer can be confirmed based on the total number of internal electrode layers in the active region.

[0097] Furthermore, by performing EDS (energy-dispersive spectroscopy) analysis on the obtained cross-sectional sample, the components and content in the interface layer having a bridge structure can be confirmed.

[0098] The outer layers 20 and 40 can contain 60% to 80% by weight of conductive metal and 20% to 40% by weight of glass, for example, 65% to 75% by weight of conductive metal and 25% to 35% by weight of glass. When the outer layers have the above composition, a multilayer ceramic capacitor with excellent capacitance characteristics and moisture resistance reliability can be obtained.

[0099] The external electrodes 131 and 132 may further include a conductive resin layer disposed on the external layers 20 and 40 so as to cover the aforementioned external layers 20 and 40, and a plating layer disposed so as to cover the conductive resin layer.

[0100] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the band portion) in which the conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., the band portion) in which the outer layers 20 and 40 extend to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. In other words, the conductive resin layer can be formed on the outer layers 20 and 40 and can be formed in a manner that completely covers the outer layers 20 and 40.

[0101] The conductive resin layer contains resin and conductive metal.

[0102] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding and shock-absorbing properties and can be mixed with conductive metal powder to make a paste. For example, it may include phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0103] The conductive metal contained in the conductive resin layer serves to electrically connect with the internal electrode layers 121, 122, or the interface layers 10, 30 and the external layers 20, 40.

[0104] The conductive metal contained in the conductive resin layer may be spherical, flake-shaped, or a combination thereof. In other words, the conductive metal may consist solely of flakes, solely of spheres, or a mixture of flakes and spheres.

[0105] Here, "spherical" can include forms that are not perfectly spherical, for example, forms in which the ratio of the length of the long axis to the short axis (long axis / short axis) is 1.45 or less. "Flake powder" means powder having a flat and elongated form and is not particularly limited, but for example, the ratio of the length of the long axis to the short axis (long axis / short axis) may be 1.95 or more.

[0106] The external electrodes 131 and 132 may further include a plating layer positioned outside the conductive resin layer.

[0107] The plating layer may include nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), or alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or a nickel (Ni) plating layer and a tin (Sn) plating layer stacked sequentially, or a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer stacked sequentially. The plating layer may also include multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.

[0108] The plating layer can improve the mountability of the multilayer capacitor 100 on the substrate, structural reliability, durability against external elements, heat resistance, and equivalent series resistance (ESR).

[0109] [Dielectric layer and internal electrode layer] The dielectric layer 111 may mainly contain a barium titanate-based compound containing barium (Ba) and titanium (Ti). The barium titanate-based compound is a dielectric base material, has a high dielectric constant, and contributes to the formation of the dielectric constant of the multilayer ceramic capacitor 100. As an example, the barium titanate-based compound may include one or more selected from BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, and (Ba,Sr)(Ti,Sn)O3.

[0110] The dielectric layer 111 may further contain minor components. These minor components may include one or more selected from, for example, manganese (Mn), chromium (Cr), silicon (Si), aluminum (Al), magnesium (Mg), tin (Sn), antimony (Sb), germanium (Ge), gallium (Ga), indium (In), barium (Ba), lanthanum (La), yttrium (Y), actinium (Ac), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), hafnium (Hf), and vanadium (V).

[0111] The average thickness (average length in the T-axis direction) of the dielectric layer 111 may be between 0.1 μm and 8.0 μm, for example, between 0.1 μm and 6.0 μm. When the average thickness of the dielectric layer 111 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0112] The average thickness of the dielectric layer 111 can be measured by ion milling and scanning electron microscope (SEM) analysis after the multilayer ceramic capacitor 100 has been cured in an epoxy mixture, polished, and then ion milled. For example, a Verios G4 product from Thermofisher Scientific can be used as the scanning electron microscope, with measurement conditions of 10kV and 0.2nA, and the analysis magnification may be 100x. At least one, three, five, or ten dielectric layers can be measured. The average thickness of the dielectric layer 111 is determined by using the center point in the longitudinal direction (L-axis direction) or width direction (W-axis direction) of the dielectric layer 111 as the reference point in the scanning electron microscope (SEM) image of the measured cross-sectional sample, and measuring the arithmetic mean of the thickness of the dielectric layer 111 at 10 points at predetermined intervals from the reference point. The spacing between the 10 points can be adjusted according to the scale of the scanning electron microscope (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the dielectric layer 111. If all 10 points are not located within the dielectric layer 111, the position of the reference point can be changed or the spacing between the 10 points can be adjusted.

[0113] The internal electrode layers 121 and 122, that is, the first internal electrode layer 121 and the second internal electrode layer 122, are electrodes having different polarities, and are arranged alternately facing each other along the T-axis direction with the dielectric layer 111 in between, with one end of each being exposed through the third and fourth surfaces of the capacitor body 110.

[0114] The first internal electrode layer 121 and the second internal electrode layer 122 can be electrically insulated from each other by the dielectric layer 111 placed in between them.

[0115] The ends of the first internal electrode layer 121 and the second internal electrode layer 122, which are alternately exposed through the third and fourth surfaces of the capacitor body 110, are electrically connectable to the first external electrode 131 and the second external electrode 132, respectively.

[0116] The internal electrode layers 121 and 122 contain a conductive metal, and may include one or more selected from metals such as Ni, Cu, Ag, Pd, Au, and alloys thereof.

[0117] The internal electrode layers 121 and 122 are connectable to the interface layers 10 and 30 of the external electrodes 131 and 132, and specifically, they are connectable to the leg regions 14 of the interface layers 10 and 30 which have a bridge structure.

[0118] Specifically, the internal electrode layers 121 and 122 may contain an alloy such as Cu-Ni at the interface with the interface layers 10 and 30 of the external electrodes 131 and 132.

[0119] Furthermore, the internal electrode layers 121 and 122 may also contain dielectric particles of the same composition as the ceramic material contained in the dielectric layer 111.

[0120] The internal electrode layers 121 and 122 may be formed using a conductive paste containing a conductive metal. The conductive paste can be printed using screen printing or gravure printing.

[0121] The average thickness of the internal electrode layers 121 and 122 may be 0.1 μm to 2 μm. When the average thickness of the internal electrode layers 121 and 122 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0122] The average thickness of the internal electrode layers 121 and 122 can be measured by scanning electron microscopy (SEM) analysis. Specifically, in the scanning electron microscopy (SEM) image of the cross-sectional sample measured as described above, the center point in the longitudinal direction (L-axis direction) or width direction (W-axis direction) of the internal electrode layers 121 and 122 is used as the reference point, and the average thickness is determined as the arithmetic mean of the thicknesses of the internal electrode layers 121 and 122 at 10 points at predetermined intervals from the reference point. The interval of the 10 points can be adjusted according to the scale of the scanning electron microscopy (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the internal electrode layers 121 and 122. If all 10 points are not located within the internal electrode layers 121 and 122, the position of the reference point can be changed or the interval between the 10 points can be adjusted.

[0123] The capacitor body 110 may be formed by firing a laminate in which multiple dielectric layers 111 and internal electrode layers 121 and 122 are stacked.

[0124] The following describes a method for manufacturing a multilayer ceramic capacitor 100 according to one embodiment.

[0125] [Manufacturing method for multilayer ceramic capacitors] A multilayer ceramic capacitor 100 according to one embodiment can be manufactured by the following steps: applying and reducing a metal-organic decomposition (MOD) ink to one surface of a capacitor body 110 to form a metal particle film; applying a paste containing a conductive metal and a glass composition to one surface of the capacitor body on which the metal particle film is formed; and firing the paste to form external electrodes 131 and 132 including interface layers 10 and 30 formed from the metal particle film and external layers 20 and 40 formed from the paste that cover the interface layers.

[0126] First, we will explain the manufacturing method of the capacitor body 110.

[0127] The capacitor body 110 can be manufactured by the following steps: manufacturing a dielectric green sheet using a dielectric slurry; forming a conductive paste layer on the surface of the dielectric green sheet; manufacturing a dielectric green sheet laminate by stacking the dielectric green sheets on which the conductive paste layer has been formed; and firing the dielectric green sheet laminate.

[0128] Dielectric slurry can be manufactured by mixing a barium titanate-based main component powder with selectively added secondary component powders.

[0129] Since the barium titanate-based main component powder is the same as the barium titanate-based main component contained in the dielectric layer, its explanation will be omitted here.

[0130] The auxiliary powders may include, but are not limited to, manganese (Mn), chromium (Cr), silicon (Si), aluminum (Al), magnesium (Mg), tin (Sn), antimony (Sb), germanium (Ge), gallium (Ga), indium (In), barium (Ba), lanthanum (La), yttrium (Y), actinium (Ac), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), hafnium (Hf), vanadium (V), or combinations thereof. Each of the aforementioned auxiliary powders may be present in an amount of 0.01 to 5 moles per 100 moles of the barium titanate-based main component powder.

[0131] The aforementioned auxiliary component powders may be used in the form of oxides or salt compounds containing each metal, or in the form of a sol dispersed in an organic solvent.

[0132] Furthermore, dielectric slurry can be manufactured by additionally mixing additives such as dispersants, binders, plasticizers, lubricants, and antistatic agents with a solvent.

[0133] The main component powder of barium titanate and the selectively mixed secondary component powder can be mixed using a wet ball mill or a stirring mill. When using zirconia balls in a wet ball mill, multiple zirconia balls with diameters from 0.1 mm to 10 mm can be used for wet mixing for 8 to 48 hours, or 10 to 24 hours.

[0134] The manufactured dielectric slurry is formed into a dielectric layer after firing.

[0135] Methods for forming the manufactured dielectric slurry into a sheet shape include tape molding methods such as the doctor blade method and the calender roll method, or, for example, an on-roll molding coater with a head discharge system. After that, the molded body can be dried to obtain a dielectric green sheet.

[0136] After firing, a conductive paste can be manufactured by mixing conductive powder made of a conductive metal or an alloy thereof, a binder, and a solvent to form a conductive paste layer that will become the internal electrode layer. Additionally, barium titanate powder may be mixed in as a co-material if necessary. The co-material can suppress the sintering of the conductive powder during the firing process. The conductive paste layer is then formed on the surface of the dielectric green sheet by applying the conductive paste in a predetermined pattern using various printing methods such as screen printing or transfer methods.

[0137] The conductive powder may include nickel (Ni) or a nickel (Ni) alloy.

[0138] Next, a dielectric green sheet laminate is manufactured by stacking multiple dielectric green sheets with internal electrode patterns formed on them, and then pressing them in the stacking direction. At this time, the dielectric green sheets and internal electrode patterns can be stacked such that dielectric green sheets are positioned on the upper and lower surfaces of the dielectric green sheet laminate in the stacking direction.

[0139] The process of cutting the manufactured dielectric green sheet laminate to predetermined dimensions by dicing or other methods can be selectively advanced.

[0140] Furthermore, the dielectric green sheet laminate can be solidified and dried to remove plasticizers and other substances as needed, and after solidification and drying, it can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container along with media and polishing fluid, and unwanted parts such as burrs generated during cutting can be polished off by applying rotational motion or vibration to the barrel container. After barrel polishing, the dielectric green sheet laminate can be washed with a cleaning solution such as water and then dried.

[0141] Next, the dielectric green sheet laminate is subjected to a binder removal process and firing to manufacture the capacitor body.

[0142] The debinding treatment conditions can be appropriately adjusted depending on the composition of the dielectric layer and the internal electrode layer. For example, the heating rate during debinding may be 5°C / hour to 300°C / hour, the support temperature may be 180°C to 400°C, and the temperature maintenance time may be 0.5 hours to 24 hours. The atmosphere during debinding may be air or a reducing atmosphere.

[0143] The firing conditions can be appropriately adjusted depending on the composition of the main components of the dielectric layer and the internal electrode layer. For example, firing may be carried out at a temperature of 1100°C to 1400°C, or for example, at a temperature of 1200°C to 1350°C. Furthermore, firing may be carried out for 0.5 hours to 8 hours, for example, 1 hour to 3 hours. In addition, firing may be carried out in a reducing atmosphere, for example, a humidified atmosphere of a mixed gas of nitrogen and hydrogen. If the internal electrode contains nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere should be 1.0 × 10⁻⁶. -14 MPa ~ 1.0 × 10 -10 MPa is also acceptable.

[0144] After firing, annealing can be carried out as needed. Annealing is a process to re-oxidize the dielectric layer, and it can be carried out when firing is performed in a reducing atmosphere. The conditions for the annealing process can also be appropriately adjusted depending on the composition of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 to 20 hours, and the heating rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be a humidified nitrogen gas (N2) atmosphere, and the oxygen partial pressure may be 1.0 × 10⁻⁶. -9 MPa ~ 1.0 × 10 -5 MPa is also acceptable.

[0145] In the debindering, calcining, or annealing processes, a wetter, for example, can be used to humidify nitrogen gas or a mixed gas, in which case the water temperature may be between 5°C and 75°C. The debindering, calcining, and annealing processes may be carried out continuously or independently.

[0146] Selectively, the third and fourth surfaces of the manufactured capacitor body 110 can be subjected to surface treatments such as sandblasting, laser irradiation, and barrel polishing. By performing such surface treatments, the ends of the first and second internal electrodes are exposed on the outermost surfaces of the third and fourth surfaces, thereby improving the electrical connection between the first and second external electrodes and the first and second internal electrodes, and potentially facilitating the formation of an alloy portion.

[0147] Next, the manufacturing method for the external electrodes 131 and 132 will be explained with reference to Figure 6.

[0148] Figure 6 is a schematic diagram showing a method for manufacturing the external electrodes of a multilayer ceramic capacitor according to one embodiment.

[0149] Referring to Figure 6, a metal-organic decomposition (MOD) ink is applied to one surface of the manufactured capacitor body 110 and then reduced to form a metal particle film.

[0150] The metal-organic decomposition (MOD) ink is applied to at least the third and fourth surfaces of the capacitor body 110, and may also be applied to parts of the first, second, fifth, or sixth surfaces where the band portions of the first and second external electrodes are selectively formed.

[0151] Metal-organic decomposition (MOD) inks may contain metal ligand substances, amine compounds, binders, antioxidants, and solvents.

[0152] The metal ligand material may include a conductive metal formate formed by the reaction of a conductive metal precursor with formic acid.

[0153] The conductive metal precursor may be one or more metals selected from copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and lead (Pb); an alloy of these; or a precursor containing a conductive metal including a combination thereof. Examples of such conductive metal precursors include metal oxides, metal hydroxides, metal nitrates, metal carbonates, metal sulfates, metal chlorides, metal acetates, or combinations thereof.

[0154] The metal ligand substance may be present in an amount of 20% to 40% by weight relative to the total amount of the metal-organic decomposition (MOD) ink.

[0155] Examples of amine compounds include butylamine, hexylamine, octylamine, dibutylamine, triethylamine, diethylenetriamine, ethylenediamine, cyclohexylamine, aminomethylpropanol, 2-amino-2-methyl-1-propanol (AMP), or combinations thereof.

[0156] The amine compound may be present in an amount of 20% to 60% by weight relative to the total amount of the metal-organic decomposition (MOD) ink.

[0157] The binder may include thermoplastic resins, thermosetting resins, natural polymers, or combinations thereof. Examples of thermoplastic resins include acrylic resins, cellulosic resins, aliphatic or copolymerized polyester resins, vinyl resins, polyamide resins, polyurethane resins, polyether resins, urea resins, alkyd resins, silicone resins, fluororesins, and olefin resins. Acrylic resins may include, for example, polyacrylic acid and polyacrylic acid esters. Examples of thermosetting resins include epoxy resins, unsaturated or vinyl polyester resins, diallyl phthalate resins, phenolic resins, oxetane resins, oxazine resins, bismaleimide resins, modified silicone resins, and melamine resins. Examples of natural polymers include ethylene-propylene rubber (EPR), styrene-butadiene rubber (SBR), starch, and gelatin.

[0158] The binder may be present in an amount of 0.1% to 5% by weight relative to the total amount of metal-organic decomposition (MOD) ink.

[0159] Antioxidants may include organic acids such as oleic acid.

[0160] The antioxidant may be present in an amount of 0.1% to 5% by weight relative to the total amount of the metal-organic decomposition (MOD) ink.

[0161] The solvent may include water; alcoholic solvents such as methanol, ethanol, isopropanol, 1-methoxypropanol, butanol, ethylhexyl alcohol, and terpineol; glycolic solvents such as ethylene glycol and glycerin; acetate solvents such as ethyl acetate, butyl acetate, methoxypropyl acetate, carbitol acetate, and ethyl carbitol acetate; etheric solvents such as methyl cellosolve, butyl cellosolve, diethyl ether, tetrahydrofuran, and dioxane; ketone solvents such as methyl ethyl ketone, acetone, dimethylformamide, and 1-methyl-2-pyrrolidone; hydrocarbon solvents such as hexane, heptane, dodecane, paraffin oil, and mineral spirits; aromatic solvents such as benzene, toluene, and xylene; halogen-substituted solvents such as chloroform, methylene chloride, and carbon tetrachloride; or combinations thereof.

[0162] The solvent may be present in a residual amount relative to the total amount of metal-organic decomposition (MOD) ink.

[0163] The metal-organic decomposition (MOD) ink may be applied to a thickness of 50 μm to 400 μm, or for example, to a thickness of 80 μm to 350 μm. When the metal-organic decomposition (MOD) ink is applied within the aforementioned thickness range, the interface layer formed after firing is of an appropriate thickness, thereby enhancing the contact between the internal electrode layer and the external electrode.

[0164] The reduction may be carried out in a nitrogen atmosphere, at a temperature of 170°C to 300°C, for example, 180°C to 250°C, for 30 minutes to 3 hours, for example, 40 minutes to 2 hours. When reduction is carried out under conditions within the above range, the contact between the internal electrode layer and the external electrode can be enhanced by the formation of an interfacial layer.

[0165] When a metal-organic decomposition (MOD) ink is applied to one surface of the capacitor body 110 and reduced, a metal particle film containing very small and uniform metal nanoparticles can be formed. For example, the metal particle film can contain metal nanoparticles ranging from 10 nm to 100 nm, or, for example, metal nanoparticles ranging from 15 nm to 90 nm.

[0166] Next, paste is applied to one surface of the capacitor body 110 on which the metal particle film is formed, and then it is baked.

[0167] The paste contains a conductive metal and glass composition.

[0168] The glass composition may be present in an amount of 20% to 40% by weight relative to the total amount of paste, for example, 22% to 38% by weight, or 24% to 36% by weight.

[0169] The description of conductive metals and glass compositions is the same as that given above, so we will omit that explanation here.

[0170] The paste may further contain a binder, solvent, dispersant, plasticizer, oxide powder, etc.

[0171] Binders can include, for example, ethylcellulose, acrylic, and butyral, and solvents can include organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, and toluene, as well as aqueous solvents.

[0172] Methods for applying the paste to one surface of the capacitor body 110 include the dipping method, various printing methods such as screen printing, application methods using a dispenser, and spraying methods using a sprayer. The paste may be applied to at least the third and fourth surfaces of the capacitor body 110, and may also be applied to a portion of the first, second, fifth, or sixth surfaces where the band portions of the first and second external electrodes are selectively formed.

[0173] The firing may be carried out in a reducing atmosphere with a wetter temperature of 0°C to 40°C at a temperature of 600°C to 800°C, for example, 650°C to 750°C, for 0.5 hours to 3 hours, for example, 1 hour to 2 hours.

[0174] During firing, as shown in Figure 6, the material may be sintered at the interface with the internal electrode layer by the fine metal nanoparticles constituting the metal particle film, forming an alloy such as Cu-Ni first, followed by glass penetration. The formation of the alloy at the interface firmly connects the internal electrode layer and the external electrode, and subsequently, glass penetrates one surface of the dielectric layer to form a bridge-structured interface layer of the external electrode. As a result, the bridge-structured interface layer firmly connects the internal electrode layer and the external electrode, and a completely sealed structure is formed on one surface of the dielectric layer with glass, specifically corrosion-resistant glass, preventing external moisture from entering.

[0175] A conductive resin layer can be formed by selectively applying a conductive resin layer-forming paste to the outer surface of a capacitor body 110, on which external layers 20 and 40 are formed on interfacial layers 10 and 30, and then curing it.

[0176] The paste for forming a conductive resin layer may contain a resin and, selectively, a conductive metal or a non-conductive filler. The descriptions of conductive metals and resins are as described above, so repeated explanations are omitted. The paste for forming a conductive resin layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Examples of binders include ethylcellulose, acrylic, and butyral, while solvents may include organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, and toluene, as well as aqueous solvents.

[0177] As an example, the conductive resin layer can be formed by dipping the capacitor body 110 into a conductive resin layer forming paste and then curing it, or by printing the conductive resin layer forming paste onto the surface of the capacitor body 110 using a screen printing method or gravure printing method, or by applying the conductive resin layer forming paste to the surface of the capacitor body 110 and then curing it.

[0178] Next, a plating layer can be formed on the outside of the conductive resin layer.

[0179] For example, the plating layer may be formed by a plating method, or by sputtering or electroplating (electric deposition).

[0180] The embodiments described above will be explained in more detail below through the examples provided. However, the following examples are for illustrative purposes only and do not limit the scope of the rights.

[0181] (Manufacturing of multilayer ceramic capacitors) [Example 1] After manufacturing dielectric green sheets using BaTiO3 powder, a conductive paste layer containing Ni was printed onto the surface of the dielectric green sheets. Dielectric green sheet laminates were then manufactured by laminating and pressing the dielectric green sheets with the conductive paste layer formed on them. Capacitor bodies were manufactured by firing the dielectric green sheet laminates in a nitrogen atmosphere at temperatures below 400°C, under conditions of firing temperature below 1300°C and hydrogen concentration below 1.0%H2.

[0182] A 100 μm layer of metal-organic decomposition (MOD) ink containing 30% by weight of copper formate (Cu formate), 25% by weight of octylamine, 25% by weight of 2-amino-2-methyl-1-propanol (AMP), 0.5% by weight of oleic acid, 0.5% by weight of acrylic resin (SPB80), and a residual amount of dihydroterpineol (DHT) was applied to one surface of a capacitor body. The mixture was then reduced at 200°C for 1 hour under a nitrogen atmosphere to form a Cu particle film consisting of Cu nanoparticles with an average size of 100 nm or less.

[0183] A paste containing 70% by weight of Cu, 20% by weight of glass composition, 5% by weight of acrylic resin (SPB80), and a remainder of dihydroterpineol (DHT) was applied to one surface of a capacitor body on which a Cu particle film was formed. The external electrode was then formed by firing at 690°C for 90 minutes in a reducing atmosphere with a wetter temperature of 35°C. At this time, the glass composition contained 9.1 mol% lithium oxide (Li2O), 10 mol% sodium oxide (Na2O), 1.5 mol% iron(III) oxide (Fe2O3), 6.3 mol% zinc oxide (ZnO), 21 mol% barium oxide (BaO), 11 mol% silicon dioxide (SiO2), 8 mol% calcium oxide (CaO), 12 mol% aluminum oxide (Al2O3), 20.2 mol% boron trioxide (B2O3), and 1 mol% tin(IV) oxide (SnO2).

[0184] Next, multilayer ceramic capacitors were manufactured through processes such as plating.

[0185] [Comparative Example 1] A paste containing 70% by weight of Cu, 20% by weight of glass composition, 5% by weight of acrylic resin (SPB80), and a remainder of dihydroterpineol (DHT) was applied to one surface of the capacitor body manufactured in Example 1. Then, the body was fired at 690°C for 90 minutes in a reducing atmosphere with a wetter temperature of 35°C to form an external electrode.

[0186] Next, multilayer ceramic capacitors were manufactured through processes such as plating.

[0187] [Rating 1: SEM Analysis] The multilayer ceramic capacitors manufactured in Example 1 and Comparative Example 1 were subjected to SEM (scanning electron microscope) analysis using the method described below, and the results are shown in Figures 7 and 8.

[0188] Each multilayer ceramic capacitor was loaded onto a tape with the L-axis and T-axis planes (LT planes) facing upwards, and then cured in an epoxy mixture. After that, the LT planes of the capacitor bodies were polished to a point halfway along the W-axis to obtain cross-sectional samples with LT planes that allowed observation of the external electrodes. Next, one side of the obtained cross-sectional sample was measured using a scanning electron microscope (SEM) so that the capacitor body and external electrodes were visible. The SEM measurements were performed at an acceleration voltage of 20kV and a magnification of 10k.

[0189] Figure 7 shows an SEM (scanning electron microscope) analysis image of the external electrodes of the multilayer ceramic capacitor according to Example 1, and Figure 8 shows an SEM (scanning electron microscope) analysis image of the external electrodes of the multilayer ceramic capacitor according to Comparative Example 1.

[0190] Referring to (a), (b), and (c) in Figure 7, the external electrode according to Example 1 appears to have an interface layer on one surface of the active region of the capacitor body. The interface layer appears to have a bridge structure including a body region, a plurality of leg regions connected to the lower part of the body region, and spacing regions arranged between the plurality of leg regions. Furthermore, in the interface layer, the leg regions appear to be connected to the internal electrode layer, and the spacing regions appear to be arranged on one surface of the dielectric layer. When the junction region between the external electrode and the capacitor body is divided into three equal parts in the stacking direction, that is, in the thickness direction (T-axis direction) of the multilayer ceramic capacitor, it can be seen that the external electrodes in the upper, central, and lower parts all have an interface layer with a bridge structure. In addition, it can be confirmed that the ratio of the number of internal electrode layers connected to the leg regions of the interface layer is 90% or more, based on the total number of internal electrode layers in the active region.

[0191] In contrast, referring to (a), (b), and (c) in Figure 8, it can be seen that in Comparative Example 1, no bridge structure is formed in the external electrode, and glass is laid almost entirely at the interface with the capacitor body.

[0192] From this, it can be seen that the external electrode formed by one embodiment using the MOD method has a bridge structure interface layer at the interface with the active region of the capacitor body, which not only provides excellent connectivity between the external electrode and the internal electrode layer, but also completely blocks the inflow of external moisture, resulting in excellent moisture resistance reliability.

[0193] [Evaluation 2: SEM-EDS analysis] The multilayer ceramic capacitors manufactured in Example 1 and Comparative Example 1 were subjected to SEM-EDS (scanning electron microscope-energy dispersive spectroscopy) analysis using the method described below, and the results are shown in Figures 9a-9b and 10a-10b.

[0194] In the SEM images of the cross-sectional samples obtained in Evaluation 1, Cu mapping analysis was performed using EDS (energy-dispersive spectroscopy).

[0195] Figures 9a to 9b show SEM-EDS (scanning electron microscope-energy dispersive spectroscopy) mapping analysis images of the external electrodes of the multilayer ceramic capacitor according to Example 1, and Figures 10a to 10b show SEM-EDS (scanning electron microscope-energy dispersive spectroscopy) mapping analysis images of the external electrodes of the multilayer ceramic capacitor according to Comparative Example 1.

[0196] Referring to Figures 9a and 9b, in Example 1, the interface layer appears to have a bridge structure, and Cu is almost entirely distributed in the body and leg regions of the interface layer. Furthermore, since copper appears to have diffused not only in the leg regions of the interface layer but also into the internal electrode layer, it can be seen that a Cu-Ni alloy exists in the leg regions of the interface layer and the internal electrode layer, forming an alloy with Ni in the internal electrode layer.

[0197] In contrast, in Comparative Example 1, no bridge structure is observed, and no Cu is found at the interface between the external electrode and the internal electrode layer, indicating that the connectivity between the external electrode and the internal electrode layer is degraded.

[0198] From this, it can be seen that the external electrode formed by one embodiment using the MOD method not only has excellent connectivity with the internal electrode layer, but also exhibits excellent moisture resistance reliability because the presence of glass on one surface of the dielectric layer completely blocks the inflow of external moisture.

[0199] [Rating 3: Capacity characteristics] Capacitance and dielectric loss (DF) were measured for the multilayer ceramic capacitors manufactured in Example 1 and Comparative Example 1 under conditions of 1000 Hz and 0.5 V, and the results are shown in Figure 11.

[0200] Figure 11 is a graph showing the capacitance characteristics of the multilayer ceramic capacitors according to Example 1 and Comparative Example 1.

[0201] Referring to Figure 11, it can be seen that the multilayer ceramic capacitor of Example 1, in which a bridge structure interface layer is formed at the interface between the active region of the capacitor body and the external electrode, exhibits reduced capacitance variation due to deterioration of contact between the external electrode and the internal electrode layer, and also reduced dielectric loss (DF) variation, compared to Comparative Example 1.

[0202] [Rating 4: Moisture resistance reliability] The multilayer ceramic capacitors manufactured in Example 1 and Comparative Example 1 were subjected to severe humidity resistance testing, and the results are shown in Figures 12 and 13.

[0203] Specifically, 20 multilayer ceramic capacitors each manufactured in Example 1 and Comparative Example 1 were prepared and mounted on a measurement substrate. The humidity resistance severe evaluation was performed using an ESPEC (PR-3J, 8585) apparatus under conditions of 85°C, 85% relative humidity (RH), and 24 hours.

[0204] Figure 12 is a graph showing the moisture resistance reliability of the multilayer ceramic capacitor according to Example 1, and Figure 13 is a graph showing the moisture resistance reliability of the multilayer ceramic capacitor according to Comparative Example 1.

[0205] Referring to Figures 12 and 13, it can be seen that the multilayer ceramic capacitor of Example 1, in which a bridge structure interface layer is formed at the interface between the active region of the capacitor body and the external electrode, has superior moisture resistance reliability compared to Comparative Example 1.

[0206] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and can be implemented in various ways within the scope of the claims, description of the invention, and attached drawings, and it goes without saying that these also fall within the scope of the present invention. [Explanation of symbols]

[0207] 100: Multilayer ceramic capacitor 110: Capacitor body 111: Dielectric layer 121: 1st internal electrode 122: Second internal electrode 131: First external electrode 132: Second external electrode 10: First Interface Layer 20: First outer layer 30: Second Interface Layer 40: Second outer layer

Claims

1. A capacitor body including multiple dielectric layers and multiple internal electrode layers stacked with the dielectric layers in between, The capacitor body includes an external electrode positioned outside the capacitor body, The capacitor body includes an active region in which the dielectric layer and the internal electrode layer are arranged alternately with respect to each other, and a cover region in which the dielectric layer is arranged on the upper and lower surfaces of the active region in the stacking direction. The external electrode includes an interface layer disposed on one surface of the active region and an external layer covering the interface layer. The interface layer has a bridge structure including a body region, a plurality of leg regions connected to the lower part of the body region, and spacing regions arranged between the plurality of leg regions. The leg region of the interface layer is connected to the internal electrode layer, and the spacing region of the interface layer is arranged on one surface of the dielectric layer. A multilayer ceramic capacitor in which the ratio of the number of internal electrode layers connected to the leg region of the interface layer to the total number of internal electrode layers in the active region is 90% or more and 100% or less.

2. The multilayer ceramic capacitor according to claim 1, wherein the leg region of the interface layer extends into the interior of the capacitor body and is connected to the internal electrode layer.

3. The multilayer ceramic capacitor according to claim 1, wherein the leg region of the interface layer comprises an alloy of a conductive metal.

4. The multilayer ceramic capacitor according to claim 1, wherein the leg region of the interface layer contains a Cu-Ni alloy.

5. The multilayer ceramic capacitor according to claim 3, wherein the leg region of the interface layer contains 60% to 100% by volume of the alloy of the conductive metal relative to the total amount of the leg region.

6. The multilayer ceramic capacitor according to claim 1, wherein the gap region of the interface layer includes glass.

7. The glass is made of aluminum oxide (Al 2 O 3 ) and silicon dioxide (SiO 2 The multilayer ceramic capacitor according to claim 6, comprising one or more selected from the following.

8. The multilayer ceramic capacitor according to claim 6, wherein the intervening region of the interface layer contains 60% to 100% by volume of the glass relative to the total amount of the intervening region.

9. The multilayer ceramic capacitor according to claim 1, wherein the body region of the interface layer includes a conductive metal.

10. The multilayer ceramic capacitor according to claim 1, wherein the body region of the interface layer contains copper (Cu).

11. The multilayer ceramic capacitor according to claim 9, wherein the body region of the interface layer contains the conductive metal in an amount of 60% to 100% by volume relative to the total amount of the body region.

12. The leg region of the interface layer comprises an alloy of a conductive metal. The intervening region of the interface layer includes glass, The multilayer ceramic capacitor according to claim 1, wherein the body region of the interface layer includes a conductive metal.

13. The leg region of the interface layer comprises a Cu-Ni alloy. The intervening region of the interface layer includes glass, The multilayer ceramic capacitor according to claim 1, wherein the body region of the interface layer contains copper (Cu).

14. The multilayer ceramic capacitor according to claim 1, wherein the internal electrode layer includes an alloy of a conductive metal at its interface with the interface layer.

15. A capacitor body including multiple dielectric layers and multiple internal electrode layers stacked with the dielectric layers in between, The capacitor body includes an external electrode positioned outside the capacitor body, The capacitor body includes an active region in which the dielectric layer and the internal electrode layer are arranged alternately with respect to each other, and a cover region in which the dielectric layer is arranged on the upper and lower surfaces of the active region in the stacking direction. The external electrode includes an interface layer disposed on one surface of the active region and an external layer covering the interface layer. The interface layer has a bridge structure including a body region, a plurality of leg regions connected to the lower part of the body region, and spacing regions arranged between the plurality of leg regions. The leg region of the interface layer is connected to the internal electrode layer, and the spacing region of the interface layer is arranged on one surface of the dielectric layer. A multilayer ceramic capacitor in which the body region of the interface layer comprises a conductive metal, the leg region of the interface layer comprises an alloy of the conductive metal, and the spacing region of the interface layer comprises glass.

16. The body region of the interface layer contains copper (Cu), The leg region of the interface layer comprises a Cu-Ni alloy. The gap region of the interface layer is made of aluminum oxide (Al 2 O 3 ) and silicon dioxide (SiO 2 A multilayer ceramic capacitor according to claim 15, comprising glass containing ).

17. A step of forming a metal particle film by applying and reducing a metal-organic decomposition (MOD) ink to one surface of a capacitor body including multiple dielectric layers and multiple internal electrode layers stacked with the dielectric layers sandwiched between them, The steps include applying a paste containing a conductive metal and a glass composition to one surface of the capacitor body on which the metal particle film is formed, The process includes the step of firing the paste to form an external electrode comprising an interface layer formed from the metal particle film and an outer layer covering the interface layer and formed from the paste, The interface layer has a bridge structure including a body region, a plurality of leg regions connected to the lower part of the body region, and spacing regions arranged between the plurality of leg regions. A method for manufacturing a multilayer ceramic capacitor, wherein the leg region of the interface layer is connected to the internal electrode layer, and the spacing region of the interface layer is arranged on one surface of the dielectric layer.

18. The method for manufacturing a multilayer ceramic capacitor according to claim 17, wherein the metal-organic decomposition (MOD) ink comprises a metal ligand substance, an amine compound, a binder, an antioxidant, and a solvent.

19. The method for manufacturing a multilayer ceramic capacitor according to claim 17, wherein the metal particle film contains metal nanoparticles ranging from 10 nm to 100 nm in size.

20. The method for manufacturing a multilayer ceramic capacitor according to claim 17, wherein the glass composition is contained in an amount of 20% to 40% by weight relative to the total amount of the paste.