Semiconductor modules and electronic devices

The semiconductor module design addresses uneven heat dissipation by positioning semiconductor chips and heat dissipation wiring layers on opposite sides, enabling efficient heat dissipation from both sides, thus preventing overheating.

JP2026084471APending Publication Date: 2026-05-21DENSO CORP +2
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
DENSO CORP
Filing Date
2024-11-11
Publication Date
2026-05-21

AI Technical Summary

Technical Problem

Conventional semiconductor modules experience uneven heat dissipation, with high dissipation on one side but low dissipation on the opposite side when sandwiched between heat sinks and a cooler.

Method used

A semiconductor module design with first and second semiconductor chips positioned on first and second heat sinks, respectively, and first and second heat dissipation wiring layers on opposite sides, allowing heat to be dissipated from both sides by positioning the module between connecting tubes of a cooling device.

Benefits of technology

The module achieves efficient heat dissipation from both sides, preventing excessive heating of the semiconductor chips and enhancing thermal management.

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Abstract

We provide a semiconductor module that enables heat dissipation from both sides. [Solution] The device comprises a first semiconductor chip 31 and a second semiconductor chip 32 on which switching elements are formed; a first heat sink 21 provided on the second surface 1b side of the first semiconductor chip 31 and on which the first semiconductor chip 31 is placed; a second heat sink 22 provided on the second surface 1b side of the second semiconductor chip 32 and on which the second semiconductor chip 32 is placed; a sealing member 50 for sealing the first semiconductor chip 31 and the second semiconductor chip 32; a first heat dissipation wiring layer 161b provided on the first surface 1a side of the first semiconductor chip 31 and thermally connected to the first semiconductor chip 31; and a second heat dissipation wiring layer 162b provided on the first surface 1a side of the second semiconductor chip 32 and thermally connected to the second semiconductor chip 32.
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Description

Technical Field

[0001] The present disclosure relates to a semiconductor module and an electronic device.

Background Art

[0002] Conventionally, a semiconductor module in which a semiconductor element is encapsulated with a molding resin has been proposed. Such a semiconductor module is used, for example, as shown in Patent Document 1, to configure an electronic device by being arranged to contact a cooler. In this electronic device, since the semiconductor module contacts the cooler, the heat of the semiconductor element is released to the cooler.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, the present inventors are considering a semiconductor module including a first semiconductor chip and a second semiconductor chip connected in series. Specifically, in this semiconductor module, the first semiconductor chip is arranged on the first heat sink, and the second semiconductor chip is arranged on the second heat sink.

[0005] And the present inventors are considering making an electronic device by bringing both ends in the stacking direction between the first semiconductor chip and the first heat sink in this semiconductor module into contact with a cooler. That is, they are considering configuring an electronic device in which the semiconductor module is arranged so as to be sandwiched by the cooler.

[0006] However, in this semiconductor module, because a first heatsink and a second heatsink are positioned, heat dissipation to the cooler located on the side of the first and second heatsinks is high, but heat dissipation to the cooler located on the opposite side may be low. In other words, this semiconductor module may have low heat dissipation on both sides.

[0007] This disclosure aims to provide semiconductor modules and electronic devices capable of heat dissipation from both sides. [Means for solving the problem]

[0008] According to one aspect of this disclosure, a semiconductor module having a first surface (1a) and a second surface (1b) opposite to the first surface in the thickness direction, and which can be arranged between two connecting tubes (910) in a cooling device (9), comprising: a first semiconductor chip (31) and a second semiconductor chip (32) on which switching elements are formed; a first heat sink (21) provided on the second surface side with respect to the first semiconductor chip and on which the first semiconductor chip is placed; a second heat sink (22) provided on the second surface side with respect to the second semiconductor chip and on which the second semiconductor chip is placed; a sealing member (50) for sealing the first semiconductor chip and the second semiconductor chip; a first heat dissipation wiring layer (161b) provided on the first surface side with respect to the first semiconductor chip and thermally connected to the first semiconductor chip; and a second heat dissipation wiring layer (162b) provided on the first surface side with respect to the second semiconductor chip and thermally connected to the second semiconductor chip.

[0009] According to this, the first and second heat sinks are positioned on the second side, while the first and second heat dissipation wiring layers are positioned on the first side. In other words, the first heat sink and the first heat dissipation wiring layer are positioned on opposite sides of the first semiconductor chip, and the second heat sink and the second heat dissipation wiring layer are positioned on opposite sides of the second semiconductor chip. Therefore, when the semiconductor module is positioned so that its first and second sides are sandwiched between the two connecting tubes of the cooling device, heat from the first and second semiconductor chips can be released to both the one connecting tube and the other. In other words, this semiconductor module enables heat dissipation from both sides.

[0010] Furthermore, according to another aspect of this disclosure, the electronic device comprises the semiconductor module described above and a cooling device (9) having a channel through which a cooling medium for cooling the semiconductor module flows, the cooling device having an inlet pipe (901) through which the cooling medium flows in, an outlet pipe (902) through which the cooling medium flows out, and a plurality of connecting pipes (910) connecting the inlet pipe and the outlet pipe, the semiconductor module being positioned between the two connecting pipes, the first heat sink and the second heat sink being positioned opposite one of the two connecting pipes (911) located on the second side, and the first heat dissipation wiring layer and the second heat dissipation wiring layer being positioned opposite the other connecting pipe (912) located on the first side.

[0011] According to this configuration, the first heat sink and the second heat sink are positioned opposite one of the connecting tubes, while the first heat dissipation wiring layer and the second heat dissipation wiring layer are positioned opposite the other connecting tube. As a result, the semiconductor module can efficiently dissipate heat from the first semiconductor chip and the second semiconductor chip to both the first and second connecting tubes.

[0012] The reference numerals in parentheses attached to each component indicate an example of the correspondence between that component and the specific components described in the embodiments described later. [Brief explanation of the drawing]

[0013] [Figure 1] This is a front view of the electronic device in the first embodiment. [Figure 2] This is a cross-sectional view of a semiconductor module. [Figure 3] This is a plan view showing the wiring layer on the second sealing member. [Figure 4] This is a plan view showing the wiring layer on the first sealing member. [Figure 5] This is a diagram showing the circuit configuration of a semiconductor module. [Figure 6] This is a cross-sectional view of a semiconductor module in the second embodiment. [Figure 7] This is a plan view showing the wiring layer on the second sealing member. [Figure 8] This is a plan view showing the wiring layer on the first sealing member. [Figure 9] This is a plan view showing the semiconductor module and bonding member in the third embodiment. [Modes for carrying out the invention]

[0014] The embodiments of this disclosure will be described below with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals.

[0015] (First Embodiment) The first embodiment will be described with reference to the drawings. In the following description, a power conversion device as an electronic device will be used as an example. Such an electronic device is preferably used, for example, mounted in a vehicle.

[0016] As shown in Figure 1, the electronic device S of this embodiment includes a semiconductor module 1 and a cooling device 9 for cooling the semiconductor module 1.

[0017] The cooling device 9 has a cooling medium such as cooling water flowing inside, and includes an inflow pipe 901 and an outflow pipe 902 that form a circular flow path, and a connecting pipe 910 that communicates with the inflow pipe 901 and the outflow pipe 902 to form a substantially rectangular flow path. Specifically, the inflow pipe 901 and the outflow pipe 902 are arranged to extend in the same direction. The connecting pipe 910 has a substantially rectangular shape in a plane with one direction as the longitudinal direction. And a plurality of connecting pipes 910 are arranged along the extending direction of the inflow pipe 901 and the outflow pipe 902 with the inflow pipe 901 and the outflow pipe 902 inserted through both ends in the longitudinal direction. The connecting pipe 910 of the present embodiment is provided with five so that four spaces are formed along the arrangement direction of the connecting pipes 910 (hereinafter, also simply referred to as the arrangement direction). In FIG. 1, the arrangement direction is the vertical direction of the paper surface. Also, the connecting pipe 910 located at one end in the arrangement direction (that is, the lowermost connecting pipe 910 in FIG. 1) is in a state where the portion on the side opposite to the side where the inflow pipe 901 and the outflow pipe 902 are provided is blocked.

[0018] In the present embodiment, the semiconductor module 1 constitutes an inverter circuit, and includes a first semiconductor chip 31 that constitutes the upper arm UA and a second semiconductor chip 32 that constitutes the lower arm LA, as will be described later. The specific configuration of the semiconductor module 1 will be described later.

[0019] Then, the semiconductor module 1 is arranged in the cooling device 9 so as to be thermally connected to both of a pair of adjacent connecting pipes 910 in the arrangement direction. Specifically, the semiconductor module 1 is arranged in the cooling device 9 such that one surface 1a side and the other surface 1b side in the thickness direction face the connecting pipe 910, respectively. In the present embodiment, one surface 1a corresponds to the first surface, and the other surface \alphab corresponds to the second surface.

[0020] Furthermore, in this embodiment, the cooling device 9 has a fixing member 921 that is connected to and fixed to a housing or the like (not shown) on the connecting pipe 910 located at the other end in the arrangement direction (i.e., the uppermost connecting pipe 910 in Figure 1). In other words, the connecting pipe 910 located at the other end in the arrangement direction is in a state that is difficult to displace. In addition, the cooling device 9 has an elastic member 922 made of a spring or the like that is positioned to contact the connecting pipe 910 located at one end in the arrangement direction (i.e., the lowermost connecting pipe 910 in Figure 1), and is capable of being pressed in the arrangement direction. In this embodiment, the elastic member 922 presses the connecting pipe 910 in the arrangement direction, thereby preventing the formation of a gap between the semiconductor module 1 and the connecting pipe 910.

[0021] In this cooling device 9, a cooling medium such as cooling water flows in through an inlet pipe 901 and flows out through an outlet pipe 902 via a connecting pipe 910, thereby cooling the semiconductor module 1 attached to the cooling device 9. In this embodiment, although details are omitted, the cooling medium discharged from the outlet pipe 902 flows back into the inlet pipe 901 via a radiator or the like. In other words, the cooling device 9 is designed to circulate the cooling medium.

[0022] Next, the configuration of the semiconductor module 1 of this embodiment will be described with reference to Figures 2 to 5. Hereinafter, one direction will also be referred to as the X-axis direction, the direction perpendicular to the X-axis direction will also be referred to as the Y-axis direction, and the direction perpendicular to both the X-axis direction and the Y-axis direction will also be referred to as the Z-axis direction. The X-axis direction can also be referred to as the first direction, the Y-axis direction as the second direction, and the Z-axis direction as the third direction. The Z-axis direction corresponds to the thickness direction of the semiconductor module 1. Furthermore, hereinafter, in the two connecting tubes 910 that sandwich the semiconductor module 1, the connecting tube 910 located on the insulating heat dissipation sheet 10 side, which will be described later, will also be referred to as the first connecting tube 911, and the connecting tube 910 located on the insulating heat dissipation sheet 60 side, which will be described later, will also be referred to as the second connecting tube 912. In this embodiment, the first connecting tube 911 corresponds to one of the connecting tubes, and the second connecting tube 912 corresponds to the other connecting tube.

[0023] In this embodiment, the semiconductor module 1 has a roughly rectangular planar shape. The semiconductor module 1 is configured to include an insulating heat dissipation sheet 10, a first heat sink 21, a second heat sink 22, a first semiconductor chip 31, a second semiconductor chip 32, a sealing member 50, first to third wiring sections 101 to 103, first and second gate wiring sections 104 and 105, etc. Figure 2 corresponds to a cross-sectional view along line II-II in Figures 3 and 4.

[0024] The insulating heat dissipation sheet 10 is, for example, a rectangular sheet containing a filler in an epoxy resin, and has a higher thermal conductivity than the sealing member 50 described later. In this embodiment, the semiconductor module 1 has the insulating heat dissipation sheet 10 forming the other side 1b in the thickness direction (i.e., the Z-axis direction), and the other side 1b is provided on the first connecting pipe 911 via a joining member 930.

[0025] The first heat sink 21 and the second heat sink 22 are each made of a block-like material such as copper. In this embodiment, the first heat sink 21 and the second heat sink 22 are each rectangular in shape and the same size, with equal thickness. Here, "equal" includes slight manufacturing tolerances. The first heat sink 21 and the second heat sink 22 are arranged side by side on the insulating heat dissipation sheet 10. In this embodiment, the first heat sink 21 and the second heat sink 22 are arranged side by side in the X-axis direction. The first heat sink 21 and the second heat sink 22 are also positioned on the portion of the insulating heat dissipation sheet 10 facing the first connecting pipe 911.

[0026] The first semiconductor chip 31 and the second semiconductor chip 32 are composed of semiconductor elements such as MOSFET elements, IGBT elements, and diode elements for freewheeling. MOSFET stands for Metal Oxide Semiconductor Field Effect Transistor, and IGBT stands for Insulated Gate Bipolar Transistor.

[0027] In this embodiment, the first semiconductor chip 31 has a first electrode 311 formed on one side 31a and a second electrode 312 formed on the other side 31b, and the semiconductor element is formed so that current flows between the first electrode 311 and the second electrode 312. In addition, the first semiconductor chip 31 has a gate pad 313 formed on one side 31a, which is connected to the gate electrode of a MOSFET element or IGBT element.

[0028] Similarly, the second semiconductor chip 32 has a first electrode 321 formed on one side 32a and a second electrode 322 formed on the other side 32b, and the semiconductor element is formed so that current flows between the first electrode 321 and the second electrode 322. In addition, the second semiconductor chip 32 has a gate pad 323 formed on one side 32a, which is connected to the gate electrode of a MOSFET element or IGBT element.

[0029] The first semiconductor chip 31 is positioned on the first heat sink 21 with its second electrode 312 bonded to the first bonding member 41. The second semiconductor chip 32 is positioned on the second heat sink 22 with its second electrode 322 bonded to the second bonding member 42. In this embodiment, the stacking direction of the first heat sink 21 and the first semiconductor chip 31, and the stacking direction of the second heat sink 22 and the second semiconductor chip 32, are both in the Z-axis direction.

[0030] The first bonding member 41 is made of a material that electrically and thermally connects the first semiconductor chip 31 and the first heat sink 21, and is made of, for example, solder or a silver sintered body. The second bonding member 42 is made of a material that electrically and thermally connects the second semiconductor chip 32 and the second heat sink 22, and is made of, for example, solder or a silver sintered body. When the first semiconductor chip 31 is placed on the first heat sink 21 in this manner, the heat from the first semiconductor chip 31 is released from the first heat sink 21 to the first connecting pipe 911 via the insulating heat dissipation sheet 10. Similarly, when the second semiconductor chip 32 is placed on the second heat sink 22, the heat from the second semiconductor chip 32 is released from the second heat sink 22 to the first connecting pipe 911 via the insulating heat dissipation sheet 10.

[0031] In this embodiment, the first semiconductor chip 31 and the second semiconductor chip 32 are used in series connection to form the upper arm UA and lower arm LA of an inverter circuit, as shown in Figure 5, for example. Specifically, the first semiconductor chip 31 is used to form the upper arm UA, with the second electrode 312 connected to the first wiring section 101 and the first electrode 311 connected to the third wiring section 103. In addition, the gate pad 313 of the first semiconductor chip 31 is connected to the first gate wiring section 104.

[0032] The second semiconductor chip 32 is used to constitute the lower arm LA, with the second electrode 322 connected to the third wiring section 103 and the first electrode 321 connected to the second wiring section 102. In addition, the gate pad 323 of the second semiconductor chip 32 is connected to the second gate wiring section 105.

[0033] The first wiring section 101 is a so-called P-type wiring, the second wiring section 102 is a so-called N-type wiring, and the third wiring section 103 is a so-called O-type wiring. Furthermore, as will be described later, the first wiring section 101 is composed of a first wiring layer 111a for the first wiring section, a second wiring layer 111b for the first wiring section, and a first terminal section 112. The second wiring section 102 is composed of a first wiring layer 121a for the second wiring section, a second wiring layer 121b for the second wiring section, and a second terminal section 122. The third wiring section 103 is composed of a first wiring layer 131a for the third wiring section, a second wiring layer 131b for the third wiring section, and a third terminal section 132. The first gate wiring section 104 is composed of a first wiring layer 141a for the first gate wiring section, a second wiring layer 141b for the first gate wiring section, and a first gate terminal section 142. The second gate wiring section 105 is composed of a first wiring layer 151a for the second gate wiring section, a second wiring layer 151b for the second gate wiring section, and a second gate terminal section 152. The third wiring section 103 is connected to an external load, etc., although it is not shown in the diagram. In this circuit configuration, the switching elements of the first semiconductor chip 31 and the second semiconductor chip 32 are alternately turned ON.

[0034] As shown in Figure 2, the sealing member 50 is arranged on the insulating heat dissipation sheet 10 to seal the first semiconductor chip 31, the second semiconductor chip 32, the first heat sink 21, and the second heat sink 22, etc. In this embodiment, the sealing member 50 is formed by laminating multiple film members made of resin such as prepreg, and then heating and pressing them to integrate them. The sealing member 50, etc., which is placed between the first heat sink 21 and the second heat sink 22, is positioned as the resin material constituting the film members flows in when the film members are heated and pressed to integrate them.

[0035] In this embodiment, the portion of the sealing member 50 that is placed on the insulating heat dissipation sheet 10 and seals the first and second semiconductor chips 31, 32, the first and second heat sinks 21, 22, etc. will be described as the first sealing member 51, and the portion that is placed on the first sealing member 51 will be described as the second sealing member 52.

[0036] As shown in Figures 2 to 4, the first to third wiring sections 101 to 103 are appropriately arranged on the first sealing member 51 and the second sealing member 52 such that the first semiconductor chip 31 and the second semiconductor chip 32 constitute the upper arm UA and the lower arm LA. In other words, the first to third wiring sections 101 to 103 in this embodiment are arranged together on the same side (i.e., the upper side of the paper in Figure 2) with respect to the first semiconductor chip 31 and the second semiconductor chip 32. The first and second gate wiring sections 104 and 105 are appropriately arranged on the first sealing member 51 and the second sealing member 52. The first to third wiring sections 101 to 103 and the first and second gate wiring sections 104 and 105 are composed of, for example, aluminum wiring or copper wiring.

[0037] Specifically, the first encapsulating member 51 has a first chip via hole 511 that exposes the first electrode 311 of the first semiconductor chip 31. The first encapsulating member 51 has a second chip via hole 512 that exposes the first electrode 321 of the second semiconductor chip 32. The first encapsulating member 51 has a second heat sink via hole 513 that exposes the portion of the second heat sink 22 that faces the first heat sink 21. The first encapsulating member 51 has a first heat sink via hole 514 that exposes the portion of the first heat sink 21 that faces the second heat sink 22. The first encapsulating member 51 has a first gate via hole 515 that exposes the gate pad 313 of the first semiconductor chip 31. The first encapsulating member 51 has a second gate via hole 516 that exposes the gate pad 323 of the second semiconductor chip 32. Note that one or more of each via hole 511 to 516 are formed.

[0038] The third wiring section 103 has a first wiring layer 131a for the third wiring section, which is positioned on the first sealing member 51 so as to face the portion of the first heat sink 21 of the first semiconductor chip 31 and the second heat sink 22. This first wiring layer 131a for the third wiring section is connected to the first electrode 311 of the first semiconductor chip 31 through a first chip via 511a located in the first chip via hole 511. Furthermore, this first wiring layer 131a for the third wiring section is connected to the second heat sink 22 through a second heat sink via 513a located in the second heat sink via hole 513, and through the second heat sink 22 is connected to the second electrode 322 of the second semiconductor chip 32. In addition, in this embodiment, the first wiring layer 131a for the third wiring section has a hole 1310 formed at a position facing the portion of the first heat sink 21 that faces the portion of the first heat sink 21 that faces the second heat sink 22. The first chip via 511a and the second heat sink via 513a are made of, for example, copper vias. Similarly, each of the vias described later is also made of copper vias.

[0039] The second wiring section 102 has a first wiring layer 121a for the second wiring section, which is positioned on the first sealing member 51 so as to face the second heat sink 22 and the second semiconductor chip 32. The first wiring layer 121a for the second wiring section is connected to the first electrode 321 of the second semiconductor chip 32 through a second chip via 512a positioned in the second chip via hole 512. The first wiring layer 121a for the second wiring section is formed to extend on the opposite side from the first wiring layer 131a for the third wiring section.

[0040] The first wiring section 101 has a first wiring layer 111a for the first wiring section, which is positioned on the first sealing member 51 so as to face the portion of the first heat sink 21 that is on the side of the second heat sink 22. In this embodiment, the first wiring layer 111a for the first wiring section is positioned within a hole 1310 formed in the first wiring layer 131a for the third wiring section. The first wiring layer 111a for the first wiring section is connected to the first heat sink 21 through a first heat sink via 514a positioned in the first heat sink via hole 514, and is connected to the second electrode 312 of the first semiconductor chip 31 through the first heat sink 21.

[0041] The first gate wiring section 104 has a first wiring layer 141a for the first gate wiring section, which is arranged on the first sealing member 51 so as to include a portion facing the gate pad 313 of the first semiconductor chip 31. The first wiring layer 141a for the first gate wiring section is connected to the gate pad 313 of the first semiconductor chip 31 through a first gate via 515a arranged in the first gate via hole 515. The first wiring layer 141a for the first gate wiring section is extended on the opposite side from the first wiring layer 131a for the third wiring section.

[0042] The second gate wiring section 105 has a first wiring layer 151a for the second gate wiring section, which is arranged on the first sealing member 51 so as to include the portion facing the gate pad 323 of the second semiconductor chip 32. The first wiring layer 151a for the second gate wiring section is connected to the gate pad 323 of the second semiconductor chip 32 through a second gate via 516a arranged in the second gate via hole 516. The first wiring layer 151a for the second gate wiring section is shaped approximately L-shape in plan and is extended on the opposite side from the first wiring layer 121a for the second wiring section so as not to interfere with the first wiring layer 121a for the second wiring section and the first wiring layer 131a for the third wiring section.

[0043] The second sealing member 52 is positioned on the first sealing member 51 so as to cover the first wiring layer 131a for the third wiring section, the first wiring layer 121a for the second wiring section, the first wiring layer 111a for the first wiring section, the first wiring layer 141a for the first gate wiring section, and the first wiring layer 151a for the second gate wiring section. The second sealing member 52 has a via hole 523 for the third wiring section that exposes the first wiring layer 131a for the third wiring section. The second sealing member 52 has a via hole 522 for the second wiring section that exposes the first wiring layer 121a for the second wiring section. The second sealing member 52 has a via hole 521 for the first wiring section that exposes the first wiring layer 111a for the first wiring section. The second sealing member 52 has a via hole 524 for the first gate wiring section that exposes the first wiring layer 141a for the first gate wiring section. The second sealing member 52 has via holes 525 for the second gate wiring section that expose the first wiring layer 151a for the second gate wiring section. Each of the via holes 521 to 525 is formed as one or more.

[0044] The first wiring section 101 includes a portion facing the first wiring layer 111a for the first wiring section, and has a second wiring layer 111b for the first wiring section, which is arranged on the second sealing member 52 so as to face the first wiring layer 121a for the second wiring section. By arranging the second wiring layer 111b for the first wiring section and the first wiring layer 121a for the second wiring section facing each other in this way, the impedance between the second wiring layer 111b for the first wiring section and the first wiring layer 121a for the second wiring section can be reduced when current flows in opposite directions through them. In this embodiment, the first wiring section 101 is configured to include the second wiring layer 111b for the first wiring section, and the second wiring section 102 is configured to include the first wiring layer 121a for the second wiring section. Therefore, in this embodiment, it can be said that there is a portion in which the first wiring section 101 and the second wiring section 102 are arranged facing each other. The second wiring layer 111b for the first wiring section is connected to the first wiring layer 111a for the first wiring section through the first wiring section via 521a arranged in the first wiring section via hole 521. Furthermore, the second wiring layer 111b for the first wiring section is extended to a position different from the portion facing the second connecting pipe 912.

[0045] Furthermore, in this embodiment, the second wiring layer 111b for the first wiring section has a hole 1110 formed in the portion facing the second connecting pipe 912. In this embodiment, the second wiring layer 111b for the first wiring section has a hole 1110 formed in the portion facing the second connecting pipe 912 and facing the second semiconductor chip 32.

[0046] Furthermore, the second heat dissipation wiring layer 162b is positioned within the hole 1110 on the second sealing member 52. In other words, the second heat dissipation wiring layer 162b is positioned on the second sealing member 52 in the portion facing the second connecting pipe 912. This second heat dissipation wiring layer 162b is connected to the first wiring layer 121a for the second wiring section through a via 526a for the second heat dissipation wiring layer, which is positioned in a via hole 526 for the second heat dissipation wiring layer formed in the second sealing member 52. In other words, the second heat dissipation wiring layer 162b is thermally connected to the second semiconductor chip 32. As a result, heat from the second semiconductor chip 32 is released from the second heat dissipation wiring layer 162b towards the second connecting pipe 912. Note that the second heat dissipation wiring layer 162b and the second wiring layer 111b for the first wiring section are insulated from each other.

[0047] The second wiring section 102 has a second wiring layer 121b for the second wiring section, which is arranged on the second sealing member 52, including a portion facing the first wiring layer 121a for the second wiring section. The second wiring layer 121b for the second wiring section is connected to the first wiring layer 121a for the second wiring section through a via 522a for the second wiring section, which is arranged in the via hole 522 for the second wiring section. The second wiring layer 121b for the second wiring section is formed at a different position from the portion facing the second connecting pipe 912.

[0048] The third wiring section 103 has a second wiring layer 131b for the third wiring section, which is arranged on the second sealing member 52, including a portion facing the first wiring layer 131a for the third wiring section. The second wiring layer 131b for the third wiring section is connected to the first wiring layer 131a for the third wiring section through a via 523a for the third wiring section, which is arranged in the via hole 523 for the third wiring section. In this embodiment, the second wiring layer 131b for the third wiring section extends from the portion facing the second connecting pipe 912 of the cooling device 9 to a position different from the portion facing the second connecting pipe 912.

[0049] Here, the second wiring layer 131b for the third wiring section is thermally connected to the first semiconductor chip 31 via the first wiring layer 131a for the third wiring section. Therefore, in the portion of the second wiring layer 131b for the third wiring section facing the second connecting tube 912, heat from the first semiconductor chip 31 is released to the second connecting tube 912. Thus, in this embodiment, the portion of the second wiring layer 131b for the third wiring section facing the second connecting tube 912 also functions as a first heat dissipation wiring layer 161b that releases heat from the first semiconductor chip 31.

[0050] The first gate wiring section 104 has a second wiring layer 141b for the first gate wiring section, which is arranged on the second sealing member 52 so as to include a portion facing the first wiring layer 141a for the first gate wiring section. The second wiring layer 141b for the first gate wiring section is connected to the first wiring layer 141a for the first gate wiring section through a first gate via 524a arranged in the via hole 524 for the first gate wiring section.

[0051] The second gate wiring section 105 has a second wiring layer 151b for the second gate wiring section, which is arranged on the second sealing member 52, including a portion facing the first wiring layer 151a for the second gate wiring section. The second wiring layer 151b for the second gate wiring section is connected to the first wiring layer 151a for the second gate wiring section through a second gate via 525a arranged in the via hole 525 for the second gate wiring section. The second wiring layer 141b for the first gate wiring section and the second wiring layer 151b for the second gate wiring section are formed at positions different from the portion facing the second connecting pipe 912.

[0052] The first terminal section 112 is composed of a part of the second wiring layer 111b for the first wiring section. The second terminal section 122 is composed of a part of the second wiring layer 121b for the second wiring section. The third terminal section 132 is composed of a part of the second wiring layer 131b for the third wiring section. The first gate terminal section 142 is composed of a part of the second wiring layer 141b for the first gate wiring section. The second gate terminal section 152 is composed of a part of the second wiring layer 151b for the second gate wiring section.

[0053] Furthermore, each terminal portion 112, 122, 132, 142, and 152 is positioned in a location different from the portion of the cooling device 9 facing the second connecting pipe 912. In this embodiment, the first terminal portion 112, the second terminal portion 122, and the third terminal portion 132 are arranged side by side in the direction of arrangement between the first semiconductor chip 31 and the second semiconductor chip 32 (i.e., the X-axis direction), such that the first terminal portion 112 is positioned between the third terminal portion 132 and the second terminal portion 122. In addition, the first gate terminal portion 142 and the second gate terminal portion 152 are positioned on the opposite side of the third terminal portion 132 from the first terminal portion 112 and the second terminal portion 122.

[0054] An insulating heat dissipation sheet 60, similar to the insulating heat dissipation sheet 10, is placed on the second sealing member 52. The insulating heat dissipation sheet 60 has contact holes 61 for exposing the first terminal portion 112, 62 for exposing the second terminal portion 122, and 63 for exposing the third terminal portion 132. The insulating heat dissipation sheet 60 also has contact holes 64 for exposing the first gate terminal portion 142 and 65 for exposing the second gate terminal portion 152. The first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b are covered with the insulating heat dissipation sheet 60. In this embodiment, one surface 1a of the semiconductor module 1 is formed by the insulating heat dissipation sheet 60. In other words, in this embodiment, only the insulating heat dissipation sheet 60 exists between the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b and the one surface 1a.

[0055] The above describes the configuration of the semiconductor module 1 in this embodiment. The semiconductor module 1 is provided in the cooling device 9 so as to be sandwiched between two adjacent connecting tubes 910 in the arrangement direction. Specifically, the semiconductor module 1 is arranged so that one surface 1a and the other surface 1b face the connecting tubes 910 via a bonding member 930 made of TIM (abbreviation for Thermal Interface Material) such as grease.

[0056] The heat generated by the first semiconductor chip 31 in the semiconductor module 1 is released to the first connecting tube 911 via the first heat sink 21, and also to the second connecting tube 912 via the first wiring layer 131a and the first heat dissipation wiring layer 161b for the third wiring section. Similarly, the heat generated by the second semiconductor chip 32 is released to the first connecting tube 911 via the second heat sink 22, and also to the second connecting tube 912 via the first wiring layer 121a and the second heat dissipation wiring layer 162b for the second wiring section. In other words, the semiconductor module 1 of this embodiment has a double-sided heat dissipation structure that allows heat from the first semiconductor chip 31 and the second semiconductor chip 32 to be dissipated from both sides in the Z-axis direction.

[0057] As described above, the first heat sink 21 and the second heat sink 22 are arranged on the other side 1b, and the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b are arranged on the one side 1a. In other words, the first heat sink 21 and the first heat dissipation wiring layer 161b are arranged on opposite sides to the first semiconductor chip 31, and the second heat sink 22 and the second heat dissipation wiring layer 162b are arranged on opposite sides to the second semiconductor chip 32. Therefore, when the semiconductor module 1 is positioned between the first connecting pipe 911 and the second connecting pipe 912 of the cooling device 9, heat from the first semiconductor chip 31 and the second semiconductor chip 32 can be released from the one side 1a and the other side 1b of the semiconductor module 1. In other words, the semiconductor module 1 of this embodiment enables heat dissipation from both sides. Therefore, it is possible to suppress the first semiconductor chip 31 and the second semiconductor chip 32 from becoming excessively hot. Furthermore, in this embodiment, the first heat sink 21 and the second heat sink 22 are arranged to face the first connecting pipe 911, and the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b are arranged to face the second connecting pipe 912. As a result, heat from the first semiconductor chip 31 and the second semiconductor chip 32 can be efficiently dissipated from one side 1a and the other side 1b of the semiconductor module 1.

[0058] (1) In this embodiment, the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b are arranged to be covered by the insulating heat dissipation sheet 60 located closest to the second connecting pipe 912. In other words, the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b are positioned with only the insulating heat dissipation sheet 60 between them and one surface 1a of the semiconductor module 1, and are positioned close to the surface 1a of the semiconductor module 1. Therefore, when the heat from the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b is released to the cooling device 9, a decrease in the heat dissipation effect can be suppressed.

[0059] (2) In this embodiment, the first wiring section 101 and the second wiring section 102 are arranged so that they have opposing portions. This allows the impedance to be lowered. In this configuration, the first heat dissipation wiring layer 161b is made up of a part of the second wiring layer 131b for the third wiring section. The second heat dissipation wiring layer 162b is arranged in the hole 1110 formed in the second wiring layer 111b for the first wiring section. Therefore, in this embodiment, double-sided heat dissipation is possible while keeping the impedance low.

[0060] (Second Embodiment) A second embodiment will now be described. This embodiment adds electronic components to the semiconductor module 1 of the first embodiment. Other aspects are the same as in the first embodiment, so further explanation will be omitted here.

[0061] As shown in Figures 6 to 8, the semiconductor module 1 of this embodiment includes a first resistor 33, a second resistor, a first circuit chip 34, and a second circuit chip as electronic components. The first circuit chip 34 and the second circuit chip have drive circuits for adjusting the gate voltage, etc. The second resistor is not shown in the figure, but is positioned in the Y-axis direction from the first resistor 33. Similarly, the second circuit chip is not shown in the figure, but is positioned in the Y-axis direction from the first circuit chip 34.

[0062] The first resistor 33 and the first circuit chip 34 are arranged on the insulating heat dissipation sheet 10. Specifically, the first resistor 33 and the first circuit chip 34 are arranged on the opposite side of the first heat sink 21 from the second heat sink 22. Although not specifically shown in the figures, the second resistor and the second circuit chip are also arranged on the insulating heat dissipation sheet 10 on the opposite side of the first heat sink 21 from the second heat sink 22, similar to the first resistor 33 and the first circuit chip 34. As described above, the first resistor 33 and the second resistor are arranged side by side in the Y-axis direction, and the first circuit chip 34 and the second circuit chip are also arranged side by side in the Y-axis direction. Furthermore, the first resistor 33, the second resistor, the first circuit chip 34, and the second circuit chip are arranged on the portion of the insulating heat dissipation sheet 10 facing the first connecting pipe 911, similar to the first heat sink 21 and the second heat sink 22.

[0063] The first resistor 33 is connected at one end to the first wiring layer 141a for the first gate wiring section through a first via 541a for the first resistor, which is located in a first via hole 541 for the first resistor formed in the first sealing member 51. The other end of the first resistor 33 is connected to the first wiring layer 171a for the first connection wiring section, which is located on the first sealing member 51, through a second via 542a for the second resistor, which is located in a second via hole 542 for the first resistor formed in the first sealing member 51.

[0064] The first circuit chip 34 is connected at one end to the wiring layer 171a for the first connection wiring section through a first via 543a for the first circuit chip, which is located in a first via hole 543 for the first circuit chip formed in the first sealing member 51. The other end of the first circuit chip 34 is connected to the wiring layer 181a for the first circuit chip through a second via 544a for the first circuit chip, which is located in a second via hole 544 for the first circuit chip formed in the first sealing member 51.

[0065] Furthermore, one end of the second resistor is connected to the first wiring layer 151a for the second gate wiring section through a first via 545a for the second resistor, which is located in a first via hole 545 for the second resistor formed in the first sealing member 51. The other end of the second resistor is connected to the second wiring layer 172a for the second connection wiring section, which is located on the first sealing member 51, through a second via 546a for the second resistor, which is located in a second via hole 546 for the second resistor formed in the first sealing member 51.

[0066] The second circuit chip is connected at one end to the wiring layer 172a for the second connection wiring section through a first via 547a for the second circuit chip, which is located in a second via hole 547 for the second circuit chip formed in the first sealing member 51. The other end of the second circuit chip is connected to the wiring layer 182a for the second circuit chip through a second via 548a for the second circuit chip, which is located in a second via hole 548 for the second circuit chip formed in the first sealing member 51.

[0067] The second wiring layer 131b for the third wiring section, formed on the second sealing member 52, extends from the portion facing the first semiconductor chip 31 to the portion facing the first connection wiring layer 171a, the first circuit chip wiring layer 181a, the second connection wiring layer 172a, and the second circuit chip wiring layer 182a. The second wiring layer 131b for the third wiring section has a first hole 1311 formed in the portion facing the first connection wiring layer 171a and the first circuit chip wiring layer 181a. The second wiring layer 131b for the third wiring section has a second hole 1312 formed in the portion facing the second connection wiring layer 172a and the second circuit chip wiring layer 182a. The first hole 1311 and the second hole 1312 are formed in the portion facing the second connecting tube 912. Furthermore, although this embodiment describes an example in which the first hole 1311 and the second hole 1312 are formed separately, the first hole 1311 and the second hole 1312 may be connected.

[0068] On the second sealing member 52, a first common heat dissipation wiring layer 191b and a first circuit chip heat dissipation wiring layer 192b are formed within the first hole 1311. Also, on the second sealing member 52, a second common heat dissipation wiring layer 193b and a second circuit chip heat dissipation wiring layer 194b are formed within the second hole 1312. In other words, the first common heat dissipation wiring layer 191b, the first circuit chip heat dissipation wiring layer 192b, the second common heat dissipation wiring layer 193b, and the second circuit chip heat dissipation wiring layer 194b are formed in the portion facing the second connecting tube 912. In this embodiment, the first common heat dissipation wiring layer 191b, the first circuit chip heat dissipation wiring layer 192b, the second common heat dissipation wiring layer 193b, and the second circuit chip heat dissipation wiring layer 194b correspond to heat dissipation wiring layers for electronic components.

[0069] The first common heat dissipation wiring layer 191b is connected to the first connection wiring layer 171a through the first common heat dissipation via 527a located in the first common heat dissipation via hole 527 formed in the second sealing member 52. The first circuit chip heat dissipation wiring layer 192b is connected to the first circuit chip wiring layer 181a through the first circuit chip via 528a located in the first circuit chip via hole 528 formed in the second sealing member 52.

[0070] The second common heat dissipation wiring layer 193b is connected to the second connection wiring layer 172a through a second common heat dissipation via 529a located in a second common heat dissipation via hole 529 formed in the second sealing member 52. The second circuit chip heat dissipation wiring layer 194b is connected to the second circuit chip wiring layer 182a through a second circuit chip via 530a located in a second circuit chip via hole 530 formed in the second sealing member 52.

[0071] Furthermore, the second wiring layer 141b for the first gate wiring section and the second wiring layer 151b for the second gate wiring section are formed on the opposite side of the second wiring layer 111b for the first wiring section, with the second wiring layer 131b for the third wiring section in between. Specifically, the second wiring layer 141b for the first gate wiring section is formed at a position opposite to the end of the first circuit chip wiring layer 181a that is opposite to the first circuit chip 34 side. The second wiring layer 141b for the first gate wiring section is connected to the first circuit chip wiring layer 181a through the first gate via 524a. Similarly, the second wiring layer 151b for the second gate wiring section is formed at a position opposite to the end of the second circuit chip wiring layer 182a that is opposite to the second circuit chip side. The second wiring layer 151b for the second gate wiring section is connected to the second circuit chip wiring layer 182a through the second gate via 525a.

[0072] According to the embodiment described above, the first semiconductor chip 31 is placed on the first heat sink 21 and is thermally connected to the first heat dissipation wiring layer 161b. The second semiconductor chip 32 is placed on the second heat sink 22 and is thermally connected to the second heat dissipation wiring layer 162b. Therefore, the same effects as in the first embodiment can be obtained.

[0073] (1) In this embodiment, the semiconductor module 1 comprises a first resistor 33, a first circuit chip 34, a second resistor, and a second circuit chip as electronic components. The first resistor 33, the first circuit chip 34, the second resistor, and the second circuit chip are arranged on the portion of the insulating heat dissipation sheet 10 facing the first connecting tube 911. As a result, the heat from the first resistor 33, the first circuit chip 34, the second resistor, and the second circuit chip is released from the other side 1b of the semiconductor module 1 towards the first connecting tube 911. The semiconductor module 1 also comprises a first common heat dissipation wiring layer 191b which is thermally connected to the first resistor 33 and the first circuit chip 34, and a first circuit chip heat dissipation wiring layer 192b which is thermally connected to the first circuit chip 34. The semiconductor module 1 includes a second common heat dissipation wiring layer 193b thermally connected to the second resistor and the second circuit chip, and a second heat dissipation wiring layer 194b thermally connected to the second circuit chip. Therefore, the heat from the first resistor 33, the first circuit chip 34, the second resistor, and the second circuit chip is released from one side 1a of the semiconductor module 1 to the second connecting tube 912 side. In other words, according to this embodiment, a double-sided heat dissipation structure can be implemented even in electronic components.

[0074] (Third embodiment) A third embodiment will now be described. This embodiment is the same as the electronic device S of the first embodiment, but without the insulating heat dissipation sheet 10 and the insulating heat dissipation sheet 60, and with a modified joining member 930. Other aspects are the same as the first embodiment, so a detailed explanation will be omitted here.

[0075] In this embodiment, as shown in Figure 9, the semiconductor module 1 has a protective member 70 made of solder resist or the like placed on the second sealing member 52 instead of an insulating heat dissipation sheet 60. The protective member 70 has contact holes 71 to 73 that expose the first to third terminal portions 112, 122, and 132. The protective member 70 also has a contact hole 74 that exposes the first gate terminal portion 142. Although not specifically shown, the protective member 70 also has a contact hole that exposes the second gate terminal portion 152.

[0076] Furthermore, the protective member 70 of this embodiment has an opening 76 formed in the portion facing the second connecting pipe 912. As a result, in the semiconductor module 1 of this embodiment, the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b, etc., are exposed. Note that the protective member 70 is made of a material with lower heat dissipation properties than the insulating heat dissipation sheet 60 described in the first embodiment above.

[0077] Furthermore, the semiconductor module 1 of this embodiment does not include an insulating heat dissipation sheet 10. Therefore, the other side 1b of the semiconductor module 1 is composed of a sealing member 50, a first heat sink 21, and a second heat sink 22.

[0078] When the semiconductor module 1 is placed in the cooling device 9 to constitute the electronic device S, the insulating substrate 931 is placed via a bonding member 930 sandwiched between insulating heat conductive members 932 made of grease or the like. The bonding member 930 placed between the second connecting pipe 912 and the semiconductor module 1 is positioned in the opening 76 of the protective member 70 such that the insulating heat conductive member 932 covers the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b, etc., that are exposed from the protective member 70.

[0079] According to the embodiment described above, the first semiconductor chip 31 is placed on the first heat sink 21 and is thermally connected to the first heat dissipation wiring layer 161b. The second semiconductor chip 32 is placed on the second heat sink 22 and is thermally connected to the second heat dissipation wiring layer 162b. Therefore, the same effects as in the first embodiment can be obtained.

[0080] (1) In this embodiment, the insulating heat conductive member 932 included in the bonding member 930 is arranged to cover the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b. Therefore, the semiconductor module 1 can be configured with the first heat dissipation wiring layer 161b and the second heat dissipation wiring layer 162b exposed, thereby improving the degree of design freedom.

[0081] (Other embodiments) This disclosure is described in accordance with embodiments, but it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms that include only one, more, or fewer of those elements, fall within the scope and idea of ​​this disclosure.

[0082] For example, in each of the above embodiments, the second heat dissipation wiring layer 162b may be formed at a different position from the position facing the second semiconductor chip 32, as long as it faces the second connecting tube 912.

[0083] Furthermore, in each of the above embodiments, the routing of the first to third wiring sections 101 to 103, the first gate wiring section 104, and the second gate wiring section 105 can be changed as appropriate.

[0084] Furthermore, in the third embodiment described above, the type, number, and configuration of the electronic components can be changed as appropriate. Also, the electronic components may be connected to only one of the first semiconductor chip 31 and the second semiconductor chip 32.

[0085] Furthermore, the above embodiments can be combined as appropriate. For example, the second embodiment and the third embodiment may be combined.

[0086] [Disclosure of the Invention] The above disclosure can be understood from the following perspectives, for example. [First point of view] A semiconductor module having a first surface (1a) and a second surface (1b) opposite to the first surface in the thickness direction, wherein the first surface and the second surface are sandwiched between two connecting tubes (910) in a cooling device (9), A first semiconductor chip (31) and a second semiconductor chip (32) on which switching elements are formed, A first heat sink (21) is provided on the second side of the semiconductor chip, on which the first semiconductor chip is arranged, A second heat sink (22) is provided on the second side of the semiconductor chip, on which the second semiconductor chip is positioned, A sealing member (50) that seals the first semiconductor chip and the second semiconductor chip, A first heat dissipation wiring layer (161b) is disposed on the first surface side of the semiconductor chip and is thermally connected to the first semiconductor chip, A semiconductor module comprising: a second heat dissipation wiring layer (162b) disposed on the first side of the semiconductor chip and thermally connected to the second semiconductor chip. [Second perspective] The first surface has an insulating heat dissipation sheet (60), The semiconductor module according to the first aspect, wherein the first heat dissipation wiring layer and the second heat dissipation wiring layer are covered with the insulating heat dissipation sheet (60). [Third perspective] The first semiconductor chip and the second semiconductor chip are connected in series. A first wiring section (101) connected to the first semiconductor chip, A second wiring section (102) connected to the second semiconductor chip, It has a third wiring section (103) that connects the first semiconductor chip and the second semiconductor chip, The first wiring section, the second wiring section, and the third wiring section are arranged together on one side of the first semiconductor chip and the second semiconductor chip, The first wiring section and the second wiring section have portions that are arranged opposite each other, The sealing member comprises a first sealing member (51) that seals the first heat sink, the second heat sink, the first semiconductor chip, and the second semiconductor chip, and a second sealing member (52) disposed on the first sealing member. The third wiring portion has a portion located on the second sealing member that is positioned opposite the first semiconductor chip, The first heat dissipation wiring layer is composed of the portion of the third wiring section that faces the first semiconductor chip. The second wiring section has a wiring layer (121a) for the second wiring section disposed on the first sealing member, The first wiring portion is arranged on the second sealing member and has a first wiring portion wiring layer (111b) which has a portion facing the second wiring portion wiring layer and a portion with a hole (1110) formed in the portion facing the second semiconductor chip. The semiconductor module according to the first or second aspect, wherein the second heat dissipation wiring layer is located on the second sealing member, within the holes of the first wiring section wiring layer, and is thermally connected to the second semiconductor chip by being connected to the second wiring section wiring layer through vias (526a) formed in the second sealing member. [Fourth perspective] Electronic components (33, 34) connected to at least one of the first semiconductor chip and the second semiconductor chip, It has a heat dissipation wiring layer for electronic components (191b, 192b, 193b, 194b) that is thermally connected to the aforementioned electronic component, The aforementioned electronic component is arranged on the second side, The heat dissipation wiring layer for the electronic component is arranged on the first surface side of the semiconductor module according to any one of the first to third views. [Fifth perspective] An electronic device, The semiconductor module described in the first perspective, The system includes a cooling device (9) having a channel through which a cooling medium for cooling the semiconductor module flows, The cooling device includes an inlet pipe (901) through which the cooling medium flows, an outlet pipe (902) through which the cooling medium flows out, and a plurality of connecting pipes (910) that connect the inlet pipe and the outlet pipe. The semiconductor module is positioned so as to be sandwiched between the two connecting tubes. The first heat sink and the second heat sink are positioned opposite one of the two connecting tubes, the connecting tube (911) located on the second side. The first heat dissipation wiring layer and the second heat dissipation wiring layer are positioned opposite the other connecting tube (912) of the two connecting tubes, which is located on the first side. [Sixth perspective] A bonding member (930) having an insulating substrate (931) and an insulating heat conductive member (932) is placed between the semiconductor module and the connecting tube. The electronic device according to the fifth aspect, wherein the first heat dissipation wiring layer and the second heat dissipation wiring layer are covered with the insulating heat conductive member. [Explanation of Symbols]

[0087] 1. Semiconductor module 9 Cooling device 31. First Semiconductor Chip 32. Second Semiconductor Chip 50 Sealing member 161b 1st heat dissipation wiring layer 162b 2nd heat dissipation wiring layer 910 Connecting pipe

Claims

1. A semiconductor module having a first surface (1a) and a second surface (1b) opposite to the first surface in the thickness direction, wherein the first surface and the second surface are sandwiched between two connecting tubes (910) in a cooling device (9), A first semiconductor chip (31) and a second semiconductor chip (32) on which switching elements are formed, A first heat sink (21) is provided on the second side of the first semiconductor chip, on which the first semiconductor chip is arranged, A second heat sink (22) is provided on the second side of the second semiconductor chip, on which the second semiconductor chip is positioned, A sealing member (50) that seals the first semiconductor chip and the second semiconductor chip, A first heat dissipation wiring layer (161b) is arranged on the first surface side of the first semiconductor chip and is thermally connected to the first semiconductor chip, A semiconductor module comprising: a second heat dissipation wiring layer (162b) disposed on the first surface side of the second semiconductor chip and thermally connected to the second semiconductor chip.

2. The first surface has an insulating heat dissipation sheet (60), The semiconductor module according to claim 1, wherein the first heat dissipation wiring layer and the second heat dissipation wiring layer are covered with the insulating heat dissipation sheet (60).

3. The first semiconductor chip and the second semiconductor chip are connected in series. A first wiring section (101) connected to the first semiconductor chip, A second wiring section (102) connected to the second semiconductor chip, It has a third wiring section (103) that connects the first semiconductor chip and the second semiconductor chip, The first wiring section, the second wiring section, and the third wiring section are arranged together on the first side of the first semiconductor chip and the second semiconductor chip, The first wiring section and the second wiring section have portions that are arranged opposite each other. The sealing member comprises a first sealing member (51) that seals the first heat sink, the second heat sink, the first semiconductor chip, and the second semiconductor chip, and a second sealing member (52) disposed on the first sealing member. The third wiring portion has a portion located on the second sealing member that is positioned opposite the first semiconductor chip, The first heat dissipation wiring layer is composed of the portion of the third wiring section that faces the first semiconductor chip. The second wiring section has a wiring layer (121a) for the second wiring section disposed on the first sealing member, The first wiring portion is arranged on the second sealing member and has a first wiring portion wiring layer (111b) which has a portion facing the second wiring portion wiring layer and a portion with a hole (1110) formed in the portion facing the second semiconductor chip. The semiconductor module according to claim 1, wherein the second heat dissipation wiring layer is located on the second sealing member, within the holes of the first wiring section wiring layer, and is thermally connected to the second semiconductor chip by being connected to the second wiring section wiring layer through vias (526a) formed in the second sealing member.

4. Electronic components (33, 34) connected to at least one of the first semiconductor chip and the second semiconductor chip, It has a heat dissipation wiring layer for electronic components (191b, 192b, 193b, 194b) that is thermally connected to the electronic component, The aforementioned electronic component is arranged on the second side, The semiconductor module according to any one of claims 1 to 3, wherein the heat dissipation wiring layer for electronic components is arranged on the first surface side.

5. An electronic device, The semiconductor module according to claim 1, The semiconductor module is further comprising a cooling device (9) having a channel through which a cooling medium flows, The cooling device includes an inlet pipe (901) through which the cooling medium flows, an outlet pipe (902) through which the cooling medium flows out, and a plurality of connecting pipes (910) that connect the inlet pipe and the outlet pipe. The semiconductor module is positioned so as to be sandwiched between the two connecting tubes. The first heat sink and the second heat sink are positioned opposite one of the two connecting tubes, the connecting tube (911) located on the second side. The first heat dissipation wiring layer and the second heat dissipation wiring layer are positioned opposite the other connecting tube (912) of the two connecting tubes, which is located on the first side.

6. A bonding member (930) having an insulating substrate (931) and an insulating heat conductive member (932) is placed between the semiconductor module and the connecting tube. The electronic device according to claim 5, wherein the first heat dissipation wiring layer and the second heat dissipation wiring layer are covered with the insulating heat conductive member.