Silicon capacitor semiconductor device and method for manufacturing the same

The silicon capacitor semiconductor device with a multilayer structure and through-silicon vias addresses capacitance and stability issues, achieving high capacitance and reduced defects in miniaturized devices.

JP2026085828AInactive Publication Date: 2026-05-25DB HITECH CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
DB HITECH CO LTD
Filing Date
2024-12-20
Publication Date
2026-05-25
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

Existing methods for increasing capacitance in miniaturized electronic devices face limitations in maximizing capacitance per unit area and stability, particularly when combining wafer-based deep trench capacitors with through-silicon via technology, leading to increased manufacturing complexity and costs.

Method used

A silicon capacitor semiconductor device is designed with a multilayer structure incorporating epitaxial layers and through-silicon vias, featuring interlayer insulating films and capacitor structures on both substrates, allowing for separate manufacturing processes that reduce defects and enhance capacitance.

Benefits of technology

The design achieves high capacitance per unit area while minimizing manufacturing defects and reducing complexity, enabling efficient production of miniaturized electronic devices.

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Abstract

This invention provides a silicon capacitor semiconductor device and a method for manufacturing the same, which enable miniaturization of semiconductor chips by realizing a capacitor with high capacitance relative to its area. [Solution] The silicon capacitor semiconductor device includes a first deep trench capacitor DTC_1 comprising a first substrate 100, a first buffer layer 200, a first-first electrode 300, a first dielectric layer 400, a first-second electrode 500, a first-first interlayer insulating layer 600, a first-first electrode pad structure 800, a first-second electrode pad structure 850, and a first-second interlayer insulating layer 700, and a second deep trench capacitor DTC_2 comprising an epitaxial layer 110E, a second buffer layer 210, a second-first electrode 310, a second dielectric layer 410, a second-second electrode 510, a second-first interlayer insulating layer 610, a second-first electrode pad structure 810, a second-second electrode pad structure 860, and a second-second interlayer insulating layer 710.
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