Photoelectric mixed galvanizing system

Abstract

To provide an optical-electric mixed-signal device having an optical connection structure with high connectivity reliability. [Solution] The photoelectric mixed-signal device 1 comprises a wiring board 10 having an insulating layer 16 and a wiring layer 17 exposed on the upper surface of the insulating layer 16, and a stepped surface 10c recessed from the upper surface; an optical integrated circuit 30 having a first electrode 32 with the first electrode 32 facing upward and arranged on the stepped surface 10c; an optical component arranged adjacent to the optical integrated circuit 30 on the stepped surface 10c and enabling the transmission and reception of optical signals with the optical integrated circuit 30; and a semiconductor device 50 having a second electrode 52 with the second electrode 52 facing downward and arranged on the upper surface, wherein a part of the second electrode 52 is joined to the wiring layer 17 and the other part of the second electrode 52 is joined to the first electrode 32.

Description

Technical Field

[0001] The present invention relates to an optoelectronic hybrid device.

Background Art

[0002] In a data center or the like where various devices such as computers and data communication devices are installed, an optical connection structure for connecting an optical waveguide device and an optical fiber or the like may be used. As an example of such an optical connection structure, an optical connection component using a planar optical waveguide circuit is adhesively fixed to the end face of the input / output waveguide of an optical waveguide device, and the optical waveguide device and the optical fiber are optically connected via the planar optical waveguide circuit (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the above-described optical connection structure, since the optical waveguide device and the optical connection component are adhesively fixed with a small adhesive area, the adhesive strength between the two is weak. Therefore, when stress is applied to the connection portion between the optical waveguide device and the optical connection component, there is a risk that the connection between the optical waveguide device and the optical connection component will break, and the connection reliability cannot be said to be high.

[0005] The present invention has been made in view of the above points, and an object thereof is to provide an optoelectronic hybrid device having an optical connection structure with high connection reliability.

Means for Solving the Problems

[0006] This photoelectric mixed-signal device comprises a wiring substrate having an insulating layer and a wiring layer exposed on the upper surface of the insulating layer, and a stepped surface recessed from the upper surface; an optical integrated circuit having a first electrode, with the first electrode facing upward, and disposed on the stepped surface; an optical component disposed adjacent to the optical integrated circuit on the stepped surface, enabling the transmission and reception of optical signals with the optical integrated circuit; and a semiconductor device having a second electrode, with the second electrode facing downward, and disposed on the upper surface, wherein a portion of the second electrode is bonded to the wiring layer, and the other portion of the second electrode is bonded to the first electrode. [Effects of the Invention]

[0007] According to the disclosed technology, it is possible to provide an optoelectronic hybrid device having an optical connection structure with high connectivity reliability. [Brief explanation of the drawing]

[0008] [Figure 1] This is a plan view illustrating a photoelectric mixed-signal device according to the first embodiment. [Figure 2] This is a cross-sectional view illustrating a photoelectric mixed-signal device according to the first embodiment. [Figure 3] This is a cross-sectional view illustrating a photoelectric mixed-signal device according to Modification 1 of the First Embodiment. [Figure 4] This is a cross-sectional view illustrating how the fiber array 120 is attached to the photoelectric mixed-signal device 1A. [Figure 5] This is a cross-sectional view illustrating a photoelectric mixed-loading apparatus according to a modified example 2 of the first embodiment. [Modes for carrying out the invention]

[0009] The embodiments for carrying out the invention will be described below with reference to the drawings. In each drawing, the same reference numerals are used for identical components, and redundant explanations may be omitted.

[0010] <First Embodiment> [Structure of a photoelectric mixed-signal device] Figure 1 is a plan view illustrating a photoelectric mixed galvanizing apparatus according to the first embodiment. Figure 2 is a cross-sectional view illustrating a photoelectric mixed galvanizing apparatus according to the first embodiment, showing a cross-section along line AA in Figure 1.

[0011] Referring to Figures 1 and 2, the photoelectric mixed-signal device 1 includes a wiring board 10, an optical integrated circuit 30, a fiber array 40, and a semiconductor device 50. The photoelectric mixed-signal device 1 may further include a bonding material 60 and a resin part 70. The fiber array 40 is a typical example of an optical component according to the present invention.

[0012] The wiring board 10 has a core layer 11 having one surface 11a and the other surface 11b which is the opposite surface of the first surface 11a. The wiring board 10 also has wiring layers 13, insulating layers 14, wiring layers 15, insulating layers 16, wiring layers 17, and solder resist layers 18 sequentially laminated on one surface 11a of the core layer 11. The wiring board 10 also has wiring layers 23, insulating layers 24, wiring layers 25, insulating layers 26, wiring layers 27, and solder resist layers 28 sequentially laminated on the other surface 11b of the core layer 11.

[0013] In the first embodiment, for convenience, in the photoelectric mixed-signal device 1, the solder resist layer 18 side of the wiring board 10 is referred to as the upper side or one side, and the solder resist layer 28 side as the lower side or the other side. Also, the surface on the solder resist layer 18 side of each part is referred to as one surface or the upper surface, and the surface on the solder resist layer 28 side is referred to as the other surface or the lower surface. However, the photoelectric mixed-signal device 1 can be used upside down or positioned at any angle. Furthermore, a planar view refers to viewing the object from the direction normal to one surface 11a of the core layer 11, and a planar shape refers to the shape of the object viewed from the direction normal to one surface 11a of the core layer 11.

[0014] The core layer 11 is provided, for example, in the center of the wiring board 10 in the thickness direction. The core layer 11 is formed, for example, in a flat plate shape. The planar shape of the core layer 11 can be any shape. The planar shape of the core layer 11 can be, for example, rectangular.

[0015] The core layer 11 is preferably an insulating layer having a higher rigidity than each of the insulating layers laminated on one surface 11a and the other surface 11b. The core layer 11 is formed, for example, thicker than each of the insulating layers laminated on one surface 11a and the other surface 11b. The thickness of the core layer 11 can be, for example, about 50 μm to 500 μm.

[0016] The material of the core layer 11 is preferably a material having a coefficient of thermal expansion close to the coefficient of thermal expansion of the optical integrated circuit 30, the coefficient of thermal expansion of the fiber array 40, and the coefficient of thermal expansion of the semiconductor device 50. As the material of the core layer 11, for example, glass, silicon, or the like can be used. The core layer 11 is composed of, for example, a single layer. That is, the core layer 11 is a single member.

[0017] The core layer 11 is provided with a through hole 11x penetrating the core layer 11 in the thickness direction. The planar shape of the through hole 11x is, for example, circular.

[0018] The wiring layer 13 is disposed on one surface 11a of the core layer 11. The wiring layer 23 is disposed on the other surface 11b of the core layer 11. The wiring layer 13 and the wiring layer 23 are electrically connected by a through wiring 12 formed in the through hole 11x. The wiring layers 13 and 23 are each patterned into a predetermined planar shape. As the material of the wiring layers 13 and 23 and the through wiring 12, for example, copper (Cu) or the like can be used. The thickness of the wiring layers 13 and 23 is, for example, about 5 to 20 μm. Note that the wiring layer 13, the wiring layer 23, and the through wiring 12 may be integrally formed.

[0019] The insulating layer 14 is an interlayer insulating layer disposed on one surface 11a of the core layer 11 and covering the wiring layer 13. As the material of the insulating layer 14, for example, an insulating resin mainly composed of an epoxy resin or a polyimide resin can be used. The thickness of the insulating layer 14 can be, for example, about 10 to 30 μm. The insulating layer 14 can contain a filler such as silica (SiO2).

[0020] In the insulating layer 14, a via hole 14x is formed which penetrates the insulating layer 14 and exposes the upper surface of the wiring layer 13. The via hole 14x can be a frustum of a cone-shaped recess in which the diameter of the opening opened to the insulating layer 16 side is larger than the diameter of the bottom surface of the opening formed by the upper surface of the wiring layer 13.

[0021] The wiring layer 15 is formed on one side of the insulating layer 14. The wiring layer 15 includes via wirings filled in the via hole 14x and wiring patterns formed on the upper surface of the insulating layer 14. The wiring patterns are electrically connected to the wiring layer 13 via the via wirings. The material of the wiring layer 15 and the thickness of the wiring patterns can be the same as those of the wiring layer 13, for example.

[0022] The insulating layer 16 is formed on the upper surface of the insulating layer 14 so as to cover the wiring layer 15. The material and thickness of the insulating layer 16 can be the same as those of the insulating layer 14, for example. The insulating layer 16 can contain fillers such as silica (SiO2).

[0023] In the insulating layer 16, a via hole 16x is formed which penetrates the insulating layer 16 and exposes the upper surface of the wiring layer 15. The via hole 16x can be a frustum of a cone-shaped recess in which the diameter of the opening opened to the solder resist layer 18 side is larger than the diameter of the bottom surface of the opening formed by the upper surface of the wiring layer 15.

[0024] The wiring layer 17 is exposed on the upper surface 16a of the insulating layer 16. The wiring layer 17 may consist of via wiring filled in via holes 16x and pads formed on the upper surface 16a of the insulating layer 16. The pads can be electrically connected to the wiring layer 15 via the via wiring. The material of the wiring layer 17 and the thickness of the pads may be the same as, for example, the same as the wiring layer 13. The thickness of the pads may be greater than the thickness of the wiring layer 13. In addition, the wiring layer 17 may also include wiring patterns in addition to pads. The pads and wiring patterns constituting the wiring layer 17 may be provided, for example, on the upper surface 16a of the insulating layer 16. The pads and wiring patterns constituting the wiring layer 17 may be provided such that their lower and side surfaces are embedded in the insulating layer 16, and their upper surfaces are exposed from the upper surface 16a of the insulating layer 16.

[0025] The solder resist layer 18 is a protective insulating layer located on the outermost side of the wiring substrate 10, and is formed on the upper surface 16a of the insulating layer 16. The solder resist layer 18 has an opening 18x, and the wiring layer 17 is exposed within the opening 18x. The wiring layer 17 exposed within the opening 18x can be used, for example, as a pad for electrically connecting to electronic components such as semiconductor chips. The solder resist layer 18 can be formed from, for example, a photosensitive epoxy insulating resin or an acrylic insulating resin. The thickness of the solder resist layer 18 is, for example, about 15 to 35 μm.

[0026] Furthermore, a metal layer may be formed on the surface of the wiring layer 17 exposed within the opening 18x, or an organic coating may be formed by applying an anti-oxidation treatment such as OSP (Organic Solderability Preservative) treatment. Examples of metal layers include an Au layer, a Ni / Au layer (a metal layer in which Ni and Au layers are stacked in that order), a Ni / Pd / Au layer (a metal layer in which Ni, Pd, and Au layers are stacked in that order), and a Sn layer.

[0027] The insulating layer 24 is an interlayer insulating layer located on the other surface 11b of the core layer 11 and covering the wiring layer 23. The material and thickness of the insulating layer 24 can be the same as, for example, the insulating layer 14. The insulating layer 24 may contain fillers such as silica (SiO2).

[0028] The insulating layer 24 has via holes 24x that penetrate the insulating layer 24 and expose the lower surface of the wiring layer 23. The via holes 24x can be frustoconical recesses in which the diameter of the opening on the insulating layer 26 side is larger than the diameter of the bottom surface of the opening formed by the lower surface of the wiring layer 23.

[0029] The wiring layer 25 is formed on the other side of the insulating layer 24. The wiring layer 25 comprises via wiring filled in via holes 24x and a wiring pattern formed on the underside of the insulating layer 24. The wiring pattern is electrically connected to the wiring layer 23 via the via wiring. The material and thickness of the wiring layer 25 can be the same as, for example, the wiring layer 13.

[0030] The insulating layer 26 is formed on the underside of the insulating layer 24 so as to cover the wiring layer 25. The material and thickness of the insulating layer 26 can be the same as, for example, the insulating layer 14. The insulating layer 26 may contain fillers such as silica (SiO2).

[0031] The insulating layer 26 has via holes 26x that penetrate the insulating layer 26 and expose the lower surface of the wiring layer 25. The via holes 26x can be frustoconical recesses in which the diameter of the opening that opens to the solder resist layer 28 side is larger than the diameter of the bottom surface of the opening formed by the lower surface of the wiring layer 25.

[0032] The wiring layer 27 is formed on the other side of the insulating layer 26. The wiring layer 27 comprises via wiring filled in via holes 26x and a wiring pattern formed on the underside of the insulating layer 26. The wiring pattern is electrically connected to the wiring layer 25 via the via wiring. The material and thickness of the wiring layer 27 can be the same as, for example, the wiring layer 13.

[0033] The solder resist layer 28 is a protective insulating layer located on the outermost side of the wiring board 10, and is formed on the underside of the insulating layer 26. The material and thickness of the solder resist layer 28 can be the same as, for example, the solder resist layer 18. The solder resist layer 28 has an opening 28x, and a portion of the underside of the wiring layer 27 is exposed within the opening 28x. The planar shape of the opening 28x can be, for example, circular. The wiring layer 27 exposed within the opening 28x can be used as a pad for electrically connecting to a mounting board such as a motherboard. If necessary, the aforementioned metal layer may be formed on the underside of the wiring layer 27 exposed within the opening 28x, or an anti-oxidation treatment such as OSP treatment may be applied.

[0034] The wiring board 10 has a stepped surface 10c that is recessed below the upper surface 16a of the insulating layer 16. The wiring board 10 also has an inner surface 10d that connects the upper surface 16a of the insulating layer 16 and the stepped surface 10c. The upper surface 16a and the stepped surface 10c can be, for example, parallel. The stepped surface 10c and the inner surface 10d can be, for example, perpendicular.

[0035] The stepped surface 10c can be provided at any position recessed from the upper surface 16a of the insulating layer 16. In the illustrated example, the stepped surface 10c is located between one surface 11a and the other surface 11b of the core layer 11, but is not limited to this. For example, the stepped surface 10c may be provided between the upper surface 16a and the lower surface of the insulating layer 16, or between the upper surface and the lower surface of the insulating layer 14, or between the upper surface and the lower surface of another insulating layer. The stepped surface 10c can be formed, for example, by countersinking a wiring board 10 that does not have a stepped surface 10c formed thereon.

[0036] The photonic integrated circuit 30 (PIC) comprises a main body 31 and a first electrode 32. The main body 31 is, for example, a substrate such as silicon on which multiple optical waveguides, light-emitting elements, light-receiving elements, etc., are provided. The first electrode 32 is a connection terminal composed of, for example, gold bumps, solder bumps, or copper posts with solder at the tips. The first electrode 32 is located on one side of the main body 31. The optical waveguides are located on the same side of the main body 31 as the first electrode 32.

[0037] The optical integrated circuit 30 may be referred to as silicon photonics, etc. The optical integrated circuit 30 may have the function of converting optical signals input from the fiber array 40 into electrical signals, and / or the function of converting electrical signals input from the semiconductor device 50 into optical signals and outputting them to the fiber array 40.

[0038] The optical integrated circuit 30 is positioned face up on the stepped surface 10c. That is, the optical integrated circuit 30 is positioned on the stepped surface 10c with the first electrode 32 facing upwards. The lower surface of the main body 31 of the optical integrated circuit 30 is bonded to the stepped surface 10c by, for example, an adhesive layer 81. As the adhesive layer 81, for example, an ultraviolet-curing type or a thermosetting type epoxy resin can be used.

[0039] The surface on which the first electrode 32 of the optical integrated circuit 30 is exposed, i.e., the upper surface of the main body 31, is preferably flush with the upper surface 16a of the insulating layer 16. This makes it easy to bond the second electrode 52 of the semiconductor device 50 to both the pads constituting the wiring layer 17 and the first electrode 32 of the optical integrated circuit 30. Here, "flush" means that an error of ±5 μm is to be tolerated. Within this error range, it is easy to bond the second electrode 52 of the semiconductor device 50 to both the pads constituting the wiring layer 17 and the first electrode 32 of the optical integrated circuit 30 by adjusting the height of the bonding material 60.

[0040] The fiber array 40 is positioned on the stepped surface 10c, adjacent to the optical integrated circuit 30. The fiber array 40 comprises, for example, a base 41, a plurality of optical fibers 42, and a lid 43. In the illustrated example, four optical fibers 42 are arranged side by side at predetermined intervals. In a plan view, each optical fiber 42 extends outside the wiring board 10, straddling one side of the stepped surface 10c.

[0041] The base 41 and the lid 43 sandwich each optical fiber 42. The surface of the base 41 facing the lid 43 is provided with, for example, multiple grooves for arranging the optical fibers 42, with one optical fiber 42 positioned in each groove. The surface of the lid 43 facing the base 41 is, for example, a flat surface and does not have grooves. The base 41 and the lid 43 can be formed from, for example, glass.

[0042] The fiber array 40 is positioned with its lid 43 facing the stepped surface 10c. The lower surface of the lid 43 is bonded to the stepped surface 10c by, for example, an adhesive layer 82. As the adhesive layer 82, for example, an ultraviolet-curing type or a thermosetting type epoxy resin can be used. The end of each optical fiber 42 faces the end of each optical waveguide of the optical integrated circuit 30. Therefore, each optical waveguide of the optical integrated circuit 30 can transmit and receive optical signals with each optical fiber 42.

[0043] The thickness of the lid 43 is preferably less than or equal to the thickness of the main body 31 of the optical integrated circuit 30. This makes it easy to position the ends of each optical fiber 42 and the ends of each optical waveguide of the optical integrated circuit 30 facing each other by active alignment. The gap between the lower surface of the lid 43 and the stepped surface 10c can be filled by adjusting the amount of adhesive layer 82. The thickness of the lid 43 may also be the same as the thickness of the main body 31 of the optical integrated circuit 30.

[0044] The semiconductor device 50 comprises a main body 51 equipped with a semiconductor integrated circuit and a plurality of second electrodes 52 that serve as connection terminals. The second electrodes 52 are arranged on one side of the main body 51. The main body 51 is, for example, mainly composed of silicon. The second electrodes 52 are, for example, gold bumps, solder bumps, or copper posts with solder at their tips. The semiconductor device 50 is positioned face-down on the upper surface 16a of the insulating layer 16. In other words, the semiconductor device 50 is positioned on the upper surface 16a with the second electrodes 52 facing downwards.

[0045] A portion of the second electrode 52 of the semiconductor device 50 is bonded to a pad constituting the wiring layer 17 of the wiring substrate 10 via a conductive bonding material 60 such as solder. The other portion of the second electrode 52 of the semiconductor device 50 is bonded to the first electrode 32 of the optical integrated circuit 30 via a conductive bonding material 60 such as solder. This enables the supply of power from the semiconductor device 50 to the optical integrated circuit 30, and the transmission and reception of electrical signals between the semiconductor device 50 and the optical integrated circuit 30. Furthermore, the optical integrated circuit 30, having received power from the semiconductor device 50, is capable of transmitting and receiving optical signals.

[0046] The semiconductor device 50 has a function, for example, to amplify the electrical signal input from the optical integrated circuit 30. The electrical signal input from the optical integrated circuit 30 is fast and easily attenuated. Therefore, by connecting the optical integrated circuit 30 and the semiconductor device 50 via a short path through a bonding material 60, and by amplifying the attenuating electrical signal with the semiconductor device 50, the quality of the electrical signal output from the semiconductor device 50 can be improved.

[0047] The resin portion 70 is located on the upper surface 16a of the insulating layer 16. The resin portion 70 is located at least around the bonding material 60 between the lower surface of the semiconductor device 50 and the upper surface 16a of the insulating layer 16, and around the bonding material 60 between the lower surface of the semiconductor device 50 and the upper surface of the optical integrated circuit 30. This improves the connection reliability between the second electrode 52 of the semiconductor device 50 and the wiring layer 17. It also improves the connection reliability between the second electrode 52 of the semiconductor device 50 and the first electrode 32 of the optical integrated circuit 30. The resin portion 70 may be placed between the opposing surfaces of the fiber array 40 and the semiconductor device 50. If there is a gap on the stepped surface 10c, such as between the optical integrated circuit 30 and the fiber array 40, the resin portion 70 may be placed in that gap. As the material for the resin portion 70 needs to be poured into a narrow space, it is preferable to use a material with good fluidity. As the material for the resin portion 70, for example, an insulating resin such as epoxy resin can be used.

[0048] To fabricate the photoelectric mixed-signal device 1, first, a wiring substrate 10 is prepared which has at least an insulating layer 16 and a wiring layer 17 exposed on the upper surface 16a of the insulating layer 16, and a stepped surface 10c that is recessed below the upper surface 16a. Next, the optical integrated circuit 30 is fixed to the stepped surface 10c with the first electrode 32 facing upwards. Next, the semiconductor device 50 is mounted on the upper surface 16a of the insulating layer 16 with the second electrode 52 facing downwards. At this time, a conductive bonding material 60 is used to bond a part of the second electrode 52 of the semiconductor device 50 to the wiring layer 17, and the other part of the second electrode 52 is bonded to the first electrode 32 of the optical integrated circuit 30.

[0049] At this point, power can be supplied from the semiconductor device 50 to the optical integrated circuit 30, and electrical signals can be transmitted and received between the semiconductor device 50 and the optical integrated circuit 30. The optical integrated circuit 30, having received power from the semiconductor device 50, is then able to transmit and receive optical signals. Next, with light being transmitted from the optical integrated circuit 30, the fiber array 40 is placed on the stepped surface 10c adjacent to the optical integrated circuit 30, and active alignment is performed. After that, with the optical integrated circuit 30 and the fiber array 40 aligned, the fiber array 40 is fixed to the stepped surface 10c. Then, the resin part 70 is placed as needed.

[0050] Thus, in the optical-electric mixed-signal device 1, the connection portion between the optical integrated circuit 30 and the fiber array 40 is located on the stepped surface 10c. This differs from conventional structures where the connection portion of the two components is located on the outside of the substrate in a plan view, making it less likely for stress to concentrate at the connection portion between the optical integrated circuit 30 and the fiber array 40. Therefore, the risk of fracture at the connection portion between the optical integrated circuit 30 and the fiber array 40 can be reduced. In other words, a highly reliable optical connection structure can be realized between the optical integrated circuit 30 and the fiber array 40.

[0051] Furthermore, in the photoelectric mixed-signal device 1, a stepped surface 10c is provided on the wiring board 10, and the optical integrated circuit 30 and fiber array 40 are arranged on the stepped surface 10c, which makes it possible to reduce the height of the photoelectric mixed-signal device 1.

[0052] Furthermore, in the optical-electric mixed-signal device 1, the optical integrated circuit 30 is positioned face-up on the stepped surface 10c, so the optical waveguide of the optical integrated circuit 30 is located near the upper surface 16a of the insulating layer 16. This makes it easy to align the optical waveguide of the optical integrated circuit 30 with the optical fibers 42 of the fiber array 40.

[0053] <Variation 1 of the First Embodiment> Modification 1 of the first embodiment shows an example in which a connector is used instead of a fiber array.

[0054] Figure 3 is a cross-sectional view illustrating a modified example of the first embodiment of the optical-electric combined-signal device. Referring to Figure 3, the optical-electric combined-signal device 1A differs from the optical-electric combined-signal device 1 in that it has a connector 90 instead of a fiber array 40. The connector 90 is a typical example of an optical component according to the present invention and is a connector that can be connected to a fiber array equipped with optical fibers.

[0055] The connector 90 is positioned adjacent to the optical integrated circuit 30 on the stepped surface 10c via an adhesive layer 82. The connector 90 includes, for example, a housing 91 and a reflective member 92. The housing 91 is made of a material that is transparent at the wavelength of incident light. The reflective member 92 has the function of changing the direction of incident light. The reflective member 92 is, for example, a concave mirror that can bend the direction of incident light by 90 degrees. Multiple positioning recesses 91x are provided on the upper surface of the housing 91.

[0056] The connector 90 is configured to allow the attachment and detachment of the fiber array 120. The direction in which the fiber array 120 is attached and detached is perpendicular to the stepped surface 10c. The fiber array 120 includes, for example, a housing 121, a reflective member 122, and a plurality of optical fibers 123. The housing 121 is made of a material that is transparent at the wavelength of incident light and functions as a connector. The reflective member 122 has the function of changing the direction of incident light. The reflective member 122 is, for example, a concave mirror that can bend the direction of incident light by 90 degrees. Multiple positioning protrusions 121p are provided on the lower surface of the housing 121.

[0057] Figure 4 is a cross-sectional view illustrating the installation of a fiber array 120 on the optical-electric mixed-signal device 1A. As shown in Figure 4, the connector 90 and the fiber array 120 are positioned by the protrusion 121p of the housing 121 fitting into the recess 91x of the housing 91. In this state, for example, light L transmitted from the optical integrated circuit 30 changes direction at the reflective member 92 of the connector 90 and reaches the reflective member 122 of the fiber array 120. The light L that reaches the reflective member 122 changes direction at the reflective member 122 and enters the optical fiber 123, and travels through the optical fiber 123. This makes it possible to realize a structure similar to the optical-electric mixed-signal device 1 shown in Figures 1 and 2. In other words, the connector 90 is a connector that can be connected to the fiber array 120 equipped with optical fibers 123, and when the connector 90 and the fiber array 120 are connected, the optical integrated circuit 30 can send and receive optical signals with the optical fibers 123.

[0058] Thus, the optical component according to the present invention is not limited to a fiber array, and may be a connector, as long as it is a component that is arranged adjacent to the optical integrated circuit 30 on the stepped surface 10c and contributes to enabling the transmission and reception of optical signals with the optical integrated circuit 30.

[0059] If the optical component according to the present invention has a connector 90, repeated stress may be applied to the connection portion between the connector 90 and the optical integrated circuit 30 due to the attachment and detachment of the fiber array 120 to and from the connector 90. Therefore, there is great technical significance in arranging the connection portion between the optical integrated circuit 30 and the connector 90 on a stepped surface 10c to reduce the stress applied to the connection portion between the optical integrated circuit 30 and the connector 90.

[0060] <Modification 2 of the First Embodiment> Modification 2 of the first embodiment shows an example in which a different type of connector is used compared to Modification 1 of the first embodiment.

[0061] Figure 5 is a cross-sectional view illustrating a modified example of the first embodiment, part 2, of the photoelectric mixed-signal device. Referring to Figure 5, the photoelectric mixed-signal device 1B differs from the photoelectric mixed-signal device 1A in that it has a connector 100 instead of a connector 90. The connector 100 is a typical example of an optical component according to the present invention and is a connector that can be connected to a fiber array equipped with optical fibers.

[0062] The connector 100 is positioned adjacent to the optical integrated circuit 30 on the stepped surface 10c via an adhesive layer 82. The connector 100 is a female connector and has an insertion portion 100x that opens on the side opposite to the optical integrated circuit 30. The connector 100 is made of a material that is transparent at the wavelength of incident light. Alternatively, the connector 100 may be made of a material that is opaque at the wavelength of incident light and may have openings in the region facing each optical waveguide of the optical integrated circuit 30 that can transmit and receive optical signals.

[0063] The connector 100 is configured to allow the fiber array 130 to be attached and detached. The direction in which the fiber array 130 is attached and detached is parallel to the stepped surface 10c. The fiber array 130 has, for example, a housing 131 and a plurality of optical fibers 132. The housing 131 of the fiber array 130 is inserted into the insertion portion 100x of the connector 100. In other words, the connector 100 is a connector that can connect to a fiber array 130 equipped with optical fibers 132, and when the connector 100 and the fiber array 130 are connected, the optical integrated circuit 30 becomes capable of sending and receiving optical signals with the optical fibers 132.

[0064] Thus, the direction in which the fiber array is attached to and detached from the connector located adjacent to the optical integrated circuit 30 may be perpendicular to the stepped surface 10c, or it may be parallel to the stepped surface 10c.

[0065] Although preferred embodiments and their variations have been described in detail above, the invention is not limited to the embodiments and their variations described above, and various modifications and substitutions can be made to the embodiments and their variations described above without departing from the scope of the claims. [Explanation of Symbols]

[0066] 1,1A,1B Photoelectric mixed-signal device 10 Wiring board 10c step surface 10d Inner surface 11 Core Layers 11a One side 11b The other side 11x through-hole 12 Through-wiring 13,15,17,23,25,27 wiring layer 14, 16, 24, 26 Insulating layer 14x, 16x, 24x, 26x Beer Hall 16a Top side 18,28 Solder Resist Layer 18x,28x opening 30 Optical Integrated Circuits 31 Main unit 32 1st electrode 40,120,130 fiber array 41 Base 42,123,132 optical fibers 43 Lid 50 Semiconductor Devices 51 Main unit 52 2nd electrode 60 Bonding material 70 Resin part 90,100 connectors 91,121,131 Housing 91x recess 92,122 Reflective material 100x Insertion part 121p Convex part

Claims

1. A wiring board having an insulating layer and a wiring layer exposed on the upper surface of the insulating layer, and having a stepped surface that is recessed below the upper surface, An optical integrated circuit comprising a first electrode, with the first electrode facing upward, and arranged on the stepped surface, An optical component is provided on the stepped surface, adjacent to the optical integrated circuit, which enables the transmission and reception of optical signals with the optical integrated circuit. A semiconductor device comprising a second electrode, wherein the second electrode is positioned downwards and the semiconductor device is positioned on the upper surface thereof, A photoelectric mixed-signal device in which a portion of the second electrode is joined to the wiring layer, and the other portion of the second electrode is joined to the first electrode.

2. The photoelectric mixed-signal apparatus according to claim 1, wherein the surface on which the first electrode of the optical integrated circuit is exposed is flush with the upper surface.

3. The optical component is a fiber array comprising multiple optical fibers, The optical integrated circuit is capable of transmitting and receiving optical signals with each of the optical fibers, as described in claim 1 or 2.

4. The fiber array comprises a base and a lid that sandwich each of the optical fibers, with the lid positioned toward the stepped surface. The photoelectric mixed-signal apparatus according to claim 3, wherein the thickness of the lid is less than or equal to the thickness of the optical integrated circuit.

5. The optical component is a connector that can be connected to a fiber array equipped with optical fibers. The optical integrated circuit becomes capable of transmitting and receiving optical signals with the optical fiber when the connector and the fiber array are connected, according to claim 1 or 2.

6. The photoelectric mixed-loading apparatus according to claim 5, wherein the connector has a reflective member that changes the direction of incident light.

7. The optical integrated circuit has the function of converting an optical signal input from the optical component into an electrical signal and outputting it to the semiconductor device, and / or the function of converting an electrical signal input from the semiconductor device into an optical signal and outputting it to the optical component, as described in claim 1 or 2.

8. The photoelectric mixed-signal apparatus according to claim 1 or 2, wherein the semiconductor device has the function of amplifying the electrical signal input from the optical integrated circuit.

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