Indication device

Abstract

The present invention provides a semiconductor device using an oxide semiconductor film that reduces defects in the oxide semiconductor film, improves its electrical properties, and enhances its reliability. [Solution] The transistor 50 of the semiconductor device comprises a gate electrode 15 formed on a substrate 11, a gate insulating film 17 covering the gate electrode, a multilayer film 20 overlapping the gate electrode via the gate insulating film, and a pair of electrodes 21 and 22 in contact with the multilayer film; a first oxide insulating film 23 covering the transistor 50; and a second oxide insulating film 24 formed on the first oxide insulating film. The multilayer film has an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film that permeates oxygen, and the second oxide insulating film is an oxide insulating film that contains more oxygen than satisfactorily satisfying the oxygen content.

Description

[Technical Field]

[0001] The present invention relates to a product, method, or method of manufacture. Or, the present invention relates to a process, machine Relating to a manufacturer or composition of matter. The present invention relates to, for example, semiconductor devices, display devices, light-emitting devices, energy storage devices, and methods for driving them. The present invention relates to, for example, oxide semiconductors having The present invention relates to semiconductor devices, display devices, or light-emitting devices. In particular, the present invention relates to, for example, transient This invention relates to a semiconductor device having a sta and a method for manufacturing the same. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors being described are amorphous silicon, single-crystal silicon formed on a glass substrate. It is made of silicon semiconductors such as silicon or polycrystalline silicon. Transistors using semiconductors are also used in integrated circuits (ICs) and other applications.

[0003] In recent years, metal oxides exhibiting semiconductor properties have been used in transistors instead of silicon semiconductors. The technology is attracting attention. In this specification, metal oxides exhibiting semiconductor properties are referred to as oxides. Let's call it a semiconductor.

[0004] For example, as an oxide semiconductor, zinc oxide or an In-Ga-Zn oxide is used. A transistor is fabricated and used as a switching element for pixels in a display device. The technology is disclosed (see Patent Documents 1 and 2). [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Overview of the project] [Problems that the invention aims to solve]

[0006] In a transistor using an oxide semiconductor film, the amount of oxygen vacancies contained in the oxide semiconductor film A high level of this can lead to poor electrical characteristics in transistors, as well as deterioration over time and stress testing. (For example, in the BT (Bias-Temperature) stress test), The electrical characteristics of the zista, particularly the threshold voltage fluctuation, are a cause of increased variation.

[0007] Therefore, in one aspect of the present invention, in a semiconductor device using an oxide semiconductor film, One of the objectives is to reduce defects in semiconductor films. Alternatively, one aspect of the present invention relates to an oxide semiconductor. One of the challenges is to improve the electrical properties of semiconductor devices using conductive films. Alternatively, in one aspect of the present invention, reliability is improved in a semiconductor device using an oxide semiconductor film. One of the objectives is to improve this. Alternatively, one aspect of the present invention relates to a semiconductor device with low off-current. The objective is to provide a place for, etc. Alternatively, one aspect of the present invention is a semiconductor with low power consumption. The objective is to provide a device or the like. Alternatively, one aspect of the present invention is to reduce eye strain. The objective is to provide a display device that can do the following. Alternatively, one aspect of the present invention is transparent The objective is to provide semiconductor devices using bright semiconductor films, etc. Alternatively, the objective is to provide a semiconductor device using a bright semiconductor film. The object of this embodiment is to provide a novel semiconductor device, etc. Alternatively, one embodiment of the present invention is The objective is to provide semiconductor devices and the like that have excellent properties. The description above does not preclude the existence of other problems. Furthermore, one aspect of the present invention addresses these problems. It is not necessary to solve all of the problems. Any other problems should be addressed in the specification, drawings, This will become clear from the description in the claims, etc., and the description in the specification, drawings, claims, etc. From this data, it is possible to extract other issues besides those listed. [Means for solving the problem]

[0008] One aspect of the present invention is a gate electrode formed on a substrate, a gate insulating film covering the gate electrode, It has a multilayer film that overlaps with the gate electrode via a gate insulating film, and a pair of electrodes in contact with the multilayer film. A transistor, a first oxide insulating film covering the transistor, and the first oxide insulating film A semiconductor device comprising a second oxide insulating film formed on top of a multilayer film, wherein the multilayer film is an oxide insulating film The device has a conductive film and an oxide film containing In or Ga, and the first oxide insulating film is permeable to oxygen. The first oxide insulating film is composed of more oxygen than satisfactorily satisfying the stoichiometric composition of the second oxide insulating film. It is an oxide insulating film containing a lot of oxygen, and the transistor was subjected to bias temperature stress testing. The threshold voltage does not fluctuate, or fluctuates in the positive or negative direction. It has a voltage fluctuation of 1.0V or less, preferably 0.5V, in either the negative or positive direction. The following characteristics apply:

[0009] Furthermore, the oxide semiconductor film preferably contains In or Ga.

[0010] Furthermore, the energy level at the lower end of the conduction band of an oxide film containing In or Ga is... It is closer to the vacuum level than the energy level at the lower end of the conduction band of the conductive film. Furthermore, In or Energy levels at the lower end of the conduction band of an oxide film containing Ga, and the energy levels at the lower end of the conduction band of an oxide semiconductor film. The difference from the energy level is preferably 0.05 eV or more and 2 eV or less. The energy difference between the vacant level and the lower edge of the conduction band is also called electron affinity, and therefore contains In or Ga. The electron affinity of oxide films is smaller than that of oxide semiconductor films, with a difference of 0.05e. It is preferable that the value is between V and 2eV.

[0011] Furthermore, oxide semiconductor films and oxide films containing In or Ga are In-M-Zn oxides. The film (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) is an oxide. Compared to semiconductor films, oxide films containing In or Ga have a larger atomic ratio of M. It is preferable.

[0012] Furthermore, in multilayer films, the constant photocurrent measurement method (CPM: Constant Photoc The absorption coefficient derived by the (original method) is 1 × 10 -3 Less than / cm It is preferable.

[0013] Furthermore, the silicon concentration between the oxide semiconductor film and the oxide film containing In or Ga. And the carbon concentration is 2 × 10 18 atoms / cm 3 It is preferable that it be less than [a certain value].

[0014] Furthermore, in one aspect of the present invention, a gate electrode and a gate insulating film are formed, and on the gate insulating film, A multilayer film is formed having an oxide semiconductor film and an oxide film containing In or Ga, and the multilayer film A pair of contacting electrodes is formed, and a first oxide insulating film is formed on the multilayer film and the pair of electrodes. This is a method for fabricating a semiconductor device in which a second oxide insulating film is formed on a first oxide insulating film. The substrate placed in the ventilated processing chamber is kept at a temperature between 180°C and 400°C, and the processing chamber is then... The raw material gas is introduced to maintain a pressure of 20 Pa to 250 Pa inside the processing chamber. A first oxide insulating film is formed by supplying high-frequency power to electrodes provided therein. Furthermore, the substrate placed in the evacuated processing chamber is maintained at a temperature between 180°C and 260°C. The raw material gas is introduced into the processing chamber, and the pressure inside the processing chamber is set to between 100 Pa and 250 Pa. , 0.17 W / cm² is applied to the electrode installed in the processing chamber. 2 More than 0.5W / cm 2 The following high-frequency electric By supplying force, a second oxide insulating film is formed. [Effects of the Invention]

[0015] According to one aspect of the present invention, in a semiconductor device using an oxide semiconductor film, the oxide semiconductor film The defects can be reduced. Alternatively, according to one aspect of the present invention, an oxide semiconductor film can be used In a semiconductor device, the electrical characteristics can be improved. Or, in one aspect of the present invention This makes it possible to improve the reliability of semiconductor devices using oxide semiconductor films. Alternatively, according to one aspect of the present invention, a semiconductor device with low off-current can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device with low power consumption can be provided. Alternatively, according to one aspect of the present invention, a display device capable of reducing eye strain is provided. It can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device using a transparent semiconductor film can be provided. It can provide a place, etc. Alternatively, according to one aspect of the present invention, a novel semiconductor device, etc. It is possible to provide a semiconductor device having excellent properties according to one aspect of the present invention. We can provide things like storage. [Brief explanation of the drawing]

[0016] [Figure 1] This diagram shows a top view and a cross-sectional view illustrating one form of a transistor, as well as a diagram illustrating its Vg-Id characteristics. [Figure 2] This is a diagram illustrating the band structure of a transistor. [Figure 3] This is a cross-sectional view illustrating one form of transistor. [Figure 4] This is a cross-sectional view illustrating one method for fabricating transistors. [Figure 5] This is a cross-sectional view illustrating one form of transistor. [Figure 6] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 7] This is a diagram illustrating the band structure of a transistor. [Figure 8] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 9] This is a cross-sectional view illustrating one method for fabricating transistors. [Figure 10] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 11] This is a cross-sectional view illustrating one method for fabricating transistors. [Figure 12] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 13] This is a cross-sectional view illustrating one form of transistor. [Figure 14] This is a top view illustrating one form of a semiconductor device. [Figure 15] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 16]This is a top view illustrating one form of a semiconductor device. [Figure 17] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 18] This figure shows an example of the connection structure for the common electrodes of a display device, and another figure showing an example of the connection structure for the wiring of a display device. [Figure 19] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 20] This is a top view illustrating one form of a semiconductor device. [Figure 21] These are a top view and a cross-sectional view illustrating one form of a semiconductor device. [Figure 22] These are exploded perspective and top views showing an example of a touch sensor configuration. [Figure 23] These are cross-sectional and circuit diagrams showing examples of touch sensor configurations. [Figure 24] This is a block diagram showing an example of the configuration of a liquid crystal display device. [Figure 25] This is a timing chart illustrating one example of a method for driving a liquid crystal display device. [Figure 26] This figure illustrates an electronic device using a semiconductor device, which is one aspect of the present invention. [Figure 27] This figure illustrates an electronic device using a semiconductor device, which is one aspect of the present invention. [Figure 28] This is a diagram showing the Vg-Id characteristics of a transistor. [Figure 29] This figure shows the change in the threshold voltage of a transistor after a photo-BT stress test. [Figure 30] This figure shows the Vg-Id characteristics before and after the BT stress test. [Figure 31] This figure shows the threshold voltage fluctuation (ΔVth). [Figure 32] This figure shows the threshold voltage fluctuation (ΔVth). [Figure 33] This figure shows the results of the TDS measurement. [Figure 34] This figure shows the results of the TDS measurement. [Figure 35]This diagram illustrates the measurement results of ESR. [Figure 36] This diagram illustrates the measurement results of ESR. [Figure 37] This figure shows the CPM measurement results of the multilayer film contained in the transistor. [Figure 38] This figure shows the ToF-SIMS results for the multilayer film contained in a transistor. [Figure 39] This is a diagram illustrating the structure used in the calculation of the band structure. [Figure 40] This is a diagram illustrating the calculation results of the band structure. [Figure 41] This is a schematic diagram of an oxide semiconductor film and a diagram illustrating the band structure in an oxide semiconductor film. [Figure 42] This is a diagram illustrating the calculation results of the band structure. [Figure 43] This figure shows the change in energy barrier with respect to changes in channel length. [Figure 44] This is a schematic diagram of a display device. [Figure 45] This figure shows the measurement results of the current flowing through the transistor. [Figure 46] This figure shows the measurement results of the current flowing through the transistor. [Figure 47] This is a photograph showing the display result of a display device. [Figure 48] This figure shows the measurement results of the current flowing through the transistor. [Figure 49] This figure shows the measurement results of the current flowing through the transistor. [Figure 50] This figure shows the measurement results of the current flowing through the transistor. [Figure 51] This figure shows the measurement results of the current flowing through the transistor. [Figure 52] This figure shows the results of a transistor current stress test. [Figure 53] This figure shows the SIMS measurement results for the sample. [Figure 54] This figure shows the SIMS measurement results for the sample. [Modes for carrying out the invention]

[0017] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention The present invention is not limited to the following description, and its form and scope may not depart from the spirit and scope of the present invention. Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention The following embodiments and examples are not to be interpreted as being limited to their descriptions. In the embodiments and examples described below, parts that are the same or have similar functions In some cases, the same reference numeral or hatch pattern is used in common across different drawings, and the repetition of this pattern is used. I will omit the explanation of the counter-argument.

[0018] In each figure described herein, the size, film thickness, or region of each component is as follows: It may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. stomach.

[0019] Furthermore, the terms "first," "second," "third," etc. used in this specification are used to avoid confusion of constituent elements. This is a selection and not a numerical limit. Therefore, for example, "the first" This can be explained by substituting "the second" or "the third" as appropriate.

[0020] Furthermore, the functions of "source" and "drain" are used in situations where the direction of current changes during circuit operation. In this specification, "sauce" and "dressing" may be used interchangeably. The term "in" may be used interchangeably.

[0021] Furthermore, voltage refers to the potential difference between two points, while electric potential refers to the electrostatic field at a given point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge within a given object. Furthermore, generally speaking, the potential difference between the potential at a certain point and a reference potential (for example, the ground potential) This is simply called electric potential or voltage, and the terms electric potential and voltage are often used as synonyms. Therefore, unless otherwise specified in this specification, potential may be read as voltage. You may substitute "voltage" with "potential."

[0022] In this specification, when an etching process is performed after a photolithography process: The mask formed during the photolithography process shall be removed.

[0023] (Embodiment 1) In this embodiment, drawings illustrate a semiconductor device and a method for manufacturing the same, which are aspects of the present invention. I will explain by referring to it.

[0024] In transistors using oxide semiconductor films, this can lead to defects in the transistor's electrical characteristics. One example of a defect is oxygen deficiency. For example, oxide semiconductors containing oxygen deficiencies in the film. Transistors using membranes tend to have a threshold voltage that fluctuates in the negative direction, normally It tends to exhibit ON characteristics. This is because an electric charge is generated due to oxygen vacancies contained in the oxide semiconductor film. This is to reduce resistance. When a transistor has normally-on characteristics, Various problems can arise, such as increased likelihood of malfunctions or higher power consumption when not in use. This occurs. Also, the electrical characteristics of the transistor, typically, can change over time or through stress testing. There is a problem in that the amount of fluctuation in the threshold voltage increases.

[0025] One of the causes of oxygen deficiency is damage that occurs during the transistor manufacturing process. For example, when forming an insulating film on an oxide semiconductor film by plasma CVD, Depending on the conditions, the oxide semiconductor film may be damaged.

[0026] Furthermore, impurities such as silicon and carbon, which are constituent elements of insulating films, are not limited to oxygen vacancies. This causes poor electrical properties in the transistor. Therefore, the impurity is mixed into the oxide semiconductor film. As a result, the oxide semiconductor film becomes less resistive, which affects its performance over time and in stress tests. This leads to a problem where the electrical characteristics of the transistor, particularly the fluctuation in the threshold voltage, increase. There is.

[0027] Therefore, in this embodiment, a semiconductor device comprising a transistor having an oxide semiconductor film is provided. In this context, oxygen vacancies in an oxide semiconductor film having a channel region, and defects in an oxide semiconductor film The challenge is to reduce the concentration of pure substances.

[0028] Figures 1(A) to 1(C) show a top view and a cross-section of the transistor 50 of the semiconductor device. The diagrams are shown. Figure 1(A) is a top view of transistor 50, and Figure 1(B) is a top view of Figure 1(A). Figure 1(C) is a cross-sectional view between the dashed lines A and B, and Figure 1(A) is a cross-sectional view between the dashed lines C and D in Figure 1(A). This is a diagram. Note that in Figure 1(A), for clarity, the substrate 11, gate insulating film 17, and oxide are shown. Insulating film 23, oxide insulating film 24, nitride insulating film 25, etc. have been omitted.

[0029] The transistor 50 shown in Figures 1(B) and 1(C) is a gate provided on the substrate 11. It has an electrode 15. In addition, a gate insulating film 17 is formed on the substrate 11 and the gate electrode 15. Then, through the gate insulating film 17, the multilayer film 20 overlapping with the gate electrode 15 and the multilayer film 20 are in contact It has a pair of electrodes 21 and 22. It also has a gate insulating film 17, a multilayer film 20, and a pair On electrodes 21 and 22 are oxide insulating film 23, oxide insulating film 24, and nitride insulating film 25 A protective film 26 composed of the above is formed.

[0030] In the transistor 50 shown in this embodiment, the multilayer film 20 is an oxide semiconductor film 18, It has an oxide film 19 containing In or Ga. In addition, a part of the oxide semiconductor film 18 is cha It functions as a Nell region. In addition, an oxide insulating film 23 is formed so as to be in contact with the multilayer film 20. The oxide insulating film 24 is formed so as to be in contact with the oxide insulating film 23. That is, Between the oxide semiconductor film 18 and the oxide insulating film 23, there is an oxide film 19 containing In or Ga. A system is in place.

[0031] The oxide semiconductor film 18 is typically an In-Ga oxide film, an In-Zn oxide film, or an In -M-Zn oxide film (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf ) exists.

[0032] Furthermore, when the oxide semiconductor film 18 is an In-M-Zn oxide film, the atomic ratio of In and M Preferably, the ratio is In 25 atomic% or more, M less than 75 atomic%, and further Preferably, In is 34 atomic% or more and M is less than 66 atomic%.

[0033] The oxide semiconductor film 18 has an energy gap of 2 eV or more, preferably 2.5 eV or more. More preferably, it is 3 eV or more. Thus, oxide semiconductors with a wide energy gap By using this method, the off-current of transistor 50 can be reduced.

[0034] The thickness of the oxide semiconductor film 18 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 10 The wavelength should be 0 nm or less, and more preferably 3 nm to 50 nm.

[0035] The oxide film 19 containing In or Ga is typically In-Ga oxide or In-Zn oxide. Oxide film, In-M-Zn oxide film (where M is Al, Ti, Ga, Y, Zr, La, Ce, N) d or Hf) and the energy at the lower end of the conduction band is lower than that of the oxide semiconductor film 18. Near the energy level, typically the lower end of the conduction band of an oxide film 19 containing In or Ga. The difference between the energy of ghee and the energy of the lower end of the conduction band of the oxide semiconductor film 18 is 0.05 eV or more. 0.07 eV or higher, 0.1 eV or higher, or 0.15 eV or higher and 2 eV or less, 1 eV The following are examples of acids with an energy level of 0.5 eV or less, or 0.4 eV or less. That is, acids containing In or Ga. The difference between the electron affinity of the oxide film 19 and the electron affinity of the oxide semiconductor film 18 is 0.05 eV or less. Above, 0.07 eV or higher, 0.1 eV or higher, or 0.15 eV or higher and 2 eV or lower, 1 It is less than or equal to eV, less than or equal to 0.5 eV, or less than or equal to 0.4 eV.

[0036] When the oxide film 19 containing In or Ga is an In-M-Zn oxide film, In and M The atomic ratio is preferably less than 50 atomic% for In and 50 atomic% for M. More preferably, In is less than 25 atomic%, and M is 75 atomic% or more. Let's assume that.

[0037] Furthermore, the oxide semiconductor film 18 and the oxide film 19 containing In or Ga are In-MZ In the case of an oxide film (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), Compared to the oxide semiconductor film 18, the M(A) contained in the oxide film 19 containing In or Ga The atomic ratio of l, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf is large and representative. In terms of the atoms contained in the oxide semiconductor film 18, the amount is preferably 1.5 times or more, compared to the above atoms. The atomic ratio is at least twice, and more preferably at least three times higher.

[0038] Furthermore, the oxide semiconductor film 18 and the oxide film 19 containing In or Ga are In-MZ In the case of an oxide film (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), An oxide film 19 containing In or Ga is formed in In:M:Zn=x1:y1:z1 [atomic ratio] If the oxide semiconductor film 18 is In:M:Zn=x2:y2:z2 [atomic ratio], then y1 / x1 is greater than y2 / x2, preferably y1 / x1 is 1.5 times y2 / x2 That is all. More preferably, y1 / x1 is at least twice as large as y2 / x2, and even more preferably In this case, y1 / x1 is more than three times larger than y2 / x2. In this case, if y2 is greater than or equal to x2, the transistor using the oxide semiconductor film is stable. It is preferable because it can impart electrical properties. However, if y2 becomes 3 times or more than x2, the oxidation Because the field-effect mobility of the transistor using a solid semiconductor film decreases, y2 is x2 A ratio of less than 3 times is preferable.

[0039] The oxide semiconductor film 18 is an In-M-Zn oxide film (where M is Al, Ti, Ga, Y, Zr, L). In the case of a, Ce, Nd or Hf, the s used to form the In-M-Zn oxide film The atomic ratio of the metal elements in the puttering target should preferably satisfy In≧M and Zn≧M. It seems so. As for the atomic ratio of metal elements in such a sputtering target, In:M: Zn=1:1:1 and In:M:Zn=3:1:2 are preferred. Also, In or Ga The included oxide film 19 is an In-M-Zn oxide film (where M is Al, Ti, Ga, Y, Zr, La, In the case of Ce, Nd, or Hf, the spatula used to form the In-M-Zn oxide film The atomic ratio of metal elements in the taring target is M>In, Zn>0.5×M, and furthermore, Zn It is preferable that the M condition is met. The number of atoms of the metal element in such a sputtering target. In terms of ratio, In:Ga:Zn = 1:3:2, In:Ga:Zn = 1:3:4, In:Ga :Zn=1:3:5, In:Ga:Zn=1:3:6, In:Ga:Zn=1:3:7, In:Ga:Zn=1:3:8, In:Ga:Zn=1:3:9, In:Ga:Zn=1 :3:10, In:Ga:Zn=1:6:4, In:Ga:Zn=1:6:5, In:G a:Zn=1:6:6, In:Ga:Zn=1:6:7, In:Ga:Zn=1:6:8 In:Ga:Zn = 1:6:9 and In:Ga:Zn = 1:6:10 are preferred. The oxide semiconductor film 18 and In formed using the above sputtering target The atomic ratios of the metal elements contained in the Ga oxide film 19 are as follows, with the above S as an error. A variation of plus or minus 20% in the atomic ratio of metal elements contained in the puttering target. include.

[0040] The oxide semiconductor film 18 and the oxide film 19 containing In or Ga have a low carrier density. An oxide semiconductor film is used. For example, an oxide semiconductor film 18 and containing In or Ga. The oxide film 19 has a carrier density of 1 × 10⁻⁶ 17 pieces / cm 3Hereinafter, preferably 1×10 15 pieces / cm 3 Hereinafter, more preferably 1×10 13 pieces / cm 3 Hereinafter, even more preferably 1×1 0 11 pieces / cm 3 or less of an oxide semiconductor film is used.

[0041] Note that it is not limited to these, and those with an appropriate composition may be used according to the semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the required transistor. Also, in order to obtain the semiconductor characteristics of the required transistor, it is preferable to make the carrier density, impurity concentration, defect density, atomic number ratio of metal element to oxygen, interatomic distance, density, etc. of the oxide semiconductor film 18 appropriate. This is preferable.

[0042] The oxide film 19 containing In or Ga also functions as a damage relaxation film for the oxide semiconductor film 18 when forming the oxide insulating film 24 formed later.

[0043] The thickness of the oxide film 19 containing In or Ga is 3 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less.

[0044] In the oxide semiconductor film 18, if silicon or carbon, which is one of the Group 14 elements, is contained, oxygen deficiency increases in the oxide semiconductor film 18 and it becomes n-type. Therefore, the concentration of silicon or carbon in the oxide semiconductor film 18, or the concentration of silicon or carbon near the interface between the oxide film 1 9 containing In or Ga and the oxide semiconductor film 18 is 2×10 18 ato ms / cm 3 Hereinafter, preferably 2×10 17 atoms / cm 3 or less.

[0045] Furthermore, the crystal structure of the oxide semiconductor film 18 and the oxide film 19 containing In or Ga is These can be amorphous, single-crystal, polycrystalline, or CAAC-OS (C Ax) as described later. is Aligned Crystalline Oxide Semiconductor or) may also be used. Note that the crystal structure of at least the oxide semiconductor film 18 is CAAC-O By using S, the amount of variation in electrical properties due to irradiation with visible light and ultraviolet light can be further reduced. It is possible.

[0046] Furthermore, in the transistor 50 shown in this embodiment, acid is applied so as to be in contact with the multilayer film 20. An oxide insulating film 23 is formed, and an oxide insulating film 24 is formed in contact with the oxide insulating film 23. It is being done.

[0047] The oxide insulating film 23 is an oxide insulating film that permeates oxygen. As a damage mitigation film for the multilayer film 20 when forming the oxide insulating film 24 which will be formed later It also works.

[0048] The oxide insulating film 23 has a thickness of 5 nm or more and 150 nm or less, preferably 5 nm or more. Silicon oxide films, silicon oxide nitride films, etc., with a wavelength of 50 nm or less can be used. In the specification, a silicon oxidizride film is defined as having a composition in which the oxygen content is greater than the nitrogen content. It refers to a film with a high nitrogen content, and silicon nitride film, in terms of its composition, has a nitrogen content that is higher than oxygen content. It refers to a large amount of membrane.

[0049] Furthermore, the oxide insulating film 23 preferably has a low defect count, and typically, ESR measurement... This results in the spin of the signal appearing at g=2.001, which originates from the silicon dangling bond. Density is 3 × 1017 spins / cm 3 The following is preferable. This is an oxide insulation. If the defect density in the film 23 is high, oxygen will bind to the defects, and the oxide insulating film 2 This is because the amount of oxygen permeable in point 3 decreases.

[0050] Furthermore, it is preferable that the number of defects at the interface between the oxide insulating film 23 and the multilayer film 20 is small. Typically, ESR measurements reveal a defect originating from the multilayer film 20, appearing as a defect in g=1.93. The spin density of the number is 1 × 10⁻⁶ 17 spins / cm 3 The following, and furthermore, are below the detection limit. This is preferable.

[0051] Furthermore, in the oxide insulating film 23, all of the oxygen that enters the oxide insulating film 23 from the outside is acid Some oxygen remains in the oxide insulating film 23 without moving to the outside of the oxide insulating film 23. As oxygen enters the material insulating film 23, the oxygen contained in the oxide insulating film 23 Movement to the outside may also cause oxygen to move within the oxide insulating film 23.

[0052] When an oxide insulating film that permeates oxygen is formed as the oxide insulating film 23, the oxide insulating film 23 The oxygen that desorbs from the oxide insulating film 24 provided above is oxidized via the oxide insulating film 23. It can be moved to the semiconductor film 18.

[0053] The oxide insulating film 24 is formed so as to be in contact with the oxide insulating film 23. 4 is an oxide insulating film containing more oxygen than satisfies the stoichiometric composition. In oxide insulating films containing more oxygen than that satisfying the theoretical composition, some of the oxygen is released upon heating. Desorption occurs. Oxide insulating films containing more oxygen than satisfactorily satisfying the stoichiometric composition are TDS Analysis revealed that the amount of oxygen removed, converted to oxygen atoms, was 1.0 × 10⁻⁶. 18 atoms / cm 3 Below Preferably 3.0 × 10 20 atoms / cm 3 The above describes the oxide insulating film.

[0054] The oxide insulating film 24 has a thickness of 30 nm to 500 nm, preferably 50 nm. Silicon oxide films, silicon oxide nitride films, etc., with a wavelength of 400 nm or less can be used.

[0055] Furthermore, the oxide insulating film 24 preferably has a low defect count, and typically, ESR measurement... This results in the spin of the signal appearing at g=2.001, which originates from the silicon dangling bond. Density is 1.5 × 10 18 spins / cm 3 Less than, and even 1 x 10 18 spins / cm 3 The following is preferable. Note that the oxide insulating film 24 is compared with the oxide insulating film 23. Because it is far from the multilayer film 20, it can have a higher defect density than the oxide insulating film 23.

[0056] Here, regarding the band structure in the dashed-dotted line EF near the multilayer film 20 in Figure 1(B), This will be explained using Figure 2(A), and the carrier flow in transistor 50 will be shown in Figure 2( This will be explained using B) and Figure 2(C).

[0057] In the band structure shown in Figure 2(A), for example, the energy of the oxide semiconductor film 18 In-Ga-Zn oxide with a gap of 3.15 eV (sputtering machine used for film deposition) The atomic ratio of the GET is In:Ga:Zn = 1:1:1, and it contains either In or Ga. As oxide film 19, an In-Ga-Zn oxide (component) with an energy gap of 3.5 eV The atomic ratio of the sputtering target used for the film was In:Ga:Zn = 1:3:2. It is. Furthermore, the energy gap can be measured using a spectroscopic ellipsometer. .

[0058] Vacuum levels and valence band of oxide semiconductor film 18 and oxide film 19 containing In or Ga The energy difference at the upper end (also called the ionization potential) is 7.9 eV, and It is 8.0 eV. Note that the energy difference between the vacuum level and the upper end of the valence band is measured using ultraviolet photoelectron spectroscopy. Analysis(UPS:Ultraviolet Photoelectron Spectro Measurement can be performed using a scopy device (PHI VersaProbe).

[0059] The vacuum level and conduction band of the oxide semiconductor film 18 and the oxide film 19 containing In or Ga. The energy differences at the ends (also called electron affinity) are 4.7 eV and 4.5 eV, respectively. be.

[0060] Furthermore, the lower end of the conduction band of the oxide semiconductor film 18 is defined as Ec_18, and it contains In or Ga. Let Ec_19 be the lower end of the conduction band of the oxide film 19. Also, the lower end of the conduction band of the gate insulating film 17 Let the edge be Ec_17, and the lower end of the conduction band of the oxide insulating film 23 be Ec_23.

[0061] As shown in Figure 2(A), in the multilayer film 20, the oxide semiconductor film 18 and In or G The lower end of the conduction band near the interface with the oxide film 19 containing a is continuously changing. , barrier near the interface between the oxide semiconductor film 18 and the oxide film 19 containing In or Ga The change is gradual and disappears. Oxide semiconductor film 18 and oxide containing In or Ga This shape is formed by the mutual movement of oxygen between the films 19. Also, in the multilayer film 20 In this region, the energy at the lower end of the conduction band in the oxide semiconductor film 18 is the lowest, and this region This becomes the channel region.

[0062] Here, in a transistor, the flow of electrons, which are carriers, is shown in Figure 2(B This will be explained using Figure 2(B) and Figure 2(C). Note that in Figures 2(B) and 2(C), oxides The amount of electrons flowing through the semiconductor film 18 is represented by the size of the dashed arrow.

[0063] Near the interface between the oxide film 19 containing In or Ga and the oxide insulating film 23, A trap level 27 is formed by pure material and defects. For example, as shown in Figure 2(B) As shown above, when the channel region of the transistor is a single layer of oxide semiconductor film 18, In the semiconductor film 18, the electrons, which are carriers, mainly flow on the gate insulating film 17 side. A small amount also flows on the oxide insulating film 23 side. As a result, electricity flows through the oxide semiconductor film 18. Some of the offspring get caught in trap level 27.

[0064] On the other hand, the transistor 50 shown in this embodiment is an oxide semiconductor as shown in Figure 2(C). An oxide film 19 containing In or Ga is provided between the body film 18 and the oxide insulating film 23. Therefore, there is a gap between the oxide semiconductor film 18 and the trap level 27. As a result, acid Electrons flowing through the semiconductor film 18 are less likely to be trapped at the trap level 27. When a child electron is captured, that electron becomes a negative fixed charge. As a result, the transient The threshold voltage of the trap level fluctuates. However, the oxide semiconductor film 18 and the trap level Because there is a gap between it and level 27, it reduces electron trapping at trap level 27. This is possible, and it can reduce fluctuations in the threshold voltage.

[0065] Furthermore, near the interface between the oxide semiconductor film 18 and the oxide film 19 containing In or Ga When the energy difference ΔE1 at the lower end of the conduction band is small, the carriers flowing through the oxide semiconductor film 18 It crosses the lower end of the conduction band of the oxide film 19 containing In or Ga and reaches the trap level 27. It gets captured. Therefore, the lower end Ec_18 of the conduction band of the oxide semiconductor film 18 and In The energy difference ΔE1 between the lower end Ec_19 of the conduction band of the Ga-containing oxide film 19 and the film is 0. It is preferable that the voltage be 1 eV or higher, preferably 0.15 eV or higher.

[0066] Furthermore, the back channel of the multilayer film 20 (in the multilayer film 20, the opposite of the gate electrode 15) On the side opposite to the surface, through the oxygen-permeable oxide insulating film 23, the stoichiometric composition is satisfied. An oxide insulating film 24 (see Figure 1(B)) containing more oxygen than the amount of oxygen is provided. Therefore, the oxide insulating film 24 contains more oxygen than satisfies the stoichiometric composition. By transferring the contained oxygen to the oxide semiconductor film 18 contained in the multilayer film 20, the acid This can reduce oxygen vacancies in the ionized semiconductor film 18.

[0067] Based on the above, the oxide semiconductor film 18 and the oxide film 19 containing In or Ga are present. A multilayer film 20 is formed, and an oxygen-permeable oxide insulating film 23 is placed on the multilayer film 20. By having an oxide insulating film 24 containing more oxygen than satisfactorily satisfying the stoichiometric composition, It is possible to reduce oxygen vacancies in the multilayer film 20. Also, the oxide semiconductor film 18 and By providing an oxide film 19 containing In or Ga between the oxide insulating films 23, The boundary between the conductive film 18, or the oxide film 19 containing In or Ga, and the oxide semiconductor film 18. The concentration of silicon and carbon near the surface can be reduced. As a result, the multilayer film 2 At 0, the absorption coefficient derived by the constant photocurrent measurement method is 1 × 10⁻⁶ -3 Less than / cm, preferred Or 1 x 10 -4 The absorption coefficient is less than / cm. The absorption coefficient is due to oxygen deficiency and the presence of impurities. Because there is a positive correlation with the energy corresponding to the localized level (converted by wavelength), the multilayer film 20 The localized level density is extremely low.

[0068] Furthermore, the absorption coefficient curve obtained by CPM measurement shows that the arbor originating from the band's tail is By removing the absorption coefficient component called the bucktail, the absorption coefficient due to the localized level can be expressed by the following equation. It can be calculated from this. Note that the ar-back tail is obtained by CPM measurement. This refers to a region in the absorption coefficient curve that has a constant slope, and this slope is called the ARBAC energy. It's called ghee.

[0069]

number

[0070] Here, α(E) represents the absorption coefficient at each energy, α u is, Arbackte This represents the absorption coefficient due to the ruth.

[0071] A transistor 50 having such a structure is made of a multilayer film 20 including an oxide semiconductor film 18. Because it has very few defects, it is possible to improve the electrical characteristics of transistors. Furthermore, the BT stress test and the photo-BT stress test, which are examples of stress tests, The positive voltage does not fluctuate, or the fluctuation in the negative or positive direction is 1.0V or less. Preferably, the voltage is 0.5V or less, which provides high reliability.

[0072] Here, the threshold voltage fluctuation in the BT stress test and the photo-BT stress test is small. The electrical characteristics of a transistor are explained using Figure 1(D).

[0073] BT stress testing is a type of accelerated testing that tests the effects of long-term use on transistors. It is possible to evaluate changes in its characteristics (i.e., changes over time) in a short period of time. In particular, BT stress The change in the transistor's threshold voltage before and after testing is an important factor in determining reliability. This serves as an indicator. The smaller the fluctuation in threshold voltage before and after the BT stress test, the more reliable the result. It can be said that this is a transistor with high performance.

[0074] Next, we will explain the specific BT stress test method. First, the initial transistor The period characteristics are measured. Next, the temperature of the substrate on which the transistor is formed (substrate temperature) is kept constant. Maintain the pair of electrodes, which function as the source and drain of the transistor, at the same potential. A pair of electrodes, functioning as source and drain, are imprinted at a different potential on the gate electrode for a certain period of time. Add. The substrate temperature should be set appropriately according to the purpose of the test. Next, set the substrate temperature to the initial temperature. The temperature was set to the same temperature as when the properties were measured, and the electrical characteristics of the transistor were measured. As a result, the initial The difference between the threshold voltage in the period characteristics and the threshold voltage after the BT stress test is the threshold voltage. It can be obtained as a voltage fluctuation.

[0075] Note that if the potential applied to the gate electrode is higher than the potentials of the source and drain, it is considered positive. This is called a BT stress test, where the potential applied to the gate electrode is greater than the potentials of the source and drain. A low level is called a negative BT stress test. Additionally, a BT stress test can be performed while irradiating with light. The process of performing this test is called a photo-BT stress test. Light is irradiated, and a potential is applied to the gate electrode. When the potential is higher than the potential of the source and drain, it is called a light-plus BT stress test, and when light shines... When light is emitted and the potential applied to the gate electrode is lower than the potentials of the source and drain, it is called light. This is called a negative BT stress test.

[0076] The test intensity of the BT stress test is determined by the substrate temperature, the electric field strength applied to the gate insulating film, and This can be determined by the electric field application time. The electric field strength applied to the gate insulating film is the gate It is determined by dividing the potential difference between the source and drain by the thickness of the gate insulating film. If you want to apply an electric field strength of 3 MV / cm to a gate insulating film with a thickness of 100 nm, The potential difference between the gate and the source and drain should be 30V.

[0077] Figure 1(D) shows the electrical characteristics of a transistor, with the horizontal axis representing the gate voltage (Vg) and the vertical axis representing the gate voltage (Vg). The axis represents the drain current (Id). The initial characteristics of the transistor are shown by the dashed line 41, and the BT stroke The electrical characteristics after the test are shown by the solid line 43. The transistor shown in this embodiment is shown by the dashed line 41. And the threshold voltage fluctuation amount in solid line 43 is 0V, or in the negative or positive direction. The amount of variation in the direction is 1.0V or less, preferably 0.5V or less. Therefore, the form of this embodiment The transistor shown exhibits little fluctuation in threshold voltage after BT stress testing. Therefore, it can be seen that the transistor 50 shown in this embodiment is highly reliable.

[0078] Furthermore, since transistors having an oxide semiconductor film are n-channel type transistors, In this specification, when the gate voltage is 0V, it is assumed that no drain current is flowing. A transistor capable of this is defined as a transistor with normally-off characteristics. Furthermore, A transistor in which drain current can be considered to be flowing when the gate voltage is 0V. This is defined as a transistor with normally-on characteristics.

[0079] Furthermore, in this specification, the threshold voltage (Vth) is defined as the gate voltage (Vg[V]) in parallel. The square root of the axis and drain current (Id 1 / 2 [A]) is plotted on the vertical axis (see diagram) In (zu), the maximum slope is Id 1 / 2 When the tangent line is extrapolated, the intersection of the tangent line and the Vg axis. It is defined by the gate voltage at a point.

[0080] The following describes the other configurations of transistor 50.

[0081] There are no major restrictions on the material of the substrate 11, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, saffron A wire substrate or the like may be used as the substrate 11. Alternatively, a simple silicon or silicon carbide may be used. Crystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SO It is also possible to apply substrates such as I, and semiconductor elements are provided on these substrates. It may also be used as substrate 11.

[0082] Furthermore, a flexible substrate is used as the substrate 11, and the transistor 50 is directly mounted on the flexible substrate. It may be formed. Alternatively, a release layer may be provided between the substrate 11 and the transistor 50. The abscission layer separates from the substrate 11 after partially or completely completing the semiconductor device on it, and It can be used to transfer the image onto a substrate. In this case, the transistor 50 is a substrate with poor heat resistance. It can also be transferred to boards and flexible substrates.

[0083] The gate electrode 15 is made of aluminum, chromium, copper, tantalum, titanium, molybdenum, and tan. A metal element selected from gusten, or an alloy containing the aforementioned metal elements, or the aforementioned It can be formed using alloys that combine metallic elements. Also, manganese, zirconium, etc. A metallic element selected from one or more of the nium species may be used. Also, the gate electric element Pole 15 may be a single-layer structure or a multi-layer structure of two or more layers. For example, a silicon-containing Single-layer structure of aluminum film, double-layer structure of titanium film laminated on aluminum film, titanium nitride A two-layer structure in which a titanium film is laminated on a film, and a two-layer structure in which a tungsten film is laminated on a titanium nitride film. A two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film. A titanium film is formed, then an aluminum film is laminated on top of the titanium film, and then another titanium film is formed on top of that. There are also three-layer structures, etc. Furthermore, aluminum is combined with titanium, tantalum, tungsten, and molybdenum. alloys made by combining one or more selected from butene, chromium, neodymium, and scandium. A film or nitride film may be used.

[0084] Further, the gate electrode 15 can also be applied with a conductive material having translucency, such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide, etc. Also, it can be a laminated structure of the above-mentioned conductive material having translucency and the above-mentioned metal element. Also, an In-Ga-Zn-based oxynitride semiconductor film, an In-Sn-based oxynitride semiconductor film, an In-Ga-based oxynitride semiconductor film, an In-Zn-based oxynitride semiconductor film, a Sn-based oxynitride semiconductor film, an In-based oxynitride semiconductor film, a metal nitride film (InN, ZnN, etc.), etc. may be provided between the gate electrode 15 and the gate insulating film 17. Since these films have a work function of 5 eV or more, preferably 5.5 eV or more, and a value larger than the electron affinity of the oxide semiconductor, the threshold voltage of the transistor using the oxide semiconductor can be shifted to the positive, and a so-called normally-off characteristic switching element can be realized. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration of at least higher than that of the oxide semiconductor film 18, specifically 7 atomic% or more, is used. Also, it can be a laminated structure of the above-mentioned conductive material having translucency and the above-mentioned metal element.

[0085] Also, between the gate electrode 15 and the gate insulating film 17, an In-Ga-Zn-based oxynitride semiconductor film, an In-Sn-based oxynitride semiconductor film, an In-Ga-based oxynitride semiconductor film, an In-Zn-based oxynitride semiconductor film, a Sn-based oxynitride semiconductor film, an In-based oxynitride semiconductor film, a metal nitride film (InN, ZnN, etc.), etc. may be provided. These films have a work function of 5 eV or more, preferably 5.5 eV or more, and a value larger than the electron affinity of the oxide semiconductor, so the threshold voltage of the transistor using the oxide semiconductor can be shifted to the positive, and a so-called normally-off characteristic switching element can be realized. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration of at least higher than that of the oxide semiconductor film 18, specifically 7 atomic% or more, is used. Since these films have a work function of 5 eV or more, preferably 5.5 eV or more, and a value larger than the electron affinity of the oxide semiconductor, the threshold voltage of the transistor using the oxide semiconductor can be shifted to the positive, and a so-called normally-off characteristic switching element can be realized. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration of at least higher than that of the oxide semiconductor film 18, specifically 7 atomic% or more, is used. Since these films have a work function of 5 eV or more, preferably 5.5 eV or more, and a value larger than the electron affinity of the oxide semiconductor, the threshold voltage of the transistor using the oxide semiconductor can be shifted to the positive, and a so-called normally-off characteristic switching element can be realized. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration of at least higher than that of the oxide semiconductor film 18, specifically 7 atomic% or more, is used. Since these films have a work function of 5 eV or more, preferably 5.5 eV or more, and a value larger than the electron affinity of the oxide semiconductor, the threshold voltage of the transistor using the oxide semiconductor can be shifted to the positive, and a so-called normally-off characteristic switching element can be realized. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration of at least higher than that of the oxide semiconductor film 18, specifically 7 atomic% or more, is used. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration of at least higher than that of the oxide semiconductor film 18, specifically 7 atomic% or more, is used. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration of at least higher than that of the oxide semiconductor film 18, specifically 7 atomic% or more, is used. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration of at least higher than that of the oxide semiconductor film 18, specifically 7 atomic% or more, is used.

[0086] The gate insulating film 17 can be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxynitride, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or a Ga-Zn-based metal oxide, silicon nitride, etc., and can be provided in a laminated or single-layer form. Also, as shown in FIG. 3, the gate insulating film 17 can be a laminated structure of a gate insulating film 17a and a gate insulating film 17b. The gate insulating film 17 can be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxynitride, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or a Ga-Zn-based metal oxide, silicon nitride, etc., and can be provided in a laminated or single-layer form. Also, as shown in FIG. 3, the gate insulating film 17 can be a laminated structure of a gate insulating film 17a and a gate insulating film 17b. The gate insulating film 17 can be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxynitride, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or a Ga-Zn-based metal oxide, silicon nitride, etc., and can be provided in a laminated or single-layer form. Also, as shown in FIG. 3, the gate insulating film 17 can be a laminated structure of a gate insulating film 17a and a gate insulating film 17b. Also, as shown in FIG. 3, the gate insulating film 17 can be a laminated structure of a gate insulating film 17a and a gate insulating film 17b. As the gate insulating film 17b in contact with the multilayer film 20, an oxide insulating material from which oxygen is removed by heating is used. You may also use this. By using a film in which oxygen is desorbed by heating for the gate insulating film 17b, It is possible to lower the interface state density at the interface between the ionized semiconductor film 18 and the gate insulating film 17. This allows for the creation of transistors with minimal degradation of electrical characteristics. Furthermore, gate insulation is also available. As film 17a, an insulating film having a blocking effect on oxygen, hydrogen, water, etc. is provided. Diffusion of oxygen from the oxide semiconductor film 18 to the outside, and hydrogen from the outside to the oxide semiconductor film 18. It can prevent the intrusion of water, etc. An insulating film that has a blocking effect on oxygen, hydrogen, water, etc. Examples include aluminum oxide, aluminum oxide nitride, gallium oxide, and gallium oxide nitride. , yttrium oxide, yttrium oxidized nitride, hafnium oxide, hafnium oxidized nitride, etc. be.

[0087] Furthermore, as the gate insulating film 17, hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x O y N z ), Nitrogen-added hafnium Minate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. Using k-materials can reduce gate leakage in transistors.

[0088] The thickness of the gate insulating film 17 is 5 nm or more and 400 nm or less, more preferably 10 nm or more. The wavelength should be 300 nm or less, more preferably 50 nm to 250 nm.

[0089] The pair of electrodes 21 and 22 are made of conductive materials such as aluminum, titanium, chromium, and nickel. copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten These elemental metals, or alloys with these as the main component, are used in single-layer or layered structures. For example, a single-layer structure of an aluminum film containing silicon, or a titanium film deposited on top of an aluminum film. Layered two-layer structure, two-layer structure with a titanium film laminated on a tungsten film, copper-magnesium- A two-layer structure in which a copper film is laminated on an aluminum alloy film, a titanium film or a titanium nitride film, and An aluminum film or copper film is laminated on top of a titanium film or titanium nitride film, and furthermore, A three-layer structure with a titanium film or titanium nitride film formed on top, a molybdenum film or molybdenum nitride film A film and an aluminum film or copper film superimposed on the molybdenum film or molybdenum nitride film. A three-layer structure is formed by stacking layers and then forming a molybdenum film or molybdenum nitride film on top of it. Yes, it is possible to use transparent conductive materials containing indium oxide, tin oxide, or zinc oxide. .

[0090] Furthermore, a nitride having a blocking effect on oxygen, hydrogen, water, etc. is placed on the oxide insulating film 24. By providing the insulating film 25, oxygen can diffuse from the multilayer film 20 to the outside, and oxygen can also be released from the outside into the multilayer film 2 It can prevent hydrogen, water, etc. from entering the 0. Examples of nitride insulating films include silicon nitride and nitride. Examples include silicon oxide, aluminum nitride, and aluminum oxide nitride. Note that oxygen and hydrogen are also present. Instead of a nitride insulating film that has a blocking effect on water, etc., it uses oxygen, hydrogen, water, etc. An oxide insulating film having the King effect may be provided. Blocking effect of oxygen, hydrogen, water, etc. Examples of oxide insulating films having aluminum oxide, aluminum oxide nitride, and gal oxide include aluminum oxide. M, gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide, acid There is hafnium nitride, etc.

[0091] Next, a method for manufacturing the transistor 50 shown in FIG. 1 will be described with reference to FIG. 4.

[0092] As shown in FIG. 4(A), a gate electrode 15 is formed on the substrate 11, and a gate insulating film 17 is formed on the gate electrode 15.

[0093] Here, a glass substrate is used as the substrate 11.

[0094] A method for forming the gate electrode 15 is shown below. First, a conductive film is formed by a sputtering method, a CVD method, an evaporation method, etc., and a mask is formed on the conductive film by a photolithography process. Next, a part of the conductive film is etched using the mask to form the gate electrode 15. After that, the mask is removed.

[0095] Note that the gate electrode 15 may be formed by an electroplating method, a printing method, an inkjet method, etc. instead of the above formation method.

[0096] Here, a tungsten film with a thickness of 100 nm is formed by a sputtering method. Next a mask is formed by a photolithography process, and the tungsten film is dry-etched using the mask to form the gate electrode 15.

[0097] The gate insulating film 17 is formed by a sputtering method, a CVD method, an evaporation method, etc.

[0098] When forming a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film as the gate insulating film 17, as the source gas, a depositable gas containing silicon and an oxidizing gas are used. When forming a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film as the gate insulating film 17, as the source gas, a depositable gas containing silicon and an oxidizing gas are used. It is preferable that it be present. Typical examples of silicon-containing sedimentary gases include silane, disilane, Examples include trisilane and silane fluoride. Oxidizing gases include oxygen, ozone, and nitrous oxide. Examples include nitrogen dioxide, etc.

[0099] Furthermore, when forming a silicon nitride film as the gate insulating film 17, a two-step formation method is used. It is preferable that this is done. First, a mixed gas of silane, nitrogen, and ammonia is used as the raw material gas. A first silicon nitride film with few defects is formed using the plasma CVD method employed. Next, the raw material gas is switched to a mixed gas of silane and nitrogen, resulting in a lower hydrogen concentration and a lower hydrogen content. A second silicon nitride film capable of blocking is formed. Such a formation method Therefore, the gate insulating film 17 is a nitride with few defects and hydrogen blocking properties. A silicon film can be formed.

[0100] Furthermore, when forming a gallium oxide film as the gate insulating film 17, MOCVD (Meta Using the Organic Chemical Vapor Deposition method It can be formed by [doing something].

[0101] Next, as shown in Figure 4(B), an oxide semiconductor film 18 and In are placed on the gate insulating film 17. Alternatively, an oxide film 19 containing Ga is formed.

[0102] Regarding the method for forming an oxide semiconductor film 18 and an oxide film 19 containing In or Ga, The following is explained. An oxide semiconductor film which will become an oxide semiconductor film 18 is placed on the gate insulating film 17, and A continuous oxide film containing In or Ga is formed to form an oxide film 19 containing In or Ga. Next, a photolithography process is performed on an oxide film containing In or Ga. After forming the mask, the oxide semiconductor film and an acid containing In or Ga are used with the mask. By etching a portion of each of the oxide films, the gate insulating film is formed as shown in Figure 4(B). 17 An oxide semiconductor film 1 that is separated from the device so as to overlap with a part of the gate electrode 15 8. A multilayer film 20 is formed having an oxide film 19 containing In or Ga. After this, Remove the mask.

[0103] An oxide semiconductor film that becomes an oxide semiconductor film 18, and an oxide film 19 containing In or Ga. Oxide films containing In or Ga can be produced by sputtering, coating, or pulsed laser. It can be formed using methods such as vapor deposition and laser ablation.

[0104] Form the oxide semiconductor film and the oxide film containing In or Ga using the sputtering method. In this case, the power supply equipment for generating plasma includes an RF power supply, an AC power supply, and a DC power supply. Devices and other equipment can be used as appropriate.

[0105] Sputtering gases include noble gases (typically argon), oxygen gas, and a mixture of noble gases and oxygen. A mixed gas is used as appropriate. In the case of a mixed gas of a noble gas and oxygen, the oxygen is used relative to the noble gas. It is preferable to increase the gas ratio.

[0106] Furthermore, the target is the oxide semiconductor film to be formed and the oxide film containing In or Ga. You can select the appropriate one according to the composition.

[0107] Furthermore, when forming oxide semiconductor films and oxide films containing In or Ga, for example, When using the sputtering method, the substrate temperature should be between 150°C and 500°C, preferably 15°C. While heating at a temperature of 0°C to 450°C, more preferably 200°C to 350°C By forming an oxide semiconductor film and an oxide film containing In or Ga, the CA described later is formed. An AC-OS film can be formed.

[0108] Oxide semiconductor films and oxide films containing In or Ga are not simply stacked; <Continuous junction (here, in particular, a structure in which the energy at the lower end of the conduction band changes continuously between each film) The film is fabricated so that trap centers and recombination centers are formed at the interface of each film. Impurities that form a central defect level or a barrier that obstructs carrier flow. Assume a layered structure in which no material exists. For example, the layered oxide semiconductor film and In When impurities are present between oxide films containing Ga, the continuity of the energy bands is lost. As a result, carriers are trapped or recombine at the interface and disappear.

[0109] To form continuous bonding, a multi-chamber type film deposition system equipped with a load lock chamber is required. By using a sputtering device, each film is continuously layered without being exposed to the atmosphere. This is necessary. Each chamber in the sputtering apparatus is for the oxide semiconductor film To remove impurities such as water as much as possible, an adsorption-type vacuum pump such as a cryopump is used. Using a pump to evacuate to a high vacuum (1 × 10 -4 Pa~5×10 -7 It is preferable to do so up to approximately Pa. Alternatively, a turbomolecular pump and a cold trap can be combined to run the exhaust system from the chamber. - It is preferable to prevent gases, especially those containing carbon or hydrogen, from flowing back into the container. .

[0110] To obtain a high-purity, intrinsic oxide semiconductor film, only the chamber needs to be evacuated to a high vacuum. Furthermore, it is necessary to increase the purity of the sputtering gas. The oxygen gas and aluminum used as sputtering gas... The gas has a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C. The following describes how to use highly purified gas, comfortably below -120°C, to produce oxide semiconductors. This can prevent as much as possible from water and other substances being absorbed into the body membrane.

[0111] Here, an In-Ga oxide semiconductor film with a thickness of 35 nm is produced using the sputtering method. -Zn oxide film (The atomic ratio of the sputtering target used for film formation is In:Ga:Zn) After forming an oxide (1:1:1), an oxide containing In or Ga is formed by sputtering. The film is a 20 nm thick In-Ga-Zn oxide film (sputtering target used for film deposition) The atomic ratio of the net forms In:Ga:Zn = 1:3:2. Next, In or Ga A mask is formed on an oxide film containing an oxide semiconductor film and an oxide containing In or Ga. By selectively etching each portion of the film, the oxide semiconductor film 18 and In or This forms a multilayer film 20 having an oxide film 19 containing Ga.

[0112] Heat treatment may be performed afterward.

[0113] Next, as shown in Figure 4(C), a pair of electrodes 21 and 22 are formed.

[0114] The methods for forming the pair of electrodes 21 and 22 are shown below. First, sputtering and CVD. A conductive film is formed using methods such as vapor deposition. Next, a photolithography process is performed on the conductive film. A mask is formed. Next, the conductive film is etched using the mask to form a pair of electrodes 21, 2 Form 2. After this, remove the mask.

[0115] Here, a tungsten film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a thick A 100 nm thick titanium film is sequentially stacked using the sputtering method. Next, a fu... A mask is formed by a photolithography process, and a tungsten film is formed using this mask. A pair of electrodes 21 and 22 are formed by dry etching a titanium film and a titanium film.

[0116] Next, as shown in Figure 4(D), oxide insulating film is applied to the multilayer film 20 and the pair of electrodes 21 and 22. A border film 23 is formed. Next, an oxide insulating film 24 is formed on the oxide insulating film 23.

[0117] Furthermore, after forming the oxide insulating film 23, the oxide insulating film 2 is continuously processed without exposure to the atmosphere. It is preferable to form 4. After forming the oxide insulating film 23, do not open it to the atmosphere and the raw material gas By adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature, the oxide insulating film 24 is continuously... By forming it in this way, the atmospheric components at the interface between oxide insulating film 23 and oxide insulating film 24 This can reduce the concentration of impurities, and also remove the oxygen contained in the oxide insulating film 24. It is possible to transfer oxygen to the semiconductor film 18, thereby reducing the amount of oxygen vacancies in the oxide semiconductor film 18. It is possible.

[0118] The oxide insulating film 23 is placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is then maintained at a temperature of 180°C to 400°C, more preferably 200°C to 370°C. Then, the raw material gas is introduced into the processing chamber and the pressure inside the processing chamber is set to between 20 Pa and 250 Pa. Preferably 20 Pa or more and less than 100 Pa, or preferably 100 Pa or more and 250 Pa or more The oxide insulating film 2 is formed by supplying high-frequency power to electrodes installed in the processing chamber. As option 3, a silicon oxide film or a silicon oxide-nitride film can be formed.

[0119] As the raw material gas for the oxide insulating film 23, a depositing gas containing silicon and an oxidizing gas are used. It is preferable that it be present. Typical examples of silicon-containing sedimentary gases include silane, disilane, Examples include trisilane and silane fluoride. Oxidizing gases include oxygen, ozone, and nitrous oxide. Examples include nitrogen dioxide, etc.

[0120] By using the above conditions, an oxide insulating film that permeates oxygen is formed as the oxide insulating film 23. It is possible to also use an oxide film 19 containing In or Ga and an oxide insulating film 23. By providing this, in the process of forming the oxide insulating film 24 that will be formed later, the oxide semiconductor film 18 Damage to the system can be reduced. Furthermore, the pressure in the processing chamber can be set between 100 Pa and 250 Pa. As a result, the water content in the oxide insulating film 23 is reduced, so transistor 5 This reduces variations in the electrical characteristics of 0 and suppresses fluctuations in the threshold voltage. Furthermore, by setting the pressure in the processing chamber to between 100 Pa and 250 Pa, the oxide insulating film 23 When forming the film, damage to the multilayer film 20, including the oxide semiconductor film 18, can be reduced. This is possible, and it can reduce the amount of oxygen vacancies contained in the oxide semiconductor film 18. In particular, acid To increase the deposition temperature of the oxide insulating film 23 or the oxide insulating film 24 that is formed later, typically By raising the temperature to above 220°C, some of the oxygen contained in the oxide semiconductor film 18 is removed. Furthermore, oxygen vacancies are easily formed. Also, in order to improve the reliability of the transistor, the vacancies formed later are When film deposition conditions are used to reduce the amount of defects in the oxide insulating film 24, the amount of oxygen desorption is reduced. It is easy. As a result, it can be difficult to reduce oxygen vacancies in the oxide semiconductor film 18. However, the pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less, and the oxide insulating film 2 By reducing damage to the oxide semiconductor film 18 during the deposition of film 3, the oxide insulating film 2 Even with a small amount of oxygen desorption from 4, it is possible to reduce oxygen vacancies in the oxide semiconductor film 18. be.

[0121] Furthermore, by increasing the amount of oxidizing gas relative to the silicon-containing sedimentary gas to more than 100 times, It is possible to reduce the hydrogen content contained in the oxide insulating film 23. As a result, the oxide Since the amount of hydrogen mixed into the semiconductor film 18 can be reduced, the threshold voltage of the transistor becomes negative. This can suppress shift.

[0122] Furthermore, the oxide insulating film 23 is placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is heated to a temperature of 300°C to 400°C, more preferably 320°C to 370°C. Maintain the pressure within the processing chamber by introducing the raw material gas into the processing chamber and adjusting the pressure between 20 Pa and 250 Pa. The oxide insulating film 2 is formed by supplying high-frequency power to electrodes installed in the processing chamber. As a third option, a silicon oxide film or a silicon oxide-nitride film can be formed.

[0123] Under these film deposition conditions, setting the substrate temperature to the above temperature enhances the bonding strength between silicon and oxygen. This strengthens the properties. As a result, the oxide insulating film 23 becomes permeable to oxygen, dense, and hard. Oxide insulating films, typically, have an etching rate of 0.5 wt% hydrofluoric acid at 25°C. Silicon oxide film or oxidized nitride film with a density of 10 nm / min or less, preferably 8 nm / min or less. A silicon film can be formed.

[0124] Here, the oxide insulating film 23 is silane with a flow rate of 30 sccm and silane with a flow rate of 4000 sccm. Using nitrous oxide at a concentration of 1 cm as the raw material gas, the pressure in the processing chamber was set to 200 Pa and the substrate temperature to 220°C. Then, a 27.12MHz high-frequency power supply is used to supply 150W of high-frequency power to the parallel plate electrodes. A silicon oxidizide film with a thickness of 50 nm is formed by the plasma CVD method. This allows for the formation of a silicon oxidoxide-nitride film that allows oxygen to permeate.

[0125] The oxide insulating film 24 is placed in the vacuum-evacuated processing chamber of the plasma CVD apparatus. The substrate is kept at a temperature of 180°C to 260°C, more preferably 200°C to 240°C. Then, the raw material gas is introduced into the processing chamber and the pressure inside the processing chamber is set to between 100 Pa and 250 Pa. More preferably, the pressure should be 100 Pa or more and 200 Pa or less, and the electrode provided in the processing chamber should be 0 0.17W / cm 2 More than 0.5W / cm 2 More preferably, 0.25 W / cm² 2 That's all. 0.35 W / cm² 2 Under the following conditions for supplying high-frequency power, the silicon oxide film or oxidation A silicon nitride film is formed.

[0126] As the raw material gas for the oxide insulating film 24, a silicon-containing depositing gas and an oxidizing gas are used. It is preferable that it be present. Typical examples of silicon-containing sedimentary gases include silane, disilane, Examples include trisilane and silane fluoride. Oxidizing gases include oxygen, ozone, and nitrous oxide. Examples include nitrogen dioxide, etc.

[0127] As for the film deposition conditions for the oxide insulating film 24, the high frequency of the power density in the processing chamber at the above pressure By supplying wave power, the decomposition efficiency of the source gas in the plasma is increased, and oxygen radicals are increased. In addition, as the oxidation of the raw material gas progresses, the oxygen content in the oxide insulating film 24 becomes stoichiometric The amount will be greater than the composition. However, if the substrate temperature is the above temperature, the silicon and oxygen Due to the weak bonding force, some of the oxygen is removed upon heating. As a result, the stoichiometric composition is satisfied. It forms an oxide insulating film that contains more oxygen than normal, and some of the oxygen is removed upon heating. This is possible. Furthermore, an oxide insulating film 23 is provided on the multilayer film 20. Therefore, In the process of forming the oxide insulating film 24, the oxide insulating film 23 becomes a protective film for the multilayer film 20. Furthermore, the oxide film 19 containing In or Ga acts as a protective film for the oxide semiconductor film 18. As a result, damage to the oxide semiconductor film 18 is reduced while achieving high-frequency power density. An oxide insulating film 24 can be formed using this method.

[0128] Furthermore, in the deposition conditions for the oxide insulating film 24, silicon-containing deposition in an oxidizing gas... By increasing the flow rate of the volatile gas, it is possible to reduce the amount of defects in the oxide insulating film 24. Typically, ESR measurements show that g = 2.0 originates from dangling bonds in silicon. The spin density of the signal appearing at 01 is 6 × 10 17 spins / cm 3 Less than 3x 10 17 spins / cm 3 The following is preferably 1.5 × 10 17 spins / cm 3 below This allows for the formation of an oxide insulating film with a low defect rate. As a result, the reliability of the transistor is improved. It can enhance reliability.

[0129] Here, the oxide insulating film 24 is silane at a flow rate of 200 sccm and at a flow rate of 4000 s. The raw material gas used is nitrous oxide from ccm, the pressure in the processing chamber is 200 Pa, and the substrate temperature is 220°C. Using a 27.12MHz high-frequency power supply, 1500W of high-frequency power is applied to parallel plate electrodes. A 400 nm thick silicon oxide-nitride film is formed using the supplied plasma CVD method. Oh, the plasma CVD device has an electrode area of ​​6000 cm². 2 This is a parallel-plate type plasma CVD. This device, when converted to power per unit area (power density), produces 0.25W. / cm 2 That is the case.

[0130] Next, a heat treatment is performed. The temperature of this heat treatment is typically 150°C or higher until the substrate strain point is reached. A temperature of 200°C to 450°C, more preferably 300°C to 450°C. do.

[0131] The heat treatment can be carried out using an electric furnace, an RTA device, etc. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. Processing time can be reduced.

[0132] The heat treatment involves nitrogen, oxygen, and ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm). Air with a podium level of 10 ppb or less (preferably 10 ppb or less), or a noble gas (argon, helium, etc.) The procedure should be carried out under the following conditions. Note that the above-mentioned nitrogen, oxygen, ultra-dry air, or noble gases may contain hydrogen and water. It is preferable that the following are not included.

[0133] This heat treatment converts some of the oxygen contained in the oxide insulating film 24 into the oxide semiconductor film 18. By moving the oxygen, the amount of oxygen vacancies contained in the oxide semiconductor film 18 can be reduced.

[0134] Furthermore, if the oxide insulating film 23 and the oxide insulating film 24 contain water, hydrogen, etc., A nitride insulating film 25 having the function of blocking such substances is subsequently formed and then subjected to heat treatment. Water, hydrogen, etc. contained in the oxide insulating film 23 and oxide insulating film 24 are absorbed into the oxide semiconductor film 18. The acid moves, causing defects in the oxide semiconductor film 18. However, this heating process causes the acid It is possible to remove water, hydrogen, etc. contained in the oxide insulating film 23 and the oxide insulating film 24. This reduces variations in the electrical characteristics of transistor 50 and suppresses fluctuations in the threshold voltage. It can be controlled.

[0135] Furthermore, by forming the oxide insulating film 24 on the oxide insulating film 23 while heating, oxidation By transferring oxygen to the material semiconductor film 18, the oxygen vacancies contained in the oxide semiconductor film 18 are reduced. Since this is possible, the heat treatment does not need to be performed.

[0136] Here, the material is heated at 350°C for 1 hour in a nitrogen and oxygen atmosphere.

[0137] Furthermore, when forming the pair of electrodes 21 and 22, the conductive film is etched, and the multilayer film 20 The oxide is damaged, and oxygen vacancies occur on the back channel side of the multilayer film 20. An oxide insulating film containing more oxygen than satisfies the stoichiometric composition is applied to the insulating film 24. This allows for the repair of oxygen deficiencies that occur on the back channel side due to heat treatment. This allows for a reduction in defects contained in the multilayer film 20, thus enabling transients This can improve the reliability of the Ta50.

[0138] Next, a nitride insulating film 25 is formed by sputtering, CVD, or the like.

[0139] Furthermore, when forming the nitride insulating film 25 by plasma CVD, the true The substrate placed in the ventilated processing chamber is subjected to a temperature of 300°C to 400°C, more preferably 300°C to 400°C. A temperature between 320°C and 370°C is preferable because it allows for the formation of a dense nitride insulating film. .

[0140] When forming a silicon nitride film as the nitride insulating film 25 by plasma CVD, It is preferable to use depositing gases containing condensate, nitrogen, and ammonia as raw material gases. By using a small amount of ammonia as a raw material gas compared to nitrogen, ammonia can be produced in the plasma. The nitrate dissociates, generating an active species. This active species is contained in the silicon-containing sedimentary gas. The bonds between silicon and hydrogen, and the triple bond of nitrogen are broken. As a result, silicon and nitrogen The bonding is promoted, resulting in fewer silicon and hydrogen bonds, fewer defects, and a dense silicon nitride. A film can be formed. On the other hand, in the raw material gas, the amount of ammonia relative to nitrogen If the levels are high, the decomposition of silicon-containing sedimentary gases and nitrogen will not proceed, and silicon and hydrogen will not decompose. The bonds remain intact, leading to the formation of a silicon nitride film with increased defects and sparseness. For these reasons, the flow rate ratio of nitrogen to ammonia in the raw gas should be between 5 and 50. Preferably, the value should be between 10 and 50.

[0141] Here, in the processing chamber of the plasma CVD apparatus, silane is flowed at a rate of 50 sccm, and at a rate of 5000... The raw material gases are nitrogen at sccm and ammonia at a flow rate of 100 sccm, and the pressure in the processing chamber is Using a 27.12MHz high-frequency power supply with a pressure of 100Pa and a substrate temperature of 350°C, 1000 A plasma CVD method using W high-frequency power supplied to parallel plate electrodes was used to create a nitrided nitride with a thickness of 50 nm. A silicon film is formed. Note that the plasma CVD apparatus has an electrode area of ​​6000 cm². 2 The flat This is a flat-plate type plasma CVD apparatus, and the supplied power is converted to power per unit area (power density). Converted to 1.7 × 10 -1 W / cm 2 That is the case.

[0142] Through the above process, the oxide insulating film 23, oxide insulating film 24, and nitride insulating film 25 are formed A protective film 26 can be formed.

[0143] Next, a heat treatment may be performed. The temperature of this heat treatment is typically 150°C or higher for the substrate. Below the strain point, preferably 200°C to 450°C, more preferably 300°C to 450°C The temperature should be below ℃.

[0144] By following the above steps, transistor 50 can be manufactured.

[0145] Oxygen molecules that satisfy a stoichiometric composition are superimposed on an oxide semiconductor film that functions as a channel region. By forming an oxide insulating film containing more oxygen than the oxide insulating film, the oxygen in the oxide insulating film is oxidized. It can be moved to a monocrystalline semiconductor film. As a result, the amount of oxygen vacancies contained in the oxide semiconductor film can be reduced. This can be reduced.

[0146] In particular, an oxide semiconductor film that functions as a channel region and oxygen that satisfies the stoichiometric composition The goal is to form an oxygen-permeable oxide insulating film between an oxide insulating film containing more oxygen and an oxide insulating film containing more oxygen. Therefore, when forming an oxide insulating film containing more oxygen than satisfies the stoichiometric composition, This can suppress damage to the oxide semiconductor film. As a result, the oxide semiconductor film contains It can reduce the amount of oxygen deficiency that occurs.

[0147] Then, by forming an oxide film containing In or Ga on the oxide semiconductor film, chemical When forming an oxide insulating film containing more oxygen than satisfactorily satisfying the stoichiometric composition, the oxidation Damage to the semiconductor film can be further suppressed. In addition, it contains In or Ga. By forming an oxide film, an insulating film is formed on the oxide semiconductor film, for example, an oxide insulating film. This method can suppress the incorporation of constituent elements of the border film into the oxide semiconductor film.

[0148] Based on the above, in semiconductor devices using oxide semiconductor films, the number of defects is reduced. It is possible to obtain a suitable location. Furthermore, in semiconductor devices using oxide semiconductor films, the electrical properties can be improved. A semiconductor device with the above specifications can be obtained.

[0149] <Example 1> In the transistor 50 shown in this embodiment, the substrate 11 and gate electric current may be used as needed. A base insulating film may be provided between the poles 15. The material for the base insulating film may be silicon oxide, acid Silicon nitride, silicon nitride, silicon oxide nitride, gallium oxide, hafnium oxide, acid Examples include yttrium oxide, aluminum oxide, and aluminum oxide nitride. The materials used include silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, and oxide. By using aluminum, impurities, typically alkali metals, water, and water, can be removed from the substrate 11. This can suppress the diffusion of elements into the multilayer film 20.

[0150] The underlying insulating film can be formed by sputtering, CVD, or other methods.

[0151] <Modification 2> In the oxide semiconductor film 18 provided on the transistor 50 shown in this embodiment, impurities By using an oxide semiconductor film with low substance concentration and low defect level density, even better electrical properties can be achieved. It is preferable that transistors with properties can be fabricated. Here, the impurity concentration is low, A low defect level density (low oxygen deficiency) is considered high-purity intrinsic or substantially high-purity intrinsic. Oxide semiconductors that are high-purity intrinsic or substantially high-purity intrinsic have few carrier sources. Therefore, the carrier density can sometimes be lowered. A transistor using in the channel region exhibits electrical characteristics where the threshold voltage is negative (no Also called Marion.) It rarely becomes high-purity genuine or substantially high-purity genuine. Oxide semiconductors, being of a certain nature, have a low defect level density, and therefore also a low trap level density. Therefore, transistors using this oxide semiconductor in the channel region exhibit small fluctuations in electrical characteristics. This results in a highly reliable transistor. Furthermore, the electricity trapped in the trap levels of the oxide semiconductor... Charges can take a long time to disappear and sometimes behave like fixed charges. Therefore, transistors using oxide semiconductors with a high trap level density in the channel region This can lead to unstable electrical properties. Impurities include hydrogen, nitrogen, alkali metals, Alternatively, alkaline earth metals, etc., may be present.

[0152] The hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water, and also acid An oxygen vacancy is formed in the lattice where an element has been removed (or in the area where oxygen has been removed). The presence of hydrogen can sometimes generate electrons, which act as carriers. Additionally, some of the hydrogen can turn gold. By bonding with oxygen atoms that bond with other atoms in the group, it can generate electrons, which act as carriers. Therefore, transistors using oxide semiconductors containing hydrogen exhibit normally-on characteristics. It's easy to understand.

[0153] Therefore, it is preferable that the oxide semiconductor film 18 has as little hydrogen as possible. Specifically, in the oxide semiconductor film 18, secondary ion mass spectrometry (SIMS: Second The hydrogen concentration obtained by (ary Ion Mass Spectrometry) is 2 ×10 20 atoms / cm 3 The following is preferably 5 × 10 19 atoms / cm 3 below, Better 1 × 10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 The following is preferably 1 × 10 18 atoms / cm 3 The following is more preferable: 5 x 10 17 a toms / cm 3 More preferably 1 × 10 16 atoms / cm 3 The following applies:

[0154] As a method for reducing the hydrogen concentration of the oxide semiconductor film 18, in Figure 4(B) the oxide semiconductor After forming a multilayer film 20 having a conductive film 18 and an oxide film 19 containing In or Ga, By heat treatment, the hydrogen concentration of the oxide semiconductor film 18 can be reduced. The processing temperature is typically 150°C or higher but below the substrate strain point, preferably 200°C or higher. The temperature should be 0°C or lower, more preferably 300°C to 450°C.

[0155] Furthermore, the oxide semiconductor film 18 is made of alkali metals obtained by secondary ion mass spectrometry. This represents the concentration of alkaline earth metals, 1 × 10⁻⁶ 18 atoms / cm 3 The following is preferably 2 × 1 0 16 atoms / cm 3 The following applies: Alkali metals and alkaline earth metals are oxides. When coupled with a conductor, it can generate carriers, increasing the transistor's off-current. This can happen. For this reason, alkali metal or alkaline earth metal of the oxide semiconductor film 18 It is preferable to reduce the concentration of [the substance].

[0156] By providing a nitride insulating film on a part of the gate insulating film 17, the alkalinity of the oxide semiconductor film 18 is reduced. The concentration of metallic or alkaline earth metals can be reduced.

[0157] Furthermore, if nitrogen is present in the oxide semiconductor film 18, electrons, which are carriers, are generated, The rear density increases, making it easier to convert to n-type. As a result, using an oxide semiconductor containing nitrogen... Transistors tend to exhibit normally-on characteristics. Therefore, in the oxide semiconductor film, Therefore, it is preferable that nitrogen is reduced as much as possible, for example, the nitrogen concentration should be 5 × 10⁻⁶. 1 8 atoms / cm 3 The following is preferable:

[0158] In this way, impurities (hydrogen, nitrogen, alkali metals, or alkaline earth metals, etc.) can be produced. By having an oxide semiconductor film 18 that has been reduced to the greatest extent possible and made highly pure, the transistor - This suppresses the mullion characteristic and drastically reduces the transistor's off-current. This makes it possible to fabricate semiconductor devices with good electrical characteristics. Furthermore, reliability can be improved. A semiconductor device with the above characteristics can be fabricated.

[0159] Furthermore, the low off-current of transistors using highly purified oxide semiconductor films indicates that This can be proven through various experiments. For example, if the channel width is 1 × 10⁻⁶ 6 Channel length L in μm Even if the element is 10 μm, the voltage between the source electrode and the drain electrode (drain voltage) is 1 In the range from V to 10V, the off-current is below the measurement limit of the semiconductor parameter analyzer. That is, 1 × 10 -13 A characteristic of A or less can be obtained. In this case, the off-current is The value obtained by dividing by the transistor's channel width is found to be less than 100 zA / μm. Furthermore, by connecting a capacitive element and a transistor, the flow of fluid into or out of the capacitive element can be controlled. The off-current was measured using a circuit that controls the charge of the transistor. Therefore, a portion of the highly purified oxide semiconductor film is used in the channel region of the above transistor. The off-current of the transistor was measured from the change in the amount of charge per unit time of the capacitive element. As a result, when the voltage between the source and drain electrodes of the transistor is 3V, several tens of yA It was found that an even lower off-current of / μm could be obtained. Therefore, high-purity processing was achieved. Transistors using oxide semiconductor films exhibit remarkably low off-current.

[0160] <Variation 3> As a pair of electrodes 21 and 22 provided in the transistor 50 shown in this embodiment, Gusten, titanium, aluminum, copper, molybdenum, chromium, or tantalum in elemental form It is preferable to use a conductive material that readily bonds with oxygen, such as an alloy. As a result, the multilayer film 20 The oxygen contained in the electrode combines with the conductive material contained in the pair of electrodes 21 and 22, and in the multilayer film 20 Then, an oxygen-deficient region is formed. Also, a pair of electrodes 21 and 22 are formed on the multilayer film 20. In some cases, some of the constituent elements of the conductive material may be mixed in. As a result, in the multilayer film 20, A low-resistance region is formed near the area in contact with the pair of electrodes 21 and 22. Figure 5 is shown in Figure 1(B). This is an enlarged cross-sectional view of the multilayer film 20 of transistor 50.

[0161] As shown in Figure 5(A), in the oxide film 19 containing In or Ga, a low-resistance region In some cases, most of 28a and 29a may be formed. Alternatively, as shown in Figure 5(B), acid In the oxide semiconductor film 18 and the oxide film 19 containing In or Ga, the low-resistance region 28b , 29b may be formed. Alternatively, as shown in Figure 5(C), an oxide semiconductor film 1 In the oxide film 19 containing 8 and In or Ga, so as to be in contact with the gate insulating film 17 Low-resistance regions 28c and 29c may be formed. Because 9a to 29c have high conductivity, the contact resistance between the multilayer film 20 and the pair of electrodes 21 and 22 is It is possible to reduce this and increase the on-current of the transistor.

[0162] Furthermore, the pair of electrodes 21 and 22 are made of a conductive material that readily bonds with oxygen, titanium nitride, and nitrogen. A laminated structure with conductive materials that do not readily bond with oxygen, such as tantalum or ruthenium, may also be used. By using such a layered structure, at the interface between the pair of electrodes 21 and 22 and the oxide insulating film 23 This makes it possible to prevent oxidation of the pair of electrodes 21 and 22, and the high temperature of the pair of electrodes 21 and 22 It is possible to suppress the development of resistance.

[0163] <Modification 4> In the method for manufacturing the transistor 50 shown in this embodiment, a pair of electrodes 21 and 22 are formed After this, a washing process may be performed to remove etching residue. This makes it possible to suppress the generation of leakage current flowing between the pair of electrodes 21 and 22. This cleaning process involves TMAH (Tetramethylammonium Hydroxide). Alkaline solutions such as (de) solution, and acidic solutions such as dilute hydrofluoric acid, oxalic acid, and phosphoric acid are used. It can be done by doing so.

[0164] <Modification 5> In the method for manufacturing the transistor 50 shown in this embodiment, a pair of electrodes 21 and 22 are formed After this, the multilayer film 20 is exposed to plasma generated in an oxygen atmosphere, and the oxide semiconductor film 18 and Oxygen may be supplied to the oxide film 19 containing In or Ga. The oxygen atmosphere is as follows: The atmosphere contains oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. Furthermore, the plasma treatment In this case, the multilayer film 20 is exposed to plasma generated without applying a bias to the substrate 11. This is preferable. As a result, the multilayer film 20 is not damaged and oxygen is supplied. This makes it possible to reduce the amount of oxygen vacancies in the multilayer film 20. Impurities remaining on the surface of the multilayer film 20 due to polishing, such as halogens like fluorine and chlorine. These can be removed.

[0165] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0166] (Embodiment 2) In this embodiment, the number of defects in the oxide semiconductor film is further reduced compared to Embodiment 1. A semiconductor device having a transistor capable of performing the following will be described with reference to the drawings. The transistor described in the embodiment has a gate insulating film and oxide compared to Embodiment 1. It differs in that it has an oxide film containing In or Ga between the semiconductor films.

[0167] Figure 6 shows a top view and a cross-sectional view of the transistor 60 of the semiconductor device. Figure 6(A) Figure 6(B) is a top view of transistor 60, and Figure 6(A) shows the cross section between the dashed line A and B in Figure 6(A). This is a top view, and Figure 6(C) is a cross-sectional view between the dashed lines C and D in Figure 6(A). Note that Figure 6 (A) For clarity, the substrate 11, gate insulating film 17, oxide insulating film 23, oxide insulating film The edge film 24, nitride insulating film 25, etc., have been omitted.

[0168] The transistor 60 shown in Figure 6 has a gate electrode 15 provided on the substrate 11. Furthermore, a gate insulating film 17 is formed on the substrate 11 and the gate electrode 15, and the gate insulating film 17 Through this, the multilayer film 34 overlaps with the gate electrode 15, and a pair of electrodes 21 are in contact with the multilayer film 34. It also has a gate insulating film 17, a multilayer film 34, and a pair of electrodes 21 and 22. The protective film 2 is composed of an oxide insulating film 23, an oxide insulating film 24, and a nitride insulating film 25. 6 is formed.

[0169] In the transistor 60 shown in this embodiment, the multilayer film 34 contains In or Ga. It has an oxide film 31, an oxide semiconductor film 32, and an oxide film 33 containing In or Ga. Furthermore, a portion of the oxide semiconductor film 32 functions as a channel region.

[0170] Furthermore, the gate insulating film 17 and the oxide film 31 containing In or Ga are in contact. Between the insulating film 17 and the oxide semiconductor film 32, an oxide film 31 containing In or Ga is provided. It is provided.

[0171] Furthermore, the oxide film 33 containing In or Ga and the oxide insulating film 23 are in contact. That is, acid Between the oxide semiconductor film 32 and the oxide insulating film 23, there is an oxide film 33 containing In or Ga. It is provided.

[0172] The oxide film 31 containing In or Ga and the oxide film 33 containing In or Ga are actually Appropriate materials and formation methods similar to those used for the oxide film 19 containing In or Ga shown in Form 1. It can be used.

[0173] Furthermore, when the oxide film 31 containing In or Ga is an In-M-Zn oxide film, The atomic ratio of n to M is preferably less than 50 atoms for In and 50 atoms for M. ic% or more, more preferably In is less than 25 atomic%, and M is 75 atomic% It must be % or greater.

[0174] Furthermore, when the oxide film 33 containing In or Ga is an In-M-Zn oxide film, The atomic ratio of n to M is preferably less than 50 atoms for In and 50 atoms for M. ic% or more, more preferably In is less than 25 atomic%, and M is 75 atomic% It must be % or greater.

[0175] The oxide semiconductor film 32 is made of the same material and formed as the oxide semiconductor film 18 shown in Embodiment 1. The method can be used as appropriate.

[0176] Here, as an oxide film 31 containing In or Ga, the thickness is determined by sputtering. A 30nm InGa-Zn oxide film (atoms of the sputtering target used for film deposition) The numerical ratio is In:Ga:Zn = 1:6:4). Also, the oxide semiconductor film 32 is thickened. A 10nm InGa-Zn oxide film (atoms of the sputtering target used for film formation) The numerical ratio forms In:Ga:Zn = 1:1:1). Also, oxidation containing In or Ga. As material film 33, an In-Ga-Zn oxide film with a thickness of 10 nm (sputtering used for film deposition) The target atoms form an atomic ratio of In:Ga:Zn = 1:3:2.

[0177] Here, the band structure of the transistor 60 near the multilayer film 34 in Figure 6 is shown by the dashed line GH. The construction will be explained using Figure 7(A), and the carrier flow in transistor 60 will be explained. Next, we will explain using Figure 7(B).

[0178] In the band structure shown in Figure 7(A), for example, an oxide film 31 containing In or Ga As an example, the In-Ga-Zn oxide (used for film formation) has an energy gap of 3.8 eV. The atomic ratio of the puttering target is In:Ga:Zn = 1:6:4. The semiconductor film 32 is an In-Ga-Zn oxide (component) with an energy gap of 3.2 eV. The atomic ratio of the sputtering target used for the film was In:Ga:Zn = 1:1:1. It exists. The oxide film 33 containing In or Ga has an energy gap of 3.5 eV. The atomic ratio of the sputtering target used for depositing the In-Ga-Zn oxide film is In: (Ga:Zn=1:3:2) is used.

[0179] An oxide film 31 containing In or Ga, an oxide semiconductor film 32, and In or Ga The energy difference between the vacuum level of the oxide film 33 containing the electrons and the upper edge of the valence band (also known as the ionization potential) The values ​​are 7.8 eV, 7.9 eV, and 8.0 eV, respectively.

[0180] An oxide film 31 containing In or Ga, an oxide semiconductor film 32, and In or Ga The energy difference (also called electron affinity) between the vacuum level and the lower edge of the conduction band of the oxide film 33 containing the film is: These values ​​are 4.0 eV, 4.7 eV, and 4.5 eV, respectively.

[0181] Furthermore, the lower end of the conduction band of the oxide film 31 containing In or Ga is defined as Ec_31, and the oxide The lower end of the conduction band of the semiconductor film 32 is defined as Ec_32, and the oxide film 33 containing In or Ga The lower end of the conduction band is defined as Ec_33. The lower end of the conduction band of the gate insulating film 17 is defined as Ec_17. Let Ec_23 be the lower end of the conduction band of the oxide insulating film 23.

[0182] As shown in Figure 7(A), in the multilayer film 34, an oxide film 31 containing In or Ga The lower end of the conduction band near the interface between the oxide semiconductor film 32 and I The lower end of the conduction band near the interface with the oxide film 33 containing n or Ga changes continuously. That is, near the interface between the oxide film 31 containing In or Ga and the oxide semiconductor film 32. , and near the interface between the oxide semiconductor film 32 and the oxide film 33 containing In or Ga There are no barriers, and the change is gradual. A structure with such a lower end of the conduction band is called U-shaped. It can also be called a U-shaped well structure. It is an oxide film containing In or Ga. Between 31 and the oxide semiconductor film 32, and between the oxide semiconductor film 32 and an acid containing In or Ga This shape is formed by the mutual movement of oxygen between the oxide film 33 and the other film. At 34, the energy of the lower edge Ec_32 of the conduction band in the oxide semiconductor film 32 is the highest. At a low level, this region becomes the channel region.

[0183] Here, Figure 7 shows how electron carriers flow in transistor 60. (B) will be used for explanation. Note that in Figure 7(B), electrons in the oxide semiconductor film 32 The flow is represented by a dashed arrow.

[0184] Near the interface between the gate insulating film 17 and the oxide film 31 containing In or Ga, impurities A trap level 36 is formed by material and defects. Also, oxides containing In or Ga are present. Similarly, a trap level 37 is formed near the interface between the film 33 and the oxide insulating film 23. In the transistor 60 shown in this embodiment, as shown in Figure 7(B), the gate is isolated. An oxide film 31 containing In or Ga is provided between the edge film 17 and the oxide semiconductor film 32. There is a gap between the oxide semiconductor film 32 and the trap level 36. An oxide film 33 containing In or Ga is provided between the semiconductor film 32 and the oxide insulating film 23. Therefore, there is a gap between the oxide semiconductor film 32 and the trap level 37.

[0185] As a result, electrons flowing through the oxide semiconductor film 32 are trapped at trap levels 36 and 37. This makes it difficult to increase the on-current of the transistor, and also increases the field-effect mobility. This can increase the effect. Also, when electrons are trapped at trap levels 36 and 37, these electrons This results in a negative fixed charge. As a result, the transistor's threshold voltage fluctuates. However, between the oxide semiconductor film 32 and the trap levels 36 and 37, Because of the gap, it is possible to reduce electron trapping at trap levels 36 and 37. Yes, and it can reduce fluctuations in the threshold voltage.

[0186] Furthermore, near the interface between the oxide film 31 containing In or Ga and the oxide semiconductor film 32 The energy difference ΔE2 at the lower end of the conduction band, and the oxide semiconductor film 32 containing In or Ga When the energy difference ΔE3 at the lower end of the conduction band with the oxide film 33 is small, the oxide semiconductor The carriers flowing through the body membrane 32 reach the lower end of the conduction band of the oxide film 31 containing In or Ga, and The lower end of the conduction band of the oxide film 33 containing In or Ga is overcome, and the trapping point It gets trapped at positions 36 and 37. Therefore, the oxide film 31 containing In or Ga and the acid The energy difference ΔE2 at the lower end of the conduction band with the oxide semiconductor film 32, and the energy difference between the oxide semiconductor film 32 and I The energy difference ΔE3 at the lower end of the conduction band with the oxide film 33 containing n or Ga is, respectively, It is preferable that the voltage be 0.1 eV or higher, and more preferably 0.15 eV or higher.

[0187] Furthermore, near the interface between the oxide film 31 containing In or Ga and the oxide semiconductor film 32 Compared to the energy difference ΔE2, the oxide semiconductor film 32 and the oxide containing In or Ga By reducing the energy difference ΔE3 near the interface with film 33, the oxide semiconductor film 3 2 and the resistance between the pair of electrodes 21 and 22 can be reduced, and in the trap level 36 Because the amount of electrons trapped can be reduced, the on-current of the transistor can be increased, and This allows for a greater increase in the mobility of the field effect.

[0188] Note that here, the energy difference ΔE3 is smaller than the energy difference ΔE2, In accordance with the electrical characteristics of the zista, the energy differences ΔE2 and ΔE3 are the same, The energy difference ΔE3 is greater than the energy difference ΔE2, so that In or Ga is used. The structure of the oxide film 31, oxide semiconductor film 32, and oxide film 33 containing In or Ga The constituent elements and composition can be selected as appropriate.

[0189] Furthermore, the back channel of the multilayer film 34 (in the multilayer film 34, opposite the gate electrode 15) On the side opposite to the surface, through the oxygen-permeable oxide insulating film 23, the stoichiometric composition is satisfied. An oxide insulating film 24 (see Figure 6) containing more oxygen than the oxygen being added is provided. Therefore, the oxide insulating film 24 contains more oxygen than satisfactorily satisfactorily. By transferring the oxygen to the oxide semiconductor film 32 contained in the multilayer film 34, the oxide semiconductor film This can reduce oxygen deficiency in the conductive film 32.

[0190] Furthermore, the etching process that forms the pair of electrodes 21 and 22 damages the multilayer film 34. As a result, oxygen vacancies occur on the back channel side of the multilayer film 34, but acid that satisfies the stoichiometric composition The oxygen contained in the oxide insulating film 24, which contains more oxygen than the element, repairs the oxygen vacancy. It can be restored. This improves the reliability of transistor 60. .

[0191] Based on the above, an oxide film 31 containing In or Ga, an oxide semiconductor film 32, and I A multilayer film 34 having an oxide film 33 containing n or Ga, and an acid provided on the multilayer film 34 More oxygen than that satisfying the stoichiometric composition is allowed through the permeable oxide insulating film 23. By having an oxide insulating film 24 containing [the specified element], oxygen vacancies in the multilayer film 34 are reduced. This is possible. Also, between the gate insulating film 17 and the oxide semiconductor film 32, In or G An oxide film 31 containing a is provided, between the oxide semiconductor film 32 and the oxide insulating film 23 Since an oxide film 33 containing In or Ga is provided, The concentration of silicon and carbon near the interface between the oxide film 31 and the oxide semiconductor film 32, and oxidation The concentration of silicon or carbon in the semiconductor film 32, or the oxide film containing In or Ga. Reducing the concentration of silicon and carbon near the interface between 33 and the oxide semiconductor film 32 is possible. Yes, it is possible. As a result, the absorption coefficient derived in the multilayer film 34 by the constant photocurrent measurement method is , 1 x 10 -3 Less than / cm, preferably 1 × 10 -4 The localized level density becomes less than / cm. Extremely low.

[0192] The transistor 60 having such a structure is a multilayer film 34 including an oxide semiconductor film 32. Because it has very few defects, it is possible to improve the electrical characteristics of the transistor. Typically, this allows for an increase in on-current and an improvement in field-effect mobility. Also, stress The threshold voltage fluctuates in BT stress tests and photo-BT stress tests, which are examples of such tests. It does not occur, or the amount of fluctuation in the negative or positive direction is 1.0V or less, preferably. It operates at 0.5V or less, making it highly reliable.

[0193] <Example 1> Instead of the multilayer film 34 shown in Figures 6(A) to 6(C) in this embodiment, Figure 6(D As shown in Figure 6(E), an oxide film 31 containing In or Ga, an oxide semiconductor film 32, an oxide film containing In or Ga 33, and an oxide film containing In or Ga 35 A multilayer film 34a having the above can be used. Note that Figure 6(D) is shown in Figure 6(B) Figure 6(E) corresponds to an enlarged view of the vicinity of the layer film 34, and Figure 6(C) is an enlarged view of the vicinity of the multilayer film 34 shown in Figure 6(C). This corresponds to a large-scale map.

[0194] The oxide film 35 containing In or Ga is an oxide film 31 containing In or Ga, and oxidation It is provided on the sides of the semiconductor film 32 and the oxide film 33 containing In or Ga, respectively. Furthermore, the oxide semiconductor film 32 is surrounded by an oxide film containing In or Ga.

[0195] The oxide film 35 containing In or Ga is the same as the oxide films 31 and 33 containing In or Ga. It is formed from a metal oxide similar to that. That is, compared to the oxide semiconductor film 32, In or Because the band gap of the Ga-containing oxide film 35 is large, the multilayer film 34a and the gate insulating film 1 Trap levels near the interface of 7, or near the interface between the multilayer film 34a and the oxide insulating film 23 It is possible to reduce electron trapping at the wrap level. As a result, the transistor Reliability improves.

[0196] Note that the oxide film 35 containing In or Ga is the oxide film 31 containing In or Ga. A dry oxide film 32 and an oxide film 33 containing In or Ga are formed by a dry oxide film 32. The reaction products generated in the chipping process are an oxide film 31 containing In or Ga, and oxidation By adhering to the side surface of the material semiconductor film 32 and the oxide film 33 containing In or Ga, The conditions for dry etching include, for example, using boron trichloride gas as the etching gas. Using bichlorine gas, inductively coupled plasma (ICP) is created. This can be done by applying Plasma power and substrate bias power.

[0197] <Modification 2> In the transistor 60 shown in this embodiment, the multilayer film 34 and the pair of electrodes 21, 22 The layered structure can be modified as appropriate. For example, as shown in Figure 8, a modified version of the transistor It can be made into a Zista 65.

[0198] A top view of transistor 65 is shown in Figure 8(A). In Figure 8(A), the dashed line AB A cross-sectional view between the points is shown in Figure 8(B), and a cross-sectional view between the points C and D shown by the dashed line is shown in Figure 8(C). In Figure 8(A), for clarity, the substrate 11, gate insulating film 17, and the material containing In or Ga are shown. The oxide film 31, oxide semiconductor film 32, protective film 26, etc., have been omitted.

[0199] Compared to transistor 60, transistor 65 has a portion of its pair of electrodes 21 and 22 that are acid-resistant. It differs in that it is surrounded by an oxide semiconductor film 32 and an oxide film 33 containing In or Ga. Specifically, the transistor 65 has an oxide semiconductor on an oxide film 31 containing In or Ga. A body membrane 32 is provided, and a pair of electrodes 21 and 22 are provided on the oxide semiconductor film 32. Furthermore, an acid containing In or Ga is brought into contact with the oxide semiconductor film 32 and the pair of electrodes 21 and 22. A phosphate film 33 is provided. In addition, in the transistor 65, the product of other components The layer structure is the same as that of transistor 60.

[0200] In transistor 65, the pair of electrodes 21 and 22 are in contact with the oxide semiconductor film 32. Furthermore, compared to transistor 60, the contact resistance between the multilayer film 34 and the pair of electrodes 21 and 22 is low. This transistor has improved on-current compared to transistor 60.

[0201] Furthermore, the transistor 65 has a pair of electrodes 21 and 22 in contact with the oxide semiconductor film 32. Therefore, without increasing the contact resistance between the multilayer film 34 and the pair of electrodes 21 and 22, In or This allows the oxide film 33 containing Ga to be made thicker. In this way, the protective film 26 Plasma damage during formation or contamination of the constituent elements of the protective film 26 can occur. The lap level is near the interface between the oxide semiconductor film 32 and the oxide film 33 containing In or Ga. This can suppress the formation of the transistor. In other words, transistor 65 improves the on-current and threshold It is possible to achieve both a reduction in voltage fluctuations and a more efficient approach.

[0202] The method for fabricating transistor 65 will be explained using Figure 9. First, in the same manner as in Figure 4(A) Then, a gate electrode 15 and a gate insulating film 17 are formed on the substrate 11 (see Figure 9(A)). .

[0203] Next, an oxide film 4 containing In or Ga becomes an oxide film 31 containing In or Ga. 4. A pair of oxide semiconductor films 45, which will become the oxide semiconductor film 32, are continuously formed, and then a pair Electrodes 21 and 22 are formed (see Figure 9(B)). The oxide containing In or Ga is formed. The material film 44 is made of the same material as the oxide film 19 containing In or Ga shown in Embodiment 1, and The formation method can be used as appropriate. The oxide semiconductor film 45 is made of acid as shown in Embodiment 1. The same materials and formation methods as for the ionized semiconductor film 18 can be used as appropriate. The electrodes 21 and 22 can be formed in the same manner as shown in Figure 4(C). , 22 is formed on the oxide semiconductor film 45.

[0204] Next, the oxide semiconductor film 45 that will become the oxide semiconductor film 32 and the pair of electrodes 21 and 22 are covered Thus, an oxide containing In or Ga becomes an oxide film 33 containing In or Ga. A film is formed. The oxide film containing In or Ga is the In or Ga shown in Embodiment 1. The same materials and formation methods as those used for the Ga-containing oxide film 19 can be used as appropriate.

[0205] Subsequently, an oxide film containing In or Ga becomes an oxide film 31 containing In or Ga. 44, an oxide semiconductor film 45 which becomes an oxide semiconductor film 32, and an oxide containing In or Ga A portion of each oxide film containing In or Ga, which will become the physical film 33, is etched, Alternatively, an oxide film 31 containing Ga, an oxide semiconductor film 32 and an oxide containing In or Ga A multilayer film 34 having a physical film 33 is formed (see Figure 9(C)). Note that the etching process is performed. This involves forming an oxide film 33 containing In or Ga on an oxide film containing In or Ga. This can be carried out by forming a mask using a photolithography process and then using that mask.

[0206] Next, the gate insulating film 17, the multilayer film 34, and the pair of electrodes 21 and 22 are covered, A protective film 26 is formed. The protective film 26 can be formed in the same manner as in Embodiment 1. See Figure 9(D). Also, in the method for fabricating transistor 65, Embodiment 1 may be appropriately applied. Heat treatment can be performed by referring to it.

[0207] Furthermore, etching to form a pair of electrodes 21 and 22 results in an oxide semiconductor film 32. Because defects such as oxygen vacancies can occur in oxide semiconductor films, the carrier density may increase. , to form an oxide film containing In or Ga, which becomes an oxide film 33 containing In or Ga. Before that, the oxide semiconductor film is exposed to plasma generated in an oxygen atmosphere, and the oxide semiconductor film It is preferable to supply oxygen to the body membrane. In this way, the transistor 65 Then, traps near the interface between the oxide semiconductor film 32 and the oxide film 33 containing In or Ga. This can suppress the formation of energy levels and reduce fluctuations in the threshold voltage. In transistor 65, the flow is near the side surface of the oxide semiconductor film 32 in the multilayer film 34. This can reduce leakage current and suppress the increase in off-current.

[0208] Furthermore, the etching process that forms the pair of electrodes 21 and 22 damages the multilayer film 34. As a result, oxygen vacancies occur on the back channel side of the multilayer film 34, but acid that satisfies the stoichiometric composition The oxygen contained in the oxide insulating film 24, which contains more oxygen than the element, repairs the oxygen vacancy. It can be restored. This can improve the reliability of transistor 65. .

[0209] <Variation 3> In the transistor 60 shown in this embodiment, the multilayer film 34 and the pair of electrodes 21, 22 The layered structure can be modified as appropriate. For example, as an example of modification, see Figure 10. It can be called 'njista 66'.

[0210] A top view of transistor 66 is shown in Figure 10(A). In Figure 10(A), the dashed line A A cross-sectional view between -B is shown in Figure 10(B), and a cross-sectional view between the dashed-dotted line CD is shown in Figure 10(C). Note that in Figure 10(A), for clarity, the substrate 11, gate insulating film 17, and protective film 26 are shown separately. The "do" is omitted.

[0211] Compared to transistor 60, transistor 66 has an oxide film containing In or Ga. 33 is formed on the gate insulating film 17, a pair of electrodes 21 and 22, and an oxide semiconductor film 32. They differ in that they have an oxide film containing In or Ga. An oxide semiconductor film 32 is provided on 31, and the oxide film 31 contains In or Ga. A pair of electrodes 21 and 22 are provided so as to cover the oxide semiconductor film 32, and In This covers the oxide film 31 containing Ga and the oxide semiconductor film 32, as well as the pair of electrodes 21 and 22. An oxide film 33 containing In or Ga is provided on the transistor 66. Furthermore, the stacked structure of the other components is the same as that of transistor 60.

[0212] Compared to transistor 60, transistor 66 has a pair of oxide semiconductor electrodes 21 and 22. Because the area in contact with the conductive film 32 is large, the contact between the multilayer film 34 and the pair of electrodes 21 and 22 This transistor has low contact resistance and improved on-current compared to transistor 60.

[0213] Furthermore, the transistor 66 has a pair of electrodes 21 and 22 that are in contact with the oxide semiconductor film 32 over a large area. Because they are in contact, the contact resistance between the multilayer film 34 and the pair of electrodes 21 and 22 is not increased. This allows for increasing the thickness of the oxide film 33 containing In or Ga. Therefore, plasma damage occurs when forming the protective film 26, or constituent elements of the protective film 26 are mixed in. The trap levels generated by the oxide semiconductor film 32 and the oxide film 3 containing In or Ga are Formation near the interface with 3 can be suppressed. In other words, transistor 66 has an on current This allows for both improvement and reduction of threshold voltage fluctuations.

[0214] The method for fabricating transistor 66 will be explained using Figure 11. First, in the same manner as in Figure 4(A) Then, a gate electrode and a gate insulating film 17 are formed on the substrate 11 (see Figure 11(A)). .

[0215] Next, an oxide film containing In or Ga, which becomes an oxide film 31 containing In or Ga, And an oxide semiconductor film which will become an oxide semiconductor film 32 is continuously formed, on the oxide semiconductor film A mask is prepared by a photolithography process, and etching is performed using the mask. An oxide film 31 and an oxide semiconductor film 32 containing n or Ga are formed. Subsequently, In is young Alternatively, a pair of electric elements are used to cover the edges of the oxide film 31 containing Ga and the oxide semiconductor film 32. Forms electrodes 21 and 22 (see Figure 11(B)). Note that the In or Ga included The oxide film is made of the same material as the oxide film 19 containing In or Ga shown in Embodiment 1, and The formation method can be used as appropriate. The oxide semiconductor film is the oxide shown in Embodiment 1. The same materials and formation methods as for the semiconductor film 18 can be used as appropriate. Sections 1 and 22 can be formed in the same manner as shown in Figure 4(C).

[0216] Next, In or A Ga-containing oxide film 33 is formed, and a multilayer film 34 is formed (see Figure 11(C)). The oxide film containing In or Ga is the oxide containing In or Ga shown in Embodiment 1. The same materials and formation methods as for film 19 can be used as appropriate. The oxide film 33 containing In or Ga is formed by a mass of photolithography or the like. The material can be processed using etching with a marker, or it can be left in its as-formed state.

[0217] Next, a protective film 26 is formed on the gate insulating film 17 and the oxide film 33 containing In or Ga. The protective film 26 can be formed in the same manner as in Embodiment 1 (see Figure 11(D)). (See reference). Also, in the method for manufacturing transistor 66, heating is performed with appropriate reference to Embodiment 1. It can perform the process.

[0218] Furthermore, etch forms oxide film 31 and oxide semiconductor film 32 containing In or Ga. Due to the process, defects such as oxygen vacancies are created on the side surface of the oxide semiconductor film 32, and the carrier density changes. It may increase. Then, by etching to form a pair of electrodes 21 and 22, acid In some cases, defects such as oxygen vacancies occur on the surface of the ionized semiconductor film 32, leading to an increase in carrier density. Therefore, an oxide film 31 containing In or Ga and an oxide semiconductor film 32 were formed. Afterwards, and after the formation of the pair of electrodes 21 and 22, an oxide semiconductor film By exposing 32 to a plasma generated in an oxygen atmosphere, oxygen is supplied to the oxide semiconductor film 32. This is preferable.

[0219] Furthermore, the etching process that forms the pair of electrodes 21 and 22 damages the multilayer film 34. As a result, oxygen vacancies occur on the back channel side of the multilayer film 34, but acid that satisfies the stoichiometric composition The oxygen contained in the oxide insulating film 24, which contains more oxygen than the element, repairs the oxygen vacancy. It can be restored. This can improve the reliability of transistor 66. .

[0220] In this way, in transistor 66, the side surface of the oxide semiconductor film 32 and A trap level is located near the interface between the oxide semiconductor film 32 and the oxide film 33 containing In or Ga. This can suppress the formation of the threshold voltage and reduce fluctuations in the threshold voltage.

[0221] Furthermore, the transistor 66 has an oxide film 33 containing In or Ga. To cover the sides (sides in the channel length direction) of the oxide film 31 and oxide semiconductor film 32 that contain It is provided in this manner (see Figure 10(C)). Therefore, the side of the oxide semiconductor film 32 This can reduce the leakage current flowing through the circuit and suppress the increase in off-current.

[0222] Furthermore, when forming the oxide film 31 and oxide semiconductor film 32 containing In or Ga (Figure See 10(B).), after the oxide semiconductor film 32 is formed, an acid containing In or Ga is used. In the etching process for forming the oxide film 31, an oxide film 31 containing In or Ga and The reaction product adheres to the side surface of the oxide semiconductor film 32, forming an oxide film containing In or Ga. In some cases, an oxide film 35 containing In or Ga (as shown in Figure 6(D)) may be formed. In this case, the oxide film 33 containing In or Ga covers the side surface of the oxide semiconductor film 32. It is formed by further covering it with an oxide film containing In or Ga.

[0223] <Modification 4> In the transistor 60 shown in this embodiment, the multilayer film 34 and the pair of electrodes 21, 22 The layered structure can be modified as appropriate. For example, as an example of modification, see the tra It can be made into a 67.

[0224] A top view of transistor 67 is shown in Figure 12(A). In Figure 12(A), the dashed line A A cross-sectional view between -B is shown in Figure 12(B), and a cross-sectional view between the dashed-dotted line CD is shown in Figure 12(C). Note that in Figure 12(A), for clarity, the substrate 11, gate insulating film 17, and protective film 26 are shown separately. The "do" is omitted.

[0225] Transistor 67 is the same as transistor 66 shown in Figure 10(B), in which In or G An oxide film 33 containing a is provided so as to cover a pair of electrodes 21 and 22, and I The edges of the oxide film 33 containing n or Ga are located on the pair of electrodes 21 and 22. In transistor 67, the stacked structure of the other components is the same as the stacked structure of transistor 66. It is the same as this.

[0226] As shown in Figure 12(C), transistor 67 has an oxide film 3 containing In or Ga. 3 has an oxide film 31 containing In or Ga on the side surface intersecting the channel width direction. It is provided so as to cover the side surface of the oxide semiconductor film 32. Therefore, the oxide semiconductor This reduces the leakage current flowing along the side of the film 32 and suppresses the increase in off-current. It is possible.

[0227] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0228] (Embodiment 3) In this embodiment, a transistor with a different structure from that of Embodiments 1 and 2 is used. Next, we will explain using Figure 13. The transistor 70 shown in this embodiment is an oxide semiconductor film It is characterized by having multiple gate electrodes that face each other via a barrier.

[0229] The transistor 70 shown in Figure 13 has a gate electrode 15 provided on the substrate 11. Furthermore, a gate insulating film 17 is formed on the substrate 11 and the gate electrode 15, and the gate insulating film 1 7 connects to the multilayer film 20 that overlaps with the gate electrode 15, and to a pair of electrodes 21 that are in contact with the multilayer film 20. It has , 22 and . The multilayer film 20 is an oxide semiconductor film 18 and In or Ga It includes an oxide film 19, a gate insulating film 17, a multilayer film 20, and a pair of electrodes 21. On 22, there is an oxide insulating film 23, an oxide insulating film 24, and a nitride insulating film 25. A protective film 26 is formed. Also, the gate electrode is superimposed with the multilayer film 20 via the protective film 26. It has 61.

[0230] The gate electrode 61 can be formed in the same manner as the gate electrode 15 shown in Embodiment 1. .

[0231] The transistor 70 shown in this embodiment has opposing gate electrodes 15 across the multilayer film 20. and has a gate electrode 61. Different potentials are applied to the gate electrode 15 and the gate electrode 61. This allows the threshold voltage of transistor 70 to be controlled.

[0232] Furthermore, by having a multilayer film 20 having an oxide semiconductor film 18 with reduced oxygen vacancy, This makes it possible to improve the electrical characteristics of the transistor. Also, the threshold voltage fluctuation amount This results in a transistor with fewer defects and therefore greater reliability.

[0233] The oxide semiconductor film disclosed in the above embodiment can be formed by sputtering. However, it may also be formed by other methods, such as thermal CVD. MOC is an example of a thermal CVD method. VD(Metal Organic Chemical Vapor Depositi) You can also use the ON method or the ALD (Atomic Layer Deposition) method. stomach.

[0234] Thermal CVD is a film deposition method that does not use plasma, so defects can occur due to plasma damage. It has the advantage of never being accomplished.

[0235] Thermal CVD is a method in which the chamber is subjected to atmospheric pressure or reduced pressure, and the raw material gas and oxidizer are simultaneously processed. The film is formed by sending the material into a chamber, reacting it near or on the substrate, and depositing it onto the substrate. You may go.

[0236] Furthermore, the ALD method maintains atmospheric pressure or reduced pressure inside the chamber, and the raw material gas for the reaction is The gases are introduced into the chamber sequentially, and film deposition can be performed by repeating this gas introduction sequence. For example, by switching between each switching valve (also called a high-speed valve), two types or less The above raw material gases are supplied to the chamber in order, and the first is supplied in order to prevent the mixing of multiple types of raw material gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the raw material gas. A second raw material gas is introduced. If an inert gas is introduced at the same time, the inert gas is... It acts as a carrier gas, and also when introducing a second raw material gas, an inert gas is introduced at the same time. Good. Also, instead of introducing an inert gas, the first source gas was removed by vacuum evacuation. Later, a second raw material gas may be introduced. The first raw material gas is adsorbed onto the surface of the substrate and the first single An atomic layer is formed, and it reacts with a second source gas introduced later to form a second single atomic layer. Thin films are formed by stacking on a single atomic layer. By controlling the gas introduction sequence, the desired thickness is achieved. By repeating the process multiple times until the desired result is achieved, a thin film with excellent step coverage can be formed. The thickness can be adjusted by the number of times the gas introduction sequence is repeated, thus enabling precise film thickness. It is adjustable and suitable for fabricating minute FETs.

[0237] Thermal CVD methods such as MOCVD and ALD, as disclosed in the embodiments described above. It is possible to form oxide semiconductor films, for example, by the MOCVD method, InGaZnO X ( When forming a film (X>0), trimethylindium, trimethylgallium, and diene Use zinc trimethylindium. The chemical formula for trimethylindium is (CH3)3In. Furthermore, the chemical formula for trimethylgallium is (CH3)3Ga. Also, diethylzinc The chemical formula is (CH3)2Zn. Furthermore, it is not limited to these combinations, but also includes trimethyl Triethylgallium (chemical formula (C2H5)3Ga) can also be used instead of gallium. Furthermore, dimethylzinc (chemical formula (C2H5)2Zn) can be used instead of diethylzinc. Cut.

[0238] For example, oxide semiconductor films, such as InGaZnO, can be deposited using an ALD (Advanced Laser Deposition) system. X ( When depositing a film (X>0), In(CH3)3 gas and O3 gas are introduced sequentially and repeatedly. Then an InO2 layer is formed, and after that, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form Ga An O layer is formed, and then Zn(CH3)2 gas and O3 gas are simultaneously introduced to form a ZnO layer. Form. Note that the order of these layers is not limited to this example. Also, mix these gases and I Mixtures of nGaO2 layer, InZnO2 layer, GaInO layer, ZnInO layer, GaZnO layer, etc. A compound layer may be formed. Alternatively, instead of O3 gas, an inert gas such as Ar may be used for bubbling. While the H2O gas obtained may be used, it is preferable to use O3 gas that does not contain H. Alternatively, In(C2H5)3 gas may be used instead of In(CH3)3 gas. Ga(C2H5)3 gas may be used instead of Ga(CH3)3 gas. Also, In( In(C2H5)3 gas may be used instead of CH3)3 gas. Also, Zn(CH3 )2 gases may also be used.

[0239] Furthermore, the configuration and methods shown in this embodiment are similar to those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0240] (Embodiment 4) In this embodiment, the transistors included in the semiconductor device described in the above embodiment are used. In this context, one embodiment applicable to oxide semiconductor films will be described.

[0241] Oxide semiconductor films include amorphous oxide semiconductors, single-crystal oxide semiconductors, and polycrystalline oxide semiconductors. It can be made into a body. Also, an oxide semiconductor film is an oxide semiconductor (CA) having a crystalline portion. It may also be configured as AC-OS.

[0242] CAAC-OS film is one of the oxide semiconductor films having multiple crystalline regions, and most The crystalline portion is small enough to fit within a cube with sides less than 100 nm. Therefore, CAAC- The crystalline portion contained in the OS film is within a cube with sides less than 10 nm, less than 5 nm, or less than 3 nm. This also includes cases where the size fits within the given space. CAAC-OS films have fewer defects than microcrystalline oxide semiconductor films. It is characterized by a low void density. A detailed explanation of the CAAC-OS membrane follows. .

[0243] CAAC-OS film is examined using a transmission electron microscope (TEM). When observed with a tron ​​microscope, a clear boundary between crystalline parts is observed, i.e. The grain boundaries (also called crystal grain boundaries) cannot be identified. Therefore, C AAC-OS films are less susceptible to the decrease in electron mobility caused by grain boundaries.

[0244] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM view). (Inference) It can be confirmed that in the crystalline part, metal atoms are arranged in layers. Each of these layers has irregularities on the surface (also called the surface to be formed) or the upper surface that forms the CAAC-OS film. The shape reflects this, and the elements are arranged parallel to the surface or top surface of the CAAC-OS film.

[0245] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T). EM observation revealed that in the crystalline region, metal atoms are arranged in a triangular or hexagonal shape. This can be confirmed. However, no regularity is observed in the arrangement of metal atoms between different crystalline regions. stomach.

[0246] Cross-sectional TEM observation and planar TEM observation revealed that the crystalline portion of the CAAC-OS film exhibits orientation. You can tell they are there.

[0247] X-ray diffraction (XRD) of CAAC-OS film When structural analysis is performed using the instrument, for example, CAAC-OS having InGaZnO4 crystals is found. Out-of-plane analysis of the film showed a peak at a diffraction angle (2θ) of around 31°. This peak may appear. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have c-axis orientation, and the c-axis is generally aligned with the surface to be formed or the upper surface. It can be confirmed that it is facing in a nearly vertical direction.

[0248] On the other hand, in the CAAC-OS film, X-rays are incident from a direction approximately perpendicular to the c-axis in an in-p In analysis using the lane method, a peak may appear when 2θ is around 56°. This is attributed to the (110) plane of the InGaZnO4 crystal. For a crystalline semiconductor film, fix 2θ to approximately 56° and use the normal vector of the sample surface as the axis (φ axis). When the analysis (φ scan) is performed while rotating the sample, a crystal plane equivalent to the (110) plane is found. Six peaks attributable to this are observed. In contrast, in the case of the CAAC-OS film, 2θ Even when fixed at approximately 56° and scanned using the φ scan function, no clear peak appears.

[0249] From the above, it can be concluded that in CAAC-OS films, the orientation of the a-axis and b-axis is inconsistent between different crystalline regions. It is a rule, but it has c-axis orientation and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. It can be seen that they are facing in a particular direction. Therefore, they are arranged in layers as confirmed by the aforementioned cross-sectional TEM observation. Each layer of metal atoms is a plane parallel to the ab-plane of the crystal.

[0250] The crystalline portion is formed when the CAAC-OS film is deposited, or when crystallization treatment such as heat treatment is performed. It is formed when this occurs. As mentioned above, the c-axis of the crystal is the surface on which the CAAC-OS film is formed or It is oriented in a direction parallel to the normal vector of the upper surface. Therefore, for example, the shape of the CAAC-OS film When altered by etching or other means, the c-axis of the crystal becomes the surface on which the CAAC-OS film is formed or The vector may not be parallel to the normal vector of the top surface.

[0251] Furthermore, the degree of crystallinity in the CAAC-OS film does not need to be uniform. For example, CAAC-OS When the crystalline portion of the film is formed by crystal growth from near the upper surface of the CAAC-OS film, The region near the surface may have a higher degree of crystallinity than the region near the surface being formed. Also, CA When impurities are added to an AC-OS film, the degree of crystallinity in the region where the impurities are added changes, and Regions with varying degrees of crystallinity may also be formed.

[0252] Furthermore, the out-of-plane CAAC-OS film having InGaZnO4 crystals Analysis using this method revealed that in addition to the peak near 2θ = 31°, there is also a peak near 2θ = 36°. In some cases, this may occur. Peaks near 2θ of 36° indicate c-axis orientation in a portion of the CAAC-OS film. This indicates the presence of crystals that do not possess properties. The CAAC-OS film has a 2θ of approximately 31°. It is preferable that a peak is shown and that no peak is shown near 36° for 2θ.

[0253] There are three methods for forming the CAAC-OS film.

[0254] The first method involves setting the film deposition temperature to 150°C or higher and 500°C or lower, preferably 150°C or higher and 450°C or lower. The oxide semiconductor film is formed at a temperature of 200°C or lower, more preferably between 200°C and 350°C. As a result, the c-axis of the crystalline portion contained in the oxide semiconductor film becomes the normal vector of the formed surface or the surface This method forms crystal regions aligned in a direction parallel to the normal vector of the crystal.

[0255] The second method involves depositing an oxide semiconductor film to a thin thickness, followed by heating at a temperature between 200°C and 700°C. By performing heat treatment, the c-axis of the crystalline portion contained in the oxide semiconductor film becomes the normal vector of the surface to be formed. This method forms crystal regions aligned in a direction parallel to the normal vector of the crystal or surface.

[0256] The third method involves depositing a thin first layer of oxide semiconductor film, followed by heating at 200°C or above 700°C. By performing heat treatment below °C and then depositing a second oxide semiconductor film, the oxide semiconductor The c-axis of the crystalline portion contained in the body membrane is parallel to the normal vector of the surface being formed or the surface normal vector. This is a method for forming crystal regions aligned in the direction of grain.

[0257] Transistors with CAAC-OS applied to oxide semiconductor films are resistant to visible light and ultraviolet light irradiation. The variation in electrical properties is small. Therefore, applying CAAC-OS to oxide semiconductor films results in a small change in performance. The generator has good reliability.

[0258] Furthermore, CAAC-OS is used as a target for sputtering oxide semiconductors, such as polycrystalline ones. The film is deposited using a sputtering method. When the particles collide, the crystalline region contained in the sputtering target is cleaved from the ab plane. , peeled off as flat or pellet-shaped sputtering particles having a surface parallel to the ab plane. This can happen. In this case, the plate-shaped or pellet-shaped sputtered particles may become crystals. By maintaining its state, CAAC-OS can be deposited on the surface to be formed. .

[0259] Furthermore, it is preferable to apply the following conditions for forming the CAAC-OS film.

[0260] By reducing the inclusion of impurities during film formation, it is possible to suppress the disruption of the crystalline state due to impurities. For example, the concentration of impurities present in the deposition chamber (such as hydrogen, water, carbon dioxide, and nitrogen) can be measured. It would be good to reduce it. Also, it would be good to reduce the impurity concentration in the film formation gas. Specifically, the dew point is A film-forming gas at a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0261] Also, by increasing the heating temperature of the surface to be formed during film formation (for example, the substrate heating temperature), migration of sputtering particles occurs after reaching the surface to be formed. Specifically, film formation is carried out with the temperature of the surface to be formed being 100°C or higher and 740°C or lower, preferably 200°C or higher and 500°C or lower. When flat or pellet-shaped sputtering particles reach the surface to be formed, migration occurs on the surface to be formed, and the flat surface of the sputtering particles adheres to the surface to be formed.

[0262]

[0263]

[0264]

[0265] InO X powder, GaO Y powder, and ZnO Z powder are mixed in a predetermined number of moles, and after pressure treatment <000%2177>

[0265]

[0266] However, 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, 3:1:2, 1: The ratios are 3:2, 1:6:4, or 1:9:6. Note that the type of powder and the amount of powder used in the mixture may vary. The ol ratio can be adjusted as appropriate depending on the sputtering target being fabricated.

[0265] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0266] (Embodiment 5) A semiconductor device having a display function using the transistor shown as an example in the above embodiment ( It can also be used to manufacture a display device. Alternatively, the entire system can be integrally formed on the same substrate as the pixel section to form a system-on-panel. Yes, it is possible. In this embodiment, a display device using a transistor, as exemplified in the above embodiment, Examples of placement will be explained using Figures 14 and 15. Note that Figures 15(A) and 15( B) is a cross-sectional view showing the cross-sectional structure of the area indicated by the dashed line MN in Figure 14(B). .

[0267] In Figure 14(A), the pixel portion 902 provided on the first substrate 901 is surrounded by A sealing material 905 is provided and sealed by the second substrate 906. Figure 14(A In this case, the area is different from the area surrounded by the sealing material 905 on the first substrate 901. In the region, a signal line formed of a single-crystal semiconductor or polycrystalline semiconductor on a separately prepared substrate. A drive circuit 903 and a scan line drive circuit 904 are implemented. Also, a signal line drive circuit 9 03. Various signals and potentials are supplied to the scan line drive circuit 904 or the pixel unit 902, F Supplied from PC (Flexible Printed Circuit) 918 .

[0268] In Figures 14(B) and 14(C), the pixel portion 90 is provided on the first substrate 901. A sealing material 905 is provided so as to surround 2 and the scan line drive circuit 904. A second substrate 906 is provided on top of the pixel section 902 and the scan line driving circuit 904. The pixel section 902 and the scan line driving circuit 904 are connected to the first substrate 901 and the sealing material 905. The display element is sealed together with the second substrate 906. Figures 14(B) and 14 In (C), the region surrounded by the sealing material 905 on the first substrate 901 is Signals formed on a separate substrate in different regions using single-crystal or polycrystalline semiconductors. The signal drive circuit 903 is implemented. In Figures 14(B) and 14(C), the signal Various signals are supplied to the line drive circuit 903, the scan line drive circuit 904, or the pixel unit 902. The potential is supplied from FPC918.

[0269] Furthermore, in Figures 14(B) and 14(C), a signal line drive circuit 903 is formed separately. An example is shown where the first board 901 is mounted, but the configuration is not limited to this. The drive circuit may be formed and implemented separately, or it may be part of the signal line drive circuit or scan line drive circuit. It is also acceptable to separately form and implement only a portion of it.

[0270] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG(C The hip-on-glass (hip-on-glass) method, or the wire bonding method, or TAB (Ta Methods such as Automated Bonding can be used. (Figure 14) A) is an example in which the signal line drive circuit 903 and scan line drive circuit 904 are implemented using the COG method. Yes, Figure 14(B) shows an example of implementing the signal line drive circuit 903 using the COG method. 14(C) is an example of implementing the signal line drive circuit 903 using the TAB method.

[0271] Furthermore, the display device includes a panel in which the display elements are sealed, and a control on the panel This includes modules that have ICs, etc., mounted on them, including those containing R.

[0272] In this specification, a display device refers to an image display device or a light source (including an illumination device). .) refers to a module to which a connector, such as an FPC or TCP, is attached. A module with a printed circuit board located at the end of the TCP, or a COG system for the display element. Therefore, all modules on which ICs (integrated circuits) are directly mounted are also included as display devices.

[0273] Furthermore, the pixel section and scan line driving circuit provided on the first substrate have multiple transistors Therefore, the transistor shown in the above embodiment can be applied.

[0274] Display elements used in display devices include liquid crystal elements (also called liquid crystal display elements) and light-emitting elements. A light-emitting element (also called a display element) can be used. The light-emitting element is controlled by current or voltage. This category includes elements whose brightness is controlled, specifically inorganic EL (Electrical LEDs). This includes Luminescence elements, organic EL elements, etc. Also, electronic inks. Furthermore, display media in which the contrast changes due to electrical effects can also be applied. (Figure 15) (A) shows an example of a liquid crystal display device using liquid crystal elements as display elements, and Figure 15(B) shows, An example of a light-emitting display device using a light-emitting element as a display element is shown.

[0275] As shown in Figures 15(A) and 15(B), the display device has a connection terminal electrode 915 and terminals It has an electrode 916, and the connecting terminal electrode 915 and terminal electrode 916 are provided by the FPC918 It is electrically connected to the terminal via an anisotropic conductive agent 919.

[0276] The connecting terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 It is formed of the same conductive film as the pair of electrodes of transistors 910 and 911.

[0277] Furthermore, the pixel section 902 and the scanning line driving circuit 904 provided on the first substrate 901 are It has multiple transistors, and in Figures 15(A) and 15(B), they are included in the pixel section 902. For example, transistor 910 and transistor 911 included in the scan line drive circuit 904 This is shown. In Figure 15(A), transistors 910 and 911 have an insulating layer. An edge film 924 is provided, and in Figure 15(B), a planarization film 921 is further provided on the insulating film 924. It is provided. Furthermore, in transistors 910 and 911, oxide semiconductor The multilayer film 926 having a body film is a multilayer film 20 having an oxide semiconductor film as shown in Embodiment 1. Alternatively, a multilayer film 34 having the oxide semiconductor film shown in Embodiment 2 can be used as appropriate. The insulating film 924 can be the protective film 26 shown in Embodiment 1 as appropriate. 23 is an insulating film that functions as a base layer.

[0278] In this embodiment, transistors 910 and 911 are as described in the above embodiment. The transistors shown can be applied as appropriate. Transistor 910 and Transistor As TA911, use the transistor shown in any one of Embodiments 1 to 3. This makes it possible to create high-resolution display devices.

[0279] Furthermore, in Figure 15(B), a transistor 91 for the drive circuit is located on the planarized film 921. This example shows a conductive film 917 provided in a position that overlaps with the channel region of the multilayer film 926. In this embodiment, the conductive film 917 is formed from the same conductive film as the first electrode 930. By providing the conductive film 917 in a position that overlaps with the channel region of the multilayer film 926, BT S Further reducing the fluctuation in the threshold voltage of transistor 911 before and after the Tress test. This is possible. Also, the potential of the conductive film 917 is the same as that of the gate electrode of transistor 911. It's fine if they're different, and the conductive film can even function as a second gate electrode. Furthermore, the potential of the conductive film 917 is GND, 0V, floating state, or drive circuit The lowest potential (Vss, for example, the potential of the source electrode when the potential of the source electrode is used as the reference) It may be an electric potential or an equivalent electric potential.

[0280] Furthermore, the conductive film 917 also has the function of shielding against external electric fields. In other words, when an external electric field is present inside... A function to prevent it from affecting (circuit parts including transistors) (especially electrostatic shielding against static electricity). It also has a shielding function. Due to the shielding function of the conductive film 917, it is protected from the influence of external electric fields such as static electricity. This prevents fluctuations in the electrical characteristics of the transistor. The conductive film 917 is This is applicable to any of the transistors shown in the above embodiment.

[0281] The transistor 910 provided in the pixel section 902 is electrically connected to the display element, and the display panel It constitutes the display. The display element is not particularly limited as long as it can display information, and various display elements can be used. It can be used.

[0282] In Figure 15(A), the liquid crystal element 913, which is a display element, has a first electrode 930, a second electrode It includes an electrode 931 and a liquid crystal layer 908. Furthermore, an alignment film is formed to sandwich the liquid crystal layer 908. An insulating film 932 and an insulating film 933 that function together are provided. In addition, the second electrode 931 is Provided on the substrate 906 side of 2, the first electrode 930 and the second electrode 931 are connected to the liquid crystal layer 908. It has a structure where elements overlap through each other.

[0283] Furthermore, the spacer 935 is a columnar spacer obtained by selectively etching the insulating film. Therefore, in order to control the distance (cell gap) between the first electrode 930 and the second electrode 931 It is provided in [location]. A spherical spacer may also be used.

[0284] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Liquid crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. These liquid crystal materials, depending on the conditions, can be classified into cholesteric phase, smectic phase, cubic phase, and It exhibits iralnematic phase, isotropic phase, etc.

[0285] Alternatively, a liquid crystal exhibiting a blue phase without an alignment layer may be used. The blue phase is one of the liquid crystal phases. Therefore, as the temperature of a cholesteric liquid crystal is increased, it transitions from the cholesteric phase to the isotropic phase. This is the phase that appears immediately before. The blue phase only appears within a narrow temperature range, so the temperature range needs to be modified. To improve performance, a liquid crystal composition mixed with a chiral agent is used in the liquid crystal layer. The liquid crystal exhibits a blue phase. A liquid crystal composition containing a chiral agent has a short response time of 1 msec or less and is optically isotropic. Therefore, alignment processing is unnecessary, and the viewing angle dependence is small. Furthermore, an alignment layer does not need to be provided. Therefore, rubbing is unnecessary, thus preventing electrostatic discharge damage caused by rubbing. This can be stopped, and defects and damage to liquid crystal displays during the manufacturing process can be reduced. This makes it possible to improve the productivity of liquid crystal display devices.

[0286] The first substrate 901 and the second substrate 906 are fixed together by a sealing material 925. The 925 material can be made of organic resins such as thermosetting resins and photocuring resins.

[0287] Furthermore, the transistor using the oxide semiconductor film used in the above embodiment is a switching transistor. It has excellent characteristics. Furthermore, because it can achieve relatively high field-effect mobility, high-speed operation is possible. Therefore, by using the above transistor in the pixel portion of a semiconductor device having a display function, This allows for the provision of high-quality images. Furthermore, the drive circuit or pixel section can be placed on the same substrate. Because it becomes possible to manufacture different types of semiconductor devices, the number of components in the semiconductor device can be reduced. ru.

[0288] The size of the retention capacitance provided in a liquid crystal display device depends on the number of transistors arranged in the pixel area. The charge is maintained for a predetermined period, taking into account the current and other factors. High-purity acid By using a transistor having a semiconductor film, the liquid crystal capacitance in each pixel can be adjusted. It is sufficient to provide a holding capacity having a size of 1 / 3 or less, preferably 1 / 5 or less of the total capacity. Therefore, it is possible to increase the aperture ratio in the pixels.

[0289] Furthermore, in a display device, a black matrix (light-shielding film), a polarizing member, a phase difference member, and Optical components (optical substrates) such as anti-radiation members shall be provided as appropriate. For example, polarizing substrates and phase difference Circular polarization using a substrate may also be used. Furthermore, backlights, sidelights, etc., may be used as light sources. You may use it.

[0290] Furthermore, the display method used in the pixel area may be a progressive or interlaced method. It is possible to do so. Also, the color elements controlled by pixels when displaying color include RGB(R It is not limited to the three colors (where G represents red, G represents green, and B represents blue). For example, RGBW (where W represents white). (This refers to RGB, or RGB with one or more additional colors such as yellow, cyan, and magenta.) Furthermore, the size of the display area for each dot of the color element may differ. However, this development One embodiment of the clarity is not limited to a color display device, but also includes a monochrome display device. It can also be applied to...

[0291] In Figure 15(B), the light-emitting element 963, which is a display element, is provided in the pixel section 902. It is electrically connected to transistor 910. The configuration of the light-emitting element 963 is as follows: The structure is a stacked structure of electrode 930, light-emitting layer 961, and second electrode 931, but is not limited to the configuration shown. No. The configuration of the light-emitting element 963 is appropriate to match the direction of the light extracted from the light-emitting element 963. It can be changed as appropriate.

[0292] The partition wall 960 is formed using an organic insulating material or an inorganic insulating material. In particular, photosensitive resin Using a lipid material, an opening is formed on the first electrode 930, and the side wall of the opening has a continuous curvature. It is preferable to form it so that it becomes an inclined surface with [a certain characteristic].

[0293] Even if the light-emitting layer 961 consists of a single layer, it is configured so that multiple layers are stacked. Either way is fine.

[0294] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 963, the second electrode 9 A protective layer may be formed on 31 and the partition wall 960. The protective layer may be a silicon nitride film, nitrile Silicon oxide film, aluminum oxide film, aluminum nitride film, aluminum oxide nitride film Aluminum nitride film, DLC film, etc. can be formed. Also, the first substrate 90 1. The space sealed by the second substrate 906 and the sealing material 936 contains a filler material 964. It is installed and sealed. In this way, it is highly airtight to prevent exposure to the outside air, and minimizes degassing. No protective film (laminated film, UV-curing resin film, etc.) or cover material Casing (enclosure) is preferable.

[0295] The sealant 936 contains organic resins such as thermosetting resins and photocuring resins, as well as free-flowing glass containing low-melting point glass. Frit glass can be used. Frit glass is suitable for use with impurities such as water and oxygen. It is preferable because it has high barrier properties. Also, when using frit glass as the sealing material 936 In addition, as shown in Figure 15(B), by providing frit glass on the insulating film 924, adhesion is improved. This is preferable because it can enhance the effect.

[0296] In addition to inert gases such as nitrogen and argon, filler 964 can also be UV-curing resin. Thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic resin, and Liimide, epoxy resin, silicone resin, PVB (polyvinyl butyral), or EVA (Ethylene vinyl acetate) can be used. For example, nitrogen can be used as a filler. Yes.

[0297] Additionally, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plates) may be placed on the emission surface of the light-emitting element. ), phase difference plates (λ / 4 plate, λ / 2 plate), color filters, and other optical films are appropriately provided. Alternatively, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, surface irregularities This allows for an anti-glare treatment that diffuses reflected light and reduces glare.

[0298] A first electrode and a second electrode (pixel electrode, common electrode, counter electrode) that apply voltage to the display element. In (also known as) the direction of the light extracted, the location where the electrodes are set, and the pattern of the electrodes You can choose between light transmission and reflectivity depending on the layer structure.

[0299] The first electrode 930 and the second electrode 931 are made of indium oxide containing tungsten oxide. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, acid Titanium oxide-containing indium tin oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide with added silicon oxide Electrical materials can be used.

[0300] Furthermore, the first electrode 930 and the second electrode 931 are made of tungsten (W) and molybdenum (Mo). ), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), Tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (T) i) Metals such as platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), or It can be formed using one or more types of the alloy or its metal nitride. ru.

[0301] Furthermore, the first electrode 930 and the second electrode 931 are made of conductive polymers. It can be formed using a conductive composition containing (also known as). Examples of conductive polymers include: So-called π-electron conjugated conductive polymers can be used. For example, polyaniline or Its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, or This refers to a copolymer or derivative thereof consisting of two or more elements: aniline, pyrrole, and thiophene. These are some examples.

[0302] Furthermore, transistors are susceptible to damage from static electricity, etc., so a protective circuit is needed to protect the drive circuit. It is preferable to provide a path. The protection circuit is preferably constructed using nonlinear elements.

[0303] As described above, by applying the transistor shown in the above embodiment, a display function is obtained. This enables the provision of highly reliable semiconductor devices.

[0304] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0305] (Embodiment 6) In this embodiment, a display device (touch panel and) equipped with a touch sensor (contact detection device) is provided. (Also known as.) The following explains this.

[0306] Figure 16 is a top view showing an example of the pixel configuration of the display device 900. Figure 17 is a top view of Figure 16. This is a cross-sectional view between the dotted lines OP. Note that in Figure 16, for clarity, some of the components have been removed. Details have been omitted. Furthermore, in this embodiment, the reference numerals used in Embodiment 5 will be used as appropriate in the explanation. ru.

[0307] The pixel portion includes at least a transistor 910 and a scan line including a gate electrode 972. , a signal line including one electrode 974 of a pair of electrodes 974, 975, and the first electrode 930, It has a second electrode 931 and a spacer 935 (see Figure 16).

[0308] The transistor 910 consists of a gate electrode 972, a gate insulating film 976, and a multilayer film 926. It has a pair of electrodes 974, 975 and an insulating film 924. The gate electrode 972 is the first It is provided on the insulating film 923 which functions as an underlayer on the substrate 901. Gate insulating film 9 76 is provided on the gate electrode 972, and the multilayer film 926 overlaps with the gate electrode 972. The pair of electrodes 974 and 975 are arranged on the gate insulating film 976, and the multilayer film 9 The insulating film 924 is provided on 26, and the multilayer film 926 and the pair of electrodes 974, 975 It is located at the top (see Figure 17).

[0309] Furthermore, an organic resin film 945 is provided on the insulating film 924. A second electrode 931 is provided which functions as a common electrode. Organic resin film 945 and An insulating film 937 is provided on electrode 931. Insulating film 924, insulating film 937, The resin film 945 is provided with an opening that reaches the electrode 975, and the opening and the insulating film 93 A first electrode 930, which functions as a pixel electrode, is provided on 7 (see Figure 17). In other words, the first electrode 930, which functions as a pixel electrode, is one of a pair of electrodes 974, 975. It is electrically connected to it.

[0310] Furthermore, an alignment film is applied to the insulating film 937 and the first electrode 930 which functions as a pixel electrode. A functional insulating film 932 is provided. The second substrate 906 faces the first substrate 901. An insulating film 933, which functions as an alignment film, is provided on the surface, and A liquid crystal layer 908 is provided between the insulating film 932 and the insulating film 933. Optical components may be provided in addition to the elements as appropriate. For example, the first substrate 901 and the second substrate 9 A polarizing plate can be provided on the outside of 06.

[0311] Furthermore, the display device 900 is equipped with a capacitive sensor as a touch sensor. An electrode 941 is provided on the outside of the substrate 906. The polarizing plate is placed between the electrode 941 and the second substrate 906.

[0312] The second electrode 931, which functions as a common electrode on the first substrate 901 side, is a common electrode of the pixel and It functions as one of the electrodes of the capacitive element of the touch sensor. Electrode 941 is of the touch sensor It functions as the other electrode of the capacitive element. Also, the pixel section of the display device 900 is in FFS mode. Because a pixel structure is employed, no conductive film is formed on the second substrate 906 side. The electrode 941 functions as an antistatic conductor for the second substrate 906.

[0313] Transistor 910 is made of the same materials and methods as transistor 50 described in Embodiment 1. It can be formed by the method. That is, gate electrode 972, gate insulating film 976, multilayer film 926, one pair Each of the electrodes 974, 975 and insulating film 924 is a transient as described in Embodiment 1. 50 gate electrode 15, gate insulating film 17, multilayer film 20, pair of electrodes 21, 22, retaining It can be formed using the same materials and methods as for each of the protective films 26.

[0314] Furthermore, the signal line driving circuit of the display device 900 and One or both of the scan line driving circuits can be fabricated. For example, a signal line driving circuit and Transistors and diodes included in one or both of the scan line drive circuits, and FPC It is possible to create wiring for connections to terminals such as those mentioned above.

[0315] The organic resin film 945 is applied to the planarization film 921 or partition wall 960 described in Embodiment 5. It can be formed using available materials and manufacturing methods. The insulating film 937 is a transistor Applicable materials for insulating films included in 910 (such as gate insulating film 976 or insulating film 924) It can be formed using materials and manufacturing methods.

[0316] Furthermore, electrode 975 is one of a pair of electrodes 974 and 975, and the pixel electrode is The first electrode 930 that functions is connected to the insulating film 924, insulating film 937, and organic resin film 945. They are in contact through an opening. This opening is resisted by a photolithography process or the like. It can be formed by forming a resist mask and etching using the resist mask. Specifically, the process involves etching a portion of the insulating film 924 and the organic resin film 945, and insulating It is formed by a process of etching a portion of the film 937.

[0317] Figure 18(A) shows a pair of electrodes 974 and 975 and a wiring 977 that is electrically connected to them, and a common This shows a cross-sectional view of an example of a connection structure to which a second electrode 931, which functions as an electrode, is connected. The wiring 977 and the second electrode 931, which functions as a common electrode, are connected by an insulating film 924 and an organic resin. It is in contact with the film 945 through an opening. In this way, potential is supplied to the wiring 977. By supplying this potential, the second electrode 931, which functions as a common electrode, can be supplied with potential. Furthermore, the wiring 977 can be formed using the manufacturing process of the pair of electrodes 974 and 975. Cut.

[0318] Figure 18(B) also shows an example of the wiring connection structure at the terminal section connected to an FPC, etc. A cross-sectional view is shown. The electrode 979 is provided in the insulating film 924 and the organic resin film 945 at an opening. It is in contact with the wiring 977 and is provided on the gate insulating film 976, insulating film 924 and organic resin film 945. The opening is in contact with the wiring 978. This provides potential to the wiring 978. By supplying power, potential can be supplied to wiring 977. Wiring 978 is the gate electrode. It can be formed using the 972 manufacturing process.

[0319] As shown in Figure 18(B), the electrode 979 connects the wiring 977 and the wiring 978. By doing so, compared to creating a connection where wiring 977 and wiring 978 are in direct contact, One less mask can be used. This is because wiring 977 and wiring 978 are in direct contact. To create such a connection structure, before forming the pair of electrodes 974 and 975, the gate insulating film is formed. A photomask is needed to form a contact hole at 976, as shown in Figure 18(B). This is because the photomask is not required for the connection structure.

[0320] Furthermore, instead of the transistor 910 shown in Figure 17, a multi-level mask is used as shown in Figure 19. By fabricating transistor 912, it is possible to reduce the number of photomasks. A multi-gradation mask is a mask that allows exposure at multiple levels of light intensity, and typically... Exposure is performed using three levels of light intensity: an exposed area, a partially exposed area, and an unexposed area. A multi-gradation mask is used. By using this method, multiple (typically two) thicknesses can be achieved in a single exposure and development process. A resist mask can be formed. Therefore, by using a multi-level mask, The number of photomasks can be reduced. Specifically, the multilayer film 927 and the pair of electrodes. In the formation process of 928 and 929, by using a multi-gradation mask, one photomask is required. It can be reduced. Furthermore, by using a multi-gradation mask, a pair of electrodes 928, 929 The edge of the multilayer film 927 is located outside the edge of the other edge.

[0321] Figure 20 shows the second electrode 931 and electrode 94, which function as common electrodes for the display device 900. This is a plan view showing an example configuration of 1. As shown in Figure 20, the second electrode functions as a common electrode. Electrode 931 and electrode 941 have a stripe-like shape and function as a second common electrode. Pole 931 and electrode 941 are arranged orthogonally in a plane. As each common electrode The functional second electrode 931 was attached to the substrate 901 by routing wires 951. Each electrode 941 is connected to the FPC954 and routed to the substrate 906 via wiring 952. It is connected to the attached FPC955.

[0322] Figure 21(A) is a cross-sectional view of Figure 20 shown by the dashed line QR, and Figure 21(B) is a cross-sectional view of Figure 20. This is a plan view of region 953 of 0. As shown in Figure 21(A), it functions as a common electrode. The second electrode 931 is provided in common to multiple pixels and functions as a pixel electrode. The first electrode 930 is provided for each pixel and is connected to the transistor 910. Touch sensor in the region where the second electrode 931, which functions as a common electrode, and electrode 941 intersect. A capacitance element is formed. The capacitance element has a second electrode 9 that functions as a common electrode. Between 31, electrode 941, and the second electrode 931 and electrode 941 which function as a common electrode It is composed of a dielectric material provided. The second electrode 931, which functions as a common electrode, is an electrostatic dielectric This is an electrode for supplying potential to a capacitance element. Electrode 941 takes the current flowing through the capacitance element. These are electrodes for generating the gas.

[0323] The operation of the display device 900 involves a display operation that inputs video signals to pixels and a sensor that detects contact. It can be broadly classified into single operations. During display operation, the second electrode 931, which functions as a common electrode, The position is fixed at a low level. During the sensing period, the second electrode functions as a common electrode. A pulse signal is sequentially applied to electrode 931, and its potential is set to a high level. At this time, When a finger is in contact with the display device 900, the capacitance formed by the finger contact is the touch sensor Because it is applied to the capacitive element, the current flowing through the capacitive element changes, and the potential of electrode 941 changes. The electrode 941 is scanned sequentially, and the change in potential of the electrode 941 is detected, thereby changing the contact of the finger. The touch location is detected.

[0324] As described above, in a display device having liquid crystal elements, the capacitance of the display device 900 is configured The electrodes used were the conductive antistatic electrodes originally provided in the FFS mode liquid crystal display device. Because it can use common electrodes for the body and pixels, it is lightweight, thin, and has high display quality. It is possible to provide a panel.

[0325] In this case, the second electrode 931, which functions as a common electrode, also functions as a pixel electrode. An example was shown where the first electrode 930 is located below (on the side of the first substrate 901), but the common electric A second electrode 931, which functions as a pole, is placed above the first electrode 930, which functions as a pixel electrode. It is also possible to write it.

[0326] Note that the structure of the display device may be different from the display device 900 shown in this embodiment. Good. For example, by forming a capacitance and using a touch panel substrate as a liquid crystal display or light-emitting display device. An external touch panel that is attached to the first circuit board 901 or the second circuit board 906. It is also possible to attach a band to the outside of the first substrate 901 or the second substrate 906. Using a conductive film for static electricity prevention, surface capacitive type A touch sensor can also be configured. Below, using Figures 22 and 23, an external touch sensor can be configured. This section describes an example configuration of a touch sensor applied to a touch panel.

[0327] Figure 22(A) is an exploded perspective view showing an example of the configuration of a touch sensor, and Figure 22(B) is a different view. Figure 22(C) is a plan view showing an example configuration of the electrode 981 of the touch sensor. This is a plan view showing an example configuration of electrode 982.

[0328] As shown in Figures 22(A) to 22(C), the touch sensor 980 is located on the substrate 986. Multiple electrodes 981 arranged in the X-axis direction, and arranged in the Y-axis direction intersecting the X-axis direction Multiple electrodes 982 are formed.

[0329] Electrodes 981 and 982 each have a structure in which multiple quadrilateral-shaped conductive films are connected. The multiple electrodes 981 and multiple electrodes 982 are positioned at the quadrilateral portion of the conductive film. They are arranged so as not to overlap. At the intersection of electrode 981 and electrode 982, An insulating film is provided between electrode 981 and electrode 982 to prevent contact between them.

[0330] Figure 23(A) is a cross-sectional view illustrating an example of the connection structure of electrodes 981 and 982. Figure 23(B) shows an example of a cross-sectional view of the point where electrodes 981 and 982 intersect. This is the equivalent circuit diagram of the intersection of electrode 981 and electrode 982. As shown in Figure 23(B) Furthermore, a capacitance 983 is formed at the intersection of electrode 981 and electrode 982.

[0331] As shown in Figure 23(A), in the sensor unit 989, the electrode 981 is the first conductive film The structure consists of 981a and the conductive film 981b, and the second conductive film 981c on the insulating film 985. The conductive film 981a and conductive film 981b are connected by conductive film 981c. Electrode 982 is formed by the first conductive film layer. Electrode 981, electrode 982, and electrode The insulating film 991 is formed covering 984 and the insulating film 985. For example, a silicon oxide film, a silicon oxide nitride film, or the like can be formed as the insulating film 991. Furthermore, an underlayer insulating film may be formed between the substrate 986 and electrodes 981 and 984. For example, silicon oxide films, silicon oxide nitride films, etc., can be formed as the insulating film. Cut.

[0332] Electrodes 981 and 982 are formed from a conductive material that is transparent to visible light. For example, as a light-transmitting conductive material, indium tin oxide containing silicon oxide, oxide Examples include indium tin, zinc oxide, indium zinc oxide, and zinc oxide with added gallium. .

[0333] The conductive film 981a is connected to the electrode 984 at the terminal portion 990. The electrode 984 is , forming a terminal for connection to the FPC. Electrode 982, like electrode 981, also forms a terminal for connection to the other electrode 984. It is connected to the electrode 984, which can be formed from, for example, a tungsten film.

[0334] In order to electrically connect electrode 984 and FPC, insulating film 985 and insulating film on electrode 984 are used. An opening is formed in the edge film 991. On the insulating film 991, the substrate 987 is bonded with an adhesive or It is attached with adhesive film or the like. The substrate 986 is attached with adhesive or adhesive film. By attaching it to the first substrate 901 or the second substrate 906 of the display device, the touch panel The structure is formed.

[0335] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0336] (Embodiment 7) This embodiment describes a driving method for reducing the power consumption of a display device. The driving method of this embodiment allows a display device in which oxide semiconductor transistors are applied to the pixels. Further reductions in power consumption can be achieved. The following uses Figures 24 and 25 to illustrate the display device. As an example, we will explain how to reduce the power consumption of liquid crystal display devices.

[0337] Figure 24 is a block diagram showing an example configuration of the liquid crystal display device according to this embodiment. As such, the liquid crystal display device 500 has a liquid crystal panel 501 as a display module, and further It has a control circuit 510 and a counter circuit.

[0338] The liquid crystal display device 500 receives digital data, namely image signals (Video) and liquid crystal particles. A synchronization signal (SYNC) is input to control the screen refresh of the NEL501. Examples of signals include horizontal synchronization signals (Hsync), vertical synchronization signals (Vsync), and There is a reference clock signal (CLK), etc.

[0339] The liquid crystal panel 501 includes a display unit 530, a scan line drive circuit 540, and a data line drive circuit 5 It has 50. The display unit 530 has multiple pixels 531. Pixels 531 in the same row are shared The same scan line 541 is connected to the scan line drive circuit 540, and the pixels 531 in the same column are common Data line 551 is connected to data line drive circuit 550.

[0340] The liquid crystal panel 501 has a common voltage (hereinafter referred to as Vcom) and a power supply voltage. High power supply voltage (VDD) and low power supply voltage (VSS) are supplied. Common voltage (Vcom ) is supplied to each pixel 531 of the display unit 530.

[0341] The data line drive circuit 550 processes the input image signal and generates a data signal. The scan line drive circuit 540 outputs a data signal to the TA line 551. A scanning signal is output to scan line 541 to select pixel 531.

[0342] Pixel 531 is a switch whose electrical connection to data line 551 is controlled by a scan signal. It has a switching element. When the switching element is turned on, data line 551 is transmitted to pixel 531. The data signal is written.

[0343] The electrode to which Vcom is applied corresponds to the common electrode.

[0344] The control circuit 510 is a circuit that controls the entire liquid crystal display device 500. It includes a circuit that generates control signals for the circuits that constitute 0.

[0345] The control circuit 510 receives the synchronization signal (SYNC) and then controls the scan line drive circuit 540 and the data line drive circuit. It has a control signal generation circuit that generates control signals for the motion circuit 550. Scan line drive circuit 540 Control signals include the start pulse (GSP) and the clock signal (GCLK), and data The control signals for the wire drive circuit 550 are a start pulse (SSP) and a clock signal (SC). Examples include LK, etc. For example, the control circuit 510 uses clock signals (GCLK, SCLK) This generates multiple clock signals with the same period but shifted phases.

[0346] Furthermore, the control circuit 510 receives an image signal (Vide) input from outside the liquid crystal display device 500. o) Output control to the data line drive circuit 550.

[0347] The data line drive circuit 550 is a digital-to-analog conversion circuit (hereinafter referred to as the DA conversion circuit 55) It is called 2.) The DA conversion circuit 552 converts the image signal to analog and the data signal Generate a number.

[0348] Furthermore, if the image signal input to the liquid crystal display device 500 is an analog signal, the control cycle The signal is converted to a digital signal via channel 510 and output to the LCD panel 501.

[0349] The image signal consists of image data for each frame. The control circuit 510 processes the image signal. Based on the information obtained from that process, the output of the image signal to the data line drive circuit 550 is controlled. It has the function of detecting motion from image data for each frame. It is equipped with a motion detection unit 511 that detects when there is no movement. The control circuit 510 stops outputting the image signal to the data line drive circuit 550, and also when there is motion If it is determined that this is the case, the output of the image signal will be resumed.

[0350] There are no particular restrictions on the image processing for motion detection performed by the motion detection unit 511. For example, as a motion detection method, the difference data between two consecutive frames of image data can be used. There is a way to obtain the data. From the obtained differential data, it is possible to determine whether or not there is movement. There are also methods for detecting motion vectors, etc.

[0351] Furthermore, the liquid crystal display device 500 is equipped with an image signal correction circuit that corrects the input image signal. For example, a voltage higher than the voltage corresponding to the grayscale of the image signal can be applied to pixel 531. The image signal is corrected so that it can be written. This correction improves the response of the liquid crystal element. This allows for a reduction in processing time. The image signal is then corrected and processed to drive the control circuit 510. The method is called overdrive. Also, the frame frequency of the image signal When performing double-speed driving, which drives the liquid crystal display device 500 at integer multiples, the control circuit 510 has two Create image data to interpolate between frames, or display black between two frames. You just need to generate image data for that purpose.

[0352] Below, using the timing chart shown in Figure 25, we will discuss moving images like video, This section describes the operation of a liquid crystal display device 500 for displaying still images. Figure 25 shows the vertical synchronization signal (Vsync) and the data line 5 from the data line drive circuit 550. The signal waveform of the data signal (Vdata) output to 51 is shown.

[0353] Figure 25 is a timing chart of the liquid crystal display device 500 over a 3m frame period. So, the image data for the initial k-frame period and the final j-frame period has motion. Assume that there is no motion in the image data for the other frame periods. Note that k and j are 1. These are integers between m-2 and above.

[0354] During the initial k-frame period, the motion detection unit 511 detects motion in the image data of each frame. It is determined that there is a data. The control circuit 510 determines that there is a data based on the determination result of the motion detection unit 511. The DATA signal (Vdata) is output to data line 551.

[0355] Then, the motion detection unit 511 performs image processing for motion detection, and the k+1 frame If the control circuit 510 determines that there is no movement in the image data, the motion detection unit 511 makes a determination. Based on the results, during the k+1th frame period, the image signal (Vid The output of eo) is stopped. Therefore, the data from the data line drive circuit 550 to the data line 551 The output of the TA signal (Vdata) is stopped. Furthermore, the rewriting of the display unit 530 is stopped. Therefore, control signals (start pulse signal) are sent to the scan line drive circuit 540 and the data line drive circuit 550. The supply of signals (such as the clock signal) is stopped. Then, the control circuit 510 controls the motion detection unit 51 In step 1, until a result indicating motion is detected in the image data, the data line is sent to the data line drive circuit 550. Output of the image signal, output of control signals to the scan line drive circuit 540 and the data line drive circuit 550. The power is stopped, and the rewriting of the display unit 530 is stopped.

[0356] In this specification, "not supplying a signal" to the liquid crystal panel means that the signal is not supplied. Applying a voltage different from the predetermined voltage required to operate the circuit to the wiring, or This refers to putting wiring into an electrically floating state.

[0357] When the rewriting of the display unit 530 is stopped, an electric field in the same direction continues to be applied to the liquid crystal element. This can lead to deterioration of the liquid crystal in the liquid crystal element. If such problems become apparent, Regardless of the determination result of the motion detection unit 511, the control circuit 510 scans at a predetermined timing. The line drive circuit 540 and the data line drive circuit 550 are supplied with signals, and the data with reversed polarity is sent. It is recommended to write the signal to data line 551 and reverse the direction of the electric field applied to the liquid crystal element. .

[0358] The polarity of the data signal input to data line 551 is determined based on Vcom. The polarity is positive if the data signal voltage is higher than Vcom, and negative if it is lower. It is the polarity.

[0359] Specifically, as shown in Figure 25, when the m+1th frame period begins, the control circuit 510 The system outputs control signals to the scan line drive circuit 540 and the data line drive circuit 550, and drives the data lines. The image signal Video is output to circuit 550. The data line drive circuit 550 is the kth frame. During this period, the polarity of the data signal (Vdata) output to data line 551 is reversed. The resulting data signal (Vdata) is output to data line 551. Therefore, the image data shows movement. During the m+1 frame period and the 2m+1 frame period, which are periods in which polarity is not detected, The inverted data signal (Vdata) is written to data line 551. During periods of no change, the display unit 530 is rewritten intermittently, thus consuming power due to the rewriting process. This method reduces costs while preventing degradation of the liquid crystal elements.

[0360] Then, the motion detection unit 511 detects motion in the image data from the 2m+1 frame onward. If it determines that this is the case, the control circuit 510 will then operate the scan line drive circuit 540 and the data line drive circuit 550. This controls the display unit 530 and rewrites it.

[0361] As described above, according to the driving method in Figure 25, the motion of the image data (Video) is Regardless of the context, the data signal (Vdata) has its polarity reversed every m-frame period. Regarding the rewriting of the display unit 530, the display period of the image including motion is displayed frame by frame. The display unit 530 is rewritten, and the display period of an image without movement is m frames every m frames. This will result in the display being rewritten. As a result, power consumption associated with rewriting the display will be reduced. This is possible. Therefore, it is possible to suppress the increase in power consumption due to the increase in driving frequency and pixel count. Cut.

[0362] As mentioned above, the liquid crystal display device 500 has a mode for displaying video and a mode for displaying still images. In this mode, the driving method of the liquid crystal display is changed to suppress the degradation of the liquid crystal and improve the display quality. This makes it possible to provide a power-saving liquid crystal display device while maintaining its position.

[0363] Furthermore, when displaying still images, if the pixels are rewritten every frame, the human eye cannot perceive the rewriting of the pixels. The image may be perceived as flickering, which can cause eye strain. Display devices are effective in reducing eye strain because the pixel refresh rate is low during the display period of still images. That is the case.

[0364] Therefore, a liquid crystal panel in which an oxide semiconductor transistor forms the backplane is used. Therefore, we provide a high-definition, low-power, small-to-medium-sized liquid crystal display that is very suitable for portable electronic devices. It is possible to do so.

[0365] Furthermore, in order to prevent deterioration of the LCD, the interval for reversing the polarity of the data signal (here, the m-frame period) is set. The interval should be 2 seconds or less, preferably 1 second or less.

[0366] Furthermore, motion detection of the image data was performed by the motion detection unit 511 of the control circuit 510, but motion detection The motion detection does not need to be performed solely by the motion detection unit 511. The data indicating the presence or absence of motion is displayed on the liquid crystal display device 500. The control circuit 510 may also be configured to receive input from an external source.

[0367] Furthermore, the condition for determining that there is no movement in the image data is the image data between two consecutive frames. The number of frames required for determination is not determined by the data itself, but depends on the usage mode of the liquid crystal display device 500. This can be determined as appropriate. For example, if there is no movement in the image data of consecutive m frames. In some cases, the rewriting of the display unit 530 may be stopped.

[0368] In this embodiment, a liquid crystal display device was used as the display device, but in this embodiment The driving method in this form can be used in other display devices, such as light-emitting display devices.

[0369] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0370] (Embodiment 8) One aspect of the present invention is a semiconductor device that can be applied to various electronic devices (including amusement machines). It is possible. As for electronic devices, television equipment (television or television receiver) Also called a signaling device. ), computer monitors, digital cameras, digital video cameras Digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio playback devices Examples include pachinko machines, slot machines, and game cabinets. An example of the equipment is shown in Figure 26.

[0371] Figure 26(A) shows table 9000 having a display unit. Table 9000 is The housing 9001 incorporates a display unit 9003, and the display unit 9003 displays video. It is possible to do so. Furthermore, the configuration in which the housing 9001 is supported by four legs 9002 is... It is shown. Furthermore, the casing 9001 has a power cord 9005 for power supply.

[0372] The semiconductor device shown in any of the above embodiments can be used in the display unit 9003. Yes. Therefore, the display quality of the display unit 9003 can be improved.

[0373] The display unit 9003 has a touch input function, and the display unit 9003 of the table 9000 By touching the displayed button 9004 with your finger, you can operate the screen or input information. This allows for communication with or control of other home appliances, It can also be used as a control device to control other home appliances via screen operation. For example, By using a semiconductor device with a sensor function, the display unit 9003 can be given a touch input function. It is possible.

[0374] Furthermore, a hinge provided on the housing 9001 allows the screen of the display unit 9003 to be positioned relative to the floor. It can be stood upright and used as a television set. In a small room, Installing a large-screen television set reduces the available space, but a table If the display unit is built into the unit, the space in the room can be used more effectively.

[0375] Figure 26(B) shows the television system 9100. The housing 9101 incorporates a display unit 9103, and the display unit 9103 displays images. It is possible to demonstrate this. Here, the stand 9105 supports the housing 9101. This shows the configuration.

[0376] The television unit 9100 is operated using the control switches on the housing 9101, or a separate unit. This can be done using the remote control unit 9110. The remote control unit 9110 has an operating key -9109 allows you to control the channel and volume, and the display unit 9103 displays the information. The video can be controlled. Furthermore, the remote control unit 9110 can control the remote control. A display unit 9107 may be provided to display information output from the unit 9110.

[0377] The television system 9100 shown in Figure 26(B) includes a receiver, a modem, and other components. The television equipment 9100 can receive general television broadcasts using its receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, One-way (sender to receiver) or two-way (sender and receiver, or receivers to receivers, etc.) It is also possible to conduct information and communication with )

[0378] The semiconductor device shown in any of the above embodiments is used in the display units 9103 and 9107. This is possible. Therefore, the display quality of television equipment can be improved.

[0379] Figure 26(C) shows the computer 9200, consisting of the main unit 9201, the casing 9202, and the display unit 9 203, Keyboard 9204, External connection port 9205, Pointing device 920 Includes 6, etc.

[0380] The semiconductor device shown in any of the above embodiments can be used in the display unit 9203. Yes. Therefore, it is possible to improve the display quality of the computer 9200.

[0381] The display unit 9203 has a touch input function, and the display unit 92 of the computer 9200 By touching the display buttons shown in 03 with your finger, you can operate the screen or input information. This enables communication with or control of other home appliances, and the screen It may also be used as a control device to control other home appliances through operation.

[0382] Figures 27(A) and 27(B) show a foldable tablet device. ) is in an open state, and the tablet terminal consists of a housing 9630, a display unit 9631a, and a display Part 9631b, display mode switching switch 9034, power switch 9035, power saving mode It has a code change switch 9036, a fastener 9033, and an operating switch 9038.

[0383] The semiconductor device shown in any of the above embodiments includes a display unit 9631a and a display unit 9631b It can be used for this purpose. Therefore, it is possible to improve the display quality of tablet devices. Cut.

[0384] The display unit 9631a can be partially designated as a touch panel area 9632a, and the display will Data can be entered by touching the operation key 9638. Note that the display unit 96 In 31a, as an example, one half of the area has a display-only function, and the other half of the area The area indicates a configuration having touch panel functionality, but is not limited to this configuration. Display unit 96 The entire area of ​​31a may also be configured to have touch panel functionality. For example, the display unit 9 The entire surface of 631a is used as a touch panel with keyboard buttons, and the display unit 9631b is displayed It can be used as a display screen.

[0385] In addition, in the display unit 9631b, similar to the display unit 9631a, one of the display units 9631b The area can be designated as the touch panel area 9632b. Also, the touch panel keyboard Touch the location where the display toggle button 9639 is displayed using your finger or stylus. This allows keyboard buttons to be displayed on the display unit 9631b.

[0386] Furthermore, simultaneously with respect to the touch panel area 9632a and the touch panel area 9632b You can also use touch input.

[0387] Additionally, the display mode switch 9034 selects the display orientation, such as portrait or landscape. You can switch between modes, such as black and white or color display. Power saving mode switching. Switch 9036 is detected by an optical sensor built into the tablet device when it is in use. The display brightness can be optimized according to the amount of light. In addition to sensors, other detection devices such as gyroscopes, accelerometers, and other sensors that detect tilt It may be built-in.

[0388] Furthermore, Figure 27(A) shows an example where the display area of ​​display unit 9631b and display unit 9631a are the same. However, this is not particularly limited, and one size may be different from the other. The quality of the display may also differ. For example, one display panel can provide a higher resolution display than the other. You can also use "ru".

[0389] Figure 27(B) shows the closed state, and the tablet terminal consists of a housing 9630 and a solar cell 9 633, and a charge / discharge control circuit 9634 are included. Note that in Figure 27(B), the charge / discharge control circuit 96 As an example of 34, consider a configuration having a battery 9635 and a DC-DC converter 9636. This is what is being shown.

[0390] Note that the tablet device is foldable, so when not in use, the casing 9630 is closed. This can be done. Therefore, the display units 9631a and 9631b can be protected. We can provide tablet devices that are highly durable and reliable from a long-term use perspective.

[0391] In addition, the tablet devices shown in Figures 27(A) and 27(B) are also available in various forms. Features for displaying information (still images, videos, text images, etc.), calendar, date or time. Functions that display information such as the above on the display unit, and the ability to perform touch input operations or edit the information displayed on the display unit. It has features such as touch input functionality and the ability to control processing through various software (programs). It is possible.

[0392] The touch panel is powered by a solar cell 9633 mounted on the surface of the tablet device. It can be supplied to the display unit or the video signal processing unit, etc. Note that the solar cell 9633 is It can be provided on one or both sides of the housing 9630, and the battery 9635 can be charged efficiently. This configuration is preferable because it can be performed in this way. Note that the battery 9635 is lithium Using um-ion batteries offers advantages such as miniaturization.

[0393] Furthermore, the configuration and operation of the charge / discharge control circuit 9634 shown in Figure 27(B) are shown in Figure 27( A block diagram is shown and explained in C). Figure 27(C) shows solar cell 9633, battery 9 635, DC-DC converter 9636, converter 9637, switch SW1 to SW3 The display unit 9631 is shown, along with the battery 9635 and the DC-DC converter 963 6. Converter 9637 and switches SW1 to SW3 control the charge and discharge as shown in Figure 27(B). This corresponds to circuit 9634.

[0394] First, we will explain an example of operation when electricity is generated by the solar cell 9633 using ambient light. The electricity generated by the solar panel is set to a voltage that can charge the battery 9635. The CDC converter 9636 performs either a boost or buck conversion. Then, the display unit 9631 operates. When power from solar cell 9633 is used, turn on switch SW1 and convert The TA9637 will boost or lower the voltage to the required level for the display unit 9631. When you do not want to display anything on the display unit 9631, turn off switch SW1 and switch SW2. You should configure it to be turned on to charge the 9635 battery.

[0395] While the solar cell 9633 is shown as an example of a power generation method, it is not particularly limited to this method. , by other power generation methods such as piezoelectric elements (piezo elements) and thermoelectric elements (Peltier elements) The configuration may also include charging the battery 9635. For example, power may be supplied wirelessly (contactlessly). This can be done using a contactless power transmission module that transmits and receives power for charging, or by combining it with other charging methods. It can also be used as a composition.

[0396] The configurations shown in this embodiment may be combined with the configurations shown in other embodiments as appropriate. It can be used. [Examples]

[0397] In this example, the Vg-Id characteristics of the transistor and the measurement results of the photo-BT stress test were used. I will explain about that.

[0398] First, the process for fabricating the transistor included in Sample 1 will be explained. In this example, Please refer to Figure 4 for further explanation.

[0399] First, as shown in Figure 4(A), a glass substrate is used as the substrate 11, and a glass substrate is placed on the substrate 11. A electrode 15 was formed.

[0400] A 100nm thick tungsten film is formed using the sputtering method, and then photolithography is performed. A mask is formed on the tungsten film by the process, and the mask is used to form a part of the tungsten film. The part was etched to form the gate electrode 15.

[0401] Next, a gate insulating film 17 was formed on the gate electrode 15.

[0402] As the gate insulating film 17, a first silicon nitride film with a thickness of 50 nm, and a second film with a thickness of 300 nm. A silicon nitride film 2, a third silicon nitride film with a thickness of 50 nm, and a silicon oxide film with a thickness of 50 nm. It was formed by laminating silicon dioxide films.

[0403] The first silicon nitride film is coated with silane at a flow rate of 200 sccm and nitrogen at a flow rate of 2000 sccm. and ammonia at a flow rate of 100 sccm is used as a raw material gas in the processing chamber of the plasma CVD apparatus. The system supplies the fluid, controls the pressure inside the processing chamber to 100 Pa, and uses a 27.12 MHz high-frequency power supply. It was formed by supplying 2000W of power.

[0404] Next, under the conditions for the raw material gas of the first silicon nitride film, the ammonia flow rate was set to 2000 The material was changed to SCCM, and a second silicon nitride film was formed.

[0405] Next, silane at a flow rate of 200 sccm and nitrogen at a flow rate of 5000 sccm are used as raw material gases. It is supplied to the processing chamber of the plasma CVD apparatus, and the pressure inside the processing chamber is controlled to 100 Pa, 27.1 Using a 2MHz high-frequency power supply, 2000W of power is supplied to form the third silicon nitride film. I did it.

[0406] Next, silane at a flow rate of 20 sccm and nitrous oxide at a flow rate of 3000 sccm were used as the raw material gases. It is then supplied to the processing chamber of the plasma CVD apparatus, and the pressure inside the processing chamber is controlled to 40 Pa, 27.1 A 2MHz high-frequency power supply is used to supply 100W of power to form a silicon oxide nitride film. Ta.

[0407] Furthermore, the deposition of the first to third silicon nitride films and the silicon oxidizide film. During the process, the substrate temperature was set to 350°C.

[0408] Next, a multilayer film 20 was formed on the gate electrode 15 via the gate insulating film 17.

[0409] Here, a 35 nm thick oxide semiconductor film is applied to the gate insulating film 17 by sputtering. After formation, an oxide film containing In or Ga with a thickness of 20 nm is formed on the oxide semiconductor film. Next, a mask was applied to an oxide film containing In or Ga using a photolithography process. A mask is formed to form an oxide semiconductor film and a part of an oxide film containing In or Ga. The film is etched to form an oxide semiconductor film 18 and an oxide film 19 containing In or Ga. Afterward, a heat treatment was performed to form a multilayer film 20.

[0410] Oxide semiconductor films are sputtered using an In:Ga:Zn=1:1:1 (atom) target. The target (numerical ratio) is argon at a flow rate of 50 sccm and oxygen at a flow rate of 50 sccm. It is supplied as puttering gas into the processing chamber of the sputtering apparatus, and the pressure inside the processing chamber is set to 0. The film was formed by controlling the pressure to 6 Pa and supplying 5 kW of DC power. The substrate temperature during the process was set to 170°C.

[0411] Oxide films containing In or Ga are used with a sputtering target of In:Ga:Zn= A target with an atomic ratio of 1:3:2 was used, and the sputtering gas flow rate was 90 sccm. Ar and oxygen at a flow rate of 10 sccm are supplied to the processing chamber of the sputtering apparatus. The pressure was controlled to 0.3 Pa and a 5 kW DC power supply was applied to form the sample. The substrate temperature was set to 25°C when forming the oxide film containing Ga.

[0412] The heat treatment involves heating at 450°C for 1 hour in a nitrogen atmosphere, followed by heating in a nitrogen and oxygen atmosphere. The material was subjected to a heat treatment at 450°C for 1 hour in an open atmosphere.

[0413] The configuration obtained through the steps up to this point can be seen in Figure 4(B).

[0414] Next, a portion of the gate insulating film 17 is etched to expose the gate electrode (not shown). As shown in Figure 4(C), a pair of electrodes 21 and 22 were formed in contact with the multilayer film 20.

[0415] Here, a conductive film was formed on the gate insulating film 17 and the multilayer film 20. The conductive film was, A 400 nm thick aluminum film is formed on a 50 nm thick tungsten film, and the aluminum A 100 nm thick titanium film was formed on the titanium film. Next, a photolithography process was performed. Then a mask is formed on the conductive film, and a part of the conductive film is etched using the mask, and a pair Electrodes 21 and 22 were formed.

[0416] Next, the substrate is moved to a depressurized processing chamber, heated at 220°C, and then filled with nitrous oxide. The substrate was then moved to the processing chamber. Next, a 27.12 MHz electrode was applied to the upper electrode located in the processing chamber. Using a high-frequency power supply of z, 150W of high-frequency power is supplied, and the decomposition of nitrous oxide generates The multilayer film 20 was exposed to the generated oxygen plasma.

[0417] Next, a protective film 26 was formed on the multilayer film 20 and the pair of electrodes 21 and 22 (see Figure 4(D)). (See reference). Here, the protective film 26 consists of an oxide insulating film 23, an oxide insulating film 24, and a nitride insulating film. A border film 25 was formed.

[0418] First, after the plasma treatment described above, the oxide insulating film 23 and acid are continuously treated without exposure to air. A silicon oxide insulating film 24 was formed. A silicon oxide nitride film with a thickness of 50 nm was used as the oxide insulating film 23. A silicon oxide nitride film with a thickness of 400 nm was formed as an oxide insulating film 24.

[0419] The oxide insulating film 23 is coated with silane at a flow rate of 30 sccm and dioxide at a flow rate of 4000 sccm. Using nitrogen as the raw material gas, with a processing chamber pressure of 200 Pa and a substrate temperature of 220°C, a 150W power supply was used. It was formed by plasma CVD, a method in which high-frequency power was supplied to parallel plate electrodes.

[0420] The oxide insulating film 24 is coated with silane at a flow rate of 200 sccm and oxide monoxide at a flow rate of 4000 sccm. Using dinitrogen as the raw material gas, with a processing chamber pressure of 200 Pa and a substrate temperature of 220°C, 1500 The material was formed by plasma CVD, in which high-frequency power W was supplied to parallel plate electrodes. Furthermore, it contains more oxygen than satisfactorily satisfying the oxygen composition, and some of the oxygen is removed by heating. It is possible to form a silicon oxide nitride film that can be separated.

[0421] Next, heat treatment is performed to extract water, nitrogen, hydrogen, etc. from the oxide insulating film 23 and the oxide insulating film 24. The substance was removed. Here, a heat treatment was performed at 350°C for 1 hour in a nitrogen and oxygen atmosphere. .

[0422] Next, the substrate is moved to a reduced-pressure processing chamber, heated at 350°C, and then on the oxide insulating film 24. A nitride insulating film 25 was formed thereon. Here, the nitride insulating film 25 was made of a film with a thickness of 100 nm. A silicon nitride film was formed.

[0423] The nitride insulating film 25 is coated with silane at a flow rate of 50 sccm, nitrogen at a flow rate of 5000 sccm, and Ammonia at a flow rate of 100 sccm is used as the raw material gas, the pressure in the processing chamber is 100 Pa, and the substrate temperature is... The plasma CVD method was performed with a temperature of 350°C and 1000W of high-frequency power supplied to parallel plate electrodes. It was formed more.

[0424] Next, although not shown in the diagram, a portion of the protective film 26 is etched, and one of the pair of electrodes 21 and 22 An opening was formed to expose the part.

[0425] Next, a planarization film was formed on the nitride insulating film 25 (not shown). Here, the composition was After coating the nitride insulating film 25, exposure and development are performed to expose a portion of the pair of electrodes. A planarized film with openings was formed. The planarized film was made of acrylic resin with a thickness of 1.5 μm. Fat was formed. After this, heat treatment was performed. This heat treatment was carried out at a temperature of 250°C, and nitrate It lasted an hour and had a natural, unpretentious atmosphere.

[0426] Next, a conductive film was formed (not shown) that connected to a portion of the pair of electrodes. Here, spa An ITO film containing silicon oxide with a thickness of 100 nm was formed by the tarring method. After this, The material was heat-treated at 250°C for 1 hour in a nitrogen atmosphere.

[0427] Sample 1, which has a transistor, was fabricated through the above process.

[0428] Furthermore, in the transistor of sample 1, the third silicon nitride is part of the gate insulating film 17. The film is formed under the same conditions as the first silicon nitride film, and the oxide semiconductor film 18 and In or This is a sample having a transistor formed by creating a Ga-containing oxide film 19 at a substrate temperature of 200°C. This was prepared as sample 2.

[0429] Furthermore, an oxide film 19 containing In or Ga is formed in the transistor of sample 1. A sample having a transistor was prepared as sample 3. Note that a pair of electrodes 21 and 22 were used. After formation, the oxide semiconductor film 18 was treated with an aqueous phosphoric acid solution prepared by diluting 85% phosphoric acid 100 times. The surface was cleaned.

[0430] Furthermore, in sample 3, a sample having a transistor that does not form an oxide insulating film 23 was tested. It was prepared as material 4.

[0431] Next, the Vg-Id characteristics were measured as the initial characteristics of the transistors included in Sample 1 to Sample 4. Determined. Here, the substrate temperature is set to 25°C, and the potential difference between the source and drain (hereinafter referred to as drain) is set to 25°C. This is called the gate voltage. Let the gate voltage be 1V and 10V, and the potential difference between the source and gate electrode (hereinafter referred to as the gate voltage) be 1V and 10V. The current is called voltage. When the voltage is changed from -20V to +15V, the current flows between the source and drain. The characteristics of the change in current (hereinafter referred to as drain current), i.e., the Vg-Id characteristics, were measured.

[0432] Figures 28(A) to 28(D) show the Vg-Id of the transistors contained in each sample. The characteristics are shown. In Figure 28, the horizontal axis represents the gate voltage Vg, and the vertical axis represents the drain current Id. Furthermore, the solid lines represent the Vg-Id characteristics when the drain voltage Vd is 1V and 10V, respectively. The dashed line represents the field effect mobility with respect to the gate voltage when the drain voltage Vd is 10V. Note that the field-effect mobility values ​​are obtained in the saturation region for each sample.

[0433] Each transistor has a channel length (L) of 6 μm and a channel width (W) of 50 μm. Yes. In addition, 20 transistors with the same structure were fabricated on the substrate for each sample.

[0434] From Figure 28(D), in the Vg-Id characteristics of the transistor included in sample 4, the drain The gate voltage at which the on-current begins to flow when the on-voltage Vd is 1V (also called the rise gate voltage) (Vg). ) is different from the rising gate voltage of the 10V on-current. Also, the test The variation in Vg-Id characteristics between each transistor in material 4 is also large. On the other hand, Figure 28( A) to Figure 28(C) shows the Vg-Id characteristics of the transistors included in Sample 1 to Sample 3. The drain voltage Vd is 1V, and the rising gate voltage (Vg) of the on-current is approximately the same for 10V. It is one. And the Vg-Id characteristics between each transistor included in sample 1 to sample 3 are The rattle is small. This suggests that there is at least an oxide film between the multilayer film 20 and the oxide insulating film 24. It can be seen that the initial characteristics of the transistor are improved by providing the material insulating film 23.

[0435] Next, BT stress tests and photo-BT stress tests were performed on samples 1 to 4. For the BT stress test, the substrate temperature was set to 80°C and the electric field strength applied to the gate insulating film was set to 0. A BT circuit is configured to apply a predetermined voltage to the gate electrode, with a voltage of 0.66 MV / cm and an application time of 2000 seconds. A stress test was conducted. The BT stress test was performed in an atmospheric environment with a dew point temperature of 12°C. Ta.

[0436] Furthermore, using the same conditions as the BT stress test described above, 3000 lux of white LED light was applied to the BT stress test. A photo-BT stress test was performed by irradiating an inverter and applying a predetermined voltage to the gate electrode. Oh, the photo-BT stress test was conducted in a dry air atmosphere with a dew point temperature of -30°C.

[0437] Here, we will explain the measurement method for the BT stress test. First, as described above, The initial characteristics of the Vg-Id properties of the inverter were measured.

[0438] Next, after raising the substrate temperature to 80°C, the source electrode and drain electrode of the transistor are... The potential of the poles was set to 0V. Subsequently, the electric field strength applied to the gate insulating film was set to 0.66 MV / C. A voltage was applied to the gate electrode such that the value was m, and this was held for 2000 seconds.

[0439] In addition, in the negative BT stress test (Dark-GBT), -30V is applied to the gate electrode. The following was applied: In addition, in the Plus BT stress test (Dark + GBT), the gate electrode was 30V was applied. Furthermore, in the photo-GBT (Photo-GBT) stress test, While irradiating with 3000 lux of white LED light, -30V was applied to the gate electrode. In the Plus BT stress test (Photo + GBT), 3000 lux of white LED light is used. While irradiating, 30V was applied to the gate electrode.

[0440] Next, with voltage still applied to the gate electrode, source electrode, and drain electrode, the substrate temperature was increased by 2 The temperature was lowered to 5°C. After the substrate temperature reached 25°C, the gate electrode, source electrode and drain electrode were charged. The application of voltage to the electrodes was terminated.

[0441] The threshold voltage and BT stress of the initial characteristics of the transistors included in Sample 1 to Sample 4 Figure 29 shows the difference in threshold voltage after the experiment (i.e., the amount of change in threshold voltage (ΔVth)). Figure 29 shows the positive BT stress test (Dark + GBT) and the negative BT stress test. Dark-GBT stress test, Photo-GBT stress test, Variation in threshold voltage for each type of photo-GBT stress test. This shows ΔVth.

[0442] In this specification, the threshold voltage is calculated assuming a drain voltage Vd of 10V. Furthermore, in this specification, the threshold voltage (Vth) is defined as the 20 tones contained in each sample. This is the average value of Vth for each lungist.

[0443] Furthermore, Figure 29 shows the variation in the threshold voltage of the transistors included in sample 1 and sample 2. The absolute value of is the variation in the threshold voltage of the transistors included in sample 3 and sample 4 (ΔVt It can be seen that it has decreased compared to the absolute value of h). In particular, in sample 1, plus BT The threshold voltage fluctuation (ΔVth) in the Tress test (Dark + GBT) was significantly reduced. There is a small amount of In or G between the oxide semiconductor film 18 and the oxide insulating film 24. It can be seen that the reliability of the transistor is improved by providing an oxide film 19 containing a.

[0444] Based on the above, an acid containing In or Ga is placed between the oxide semiconductor film 18 and the oxide insulating film 24. By providing the oxide film 19 and the oxide insulating film 23, the electrical characteristics of the transistor are improved. Specifically, it is possible to improve both initial characteristics and reliability. Furthermore, by providing an oxide film 19 containing In or Ga and an oxide insulating film 23, The oxide semiconductor film 18, which is a channel region, is to be infused with elements contained in the oxide insulating film 24 (for example, s It can suppress the inclusion of oxidative stress (such as nitrite and nitrogen). Alternatively, it can suppress the inclusion of oxidative stress (such as In or Ga). By providing the material film 19 and the oxide insulating film 23, the oxide semiconductor film 18 which is the channel region In this process, when forming an oxide insulating film 24 using a plasma CVD method that uses relatively high power, This can reduce the resulting plasma damage. [Examples]

[0445] In this example, the temperature-dependent BT stress test of the transistor included in sample 1 of Example 1 is used. Let's explain existence.

[0446] Using sample 1 from Example 1, the temperature in the BT stress test performed in Example 1 was set to 60°C. Alternatively, the temperature was set to 80°C, and the stress was applied for 3600 seconds.

[0447] Specifically, first, the initial characteristics of the Vg-Id characteristics of the transistor are determined in the same manner as in Example 1. The properties were measured, and then the substrate temperature was raised to 60°C or 80°C, and then the transistor was... The potentials of the source electrode and drain electrode were set to 0V. Next, the voltage applied to the gate insulating film was... A voltage is applied to the gate electrode so that the field intensity is 0.66 MV / cm, and this is held for 3600 seconds. In addition, in the negative BT stress test (Dark-GBT), -30 was applied to the gate electrode. V was applied. In addition, in the Plus BT stress test (Dark + GBT), the gate electrode 30V was applied to it.

[0448] Next, with voltage still applied to the gate electrode, source electrode, and drain electrode, the substrate temperature was increased by 2 The temperature was lowered to 5°C. After the substrate temperature reached 25°C, the gate electrode, source electrode and drain electrode were charged. The application of voltage to the electrodes was terminated.

[0449] In the transistor included in sample 1, Vg-Id after BT stress tests at each temperature The characteristics are shown in Figures 30(A) to 30(D). Figure 30(A) shows the plastic at a substrate temperature of 60°C. The results of the BT stress test are shown, and Figure 30(B) shows the negative results at a substrate temperature of 60°C. The results of the BT stress test are shown, and Figure 30(C) shows the positive results at a substrate temperature of 80°C. The results of the BT stress test are shown, and Figure 30(D) shows the negative results at a substrate temperature of 80°C. The results of the BT stress test are shown. In Figures 30(A) to 30(D), The thick line shows the Vg-Id characteristics (initial characteristics) before the BT stress test, and the thin line shows the BT stress test. The Vg-Id characteristics after the test are shown. The thick dashed line represents the field effect transfer before the BT stress test. The graph shows the mobility, and the thin dashed line indicates the field effect mobility after the BT stress test. The initial characteristics of the Vg-Id properties and the Vg-Id properties after BT stress tests at each temperature are as follows: The measurement was taken with an input voltage of 10V.

[0450] Furthermore, the threshold voltage of the initial characteristics of the transistor included in sample 1 and the BT stress test results after the test. The difference in threshold voltage (i.e., the variation in threshold voltage (ΔVth)) is shown in Figure 31.

[0451] As shown in Figure 31, at least the BT stress test was performed at temperatures of 60°C and 80°C. The subsequent threshold voltage fluctuation was confirmed to be less than 1.0V. [Examples]

[0452] In this embodiment, the time-dependent change of the threshold voltage of a transistor according to one aspect of the present invention is described. Let me explain. Here, we will perform a BT stress test on a transistor, which is one aspect of the present invention. This section describes the results of evaluating the threshold voltage fluctuation (ΔVth) with respect to the tracing time. .

[0453] The sample that underwent the BT stress test will be described. In the sample 1 described in Example 1, the oxide film containing In or Ga in the multilayer film 20 This is a sample in which the In-Ga-Zn oxide film to be processed in step 19 was formed at a substrate temperature of 100°C. This sample will be designated as Sample 5.

[0454] Furthermore, as a comparative example of sample 5, sample 6, prepared in the same manner as sample 3 in Example 1, was used. Ta.

[0455] In this embodiment, the substrate temperature is set to the same method as the BT stress test described in Example 1. The substrate temperature was set to 60°C or 125°C, and the holding time was set to 3,600 seconds. For Sample 5, during the holding time, the amount of change in the threshold voltage at 100 seconds, 500 seconds, 1,500 seconds, 2,000 seconds, and 3,600 seconds was evaluated. For Sample 6, during the holding time, the amount of change in the threshold voltage at 100 seconds, 600 seconds, and 3,600 seconds was evaluated.

[0456] For Samples 5 and 6, the amount of change in the threshold voltage after each elapsed time is shown in Fig. 32. In Fig. 32, the circles represent the measurement results of Sample 5, and the triangles represent the measurement results of Sample 6. Note that the amount of change in the threshold voltage when the substrate temperature is 60°C is shown in Fig. 32(A), and the amount of change in the threshold voltage when the substrate temperature is 125°C is shown in Fig. 32(B).

[0457] Also, Figs. 32(A) and 32(B) are diagrams in which the approximate lines up to 1,000 seconds are extrapolated based on the change in the amount of change in the threshold voltage. In Fig. 32(A), the equation of the approximate line for Sample 5 is y = 0.0138x 0.424 , and the coefficient of determination R 2 value was 0.990. The equation of the approximate line for Sample 6 is y = 0.0492x 0.427 , and the coefficient of determination R 2 value was 0.992. In Fig. 32(B), the equation of the approximate line for Sample 5 is y = 0.0206x [[ID=3�]] 0.506 , and the coefficient of determination R 2 value was 0.999. The equation of the approximate line for Sample 6 is y = 0.1304x 0 .428 , and the coefficient of determination R 2 value was 0.997.

[0458] From Fig. 32, at both a substrate temperature of 60°C and a substrate temperature of 125°C, after each elapsed time​​ The threshold voltage fluctuation is greater for the transistor having a multilayer film 20 like sample 5 than for sample 6. It was confirmed that Ta is smaller.

[0459] When the substrate temperature is 60°C, the threshold voltage fluctuation of sample 6 reaches 1V in approximately 1000 seconds. However, even after 10,000 seconds, sample 5 showed a threshold voltage fluctuation of 1V or less. It was confirmed that this was the case.

[0460] Furthermore, when the substrate temperature is 125°C, sample 5 shows a greater variation in threshold voltage compared to sample 6. It was confirmed that the time required to reach 1V was extended by more than 20 times (but not exceeding approximately 30 times).

[0461] Based on the above, a transistor according to one aspect of the present invention, such as one in which an oxide semiconductor film is used and In or Ga To fabricate transistors with improved reliability by using a multilayer film with an oxide film containing [a specific substance]. It is possible. [Examples]

[0462] In this example, the formation conditions for the oxide insulating film 23 and oxide insulating film 24 in the above example are different from those for acid The amount of water molecules removed from the oxide insulating film 23 and the amount of oxygen molecules removed from the oxide insulating film 24 The amount of separation and the amount generated in the oxide semiconductor film when forming the oxide insulating film 23 or oxide insulating film 24. This explains the relationship with the amount of defects.

[0463] First, the oxide insulating film 23 or oxide insulating film 24 under each formation condition has a thickness of 400. A sample was prepared by forming a silicon oxidnitride film of nm size on a silicon wafer using plasma CVD. The samples were prepared and evaluated by TDS measurement.

[0464] First, let's describe the structure of the evaluated samples. Sample 7 was subjected to the following conditions: silico oxidnitridation This is a sample in which a film has been formed. The conditions for this were that the flow rate of the raw material gas, silane, was 30 sccm. The flow rate of nitrous oxide was set to 4000 sccm, and the pressure in the processing chamber was set to 200 Pa, and the substrate was processed. The temperature was set to 220°C, and the high-frequency power supplied to the parallel plate electrodes was set to 150W. 7 is an oxidized nitride formed using the formation conditions for the oxide insulating film 23 used in sample 1 of Example 1. It is a silicon film.

[0465] Next, under the following conditions, sample 8 was obtained using silica oxide nitride, which corresponds to the oxide insulating film 23 of the above example. This is a sample in which a film has formed. The conditions for this sample are as follows: under the conditions for sample 7, the pressure in the processing chamber is set to 12 The pressure was set to 0 Pa.

[0466] Sample 9 is a silicon oxidiznitride film corresponding to the oxide insulating film 23 of the above example, under the following conditions. This is a sample that formed [the following]. The conditions for this sample were as follows: under the conditions for sample 7, the pressure in the processing chamber was set to 40 Pa. did.

[0467] The TDS measurement results for samples 7 to 9 are shown in Figures 33(A) to 33(C). Figure 33(A) shows the measurement results representing the amount of water molecules removed from sample 7, and Figure 33(B) shows the results for sample 8 The measurement results showing the amount of water molecules released are shown, and Figure 33(C) shows the amount of water molecules released from sample 9. The measurement results are shown. From Figures 33(A) to 33(C), sample 9 had a substrate temperature of 120°C. The peak when the sample is close is larger than the peaks in sample 7 and sample 8. That is, sample Compared to sample 9, samples 7 and 8 showed a lower amount of water molecule desorption at substrate temperatures of 300°C or below. It is clear that the amount is small.

[0468] Furthermore, the total amount of water molecules released by heating is shown in the curve representing the results of the TDS analysis. This corresponds to the integral value. In sample 7, the amount released during heating from 55°C to 600°C is , 5.6×10 16 molecule / cm 2 In sample 8, the temperature ranged from 50°C to 600°C. The amount released during heating is 5.4 × 10⁻⁶. 16 molecule / cm 2 In sample 9, 50 The amount released during heating from °C to 580°C is 6.5 × 10⁻⁶. 16 molecule / cm 2 That was the case. The amount of water molecules released from sample 7, converted to a per-unit volume value, is 1.4 × 10⁻⁶. 21 minutes Child / cm 3 Therefore, the amount of water molecules released from sample 8, when converted to a per-unit volume value, is 1.3 ×10 21 molecule / cm 3 Therefore, the amount of water molecules released from sample 9 is converted to a unit volume. The value is 1.6 × 10 21 molecule / cm 3 That was the case.

[0469] The silicon oxide nitride film, which is the oxide insulating film 23, can be formed by increasing the pressure during formation. It can be seen that the amount of water molecules removed can be reduced when the substrate temperature is below 300°C.

[0470] Next, as the oxide insulating film 24 of the transistor described in the above embodiment, the stoichiometric composition It contains more oxygen than the required amount, and some of the oxygen is removed by heating. Let me explain the membrane.

[0471] It contains more oxygen than satisfactorily required for its composition, and some of the oxygen is removed upon heating. To evaluate this, TDS measurements were performed to determine the amount of oxygen degassed.

[0472] First, let's describe the structure of the sample that was measured. Reference sample 1 is a silicon wafer with the following structure: A silicon oxide-nitride film with a thickness of 400 nm was formed under the following conditions: flow rate 16 Using silane at 0 sccm and nitrous oxide at a flow rate of 4000 sccm as the raw material gases, in the processing chamber... With a pressure of 200 Pa and a substrate temperature of 220°C, 1500 W of high-frequency power is applied to parallel plate electrodes. Formed by the supplied plasma CVD method.

[0473] Reference sample 2 is a silicon wafer with a thickness of 400 nm, and is made of silicon oxidnitridation under the following conditions. This is a reference sample in which a film was deposited. The conditions in this sample are the same as those for Reference Sample 1, but with silane flowing. The conditions were changed to a quantity of 200 sccm, but all other conditions were the same as those for Reference Sample 1.

[0474] The TDS measurement results for reference sample 1 and reference sample 2 are shown in Figures 34(A) and 34(B). In Figures 34(A) and 34(B), both Reference Sample 1 and Reference Sample 2 contain oxygen molecules. A peak corresponding to the mass number M / z=32 was observed. Therefore, Reference Sample 1 and Reference Sample In the silicon oxidnitride film of material 2, some of the oxygen molecules contained in the film are removed by heating. It can be said that...

[0475] The total amount of oxygen molecules released by heating is shown in the curve representing the results of the TDS analysis. This corresponds to the integral value obtained during heating from 60°C to 575°C in Reference Sample 1. The output is 3.2 × 10 14 molecule / cm 2 In reference sample 2, from 60°C to 60°C The amount released during heating to 0°C is 1.9 × 10⁻⁶. 14 molecule / cm 2 That was the case. For reference... The amount of oxygen released from sample 1, converted to the number of oxygen atoms (per unit volume), is 1.6 × 10⁻⁶. 1 9 atoms / cm 3 This is the value obtained by converting the amount of oxygen released from reference sample 2 into oxygen atoms (units) (per unit) is 9.5 × 10 18 atoms / cm 3 That was the case.

[0476] From the above, increasing the flow rate of silane relative to nitrous oxide results in the deposition of oxidative nitriding silane. While it can reduce defects in the reconstituted film, it also reduces the amount of oxygen molecules that are released. Furthermore, reducing the flow rate of silane relative to nitrous oxide increases the amount of oxygen molecules desorbed. I found out.

[0477] Next, the oxide insulating film 23 used in samples 7 to 9, or reference samples 1 and 2 When the oxide insulating film 24 used in the above is formed on the oxide semiconductor film, Defects will be explained. In this example, the defect amount of the oxide semiconductor film is determined to be ESR (electron saturation). We will explain using the results of spin resonance measurements.

[0478] First, let's describe the structure of the sample that was evaluated.

[0479] Samples 10 to 12, reference sample 3 and reference sample 4 are formed on a quartz substrate with a thickness of 1 A 00nm oxide semiconductor film and a 400nm thick oxide semiconductor film formed on the oxide semiconductor film. It has a border membrane.

[0480] Oxide semiconductor films are sputtered using an In:Ga:Zn=1:1:1 (atom) target. The target (numerical ratio) is argon at a flow rate of 50 sccm and oxygen at a flow rate of 50 sccm. It is supplied as puttering gas into the processing chamber of the sputtering apparatus, and the pressure inside the processing chamber is set to 0. The film was formed by controlling the pressure to 6 Pa and supplying 5 kW of DC power. The substrate temperature during the process was set to 170°C.

[0481] The oxide insulating film formed on the oxide semiconductor film is similar to the silicon oxide nitride film of sample 7. The sample formed using the specified conditions will be designated as sample 10.

[0482] The oxide insulating film formed on the oxide semiconductor film is similar to the silicon oxide nitride film of sample 8. The sample formed using the specified conditions will be designated as Sample 11.

[0483] The oxide insulating film formed on the oxide semiconductor film is similar to the silicon oxiditride film of sample 9. The sample formed using the specified conditions will be designated as Sample 12.

[0484] The oxide insulating film formed on the oxide semiconductor film is the same as the silicon oxide nitride film of reference sample 1. A sample formed using the specified conditions will be designated as Reference Sample 3.

[0485] The oxide insulating film formed on the oxide semiconductor film is the same as the silicon oxide nitride film of reference sample 2. A sample formed using the specified conditions will be designated as reference sample 4.

[0486] That is, in samples 10 to 12, silicon oxide nitride corresponds to the oxide insulating film 23. A film was formed. In addition, in reference samples 3 and 4, the oxide insulating film 24 corresponds to A silicon oxide nitride film was formed.

[0487] Next, ESR measurements were performed on samples 10 through 12, reference sample 3, and reference sample 4. ESR measurement is performed by taking the value of the magnetic field (H0) at a given temperature from which microwave absorption occurs, and then calculating the formula g The parameter called the g-value can be obtained using the formula =hν / βH0. Note that ν is the frequency of microwaves. This is the wave number. h is Planck's constant, and β is the Bohr magneton; both are constants.

[0488] Here, ESR measurements were performed under the following conditions: The measurement temperature was set to room temperature (25°C), and the value was 9.0 The high-frequency power (microwave power) was set to 6 GHz and 20 mW, and the direction of the magnetic field was determined by the fabricated sample. It was made parallel to the film surface.

[0489] Figure 35 shows the number of spins in the signal that appears at g (g value) = 1.93.

[0490] Compared to sample 12, it was found that the spin number was reduced in samples 10 and 11. That is, in the film formation conditions for the oxide insulating film 23, the pressure is 100 Pa or more and 250 Pa or less. This shows that damage to the oxide semiconductor film is mitigated.

[0491] In Figure 34, as in Reference Sample 2, there is more oxygen than satisfies the stoichiometric composition. Under film formation conditions for an oxide insulating film 24 containing a portion of oxygen that is partially removed by heating, Increasing the flow rate of silane relative to dinitrogen reduces defects contained in the oxide insulating film 24. This can be done, but on the other hand, the amount of oxygen molecules removed is reduced. However, sample 1 As shown in 0 and sample 11, the deposition conditions for the oxide insulating film 23 were set to a pressure of 100 Pa. By keeping the pressure below 250 Pa, damage to the oxide semiconductor film is mitigated, thus reducing heating. The amount of excess oxygen transferred from the oxide insulating film 24, which is partially detached by the acid, is at least. Defects in the semiconductor film can be significantly reduced.

[0492] From the TDS and ESR measurement results in this embodiment, oxidation formed on the transistor By setting the pressure to 100 Pa or more and 250 Pa or less in the film deposition conditions for the insulating film 23, acid This can reduce the amount of water molecules that are removed from the oxide insulating film 23, and also improve the oxide semiconductor film. Damage can be reduced, and the amount of oxygen deficiency can be reduced. As a result, oxidation It is possible to reduce the movement of water from the insulating film 23 to the oxide semiconductor film. Oxidation occurs when a substance contains more oxygen than satisfactorily satisfactorily, and some of the oxygen is removed upon heating. Even with minimal desorption of oxygen molecules from the insulating film, oxygen vacancies in the oxide semiconductor film are sufficiently reduced. Therefore, the pressure can be set to 100 Pa or higher in the film formation conditions for the oxide insulating film 23. By keeping the pressure below 250 Pa, the electrical characteristics of the transistor can be improved. [Examples]

[0493] In this embodiment, defects in the oxide insulating film 24 used in Reference Sample 1 and Reference Sample 2 of Example 4 Let's explain the density. In this example, the defect amount of the oxide insulating film 24 is determined by ESR (electrical stress). We will explain using the results of the (minor spin resonance) measurement.

[0494] First, let's describe the structure of the sample that was evaluated.

[0495] Reference samples 5 and 6 are oxide semiconductors with a thickness of 100 nm formed on a quartz substrate. It comprises a film and a 400 nm thick oxide insulating film formed on the oxide semiconductor film.

[0496] Similar to Reference Samples 3 and 4, the oxide semiconductor film is subjected to a sputtering target. A target with an atom ratio of In:Ga:Zn=1:1:1 was used, and an aluminum flow rate of 50 sccm was applied. Gon and oxygen at a flow rate of 50 sccm are used as sputtering gases in the sputtering apparatus. The material is supplied to the chamber, the pressure inside the processing chamber is controlled to 0.6 Pa, and 5 kW of DC power is supplied to form the material. The substrate temperature used when forming the oxide semiconductor film was set to 170°C.

[0497] Next, after heat treatment at 450°C for 1 hour in a nitrogen atmosphere, in a nitrogen and oxygen atmosphere... The material was then subjected to a heat treatment at 450°C for 1 hour.

[0498] Next, an oxide insulating film was formed on the oxide semiconductor film. This oxide insulating film was used in reference sample 1. A sample formed using the same conditions as the silicon oxidizride film is designated as reference sample 5.

[0499] The oxide insulating film formed on the oxide semiconductor film is the same as the silicon oxide nitride film of reference sample 2. The sample formed using the specified conditions will be designated as reference sample 6.

[0500] Next, ESR measurements were performed on reference samples 5 and 6. The following conditions were used: ESR measurements were performed using a 9.1GHz high-frequency power microphone. The measurement temperature was set to -170°C. The power of the magnetic field was set to 1 mW, and the direction of the magnetic field was parallel to the surface of the fabricated sample film.

[0501] The signal speed appearing at g (g value) = 2.001 originating from silicon dangling bonds The number of n is shown in Figure 36.

[0502] Compared to reference sample 5, reference sample 6 shows a reduced spin number. In the film deposition conditions for the oxide insulating film 24, the silane flow rate was 200 sccm, and nitrous oxide was By setting the flow rate to 4000 sccm, a silicon oxide nitride film with fewer defects is produced, typically, ESR measurement revealed that the spin density of the signal appearing at g=2.001 is 6×10 17 spins / cm 3 Less than 3 × 10 17 spins / cm 3 The following is preferably 1.5 × 1 0 17 spins / cm 3 The following silicon oxide nitride films can be formed. [Examples]

[0503] In this embodiment, the localized energy levels of the multilayer film included in a transistor according to one aspect of the present invention are as follows: This section will explain the results of evaluating the multilayer film using CPM measurement.

[0504] First, let me explain the samples that underwent CPM measurement.

[0505] A first oxide film containing In or Ga with a thickness of 30 nm is formed on a glass substrate, and the first A 100 nm thick oxide semiconductor film is formed on an oxide film containing In or Ga, and oxidation By forming a second oxide film containing In or Ga with a thickness of 30 nm on a monosemiconductor film, A multilayer film was formed.

[0506] In this embodiment, a first oxide film containing In or Ga, and In or Ga The second oxide film contains In-Ga-Zn oxide (In:Ga:Zn=1:3:2[atoms]). This oxide film was deposited by sputtering using a target with a numerical ratio of [number]. Oh, we'll use 30 sccm of argon gas and 15 sccm of oxygen gas as film-forming gases, and the pressure will be... The material was formed by setting the pressure to 0.4 Pa, the substrate temperature to 200°C, and applying a DC power of 0.5 kW. Ta.

[0507] Furthermore, oxide semiconductor films are In-Ga-Zn oxide (In:Ga:Zn=1:1:1[ An oxide semiconductor film deposited by sputtering using a target with an atomic ratio of [] The following is the result: 30 sccm of argon gas and 15 sccm of oxygen gas were used as the film-forming gases. The pressure is set to 0.4 Pa, the substrate temperature to 200°C, and a DC power of 0.5 kW is applied. It was formed by and

[0508] The sample prepared in the manner described above will be referred to as Sample 13.

[0509] Next, CPM measurement was performed on sample 13. Specifically, in contact with the multilayer film of sample 13... The photocurrent value is kept constant when a voltage is applied between the first and second electrodes. The amount of light irradiated onto the sample surface between terminals is adjusted, and the absorption rate is calculated from the irradiated light amount within the desired wavelength range. The number was derived.

[0510] Figure 37 shows the absorption coefficient measured by a spectrophotometer (thick dotted line) and the absorption coefficient derived from CPM measurement. The absorption coefficient (thick solid line) is the energy gap of each layer contained in the multilayer film that is greater than or equal to the energy gap of each layer. The fitting results within the range are shown. The absorption obtained by CPM measurement is also shown. In the coefficient curve, the slope of the Arbach tail (thin dotted line) is the Arbach energy. The value was 78.7 meV. In the energy range enclosed by the dashed circle in Figure 37(A), CP Subtracting the absorption coefficient of the Arbach tail (thin dotted line) from the absorption coefficient derived from the M measurement, The integral value of the absorption coefficient in that energy range was derived (see Figure 37(B)). As a result, the absorption coefficient of this sample is 2.02 × 10⁻⁶. -4 cm -1 It was found that...

[0511] Based on the above, it can be concluded that the localized energy levels in the multilayer film of sample 13 are caused by impurities and defects. Therefore, it was found that the multilayer film has an extremely low energy level density due to impurities and defects. Therefore, it can be seen that transistors using multilayer films have stable electrical characteristics. [Examples]

[0512] In this embodiment, the silicon concentration of the multilayer film included in a transistor according to one aspect of the present invention is This section will explain the results of evaluating the multilayer film using SIMS measurement. .

[0513] First, let me explain the samples that were measured using SIMS.

[0514] A 10 nm thick oxide film 81 containing In or Ga is formed on a silicon wafer Si. A 10 nm thick oxide semiconductor film 82 is formed on an oxide film 81 containing In or Ga. A 10 nm thick oxide film 83 containing In or Ga is formed on the oxide semiconductor film 82. This process formed a multilayer film.

[0515] In this embodiment, the oxide film 81 containing In or Ga is an In-Ga-Zn oxide. Using a target with the atomic ratio (In:Ga:Zn=1:3:2), sputtering This oxide film was formed by the deposition method. Argon gas was used as the deposition gas at a rate of 30 sccm. Using 15 sccm of oxygen gas, with a pressure of 0.4 Pa, and a substrate temperature of 200°C, DC It was formed by applying 0.5 kW of power.

[0516] Furthermore, the oxide semiconductor film 82 is an In-Ga-Zn oxide (In:Ga:Zn=1:1: A target with an atomic ratio of 1 was used to deposit an oxide semiconductor film by sputtering. It is a body membrane. The film-forming gases used were 30 sccm of argon gas and 15 sccc of oxygen gas. Using m, the pressure is set to 0.4 Pa, the substrate temperature is set to 300°C, and a DC power of 0.5 kW is applied. It was formed by doing so.

[0517] Furthermore, the oxide film 83 containing In or Ga is an In-Ga-Zn oxide (In:Ga Using a target with Zn = 1:3:2 (atomic ratio), the shape is formed by sputtering. This is the oxide film that was formed. Argon gas was used as the deposition gas at 30 sccm, and oxygen gas was used as the deposition gas. Using 15 sccm, with a pressure of 0.4 Pa, a substrate temperature of 200°C, and a DC power of 0.5 It was formed by applying kW.

[0518] After forming the multilayer film, the sample was subjected to no heat treatment, and the sample was subjected to heat treatment at 450°C for 2 hours. Samples were prepared. The sample that was not subjected to heat treatment was designated as Sample 14, and the sample that underwent heat treatment was designated as This was designated as sample 15.

[0519] For samples 14 and 15, time-of-flight secondary ion mass spectrometry (ToF-SIMS) was performed. ime-of-flight secondary ion mass spectro (Metry) was performed to determine the Si concentration in the depth direction [atoms / cm³]. 3 ] was measured. Figure 38( A) S calculated from the secondary ionic intensity of SiO3 in the depth direction of the multilayer film in sample 14 iConcentration [atoms / cm 3 Figure 38(B) shows the depth of the multilayer film in sample 15. Si concentration calculated from the secondary ion strength of SiO3 in the direction [atoms / cm³] 3 This indicates ].

[0520] Figures 38(A) and 38(B) show a silicon wafer and an oxide containing In or Ga. At the interface with film 81, and on the upper surface of oxide film 83 containing In or Ga, the Si concentration is It was found that the Si concentration of the oxide semiconductor film 82 was found to be high. The lower limit is 1 × 10 18 atoms / cm 3 It was found to be to that extent. Alternatively, an oxide film 81 containing Ga and an oxide film 83 containing In or Ga are provided. As a result, silicon caused by silicon wafers or surface contamination is transferred to the oxide semiconductor film 82. This can be considered to be because it will no longer have any impact.

[0521] Furthermore, the results shown in Figures 38(A) and 38(B) indicate that the expansion of silicon by heat treatment Dispersion is unlikely to occur, indicating that mixing during film formation is the primary cause.

[0522] Based on the above, by using a multilayer film as shown in this embodiment, a stable electrical characteristic can be obtained. It is possible to manufacture a lunger.

[0523] (Reference example) Here, we find the energy gap between the source and drain of a transistor using an oxide semiconductor. Let me explain about the wall.

[0524] As the oxide semiconductor film that forms the channel region, an intrinsic or substantially intrinsic oxide semiconductor film is used. When used, in a transistor having the oxide semiconductor film, the energy of the oxide semiconductor film A barrier of about half the energy gap between the pair of electrodes, which are the source and drain electrodes, and the acid It is thought to be formed between the oxide semiconductor film. However, in reality, the oxide semiconductor film The transistor used has a Vg-Id characteristic where the gate voltage is around 0V and the drain voltage is around 0V. The fact that the flow begins suggests that there is a problem with this way of thinking.

[0525] Therefore, as shown in Figure 39(A), the gate insulating film GI and the oxidation on the gate insulating film GI A monocrystalline semiconductor film OS, and a source electrode S and a drain electrode D provided on the oxide semiconductor film OS. Assuming a transistor having the structure and the channel length (L) of the transistor is changed The band structure in the dashed line H1-H2 was derived by calculation. See Figure 39(A). In this case, the region of the oxide semiconductor film OS in contact with the source electrode S and the drain electrode D is n-type. A low-resistance region n is provided. In other words, the oxide semiconductor film OS has a low-resistance region n, This includes an intrinsic or substantially intrinsic region i. In this calculation, oxide semiconductor The calculations were performed assuming a film OS thickness of 35 nm and a gate insulating film GI thickness of 400 nm.

[0526] By solving Poisson's equation, we can estimate the band's curvature, which is: Debye's shielding length λ D It was found that the length is characterized by the following. , k B This is the Boltzmann constant.

[0527]

number

[0528] In the above equation, the intrinsic carrier density n of the oxide semiconductor film OS i 6.6 × 10 -9 cm - 3 Assuming the dielectric constant ε of the oxide semiconductor film OS is 15 and the temperature is 300K, Shielding length λ D 5.7 × 10 10 It was found to be a very large value, μm. Therefore The channel length is the shielding length λ of the device. D 1.14 × 10, which is twice the amount of 1.14 × 10 11 Larger than μm Therefore, the energy barrier between the low-resistance region n and the intrinsic or substantially intrinsic region i is the oxide semi-semi It can be seen that this is half the energy gap of the conductive film OS.

[0529] Figure 40 shows channel lengths of 0.03 μm, 0.3 μm, 1 μm, 10 μm, and 100 μm. and 1 × 10 12 The calculated band structure for μm is shown. However, the source electrode and the drum The potential of the rain electrode is fixed to GND (0V). In Figure 40, n represents the low-resistance region. The region is indicated, i indicates an intrinsic or substantially intrinsic region sandwiched between low-resistance regions, and the dashed line is This shows the Fermi energy of an oxide semiconductor film, with the dashed line representing the mid-gap of the oxide semiconductor film. show.

[0530] From Figure 40, the channel length is sufficiently large 1 × 10 12 In the case of μm, the low resistance region and intrinsic The difference in electron energy in the virtually intrinsic region is the energy gap of the oxide semiconductor film. It was found that it was halved. However, as the channel length was reduced, the low resistance region gradually decreased. The difference in electron energy between the region and the intrinsic or substantially intrinsic region becomes smaller, and the channel length is 1 It was found that there is almost no energy barrier below μm. The energy is fixed by a pair of electrodes, which are the source electrode and the drain electrode.

[0531] As mentioned above, when the channel length is small, there is a low resistance region and intrinsic or substantially intrinsic It can be seen that the energy barrier with respect to the region becomes sufficiently small.

[0532] Here, when the channel length is small, the low-resistance region and the intrinsic or substantially intrinsic region We will consider why the energy barrier becomes sufficiently small.

[0533] Figure 41 shows a schematic diagram of an oxide semiconductor film and the band structure in the oxide semiconductor film. Let me explain. Figure 41(A) shows the intrinsic or substantially intrinsic region 601 and the low-resistance region 6 The lower end of the conduction band at the center of the channel length of an oxide semiconductor film 600 having 02 and 603 E c_0 is shown. Also, the channel length of the oxide semiconductor film 600 is denoted as L_0. Figure 41(A) In this case, L_0 > 2λ D That is the case.

[0534] Figure 41(B) shows an oxide semiconductor film with a smaller channel length than Figure 41(A), and its... The end structure is shown. Figure 41(B) shows the intrinsic or substantially intrinsic region 611 and the low-resistance region. The lower end of the conduction band at the center of the channel length of the oxide semiconductor film 610 having 612 and 613 Ec_1 is shown. Also, the channel length of the oxide semiconductor film 610 is denoted as L_1. Figure 41(B ) in channel length L_1 <L_0であり、L_1<2λ D That is the case.

[0535] Figure 41(C) shows that the oxide semiconductor film has more channels than the oxide semiconductor film shown in Figures 41(A) and 41(B). A short oxide semiconductor film and its band structure are shown. Figure 41(C) shows intrinsic or actual Oxide semiconductor film 620 having a qualitatively intrinsic region 621 and low-resistance regions 622, 623 The lower end Ec_2 of the conduction band at the center of the channel length is shown. Also, the oxide semiconductor film 620 Let the channel length be L_2. <L_1であり、L_2<<2λ D That is .

[0536] In Figure 41(A), the energy difference between the Fermi level Ef and the lower end of the conduction band Ec_0 is E The energy barrier ΔH_0 is shown, and in Figure 41(B), the Fermi level Ef and the lower end of the conduction band are shown. The energy difference Ec_1 is denoted as the energy barrier ΔH_1, and in Figure 41(C), The energy difference between the Lumi level Ef and the lower end of the conduction band Ec_2 is denoted as the energy barrier ΔH_2.

[0537] In an oxide semiconductor film, the region in contact with a pair of electrodes becomes a low-resistance region. Therefore, The closer the junction between the conductive or substantially intrinsic region and the low-resistance region is, the more energy is present at the lower end of the conduction band. The gy decreases and the curve becomes distorted. As shown in Figure 41(A), when the channel length L_0 is sufficiently large... In this case, the energy barrier ΔH_0 corresponds to Eg(band gap) / 2.

[0538] On the other hand, as shown in Figures 41(B) and 41(C), when the channel length decreases, conduction Because the curved portions of the lower ends Ec_1 and Ec_2 of the band overlap, the energy barrier ΔH_1 Therefore, ΔH_2 is thought to be lower than Eg / 2. In this way, the channel length becomes smaller. This results in a decrease in the lower end of the conduction band in the intrinsic or substantially intrinsic region. In this specification, the CBL effect (Conduction Band Lowering E) is used to describe this effect. (ffect)

[0539] Next, in the structure shown in Figure 39(A), the gate electrode GE is provided below the gate insulating film GI. Assuming a bottom-gate transistor, the channel length (L) of the transistor is The band structure in the dashed-dotted line H1-H2 after the change was calculated. The structure of the transistor used is shown in Figure 39(B). Note that in this calculation, oxide semiconductors were used. The calculations were performed assuming a conductive film OS has a thickness of 35 nm and a gate insulating film GI has a thickness of 400 nm.

[0540] Figure 42 shows the transistor with the said structure, with channel lengths of 1 μm, 10 μm, and 50 μm. m, 100 μm, 1 × 10 5 μm and 1 × 10⁻⁶ 12 Calculation results of the band structure at μm This is shown. However, the potentials of the source electrode, drain electrode, and gate electrode are fixed to GND (0V). In Figure 42, n represents the low-resistance region, and i represents the oxide semiconductor film. The dashed line indicates an oxide semiconductor film, showing intrinsic or substantially intrinsic regions sandwiched between low-resistance regions. The Fermi energy is shown, and the dashed line indicates the mid gap of the oxide semiconductor film.

[0541] The band structure shown in Figure 42 is similar to the calculation performed for the structure shown in Figure 39(A). This is the result obtained through calculation. However, if a gate electrode is provided as in the structure shown in Figure 39(B) In that case, even if the channel length (L) is greater than 1 μm, the low resistance region and the intrinsic or actual The energy barrier to the qualitatively intrinsic region is approximately constant, independent of the channel length (L). It can be seen that this is the value.

[0542] Figure 43 shows the relationship between the channel length (L length) and the structure of Figure 39(A) and Figure 39(B). This indicates the height of the energy barrier.

[0543] From Figure 43, in the structure of Figure 39(A) without a gate electrode, the channel length is large As time progresses, the height of the energy barrier increases monotonically, and the channel length becomes 1 × 10⁻⁶. 12 μm Sometimes, it is found that the energy gap of the oxide semiconductor film becomes half (1.6 eV). On the other hand, in the structure shown in Figure 39(B) with a gate electrode, the channel length is greater than 1 μm. Even in this case, it can be seen that the height of the energy barrier does not depend on the channel length.

[0544] From the above, transistors using intrinsic or substantially intrinsic oxide semiconductor films are CBL Due to the effect, the energy barrier is greater than half the energy gap of the oxide semiconductor film. As the voltage decreases, drain current flows from around 0V in the Vg-Id characteristic. It can be considered that this begins to occur. Also, transients larger than a certain channel length (1 μm) Since the energy barrier of the channel is a constant value regardless of the channel length, it is intrinsic or substantial. A transistor using an intrinsic oxide semiconductor film exhibits a gate voltage in its Vg-Id characteristics. It can be inferred that the drain current starts flowing from around 0V.

[0545] The multilayer film included in a transistor according to one embodiment of the present invention is an intrinsic or substantially intrinsic oxide Because it has a semiconductor film, the transistor having the multilayer film has a Vg-Id characteristic It can be inferred that drain current begins to flow when the power voltage is around 0V. [Examples]

[0546] In this embodiment, a table having an organic EL element and a transistor for driving the organic EL element. We will now explain the results of the fabrication and evaluation of the demonstration device.

[0547] The display device fabricated in this embodiment uses a transistor for driving organic EL elements, according to one aspect of the present invention. Sample a (four types: Sample 16, Sample 17, Sample 18, Sample 19) using a transistor. ) and comparative example comparative sample b (comparative sample 1, comparative sample 2, comparative sample 3, comparative sample 4) It is a type.

[0548] First, the preparation process for sample a will be explained. In this example, the explanation will be given with reference to Figure 4. ru.

[0549] First, as shown in Figure 4(A), a glass substrate is used as the substrate 11, and on the substrate 11, A electrode 15 was formed.

[0550] A 200nm thick tungsten film is formed using the sputtering method, and then photolithography is performed. A mask is formed on the tungsten film by the process, and the mask is used to form a part of the tungsten film. The part was etched to form the gate electrode 15.

[0551] Next, a gate insulating film 17 was formed on the gate electrode 15. The configuration of the gate insulating film 17 and The manufacturing method is the same as in Example 1, so it will be omitted here.

[0552] Next, a multilayer film 20 was formed on the gate electrode 15 via the gate insulating film 17. The structure and method of fabricating the film 20 are as follows: the substrate temperature when forming an oxide film containing In or Ga. Except for setting the temperature to 100°C, the process is the same as in Example 1, so it will be omitted here. The resulting configuration can be seen in Figure 4(B). Note that the driving transistor for the organic EL element is shown. In this setup, the channel length was set to 11 μm and the channel width to 4 μm.

[0553] Next, a portion of the gate insulating film 17 is etched to expose the gate electrode (not shown). As shown in Figure 4(C), a pair of electrodes 21 and 22 were formed in contact with the multilayer film 20. The configuration and manufacturing method of the pair of electrodes 21 and 22 are the same as in Example 1, and are therefore omitted here. do.

[0554] Next, the surface of the multilayer film 20 is treated with a cleaning solution of 85% phosphoric acid diluted 100 times. He carried out the rationale.

[0555] Next, a protective film 26 was formed on the multilayer film 20 and the pair of electrodes 21 and 22 (see Figure 4(D)). (See reference). The structure and manufacturing method of the protective film 26 are the same as in Example 1, so they are omitted here. .

[0556] Next, although not shown in the diagram, a portion of the protective film 26 is etched, and one of the pair of electrodes 21 and 22 An opening was formed to expose the part.

[0557] Next, a planarization film was formed on the protective film 26 (the subsequent configuration is not shown in the diagram). Here, After applying the composition onto the protective film 26, exposure and development are performed to expose a portion of the pair of electrodes. A planarized film having an opening was formed. The planarized film was made of acrylic with a thickness of 2.0 μm. A resin was formed. Afterward, a heat treatment was performed. The heat treatment was carried out at a temperature of 250°C. The procedure was performed for one hour in a nitrogen-containing atmosphere.

[0558] Next, a conductive film was formed to connect to a portion of the pair of electrodes. Here, it is the lower electrode of the light-emitting element. For example, a 50nm thick titanium film and a 200nm thick aluminum film are produced by sputtering. A film and a titanium film with a thickness of 8 nm are formed, and further, an oxidation is created as a microcavity structure. A silicon-containing indium tin oxide (ITSO) film was formed. The thickness of the ITSO film was as follows: The light-emitting elements in the pixels are 82nm, the light-emitting elements in the green pixels are 45nm, and the blue pixels are 82nm. The light-emitting elements included in the color pixels were set to 5 nm.

[0559] Next, a partition wall was formed to cover the edges of the conductive film. Here, a 1.0 μm thick plastic sheet was used as the partition wall. Liimide resin was formed. Afterward, it underwent heat treatment. The heat treatment was performed at a temperature of 250°C. The procedure was performed at °C and in a nitrogen-containing atmosphere for 1 hour.

[0560] Next, a spacer with an inverted tapered shape was formed on the partition wall. Here, a spacer with a thickness of 1.0 μm was formed. The sa was formed using a negative-type photosensitive resin. After that, it was subjected to heat treatment. The treatment was carried out at a temperature of 250°C in a nitrogen-containing atmosphere for 1 hour.

[0561] Furthermore, the heat treatment was carried out at a temperature of 230°C in a nitrogen-containing atmosphere for 1 hour.

[0562] Next, an EL layer and an upper electrode were formed on the conductive film. The EL layer and upper electrode are for each color pixel. This is a common configuration for light-emitting elements. In this embodiment, the light-emitting element has a blue light-emitting layer in its EL layer. It comprises a fluorescent emission unit and a phosphorescent emission unit having a green emission layer and a red emission layer. This is a tandem-type light-emitting element. For the upper electrode, magnesium and silver are co-deposited. The film was deposited to a thickness of 15 nm.

[0563] Here, in samples 16, 17, and 18, a color filter and a blue light are applied to the opposing substrate. A glass substrate having a rack matrix was used. In addition, in sample 19, the opposing substrate had recesses. A glass substrate containing a desiccant with calcium oxide was used.

[0564] Then, as a sealing material, a UV-curing resin (manufactured by Nagase ChemteX Corporation X) is applied to the opposing substrate. NR5516Z) was applied.

[0565] Next, while applying pressure, the substrate 11 and the opposing substrate were bonded together.

[0566] Subsequently, the sealant was cured by irradiation with ultraviolet light. Furthermore, inside the clean oven... The sample was then heated at 80°C for 1 hour.

[0567] Sample a was prepared using the above procedure.

[0568] Furthermore, a comparative test was conducted on a sample in which no oxide film 19 containing In or Ga was formed. It was prepared as material b. In comparative sample 1, comparative sample 2, and comparative sample 3, the opposing substrate was A glass substrate having a color filter and a black matrix was used. In comparative sample 4, A glass substrate containing a desiccant with calcium oxide in its recesses was used as the opposing substrate.

[0569] Sample a and comparative sample b prepared in this embodiment are, as shown in Figure 44, gate drivers The number of stages is 960, and the number of stages in the source driver is 1620 (RGB x 540).

[0570] For sample a and comparative sample b, when the entire surface is illuminated with white light, the driving transistors of each pixel The current flowing through the terminal was measured. As shown in Figure 44, in a certain stage of the source driver, The current was measured from the current monitor side toward the display signal side.

[0571] The measurement conditions were 10V for the anode and -4V for the cathode. The data voltages were also measured for sample 16 and sample 16. 17. In comparative sample 1 and comparative sample 2, the brightness was 300 cd / m². 2 equivalent, 150cd / m 2 Equivalent to, or 90 cd / m² 2 The settings were adjusted to be equivalent, and in sample 18 and comparative sample 3... Brightness of 300 cd / m² 2 Equivalent to, or 50 cd / m² 2 It was set to be equivalent. Sample 1 The data voltages for sample 9 and comparative sample 4 are for a brightness of 300 cd / m² when the opposing substrate is the same as the other samples. 2 Equivalent to or 50 cd / m² 2 I set it to be equivalent. Specifically, first, the brightness was set to 300c. d / m 2 Equivalent to or 50 cd / m² 2 In other samples where the data voltage was set to be equivalent, Then, the current flowing through the light-emitting element was determined. And, in sample 19 and comparative sample 4, the light-emitting element was determined. The data voltage was set so that the current flowing through it would be the same value.

[0572] Specifically, for sample 16, there were three options: 3.99V, 2.85V, and 2.41V, and for sample 17... So, there are three possibilities: 3.57V, 2.68V, and 2.03V. For sample 18, it was 3.78V, 1. Two values ​​of 91V were used, and for sample 19, two values ​​of 3.78V and 1.98V were used. For comparison sample 1, there were three values: 3.67V, 2.74V, and 2.20V. For comparison sample 2, there were three values. There were three options: 46V, 2.57V, and 2.10V. For comparison sample 3, there were 3.78V and 1.98V. For comparative sample 4, two values ​​were used: 3.99V and 2.41V.

[0573] Figure 45 shows the current measurement results for sample 17 and comparative sample 2. In Figure 45, the horizontal axis is The graph shows the number of gate driver stages, with the vertical axis representing the current. Here, the first stage of the source driver... Steps 270, 540, 810, 811, 1080, 1350, and The results of measuring the current of the driving transistor for each pixel in the 1620th row are shown in one graph. This is summarized below.

[0574] Furthermore, Figure 46 shows the variation in current difference between adjacent pixels in each sample. The vertical axis shows ±3σ(row) / ave. Here, σ(row) is the gate drive. The row (iba) represents the standard deviation of the current difference between adjacent pixels, and ave represents the total pixel current. This represents the average body size.

[0575] From Figures 45 and 46, both sample a and comparison sample b show current variation due to pixels. It can be seen that it is small. In particular, sample a, which uses a transistor according to one aspect of the present invention, is comparative Compared to sample b, the variation in current due to pixels is smaller. Based on the above, one aspect of the present invention This has shown that the electrical characteristics of transistors can be improved. One embodiment demonstrated that the initial display quality of a display device can be improved.

[0576] Furthermore, in sample 19 and comparative sample 4, a black and white checkerboard pattern image was displayed across the entire surface for 72 hours. The data voltage at this time was set using the same method as above, with a brightness of 300 cd / m². 2 Quite I set it up to work that way.

[0577] Then, when sample 19 and comparative sample 4 are displayed with a white image covering the entire surface, the driving of each pixel The current flowing through the transistor was measured. Figure 47 shows the results for sample 19 and comparison sample 4. This is shown. Figures 48 to 51 show the measurement results of the current for sample 19 and comparative sample 4.

[0578] The data voltage at this time was set using the same method as above, with a brightness of 50 cd / m². 2 Equivalent or 30 0 cd / m 2 It was set to be equivalent. Brightness 50 cd / m² 2 In the case of sample 19 The current measurement results are shown in Figure 48, and the current measurement results for comparison sample 4 are shown in Figure 49, with a brightness of 300c. d / m 2Figure 50 shows the measurement results of the current of sample 19 in the corresponding case, and the measurement of the current of comparison sample 4. The results are shown in Figure 51.

[0579] In Figures 48 to 51, the horizontal axis represents the number of gate driver stages, and the vertical axis represents the current. Here, the driving of each pixel in the 1st, 810th, and 1620th stages of the source driver. The results of measuring the current of each transistor are shown below.

[0580] In both sample 19 and comparative sample 4, when a white image was displayed across the entire surface, An image appeared that looked like the black and white checkered pattern displayed on the screen was inverted. While the image is being displayed, the characteristics of the driving transistors for the pixels in the white areas of the checkerboard pattern are... It is thought that the brightness decreased because the current dropped due to a shift. Therefore, In the subsequent full-surface white illumination, the white areas of the checkerboard pattern appeared differently from the black areas of the checkerboard pattern. The pixels in that area have lower brightness, making it appear as if a checkerboard pattern has been imprinted on them. It's possible.

[0581] Sample 19, which uses a transistor according to one aspect of the present invention, differs from comparative sample 4 in the above-mentioned burning. The drop in current is suppressed. Therefore, according to one aspect of the present invention, It has been shown that the electrical characteristics of the inverter can be improved.

[0582] Furthermore, the transistor used in sample a is one embodiment of the present invention (hereinafter referred to as transistor a). ) and the transistor used in comparative sample b (hereinafter referred to as transistor b), A constant current stress test was conducted. The constant current stress test was performed in an atmospheric, dark environment. I went there.

[0583] Note that the Vg-Id characteristic measurement is performed with a drain voltage of 0.1V or 10V, and the gate voltage... This was performed by measuring the drain current when the voltage was swept in the range of -15V to 15V.

[0584] In the constant current stress test, first the substrate temperature is set to room temperature (20°C to 25°C), and the first... The Vg-Id characteristics were measured. Subsequently, for transistor a, the substrate temperature was set to 60°C. The source potential is set to ground potential (GND), the drain potential to 10V, and the gate potential to 6.11V. This was held for 11 hours. Also, for transistor b, the substrate temperature was set to 60°C, and the source power was controlled. With the position set to ground potential (GND), the drain potential to 10V, and the gate potential to 5.63V, at 13:00 The test was held for a period of time. The test was conducted at 100 seconds, 300 seconds, and 600 seconds after the start of the constant current stress test. , after 1000 seconds, after 1800 seconds, after 3600 seconds, after 7200 seconds, after 10000 seconds, 180 After 00 seconds, After 21600 seconds, After 25200 seconds, After 28800 seconds, After 32400 seconds, 360 After 00 seconds, and after 39600 seconds (transistor a further 43200 seconds and 46800 seconds) The stress was stopped after a few seconds, and the Vg-Id characteristics at each stress duration were measured at room temperature. It was decided.

[0585] Figure 52 shows the results of constant current stress tests on transistors a and b. In Figure 52, the vertical axis represents the rate of change of the drain current, and the horizontal axis represents the stress time. Figure 52 From this, we can see that transistor a exhibits a smaller change in drain current compared to transistor b. Therefore, according to one aspect of the present invention, the electrical characteristics of a transistor can be improved. It has been shown that this is possible. [Examples]

[0586] In this example, the measurement results of the impurity concentration of the oxide insulating film formed on the oxide semiconductor film are shown. I will explain this.

[0587] First, we will explain the manufacturing process of the transistors included in samples 20 to 22. This embodiment will be described with reference to Figure 4.

[0588] First, a glass substrate was used as the substrate 11, and a gate electrode 15 was formed on the substrate 11.

[0589] A 100nm thick tungsten film is formed using the sputtering method, and then photolithography is performed. A mask is formed on the tungsten film by the process, and the mask is used to form a part of the tungsten film. The part was etched to form the gate electrode 15.

[0590] Next, a gate insulating film 17 was formed on the gate electrode 15.

[0591] As the gate insulating film 17, a silicon nitride film with a thickness of 50 nm and an oxide film with a thickness of 200 nm are used. It was formed by laminating silicon nitride films.

[0592] The silicon nitride film is produced using 50 sccm of silane and 5000 sccm of nitrogen as raw material gases. It is supplied to the processing chamber of the razma CVD apparatus, the pressure in the processing chamber is controlled to 60 Pa, and 27.12 M It was formed by supplying 150W of power using a high-frequency power supply of Hz.

[0593] The silicon oxidoxide-nitride film is made from 20 sccm of silane and 3000 sccm of nitrous oxide. The gas is supplied to the processing chamber of the plasma CVD apparatus, and the pressure inside the processing chamber is controlled to 40 Pa. It was formed by supplying 100W of power using a 27.12MHz high-frequency power supply.

[0594] The silicon nitride film and the silicon oxidizide film are formed at a substrate temperature of 350°C. did.

[0595] Next, an oxide semiconductor film was formed to overlap the gate electrode 15 via the gate insulating film 17. In this embodiment, instead of the multilayer film 20 shown in Figure 4(B), a single-layer oxide semiconductor film 1 is used. Formed 8.

[0596] Here, an IGZO film, which is a CAAC-OS film, is sputtered onto the gate insulating film 17. Formed by the method, a mask is formed on the IGZO film by a photolithography process, and the mask A portion of the IGZO film was etched using [a specific method]. Subsequently, the etched IGZO film was [treated]. A heat treatment was performed to form an oxide semiconductor film 18. In this example, a thickness of 35 nm was used. A GZO film was formed.

[0597] IGZO films are sputtered using an In:Ga:Zn=1:1:1 (atomic ratio) sputtering target. ) is used as the target, and 50 sccm of argon and 50 sccm of sputtering gas are used. Oxygen is supplied into the processing chamber of the sputtering apparatus, and the pressure inside the processing chamber is controlled to 0.6 Pa. The film was formed by supplying 5kW of DC power. The substrate temperature during the formation of the IGZO film was 1 The temperature was set to 70°C.

[0598] The heat treatment involves heating at 450°C for 1 hour in a nitrogen atmosphere, followed by nitrogen and The material was heat-treated at 450°C for 1 hour in an oxygen atmosphere.

[0599] Next, a portion of the gate insulating film 17 is etched to expose the gate electrode (not shown). As shown in Figure 4(C), a pair of electrodes 21 and 22 that are in contact with the oxide semiconductor film 18 are formed I did it.

[0600] Here, a conductive film is formed on the gate insulating film 17 and the oxide semiconductor film 18, and photolithography is performed. A mask is formed on the conductive film by a graphing process, and a portion of the conductive film is processed using the mask. A pair of electrodes 21 and 22 were formed by cutting. The conductive film was made of tan material with a thickness of 50 nm. A 400 nm thick aluminum film is formed on the Gusten film, and a thickness of 1 A 00nm titanium film was formed.

[0601] Next, an oxide insulating film 23 was formed on the oxide semiconductor film 18 and the pair of electrodes 21 and 22. .

[0602] The oxide insulating film 23 is a silane with a flow rate of 30 sccm and a silane with a flow rate of 4000 sccm. Using nitrous oxide as the raw material gas, with a processing chamber pressure of 40 Pa and a substrate temperature of 220°C, 150 By a plasma CVD method in which high-frequency power W is supplied to the upper electrode of a parallel plate electrode, oxidation and nitridation are performed. A silicon film was formed.

[0603] Next, an oxide insulating film 24 was continuously formed on the oxide insulating film 23. Here, continuously and After forming the oxide insulating film 23, the oxide film is not exposed to the atmosphere and is processed within the same plasma CVD apparatus. The objective is to form an insulating film 24.

[0604] As the oxide insulating film 24, silane at a flow rate of 160 sccm and at a flow rate of 4000 sccm Using nitrous oxide as the raw material gas, with the pressure in the processing chamber set to 200 Pa and the substrate temperature to 220°C, 1 By using a plasma CVD method in which 500W of high-frequency power is supplied to the upper electrode of a parallel plate electrode, the thickness A silicon oxide nitride film with a thickness of 400 nm was formed. Under these conditions, the stoichiometric composition was satisfied. A silicon oxidoxide nitride film containing more oxygen than the amount of oxygen can be formed. That is, heating This allows for the formation of a silicon oxidizride film in which some of the oxygen is removed.

[0605] Next, a heat treatment was performed. This heat treatment was carried out at a temperature of 350°C and included oxygen and nitrogen. I went for an hour based on the atmosphere.

[0606] A sample 20 containing a transistor was fabricated through the above process.

[0607] Furthermore, in the preparation process for sample 20, conditions were used in which the oxide insulating film 23 was not formed. Material 21 was prepared.

[0608] Furthermore, in the preparation process for sample 20, the deposition temperature of the oxide insulating film 24 was set to 350°C, and acid A sample formed by creating an oxide insulating film 23 and an oxide insulating film 24 in a separate plasma CVD apparatus. This will be referred to as sample 22. That is, sample 22 is exposed to the atmosphere after an oxide insulating film 23 is formed. Ta.

[0609] Next, SIMS measurements were performed on samples 20 to 22. The concentrations of hydrogen, nitrogen, and fluorine in 23 and the oxide insulating film 24 are shown in Figure 53(A), This is shown in Figures 53(B) and 53(C). Furthermore, the hydrogen in the oxide insulating film 24 in sample 21, The concentrations of nitrogen and fluorine are shown in Figures 53(D), 53(E), and 53(F), respectively. Furthermore, the boron concentrations in the oxide insulating film 23 and oxide insulating film 24 in sample 22 are shown in Figure 5. As shown in 4(A), the boron concentration of the oxide insulating film 24 in sample 21 is shown in Figure 54(B). In Figures 53 and 54, the horizontal axis represents the depth from the surface of each sample, and the vertical axis represents the depth of each element. This indicates the concentration.

[0610] In sample 20, the hydrogen concentration and nitrogen concentration are as follows: oxide insu...

Claims

1. It has pixels, The aforementioned pixel is a display device having a transistor and a liquid crystal element, A first conductive film and A first insulating film having a region located above the first conductive film, A multilayer film having a region located above the first insulating film, A second conductive film and a third conductive film having a region located above the multilayer film, A second insulating film having a region located above the second conductive film, a region located above the multilayer film, and a region located above the third conductive film, A third insulating film having a region located above the second insulating film, A fourth conductive film having a region located above the third insulating film, A fourth insulating film having a region located above the fourth conductive film, A fifth conductive film having a region located above the fourth insulating film, The first conductive film has the function of being the gate electrode of the transistor and the function of being a scanning line. The first insulating film has the function of being the gate insulating film of the transistor. The multilayer film has a channel formation region for the transistor, The multilayer film comprises an oxide semiconductor film and an oxide film having a region located above the oxide semiconductor film. The oxide semiconductor film has In, Ga, and Zn in an atomic ratio of x2:y2:z2, The oxide film has In, Ga, and Zn in an atomic ratio of x1:y1:z1, y1 / x1 is greater than y2 / x2, The second conductive film has the function of either the source electrode or the drain electrode of the transistor, and the function of a signal line. The third conductive film functions as either the source electrode or the drain electrode of the transistor. The second insulating film comprises an oxide insulating film and a nitride insulating film having a region located above the oxide insulating film. The third insulating film has an organic resin film, The fourth conductive film has the function of a common electrode for the liquid crystal element. The fifth conductive film has the function of a pixel electrode of the liquid crystal element. The second insulating film has a first opening, The third insulating film has a second opening, The fourth conductive film has a third opening, The fourth insulating film has a fourth opening, The fifth conductive film has a region in which the first opening, the second opening, the third opening, and the fourth opening overlap, and is in contact with the third conductive film. In a cross-sectional view of the pixel, the third conductive film has a region in contact with the upper surface of the multilayer film and a region in contact with the side surface of the multilayer film. In a cross-sectional view of the pixel, the second insulating film has a region in contact with the multilayer film. In a cross-sectional view of the pixel, the fourth insulating film has a region in contact with the side surface of the third insulating film, a region in contact with the second insulating film, and a region in contact with the third conductive film, in a display device.

2. It has pixels, The aforementioned pixel is a display device having a transistor and a liquid crystal element, A first conductive film and A first insulating film having a region located above the first conductive film, A multilayer film having a region located above the first insulating film, A second conductive film and a third conductive film having a region located above the multilayer film, A second insulating film having a region located above the second conductive film, a region located above the multilayer film, and a region located above the third conductive film, A third insulating film having a region located above the second insulating film, A fourth conductive film having a region located above the third insulating film, A fourth insulating film having a region located above the fourth conductive film, A fifth conductive film having a region located above the fourth insulating film, The first conductive film has the function of being the gate electrode of the transistor and the function of being a scanning line. The first insulating film has the function of being the gate insulating film of the transistor. The multilayer film has a channel formation region for the transistor, The multilayer film comprises an oxide semiconductor film and an oxide film having a region located above the oxide semiconductor film. The oxide semiconductor film has In, Ga, and Zn in an atomic ratio of x2:y2:z2, The oxide film has In, Ga, and Zn in an atomic ratio of x1:y1:z1, y1 / x1 is greater than y2 / x2, The second conductive film has the function of either the source electrode or the drain electrode of the transistor, and the function of a signal line. The third conductive film functions as either the source electrode or the drain electrode of the transistor. The second insulating film comprises an oxide insulating film and a nitride insulating film having a region located above the oxide insulating film. The third insulating film has an organic resin film, The fourth conductive film has the function of a common electrode for the liquid crystal element. The fifth conductive film has the function of a pixel electrode of the liquid crystal element. The second insulating film has a first opening, The third insulating film has a second opening, The fourth conductive film has a third opening, The fourth insulating film has a fourth opening, The fifth conductive film has a region in which the first opening, the second opening, the third opening, and the fourth opening overlap, and is in contact with the third conductive film. In a cross-sectional view of the pixel, the third conductive film has a region in contact with the upper surface of the multilayer film and a region in contact with the side surface of the multilayer film. In a cross-sectional view of the pixel, the second insulating film has a region in contact with the multilayer film. In a cross-sectional view of the pixel, the fourth insulating film has a region in contact with the side surface of the third insulating film, a region in contact with the second insulating film, and a region in contact with the third conductive film. In a plan view of the pixel, the fifth conductive film has a plurality of slits, A display device in which, in a plan view of the pixel, the plurality of slits do not overlap with the third aperture.

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