Spatial virtual measurement prediction using multimodal machine data

Abstract

To provide spatial virtual measurement prediction using multimodal machine data. [Solution] The system and method described are for predicting the overlay of a patterned wafer. The method may include receiving a mechanical dataset comprising parameters at multiple locations on the wafer, generating an integrated dataset by aggregating the parameters and mapping the aggregated parameters to an equally spaced grid, and generating a predicted overlay on the patterned wafer based on processing the integrated dataset, at least partially, using a trained machine learning (ML) model.

Description

[Technical Field]

[0001] (Cross-reference of related applications) This application claims the benefit of U.S. Provisional Application No. 63 / 720,923, filed on November 15, 2024, which is incorporated herein by reference in its entirety. [Background technology]

[0002] Typical systems and methods in semiconductor manufacturing may rarely measure overlays on patterned wafers. Infrequent sampling can allow out-of-spec (or spec-out) wafers to proceed to the next process without rework, thereby reducing yield during manufacturing. Furthermore, such infrequent sampling may necessitate reworking of spec-out wafers, thereby increasing costs during manufacturing. Additionally, each overlay can be time-consuming to measure. Such time-consuming measurements can make sampling of more patterned wafers impractical.

[0003] Therefore, there is an unmet need for technical solutions that can at least address these technical challenges. [Overview of the project] [Means for solving the problem]

[0004] The systems and methods described herein provide technical solutions for overcoming technical challenges during measurement (e.g., predicting or measuring patterned wafer overlays), thereby improving yield and reducing costs in semiconductor manufacturing. In some cases, the systems and methods described herein may be referred to as spatial virtual measurement (VM).

[0005] In some respects, what is disclosed herein is a method for predicting wafer overlays, the method comprising (a) receiving a machine dataset comprising parameters at multiple locations on a wafer, the wafer being patterned by machine to result in a patterned wafer, (b) generating an integrated dataset by (i) aggregating the parameters, and (ii) mapping the aggregated parameters to an equally spaced grid, and (c) generating a predicted overlay on the patterned wafer based on processing the integrated dataset at least partially using a trained machine learning (ML) model, and (d) inferring a statistical deviation of the predicted overlay from a successfully patterned wafer. In some embodiments, the machine dataset is a multimodal dataset comprising matching data, leveling data, lens data, servo data, advanced process control (APC) data, or fault detection and classification (FDC) data. In some embodiments, the multiple locations of the machine dataset comprise locations across the patterned wafer that are random, uniformly distributed, or non-uniformly distributed. In some embodiments, the method further includes applying an estimation function to a predicted overlay to predict measurements at multiple other locations different from multiple locations on the predicted overlay. In some embodiments, the multiple other locations on the predicted overlay include locations across the patterned wafer that are random, uniformly distributed, or non-uniformly distributed. In some embodiments, the method further includes re-patterning the patterned wafer when it is determined that the statistical deviation is outside a specified threshold. In some embodiments, the method further includes using the predicted overlay to adjust the parameters of a machine before the machine patterns subsequent wafers. In some embodiments, the method further includes using the predicted overlay to predict drift or deviation in the machine or the machine process. In some embodiments, the measurements of the overlay or predicted overlay include critical dimensions (CD) or film thickness.In some embodiments, the measurements of the overlay or predicted overlay include spatial differences or displacements between layers of the patterned wafer. In some embodiments, the method further includes using the predicted overlay to predict anomalies in the patterned wafer. In some embodiments, the method further includes using the predicted overlay to adjust (i) one or more machine parameters or (ii) one or more process parameters of the machine before patterning subsequent wafers. In some embodiments, the machine process comprises a lithography process, an etching process, or a thin film process. In some embodiments, the method further includes adjusting the density of the equally spaced grid based on at least a user-defined criterion or statistical deviation. In some embodiments, the predicted overlay is operable to implement advanced process control (APC) by using the predicted overlay to determine APC parameters and adjusting the machine parameters in real time based on at least the determined parameters, the adjusted parameters improving the yield of subsequent wafers patterned by the machine by at least 1%. In some embodiments, the trained ML model is trained using at least one or more of the following: (i) an equally spaced grid, (ii) an integrated dataset, or (iii) a measured overlay of a patterned wafer. In some embodiments, the method further includes using transfer learning to update a portion of the trained ML model before patterning subsequent wafers, the transfer learning being based at least on analyzing recent trends between the machine dataset and the measured overlay. In some embodiments, the method further includes training the ML model using one or more machine datasets comprising parameters from two or more machines used to pattern wafers. In some embodiments, the method further includes training the ML model using one or more overlays comprising measurements from two or more machines used to pattern wafers.In some embodiments, the trained ML model is a deep neural network comprising an encoder layer configured to acquire (i) global context features and (ii) in-input feature correlations of the patterned wafer; a decoder layer configured to determine the global context features of the patterned wafer; and a skip connection layer configured to generate a predicted overlay using at least local context features and in-input feature correlations. In some embodiments, the trained ML model is configured to preserve the spatial scale of any features in the predicted overlay. In some embodiments, the statistical deviation comprises a mean deviation or a sigma deviation. In some embodiments, the predicted overlay is operable to perform virtual measurement (VM), root cause analysis (RCA), or image measurement (IM). In some embodiments, the method further includes repeating (a)-(d) until all layers of the patterned wafer have been patterned by machine.

[0006] In another aspect, disclosed herein is a computer program product for predicting wafer overlays, the computer program product comprising at least one non-transient computer-readable medium having a computer-readable program code portion embodied therein, the computer-readable program code portion comprising an executable portion configured to receive a machine dataset comprising parameters at multiple locations on a wafer, wherein the wafer comprises: an executable portion which is machine-patterned to yield a patterned wafer; an executable portion configured to generate an integrated dataset by (i) aggregating the parameters and (ii) mapping the aggregated parameters to an equally spaced grid; an executable portion configured to generate a predicted overlay on the patterned wafer based on at least partially processing the integrated dataset using a trained machine learning (ML) model; and an executable portion configured to infer a statistical deviation of the predicted overlay from a successfully patterned wafer.

[0007] In another aspect, disclosed herein is a system for predicting a wafer overlay, comprising at least one processor and instructions executable by at least one processor to cause the at least one processor to perform an operation including (a) receiving a machine dataset comprising parameters at multiple locations on a wafer, the wafer being patterned by machine to yield a patterned wafer, (b) generating an integrated dataset by (i) aggregating the parameters, and (ii) mapping the aggregated parameters to an equally spaced grid, and (c) generating a predicted overlay on the patterned wafer based on processing the integrated dataset at least partially using a trained machine learning (ML) model, and (d) inferring a statistical deviation of the predicted overlay from a successfully patterned wafer.

[0008] Additional aspects and advantages of this disclosure will be readily apparent from the following detailed description, which shows and describes only illustrative embodiments of this disclosure. As will be recognized, other different embodiments are possible, and some of their details can be modified in various obvious ways, all without departing from this disclosure. Therefore, the drawings and description are not restrictive and are intended to be illustrative in nature. For example, the present invention provides the following items: (Item 1) A method for predicting wafer overlay, wherein the above method is (a) Receiving a machine data set comprising parameters at multiple locations on a wafer, wherein the wafer is machine-patterned to produce a patterned wafer, (b)(i) Aggregate the above parameters, and (ii) Map the aggregated parameters to an equally spaced grid to generate an integrated dataset, (c) generating a predicted overlay on the patterned wafer, at least in part, based on processing the integrated dataset using a trained machine learning (ML) model. (d) Inferring the statistical deviation of the above predicted overlay from a properly patterned wafer. Methods that include... (Item 2) The method according to the above item, wherein the above machine dataset is a multimodal dataset comprising alignment data, leveling data, lens data, servo data, advanced process control (APC) data, or fault detection and classification (FDC) data. (Item 3) The method according to any one of the above items, wherein the plurality of locations in the above machine data set comprises locations that cross the patterned wafer, and the locations that cross the patterned wafer are random, uniformly distributed, or non-uniformly distributed. (Item 4) The method according to any one of the above items, further comprising applying an estimation function to the predicted overlay and predicting measurements at several other locations on the predicted overlay that are different from the several locations mentioned above. (Item 5) The method according to any one of the above items, wherein the above multiple other locations of the predicted overlays include locations that traverse the patterned wafer, and the locations that traverse the patterned wafer are random, uniformly distributed, or non-uniformly distributed. (Item 6) The method of any one of the above items, further comprising re-patterning the patterned wafer when it is determined that the above statistical deviation is outside a specified threshold. (Item 7) The method of any one of the above items, further comprising using the predicted overlay described above and adjusting the parameters of the machine before patterning a subsequent wafer with the machine. (Item 8) The method of any one of the above items, further comprising using the predicted overlay described above to predict drift or deviation in the machine or the process of the machine described above. (Item 9) The measured values ​​of the above-mentioned overlay or the above-mentioned predicted overlay are provided by the method described in any one of the above items, comprising critical dimensions (CD) or film thickness. (Item 10) The method according to any one of the above items, wherein the measured values ​​of the above overlay or the above predicted overlay include spatial differences or displacements between the layers of the patterned wafer. (Item 11) The method of any one of the above items, further comprising using the predicted overlay described above to predict anomalies in the patterned wafer described above. (Item 12) The method according to any one of the above items, further comprising using the predicted overlay before patterning a subsequent wafer, and (i) adjusting one or more parameters of the above machine or (ii) one or more process parameters of the above machine. (Item 13) The process of the above machine is the method according to any one of the above items, comprising a lithography process, an etching process, or a thin film process. (Item 14) The method of any one of the above items, further comprising adjusting the density of the equally spaced grids based at least on a user-defined criterion or the statistical deviation described above. (Item 15) The predicted overlay above is, Using the predicted overlay described above, the parameters for Advanced Process Control (APC) are determined, Adjusting the parameters of the above machine in real time, at least based on using the parameters determined above. Therefore, it is possible to operate in order to perform the above APC, The method according to any one of the above items, wherein the above-mentioned adjusted parameters improve the yield of subsequent wafers patterned by the above-mentioned machine by at least 1%. (Item 16) The method according to any one of the above items, wherein the trained ML model is trained using at least one of the following: (i) the equally spaced grid, (ii) the integrated dataset, or (iii) the measured overlay of the patterned wafer. (Item 17) The method according to any one of the above items, further comprising using transfer learning to update a portion of the above-trained ML model before patterning subsequent wafers, wherein the transfer learning is at least based on analyzing recent trends between the above-machine dataset and the above-measured overlay. (Item 18) The method according to any one of the above items, further comprising training the above ML model using one or more machine datasets having parameters from two or more machines used to pattern the above wafers. (Item 19) The method according to any one of the above items, further comprising training the above ML model using one or more overlays having measurements from two or more machines used to pattern the above wafer. (Item 20) The above-trained ML model, (i) an encoder layer configured to acquire the global context features of the patterned wafer and (ii) the in-input feature correlations, A decoder layer configured to determine the global contextual features of the patterned wafer, A skip connection layer configured to generate the predicted overlay using at least local context features and the above-mentioned in-input feature correlations, A deep neural network comprising the method described in any one of the above items. (Item 21) The method according to any one of the above items, wherein the trained ML model is configured to preserve the spatial scale of any feature of the predicted overlay. (Item 22) The above statistical deviation is the method described in any one of the above items, comprising a mean deviation or a sigma deviation. (Item 23) The predicted overlay described above is operable to perform virtual measurement (VM), root cause analysis (RCA), or image measurement (IM) as described in any one of the above items. (Item 24) The method according to any one of the above items, further comprising repeating (a)-(d) until all layers of the patterned wafer are patterned by the machine. (Item 25) A computer program product for predicting wafer overlays, wherein the computer program product comprises at least one non-transient computer-readable medium, the at least one non-transient computer-readable medium having a computer-readable program code portion embodied therein, and the computer-readable program code portion is An executable part configured to receive a machine data set comprising parameters at multiple locations on a wafer, wherein the wafer is patterned by machine to produce a patterned wafer, (i) an executable component configured to generate an integrated dataset by aggregating the above parameters and (ii) mapping the aggregated parameters to an equally spaced grid, An executable component configured to generate a predicted overlay on the patterned wafer, at least in part, based on processing the above integrated dataset using a trained machine learning (ML) model, A viable component configured to infer the statistical deviation of the above predicted overlay from a properly patterned wafer, and A computer program product that includes the following features. (Item 26) A system for predicting wafer overlays, the system comprising at least one processor and instructions, the instructions being provided to the at least one processor, (a) Receiving a machine data set comprising parameters at multiple locations on a wafer, wherein the wafer is machine-patterned to produce a patterned wafer, (b)(i) Aggregate the above parameters, and (ii) Map the aggregated parameters to an equally spaced grid to generate an integrated dataset, (c) generating a predicted overlay on the patterned wafer, at least in part, based on processing the integrated dataset using a trained machine learning (ML) model. (d) Inferring the statistical deviation of the above predicted overlay from a properly patterned wafer. A system that is executable by at least one of the above processors to perform an operation including the above. (Summary of this disclosure) The subject of this description is a system and method for predicting the overlay of a patterned wafer. The method may include receiving a mechanical dataset comprising parameters at multiple locations on the wafer, generating an integrated dataset by aggregating the parameters and mapping the aggregated parameters to an equally spaced grid, and generating a predicted overlay for the patterned wafer based on processing the integrated dataset, at least partially, using a trained machine learning (ML) model.

[0009] (Integrated by reference) All publications, patents, and patent applications referenced herein are incorporated herein by reference to the same extent as each individual publication, patent, or patent application is shown to be incorporated by specific and individual reference. To the extent that any publications and patents or patent applications incorporated by reference conflict with the disclosure contained herein, this specification is intended to take precedence and / or supersede any such conflicting material. [Brief explanation of the drawing]

[0010] Novel features of this disclosure are described in detail in the attached claims. A deeper understanding of the features and advantages of this disclosure will be obtained by referring to the following detailed description, which describes illustrative embodiments in which the principles of this disclosure are utilized, and to the accompanying drawings.

[0011] [Figure 1A] Figures 1A–1C depict exemplary architectures or pipelines configured to implement a spatial virtual measurement (VM) method for predicting wafer overlays, according to several embodiments. Figure 1A depicts an exemplary high-level architecture or pipeline that may be configured to determine or receive multimodal machine data from processing equipment or processes in a manufacturing environment, and to use the multimodal machine data to implement the method herein for predicting overlays with high spatial density. Figure 1B depicts an exemplary low-level architecture or pipeline that may be configured to implement the method herein for training a machine learning (ML) model to predict wafer overlays. Figure 1C depicts different process equipment and processes that may be used to produce patterned wafers. [Figure 1B]Figures 1A–1C depict exemplary architectures or pipelines configured to implement a spatial virtual measurement (VM) method for predicting wafer overlays, according to several embodiments. Figure 1A depicts an exemplary high-level architecture or pipeline that may be configured to determine or receive multimodal machine data from processing equipment or processes in a manufacturing environment, and to use the multimodal machine data to implement the method herein for predicting overlays with high spatial density. Figure 1B depicts an exemplary low-level architecture or pipeline that may be configured to implement the method herein for training a machine learning (ML) model to predict wafer overlays. Figure 1C depicts different process equipment and processes that may be used to produce patterned wafers. [Figure 1C] Figures 1A–1C depict exemplary architectures or pipelines configured to implement a spatial virtual measurement (VM) method for predicting wafer overlays, according to several embodiments. Figure 1A depicts an exemplary high-level architecture or pipeline that may be configured to determine or receive multimodal machine data from processing equipment or processes in a manufacturing environment, and to use the multimodal machine data to implement the method herein for predicting overlays with high spatial density. Figure 1B depicts an exemplary low-level architecture or pipeline that may be configured to implement the method herein for training a machine learning (ML) model to predict wafer overlays. Figure 1C depicts different process equipment and processes that may be used to produce patterned wafers.

[0012] [Figure 2A]Figures 2A-2D depict exemplary spatial virtual measurement (VM) methods for predicting wafer overlays according to several embodiments. Figure 2A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) in order to train a machine learning (ML) model to predict the overlay of a wafer, for example, a 300 mm × 300 mm wafer. Figure 2B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. Figure 2C further depicts an exemplary method which may include using matched data, leveling data, or lens data to generate multiple integrated grids for use as input features for training an ML model. Figure 2D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay in order to predict data (e.g., overlay measurements) at arbitrary coordinates of the wafer or integrated grid. [Figure 2B] Figures 2A-2D depict exemplary spatial virtual measurement (VM) methods for predicting wafer overlays according to several embodiments. Figure 2A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) in order to train a machine learning (ML) model to predict the overlay of a wafer, for example, a 300 mm × 300 mm wafer. Figure 2B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. Figure 2C further depicts an exemplary method which may include using matched data, leveling data, or lens data to generate multiple integrated grids for use as input features for training an ML model. Figure 2D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay in order to predict data (e.g., overlay measurements) at arbitrary coordinates of the wafer or integrated grid. [Figure 2C]Figures 2A-2D depict exemplary spatial virtual measurement (VM) methods for predicting wafer overlays according to several embodiments. Figure 2A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) in order to train a machine learning (ML) model to predict the overlay of a wafer, for example, a 300 mm × 300 mm wafer. Figure 2B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. Figure 2C further depicts an exemplary method which may include using matched data, leveling data, or lens data to generate multiple integrated grids for use as input features for training an ML model. Figure 2D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay in order to predict data (e.g., overlay measurements) at arbitrary coordinates of the wafer or integrated grid. [Figure 2D] Figures 2A-2D depict exemplary spatial virtual measurement (VM) methods for predicting wafer overlays according to several embodiments. Figure 2A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) in order to train a machine learning (ML) model to predict the overlay of a wafer, for example, a 300 mm × 300 mm wafer. Figure 2B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. Figure 2C further depicts an exemplary method which may include using matched data, leveling data, or lens data to generate multiple integrated grids for use as input features for training an ML model. Figure 2D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay in order to predict data (e.g., overlay measurements) at arbitrary coordinates of the wafer or integrated grid.

[0013] [Figure 3A]Figures 3A-3D depict exemplary spatial virtual measurement (VM) for predicting wafer overlays according to several embodiments. Figure 3A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. Figure 3B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. Figure 3C further depicts an exemplary method which may include using harmonized data from multiple processing equipment (e.g., equipment A, B, and C) or processes, leveling data from multiple processing equipment or processes, or lens data from multiple processing equipment or processes. The data can be used to generate multiple integrated grids for use as input features for training the ML model. Figure 3D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay to predict data (e.g., overlay measurements) at arbitrary coordinates of the wafer or integrated grid. [Figure 3B]Figures 3A-3D depict exemplary spatial virtual measurement (VM) for predicting wafer overlays according to several embodiments. Figure 3A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. Figure 3B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. Figure 3C further depicts an exemplary method which may include using harmonized data from multiple processing equipment (e.g., equipment A, B, and C) or processes, leveling data from multiple processing equipment or processes, or lens data from multiple processing equipment or processes. The data can be used to generate multiple integrated grids for use as input features for training the ML model. Figure 3D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay to predict data (e.g., overlay measurements) at arbitrary coordinates of the wafer or integrated grid. [Figure 3C]Figures 3A-3D depict exemplary spatial virtual measurement (VM) for predicting wafer overlays according to several embodiments. Figure 3A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. Figure 3B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. Figure 3C further depicts an exemplary method which may include using harmonized data from multiple processing equipment (e.g., equipment A, B, and C) or processes, leveling data from multiple processing equipment or processes, or lens data from multiple processing equipment or processes. The data can be used to generate multiple integrated grids for use as input features for training the ML model. Figure 3D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay to predict data (e.g., overlay measurements) at arbitrary coordinates of the wafer or integrated grid. [Figure 3D]Figures 3A-3D depict exemplary spatial virtual measurement (VM) for predicting wafer overlays according to several embodiments. Figure 3A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. Figure 3B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. Figure 3C further depicts an exemplary method which may include using harmonized data from multiple processing equipment (e.g., equipment A, B, and C) or processes, leveling data from multiple processing equipment or processes, or lens data from multiple processing equipment or processes. The data can be used to generate multiple integrated grids for use as input features for training the ML model. Figure 3D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay to predict data (e.g., overlay measurements) at arbitrary coordinates of the wafer or integrated grid.

[0014] [Figure 4A]Figures 4A–4D depict exemplary spatial virtual measurement (VM) for predicting data (e.g., overlay measurements) at arbitrary coordinates of a wafer or integrated grid, according to several embodiments. Figure 4A depicts an exemplary method which may include using an integrated grid as input to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. Figure 4B further depicts an exemplary method which may include using an estimation function (e.g., bilinear interpolation) to predict data at arbitrary coordinates of the wafer or integrated grid and comparing the predicted overlay with the actual (e.g., measured) overlay. Figure 4C further depicts an exemplary method which may include training and using a baseline convolutional neural network (CNN) with encoders, decoders, and skip connections to preserve the scale of the integrated grid. Figure 4D further depicts an exemplary method which may include some function or expression of the CNN for implementing the encoders, decoders, or skip connections. [Figure 4B]Figures 4A–4D depict exemplary spatial virtual measurement (VM) for predicting data (e.g., overlay measurements) at arbitrary coordinates of a wafer or integrated grid, according to several embodiments. Figure 4A depicts an exemplary method which may include using an integrated grid as input to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. Figure 4B further depicts an exemplary method which may include using an estimation function (e.g., bilinear interpolation) to predict data at arbitrary coordinates of the wafer or integrated grid and comparing the predicted overlay with the actual (e.g., measured) overlay. Figure 4C further depicts an exemplary method which may include training and using a baseline convolutional neural network (CNN) with encoders, decoders, and skip connections to preserve the scale of the integrated grid. Figure 4D further depicts an exemplary method which may include some function or expression of the CNN for implementing the encoders, decoders, or skip connections. [Figure 4C]Figures 4A–4D depict exemplary spatial virtual measurement (VM) for predicting data (e.g., overlay measurements) at arbitrary coordinates of a wafer or integrated grid, according to several embodiments. Figure 4A depicts an exemplary method which may include using an integrated grid as input to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. Figure 4B further depicts an exemplary method which may include using an estimation function (e.g., bilinear interpolation) to predict data at arbitrary coordinates of the wafer or integrated grid and comparing the predicted overlay with the actual (e.g., measured) overlay. Figure 4C further depicts an exemplary method which may include training and using a baseline convolutional neural network (CNN) with encoders, decoders, and skip connections to preserve the scale of the integrated grid. Figure 4D further depicts an exemplary method which may include some function or expression of the CNN for implementing the encoders, decoders, or skip connections. [Figure 4D]Figures 4A–4D depict exemplary spatial virtual measurement (VM) for predicting data (e.g., overlay measurements) at arbitrary coordinates of a wafer or integrated grid, according to several embodiments. Figure 4A depicts an exemplary method which may include using an integrated grid as input to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. Figure 4B further depicts an exemplary method which may include using an estimation function (e.g., bilinear interpolation) to predict data at arbitrary coordinates of the wafer or integrated grid and comparing the predicted overlay with the actual (e.g., measured) overlay. Figure 4C further depicts an exemplary method which may include training and using a baseline convolutional neural network (CNN) with encoders, decoders, and skip connections to preserve the scale of the integrated grid. Figure 4D further depicts an exemplary method which may include some function or expression of the CNN for implementing the encoders, decoders, or skip connections.

[0015] [Figure 5A]Figures 5A–5C depict exemplary spatial virtual measurement (VM) methods for detecting anomalous wafers using predicted overlays, according to several embodiments. Figure 5A depicts an exemplary method that may include detecting anomalous wafers by comparing the actual (e.g., measured) overlay of the wafer with a predicted overlay of the wafer. An anomalous wafer can be determined when the actual overlay is out of specification (or spec-out), for example, when the mean and sigma deviate from the specifications of a normally patterned wafer. Figure 5B further depicts an exemplary method that may include using two predicted overlays, e.g., a predicted overlay from matching data, lens data, and advanced process control (APC) data, or a predicted overlay from leveling data, lens data, and APC data. Figure 5C further depicts an exemplary method that may include using a predicted overlay to determine whether the actual overlay is out of specification. An anomalous wafer can be identified for reworking. [Figure 5B]Figures 5A–5C depict exemplary spatial virtual measurement (VM) methods for detecting anomalous wafers using predicted overlays, according to several embodiments. Figure 5A depicts an exemplary method that may include detecting anomalous wafers by comparing the actual (e.g., measured) overlay of the wafer with a predicted overlay of the wafer. An anomalous wafer can be determined when the actual overlay is out of specification (or spec-out), for example, when the mean and sigma deviate from the specifications of a normally patterned wafer. Figure 5B further depicts an exemplary method that may include using two predicted overlays, e.g., a predicted overlay from matching data, lens data, and advanced process control (APC) data, or a predicted overlay from leveling data, lens data, and APC data. Figure 5C further depicts an exemplary method that may include using a predicted overlay to determine whether the actual overlay is out of specification. An anomalous wafer can be identified for reworking. [Figure 5C]Figures 5A–5C depict exemplary spatial virtual measurement (VM) methods for detecting anomalous wafers using predicted overlays, according to several embodiments. Figure 5A depicts an exemplary method that may include detecting anomalous wafers by comparing the actual (e.g., measured) overlay of the wafer with a predicted overlay of the wafer. An anomalous wafer can be determined when the actual overlay is out of specification (or spec-out), for example, when the mean and sigma deviate from the specifications of a normally patterned wafer. Figure 5B further depicts an exemplary method that may include using two predicted overlays, e.g., a predicted overlay from matching data, lens data, and advanced process control (APC) data, or a predicted overlay from leveling data, lens data, and APC data. Figure 5C further depicts an exemplary method that may include using a predicted overlay to determine whether the actual overlay is out of specification. An anomalous wafer can be identified for reworking.

[0016] [Figure 6] Figures 6A–6C illustrate exemplary spatial virtual measurement (VM) methods for updating machine learning (ML) models using transfer learning, according to several embodiments. Figure 6A illustrates an exemplary mean graph when an actual (e.g., measured) overlay may deviate in a statistically significant manner at a given point in time or over a period of time due to changes in process equipment or processes, for example, caused by preventive maintenance (PM). Figure 6B further illustrates training a machine learning (ML) model using long-term data from process equipment or processes. Figure 6C further illustrates updating a portion of the ML model with short-term data using transfer learning when the actual (e.g., measured) overlay deviates in a statistically significant manner.

[0017] [Figure 7]Figure 7 illustrates some non-limiting embodiments of a computing device configured to carry out the methods described herein.

[0018] [Figure 8] Figure 8 illustrates some non-limiting embodiments of a web / mobile application provisioning system configured to carry out the methods described herein.

[0019] [Figure 9] Figure 9 illustrates some non-limiting embodiments of a cloud-based web / mobile application provisioning system configured to carry out the methods described herein. [Modes for carrying out the invention]

[0020] Description of the Embodiment Detailed explanation Various embodiments of the Disclosure are shown and described herein, but such embodiments are provided only as examples. Numerous modifications, changes, or substitutions may occur without departing from the Disclosure. It should be understood that various alternatives to the embodiments of the Disclosure described herein may be adopted.

[0021] Overview Typical systems and methods for determining or measuring overlays on patterned wafers are inadequate. For example, typical systems and methods may measure the overlay of a patterned wafer only once for every 20 patterned wafers. Insufficient sampling can allow out-of-spec (or spec-out) wafers to proceed to the next process without reworking, thereby reducing yield during manufacturing. Furthermore, such insufficient sampling may require reworking of spec-out wafers, thereby increasing costs during manufacturing. Moreover, each overlay can take approximately one minute to measure. Such time-consuming measurements can make sampling of more patterned wafers impractical.

[0022] Furthermore, typical systems and methods may use conventional convolutional neural networks (CNNs) as predictive functions for patterned wafer overlays. However, such methods cannot efficiently or effectively utilize spatial information from multimodal machine data. For example, such methods may determine overlays only with respect to fixed coordinates, rather than arbitrary coordinates on the patterned wafer. Moreover, such methods cannot handle different types of data resulting from different process equipment or processes. Furthermore, such methods cannot identify or detect anomalous wafers from the predicted overlays. Furthermore, such methods cannot handle data with data shifts or data drifts that may exist when process equipment undergoes maintenance or degrades over time.

[0023] Recognized herein is the need for systems and methods that provide technical solutions to overcome technical challenges during measurement (e.g., predicting or measuring patterned wafer overlays), thereby improving yield and reducing costs in semiconductor manufacturing. In some cases, the systems and methods herein can be used to predict unmeasured patterned wafer overlays. Compared to other methods, the predicted overlays can be used to virtually sample all patterned wafers, thereby improving sampling, yield, and costs during semiconductor manufacturing. Although only illustrative uses of this disclosure, the systems and methods herein can predict unmeasured patterned wafer overlays resulting from the use of lithography equipment and processes in semiconductor manufacturing.

[0024] For example, manufacturing a single wafer may involve multiple process instruments, processes, and measurements over a period of time. A lithography process may include using a mask (e.g., a photomask) to pattern circuits on multiple layers or levels of a wafer. Specifically, the mask may be used to expose a portion of the wafer with light. The exposed portion of the wafer may be left as is or removed by etching. In some embodiments, the measurement of the overlay or predicted overlay includes spatial differences or displacements between layers of the patterned wafer. For example, during the process, staggered differences or displacements of the overlay may occur between previously patterned structures or layers being patterned below the currently patterned structure or layer. The overlay may be measured by measuring instruments after each patterning process has been performed layer by layer. The overlay may be used to adjust lithography instrument parameters for the next wafer or to detect wafers requiring repair or rework. As mentioned, the overlay may only be measured with respect to a subset of the patterned wafer due to cost and time constraints. Compared to other methods, the systems and methods described herein can predict the overlay of all patterned wafers.

[0025] In short, to predict the overlay of a patterned wafer, the systems and methods herein may include using gridding (or integrated grid or equally spaced grid), overlay-specific regression networks, transfer learning methods to address data deviation or data drift, and anomaly wafer detection. In some cases, the integrated grid may include multimodal machine data or inputs, such as matching data, leveling data, lens data, servo data, advanced processing control (APC) data, and fault detection and classification (FDC) data, while preserving the physical space or scale of the wafer's patterned features. Preserving the physical space or scale can enable the use of diverse types of multimodal machine input data to train a machine learning (ML) model. APC data can be modeled from overlays of previous lots of patterned wafers and used as input features to train an ML model to help model instrument bias data. The scale of the integrated grid may be preserved during processing by the trained ML model. The final output of a trained ML model, e.g., a predicted overlay, can be compared to the actual (e.g., measured) overlay of the patterned wafer at any coordinate on the patterned wafer. For example, the predicted overlay can predict measurements at any location on the patterned wafer using an estimation function, e.g., bilinear interpolation. In some cases, an overlay-specific regression network can accurately predict the overlay of the patterned wafer by preserving the scale or size of the features of the patterned wafer by extracting local-global features from the input data. For example, local features, e.g., corners, lumps, or junctions, can be extracted in patches of the patterned wafer image and used to describe the image content around these local features. Global features can be used to determine the overall image features of the patterned wafer.In some cases, transfer learning methods can respond quickly to abrupt or gradual changes in input data characteristics that may result from maintenance or aging of process equipment.

[0026] Figures 1A-1C depict exemplary architectures or pipelines configured to implement a spatial virtual measurement (VM) method for predicting wafer overlays, according to several embodiments. Figure 1A depicts an exemplary high-level architecture or pipeline that may be configured to implement the method herein for determining VM values ​​with high spatial density using multimodal machine data from processing equipment in a manufacturing environment. Compared to other methods with overlays with low spatial density, the pipeline output may include predicted overlays with VM values ​​that have high or higher spatial density. For example, wafers may be patterned by process equipment and processes. Process equipment may have controls for adjusting parameters that affect some or different types of data of the process equipment or processes. The data herein may be referred to as multimodal machine data sets (or machine data sets).

[0027] In some embodiments, the mechanical dataset is a multimodal dataset comprising alignment data, leveling data, lens data, servo data, advanced process control (APC) data, or fault detection and classification (FDC) data. In some cases, the mechanical dataset may be a measured dataset of process equipment or processes used during wafer patterning. For example, alignment data may include data associated with alignment and can be measured by the alignment or misalignment between the wafer and the mask using a laser beam. In some cases, reference alignment data corresponding to the most recent alignment trend may be calculated and subtracted from the alignment data to generate differential alignment data, which may be used as a substitute. Leveling data may include data associated with leveling and can be measured by the height from a reference point (e.g., zero point) using a laser beam. Lens data may include data associated with lenses and can be measured by lens aberrations and coefficients determined by decomposing the aberration values ​​using Zernike polynomials. Servo data may include data associated with servos for aligning a photomask to a wafer in a lithography process. APC data refers to data used to monitor process conditions in real time and to automatically adjust them if necessary to increase quality and productivity during the process. APC data can be obtained by pre-calibrating before exposure in a photolithography process and using past overlay history. Fault detection and classification (FDC) data refers to sensor data in the process, such as temperature and pressure, which can be important for detecting and classifying defects that may occur during the process in order to optimize quality control.

[0028] In some cases, as further illustrated in Figure 1A, the pipeline may use a measurement method or VM method to measure or determine the actual (e.g., measured) overlay of the patterned wafer. For example, the actual overlay can be used as an input feature for training a machine learning (ML) model herein to predict the overlay of the patterned wafer. In some embodiments, the measurement of the overlay or predicted overlay comprises a critical dimension (CD) or film thickness. For example, the predicted overlay may be a VM value at any location on the patterned wafer. In some cases, the measurement may include thickness, warp, thickness variation, flatness, line width, hole diameter, or thin film thickness.

[0029] Figure 1B depicts an exemplary low-level architecture or pipeline that may be configured to implement the method herein for training an ML model to predict the overlay of a patterned wafer. For example, a wafer may be patterned by process equipment or a process. Multimodal machine data (as input data) and overlay (as output data) may be received, determined, or measured after the wafer has been patterned. The multimodal machine data and overlay may be provided to a data lake for use when training an ML model with long-term data. The input data may be correlated with the output data to train an ML model to predict the overlay of a patterned wafer. The trained ML model and results may be stored in object storage for later use. The trained ML model may be loaded from object storage to perform real-time inference using real-time multimodal machine data. The real-time data may be loaded onto a distributed streaming platform, e.g., Apache, to develop a real-time trained ML model. (登録商標)The data can be passed to Kafka and processed by it. Real-time trained ML models can perform inference modeling. Inference modeling can be used to model data or to test real-time multimodal machine data. Inference modeling can be used to generate an overview of any rework resulting from predicted overlays and spec-out wafers. Predicted overlays and results can be provided or displayed to the user via a user service application. The user service application can be configured as a graphical user interface (GUI) with interactive graphic features. The GUI can be configured to allow the user to manipulate or otherwise interact with the predicted overlays or results, thereby allowing the user to adjust process equipment or process parameters to improve wafer yield.

[0030] Figure 1C depicts an exemplary manufacturing environment that may be associated with a semiconductor manufacturing environment having a semiconductor manufacturing process. The semiconductor manufacturing environment may be associated with semiconductor manufacturing equipment (e.g., process equipment) configured to perform the semiconductor manufacturing process. The systems and methods herein can predict the process equipment and the patterned wafer overlay resulting from the process. In some embodiments, the machine's process comprises a lithography process, an etching process, or a thin film process. The process may include wafer processing processes, e.g., ingot pulling, ingot slicing, wafer grinding, or oxidation. The process may include masking processes, e.g., circuit design, pattern design, or photomasking. The process may include front-end processes, e.g., pattern lithography, etching, chemical vapor deposition (e.g., ion implantation, oxidation, diffusion), photoresist coating, or planarization. The process may include intermediate inspections, e.g., wafer inspection. The process may include back-end processes, e.g., wafer dicing, chip mounting, wire bonding, molding, trimming, or formation. The process may include intermediate testing, e.g., burn-in temperature or voltage testing. The process may include final inspection or reliability testing. The process may include marking.

[0031] In some cases, machine learning (ML) models may be referred to as neural network models or network models.

[0032] (A method for predicting the overlay of a wafer patterned by a processing device) In some aspects, what is disclosed herein is a method for predicting wafer overlays. In some embodiments, the method includes (a) receiving a machine dataset comprising parameters at multiple locations on a wafer. In some embodiments, the wafer is patterned by a machine to yield a patterned wafer. In some embodiments, the method includes (b) generating an integrated dataset by (i) aggregating the parameters and (ii) mapping the aggregated parameters to an equally spaced grid. In some embodiments, the method includes (c) generating a predicted overlay on the patterned wafer based at least partially on processing the integrated dataset using a trained machine learning (ML) model. In some embodiments, the method includes (d) inferring a statistical deviation of the predicted overlay from a successfully patterned wafer. In some cases, the method includes training an ML model using a machine dataset comprising parameters from a single machine used to pattern the wafer. In some cases, the method includes training an ML model using one or more overlays comprising measurements from a single machine used to pattern the wafer.

[0033] A typical system and method has the advantage of being able to integrate input data (e.g., machine data or overlays) sequentially and inefficiently, instead of processing multiple input data in parallel using gridding as described herein. Processing multiple input data allows for the preservation and utilization of spatial information for each input data. By using an appropriate estimation function, the empty grids in the gridding can be filled with estimates using interpolation.

[0034] For example, Figures 2A-2D depict exemplary spatial virtual measurement (VM) methods for predicting overlays on patterned wafers according to several embodiments. Figure 2A depicts an exemplary method which may include using multimodal machine data and generating an integrated grid (or equally spaced grid) to train an ML model to predict overlays on a patterned wafer, e.g., a 300 mm × 300 mm wafer. In some embodiments, the machine data set is a multimodal data set comprising harmonized data, leveling data, lens data, servo data, advanced process control (APC) data, or fault detection and classification (FDC) data. As described herein, leveling data may include data associated with leveling and may be measured by height from a reference point (e.g., zero point) using a laser beam. Lens data may include data associated with lenses and may be measured by lens aberrations and coefficients determined by decomposing aberration values ​​using Zernike polynomials. Servo data may include data associated with the servo used to align the photomask to the wafer in the photolithography process. Data from the APC may include data associated with temperature measurements, pressure measurements, flow rate, raw material composition, product quality attributes (e.g., viscosity or density), energy consumption, reaction rate, mixing time, and other relevant process variables that can be monitored in real time during semiconductor manufacturing.

[0035] Figure 2B further depicts an exemplary method which may include overlaying the wafer with an integrated grid. In some embodiments, the multiple locations of the machine data set comprise locations across the patterned wafer that are random, uniformly distributed, or non-uniformly distributed. For example, compared to other methods, the output overlay can be predicted at any location on the patterned wafer instead of predefined or fixed locations on the patterned wafer. Also, the machine data may not be measured at equal intervals across the wafer, but rather at irregular coordinates. The methods herein can convert all measurements into an integrated grid with equal intervals.

[0036] Figure 2C further depicts an exemplary method which may include using harmonized data, leveling data, or lens data to generate multiple integrated grids for use as input features for training an ML model. For example, considering physical space, the method herein can first generate a fixed grid. The fixed grid can be filled using an interpolation method, thereby resulting in an integrated grid with a flexible coordinate system. Multiple integrated grids can thus be generated, with an integrated grid for each harmonized data, leveling data, or lens data. The method herein can aggregate multiple integrated grids for use as input features for training a machine (ML) model. Aggregating multiple integrated grids may be useful for easily removing or adding features before training the ML model. Aggregating multiple integrated grids may also be useful for training the machine (ML) model as a universal model. For example, using a universal model can reduce model computing resources and increase model computing performance by training universally on different types of process equipment or processes. Furthermore, using universal models can mitigate the technical challenges associated with training ML models with insufficient or sparse data, because the integrated dataset can contain more data for training in an efficient manner.

[0037] Figure 2D further depicts an exemplary method which may include outputting a predicted overlay as a flexible overlay in order to predict data (e.g., overlay measurements) at any coordinate of a patterned wafer or integrated grid. In some embodiments, multiple other locations of the predicted overlay comprise locations across the patterned wafer that are random, uniformly distributed, or non-uniformly distributed. Compared with other methods, for example, in which some overlays or their coordinates may be fixed, the method herein can generate a flexible predicted overlay in order to predict measurements at any coordinate of a patterned wafer.

[0038] In some embodiments, the trained ML model is trained using at least one of the following: (i) an equally spaced grid, (ii) an integrated dataset, or (iii) a measured overlay of a patterned wafer. In some embodiments, the method further includes repeating (a)–(d) until all layers of the wafer have been patterned by machine.

[0039] In some embodiments, the method further includes training an ML model using one or more machine datasets comprising parameters from two or more machines used to pattern wafers. In some embodiments, the method further includes training an ML model using one or more overlays comprising measurements from two or more machines used to pattern wafers. For example, different types of process equipment or different data from different processes can be aggregated as a unified dataset for training an ML model.

[0040] Typical systems and methods may simply use a single model to predict overlays from a single process device or process. The systems and methods herein can be universally trained and tested with data from diverse process devices and processes using the integrated grid herein. A benefit of doing so is that the ML model can be trained to handle multiple types of process devices or processes. In some cases, a method for predicting overlays for diverse process devices and processes may be identical or similar to a method for predicting overlays for a single process device or process, as illustrated in Figures 2A-2D.

[0041] For example, Figures 3A-3D depict exemplary spatial virtual measurement (VM) methods for predicting wafer overlays according to several embodiments. Figure 3A depicts an exemplary method which may include using multimodal machine data to generate an integrated grid (or equally spaced grid) in order to train an ML model to predict the overlay of a wafer, for example, a 300 mm × 300 mm wafer. In some embodiments, the machine data set is a multimodal data set comprising harmonized data, leveling data, lens data, servo data, advanced process control (APC) data, or fault detection and classification (FDC) data. For example, harmonized data from multiple process machines (e.g., machines A, B, and C) may be used. Figure 3B further depicts an exemplary method which may include overlaying the wafer with the integrated grid. In some embodiments, the multiple locations of the machine data set comprise locations that are random, uniformly distributed, or non-uniformly distributed, traversing a patterned wafer. For example, compared to other methods, the output overlay can be predicted at any location on the wafer instead of a predefined or fixed position. Also, the mechanical data may not be measured at equal intervals across the wafer, but rather at irregular coordinates. The method herein can convert all measurements into an integrated grid with equal intervals. Figure 3C further depicts an exemplary method which may include using harmonized data from multiple processing equipment (e.g., equipment A, B, and C) or processes, leveling data from multiple processing equipment or processes, or lens data from multiple processing equipment or processes. The data can be used to generate multiple integrated grids for use as input features for training an ML model. Figure 3D further depicts an exemplary method which may include outputting the predicted overlay as a flexible overlay in order to predict data (e.g., overlay measurements) at any coordinate on the wafer or integrated grid.

[0042] In some embodiments, the trained ML model is trained using at least one of the following: (i) an equally spaced grid, (ii) an integrated dataset, or (iii) a measured overlay of a patterned wafer. In some embodiments, the method further includes repeating (a)–(d) until all layers of the patterned wafer have been patterned by machine.

[0043] (A method for developing a deep neural network to generate predicted overlays) In some embodiments, the trained ML model is a deep neural network. In some embodiments, the deep neural network comprises an encoder layer configured to (i) acquire global context features and (ii) in-input feature correlations of a patterned wafer. In some embodiments, the deep neural network comprises a decoder layer configured to determine global context features of a patterned wafer. In some embodiments, the deep neural network comprises a skip connection layer configured to use at least local context features and in-input feature correlations to generate a predicted overlay.

[0044] For example, Figures 4A–4D depict exemplary spatial virtual measurement (VM) methods for predicting data (e.g., overlay measurements) at arbitrary coordinates of a wafer or integrated grid, according to several embodiments. Figure 4A depicts an exemplary method which may include using an integrated grid as input to train a machine learning (ML) model to predict the overlay of a wafer, e.g., a 300 mm × 300 mm wafer. For example, the method herein may use an integrated grid, train an ML model to predict an intermediate overlay with respect to a patterned wafer, use an estimation function to determine measurements at other coordinates of the integrated grid, generate a final predicted overlay, and compare the predicted overlay to ground truth, e.g., a successfully patterned wafer.

[0045] Figure 4B further depicts an exemplary method which may include using an estimation function (e.g., bilinear interpolation) to predict data (e.g., measurements) at arbitrary coordinates on a patterned wafer or integrated grid and comparing the predicted overlay with the actual (e.g., measured) overlay. As mentioned, the integrated grid can be used to train a machine learning (ML) model to output a predicted overlay on a patterned wafer. In some embodiments, the method further includes applying the estimation function to the predicted overlay to predict measurements at multiple other locations that differ from multiple locations on the predicted overlay. For example, the method herein can use bilinear interpolation to determine or predict measurements at arbitrary coordinates on a patterned wafer. In some cases, the coordinates may be identical to the coordinates on an integrated grid. In other cases, the coordinates may differ from the coordinates on an integrated grid. Using an estimation function, measurements at coordinates within an integrated grid can be determined or predicted. In some cases, the coordinates may overlap with the coordinates (e.g., a subset thereof) of an integrated grid.

[0046] Figure 4C further depicts an exemplary method which may include training and using a baseline convolutional neural network (CNN) with encoders, decoders, and skip connections to preserve the scale of the integrated grid. In some embodiments, the trained ML model is configured to preserve the spatial scale of any features in the predicted overlay. For example, the initial scheme may be a baseline from a typical U-Net. The U-Net can be modified to preserve the scale of the integrated grid and to use an encoder / decoder structure. In some cases, the encoder may be configured to use nine layers and downsample to 1 / 16. In some cases, the encoder may be configured to acquire global context features and in-input feature correlations. In some cases, the encoder may be configured as an expanded space pyramid pooling (ASPP) module. The ASPP module can incorporate various augmented kernels to acquire diverse global context scales, such as input feature patterns of various scales.

[0047] In some cases, the decoder stage may be configured to decode a global context from encoded features. In some cases, a local context may be loaded from a skip connection layer to predict the overlay of the patterned wafer. In some cases, the method herein may use an attention module. For example, the attention module may be configured to focus on important or most important features or areas in the encoded features related to the predicted overlay. In some cases, the method herein may employ weighted initialization using a weighted decay of 0.0005 and a momentum of 0.9. In some cases, the method herein may train an ML model by initializing training with a small batch size of 16 and a learning rate of 0.0005 over 100 epochs.

[0048] In some cases, the network may be transformed in several ways. Some embodiments of network transformation may include changing the downsampling rate, adjusting the number of encoder and decoder layers, varying the number of channels within each layer, and equivalents. In some cases, different modified networks may extract complementary features from distinctly different contexts. In some cases, transformed networks of diverse architectures may be combined in parallel. In some cases, transformed networks of diverse architectures may be combined in series. In some cases, transformed networks of diverse architectures may be combined in parallel and series. In some cases, combining transformed networks may offer specific advantages and usefulness compared to performing a task using a single network.

[0049] Figure 4D further illustrates an exemplary method which may include a function or expression of a CNN for implementing an encoder, decoder, or skip connection. For example, X can be defined as an input and Y as an output. A convolutional block F may include a convolutional layer, an activation function, and a normalization layer. An encoder E may include four encoder blocks, consisting of a downsampling layer and two convolutional blocks F. In some cases, the configurations of encoder E, decoder D, and convolutional block F can be transformed to construct diverse networks. For example, the convolutional blocks F may be combined in various orders. In another embodiment, a convolutional block F may include convolutional layers of different sizes, as well as normalization layers such as batch normalization (BN) and layer normalization (LN), along with activation functions such as ReLU (rectified linear unit) and sigmoid. A decoder D may include four decoder blocks, consisting of an upsampling layer and two convolutional blocks F. During training, backpropagation with a loss function may be performed for the training model. The loss function is the pointwise loss (L point ) and wafer-wise loss (L wafer ) may include the following. The first loss may include the mean squared error (MSE) loss for point-wise overlays. To capture high-frequency overlay values, the MSE loss may be employed instead of the mean absolute error (MAE) loss. The second loss may include the MSE loss for the wafer-wise mean and sigma of the overlays. The loss may be introduced to guide the model to globally track the distribution across the wafer. The second loss may be weighted less than the first loss along the path through λ because the point-wise loss may be more important than the wafer-wise loss. Gradient descent may be performed to train the model parameters θ using the loss function. The model parameters may be updated until convergence to predict better overlays.

[0050] (How to use transfer learning to generate predicted overlays) In some embodiments, the method further includes using a predicted overlay to predict drift or deviation in a machine or machine process. In some embodiments, the method further includes using transfer learning to update a portion of the trained ML model before patterning subsequent wafers. In some embodiments, the transfer learning is based on analyzing, at least, recent trends between a machine dataset and a measured overlay.

[0051] Compared to typical systems and methods, the systems and methods described herein can operate while taking data shift and data drift into account. Data shift may result from changes in process equipment caused by preventive maintenance (PM), for example. Data drift may result from the aging of process equipment. Data shift and data drift can cause abrupt or gradual changes in the properties between machine data and the overlay. The methods described herein can use transfer learning to track changing trends in the data. For example, a trained ML model can be trained with data without data shift or data drift. If data shift or data drift is present, a portion of the trained ML model can be retrained with the shifted or drifted data. In this way, the updated ML model can predict or track properties that have changed in a short period of time.

[0052] For example, Figures 6A–6C depict exemplary spatial virtual measurement (VM) methods for updating machine learning (ML) models using transfer learning, according to several embodiments. Figure 6A illustrates an exemplary mean graph when actual (e.g., measured) overlays may deviate in a statistically significant manner at a given point in time or over a given period due to changes in process equipment or processes caused, for example, by preventive maintenance (PM). For example, maintenance of process equipment may cause a statistically significant shift in the distribution of predicted or actual overlays. The methods herein can use transfer learning to rapidly predict or track the changed distribution in order to update a portion of a trained ML model. In some cases, the input data may not change after preventive maintenance. Therefore, the input / output data pairs may need to be retrained with some data points (e.g., short-term data) to reduce training time compared to training the ML model with all data, e.g., short-term and long-term data.

[0053] Figure 6B further illustrates training an ML model using long-term data from process equipment or a process. For example, a trained ML model can be successfully trained using long-term data. However, this can result in inaccurate predictions, e.g., an inaccurate predicted overlay. Figure 6C further illustrates using transfer learning to update a portion of the ML model with short-term data when the actual overlay deviates in a statistically significant way. For example, a portion of a trained ML model can be updated using transfer learning with short-term data. Since only a portion of the trained ML model is updated using a few data points (e.g., layers in the backend of the trained ML model), the training time can be very short, e.g., a few minutes. Transfer learning can retain only the necessary amount of long-term data, learn the bias of the changed data, and predict a more accurate predicted overlay that takes the changed distribution into account. How to use predicted overlays

[0054] (Advanced Process Control (APC)) In some embodiments, the predicted overlay is operable to implement advanced process control (APC). In some embodiments, the method includes using the predicted overlay to determine the APC parameters. In some embodiments, the method includes adjusting the machine parameters in real time based on using at least the determined parameters. In some embodiments, the adjusted parameters improve the yield of subsequent wafers patterned by the machine by at least 1%. In some embodiments, the method further includes using the predicted overlay to adjust the machine parameters before the subsequent wafers are patterned by the machine.

[0055] For example, the systems and methods herein can use predicted overlays to replace or enhance virtual measurements (VMs) or actual measurements. As mentioned, actual (e.g., measured) overlays may be rarely sampled due to cost and time constraints. The systems and methods herein can predict overlays, for example, on a wafer-by-wafer basis, by continuously monitoring overlays to contribute to or improve APC. For example, APC can help ensure that wafer exposure is performed accurately by adjusting process equipment parameters. In some cases, APC can be determined from previous predicted overlays to adjust APC in faster cycles or in real time. Exemplary improvements may include improving wafer quality and wafer yield at a minimum.

[0056] (Abnormal wafer detection) In some embodiments, the method further includes using a predicted overlay to predict anomalies in the patterned wafer. In some embodiments, the method further includes repatterning the patterned wafer when it is determined that the statistical deviation is outside a specified threshold. In some embodiments, the method further includes adjusting the density of the equally spaced grid based on at least a user-defined criterion or statistical deviation.

[0057] The systems and methods described herein can detect anomalous wafers using a predicted overlay. An anomalous wafer can be defined as one that deviates from the mean and sigma of a normally patterned wafer. In some cases, the methods described herein can predict a pointwise overlay and determine whether the mean and sigma of the overlay are out of specification (or spec-out). Spec-out wafers can be sent for rework. For example, the loss related to detection can be added to the pointwise overlay mean squared error (MSE) loss for determining the distribution within the overlay. Thus, the methods described herein can indicate all coordinate points of the overlay and the area associated with the anomalous wafer.

[0058] For example, Figures 5A-5C depict exemplary spatial virtual measurement (VM) methods for detecting anomaly wafers using a predicted overlay, according to several embodiments. In some embodiments, the method further includes using the predicted overlay to adjust (i) one or more machine parameters or (ii) one or more machine process parameters before patterning subsequent wafers. For example, the systems and methods herein can use the predicted overlay to identify patterned wafers that are out of specification (or spec-out) and send the wafers for reworking. Compared to other methods when the actual overlay is not measured, patterned wafers that need to be reworked proceed to the next process without a reworking process. In contrast, the systems and methods herein can identify or detect patterned wafers that need to be reworked even when the actual overlay is not measured. Exemplary improvements may include reducing costs and process time by preventing any process problems in advance.

[0059] Figure 5A depicts an exemplary method that may include detecting an anomaly wafer by comparing the actual overlay of a wafer with a predicted overlay of the wafer using statistical deviations. In some embodiments, the statistical deviations may comprise a mean deviation or a sigma deviation. For example, an anomaly wafer may be determined when the actual overlay is spec-out, for example, when the mean and sigma deviate from the specifications. For example, the method herein may be used to predict or detect an anomaly patterned wafer. During wafer processing, a patterned wafer may be determined to be spec-out and require reprocessing. A spec-out patterned wafer may be compared to a normally patterned wafer to determine whether the patterned wafer has mean and sigma that deviate from a predefined specification. In some cases, the method herein can determine or predict whether a patterned wafer is anomaly when the overlay is measured after the wafer has been processed.

[0060] Figure 5B further depicts an exemplary method which may include using two predicted overlays, e.g., predicted overlays from matching data, lens data, and advanced process control (APC) data, or predicted overlays from leveling data, lens data, and APC data. For example, in some cases, matching and leveling feature properties may be used individually to detect anomaly wafers. In this case, two machine learning (ML) models may be used, respectively, to predict the overlays of the patterned wafer. The two predicted overlays can be analyzed to determine whether the actual overlays will be spec-out. If either of the actual overlays is determined to be spec-out, the patterned wafer is anomaly and may be sent for rework. In some cases, the method herein may use relevant area or overlay values ​​to determine whether the patterned wafer may require rework. In some cases, the method herein may provide an explainable anomaly detection result.

[0061] Figure 5C further depicts an exemplary method which may include using the predicted overlay to determine whether the actual overlay is spec-out. In such a case, an unusually patterned wafer can be identified with respect to reworking.

[0062] In some embodiments, the predicted overlay can be operated to perform virtual measurement (VM), root cause analysis (RCA), or image measurement (IM). For example, VM may refer to a method for predicting wafer properties based on mechanical parameters and sensor data in process equipment without performing expensive physical measurements of wafer properties. Statistical methods such as classification and regression can be used to perform VM. Depending on the accuracy of the virtual data, it can be used in modeling for other purposes such as yield prediction, preventive analysis, and equivalence. Virtual data may be useful for modeling techniques that are negatively affected by missing data. Root cause analysis may refer to a method for identifying the root cause of a defect or failure in a production process. Root cause analysis methods can go beyond simply addressing a malfunction and can find the underlying reasons behind the problem and implement lasting solutions to prevent recurrence. Image measurement may refer to a method for optimizing conventional measurement by generating more measurement information on the same image of the wafer. The ability to sample the entire product space after each process step enables highly precise process control or monitoring optimization, resulting in reduced variability, optimized yield, and lower revenue loss due to defective products (e.g., non-functional products), equipment downtime, and measurement costs.

[0063] (Common methods for training machine learning models) Many machine learning (ML) methods implemented as algorithms are suitable approaches for carrying out the methods described herein. Such methods include, but are not limited to, supervised learning approaches, unsupervised learning approaches, semi-supervised approaches, or any combination thereof.

[0064] Machine learning algorithms may include, but are not limited to, neural networks (e.g., artificial neural networks (ANNs), multilayer perceptrons (MLPs), long short-term memory (LSTMs)), support vector machines, k nearest neighbors, Gaussian mixture models, Gaussian processes, naive Bayes, decision trees, random forests, or gradient boosting trees. Linear machine learning algorithms may include, but are not limited to, linear regression with or without a regularization term, logistic regression, naive Bayes classifiers, perceptrons, or support vector machines (SVMs). Other machine learning algorithms for use with the methods described herein may include, but are not limited to, quadratic classifiers, k nearest neighbors, boosting, decision trees, random forests, neural networks, pattern recognition, Bayesian networks, or hidden Markov models. Other machine learning algorithms, including modifications or combinations of any of these commonly used for machine learning, may also be suitable for use with the methods described herein. Any use of machine learning algorithms in a workflow may also be suitable for use with the methods described herein. The workflow may include, for example, cross-validation, nested cross-validation, feature selection, row compression, data transformation, binning, normalization, standardization, and algorithm selection.

[0065] Machine learning algorithms can generally be trained by the following methodologies to build machine learning models. In some cases, the generated model may determine or predict the overlay of a patterned wafer. Input data may include, for example, the integrated dataset described herein. Output data may include, for example, the predicted overlay of a patterned wafer described herein.

[0066] 1. Gather datasets for "training" and "testing" the machine learning algorithm. The datasets can include many features, such as aligned data, leveling data, lens data, servo data, or features associated with advanced process control (APC) data. The training dataset is used to "train" the machine learning algorithm. The test dataset is used to "test" the machine learning algorithm.

[0067] 2. Determine the “features” for the machine learning algorithm to be used for training and testing. The accuracy of the machine learning algorithm may depend on how the features are represented. For example, feature values ​​may be transformed using one-hot encoding, binning, standardization, or normalization. Also, not all features in the dataset may be used to train and test the machine learning algorithm. Feature selection may depend, for example, on the available computing resources and time or the importance of features discovered during iterative testing and training. For example, features associated with harmonized and leveling data may be found to be useful for predicting patterned wafer overlays.

[0068] 3. Select an appropriate machine learning algorithm. For example, the machine learning algorithms described herein may be selected. The machine learning algorithm selected may depend, for example, on the available computing resources and time, or whether the predictions are continuous or categorical in nature. The machine learning algorithm is used to build a machine learning model.

[0069] 4. Construct a machine learning model. The machine learning algorithm is executed on the collected training dataset. The parameters of the machine learning algorithm may be tuned by optimizing its performance on the training dataset or through a cross-validation dataset. After parameter tuning and training, the performance of the machine learning algorithm may be validated on a dataset of naive samples separate from the training and test datasets. The constructed machine learning model may have feature coefficients, importance measures, or weights assigned to individual features.

[0070] Once a machine learning model is determined ("trained") as described above, it can be used to predict the overlay of a patterned wafer.

[0071] (Examples) Various embodiments of this disclosure are shown and described herein, but such embodiments are provided for illustrative purposes only. Numerous modifications, changes, or substitutions may occur without departing from this disclosure. It should be understood that various alternatives to the embodiments described herein may be adopted.

[0072] (Example 1 - Performance of the method described herein) The systems and methods described herein were validated by applying the methods to different process equipment and processes. For example, the pipeline in Figure 1B was used to obtain a machine data set from process equipment or a process, predict the overlay on a patterned wafer, and provide the predicted overlay to the user. Table 1 shows R-squared (R) as a measure of performance. 2 This describes the validation of the predicted overlay using ). 2 The values ​​demonstrate that the predicted overlay accurately predicts the actual (e.g., measured) overlay of the patterned wafer. [Table 1-1] [Table 1-2]

[0073] (Computing system) In another aspect, disclosed herein is a system for predicting a wafer overlay, comprising at least one processor and instructions executable by at least one processor to cause the at least one processor to perform an operation including (a) receiving a machine dataset comprising parameters at multiple locations on a wafer, the wafer being patterned by machine to yield a patterned wafer, (b) generating an integrated dataset by (i) aggregating the parameters, and (ii) mapping the aggregated parameters to an equally spaced grid, and (c) generating a predicted overlay on the patterned wafer based on processing the integrated dataset at least partially using a trained machine learning (ML) model, and (d) inferring a statistical deviation of the predicted overlay from a successfully patterned wafer.

[0074] Referring to Figure 7, a block diagram is shown depicting an exemplary machine, which includes a computer system 700 (e.g., a processing or computing system) in which a set of instructions can be executed to cause a device to perform or execute one or more of the aspects and / or methodologies for static code scheduling of the present disclosure. The components in Figure 7 are merely examples and do not limit the scope of use or functionality of any hardware, software, embedded logic components, or combinations of two or more such components that implement a particular embodiment.

[0075] The computer system 700 may include one or more processors 701, memory 703, and storage devices 708, which communicate with each other and with other components via a bus 740. The bus 740 may also connect a display 732, one or more input devices 733 (which may include, for example, a keypad, keyboard, mouse, stylus, etc.), one or more output devices 734, one or more storage devices 735, and various tangible storage media 736. All of these elements may interface with the bus 740 directly or via one or more interfaces or adapters. For example, the various tangible storage media 736 may interface with the bus 740 via a storage media interface 726. The computer system 700 may have any preferred physical form, including, but is not limited to, one or more integrated circuits (ICs), printed circuit boards (PCBs), mobile handheld devices (such as mobile phones or PDAs), laptop or notebook computers, distributed computer systems, computing grids, or servers.

[0076] The computer system 700 includes one or more processors 701 (e.g., a central processing unit (CPU) or a general-purpose graphics processing unit (GPGPU)) that perform functions. The processors 701 optionally include cache memory units 702 for temporary local storage of instructions, data, or computer addresses. The processors 701 are configured to assist in the execution of computer-readable instructions. The computer system 700 may provide functionality for the components depicted in Figure 7 as a result of the processors 701 executing non-transient processor-executable instructions embodied in one or more tangible computer-readable storage media such as memory 703, storage device 708, storage device 735, and / or storage medium 736. The computer-readable media may store software implementing a particular embodiment, and the processors 701 may execute the software. Memory 703 may read software from one or more other computer-readable media (e.g., mass storage devices 735, 736) or from one or more other sources through a preferred interface such as a network interface 720. The software may cause the processor 701 to execute one or more processes, or one or more steps of one or more processes, as described or illustrated herein. Executing such processes or steps may include defining data structures to be stored in memory 703 and modifying the data structures as directed by the software.

[0077] Memory 703 may include, but is not limited to, various components (e.g., machine-readable media), including random access memory components (e.g., RAM 704) (e.g., static RAM (SRAM), dynamic RAM (DRAM), ferroelectric random access memory (FRAM®), phase-change random access memory (PRAM), etc.), read-only memory components (e.g., ROM 705), and any combination thereof. ROM 705 may act to communicate data and instructions to the processor 701 in one direction, and RAM 704 may act to communicate data and instructions to the processor 701 bidirectionally. ROM 705 and RAM 704 may include any suitable tangible computer-readable media described below. In one embodiment, a basic input / output system 706 (BIOS), which includes basic routines useful for transferring information between elements within the computer system 700 during startup, etc., may be stored in memory 703.

[0078] The fixed storage device 708 is optionally connected bidirectionally to the processor 701 through the storage device control unit 707. The fixed storage device 708 provides additional data storage capacity and may also include any suitable tangible computer-readable media described herein. The storage device 708 may be used to store the operating system 709, executable files 710, data 711, applications 712 (application programs), and equivalents. The storage device 708 may also include an optical disk drive, a solid-state memory device (e.g., a flash-based system), or any combination of the above. The information in the storage device 708 may, where appropriate, be incorporated as virtual memory in memory 703.

[0079] In one embodiment, the storage device 735 may be detachably interfaced with the computer system 700 via a storage device interface 725 (for example, via an external port connector (not shown)). In particular, the storage device 735 and its associated machine-readable medium may provide non-volatile and / or volatile storage of machine-readable instructions, data structures, program modules, and / or other data for the computer system 700. In one embodiment, the software may reside, fully or partially, in the machine-readable medium on the storage device 735. In another embodiment, the software may reside, fully or partially, in the processor 701.

[0080] Bus 740 connects a wide variety of subsystems. In this specification, a bus reference may, where appropriate, encompass one or more digital signal lines that serve a general function. Bus 740 may be any of several types of bus structures, including, but not limited to, memory buses, memory controllers, peripheral buses, local buses, and any combination thereof, using any of various bus architectures. Such architectures, but not limited to, examples, include Industry Standard Architecture (ISA) buses, Extended ISA (EISA) buses, Microchannel Architecture (MCA) buses, Video Electronics Standards Association Local Bus (VLB), Peripheral Component Interconnect (PCI) buses, PCI Express (PCI-X) buses, Accelerated Graphics Port (AGP) buses, Hypertransport (HTX) buses, Serial Advanced Technology Attachment (SATA) buses, and any combination thereof.

[0081] The computer system 700 may also include an input device 733. In one embodiment, a user of the computer system 700 may input commands and / or other information into the computer system 700 via the input device 733. Embodiments of the input device 733 include, but are not limited to, alphanumeric input devices (e.g., keyboards), pointing devices (e.g., mice or touchpads), touchpads, touchscreens, multitouchscreens, joysticks, styluses, gamepads, audio input devices (e.g., microphones, voice response systems, etc.), optical scanners, video or still image capture devices (e.g., cameras), and any combination thereof. In some embodiments, the input device is a Kinect. (登録商標) Leap Motion (登録商標) or equivalent. Input device 733 may interface to bus 740 via one of a variety of input interfaces 723 (e.g., input interface 723), including, but not limited to, serial, parallel, game port, USB, FIREWIRE®, THUNDERBOLT®, or any combination thereof.

[0082] In certain embodiments, when computer system 700 is connected to network 730, computer system 700 may communicate with other devices, specifically mobile devices and enterprise systems, distributed computing systems, cloud storage systems, cloud computing systems, and equivalents, that are connected to network 730. Communication to and from computer system 700 may be transmitted through network interface 720. For example, network interface 720 may receive incoming communications (such as requests or responses from other devices) from network 730 in the form of one or more packets (such as Internet Protocol (IP) packets), and computer system 700 may store the incoming communications in memory 703 for processing. Similarly, computer system 700 may store outgoing communications (such as requests or responses to other devices) in memory 703, which are in the form of one or more packets and communicated from network interface 720 to network 730. Processor 701 may access these communication packets stored in memory 703 for processing.

[0083] Examples of network interface 720 include, but are not limited to, network interface cards, modems, and any combination thereof. Examples of network 730 or network segment 730 include, but are not limited to, distributed computing systems, cloud computing systems, wide area networks (WANs) (e.g., the Internet, corporate networks), local area networks (LANs) (e.g., networks associated with offices, buildings, campuses, or other relatively small geographical spaces), telephone networks, direct connections between two computing devices, peer-to-peer networks, and any combination thereof. Networks such as network 730 may employ wired and / or wireless communication modes. In general, any network topology may be used.

[0084] Information and data can be displayed through display 732. Examples of display 732 include, but are not limited to, cathode ray tube (CRT), liquid crystal display (LCD), thin film transistor liquid crystal display (TFT-LCD), organic liquid crystal display (OLED) such as passive matrix OLED (PMOLED) or active matrix OLED (AMOLED) display, plasma display, and any combination thereof. Display 732 can interface with processor 701, memory 703, fixed storage device 708, and other devices such as input device 733 via bus 740. Display 732 is coupled to bus 740 via video interface 722, and the transport of data between display 732 and bus 740 can be controlled via graphic control 721. In some embodiments, the display is a video projector. In some embodiments, the display is a head-mounted display (HMD) such as a VR headset. In further embodiments, suitable VR headsets include, as non-limiting examples, HTC Vive (登録商標) , Oculus Rift (登録商標) , Samsung Gear VR (登録商標) , Microsoft HoloLens (登録商標) , Razer OSVR (登録商標) , FOVE VR (登録商標) , Zeiss VR One (登録商標) , Avegant Glyph (登録商標) , Freefly VR (登録商標) headsets, and equivalents. In still further embodiments, the display is a combination of devices such as those disclosed herein.

[0085] In addition to the display 732, the computer system 700 may include one or more other peripheral output devices 734, including, but not limited to, audio speakers, printers, storage devices, and any combination thereof. Such peripheral output devices may be connected to the bus 740 via an output interface 724. Embodiments of the output interface 724 include, but not limited to, serial ports, parallel connections, USB ports, FIREWIRE® ports, THUNDERBOLT® ports, and any combination thereof.

[0086] In addition, or as an alternative, the computer system 700 may provide functionality as a result of logic wired in a circuit or otherwise embodied, which, instead of or in conjunction with software, can perform one or more processes, or one or more steps of one or more processes, as described or illustrated herein. References to software in this disclosure may encompass logic, and references to logic may encompass software. References to computer-readable media may, where appropriate, encompass circuits (such as ICs) that store software for execution, circuits that embody logic for execution, or both. This disclosure encompasses hardware, software, or any preferred combination of both.

[0087] Various illustrative logic blocks, modules, circuits, and algorithmic steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this hardware and software compatibility, various illustrative components, blocks, modules, circuits, and steps are described above in general terms of their functionality.

[0088] Various illustrative logic blocks, modules, and circuits described in connection with embodiments disclosed herein may be implemented or carried out using general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, e.g., a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP core, or any other combination of such configurations.

[0089] Steps of methods or algorithms described in relation to embodiments disclosed herein may be embodied directly in hardware, in software modules executed by one or more processors, or in a combination of the two. The software modules may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium. The exemplary storage medium is coupled to the processor so that the processor can read information from and write information to the storage medium. Alternatively, the storage medium may be integrated with the processor. The processor and storage medium may reside in an ASIC. The ASIC may reside in a user terminal. Alternatively, the processor and storage medium may reside as discrete components in the user terminal.

[0090] According to this specification, suitable computing devices, in non-limiting embodiments, include server computers, desktop computers, laptop computers, notebook computers, subnotebook computers, netbook computers, netpad computers, set-top computers, media streaming devices, handheld computers, internet appliances, mobile smartphones, tablet computers, personal digital assistants, video game consoles, and vehicles. Select televisions, video players, and digital music players with optional computer network connectivity are suitable for use in the systems described herein. Suitable tablet computers, in various embodiments, include those with booklet, slate, and convertible configurations.

[0091] In some embodiments, the computing device includes an operating system configured to execute executable instructions. The operating system is software, for example, including programs and data, which manages the device's hardware and provides services related to the execution of applications. A preferred server operating system, in a non-limiting embodiment, is FreeBSD. (登録商標) OpenBSD (登録商標) NetBSD (登録商標) Linux (登録商標) , (登録商標) Mac OS X Server (登録商標) Oracle Solaris (登録商標) Windows Server (登録商標) , and Novell NetWare (登録商標) This includes. A suitable personal computer operating system is, in a non-limiting embodiment, Microsoft Windows (登録商標) Apple Mac (登録商標) OS X, UNIX (登録商標) , and GNU / Linux (登録商標)This includes operating systems such as UNIX®. In some embodiments, the operating system is provided by cloud computing. A preferred mobile smartphone operating system, in a non-limiting embodiment, is Nokia Symbian. (登録商標) OS, Apple (登録商標) iOS, Research In Motion BlackBerry (登録商標) OS, Google (登録商標) Android (登録商標) Microsoft (登録商標) Windows Phone (登録商標) OS, Microsoft (登録商標) Windows Mobile OS, Linux (登録商標) , and Palm (登録商標) Including WebOS. A suitable media streaming device operating system is, as a non-limiting embodiment, Apple TV. (登録商標) Roku (登録商標) Boxee (登録商標) Google TV (登録商標) Google Chromecast (登録商標) , Command Fire (登録商標) , and Samsung (登録商標) HomeSync (登録商標) This includes. Suitable video game console operating systems include, as a non-limiting embodiment, Sony (登録商標) PS3 (登録商標) Sony (登録商標) PS4 (登録商標) Microsoft (登録商標) Xbox 360 (登録商標) Microsoft Xbox One (登録商標) Nintendo Wii (登録商標) Nintendo Wii U (登録商標) , and Ouya (登録商標) This includes. A suitable virtual reality headset system is, as a non-limiting embodiment, the Meta Oculus (登録商標) Includes.

[0092] (Non-transient computer-readable storage medium) In some embodiments, the platforms, systems, media, and methods disclosed herein include one or more non-transient computer-readable storage media encoded with a program containing instructions executable by the operating system of a optionally networked computing device. In further embodiments, the computer-readable storage media is a tangible component of the computing device. In yet another embodiment, the computer-readable storage media is optionally removable from the computing device. In some embodiments, the computer-readable storage media includes, in non-limiting embodiments, CD-ROMs, DVDs, flash memory devices, solid-state memory, magnetic disk drives, magnetic tape drives, optical disk drives, distributed computing systems including cloud computing systems and services, and equivalents. In some cases, the program and instructions are encoded on the medium permanently, substantially permanently, semi-permanently, or non-transiently.

[0093] (Computer program) In another aspect, disclosed herein is a computer program product for predicting wafer overlays, the computer program product comprising at least one non-transient computer-readable medium having a computer-readable program code portion embodied therein, the computer-readable program code portion comprising an executable portion configured to receive a machine dataset comprising parameters at multiple locations on a wafer, wherein the wafer comprises: an executable portion which is machine-patterned to yield a patterned wafer; an executable portion configured to generate an integrated dataset by (i) aggregating the parameters and (ii) mapping the aggregated parameters to an equally spaced grid; an executable portion configured to generate a predicted overlay on the patterned wafer based on at least partially processing the integrated dataset using a trained machine learning (ML) model; and an executable portion configured to infer a statistical deviation of the predicted overlay from a successfully patterned wafer.

[0094] In some embodiments, the platforms, systems, media, and methods disclosed herein involve at least one computer program or the use of at least one computer program. A computer program is executable by one or more processors of the CPU of a computing device and includes a sequence of instructions written to perform a defined task. Computer-readable instructions may be implemented as program modules such as functions, objects, application programming interfaces (APIs), computing data structures, and equivalents that perform a particular task or implement a particular abstract data type. In light of the disclosure provided herein, computer programs may be written in various versions of various languages.

[0095] The functionality of computer-readable instructions may be combined or distributed as desired in various environments. In some embodiments, a computer program includes one sequence of instructions. In some embodiments, a computer program includes multiple sequences of instructions. In some embodiments, a computer program is provided from one location. In other embodiments, a computer program is provided from multiple locations. In various embodiments, a computer program includes one or more software modules. In various embodiments, a computer program includes, in part or in whole, one or more web applications, one or more mobile applications, one or more standalone applications, one or more web browser plugins, extensions, add-ins, or add-ons, or a combination thereof.

[0096] (Web application) In some embodiments, the computer program includes a web application. In light of the disclosure provided herein, the web application utilizes one or more software frameworks and one or more database systems in various embodiments. In some embodiments, the web application is Microsoft (登録商標) .NET or Ruby on Rails (登録商標) It is built on a software framework such as (RoR). In some embodiments, the web application utilizes one or more database systems, including relational, non-relational, object-oriented, associative, and XML database systems, in non-limiting embodiments. In further embodiments, a preferred relational database system is, in non-limiting embodiments, Microsoft (登録商標) Structured Query Language (SQL) server, MySQL TM , and Oracle (登録商標)This includes: In various embodiments, a web application is written in one or more versions of one or more languages. A web application may be written in one or more markup languages, presentation definition languages, client-side scripting languages, server-side coding languages, database query languages, or a combination thereof. In some embodiments, a web application is written to some extent in a markup language such as Hypertext Markup Language (HTML), Extensible Hypertext Markup Language (XHTML), or Extensible Markup Language (XML). In some embodiments, a web application is written to some extent in a presentation definition language such as Cascading Style Sheets (CSS). In some embodiments, a web application is written in Asynchronous Javascript and XML (登録商標) (AJAX), Flash Actionscript, Javascript (登録商標) , or Silverlight (登録商標) It is written to some extent in client-side scripting languages ​​such as Active Server Pages. In some embodiments, the web application is written in Active Server Pages. (登録商標) (ASP), ColdFusion (登録商標) Perl (登録商標) Java (登録商標) JavaServer Pages (登録商標) (JSP), Hypertext Preprocessor (登録商標) (PHP), Python (登録商標) Ruby (登録商標) , Tcl (登録商標) Smalltalk (登録商標) WebDNA (登録商標) , or Groovy (登録商標) It is written to some extent in server-side coding languages ​​such as [languages ​​name]. In some embodiments, the web application is written to some extent in a database query language such as Structured Query Language (SQL). In some embodiments, the web application is written in IBM Lotus Domino (登録商標)Integrate enterprise server products such as. In some embodiments, the web application includes a media player element. In various further embodiments, the media player element utilizes one or more of many suitable multimedia technologies including, by way of non-limiting examples, Adobe (登録商標) Flash (登録商標) 、HTML 5、Apple (登録商標) QuickTime (登録商標) 、Microsoft Silverlight (登録商標) 、Java (登録商標) 、and Unity (登録商標) among others.

[0097] Referring to FIG. 8, in a particular embodiment, the application provisioning system includes one or more databases 800 accessed by a database management system (DBMS) 810. Suitable DBMSs include Firebird (登録商標) 、MySQL (登録商標) 、NoSQL (登録商標) 、PostgreSQL (登録商標) 、SQLite<000​​​​​​​​​​​​​​​​​​​​​​​​​​​​​(登録商標) GWS (登録商標) The system includes, and equivalents. The web server optionally exposes one or more web services via an application programming interface (API) 840. Over a network such as the Internet, the system provides a browser-based and / or mobile native user interface. In some cases, the DBMS may be a relational DBMS.

[0098] Referring to Figure 9, in a particular embodiment, the application provisioning system has, alternatively, a distributed cloud-based architecture 900, comprising flexibly load-balanced, auto-scaling web server resources 910 and application server resources 920, as well as a synchronously replicated database 930.

[0099] (Mobile application) In some embodiments, the computer program includes a mobile application that is provided to a mobile computing device. In some embodiments, the mobile application is provided to the mobile computing device at the time of its manufacture. In other embodiments, the mobile application is provided to the mobile computing device via a computer network as described herein.

[0100] In consideration of the disclosures provided herein, mobile applications are created by techniques using hardware, languages, and development environments. Mobile applications are written in several languages. Preferred programming languages, in non-limiting embodiments, include C, C++, C#, Objective-C, and Java. (登録商標) Javascript (登録商標) Pascal (登録商標) Object Pascal (登録商標) Python (登録商標) Ruby (登録商標) VB.NET (登録商標)WML (登録商標) This includes XHTML / HTML with or without CSS, or a combination thereof.

[0101] Suitable mobile application development environments are available from several sources. A commercially available development environment, as a non-exclusive example, is the Airplay SDK. (登録商標) alcheMo (登録商標) Appcelerator (登録商標) Celsius (登録商標) Bedrock (登録商標) Flash Lite (登録商標) .NET Compact Framework (登録商標) Rhomobile (登録商標) , and WorkLight Mobile Platform (登録商標) This includes, as a non-limiting example, Lazarus (登録商標) MobiChange (登録商標) MoSync (登録商標) , and Phonegap (登録商標) Other development environments, including those mentioned above, are also available free of charge. Furthermore, mobile device manufacturers can, in non-exclusive examples, use iPhones. (登録商標) and iPad (登録商標) (iOS) SDK, Android (登録商標) SDK, BlackBerry (登録商標) SDK, BREW SDK, Palm (登録商標) OS SDK, Symbian (登録商標) SDK, webOS (登録商標) SDK and Windows (登録商標) We distribute a software developer kit, including the Mobile SDK.

[0102] As a non-exclusive example, Apple (登録商標) App Store, Google (登録商標) Play, Chrome (登録商標) WebStore, BlackBerry (登録商標) App World, the App Store for Palm devices (登録商標)App Catalog for webOS (登録商標) Windows for mobile (登録商標) Marketplace, Nokia (登録商標) Ovi Store for devices, Samsung (登録商標) Apps, and Nintendo (登録商標) Several commercial sources, including the DSi Shop, are available for distributing mobile applications.

[0103] (Standalone application) In some embodiments, the computer program includes a standalone application, which is a program that runs as an independent computer process, not as an add-on to an existing process, for example, not as a plug-in. Standalone applications are often compiled. A compiler is a computer program that translates source code written in a programming language into binary object code such as assembly language or machine code. Preferred compiled programming languages, in non-limiting embodiments, include C, C++, and Objective-C. (登録商標) COBOL (登録商標) , Delphi (登録商標) Eiffel (登録商標) Java (登録商標) Lisp (登録商標) Python (登録商標) Visual Basic (登録商標) , and VB .NET (登録商標) , or a combination thereof. Compilation is often performed, at least partially, to create an executable program. In some embodiments, a computer program includes one or more executable compiled applications. In addition, Python (登録商標) and JavaScript (登録商標) Microservices related to this may be used.

[0104] (Web browser plugin) In some embodiments, a computer program includes a web browser plugin (e.g., a web extension). In computing, a plugin is one or more software components that add specific functionality to a larger software application. Software application makers support plugins to enable third-party developers to extend the application, to easily add new features, and to reduce the size of the application. When supported, plugins allow for customization of the functionality of the software application. For example, plugins are commonly used in web browsers to play videos, generate interactivity, scan for viruses, and display specific file types. Some web browser plugins include Adobe Flash Player. (登録商標) Microsoft Silverlight (登録商標) , and Apple QuickTime (登録商標) This may include: In some embodiments, the toolbar comprises one or more web browser extensions, add-ins, or add-ons. In some embodiments, the toolbar comprises one or more explorer bars, toolbands, or deskbands.

[0105] In consideration of the disclosure provided herein, non-limiting examples include C++, Delphi (登録商標) Java (登録商標) , PHP (登録商標) Python (登録商標) , and VB .NET (登録商標) Several plugin frameworks are available that enable the development of plugins in various programming languages, including combinations thereof.

[0106] A web browser (also called an internet browser) is a software application designed for use with network-connected computing devices to read, present, and traverse information resources on the World Wide Web. A preferred web browser, in a non-exclusive example, is Microsoft Internet Explorer. (登録商標) Mozilla Firefox (登録商標) Google Chrome (登録商標) Apple Safari (登録商標) Opera Software Opera (登録商標) , and KDE Konqueror (登録商標) This includes. In some embodiments, the web browser is a mobile web browser. Mobile web browsers (also called microbrowsers, minibrowsers, and wireless browsers) are designed for use on mobile computing devices, including, in non-limiting embodiments, handheld computers, tablet computers, netbooks, subnode books, smartphones, music players, personal digital assistants (PDAs), and handheld video game systems. A preferred mobile web browser, in non-limiting embodiments, is Google Android. (登録商標) Browser, RIM BlackBerry (登録商標) Browser: Apple Safari (登録商標) Palm Blazer (登録商標) Palm WebOS (登録商標) Mozilla Firefox browser for mobile devices (登録商標) , Microsoft Internet Explorer Mobile (登録商標) Amazon Kindle Basic Web (登録商標) Nokia Browser (登録商標) , Opera Software Opera Mobile (登録商標) , and Sony PSP (登録商標) Includes browsers.

[0107] (Software module) In some embodiments, the platforms, systems, media, and methods disclosed herein include software, servers, and / or database modules, or the use thereof. In consideration of the disclosures provided herein, software modules are created by techniques using machines, software, and languages. Software modules disclosed herein are implemented in numerous ways. In various embodiments, a software module comprises files, sections of code, programming objects, programming structures, or a combination thereof. In further various embodiments, a software module comprises multiple files, multiple sections of code, multiple programming objects, multiple programming structures, or a combination thereof. In various embodiments, one or more software modules comprise, in non-limiting embodiments, a web application, a mobile application, and a standalone application. In some embodiments, a software module resides within a single computer program or application. In other embodiments, a software module resides within one or more computer programs or applications. In some embodiments, a software module is hosted on a single machine. In other embodiments, a software module is hosted on one or more machines. In further embodiments, a software module is hosted on a distributed computing platform, such as a cloud computing platform. In some embodiments, the software module is hosted on one or more machines in one location. In other embodiments, the software module is hosted on one or more machines in more than one location.

[0108] (Database) In some embodiments, the platforms, systems, media, and methods disclosed herein include one or more databases (DBs) or the use thereof. Considering the disclosures provided herein, many databases are suitable for storing and retrieving data. In various embodiments, suitable databases include, in non-limiting embodiments, relational databases, non-relational databases, object-oriented databases, object databases, entity-relational model databases, associative databases, XML databases, time-series databases, graph databases, and equivalents. Further non-limiting embodiments include SQL, PostgreSQL, etc. (登録商標) MySQL (登録商標) Oracle (登録商標) DB2 (登録商標) This includes, and Sybase. In some embodiments, the database is internet-based. In further embodiments, the database is web-based. In yet further embodiments, the database is cloud computing-based. In certain embodiments, the database is a distributed database. In other embodiments, the database is based on one or more local computer storage devices.

[0109] (Terms and Definitions) Unless otherwise defined, all technical terms used herein have the same meaning as those commonly understood by those skilled in the art to which this disclosure belongs.

[0110] As used herein, the singular forms “a,” “an,” and “the” include plural referents unless the context clearly determines otherwise. Any reference to “or” herein is intended to include “and / or” unless otherwise stated.

[0111] As used herein, the term "about" refers to a quantity that, in some cases, is stated approximately.

[0112] As used herein, the term “about” refers to an amount that is 10%, 5%, or 1% (including increments thereof) close to the amount stated.

[0113] As used herein, the term “about” in relation to percentages refers to an amount that is 10%, 5%, or 1% (including increments thereof) greater or less than the stated percentage.

[0114] As used herein, the phrases “at least one,” “one or more,” and “and / or” are non-restrictive expressions that are both conjunctive and disjunctive in their operation. For example, the expressions “at least one of A, B, and C,” “at least one of A, B, or C,” “one or more of A, B, and C,” and “A, B, and / or C” mean A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together.

[0115] Preferred embodiments of the Disclosure are shown and described herein, but such embodiments are provided only as examples. The Disclosure is not intended to be limited by the specific embodiments provided herein. The Disclosure is described with reference to the preceding specification, but the descriptions and illustrations of embodiments herein are not to be constrained to be limited. Numerous variations, modifications, and substitutions may arise without departing from the Disclosure. Furthermore, it should be understood that all aspects of the Disclosure are not limited to the specific descriptions, configurations, or relative proportions described herein, which depend on various conditions and variables. It should be understood that various alternatives to the embodiments of the Disclosure described herein may be adopted when practicing the Disclosure. Thus, it is also assumed that the Disclosure will also cover any such alternatives, modifications, variations, or equivalents. The following claims define the scope of the Disclosure, and the systems, methods, and structures within the scope of these claims and their equivalents are intended to be covered thereby.

Claims

1. A method for predicting wafer overlay, wherein the method is (a) Receiving a machine data set comprising parameters at multiple locations on a wafer, wherein the wafer is machine-patterned to result in a patterned wafer, (b) (i) Aggregate the parameters, and (ii) Map the aggregated parameters to an equally spaced grid to generate an integrated dataset, (c) generating a predicted overlay on the patterned wafer, at least in part, based on processing the integrated dataset using a trained machine learning (ML) model, (d) Inferring the statistical deviation of the predicted overlay from a properly patterned wafer. Methods that include...

2. The method according to claim 1, wherein the machine dataset is a multimodal dataset comprising matching data, leveling data, lens data, servo data, advanced process control (APC) data, or fault detection and classification (FDC) data.

3. The method according to claim 1, wherein the plurality of positions of the machine data set include positions that traverse the patterned wafer, and the positions that traverse the patterned wafer are random, uniformly distributed, or non-uniformly distributed.

4. The method according to claim 1, further comprising applying an estimation function to the predicted overlay to predict measurements at a plurality of other locations different from the plurality of locations on the predicted overlay.

5. The method according to claim 1, wherein the plurality of other locations of the predicted overlay include locations that traverse the patterned wafer, and the locations that traverse the patterned wafer are random, uniformly distributed, or non-uniformly distributed.

6. The method according to claim 1, further comprising re-patterning the patterned wafer when it is determined that the statistical deviation is outside a specified threshold.

7. The method according to claim 1, further comprising adjusting the parameters of the machine before the machine patterns a subsequent wafer using the predicted overlay.

8. The method according to claim 1, further comprising using the predicted overlay to predict drift or deviation in the machine or the process of the machine.

9. The method according to claim 1, wherein the measured value of the overlay or the predicted overlay comprises a critical dimension (CD) or film thickness.

10. The method according to claim 1, wherein the measured values ​​of the overlay or the predicted overlay include spatial differences or displacements between the layers of the patterned wafer.

11. The method according to claim 1, further comprising using the predicted overlay to predict anomalies in the patterned wafer.

12. The method according to claim 1, further comprising using the predicted overlay before patterning a subsequent wafer, and (i) adjusting one or more parameters of the machine or (ii) one or more process parameters of the machine.

13. The method according to claim 1, wherein the process of the machine comprises a lithography process, an etching process, or a thin film process.

14. The method according to claim 1, further comprising adjusting the density of the equally spaced grids based at least on a user-defined criterion or the statistical deviation.

15. The predicted overlay is, Using the aforementioned predicted overlay, the parameters for advanced process control (APC) are determined, Adjusting the parameters of the machine in real time, at least based on using the determined parameters. Therefore, it is operable to perform the APC, The method according to claim 1, wherein the adjusted parameters improve the yield of subsequent wafers patterned by the machine by at least 1%.

16. The method according to claim 1, wherein the trained ML model is trained using at least one of (i) the equally spaced grid, (ii) the integrated dataset, or (iii) the measured overlay of the patterned wafer.

17. The method according to claim 16, further comprising using transfer learning to update a portion of the trained ML model before patterning subsequent wafers, wherein the transfer learning is at least based on analyzing recent trends between the machine dataset and the measured overlay.

18. The method according to claim 1, further comprising training the ML model using one or more machine datasets comprising parameters from two or more machines used to pattern the wafer.

19. The method according to claim 1, further comprising training the ML model using one or more overlays comprising measurements from two or more machines used to pattern the wafer.

20. The aforementioned trained ML model (i) an encoder layer configured to acquire global context features of the patterned wafer and (ii) in-input feature correlations, A decoder layer configured to determine the global context features of the patterned wafer, A skip connection layer configured to generate the predicted overlay using at least local context features and the in-input feature correlations, The method according to claim 1, wherein the deep neural network comprises the following.

21. The method according to claim 1, wherein the trained ML model is configured to preserve the spatial scale of any feature of the predicted overlay.

22. The method according to claim 1, wherein the statistical deviation comprises a mean deviation or a sigma deviation.

23. The method according to claim 1, wherein the predicted overlay is operable to perform virtual measurement (VM), root cause analysis (RCA), or image measurement (IM).

24. The method according to claim 1, further comprising repeating (a)–(d) until all layers of the patterned wafer are patterned by the machine.

25. A computer program product for predicting wafer overlays, wherein the computer program product comprises at least one non-transient computer-readable medium, the at least one non-transient computer-readable medium having a computer-readable program code portion embodied therein, the computer-readable program code portion is An executable part configured to receive a machine dataset comprising parameters at multiple locations on a wafer, wherein the wafer is patterned by machine to produce a patterned wafer, (i) an executable part configured to generate an integrated dataset by aggregating the parameters and (ii) mapping the aggregated parameters to an equally spaced grid, A viable component configured to generate a predicted overlay on the patterned wafer, at least in part, based on processing the integrated dataset using a trained machine learning (ML) model, A viable portion configured to infer the statistical deviation of the predicted overlay from a properly patterned wafer, and A computer program product that includes the following features.

26. A system for predicting wafer overlays, the system comprising at least one processor and instructions, the instructions being provided to the at least one processor, (a) Receiving a machine data set comprising parameters at multiple locations on a wafer, wherein the wafer is machine-patterned to result in a patterned wafer, (b) (i) Aggregate the parameters, and (ii) Map the aggregated parameters to an equally spaced grid to generate an integrated dataset, (c) generating a predicted overlay on the patterned wafer, at least in part, based on processing the integrated dataset using a trained machine learning (ML) model, (d) Inferring the statistical deviation of the predicted overlay from a properly patterned wafer. A system that is executable by at least one processor to perform an operation including the following.

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