Electrosurgical device

Abstract

To provide an electrosurgical device that operates accurately and stably with a simple configuration. [Solution] The electrosurgical apparatus includes a full-bridge circuit having a first switch element and a third switch element connected in series with a drive power supply, and a second switch element and a fourth switch element connected in series with a drive power supply; a transformer in which one terminal of the primary side circuit is connected between the first switch element and the third switch element, and the other terminal of the primary side circuit is connected between the second switch element and the fourth switch element; and a therapeutic electrode connected between one terminal and the other terminal of the secondary side circuit of the transformer. The first and second switch elements, which constitute the high side of the full-bridge circuit, are both made using n-type MOSFETs, and the third and fourth switch elements, which constitute the low side, are both made using p-type MOSFETs.

Description

Technical Field

[0001] The present invention relates to an electrosurgical device.

Background Art

[0002] Patent Document 1 describes a high-frequency electrosurgical knife device that outputs a high-frequency output current for surgical treatment. The high-frequency electrosurgical knife device includes a high-frequency signal generation circuit that generates a treatment high-frequency signal, an amplification transistor circuit that amplifies the treatment high-frequency signal, a high-frequency output circuit that generates a high-frequency output, a switch that selectively biases the transistor circuit to selectively amplify the treatment high-frequency signal by the transistor circuit, and a transistor circuit that operates by the operation of the switch and supplies a bias voltage to the transistor circuit.

[0003] Patent Document 2 describes an electrosurgical device configured for the purpose of providing an electrosurgical power supply device that can remove or reduce the mixing of noise without reducing the response speed. An output voltage instruction signal is input to a signal input section of a control circuit of the electrosurgical device through a normal mode noise / common mode noise removal circuit, and together with an output voltage FB signal obtained by dividing the power supply output, it passes through an error amplifier and a PWM control circuit to drive a switching element (FET bridge) provided on the primary side of an isolation transformer of a DC-DC converter circuit, transmits power to the secondary side, rectifies it with a diode bridge, smooths it with an output smoothing filter having a high cut-off frequency to ensure a high-speed response, and supplies a DC power supply output to a high-frequency generation circuit.

[0004] Non-patent document 1 describes a motor drive circuit composed of a full-bridge circuit (also called an "H-bridge circuit" or "H-type bridge circuit") using MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). The full-bridge circuit is composed of four switches, and forward rotation, reverse rotation, and braking are achieved by the combination of on and off states of the switches. As an example of a full-bridge circuit, the document describes a circuit using a P-channel MOSFET on the high side and an N-channel MOSFET on the low side. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 62-266050 [Patent Document 2] Japanese Patent Publication No. 2005-102750 [Non-patent literature]

[0006] [Non-Patent Document 1] [Motor Control 6] Motor Driver Circuit Design ~Nch FET H-Bridge~ [Arduino], SAKIGAKE Colleges of Technology, Taichi Ando, ​​[online], [Retrieved November 19, 2024], Internet<https: / / sakigake-robo.com / motor-6 / > [Overview of the project] [Problems that the invention aims to solve]

[0007] In electrosurgical devices that use energy such as Joule heat generated by passing high-frequency signals through therapeutic electrodes to perform incisions and hemostasis, increasing the frequency of the high-frequency signal supplied to the therapeutic electrode makes it possible to limit the energy used for incisions and hemostasis to a very shallow area around the therapeutic electrode, thereby limiting the range in which the energy affects surrounding tissue. Therefore, when supplying high-frequency energy to the therapeutic electrode of an electrosurgical device, it is necessary to suppress distortion of the high-frequency signal waveform and supply high-frequency signal energy suitable for the incision and hemostasis operation intended by the surgeon.

[0008] However, in conventional circuits, when the frequency of the high-frequency signal supplied to the therapeutic electrode increases, it is impossible to control the effects of back electromotive force and other factors on elements such as transistors that drive the output transformer due to the inductance characteristics of the output transformer. This can affect the surrounding tissue when the surgeon performs the intended incision or hemostasis.

[0009] The high-frequency electrosurgical apparatus described in Patent Document 1 amplifies the treatment high-frequency signal generated by the high-frequency signal generation circuit using an amplification transistor circuit, and supplies the amplified high-frequency signal to the treatment electrode by inputting it to the primary side of the output transformer. Therefore, it is susceptible to the effects of load characteristics. To prevent the effects of load characteristics, feedback control in response to changes in load characteristics is necessary, but introducing feedback control complicates the apparatus and increases manufacturing costs. In addition, since the high-frequency signal generation circuit is a noise source, it is also necessary to suppress the effects of noise on computing devices such as microcomputers that control the high-frequency signal.

[0010] Furthermore, while the output transformer requires a high voltage of several hundred volts, if, for example, the four switching elements constituting the FET bridge described in Patent Document 2 are all N-channel type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), as in the full-bridge circuit described in Non-Patent Document 1, then the gate voltage applied to the high-side switching element must be the sum of the low-side voltage. This requires high voltage resistance for the switching element and its surrounding circuitry, and also leads to increased circuit complexity and manufacturing costs.

[0011] This invention was made in view of the above background, and aims to provide an electrosurgical device that operates accurately and stably with a simple configuration. [Means for solving the problem]

[0012] One means to solve the above problem is an electrosurgical apparatus comprising: a full-bridge circuit having a first switch element and a third switch element connected in series with a drive power supply; a second switch element and a fourth switch element connected in series with a drive power supply; a transformer in which one terminal of the primary side circuit is connected between the first switch element and the third switch element, and the other terminal of the primary side circuit is connected between the second switch element and the fourth switch element; and a control device that supplies power from the drive power supply to the primary side circuit by alternately switching on and off a first combination of the first switch element and the fourth switch and a second combination of the second switch element and the third element; and the two of the transformer The device includes a therapeutic electrode connected between one terminal and the other terminal of the primary circuit, wherein the first and second switch elements are constructed using N-channel field-effect transistors, and the third and fourth switch elements are constructed using P-channel field-effect transistors, with the source of the first switch element, the source of the third switch element, and one terminal of the primary circuit of the transformer being connected, and the source of the second switch element, the source of the fourth switch element, and the other terminal of the primary circuit of the transformer being connected, and the control device alternately turns the first combination and the second combination on and off by controlling the gate voltages of the first to fourth switch elements, respectively.

[0013] Further issues disclosed in this application, and methods for solving them, will be made clear in the section on embodiments for carrying out the invention and in the drawings. [Effects of the Invention]

[0014] According to the present invention, it is possible to provide an electrosurgical device that operates accurately and stably with a simple configuration. [Brief explanation of the drawing]

[0015] [Figure 1] This is a diagram illustrating the schematic configuration of an electrosurgical device. [Figure 2]It is a diagram showing a specific configuration of a full-bridge circuit. [Figure 3] It is a diagram showing an example of a control signal generation circuit. [Figure 4] It is a diagram showing another example of a control signal generation circuit. [Figure 5] It is a diagram for explaining a control example of a control signal generation circuit. [Figure 6] It is an example of a timing chart of various signals generated in a control signal generation circuit. [Figure 7] It is a diagram showing a modified example of a full-bridge circuit.

Embodiments for Carrying Out the Invention

[0016] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the following embodiments are merely examples for explaining the present invention, and appropriate omissions and simplifications have been made for clarity of explanation.

[0017] Also, in the following description, the same or similar configurations may be denoted by the same reference numerals and redundant descriptions may be omitted.

[0018] Also, in the following description, when it is necessary to individually distinguish the same type of configurations, an identifier (number, alphabet, etc.) of each individual configuration may be indicated after the reference numeral that collectively denotes the same type of configurations.

[0019] [[ID=Z34]] Also, in the following description, "alternating current power" may be referred to as "alternating current", and "direct current power" may be referred to as "direct current".

[0020] [Device Outline] FIG. 1 shows a schematic configuration of an electrosurgical device 1 described as an embodiment of the present invention. As shown in the figure, the electrosurgical device 1 includes a high-voltage section 10, a low-voltage section 20, a booster section 30, and a power supply section 40.

[0021] Among these, the power supply section 40 has a protection circuit 41, a main power supply 42, a first sub-power supply 43a, and a second sub-power supply 43b.

[0022] The protection circuit 41 is composed of elements such as fuses that protect the subsequent circuit.

[0023] The main power supply 42 is configured using an AC / DC converter, which converts alternating current supplied from an external power source such as a commercial power supply or a private power generator into direct current of a predetermined voltage, and supplies the converted direct current to the first auxiliary power supply 43a and the second auxiliary power supply 43b.

[0024] The first auxiliary power supply 43a is configured using a DC / DC converter (switching regulator) in which the input and output sides are isolated (hereinafter referred to as "isolated type"), and converts the DC supplied from the main power supply 42 into DC of a predetermined voltage and supplies it to the boost unit 30.

[0025] The second auxiliary power supply 43b is configured using an isolated DC / DC converter and converts the DC supplied from the main power supply 42 into DC of a predetermined voltage and supplies it to the low-voltage section 20 and the optical couplers 112a to 112d described later. The second auxiliary power supply 43b has two sets of positive and negative power supplies (hereinafter referred to as the "first positive / negative power supply" and the "second positive / negative power supply," respectively) capable of outputting positive and negative voltages.

[0026] The boost unit 30 has a boost circuit composed of a boost control circuit 31, a boost transformer 32, a diode 33, a capacitive element 34, and the like.

[0027] The boost control circuit 31 is controlled by the main control circuit 21 of the low-voltage section 20, which will be described later, and converts the DC supplied from the first auxiliary power supply 43a into AC of a predetermined voltage and supplies it to the primary side circuit (primary winding side circuit) of the boost transformer 32.

[0028] The secondary circuit of the step-up transformer 32 (including the secondary winding of the step-up transformer 32 and a rectifier circuit composed of diodes 33 and capacitive elements 34) steps up the AC supplied from the primary circuit and converts it into high-voltage DC, supplying the changed high-voltage DC +VcH to the full-bridge circuit 110 of the high-voltage section 10, which will be described later. The secondary circuit of the step-up transformer 32 constitutes part of the high-voltage section 10. The step-up control circuit 31 is isolated from the high-voltage section 10 by the step-up transformer 32.

[0029] The low-voltage section 20 includes a main control circuit 21, a control signal generation circuit 22, and a user interface 23. The main control circuit 21 is communicated with the control signal generation circuit 22 and the user interface 23 via an internal bus and signal lines.

[0030] The main control circuit 21 includes a computing device (information processing device) composed of a CPU (Central Processing Unit), an MPU (Micro Processing Unit), a DSP (Digital Signal Processor), etc., and controls each element of the low-voltage section 20.

[0031] The control signal generation circuit 22 generates high-frequency signals to control the on / off state of the switch elements 111a to 111d of the full-bridge circuit 110, which will be described later, in response to instructions from the main control circuit 21.

[0032] The user interface 23 includes various input devices (operation panel, foot switch (switch for controlling the supply of power to therapeutic electrodes), mode (incision, hemostasis, etc.) switching switch) and various output devices (display, liquid crystal panel, light-emitting element (LED (Light Emitting Diode), etc.), audio output device (amplifier, speaker, etc.)).

[0033] The high-voltage section 10 includes a full-bridge circuit 110, an output transformer 120, and the secondary circuit of the step-up transformer 32 of the step-up section 30 described above.

[0034] The full-bridge circuit 110 includes switch elements 111a to 111d and four photocouplers (hereinafter referred to as "optical couplers 112a to 112d," respectively) provided for each of the switch elements 111a to 111d. Each of the optical couplers 112a to 112d inputs (applies) a voltage (hereinafter referred to as "gate voltage") based on the high-frequency signal generated by the high-frequency signal generation unit 24 to the gate of the corresponding switch element 111a to 111d.

[0035] Each of the four switching elements 111a to 111d is controlled by control signals A to D generated by the high-frequency signal generation unit 24 via optical couplers 112a to 112d provided on each of them, thereby controlling the DC (DC supplied from the boost unit 30) supplied to the primary side circuit (primary winding side circuit) of the output transformer 120, which will be described later.

[0036] As shown in the figure, the secondary circuit (secondary winding circuit) of the output transformer 120 is connected to the therapeutic electrode 135 via capacitive elements 131a and 131b. The therapeutic electrode 135 is isolated from the full-bridge circuit 110 by the capacitive elements 131a and 131b and the output transformer 120.

[0037] [Full bridge circuit] Figure 2 shows the specific configuration of the full-bridge circuit 110. The full-bridge circuit 110 will be described in detail below, along with the figure.

[0038] As shown in the figure, the full-bridge circuit 110 is constructed using N-channel type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors; hereinafter referred to as "N-type MOS") for the two high-side switching elements 111a and 111b, and P-channel type MOSFETs (hereinafter referred to as "P-type MOS") for the two low-side switching elements 111c and 111d.

[0039] The drains of the two high-side switching elements 111a and 111b are both connected to the positive terminal of the secondary circuit of the step-up transformer 32 of the step-up unit 30, and a high-voltage DC +VcH is applied to them.

[0040] The source of the high-side switch element 111a and the source of the low-side switch element 111c are both connected to one terminal of the primary circuit of the output transformer 120, and are also connected to the common terminal COMa of the first positive and negative power supply of the second auxiliary power supply 43b.

[0041] The source of the high-side switch element 111b and the source of the low-side switch element 111d are both connected to the other terminal of the primary circuit of the output transformer 120, and are also connected to the common terminal COMb of the second positive and negative power supply of the second auxiliary power supply 43b.

[0042] The drains of the low-side switch element 111c and the low-side switch element 111d are both connected to the negative side (GNDh) of the secondary circuit of the step-up transformer 32 of the step-up unit 30.

[0043] Each of the four switch elements 111a to 111d has a gate connected to the output of an optical coupler 112a to 112d, and each gate receives a gate voltage based on control signals A to D.

[0044] Each of the four optical couplers 112a to 112d comprises a light-emitting element, a light-receiving element provided opposite the light-emitting portion of the light-emitting element, and an amplification circuit connected to the light-receiving element for amplifying the signal output from the light-receiving element.

[0045] Of these, optical coupler 112a is supplied with the positive voltage +VcGa of the first positive and negative power supply of the second auxiliary power supply 43b. Optical coupler 112c is supplied with the negative voltage -VcGa of the first positive and negative power supply of the second auxiliary power supply 43b. Optical coupler 112b is supplied with the positive voltage +VcGb of the second positive and negative power supply of the second auxiliary power supply 43b. Optical coupler 112d is supplied with the negative voltage -VcGb of the second positive and negative power supply of the second auxiliary power supply 43b.

[0046] Each of the four optical couplers 112a to 112d has a corresponding control signal A to D input to its respective light-emitting element, which is generated by the control signal generation circuit 22 of the low-voltage section 20. Light emitted from the light-emitting element located opposite each of the optical couplers 112a to 112d is incident on each of the light-receiving elements. Each of the optical couplers 112a to 112d amplifies the signal output by its respective light-receiving element using an amplification circuit, and inputs the resulting gate voltage to the gates of the switch elements 111a to 111d connected to it.

[0047] In the example circuit, current-limiting resistors Ra to Rd are interposed between the respective output terminals of the optical couplers 112a to 112d and the gates of the corresponding switch elements 111a to 111d to prevent excessive current from flowing through the switch elements 111a to 111d.

[0048] Here, the two high-side switch elements 111a and 111b are both N-type MOS transistors, so they both turn on when a positive voltage is input to their gates and turn off when a zero or negative voltage is input. On the other hand, the two low-side switch elements 111c and 111d are both P-type MOS transistors, so they both turn on when a zero or negative voltage is input to their gates and turn off when a positive voltage is input.

[0049] The control signal generation circuit 22 generates control signals A to D such that when switch elements 111a and 111d are turned on, switch elements 111b and 111c are turned off. At this time, current flows through the output transformer 120 in the direction of arrow a. Also, the control signal generation circuit 22 generates control signals A to D such that when switch elements 111b and 111c are turned on, switch elements 111a and 111d are turned off. At this time, current flows through the output transformer 120 in the direction of arrow b.

[0050] The control signal generation circuit 22 generates a high-frequency current in the primary circuit of the output transformer 120 by alternately switching on and off a first combination of a high-side switch element 111a and a low-side switch element 111d, and a second combination of a high-side switch element 111b and a low-side switch element 111c, in a time series, and supplies the high-frequency current to the therapeutic electrode 135 via the secondary circuit of the output transformer 120.

[0051] It should be noted that the output transformer 120 requires a high voltage of several hundred volts. For example, if all four switch elements constituting the full-bridge circuit 110 of this embodiment are N-type MOS transistors, then the gate voltage applied to the high-side switch elements 111a and 111b must be the sum of the low-side voltage. This requires high voltage resistance from the switch elements 111a to 111d and their surrounding circuits, and also leads to increased circuit complexity and manufacturing costs.

[0052] In contrast, the full-bridge circuit 110 of this embodiment uses N-type MOS transistors for the two high-side switch elements 111a and 111b, and P-type MOS transistors for the two low-side switch elements 111c and 111d. Furthermore, the source of switch element 111a and the drain of switch element 111c are both connected to the common terminal COMa of the first positive and negative power supply, and the source of switch element 111b and the drain of switch element 111d are both connected to the common terminal COMb of the second positive and negative power supply. Therefore, to control the switch elements 111a to 111d, it is sufficient to apply a voltage to the respective gates of the switch elements 111a to 111d with reference to the common terminals COMa and COMb, and the switch elements 111a to 111b can be controlled at a lower voltage compared to the H-type bridge circuit of Non-Patent Document 1.

[0053] [Control signal generation circuit] Figure 3 shows an example of the control signal generation circuit 22 for the low-voltage section 20 shown in Figure 1. The control signal generation circuit 22 will be described below in conjunction with this figure.

[0054] As shown in the figure, the control signal generation circuit 22 includes an oscillator circuit 221, a counter circuit 222, a decoder circuit 223, and a logic circuit 224 (logic gate).

[0055] Of these, the oscillator circuit 221 generates a pulse wave (for example, a square wave; hereinafter referred to as "clock signal VCK") at a frequency specified by the main control circuit 21 of the low-voltage section 20, and inputs the generated clock signal VCK to the counter circuit 222. The oscillator circuit 221 is configured using, for example, a wideband clock generator whose frequency can be controlled by an external signal from the main control circuit 21.

[0056] The counter circuit 222 is a counter with a predetermined number of bits (in this example, a 3-bit counter), and it counts the pulse waves of the clock signal VCK generated by the oscillator circuit 221 and inputs the counted value to the decoder circuit 223. The counter circuit 222 can be turned on and off (reset) by an external signal from the main control circuit 21. In this example, the counter circuit 222 functions as a 3-bit counter, and the oscillator circuit 221 generates a clock signal VCK with a frequency eight times that of the frequencies of control signals A to D.

[0057] The decoder circuit 223 has multiple output terminals and controls the output of each output terminal according to the count value input from the counter circuit 222. In this example, since the counter circuit 222 outputs a 3-bit count value, the decoder circuit 223 has eight negative logic output terminals (hereinafter referred to as output terminals (0) to (7), respectively). The decoder circuit 223 outputs "0" to the output terminal corresponding to the count value currently input from the counter circuit 222, and outputs "1" to the other output terminals.

[0058] The logic circuit 224 generates control signals A to D to be input to each of the four optical couplers 112a to 112d based on the values ​​("0" or "1") output from each output terminal of the decoder circuit 223, and inputs the generated control signals A to D to the corresponding optical couplers 112a to 112d.

[0059] As shown in the figure, the example logic circuit 224 includes a first AND gate 251 to which the values ​​of output terminals (1) to (3) of the decoder circuit 223 are input, a first NOT gate 261 to which the output of the first AND gate is input, a second AND gate 252 to which the values ​​of output terminals (5) to (6) of the decoder circuit 223 are input, and a second NOT gate 262 to which the output of the second AND gate is input.

[0060] Of these, the output of the first AND gate 251 is input to the optical coupler 112d as control signal D. The output of the first NOT gate 261 is input to the optical coupler 112a as control signal A. The output of the second AND gate 252 is input to the optical coupler 112c as control signal C. The output of the second NOT gate 262 is input to the optical coupler 112b as control signal B.

[0061] During the period when "0" is output to any of the output terminals (1) to (3) of the decoder circuit 223, "1" is input as control signal A to optical coupler 112a, "0" as control signal D to optical coupler 112d, "1" as control signal B to optical coupler 112b, and "0" as control signal C to optical coupler 112c. As a result, the first combination (switch element 111a and switch element 111d) is turned on, and the second combination (switch element 111b and switch element 111c) is turned off. Consequently, during this period, current flows through the primary circuit of the output transformer 120 in the direction of arrow (a) shown in Figure 1.

[0062] Furthermore, during the period when "0" is output to any of the output terminals (5) to (7) of the decoder circuit 223, "0" is input as control signal A to optical coupler 112a, "1" as control signal D to optical coupler 112d, "1" as control signal B to optical coupler 112b, and "0" as control signal C to optical coupler 112c. As a result, the first combination (switch element 111a and switch element 111d) is turned off, and the second combination (switch element 111b and switch element 111c) is turned on. Consequently, during this period, current flows through the primary side circuit of the output transformer 120 in the direction of arrow (b) shown in Figure 1.

[0063] Furthermore, since the output terminals (4) and (7) of the decoder circuit 223 are not connected to the logic circuit 224, during the period when "0" is output to output terminal (4) or (7) of the decoder circuit 223, control signal A becomes "0", control signal D becomes "1", control signal B becomes "0", and control signal C becomes "1", and during the same period, no current flows through the primary side circuit of the output transformer 120.

[0064] As described above, the control signals A to D generate the switch elements 111a to 111d, thereby supplying a high-frequency signal with a frequency of 1 / 8 of the frequency of the clock signal VCK generated by the oscillation circuit 221 to the primary circuit of the output transformer 120, and supplying a high-frequency signal of the above frequency from the secondary circuit of the output transformer 120 to the therapeutic electrode 135.

[0065] While "0" is output to output terminal (4) or (7) of the decoder circuit 223, in principle no current flows through the primary side circuit of the output transformer 120. However, due to the difference in on / off characteristics between the high-side N-type MOS and the low-side P-type MOS, the high-side N-type MOS may turn on simultaneously (for example, switch elements 111a and 111c turn on simultaneously, or switch elements 111b and 111d turn on simultaneously), and current (hereinafter referred to as "through current") may flow from the high-side N-type MOS to the low-side P-type MOS (from switch element 111a to switch element 111c, or from switch element 111b to switch element 111d).

[0066] In such cases, for example, the flow of through-current can be prevented by adjusting the connections between each output terminal (0) to (7) of the decoder circuit 223 and the first AND gate 251 or second AND gate 252 of the logic circuit 224. For example, by connecting only output terminals (1) to (2) of the decoder circuit 223 to the input of the first AND gate 251, and only output terminals (5) to (6) of the decoder circuit 223 to the input of the second AND gate 252, the period during which no gate voltage is applied to the switch elements 111a to 111d can be extended.

[0067] Furthermore, the switch elements 111a and 111c may be packaged together as a dual-type device. Alternatively, the switch elements 111b and 111d may also be packaged together as a dual-type device. By doing so, the generation of through-current can be suppressed, and an electrosurgical device 1 with less thermal drift and DC offset can be realized.

[0068] [Other examples of control signal generation circuits] By the way, in the control signal generation circuit 22 illustrated in Figure 3, a 3-bit counter circuit 222 is used and a decoder circuit 223 has eight output terminals. However, for example, a counter circuit 222 with 4 bits or more may be used, and a decoder circuit 223 with output terminals corresponding to the number of bits in the counter circuit 222 may also be used. By doing so, the high-frequency signal supplied to the therapeutic electrode 135 can be controlled more precisely.

[0069] Figure 4 shows a control signal generation circuit 22, as an example, which uses a 4-bit counter as the counter circuit 222 and a decoder circuit 223 having 16 negative logic output terminals (hereinafter referred to as output terminals (0) to (15), respectively). In this example, the oscillator circuit 221 generates a clock signal VCK with a frequency 16 times that of the frequencies of control signals A to D.

[0070] As shown in the figure, the logic circuit 224 of the example control signal generation circuit 22 includes a first AND gate 271 to which the values ​​of output terminals (1) to (6) of the decoder circuit 223 are input, a first NAND gate 281 to which the values ​​of output terminals (2) to (7) of the decoder circuit 223 are input, a second AND gate 272 to which the values ​​of output terminals (9) to (14) of the decoder circuit 223 are input, and a second NAND gate 282 to which the values ​​of output terminals (10) to (15) of the decoder circuit 223 are input.

[0071] The output of the first AND gate 271 is input to the optical coupler 112d as control signal D. The output of the first NAND gate 281 is input to the optical coupler 112a as control signal A. The output of the second AND gate 272 is input to the optical coupler 112c as control signal C. The output of the second NAND gate 282 is input to the optical coupler 112b as control signal B.

[0072] During the period when "0" is output to any of the output terminals (2) to (6) of the decoder circuit 223, "0" is input as control signal D to optical coupler 112d, "1" as control signal A to optical coupler 112a, "1" as control signal C to optical coupler 112c, and "0" as control signal B to optical coupler 112b. As a result, switch elements 111a and 111d are turned on, and switch elements 111b and 111c are turned off. Consequently, during this period, current flows through the primary circuit of the output transformer 120 in the direction of arrow (a) shown in Figure 2.

[0073] Meanwhile, during the period when "0" is output to any of the output terminals (10) to (14) of the decoder circuit 223, "1" is input as control signal D to optical coupler 112d, "0" as control signal A to optical coupler 112a, "0" as control signal C to optical coupler 112c, and "1" as control signal B to optical coupler 112b. As a result, switch elements 111a and 111d are turned off, and switch elements 111b and 111c are turned on. Consequently, during this period, current flows through the primary side circuit of the output transformer 120 in the direction of arrow (b) shown in Figure 2.

[0074] Note that the output terminal (1) of the decoder circuit 223 is connected to the input terminal of the first AND gate 271, but not to the input terminal of the first NAND gate 281. Therefore, during the period when "0" is output to the output terminal (1) of the decoder circuit 223, the control signal A becomes "0" and the switch element 111a turns off. On the other hand, the output terminal (15) of the decoder circuit 223 is connected to the input terminal of the second NAND gate 282, but not to the input terminal of the second AND gate 272. Therefore, during the period when "0" is output to the output terminal (15) of the decoder circuit 223, the control signal C becomes "1" and the switch element 111c turns off. As a result, if the response of the switch element 111c is slow, the switch element 111c can be reliably turned off before the switch element 111a turns on, and a through-current can be prevented from flowing due to the simultaneous turning on of switch elements 111a and 111c.

[0075] Furthermore, the output terminal (7) of the decoder circuit 223 is connected to the input terminal of the first NAND gate 281, but not to the input terminal of the first AND gate 271. Therefore, during the period when "0" is output to the output terminal (7) of the decoder circuit 223, the control signal D becomes "1" and the switch element 111d turns off. Also, the output terminal (9) of the decoder circuit 223 is connected to the input terminal of the second AND gate 272, but not to the input terminal of the second NAND gate 282. Therefore, during the period when "0" is output to the output terminal (9) of the decoder circuit 223, the control signal B becomes "0" and the switch element 111b turns off. As a result, if the response of the switch element 111d is slow, the switch element 111d can be reliably turned off before the switch element 111b turns on, preventing a through-current from flowing due to the simultaneous turning on of switch elements 111b and 111d.

[0076] In this way, by adjusting the connections between each output terminal (0) to (15) of the decoder circuit 223 and the logic elements of the logic circuit 224, the duration for which each of the switch elements 111a to 111d is turned on or off can be adjusted according to the respective characteristics of each switch element 111a to 111d, thereby preventing through-current from flowing.

[0077] [Control example] Figure 5 illustrates an example of control of the control signal generation circuit 22 by the main control circuit 21 of the low-voltage section 20 shown in Figure 1. The configuration and operation of the control signal generation circuit 22 (oscillator circuit 221, counter circuit 222, decoder circuit 223, and logic circuit 224) shown in this figure are the same as those described above, along with Figure 3.

[0078] The incision mode start switch (hereinafter referred to as "incision mode start SW") and the hemostasis mode start switch (hereinafter referred to as "hemostasis mode start SW") shown in the figure are elements of the user interface 23 of the low-voltage unit 20 shown in Figure 1. In addition, the output period adjustment counter 51, stop period adjustment counter 52, AND gate 53, and D-FF (flip-flop) circuit (hereinafter referred to as "D-FF 54") shown in the figure are all circuits that are attached to or externally connected to the control signal generation circuit 22.

[0079] As shown in the figure, the clock signal VCK output from the oscillator circuit 221 is input to the clock signal input terminal CK of the output period adjustment counter 51. The carry signal (a signal indicating that the count value has reached its maximum value; hereinafter referred to as the "maximum value signal") output from the maximum value signal output terminal CA of the counter circuit 222 is input to the enable input terminal EN of the output period adjustment counter 51. The signal indicating the status of the hemostasis mode start switch (hereinafter referred to as the "hemostasis mode start signal") is input to the start signal input terminal ST of the output period adjustment counter 51. The hemostasis mode start signal is "0" when the hemostasis mode start switch is ON, and "1" when the hemostasis mode start switch is OFF.

[0080] Furthermore, the output period adjustment counter 51 outputs a signal to the second input terminal of the AND gate 53 indicating that the current time is the output period for control signals A to D (hereinafter referred to as the "output period signal"). The output period adjustment counter 51 stores a value (hereinafter referred to as the "output period adjustment value") that has been set in advance by the operator. The output period adjustment counter 51 outputs a negative logic signal (hereinafter referred to as the "output period end signal") to the stop period adjustment counter 52 indicating that the output period for control signals A to D has ended. The output period end signal is "0" when the output period has ended and "1" when the output period has not ended.

[0081] In addition to the output period end signal mentioned above, the hemostasis mode start signal is input to the stop period adjustment counter 52. The stop period adjustment counter 52 inputs a signal (hereinafter referred to as the "stop period signal") to the decoder circuit 223 and the output period adjustment counter 51 that indicates that the current time is the stop period for control signals A to D. The stop period adjustment counter 52 stores the period (hereinafter referred to as the "stop period adjustment value") for which the operation of the decoder circuit 223 is stopped, which has been set in advance by the operator or other personnel.

[0082] A signal indicating the state of the cut-out mode start switch (hereinafter referred to as the "cut-out mode start signal") is input to the first input terminal of the AND gate 53. The cut-out mode start signal is "0" when the cut-out mode start switch is ON, and "1" when the cut-out mode start switch is OFF. The output of the AND gate 53 is input to the clear terminal CL of the negative logic input of the D-FF54.

[0083] The clock signal input terminal CK of the D-FF54 receives the clock signal VCK output from the oscillator circuit 221. The output of the signal output terminal Q of the D-FF54 is input to the start signal input terminal ST of the counter circuit 222. The maximum value signal output from the maximum value signal output terminal CA of the counter circuit 222 is input to the signal input terminal D of the D-FF54.

[0084] Next, the operation of the control signal generation circuit 22 shown in the figure will be explained. As a prerequisite, when both the incision mode start SW and the hemostasis mode start SW are off, "1" is input to the first input terminal of the AND gate 53. Also, the output period adjustment counter 51 is stopped, and "1" is input to the second input terminal of the AND gate 53 as a stop period signal. Therefore, "1" is input from the AND gate 53 to the clear terminal CL of the D-FF 54. Furthermore, the incision mode start SW and the hemostasis mode start SW are operated mutually exclusive.

[0085] First, when the dissection mode start switch is turned on, a "0" is input from the AND gate 53 to the clear terminal CL of the D-FF 54, which in turn outputs a "0" from the signal output terminal Q of the D-FF 54, causing the counter circuit 222 to start counting and the decoder circuit 223 to start operating.

[0086] Subsequently, when the count of the counter circuit 222 reaches its maximum value, the maximum value signal "1" is output from the maximum value signal output terminal CA of the counter circuit 222, and "1" is input to the signal input terminal D of the D-FF54 and the enable input terminal EN of the output period adjustment counter 51. As a result, the value of the signal output terminal Q of the D-FF54 becomes "1", the counter circuit 222 stops operating, and the decoder value stops at "0".

[0087] On the other hand, when "1" is input to the enable input terminal EN, the output period adjustment counter 51 starts counting, and "0" is input from the output period adjustment counter 51 to the second input terminal of the AND gate 53 as an output period signal, which in turn inputs "0" from the AND gate 53 to the clear terminal CL of the D-FF 54. As a result, while the dissection mode start SW is ON, the output of the signal output terminal Q of the D-FF 54 remains at "0".

[0088] On the other hand, when the hemostasis mode start switch is turned on, "0" is input as the hemostasis mode start signal to the start signal input terminal ST of the output period adjustment counter 51 and the start signal input terminal ST of the stop period adjustment counter 52, respectively.

[0089] When "0" is input as the hemostasis mode start signal, the output period adjustment counter 51 starts counting and outputs "0" as the output period signal. As a result, as described above, the output of the AND gate 53 becomes "0", the output of the signal output terminal Q of the D-FF 54 becomes "0", the counter circuit 222 starts counting and the decoder circuit 223 starts operating. On the other hand, the stop period adjustment counter 52 starts counting when "0" is input as the hemostasis mode start signal.

[0090] Subsequently, when the count value of the output period adjustment counter 51 reaches the output period adjustment value, it inputs "1" as an output period signal to the second input terminal of the AND gate 53 and inputs an output period end signal to the stop period adjustment counter 52.

[0091] When "1" is input to the second input terminal of the AND gate 53 as an output period signal, "1" is input from the AND gate 53 to the clear terminal CL of the D-FF 54. As a result, the value of the signal output terminal Q of the D-FF 54 becomes "1", the counter circuit 222 stops operating, and the decoder value stops at "0".

[0092] When the output period end signal is received, the stop period adjustment counter 52 starts inputting the stop period signal to the decoder circuit 223 and the output period adjustment counter 51. The stop period adjustment counter 52 continues to input the stop period signal to the decoder circuit 223 and the output period adjustment counter 51 for a period corresponding to a pre-stored stop period adjustment value. When the above period ends, the stop period adjustment counter 52 stops inputting the stop period signal to the decoder circuit 223 and the output period adjustment counter 51 and resumes counting. The above operations are repeated until the hemostasis mode start switch is turned off.

[0093] The output period adjustment value corresponds to the maximum number of cycles of the decoder circuit 223's output. Therefore, by adjusting the output period adjustment value, the period during which control signals A to D are output, that is, the period during which the high-frequency signal is continuously supplied to the treatment electrode 135, can be adjusted.

[0094] Furthermore, the stop period adjustment value corresponds to the period during which the operation of the decoder circuit 223 is stopped. Therefore, by adjusting the stop period adjustment value, it is possible to adjust the period during which the output of control signals A to D is stopped, that is, the period during which the supply of high-frequency signals to the therapeutic electrode 135 is stopped.

[0095] Figure 6 shows an example of a timing chart for various signals generated by the control signal generation circuit 22 using the mechanism described above.

[0096] [Technical effects, etc.] As described above, the electrosurgical apparatus of this embodiment includes a full-bridge circuit 110 having a first switch element (switch element 111a) and a third switch element (switch element 111c) connected in series with a drive power supply (boost boost unit 30), a second switch element (switch element 111b) and a fourth switch element (switch element 111d) connected in series with the drive power supply, a transformer (output transformer 120) in which one terminal of the primary side circuit is connected between the first switch element and the third switch element and the other terminal of the primary side circuit is connected between the second switch element and the fourth switch element, a control circuit (main control circuit 21, control signal generation circuit 22) that supplies power from the drive power supply to the primary side circuit by alternately controlling the on / off states of a first combination of the first switch element and the fourth switch and a second combination of the second switch element and the third element, and a therapeutic electrode 135 connected between one terminal and the other terminal of the secondary side circuit of the transformer.

[0097] Thus, since the electrosurgical device 1 controls the output transformer 120 that supplies power to the treatment electrode 135 using a full-bridge circuit 110, the effects of changes in load inductance can be reduced, and high-frequency signals can be transmitted to the treatment electrode 135 with high accuracy. As a result, an electrosurgical device 1 that operates accurately and stably with a simple configuration can be provided.

[0098] Furthermore, the first and second switching elements are constructed using N-channel field-effect transistors, and the third and fourth switching elements are constructed using P-channel field-effect transistors. The source of the first switching element, the source of the third switching element, and one terminal of the primary side circuit of the transformer are connected, and the source of the second switching element, the source of the fourth switching element, and the other terminal of the primary side circuit of the transformer are connected. The control circuit alternately switches the first and second combinations on and off by controlling the gate voltages of the first to fourth switching elements.

[0099] In this way, by configuring the high-side of the full-bridge circuit 110 using an N-channel field-effect transistor and the low-side using a P-channel field-effect transistor, both the high-side and low-side field-effect transistors can be controlled at low voltages, using the voltage applied to the primary side circuit of the transformer as the reference potential (intermediate potential), thereby simplifying the circuit and reducing manufacturing costs. Furthermore, when all first to fourth switch elements are temporarily turned off, such as when operating in hemostatic mode, power is not supplied to the therapeutic electrode 135 from the secondary side circuit of the transformer, and COMa and COMb become GND reference as shown in Figure 2, thus ensuring safety for the living body.

[0100] As mentioned above, the first and second switching elements are constructed using, for example, N-channel type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), while the third and fourth switching elements are constructed using, for example, P-channel type MOSFETs.

[0101] Furthermore, the electrosurgical apparatus 1 includes a control circuit (main control circuit 21, control signal generation circuit 22) and first to fourth optical couplers (optical couplers 112a to 112d) provided on each of the first to fourth switch elements and interposed between them and their respective gates. The control circuit controls the gate voltages of the first to fourth switch elements via the first to fourth optical couplers.

[0102] In this way, the control circuit (main control circuit 21, control signal generation circuit 22) controls the gate voltage of the first to fourth switching elements via the first to fourth optical couplers, thereby suppressing the impact of noise generated by the high-frequency switching of the first to fourth switching elements on the control circuit, preventing malfunctions and enabling the control circuit to function stably.

[0103] Furthermore, the electrosurgical apparatus 1 includes a first positive / negative power supply (second auxiliary power supply 43b) that supplies power to generate gate voltages to the first and third optical couplers, and a second positive / negative power supply (second auxiliary power supply 43b) that supplies power to generate gate voltages to the second and fourth optical couplers. The first optical coupler is supplied with the positive voltage of the first positive / negative power supply, the third optical coupler is supplied with the negative voltage of the first positive / negative power supply, the second optical coupler is supplied with the positive voltage of the second positive / negative power supply, and the fourth optical coupler is supplied with the negative voltage of the second positive / negative power supply. The common terminal of the first positive / negative power supply is connected to the source of the first switch element, the source of the third switch element, and one terminal of the primary side circuit of the transformer. The common terminal of the second positive / negative power supply is connected to the source of the second switch element, the source of the fourth switch element, and the other terminal of the primary side circuit of the transformer.

[0104] In this way, by supplying the driving power for the first to fourth optical couplers (driving power to generate the gate voltages for the first to fourth switching elements) using the first positive / negative power supply or the second positive / negative power supply connected as described above, the high-side and low-side field-effect transistors in the full-bridge circuit 110 can both be controlled at low voltages, thereby simplifying the circuit and reducing manufacturing costs.

[0105] Furthermore, since both the first and second positive / negative power supplies are configured using isolated DC / DC converters, the impact of noise generated in the first and second positive / negative power supplies on the control circuits can be suppressed, allowing the control circuits to function stably.

[0106] Furthermore, since the drive power supply (boost unit 30) is configured using an isolated DC / DC converter, the impact of noise generated in the drive power supply on the control circuit and other components can be suppressed (reduction of high-frequency leakage current, strengthening of insulation resistance, etc.), preventing malfunctions and allowing the control circuit to function stably.

[0107] Furthermore, the first and third switching elements may be packaged together as a dual-type device. Alternatively, the second and fourth switching elements may also be packaged together as a dual-type device. By doing so, it is possible to suppress the generation of through-current and realize an electrosurgical device 1 with less thermal drift and DC offset.

[0108] Furthermore, as shown in Figure 7, all or part of the first to fourth switching elements (switch elements 111a to 111d) may be configured by connecting multiple (two in the figure) switching devices (nMOS and pMOS in this example) in parallel. By doing so, the on-resistance of the first to fourth switching elements can be adjusted, the timing of the on-off control of the first to fourth switching elements can be synchronized with high precision, and the flow of through-current can be prevented more reliably. In addition, by lowering the on-resistance, the power supplied from the boost unit 30 can be efficiently supplied to the therapeutic electrode 135.

[0109] Furthermore, the control circuit includes, for example, an oscillator circuit 221 that generates a clock signal, a counter circuit 222 that counts the pulses of the clock signal, a decoder circuit 223 that has an output terminal of a predetermined number of bits and outputs a value decoded from the count value of the counter circuit to the output terminal, and a logic circuit 224 that generates control signals for turning each of the first to fourth switch elements on and off based on the output value of the output terminal of the decoder circuit.

[0110] Thus, the control circuit that generates control signals A to D can be composed of an oscillator circuit 221, a counter circuit 222, a decoder circuit 223, and a logic circuit 224. Furthermore, by adjusting the oscillation frequency of the oscillator circuit 221, the number of bits of the counter circuit 222, the number of output terminals of the decoder circuit 223, the configuration of the logic circuit 224, and the wiring to the output terminals of the decoder circuit 223, a variety of high-frequency signals can be generated, allowing for diverse control of the therapeutic electrode 135 according to the needs of the operator of the electrosurgical device 1 (for example, control of the cauterization depth).

[0111] Furthermore, if the frequency of the power (energy) supplied from the electrosurgical device 1 to the treatment electrode 135 is set to 4 MHz, and the counter circuit 222 is a 3-bit circuit, then the oscillation frequency of the oscillation circuit 221 should be set to 32 MHz, in which case the cauterization depth will be approximately 1.4 mm. Also, if the frequency of the above power is set to 1 MHz, and the counter circuit 222 is a 3-bit circuit, then the oscillation frequency of the oscillation circuit 221 should be set to 8 MHz, in which case the cauterization depth will be approximately 2.8 mm.

[0112] Furthermore, the logic circuit 224 generates control signals to prevent the first switch element 111a and the third switch element 111c from turning on simultaneously, and to prevent the second switch element 111b and the fourth switch element 111d from turning on simultaneously, thereby preventing through-current from flowing.

[0113] As described above, the electrosurgical apparatus 1 of this embodiment has various excellent features, enabling high voltage output voltage and high frequency drive output. Furthermore, the electrosurgical apparatus 1 can also be equipped with a CF-type applied part that requires a leakage current of 10 μA or less.

[0114] Furthermore, the above embodiments are provided to facilitate understanding of the present invention and are not intended to limit its interpretation. The present invention may be modified and improved without departing from its spirit, and equivalents thereof are also included. [Explanation of symbols]

[0115] 1 Electrosurgical unit, 10 High voltage section, 110 Full bridge circuit, 111a~111d Switching elements, 112a~112d Optical coupler, 120 Output transformer, 20 Low voltage section, 21 Main control circuit, 22 Control signal generation circuit, 23 User interface, 30 Boost section, 31 Boost control circuit, 32 Boost transformer, 33 Diode, 34 Capacitive element, 40 Power supply section, 41 Protection circuit, 42 Main power supply, 43a First sub-power supply, 43b Second sub-power supply, 135 Therapeutic electrode, 150 Bio-load

Claims

1. A first switch element and a third switch element are connected in series with the drive power supply, A second switch element and a fourth switch element are connected in series with the power supply, A transformer is provided, in which one terminal of the primary circuit is connected between the first and third switching elements, and the other terminal of the primary circuit is connected between the second and fourth switching elements. A control device that supplies power from the drive power supply to the primary side circuit by alternately controlling the on / off state of a first combination of the first switch element and the fourth switch element and a second combination of the second switch element and the third switch element, A full bridge circuit having, A therapeutic electrode is connected between one terminal and the other terminal of the secondary circuit of the transformer, Includes, The first and second switching elements are constructed using N-channel field-effect transistors. The third and fourth switching elements are constructed using P-channel type field-effect transistors. The source of the first switch element, the source of the third switch element, and one terminal of the primary side circuit of the transformer are connected. The source of the second switch element, the source of the fourth switch element, and the other terminal of the primary side circuit of the transformer are connected. The control device alternately switches the first combination and the second combination on and off by controlling the gate voltages of the first to fourth switch elements. Electrosurgical device.

2. The electrosurgical apparatus according to claim 1, The device comprises first to fourth optical couplers interposed between the control device and the gates of the first to fourth switching elements, The control device controls the gate voltages of the first to fourth switching elements via the first to fourth optical couplers. Electrosurgical device.

3. The electrosurgical apparatus according to claim 2, A first positive and negative power supply is provided to the first optical coupler and the third optical coupler, which supply power for generating the gate voltage. The second optical coupler and the fourth optical coupler are supplied with a second positive and negative power supply, which supplies power to generate the gate voltage. It has, The first optical coupler is supplied with the positive voltage of the first positive and negative power supply, and the third optical coupler is supplied with the negative voltage of the first positive and negative power supply. The second optical coupler is supplied with the positive voltage of the second positive and negative power supply, and the fourth optical coupler is supplied with the negative voltage of the second positive and negative power supply. The common terminal of the first positive and negative power supply is connected to the source of the first switch element, the source of the third switch element, and one of the terminals of the primary side circuit of the transformer. The common terminal of the second positive and negative power supply is connected to the source of the second switch element, the source of the fourth switch element, and the other terminal of the primary side circuit of the transformer. Electrosurgical device.

4. The electrosurgical apparatus according to claim 3, Both the first positive and negative power supply and the second positive and negative power supply are configured using isolated DC / DC converters. Electrosurgical device.

5. The electrosurgical apparatus according to claim 1, The aforementioned drive power supply is configured using an isolated DC / DC converter. Electrosurgical device.

6. The electrosurgical apparatus according to claim 1, The first and second switching elements are constructed using N-channel type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). The third and fourth switching elements are configured using P-channel type MOSFETs. Electrosurgical device.

7. The electrosurgical apparatus according to claim 6, The first and third switching elements are packaged together as a dual-type device. The second and fourth switching elements are packaged together as a dual-type device. Electrosurgical device.

8. The electrosurgical apparatus according to claim 1, The first and third switching elements are controlled to be switched on or off by the potential difference between their respective gates and sources. The second and fourth switching elements are controlled to be switched on or off by the potential difference between their respective gates and sources. Electrosurgical device.

9. The electrosurgical apparatus according to claim 1, The control device is An oscillator circuit that generates a clock signal, A counter circuit for counting the pulses of the aforementioned clock signal, A decoder circuit having an output terminal of a predetermined number of bits, which outputs a value decoded from the counter circuit to the output terminal, A logic circuit that generates control signals for turning each of the first to fourth switch elements on and off based on the output value of the output terminal of the decoder circuit, Electrosurgical devices, including those mentioned above.

10. The electrosurgical apparatus according to claim 9, The logic circuit generates the control signal such that the first switch element and the third switch element, or the second switch element and the fourth switch element, are not turned on simultaneously. Electrosurgical device.

11. The electrosurgical apparatus according to claim 9, All or part of the first to fourth switching elements have a configuration in which multiple switching elements are connected in parallel. Electrosurgical device.

12. The electrosurgical apparatus according to claim 9, The control device controls the frequency of the clock signal generated by the oscillation circuit. Electrosurgical device.

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