Semiconductor manufacturing equipment and method for manufacturing semiconductor devices

Abstract

The objective is to provide a technology that can reduce inductance with respect to the current during testing. [Solution] The semiconductor manufacturing apparatus comprises a stage on which a semiconductor device is placed, a support base positioned above the stage and including a first substrate, and an inspection jig that can be positioned between the stage and the support base. An upper conductive pattern is provided on the upper surface of the first substrate, electrically connected to a lower portion which is a part of the lower surface of the first substrate, and a lower conductive pattern is provided on the lower surface of the first substrate other than the lower portion along the upper conductive pattern.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor manufacturing apparatus and a method for manufacturing a semiconductor device.

Background Art

[0002] In recent years, various technologies have been proposed for semiconductor manufacturing apparatuses that measure the electrical characteristics of semiconductor devices such as semiconductor chips. For example, Patent Document 1 proposes using pogo pins to measure the electrical characteristics of semiconductor devices.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the prior art, the conductive patterns for the forward path and the return path for flowing current through the semiconductor device are provided on the same surface of the same substrate. With such a configuration, there is a problem that the loop area of the current used for measuring the electrical characteristics becomes large due to the conductive patterns of the forward path and the return path provided on the substrate, resulting in an increase in inductance.

[0005] Therefore, the present disclosure has been made in view of the above problems, and an object thereof is to provide a technology capable of reducing inductance with respect to the current during testing.

Means for Solving the Problems

[0006] The semiconductor manufacturing apparatus according to this disclosure comprises a stage on which a semiconductor device is placed, a support base disposed above the stage and including a first substrate, and an inspection jig that can be disposed between the stage and the support base, wherein the upper surface of the first substrate is provided with an upper conductive pattern electrically connected to a lower portion which is a part of the lower surface of the first substrate, and a lower conductive pattern is provided along the upper conductive pattern on the lower surface of the first substrate other than the lower portion, and the inspection jig comprises a current-carrying needle electrically connectable to the semiconductor device, a second substrate provided above the current-carrying needle and including a lower part electrically connected to the current-carrying needle and an upper part electrically connected to the lower part, and the lower part of the second substrate covers the upper part of the current-carrying needle and the current-carrying needle is connected to the second base The support stand or inspection jig includes an insulating plate member electrically connectable to the lower part of the plate, and the support stand or inspection jig includes a pogo pin block having pogo pins electrically connected to either the lower conductive pattern of the first substrate or the upper part of the second substrate and movable toward and toward the other, and the support stand or inspection jig includes a conductive member that can be positioned along the energizing needle and electrically connects the stage to the lower portion of the first substrate, and further includes a tester electrically connected to the lower conductive pattern and the upper conductive pattern, and a transport unit that transports the inspection jig toward the support stand, thereby electrically connecting the energizing needle to the lower conductive pattern via the second substrate and the pogo pin block. [Effects of the Invention]

[0007] According to this disclosure, an upper conductive pattern is provided on the upper surface of the first substrate, electrically connected to the lower surface portion, and a lower conductive pattern is provided on the lower surface of the first substrate, excluding the lower surface portion, along the upper conductive pattern. With this configuration, the inductance can be reduced with respect to the current during testing. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is a side cross-sectional view showing the configuration of a semiconductor manufacturing apparatus according to Embodiment 1. [Figure 2]Figure 2 is a front cross-sectional view showing the configuration of a semiconductor manufacturing apparatus according to Embodiment 1. [Figure 3] Figure 3 is a side cross-sectional view showing the state of the semiconductor manufacturing apparatus according to Embodiment 1 during electrical characteristic measurement. [Figure 4] Figure 4 is a side view showing the configuration of a pogo pin block according to Embodiment 1. [Figure 5] Figure 5 is a cross-sectional view showing the configuration of a pogo pin block according to Embodiment 1. [Figure 6] Figure 6 is a cross-sectional view showing the configuration of a pogo pin block according to Embodiment 1. [Figure 7] Figures 7(a) and 7(b) are a front view and a side view showing the configuration of the double-ended probe according to Embodiment 1. [Figure 8] Figure 8 is a plan view showing the configuration of a semiconductor manufacturing apparatus according to Embodiment 1. [Figure 9] Figure 9 is a side cross-sectional view showing the configuration of a semiconductor manufacturing apparatus according to Embodiment 2. [Figure 10] Figure 10 is a front cross-sectional view showing the configuration of a semiconductor manufacturing apparatus according to Embodiment 2. [Figure 11] Figure 11 is a side cross-sectional view showing the state of the semiconductor manufacturing apparatus according to Embodiment 2 during electrical characteristic measurement. [Figure 12] Figure 12 is a plan view showing the configuration of the inspection jig according to Embodiment 2. [Figure 13] Figure 13 is a plan view showing the configuration of the inspection jig according to Embodiment 3. [Figure 14] Figure 14 is a cross-sectional view showing the configuration of the inspection jig according to Embodiment 3. [Figure 15] Figure 15 is a side cross-sectional view showing the configuration of a semiconductor manufacturing apparatus according to Embodiment 4. [Figure 16] Figure 16 is a front cross-sectional view showing the configuration of a semiconductor manufacturing apparatus according to Embodiment 4. [Figure 17] Figure 17 is a side cross-sectional view showing the state of the semiconductor manufacturing apparatus according to Embodiment 4 during electrical characteristic measurement. [Figure 18]FIG. 18 is a plan view showing the configuration of the inspection jig according to Embodiment 4. [Figure 19] FIG. 19 is a side cross-sectional view showing the configuration of the semiconductor manufacturing apparatus according to Embodiment 5. [Figure 20] FIG. 20 is a front cross-sectional view showing the configuration of the semiconductor manufacturing apparatus according to Embodiment 5. [Figure 21] FIG. 21 is a side cross-sectional view showing the state during electrical characteristic measurement of the semiconductor manufacturing apparatus according to Embodiment 5. [Figure 22] FIG. 22 is a plan view showing the configuration of the semiconductor manufacturing apparatus according to Embodiment 5. [Figure 23] FIG. 23 is a side cross-sectional view showing the configuration of the semiconductor manufacturing apparatus according to Embodiment 6. [Figure 24] FIG. 24 is a front cross-sectional view showing the configuration of the semiconductor manufacturing apparatus according to Embodiment 6. [Figure 25] FIG. 25 is a side cross-sectional view showing the state during electrical characteristic measurement of the semiconductor manufacturing apparatus according to Embodiment 6. [Figure 26] FIG. 26 is a plan view showing the configuration of the semiconductor manufacturing apparatus according to Embodiment 6. [Figure 27] FIG. 27 is a flowchart showing a method for manufacturing a semiconductor device according to Embodiment 7.

Embodiments for Carrying Out the Invention

[0009] Hereinafter, embodiments will be described with reference to the accompanying drawings. The features described in the following embodiments are examples, and not all features are necessarily essential. Also, in the following descriptions, the same or similar reference numerals are given to the same components in multiple embodiments, and different components will be mainly described. Further, in the descriptions given below, specific positions and directions such as "above", "below", "left", "right", "front" or "back" do not necessarily have to match the actual positions and directions during implementation.

[0010] <Embodiment 1> Figures 1 and 2 are a side cross-sectional view and a front cross-sectional view showing the configuration of the semiconductor manufacturing apparatus according to this first embodiment. The semiconductor manufacturing apparatus according to this first embodiment is configured to measure the electrical characteristics of the semiconductor device 8.

[0011] The semiconductor device 8 is a semiconductor chip that includes, for example, a vertical power semiconductor element. The semiconductor device 8 may be made of ordinary silicon (Si), or it may be made of a wide-bandgap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond. When the semiconductor device 8 is made of a wide-bandgap semiconductor, stable operation at high temperatures and high voltages, and faster switching speeds become possible for the semiconductor device 8. The semiconductor device 8 includes, for example, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), RC-IGBTs (Reverse Conducting - IGBTs), SBDs (Schottky Barrier Diodes), and PNDs (PN junction diodes).

[0012] The semiconductor manufacturing apparatus shown in Figure 1 comprises, as its main components, a tester 1, a transport arm 9 which is a transport unit, a stage 10, a support base 16, and an inspection jig 28. A semiconductor device 8 is placed on the stage 10. The support base 16 is positioned above the stage 10, and the inspection jig 28 can be positioned between the stage 10 and the support base 16, for example, by the transport arm 9.

[0013] Figure 3 is a side cross-sectional view showing the state of the semiconductor manufacturing apparatus according to this embodiment 1 when measuring the electrical characteristics of a semiconductor device 8. As will be described in detail later, the tester 1 is electrically connected to the support base 16 by the transport arm 9, and the semiconductor device 8 is electrically connected to the tester 1, so that the tester 1 can measure the electrical characteristics of the semiconductor device 8. Next, the components of the semiconductor manufacturing apparatus according to this embodiment 1 will be described in detail.

[0014] <Support stand 16> The support base 16 is fixed to the main body (not shown) of the semiconductor manufacturing apparatus and is generally made of a resin such as PEEK (PolyEtherEtherKetone). The support base 16 includes a first substrate 2 parallel to the stage 10. The first substrate 2 is provided with first and second through-holes extending in the vertical direction, and conductive members are provided in each of the first and second through-holes.

[0015] As shown in Figure 1, an upper conductive pattern 24 is provided on the upper surface of the first substrate 2. The upper conductive pattern 24 is electrically connected to a lower portion 24a, which is part of the lower surface of the first substrate 2, by conductive members of the first through-holes. The small signal pattern 25 is electrically connected to a lower portion 25a, which is another part of the lower surface of the first substrate 2, by conductive members of the second through-holes. The lower portion 24a is the first lower portion, and the lower portion 25a is the second lower portion. In Figure 1, the left and right portions of the upper conductive pattern 24 are separated by the small signal pattern 25, but in cross-sections other than those shown in Figure 1, the left and right portions are connected to each other.

[0016] A bottom conductive pattern 23 is provided on the bottom surface of the first substrate 2, excluding the bottom portions 24a and 25a. The bottom conductive pattern 23 is provided along the top conductive pattern 24 and overlaps the top conductive pattern 24 in a plan view. The bottom conductive pattern 23, top conductive pattern 24, and small signal pattern 25 described above are electrically connected to the tester 1 by conductors.

[0017] In this embodiment 1, the small signal pattern 25 is electrically connected to the lower surface portion 25a of the first substrate 2 by through-holes, similar to the upper conductive pattern 24. However, it is not limited to this configuration, and may be provided on the lower surface of the first substrate 2, similar to the lower conductive pattern 23. In this case, the small signal pattern 25 is included in the concept of the lower conductive pattern 23.

[0018] <Inspection jig 28> The inspection jig 28 includes a second substrate 3, a pogo pin block 4, a conductive member 5, a current-carrying needle 6, a first insulating plate member 13 which is an insulating plate member, a support column 14, and a second insulating plate member 18.

[0019] The conductive needle 6 can be electrically connected to the semiconductor device 8 as shown in Figure 3. The conductive needle 6 may be, for example, a pogo pin, wire probe, or measuring needle that is conductive and expandable by buckling or elastic deformation, but is not limited to these. The conductive needle 6 may be surface-treated, such as gold plating.

[0020] The second circuit board 3 is located above the energizing needle 6, and the lower part of the second circuit board 3 is electrically connected to the energizing needle 6.

[0021] The first insulating plate member 13 covers the upper part of the current-carrying needle 6 on the underside of the second substrate 3. The first insulating plate member 13 insulates the current-carrying needles 6 from each other, but is configured to allow the current-carrying needles 6 to be electrically connected to the lower part of the second substrate 3. For example, the first insulating plate member 13 may hold the upper part of the current-carrying needle 6 with the upper part of the current-carrying needle 6 directly connected to the lower part of the second substrate 3, or it may have a conductive member (not shown) that electrically connects the upper part of the current-carrying needle 6 to the lower part of the second substrate 3.

[0022] Below the first insulating plate member 13, a support column 14 is provided to support the second insulating plate member 18, and the second insulating plate member 18 is penetrated by an energizing needle 6. If the first insulating plate member 13 is provided with pogo pins similar to those of the pogo pin block 4 described later, the inspection jig 28 does not need to include the support column 14 and the second insulating plate member 18.

[0023] The second substrate 3 includes a lower portion electrically connected to the energizing needle 6 and an upper portion electrically connected to the lower portion. In this embodiment 1, the second substrate 3 includes a lower conductive pattern which is the lower part of the second substrate 3, an upper conductive pattern which is the upper part of the second substrate 3, and a conductive member provided in a through-hole extending vertically in the second substrate 3. This conductive member electrically connects the lower conductive pattern to the upper conductive pattern. As described above, since the lower conductive pattern which is the lower part of the second substrate 3 is electrically connected to the energizing needle 6, the upper conductive pattern of the second substrate 3 is electrically connected to the energizing needle 6 via the lower conductive pattern. In this embodiment 1, the through-hole of the second substrate 3 is provided in a position facing the lower conductive pattern 23 and the lower portion 25a.

[0024] The pogo pin block 4 has pogo pins with double-ended probes 26, some of which are electrically connected to the upper conductive pattern of the second substrate 3 and can move in and out of contact with the lower conductive pattern 23 of the first substrate 2. Figure 4 is a side view showing the configuration of the pogo pin block 4, Figure 5 is a cross-sectional view along line AA of Figure 4, and Figure 6 is a cross-sectional view along line BB of Figure 5.

[0025] As shown in Figures 4 to 6, the pogo pin block 4 has two-ended probes 26 which are pogo pins, and a plate-shaped body 30. The body 30 according to this embodiment 1 includes two plate members as shown in Figures 4 and 6. The body 30 of the pogo pin block 4 may be made of a resin such as PEEK, or, if the test is performed at a high temperature such as 200°C, it may be made of a heat-resistant engineering plastic.

[0026] Figures 7(a) and 7(b) are a front view and a side view showing the configuration of the double-ended probe 26. The double-ended probe 26 includes plate members 26a and 26b and a spring 26c. As shown in Figure 7(a), plate member 26a has a first end with an R-shape on the upper side and a second end with a recess on the lower side, and as shown in Figure 7(b), plate member 26b has a first end with an R-shape on the lower side and a second end with a recess on the upper side. The second ends of plate members 26a and 26b are crossed such that the second end of one plate member 26a and 26b is located in the recess of the other plate member 26a and 26b. In this state, the second ends of plate members 26a and 26b are wound together by the spring 26c.

[0027] As shown in Figures 5 and 6, the end probes 26 are loosely fitted into holes in the main body 30 of the pogo pin block 4. Since the plate members 26a and 26b intersect, in Figure 5, the end probes 26 have a roughly cross shape. Both ends of the end probes 26 configured in this way are elastically expandable and contractible under load, and when there is no load, they protrude from both sides of the main body 30 of the pogo pin block 4 as shown in Figures 4 and 6. In the examples in Figures 1 to 3, the lower ends of the end probes 26 are receiving a load from the second substrate 3, so only the upper ends of the end probes 26 protrude from the main body 30 of the pogo pin block 4.

[0028] As described above, some of the double-ended probes 26 are electrically connected to the upper conductive pattern of the second substrate 3, and the upper conductive pattern of the second substrate 3 is electrically connected to the energizing needle 6. Therefore, some of the double-ended probes 26 are electrically connected to the energizing needle 6.

[0029] In the above description, both ends of the double-ended probe 26 are configured to be elastically expandable and contractible in response to a load, but this is not the only configuration. For example, only one end of the double-ended probe 26 (the upper end in Figures 1 to 3) may be configured to be elastically expandable and contractible in response to a load. Also, in Figures 7(a) and 7(b), the first ends of the plate members 26a and 26b have an R shape, but this is not the only configuration. For example, they may have a V shape, or some of the first ends may have an R shape and the remaining first ends may have a V shape.

[0030] The conductive member 5 in Figure 1 extends in the vertical direction and can be positioned along the energizing needle 6. In this embodiment 1, the conductive member 5 is connected to the double-ended probes 26, which are not electrically connected to the upper conductive pattern of the second substrate 3, and is supported by the double-ended probes 26. As will be described later, the conductive member 5 can electrically connect the conductive elastic member 7 of the stage 10, which will be described later, to the lower surface portion 24a of the first substrate 2 via the double-ended probes 26.

[0031] The conductive member 5 may be, for example, a leaf spring, a pogo pin, or a wire probe that is conductive and expandable by buckling or elastic deformation, but is not limited to these. The conductive member 5 may be made of copper, and the conductive member 5 may be subjected to a surface treatment such as gold plating.

[0032] The configuration of the inspection jig 28 has been described above, but it is not limited to that. For example, the position of the conductive needle 6 may be changed to match the various positions of electrode pads (not shown) provided on the upper side of various semiconductor devices 8, or the second substrate 3 may be replaceable so that the conductive pattern of the second substrate 3 can be changed. With such a configuration, the electrical characteristics of various semiconductor devices 8 with different electrode pad positions and shapes can be measured without changing the arrangement pattern of the double-ended probes 26. As a result, a reduction in the cost of the inspection jig 28 for measuring the electrical characteristics of various semiconductor devices 8 can be expected.

[0033] <Transport arm 9> Although not shown in the figures, the semiconductor manufacturing apparatus according to this embodiment 1 is equipped with a plurality of inspection jigs 28, and the transport arm 9 supports one of the plurality of inspection jigs 28 that is suitable for measuring the electrical characteristics of the semiconductor device 8. In this case, the position of the one inspection jig 28 relative to the transport arm 9 is performed by the pins 12 of the transport arm 9.

[0034] The transport arm 9 supports one inspection jig 28, then moves horizontally (for example, in the Y direction) to position the inspection jig 28 between the stage 10 and the support base 16. In Figures 1 and 2, the inspection jig 28 and the transport arm 9 are shown separated for convenience, but in reality, the inspection jig 28 is supported by the transport arm 9.

[0035] Figure 8 is a plan view showing the positional relationship between the first substrate 2, the transport arm 9, and the inspection jig 28 when the inspection jig 28 is positioned between the stage 10 and the support base 16 in this embodiment 1. In Figure 8, it is shown that the lower conductive pattern 23 overlaps the upper conductive pattern 24. In the example of Figure 8, it is also shown that the transport arm 9 supports both ends of the inspection jig 28 in the X direction.

[0036] After the inspection jig 28 is positioned between the stage 10 and the support base 16, the transport arm 9 moves upward (Z direction in Figure 1) to transport the inspection jig 28 toward the support base 16. The pins 12 provided on the surface of the pogo pin block 4 engage with the holes in the support base 16, thereby aligning the end probes 26 with the conductive pattern 23 on the lower surface of the first substrate 2, and the lower surface portions 24a and 25a.

[0037] As the inspection jig 28 is transported toward the support base 16, the double-ended probes 26, which are electrically connected to the energizing needle 6, are electrically connected to the conductive pattern 23 on the lower surface of the first substrate 2. As a result, the energizing needle 6 is electrically connected to the conductive pattern 23 on the lower surface via the second substrate 3 and the pogo pin block 4. In the example shown in Figure 3, the transport causes the first substrate 2 and the pogo pin block 4 to come into surface contact, and the protruding upper ends of the double-ended probes 26 are pushed against the surface of the main body 30 of the pogo pin block 4. The pushed-in upper ends of the double-ended probes 26 press against the conductive pattern 23 on the lower surface by elastic restoring force, thereby reducing the contact resistance between the upper ends of the double-ended probes 26 and the conductive pattern 23 on the lower surface, and a good connection can be obtained between the double-ended probes 26 and the conductive pattern 23 on the lower surface.

[0038] Furthermore, as the inspection jig 28 is transported toward the support base 16, the double-ended probes 26, which are electrically connected to the conductive member 5, are electrically connected to the lower surface portion 24a of the first substrate 2. As a result, the conductive member 5 is electrically connected to the upper conductive pattern 24 via the pogo pin block 4 and the lower surface portion 24a. The elastic restoring force of the double-ended probes 26 ensures a good connection between the double-ended probes 26 and the lower surface portion 24a.

[0039] Furthermore, as the inspection jig 28 is transported toward the support base 16, another double-ended probe 26, which is electrically connected to the energizing needle 6, is electrically connected to the lower surface portion 25a of the first substrate 2. As a result, the energizing needle 6 is electrically connected to the small signal pattern 25 via the second substrate 3, the pogo pin block 4, and the lower surface portion 25a. The elastic restoring force of the double-ended probes 26 ensures a good connection between the double-ended probes 26 and the lower surface portion 25a.

[0040] On the other hand, regardless of whether the inspection jig 28 is transported toward the support base 16 or not, several end probes 26 are electrically connected to the upper conductive pattern of the second substrate 3. Also, regardless of whether the inspection jig 28 is transported toward the support base 16 or not, the conductive member 5 is positioned along the energizing needle 6.

[0041] <Stage 10> Stage 10 includes a conductive elastic member 7 provided outside the mounting area of ​​the semiconductor device 8. The conductive elastic member 7 is electrically connected to the lower electrode (not shown) of the semiconductor device 8 mounted on Stage 10 via the main body of Stage 10.

[0042] The semiconductor manufacturing apparatus according to this first embodiment uses an image recognition device (not shown) to recognize the upper electrode pads of the semiconductor device 8, the pins 12, and the holes (not shown) of the support base 16, and corrects the misalignment between the electrode pads and the energizing needles 6. Subsequently, as the stage 10 moves toward the inspection jig 28, the energizing needles 6 are electrically connected to the electrode pads of the semiconductor device 8, and the conductive member 5 is electrically connected to the conductive elastic member 7 of the stage 10, as shown in Figure 3. At this time, the conductive elastic member 7 is pressed against the conductive member 5 and undergoes elastic deformation.

[0043] <Tester 1> Tester 1 is electrically connected to the lower conductive pattern 23 and the upper conductive pattern 24. In Figure 3, as shown by the dotted arrow, Tester 1 is electrically connected to the lower electrodes of the semiconductor device 8 via the upper conductive pattern 24 and the conductive member 5, and is electrically connected to the upper electrode pads of the semiconductor device 8 via the lower conductive pattern 23 and the current-carrying needle 6, etc. For example, the upper electrode pads of the semiconductor device 8 correspond to the emitter pad and the small-signal pad, and the lower electrodes of the semiconductor device 8 correspond to the collector. Through these electrical connections, Tester 1 is able to measure the electrical characteristics of the semiconductor device 8.

[0044] <Summary of Embodiment 1> In the semiconductor manufacturing apparatus according to this embodiment 1 described above, the upper conductive pattern 24, which is the forward path of the current during testing to measure the electrical characteristics of the semiconductor device 8, and the lower conductive pattern 23, which is the return path, are provided on the upper and lower surfaces of the first substrate 2, respectively, along each other. With this configuration, the current loop area can be reduced. In addition, since the pogo pin block 4, the second substrate 3, the first insulating plate member 13, and the current-carrying needle 6 are provided in this order in the vertical direction, the current path can be shortened. Furthermore, since the conductive member 5 is provided along this stacked structure, the current loop area can be reduced. As a result, the inductance can be reduced with respect to the current during testing, and therefore surge voltage during testing can be suppressed.

[0045] <Embodiment 2> Figures 9 and 10 are side and front cross-sectional views showing the configuration of the semiconductor manufacturing apparatus according to this second embodiment, and Figure 11 is a side cross-sectional view showing the state when the semiconductor manufacturing apparatus according to this second embodiment measures the electrical characteristics of the semiconductor device 8. Figure 12 is a plan view showing the configuration of the inspection jig 28 according to this second embodiment.

[0046] In Embodiment 1, the inspection jig 28 included the pogo pin block 4, but in Embodiment 2, the support base 16 includes the pogo pin block 4. In Embodiment 2, several end probes 26 are electrically connected to the underside conductive pattern 23 of the first substrate 2 and are capable of moving in and out of contact with the upper conductive pattern of the second substrate 3. In other words, regardless of whether the inspection jig 28 is transported toward the support base 16 or not, the end probes 26 of the pogo pin block 4 are electrically connected to the underside conductive pattern 23 of the first substrate 2. On the other hand, as the inspection jig 28 is transported toward the support base 16, the end probes 26 of the pogo pin block 4 are electrically connected to the upper conductive pattern of the second substrate 3.

[0047] Similarly, another double-ended probe 26 is electrically connected to the lower surface portions 24a and 25a of the first substrate 2 and is capable of making contact with and separating from the upper conductive pattern of the second substrate 3. The first insulating plate member 13 is configured to allow the conductive member 5 to be electrically connected to the lower conductive pattern of the second substrate 3. As a result, when the inspection jig 28 is transported toward the support base 16, the conductive member 5 is electrically connected to the lower surface portion 24a via the double-ended probes 26.

[0048] As described above, with the pogo pin block 4 fixed to the support base 16, the pogo pin block 4 can be omitted from the inspection jig 28, thereby reducing the cost of the inspection jig 28.

[0049] In this second embodiment, the support base 16 is provided with an insulating restricting portion 17 that protrudes downward. When the inspection jig 28 is connected to the support base 16 by the transport arm 9, the pogo pin block 4 (i.e., the main body 30), other than the probes 26 at both ends, does not come into contact with the second substrate 3, but the restricting portion 17 comes into contact with the first insulating plate member 13. In this way, when the energizing needle 6 is electrically connected to the lower conductive pattern 23, the restricting portion 17 prevents contact between the main body 30 of the pogo pin block 4 and the second substrate 3, forming a gap between them of, for example, several tens of micrometers to several hundred micrometers.

[0050] This gap allows for the suppression of the effect of any steps on the upper surface of the second substrate 3, while the elastic extension and retraction of the tips of the end probes 26 ensures electrical connection between the end probes 26 and the upper conductive pattern of the second substrate 3. Furthermore, even if the parallelism between the pogo pin block 4 and the second substrate 3 is somewhat poor, electrical connection between the end probes 26 and the upper conductive pattern of the second substrate 3 can still be ensured. Additionally, the restricting portion 17 is expected to ensure that the inspection jig 28 is parallel to the support base 16, and as a result, the lower part of the current-carrying needle 6 is expected not to tilt and detach from the electrode pad of the semiconductor device 8.

[0051] <Embodiment 3> Figure 13 is a plan view showing the configuration of the inspection jig 28 according to this third embodiment, and Figure 14 is a front cross-sectional view showing the same configuration, which is a cross-sectional view along the CC line in Figure 13. In this third embodiment, the inspection jig 28 includes a plurality of conductive members 5 (two in the example of Figures 13 and 14). Each conductive member 5 is provided between the support columns 14.

[0052] Furthermore, if the upper electrode pad of the semiconductor device 8 corresponds to the emitter pad and the lower electrode of the semiconductor device 8 corresponds to the collector, it is preferable that the conductive member 5 be brought close enough to the current-carrying needle 6 that discharge does not occur due to the potential difference between the emitter and the collector. The discharge resistance between the conductive member 5 and the current-carrying needle 6 may be increased by providing the conductive member 5 with a material such as polyimide tape, which has higher insulating properties than air.

[0053] Generally, the collector current flowing through the conductive member 5 flows in the opposite direction to the emitter current flowing through the energizing needle 6, resulting in the effect of canceling out each other's magnetic fields. This effect can be obtained to some extent in embodiments 1 and 2, but in embodiment 3, where the inspection jig 28 includes multiple conductive members 5, this effect can be enhanced. As a result, the inductance can be reduced with respect to the current during testing, and thus surge voltages during testing can be suppressed.

[0054] <Embodiment 4> Figures 15 and 16 are side and front cross-sectional views showing the configuration of the semiconductor manufacturing apparatus according to this embodiment 4, and Figure 17 is a side cross-sectional view showing the state when the semiconductor manufacturing apparatus according to this embodiment 4 measures the electrical characteristics of the semiconductor device 8. Figure 18 is a plan view showing the configuration of the inspection jig 28 according to this embodiment 4.

[0055] In this embodiment 4, as shown in Figure 18, in a plan view, one or more conductive members 5 surround a plurality of current-carrying needles 6 that are electrically connected to the semiconductor device 8, and are used in place of the support column 14. A portion of the second insulating plate member 18 (the left portion in Figure 18) is missing, and as shown in Figure 17, the conductive member 5 can come into contact with the conductive elastic member 7 at the missing portion of the second insulating plate member 18.

[0056] As described above, with a configuration in which one or more conductive members 5 surround multiple current-carrying needles 6, the collector current flowing through the conductive member 5 flows in the opposite direction to the emitter current flowing through the current-carrying needles 6, thereby enhancing the effect of canceling out each other's magnetic fields. As a result, the inductance can be reduced with respect to the current during testing, and thus surge voltages during testing can be suppressed.

[0057] <Embodiment 5> Figures 19 and 20 are side and front cross-sectional views showing the configuration of the semiconductor manufacturing apparatus according to this embodiment 5, and Figure 21 is a side cross-sectional view showing the state when the semiconductor manufacturing apparatus according to this embodiment 5 measures the electrical characteristics of the semiconductor device 8. Figure 22 is a plan view showing the positional relationship between the first substrate 2, the transport arm 9, and the inspection jig 28 when the inspection jig 28 is placed between the stage 10 and the support base 16 in this embodiment 5.

[0058] In the semiconductor manufacturing apparatus described so far, the inspection jig 28 included the conductive member 5, but in this embodiment 5, as shown in Figure 20, the support base 16 includes the conductive member 5. In other words, the conductive member 5 is electrically connected to the lower surface portion 24a of the first substrate 2 regardless of whether the inspection jig 28 is transported toward the support base 16 or not. On the other hand, as the inspection jig 28 is transported toward the support base 16, the conductive member 5 is positioned along the energizing needle 6. The first insulating plate member 13 is provided with a through hole through which the conductive member 5 is inserted.

[0059] As described above, with the conductive member 5 fixed to the support base 16, the conductive member 5 can be omitted from the inspection jig 28, thereby reducing the cost of the inspection jig 28.

[0060] <Embodiment 6> Figures 23 and 24 are side and front cross-sectional views showing the configuration of the semiconductor manufacturing apparatus according to this embodiment 6, and Figure 25 is a cross-sectional view showing the state when the semiconductor manufacturing apparatus according to this embodiment 6 measures the electrical characteristics of the semiconductor device 8. Figure 26 is a plan view showing the positional relationship between the first substrate 2, the transport arm 9, and the inspection jig 28 when the inspection jig 28 is placed between the stage 10 and the support base 16 in this embodiment 6.

[0061] In the semiconductor manufacturing apparatus described so far, the second substrate 3 included a lower conductive pattern and an upper conductive pattern that were electrically connected to each other by through-hole conductive members. In contrast, in this embodiment 6, the second substrate 3 instead includes a conductor 21, a terminal 22, a terminal block 27, and a conductive member 29, and the first insulating plate member 13 includes a protrusion 20.

[0062] The protrusion 20 of the first insulating plate member 13 protrudes from the upper surface of the first insulating plate member 13 and is electrically connected to the energizing needle 6. The terminal block 27 of the second circuit board 3 is the upper surface of the second circuit board 3. The terminal 22 is provided on the terminal block 27 and is electrically connected to the protrusion 20 by a conductor 21.

[0063] By increasing the size of the protrusion 20, multiple conductors 21 may be electrically connected to a single protrusion 20. The length of the conductors 21 is set considering the wiring work. The conductors 21 are housed in a cavity provided in the second substrate 3 by counterboring. The terminal block 27 is positioned to cover the cavity, then positioned with pins (not shown), and fixed to the main body of the second substrate 3 with screws or the like.

[0064] With the above configuration, the terminal 22 of the second substrate 3 is electrically connected to the energizing needle 6 via the conductor 21 and the protrusion 20. The conductive member 29 is also configured to be electrically connectable to the energizing needle 6. As the inspection jig 28 is transported toward the support base 16, the terminal 22 of the second substrate 3 is electrically connected to the small signal pattern 25 via the lower surface portion 25a, and the conductive member 29 is electrically connected to the lower conductive pattern 23. In other words, the second substrate 3 includes a conductive member 29 that can be electrically connected to the lower conductive pattern 23. With this configuration, the energizing needle 6 can be electrically connected to the small signal pattern 25 or to the lower conductive pattern 23, similar to the semiconductor manufacturing equipment described above.

[0065] Furthermore, the positions of the current-carrying needle 6 and the protrusion 20 may be changed to match the various positions of the electrode pads (not shown) provided on the upper side of various semiconductor devices 8, and the connection pattern of the conductor 21 connecting the protrusion 20 and the terminal 22 may also be changed. With such a configuration, the electrical characteristics of various semiconductor devices 8 with different electrode pad positions and shapes can be measured without changing the arrangement pattern of the double-ended probes 26 or replacing the second substrate 3. As a result, a reduction in the cost of the inspection jig 28 for measuring the electrical characteristics of various semiconductor devices 8 can be expected.

[0066] Furthermore, this embodiment 6 is also applicable to embodiments 1 to 5. For example, when this embodiment 6 is applied to embodiment 2, the restricting portion 17 prevents contact between the main body 30 of the pogo pin block 4 and the second substrate 3, forming a gap of, for example, several tens of micrometers to several hundred micrometers between them, thus achieving the same effect as in embodiment 2.

[0067] <Embodiment 7> Figure 27 is a flowchart showing a method for manufacturing a semiconductor device according to Embodiment 7. This manufacturing method is performed using the semiconductor manufacturing apparatus according to Embodiments 1 to 6.

[0068] In step S1, the transport arm 9 supports one of the multiple inspection jigs 28 that is suitable for measuring the electrical characteristics of the semiconductor device 8. At this time, the pins 12 of the transport arm 9 position the inspection jig 28 relative to the transport arm 9. In step S2, the semiconductor manufacturing apparatus recognizes the inspection jig 28 by reading a two-dimensional barcode (not shown) or the like on the inspection jig 28 supported by the transport arm 9.

[0069] In step S3, the semiconductor manufacturing equipment determines whether the recognized test fixture 28 corresponds to the semiconductor device 8 to be tested. If it is determined to be compatible, the process proceeds to step S4; otherwise, the process proceeds to step S15.

[0070] In step S4, the transport arm 9 moves horizontally (for example, in the Y direction) to transport the recognized inspection jig 28 to the top of the stage 10. In step S5, the transport arm 9 moves upward (in the Z direction) to transport the inspection jig 28, which had been transported to the top of the stage 10, towards the support base 16. This transport connects the inspection jig 28 to the support base 16 and electrically connects the energizing needle 6 to the conductive pattern 23 on the lower surface of the first substrate 2. At this time, the pins 12 of the inspection jig 28 position the inspection jig 28 relative to the support base 16.

[0071] In step S6, the semiconductor manufacturing equipment determines whether or not there is a semiconductor device 8 to be tested. If it is determined that there is a semiconductor device 8 to be tested, the process proceeds to step S7. If it is determined that there is no semiconductor device 8 to be tested, the operation shown in Figure 27 ends.

[0072] In step S7, the semiconductor manufacturing apparatus places the semiconductor device 8 to be tested on the stage 10. In step S8, the semiconductor manufacturing apparatus attracts the placed semiconductor device 8 to the stage 10. In step S9, the semiconductor manufacturing apparatus recognizes the attracted semiconductor device 8 using a camera (not shown). In step S10, the semiconductor manufacturing apparatus corrects the misalignment between the recognized semiconductor device 8 and the energizing needle 6 electrically connected to the lower conductive pattern 23 by controlling the stage 10.

[0073] In step S11, the stage 10 moves toward the inspection jig 28, electrically connecting the energizing needle 6 to the semiconductor device 8 and electrically connecting the conductive member 5 to the conductive elastic member 7 of the stage 10. In step S12, the semiconductor manufacturing apparatus measures the electrical characteristics of the semiconductor device 8 with the tester 1. In step S13, the semiconductor manufacturing apparatus detects, for example, whether the semiconductor device 8 has been destroyed by the measurement of its electrical characteristics, based on the measurement results. If it is detected that the semiconductor device 8 has been destroyed, the process proceeds to step S14; if it is detected that the semiconductor device 8 has not been destroyed, the process proceeds to step S6, and the measurement test of the semiconductor device 8 is continued as appropriate.

[0074] In step S14, the transport arm 9 moves downward to disconnect the electrical connection between the energizing needle 6 and the conductive pattern 23 on the underside of the first substrate 2, and then moves horizontally. In step S15, the transport arm 9 releases its support from the inspection fixture 28 it is currently supporting. Then, proceeding to step S1, the transport arm 9 supports another inspection fixture 28 from among the multiple inspection fixtures 28 that is suitable for measuring the electrical characteristics of the semiconductor device 8. In other words, if it is detected that the semiconductor device 8 is damaged, the inspection fixture 28 is automatically replaced.

[0075] According to the semiconductor manufacturing apparatus manufacturing method of this embodiment 7 described above, if the semiconductor device 8 is detected to be damaged by measuring its electrical characteristics, the inspection jig 28 is automatically replaced. With this configuration, downtime in the measurement test of the electrical characteristics of the semiconductor device 8 can be reduced. In addition, when performing measurement tests on various semiconductor devices 8 with different electrode pad arrangements, the trouble of the operator having to check the model number of the inspection jig 28 and set it up can be eliminated.

[0076] In this disclosure in English, 'a' and 'an' mean one or more. Therefore, 'a', 'an', 'one or more', and 'at least one' can be used interchangeably.

[0077] Furthermore, it is possible to freely combine each embodiment and each variation, and to modify or omit each embodiment and each variation as appropriate.

[0078] The various aspects of this disclosure are summarized below as an appendix.

[0079] (Note 1) A stage on which the semiconductor device is mounted, A support base is positioned above the aforementioned stage and includes a first substrate, An inspection jig that can be placed between the stage and the support base. Equipped with, An upper surface conductive pattern is provided on the upper surface of the first substrate, which is electrically connected to the lower surface portion that is a part of the lower surface of the first substrate. A bottom conductive pattern is provided on the lower surface of the first substrate, excluding the lower surface portion, along the upper conductive pattern. The aforementioned inspection jig is A current-carrying needle that can be electrically connected to the semiconductor device, A second substrate is provided above the current-carrying needle and includes a lower part electrically connected to the current-carrying needle and an upper part electrically connected to the lower part, An insulating plate member that covers the upper part of the current-carrying needle on the lower side of the second substrate and electrically connects the current-carrying needle to the lower part of the second substrate Includes, The support stand or the inspection jig is The invention includes a pogo pin block having a pogo pin that is electrically connected to either the conductive pattern on the lower surface of the first substrate or the upper part of the second substrate, and that can be moved to and from the other. The support stand or the inspection jig is The stage includes a conductive member that can be positioned along the current-carrying needle and electrically connects to the lower surface portion of the first substrate, A tester electrically connected to the lower conductive pattern and the upper conductive pattern, By transporting the inspection jig toward the support base, the transport unit electrically connects the energizing needle to the lower conductive pattern via the second substrate and the pogo pin block. Semiconductor manufacturing equipment that also includes these features.

[0080] (Note 2) The semiconductor manufacturing equipment described in Appendix 1, The inspection jig includes the pogo pin block, Regardless of whether the inspection jig is transported toward the support base or not, the pogo pins of the pogo pin block are electrically connected to the upper part of the second substrate. A semiconductor manufacturing apparatus wherein the inspection jig is transported toward the support base, thereby electrically connecting the pogo pins of the pogo pin block to the bottom conductive pattern of the first substrate.

[0081] (Note 3) A semiconductor manufacturing apparatus as described in Appendix 1 or Appendix 2, The inspection jig includes the conductive member, Regardless of whether the inspection jig is transported toward the support base, the conductive member is positioned along the energizing needle. A semiconductor manufacturing apparatus wherein the conductive member is electrically connected to the lower surface portion of the first substrate by the transport of the inspection jig toward the support base.

[0082] (Note 4) The semiconductor manufacturing equipment described in Appendix 1, The support base includes the pogo pin block, Regardless of whether the inspection jig is transported toward the support base or not, the pogo pins of the pogo pin block are electrically connected to the bottom conductive pattern of the first substrate. A semiconductor manufacturing apparatus wherein the inspection jig is transported toward the support base, thereby electrically connecting the pogo pins of the pogo pin block to the upper part of the second substrate.

[0083] (Note 5) The semiconductor manufacturing equipment described in Appendix 4, The aforementioned support base is A semiconductor manufacturing apparatus including an insulating restricting portion that prevents contact between the body of the pogo pin block and the second substrate when the current-carrying needle is electrically connected to the lower conductive pattern.

[0084] (Note 6) A semiconductor manufacturing apparatus described in any one of the items from Appendix 1 to Appendix 5, The support stand or inspection jig includes a plurality of the conductive members in a semiconductor manufacturing apparatus.

[0085] (Note 7) A semiconductor manufacturing apparatus described in any one of the items from Appendix 1 to Appendix 6, A semiconductor manufacturing apparatus in which, in a plan view, the conductive member surrounds a plurality of current-carrying needles electrically connected to the semiconductor device.

[0086] (Note 8) A semiconductor manufacturing apparatus as described in Appendix 1 or Appendix 4, The support base includes the conductive member, Regardless of whether the inspection jig is transported toward the support base or not, the conductive member is electrically connected to the lower surface portion of the first substrate. A semiconductor manufacturing apparatus in which the conductive member is positioned along the current-carrying needle by transporting the inspection jig toward the support base.

[0087] (Note 9) A semiconductor manufacturing apparatus described in any one of the items from Appendix 1 to Appendix 8, The second substrate is The lower conductive pattern which is the lower part of the second substrate, The upper conductive pattern which is the upper part of the second substrate, A conductive member provided in a through-hole extending vertically in the second substrate, which electrically connects the lower conductive pattern to the upper conductive pattern, Semiconductor manufacturing equipment, including...

[0088] (Note 10) The semiconductor manufacturing equipment described in Appendix 9, The aforementioned lower surface portion is the first lower surface portion, A small signal pattern is provided on the upper surface of the first substrate, which is electrically connected to a second lower surface portion that is a part of the lower surface of the first substrate and is different from the first lower surface portion. A semiconductor manufacturing apparatus wherein the through-holes of the second substrate are provided at positions facing the lower surface conductive pattern and the second lower surface portion.

[0089] (Note 11) A semiconductor manufacturing apparatus described in any one of the items from Appendix 1 to Appendix 8, The semiconductor manufacturing apparatus includes a second substrate which contains a conductive member that can be electrically connected to the lower conductive pattern.

[0090] (Note 12) A semiconductor manufacturing apparatus described in any one of the items from Appendix 1 to Appendix 8, The insulating plate member is The insulating plate member includes a protruding portion that extends from the upper surface and is electrically connected to the current-carrying needle, The second substrate is Wires and, The terminal block is the upper surface of the second substrate, A terminal provided on the terminal block and electrically connected to the protruding portion by the conductor and Semiconductor manufacturing equipment, including...

[0091] (Note 13) A method for manufacturing a semiconductor device using a semiconductor manufacturing apparatus described in any one of the items from Appendix 1 to Appendix 12, A step of supporting the inspection jig in the transport section, A step of recognizing the inspection jig supported by the transport unit, The transport unit performs the process of transporting the recognized inspection jig to the upper part of the stage, The transport unit transports the inspection jig, which has been transported to the upper part of the stage, toward the support base, thereby electrically connecting the energizing needle to the lower conductive pattern. A step of placing the semiconductor device on the stage, A step of adsorbing the placed semiconductor device onto the stage, A step of recognizing the adsorbed semiconductor device, A step of correcting the misalignment between the recognized semiconductor device and the energizing needle electrically connected to the lower surface conductive pattern, After the correction of the positional misalignment, the stage moves toward the inspection jig, thereby electrically connecting the energizing needle to the semiconductor device and electrically connecting the conductive member to the stage. A step of measuring the electrical characteristics of the semiconductor device with the tester, The steps include detecting whether the semiconductor device has been destroyed by measuring the electrical characteristics, If it is detected that the semiconductor device has been destroyed, the inspection jig is automatically replaced. A method for manufacturing a semiconductor device, comprising: [Explanation of Symbols]

[0092] 1 Tester, 2 First circuit board, 3 Second circuit board, 4 Pogo pin block, 5 Conductive component, 6 Current-carrying needle, 8 Semiconductor device, 9 Transport arm, 10 Stage, 13 First insulating board component, 16 Support base, 17 Regulating section, 20 Protruding section, 21 Conductor wire, 22 Terminal, 23 Bottom conductive pattern, 24 Top conductive pattern, 24a Bottom section, 25 Small signal pattern, 26 Double-ended probe, 27 Terminal block, 28 Test jig, 29 Conductive component.

Claims

1. A stage on which the semiconductor device is mounted, A support base is positioned above the aforementioned stage and includes a first substrate, An inspection jig that can be placed between the stage and the support base. Equipped with, An upper surface conductive pattern is provided on the upper surface of the first substrate, which is electrically connected to the lower surface portion that is a part of the lower surface of the first substrate. A bottom conductive pattern is provided on the bottom surface of the first substrate, excluding the bottom portion, along the top conductive pattern. The aforementioned inspection jig is A current-carrying needle that can be electrically connected to the semiconductor device, A second substrate is provided above the current-carrying needle and includes a lower part electrically connected to the current-carrying needle and an upper part electrically connected to the lower part, An insulating plate member that covers the upper part of the current-carrying needle on the lower side of the second substrate and electrically connects the current-carrying needle to the lower part of the second substrate Includes, The support stand or the inspection jig is The invention includes a pogo pin block having a pogo pin that is electrically connected to either the conductive pattern on the lower surface of the first substrate or the upper part of the second substrate, and that can be moved to and from the other. The support stand or the inspection jig is The stage includes a conductive member that can be positioned along the current-carrying needle and electrically connects to the lower surface portion of the first substrate, A tester electrically connected to the lower conductive pattern and the upper conductive pattern, By transporting the inspection jig toward the support base, the transport unit electrically connects the energizing needle to the lower conductive pattern via the second substrate and the pogo pin block. Semiconductor manufacturing equipment that also includes these features.

2. A semiconductor manufacturing apparatus according to claim 1, The inspection jig includes the pogo pin block, Regardless of whether the inspection jig is transported toward the support base or not, the pogo pins of the pogo pin block are electrically connected to the upper part of the second substrate. A semiconductor manufacturing apparatus wherein the inspection jig is transported toward the support base, thereby electrically connecting the pogo pins of the pogo pin block to the bottom conductive pattern of the first substrate.

3. A semiconductor manufacturing apparatus according to claim 1, The inspection jig includes the conductive member, Regardless of whether the inspection jig is transported toward the support base, the conductive member is positioned along the energizing needle. A semiconductor manufacturing apparatus wherein the conductive member is electrically connected to the lower surface portion of the first substrate by the transport of the inspection jig toward the support base.

4. A semiconductor manufacturing apparatus according to claim 1, The support base includes the pogo pin block, Regardless of whether the inspection jig is transported toward the support base or not, the pogo pins of the pogo pin block are electrically connected to the bottom conductive pattern of the first substrate. A semiconductor manufacturing apparatus wherein the inspection jig is transported toward the support base, thereby electrically connecting the pogo pins of the pogo pin block to the upper part of the second substrate.

5. A semiconductor manufacturing apparatus according to claim 4, The aforementioned support base is A semiconductor manufacturing apparatus including an insulating restricting portion that prevents contact between the body of the pogo pin block and the second substrate when the current-carrying needle is electrically connected to the lower conductive pattern.

6. A semiconductor manufacturing apparatus according to any one of claims 1 to 5, The support stand or inspection jig includes a plurality of the conductive members in a semiconductor manufacturing apparatus.

7. A semiconductor manufacturing apparatus according to any one of claims 1 to 5, A semiconductor manufacturing apparatus in which, in a plan view, the conductive member surrounds a plurality of current-carrying needles electrically connected to the semiconductor device.

8. A semiconductor manufacturing apparatus according to claim 1, The support base includes the conductive member, Regardless of whether the inspection jig is transported toward the support base or not, the conductive member is electrically connected to the lower surface portion of the first substrate. A semiconductor manufacturing apparatus in which the conductive member is positioned along the current-carrying needle by transporting the inspection jig toward the support base.

9. A semiconductor manufacturing apparatus according to any one of claims 1 to 5, The aforementioned second substrate is The lower conductive pattern which is the lower part of the second substrate, The upper conductive pattern which is the upper part of the second substrate, A conductive member provided in a through-hole extending vertically in the second substrate, which electrically connects the lower conductive pattern to the upper conductive pattern, Semiconductor manufacturing equipment, including...

10. A semiconductor manufacturing apparatus according to claim 9, The aforementioned lower surface portion is the first lower surface portion, A small signal pattern is provided on the upper surface of the first substrate, which is electrically connected to a second lower surface portion that is a part of the lower surface of the first substrate and is different from the first lower surface portion. A semiconductor manufacturing apparatus wherein the through-holes of the second substrate are provided at positions facing the lower surface conductive pattern and the second lower surface portion.

11. A semiconductor manufacturing apparatus according to any one of claims 1 to 5, The semiconductor manufacturing apparatus includes a second substrate which contains a conductive member that can be electrically connected to the lower conductive pattern.

12. A semiconductor manufacturing apparatus according to any one of claims 1 to 5, The insulating plate member is The insulating plate member includes a protruding portion that extends from the upper surface and is electrically connected to the current-carrying needle, The aforementioned second substrate is Wires and, The terminal block is the upper surface of the second substrate, A terminal provided on the terminal block and electrically connected to the protruding portion by the conductor and Semiconductor manufacturing equipment, including...

13. A method for manufacturing a semiconductor device using a semiconductor manufacturing apparatus according to any one of claims 1 to 5, A step of supporting the inspection jig in the transport section, A step of recognizing the inspection jig supported by the transport unit, The transport unit performs the process of transporting the recognized inspection jig to the upper part of the stage, The transport unit transports the inspection jig, which has been transported to the upper part of the stage, toward the support base, thereby electrically connecting the energizing needle to the lower conductive pattern. A step of placing the semiconductor device on the stage, A step of adsorbing the placed semiconductor device onto the stage, A step of recognizing the adsorbed semiconductor device, A step of correcting the misalignment between the recognized semiconductor device and the energizing needle electrically connected to the lower surface conductive pattern, After the correction of the positional misalignment, the stage moves toward the inspection jig, thereby electrically connecting the energizing needle to the semiconductor device and electrically connecting the conductive member to the stage. A step of measuring the electrical characteristics of the semiconductor device with the tester, The steps include detecting whether the semiconductor device has been destroyed by measuring the electrical characteristics, If it is detected that the semiconductor device has been destroyed, the inspection jig is automatically replaced. A method for manufacturing a semiconductor device, comprising:

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