Thin-film transistors for circuitry, for use in display devices.

Abstract

Improved switching and driving TFTs for pixel circuits, as well as improved switching TFTs for gate driver circuits, are required, with low off-leak current. [Solution] A device including a drive thin-film transistor is disclosed herein. The drive thin-film transistor includes a metal oxide channel, a source electrode in contact with the drive metal oxide channel, and a top gate electrode positioned above the metal oxide channel and physically connected to the drive source electrode.

Description

[Technical Field]

[0001] This disclosure relates to devices having driving thin-film transistors (TFTs) and / or switching TFTs, generally used in gate (scan) driver-on-array (GOA) circuits and / or pixel circuits. The devices may be used in display screens such as organic light-emitting diode (OLED) display screens. [Background technology]

[0002] Thin-film transistors (TFTs) are manufactured by depositing thin films of an active semiconductor layer and a dielectric layer, along with metal contacts, onto a support substrate such as glass. In particular, TFTs can be metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0003] TFTs have attracted significant interest in display applications due to their high resolution, low power consumption, and high-speed operation, particularly for liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays. TFTs are embedded within the display panel. Data line voltage signals from source driver ICs in the display module and scan line voltage signals from gate driver circuits in the peripheral display panel area within the display panel are delivered to TFTs in the pixel circuitry, controlling the display image by turning TFTs in the active display panel area on and off. Image distortion is reduced by improving the TFT response through higher mobility and / or by reducing crosstalk between pixels. Most display products, including LCD or OLED televisions (TVs) or monitors, include TFTs within the panel. Many modern high-resolution and high-quality electronic visual display devices use active-matrix based OLED displays, which utilize numerous TFTs as components of the pixel circuitry. One beneficial aspect of TFT technology is the use of a separate TFT for each pixel on the display. Each TFT functions as a current switch or current source within the pixel circuit or gate driver circuit by controlling voltage and current through data lines or gate signal lines for enhanced control of the display image. Higher on-current from high-mobility TFTs results in faster display image refresh and improved image quality by minimizing data distortion and gate signal voltage.

[0004] One drawback of conventional TFTs for OLED display panels is that they can be limited in terms of stability, voltage control for color and / or grayscale, and control of OLED current due to changes in OLED uniformity caused by on-current fluctuations in the driving TFT during display operation, as well as the slow response of the switching TFT as a component of the pixel circuit, especially for high resolution and / or large screen displays.

[0005] Therefore, what is needed are improved switching and driving TFTs for pixel circuits and improved switching TFTs for gate driver circuits, with low off-leak current. [Overview of the project]

[0006] Disclosed herein is a device having a drive thin-film transistor (TFT) including a drive channel. A drive source electrode is electrically connected to the drive channel, and a drive top gate electrode is located above the drive channel and electrically connected to the drive source electrode.

[0007] In some embodiments, a device is provided having a driving thin-film transistor (TFT) including a first TFT. The first TFT includes a first channel and a first bottom gate electrode located below the first channel. A second TFT is provided having a second channel and a second bottom gate electrode located below the second channel and electrically connected to the first bottom gate electrode of the first TFT.

[0008] In some embodiments, a device having a driving thin-film transistor (TFT) is provided. The driving TFT includes a first TFT. The first TFT includes a first channel and a first top gate electrode located above the first channel. The driving TFT includes a second TFT which includes a second channel and a second top gate electrode located above the second channel and electrically connected to the first top gate electrode of the first TFT.

[0009] In some embodiments, a device having a driving thin-film transistor (TFT) is provided. The driving TFT includes a first TFT having a first channel and a first top gate electrode located above the first channel. The driving TFT includes a second TFT having a second channel and a second top gate electrode located above the second channel and electrically connected to the first top gate electrode of the first TFT.

[0010] A more detailed description of the Disclosure, which is briefly summarized above, can be obtained by referring to embodiments shown in the accompanying drawings, in a manner that allows for a more detailed understanding of the features listed above. However, it should be noted that the accompanying drawings illustrate exemplary embodiments only, and therefore the Disclosure may permit other equally valid embodiments and should not be considered to limit the scope of the invention. [Brief explanation of the drawing]

[0011] [Figure 1] This is a schematic diagram of a simplified organic light-emitting diode (OLED) display panel according to several embodiments. [Figure 2] This is a schematic diagram of an active matrix pixel array in the display area of ​​an OLED panel according to several embodiments. [Figure 3A] This is a schematic diagram of a bottom-emission OLED display according to several embodiments. [Figure 3B]Schematic diagram of a top-emission OLED display according to some embodiments. [Figure 4] Schematic diagram of a simplified set of pixel circuits and GOA circuits in an OLED display panel according to some embodiments. [Figure 5A] Diagram showing the driving transistor of a pixel circuit according to some embodiments. [Figure 5B] Diagram showing the driving transistor of a pixel circuit according to some embodiments. [Figure 6] Diagram showing the driving transistor of a pixel circuit according to some embodiments. [Figure 7] Diagram showing the driving transistor of a pixel circuit according to some embodiments. [Figure 8] Diagram showing the driving transistor of a pixel circuit according to some embodiments. [Figure 9] Diagram showing a switching transistor for pixels and / or GOA circuits according to some embodiments. [Figure 10] Diagram showing a switching transistor for pixels and / or GOA circuits according to some embodiments. [Figure 11] Diagram showing driving transistors and switching transistors arranged on the same substrate according to some embodiments. [Figure 12] Graph diagram comparing the behavior of drain-source current with respect to the gate voltage of a transistor according to some embodiments. [Figure 13A] Graph diagram of the output curve for a switching transistor according to some embodiments. [Figure 13B] Graph diagram of the output curve for a switching transistor according to some embodiments. [Figure 14A] Graph diagram of the output curve for a driving transistor according to some embodiments. [Figure 14B]It is a graph of an output curve for a drive transistor according to some embodiments.

Mode for Carrying Out the Invention

[0012] For ease of understanding, whenever possible, the same reference numbers have been used to indicate the same elements common to the figures. It is contemplated that elements disclosed in one embodiment can be beneficially utilized for other embodiments without specific elaboration. The drawings referred to in this specification are not to be understood as being drawn to a fixed scale unless otherwise specifically mentioned. Further, the drawings are often simplified and details or components are omitted to clarify the presentation and description. The drawings and discussions are useful for explaining the principles discussed below, provided that like reference numerals indicate like elements.

[0013] The following detailed description is merely exemplary in nature and is not intended to limit the present disclosure or the application thereof and the use of the present disclosure. Further, it is not intended to be constrained by any theory expressed or suggested in the preceding background, summary, or the following detailed description.

[0014] Embodiments herein include thin-film transistors (TFTs) used in circuits for devices such as display devices. The TFTs disclosed herein transport high currents with high stability, good control, and fast response due to the higher on-current in the TFT, combining the selection of electrodes for applying bias with the selection of electrodes for connecting to each circuit. The TFTs described herein can be used as driver TFTs for pixel circuits, as well as as switching TFTs for gate-driver on-array (GOA) circuits and pixel circuits. One or more of the TFTs include a gate structure placed on a metal oxide channel with high carrier density. The gate structure includes one or more gate electrodes, and therefore the TFT is a top-gate (TG), double-gate (DG), or bottom-gate (BG) TFT. The TFTs described herein are particularly useful in double-gate structures. The channel may include one or more layers with varying electron mobilities, providing different benefits to each TFT. In particular, the high-mobility layer of the channel increases the response speed of the TFT, while the low-mobility layer allows for a more positive threshold voltage (turn-on voltage) and lower leakage current than the high-mobility layer within the same TFT. The combination of low-mobility and high-mobility layers results in a TFT with improved qualities such as improved mobility, lower off-leak current, and a positive threshold voltage (turn-on voltage), as described herein.

[0015] To operate the subpixels of an OLED pixel for a display, at least one switching transistor, one driving transistor, and one capacitor are used. The switching TFT passes the data voltage to the capacitor (storage). The storage capacitor is connected to the gate of the driving TFT. The gate voltage of the driving TFT connected to the storage capacitance determines how much current from the driving TFT flows to the OLED to control the brightness. The required capacitance of the storage capacitor is determined by the frame rate and the leakage current of the switching TFT connected to both the storage capacitor and the gate of the driving TFT for the display.

[0016] Figure 1 is a schematic diagram of a simplified organic light-emitting diode (OLED) display panel 100. The OLED panel 100 includes a non-display area 102 for switching TFTs for gate driver on-array (GOA) circuits, a display area 104 for switching and driving TFTs for pixel circuits, and an area 106 for source (data) driver integrated circuits. In some embodiments, the non-display area 102 is located within an edge region, either on one or more sides or surrounding the display area 104.

[0017] Figure 2 is a schematic diagram of the active matrix pixel array in the display area 104 of the OLED panel 100. The display area 104 has an array of pixels 290 arranged in rows 260 and columns 280, i.e., a first pixel 2901, a second pixel 2902, a third pixel 2903, and so on. Each pixel 290 has a plurality of subpixels 250 for determining the value of the pixel 290. For example, the first pixel 2901 has a first subpixel 250 1A , second subpixel 250 1B , and the third subpixel 250 1CEach subpixel 250 is a monochromatic element of its respective pixel 290. However, the first pixel 2901 has more than three subpixels 250, for example, subpixel 250 1N It can have such that "1N" can represent any number of subpixels 250 for the first pixel 2901. Each row 260 in the OLED panel 100 can be accessed independently using scan lines 210. Each column 280 in the OLED panel 100 can be accessed using data lines 220. By addressing the first scan line 212 and the first data line 222, the first subpixel 250 in the first pixel 2901 of the OLED panel 100 can be accessed. 1A Access to each subpixel 250. Each subpixel 250 can be similarly addressed in the OLED panel 100. In various embodiments, each subpixel 250 is exemplified as being coupled to a single scanline 210, while each subpixel may be coupled to multiple scanlines 210 that can be used to control the update of each subpixel 250. In such embodiments, the scanlines 210 may be driven at different times using different selection signals to control the update timing of the subpixels 250.

[0018] In one or more embodiments, the OLED panel 100 may be an organic light-emitting diode (OLED) display device. In such embodiments, each of the subpixels 250 may have electrodes coupled to the corresponding scan line(s) and data line via one or more transistors. When the switching TFT is turned on, a subpixel data signal(s) is applied to the switching TFT to deliver the data signal to a drive TFT having a specific voltage level. The drive TFT is connected to the OLED, and the current from the drive TFT controls the brightness of the OLED in the OLED device panel. A supply voltage (ELVDD or VSS) is applied to each subpixel to control the grayscale color and brightness of the OLED by controlling the current in the drive TFT at each pixel. In one embodiment, the positive supply voltage may be referred to as ELVDD, and the negative supply voltage may be referred to as VSS or ELVSS.

[0019] Figure 3A is a schematic diagram using a bottom-emission OLED display. The OLED is positioned on top of the subpixel circuit 320. Because the light from the OLED is emitted downwards, it cannot pass through the subpixel circuit area 320. A single subpixel 250 is the first subpixel 250 1A This is possible. However, the single subpixel 250 shown in Figure 3A is the first subpixel 250 1AThe collective subpixel 250 is general to each of the subpixels 250, and further consideration will be given to the collective subpixel 250. The subpixel 250 has a subpixel area 350. A portion of the subpixel area 350 is occupied by an OLED area 310. The OLED area 310 is the light-emitting element of the subpixel 250. The OLED area 310 is a current-driven light-emitting device. The remaining portion of the subpixel area 350 is occupied by a subpixel circuit 320 having one or more transistors, a capacitor, and a metal path connecting the transistors and capacitor to form a subpixel circuit 320. One or more transistors, capacitors, and metal paths may be located in a metal layer of the substrate (device) that is different from another of the transistors, capacitors, and metal paths that form the subpixel circuit 320. The subpixel circuit 320 controls the OLED area 310 by supplying the power necessary to drive the subpixel 250, i.e., to emit or not emit light.

[0020] Figure 3B shows a schematic diagram using a top-emission OLED display. In a top-emission OLED display, the OLED is positioned on top of the subpixel circuit 320. Since the direction of light from the OLED is upward, the subpixel circuit 320 does not block the light. Therefore, the area of ​​the subpixel circuit 320 from the top-emission OLED display can be equivalent to the OLED area 310, thereby allowing for a higher density than a bottom-emission OLED display.

[0021] FIG. 4 is a schematic diagram of a simplified set of pixel circuits 404 and GOA circuits 402 in an OLED display panel 100 according to one or more embodiments. Each set of pixel 404 and GOA circuits 402 includes a plurality of thin film transistors (TFTs) and storage capacitors, such as three or more transistors and / or two or more capacitors. Generally, pixel circuits 404, such as sub-pixel circuits 320, include a switching transistor T1, a current regulator or driving transistor T2, and a storage capacitor C1. The GOA circuit 402 includes switching transistors such as a pull-up buffer switching transistor T DOWN and a pull-down buffer switching transistor T UP and the like. The transistors for the GOA circuit and pixel circuit can be oxide transistors or low temperature polycrystalline silicon (LTPS) transistors.

[0022] The switching transistor gate (G1) is connected to the scan line (Vscan), and the source-drain is connected between the Vdata line and the gate (G2) of the driving transistor T2. The OLED 406 disposed within the OLED area 310 of the 250 pixels of the sub-pixel in a full-color display is electrically connected to the driving transistor T2. The circuit for the OLED 406 further continues to a low-level supply voltage (VSS) or ground (GND). The OLED 406 is controlled by the pixel circuit 320 and has a cathode connected to a common terminal or conductor and an anode connected to a high-level power supply (ELVDD) through the source-drain of the driving transistor T2. The storage capacitor C1 holds the gate voltage of the driving transistor T2. Other locations for the storage capacitor C1 are also contemplated.

[0023] The OLED is addressed or selected when a selection signal appears on the Vscan line and a data signal appears on the Vdata line. The transistors can be turned on and off by applying the selection signal to the gate of the transistor via the selected line. The signal on the Vscan line is applied to the gate (G1) of the switching transistor T1 to "turn on" the transistor. The data signal on the Vdata line is applied to the gate (G2) of the driving transistor T2 through the source-drain of the switching transistor T1 to "turn on" the driving transistor T2 depending on the amplitude and / or duration of the data signal. The driving transistor T2 then supplies power to the OLED 406, generally in the form of a driving current, and the brightness or intensity of the light produced by the OLED 406 may depend on the amount and / or duration of the supplied current. The storage capacitor C1 stores the voltage on the Vdata line after the switching transistor T1 has been "turned off".

[0024] Figures 5A, 5B, and 6 show schematic cross-sectional views of various drive transistors for a pixel circuit according to several embodiments of the present disclosure. In some embodiments, each of the drive transistors can be used as a drive transistor (T2) in a pixel circuit 404, as shown in Figure 4.

[0025] The driving TFTs 500A and 500B in Figures 5A and 5B are double-gate TFTs having a top gate electrode 514 and a bottom gate electrode 506. The TFTs 500A and 500B include a substrate 502 such as a silicon-based substrate, an insulating-based substrate, a germanium-based substrate, or other suitable flexible substrate. The substrate 502 may include one or more general layers that will be present in the complementary metal-oxide-semiconductor (CMOS) device structure. The substrate 502 may include a transparent material such as rigid glass or flexible polyimide (PI), which can be useful when the TFT is used in LCD or OLED display applications such as TVs, tablets, laptops, mobile phones, or other displays.

[0026] In some embodiments, the buffer layer 504 is placed on the substrate 502, such as in direct contact with the substrate 502. The buffer layer 504 is made of a single silicon dioxide (SiO₂) x ), silicon nitride (SiN x ), multilayer silicon nitride and / or silicon oxide (SiN x / SiO y The insulating material may include silicon oxynitride (SiON), other insulating materials, or combinations thereof. The bottom gate electrode 506 is positioned on top of the buffer layer 504. In some embodiments, the bottom gate electrode 506 corresponds to G2 in Figure 4. In some embodiments, a gate bias is applied to the bottom gate electrode 506 during use in OLED applications. In some embodiments, the bottom gate electrode is deposited and patterned using any suitable process known in the industry. The bottom gate insulating (GI) layer 508 is positioned on top of the bottom gate electrode 506 and surrounds the bottom gate electrode 506. The GI material for the bottom gate insulator, and / or any gate insulator described herein, may include silicon, SiN x This may include other insulating materials, or combinations thereof such as silicon dioxide (SiO2), polymethylsilsesquioxane (PMSQ), or other suitable materials.

[0027] The channel structure 510 is positioned on top of the bottom GI layer 508. The channel structure 510 can be a single-layer channel structure, a double-layer channel stack where each layer has a different electron mobility, or three or more layers where each layer has a different electron mobility than the layer positioned immediately above or below it. The channel structure 510 is made of a metal oxide material or low-temperature polysilicon (LTPS). Any channel structure described herein may consist of a metal oxide (MO) material, such as a single or multi-layer MO channel. Alternatively, any channel structure described herein may consist of an LTPS, such as a single-layer LTPS channel. The metal oxides may include oxygen (O), indium (In), gallium (Ga), zinc (Zn), tin (Sn), aluminum (Al), and combinations thereof, such as In-Zn-O, In-Ga-O, In-Sn-O, In-Ga-Zn-O, In-Zn-Sn-O, In-Ga-Sn-O, In-Ga-Zn-Sn-O, or any combination thereof. A metal oxide material or LTPS can be selected based on a predetermined electron mobility chosen for one or more layers of the channel structure 510. A top gate insulating (GI) layer 512 is positioned on top of the channel structure 510. In some embodiments, the top GI layer 512 is patterned to approximate the width of the top gate electrode 514 positioned above the top GI layer 512. Alternatively, as shown in Figure 5B, the top GI layer 512' is positioned on top of the channel structure 510, surrounding the channel structure 510, and positioned above the bottom GI layer 508. All of the TFTs shown in the figures show a top GI layer 512 similar to that in Figure 5A, but any other patterning including the top GI layer 512' shown in Figure 5B, or a top GI layer wider than the top gate electrode, can be used in one or more of the TFTs shown in any of the other figures.

[0028] The interlayer dielectric (ILD) layer 516 is positioned on top of the top gate electrode 514 and a portion of the channel structure 510. Any ILD layer described herein may be made of materials such as silicon oxide, nitrides, oxynitrides, and silicon-based dielectric films or other carbides.

[0029] The drive TFT 500A includes a source 518 and a drain 519 positioned on top of the ILD layer 516. The source 518 and drain 519 are coupled to vias in the ILD layer 516 to reach the channel structure 510. Each electrode described herein (e.g., top gate electrode 514, bottom gate electrode 506, source / drain electrodes 518, 519) includes any electrically conductive material, or any combination thereof, including alloys containing molybdenum (Mo), chromium (Cr), copper (Cu), titanium (Ti), tantalum (Ta), tungsten (W), MoW, combinations of conductive materials including MoW, TiCu, MoCu, MoCuMo, TiCuTi, MoWCu, MoWCuMoW, conductive metal oxides such as indium tin oxide (InSnO) [ITO] and indium zinc oxide (InZnO) [IZO].

[0030] In each of the figures, each electrode of the TFT includes an electrode path in which a current path is shown for each electrode. For example, TFT 500A includes a drain electrode path 520 coupled to the drain voltage, a source electrode path 522 coupled to the source voltage, a top gate electrode path 524 coupled to the source electrode and source voltage, and a bottom gate electrode path 526 coupled to the gate voltage. The driving TFT 500A includes a physical and electrical connection between the source electrode 518 and the top gate electrode 514 by the electrode paths 522 and 524. In some embodiments, the connection is connected by electrical wiring and / or other connection bridges. The connection can be made using contact holes in the active pixel area (display area 104). The gate bias is applied to the bottom gate electrode 506 via the bottom gate electrode path 526.

[0031] In contrast to the connection described with reference to Figure 5A, the connection between the source electrode 518 (e.g., source electrode passage 522) and the bottom gate electrode 506 (e.g., bottom electrode passage 526) can be made for use with the driver TFT 600 shown in Figure 6. The source electrode passage 522 and the bottom electrode passage 526 are connected to and coupled to the source voltage. The gate bias is applied to the top gate electrode 514 via passage 524 coupled to the gate voltage. Compared to the TFT 600, when used as a driver TFT for the pixel circuit in an OLED device, connecting the source electrode 518 to the top gate electrode 514 has been found to enable improved stability, improved voltage control for color and / or grayscale, and improved output saturation curve and reduced sensitivity to drain voltage for OLED current control. In particular, the top gate electrode 514 is at substantially the same voltage as the source electrode 518, which enables improved stability.

[0032] Figure 7 shows an example of a driver TFT 700 having two TFT structures from two adjacent subpixel circuits in a display area placed on a substrate (TFT 701A and TFT 701B). One driver TFT is from one subpixel circuit, and the other driver TFT is from an adjacent subpixel circuit. Each subpixel circuit has one driver TFT connected to the OLED. Each TFT includes the layers described with reference to Figures 5A and 5B. In particular, each TFT is a double-gate TFT having a buffer layer 704 placed on the substrate 702. Each TFT includes a bottom gate electrode 706A, 706B, a bottom GI layer 708, a channel structure 710, a top gate insulating layer 712, a top gate 714A, 714B, and an ILD layer 716. Each TFT has a source electrode 719A, 719B, and drain electrodes 718A, 718B.

[0033] The bottom electrodes 706A and 706B for each TFT 701A and 701B are connected by passages 726A and 726B as shown, and coupled to a DC voltage or ground (GND). Other passages are shown as shown in Figure 5A (e.g., drain electrode passages 720A and 720B coupled to the drain voltage, source electrode passages 722A and 722B coupled to the source voltage, and top gate electrode passages 724A and 724B coupled to the gate voltage). In some embodiments, the top gate electrode corresponds to G2 as shown in Figure 4. The connection of the bottom electrodes has been found to allow adjustment of the threshold voltage (Vth) by varying the voltage of the bottom gate electrode with a positive or negative DC voltage. The bottom gate metal is physically connected during the integration process, and contact holes can be made to connect the top layer metal at the edge of the panel to apply voltage signals. Contact holes within the active pixel area are not required to connect the bottom gate and source electrodes. Therefore, eliminating the need for contact holes for the TFT600 allows for one less mask and the use of larger space. Compared to the TFT600, using the driver TFT700 as the driver transistor for the pixel circuit allows for adjustment of the threshold voltage (Vth) by varying the voltage of the bottom gate electrode with a positive or negative DC voltage, and further enables better voltage control for color and / or grayscale, as well as better sensitivity to output saturation and drain voltage for OLED current control.

[0034] Figure 8 shows an example of a driven TFT800 having two TFT structures (TFT801A and TFT801B) arranged on a substrate. TFT800 is identical to TFT700 except that the top gate electrodes 714A and 714B are connected through passages 724A and 724B and coupled to a DC voltage, while the bottom gate electrodes 706A and 706B are not connected. In some embodiments, the bottom gate electrodes 706A and 706B correspond to G2 shown in Figure 4. The other passages are shown as shown in Figure 7. In particular, the drain electrode passages 720A and 720B are coupled to the drain voltage, the source electrode passages 722A and 722B are coupled to the source voltage, and the bottom gate electrode passages 726A and 726B are coupled to the gate voltage. The threshold voltage (Vth) can be easily adjusted by changing the voltage of the top gate electrodes 714A and 714B. The top gate metal is physically connected during the integration process, and contact holes can be fabricated to connect the top layer metal at the edges of the panel for applying voltage signals. Therefore, one less mask is needed to create the connection compared to the TFT500A or TFT600. Contact holes are not required within the active pixel area to connect the top gate and source electrodes. Compared to the TFT500A, using the driver TFT800 as the driver transistor for the pixel circuit allows for adjustment of the threshold voltage (Vth) by varying the top gate voltage with a positive or negative DC voltage, and further enables better electrical stability under positive bias temperature stress (PBTS) or negative bias temperature stress (NBTS), better voltage control for color and / or grayscale, and better sensitivity to output saturation and drain voltage for OLED current control.

[0035] Each of the drive transistors described with reference to Figures 5A, 5B, and 6-8 can be used in combination with one or more switching transistors for the GOA circuit or pixel circuit, which will be described with reference to Figures 9 and 10. In some embodiments, as shown in Figure 4, each of the switching transistors is a switching transistor (T1) in the pixel circuit 404, and / or a switching transistor (T1) in the GOA circuit 402. UP , T DOWN ) can be used as a switch TFT. Referring to Figure 9, the switch TFT 900 is a top-gate TFT without a bottom gate electrode. The switch TFT 900 includes the layers described with reference to Figures 5A and 5B, except for the bottom gate electrode. In particular, the switch TFT is a top-gate TFT having a buffer layer 904 placed on the substrate 902. A bottom insulating layer 908 is placed on the buffer layer 904, followed by a channel structure 910, a top gate insulating layer 912, a top gate electrode 914, and an ILD layer 916. The switch TFT 900 includes a source electrode 918 having a corresponding source electrode passage 920 coupled to the source voltage, and a drain electrode 919 having a corresponding drain electrode passage 922 coupled to the drain voltage. The top gate electrode 914 includes a top gate electrode passage 924 coupled to the gate voltage.

[0036] Referring to Figure 10, the switching TFT 1000 is a double-gate transistor comprising a top gate electrode 914 and a bottom gate electrode 1006. The switching TFT 1000 is described with reference to the TFT 900, except that the bottom gate electrode 1006 is located above the buffer layer 904, and the bottom insulating layer 908 is located above and surrounding the bottom gate electrode 1006. In contrast to the TFT 900, the TFT 1000 includes a connection between the top gate electrode 914 and the bottom gate electrode 1006 through passages 924 and 1026 that are coupled to the gate voltage. Compared to the switching TFT 900, the switching TFT 1000 performed better in terms of GOA circuitry with better Vth uniformity, better stability, and higher on-current at high frequency and high-speed operation. Compared to the switching TFT900, the switching TFT1000 performed better in terms of pixel circuits with superior Vth uniformity and electrical stability under positive bias temperature stress (PBTS) or negative bias temperature stress (NBTS).

[0037] Figure 11 shows an example of a transistor 1100, including a drive transistor 1122 and a switching transistor 1124, arranged on the same substrate 1102. Each TFT includes a buffer layer 1104, a gate insulating layer (or insulating layer) 1108, a channel structure 1110, a top gate insulating layer 1112, and an ILD layer 1116. Each TFT includes source electrodes 1119A, 1119B, and drain electrodes 1118A, 1118B. Although the drive TFT is shown as a single TFT, the drive transistor 1122 can also be any of the drive transistors shown in Figures 5A, 5B, 6-8, such as TFT500A, TFT500B, TFT600, TFT700, or TFT800. In some embodiments, the drive transistor 1122 is a double-gate TFT having a bottom gate electrode 1106A and a top gate electrode 1114A. Although a double-gate TFT is shown, the switching transistor 1124 can also be a top-gate transistor such as TFT900 or a double-gate transistor such as TFT1000, as indicated by the bottom gate electrode 1106B and the top gate electrode 1114B.

[0038] example The transistors described herein, among others, were formed using a dual-layer channel structure consisting of In-Zn-O on the bottom layer and In-Ga-Zn-O on the top layer. The channel structure had a width of 40 μm and a length of 10 μm.

[0039] Figure 12 shows a graph comparing the behavior of drain-source current (Ids) against gate-source voltage of transistors, with certain characteristics further summarized in Table 1 below. In particular, the graph shows the logarithmic scale of drain-source current log(IDS) against gate-source voltage (Vgs) for each TFT described with reference to Figure 10 (TFT1000), Figure 6 (TFT600), Figure 5A (TFT500A), and Figure 9 (TFT900). Figure 12 shows the transfer curves at a drain voltage (Vds) of 1V, with gate voltages in a small range of -1V to +5V, to compare the subthreshold slopes (SS) from each transfer curve of each TFT. Although not shown in the figure, 10V drain voltage data was also collected in Table 1. In this case, the TFT operates in the linear region at a drain-source voltage (Vds) of 1V and in the saturation region at a drain-source voltage (Vds) of 10V. The subthreshold voltage value varies with the value of the drain-source voltage (Vds). Typically, a large subthreshold value is obtained from a high drain voltage value. For example, at Vds = 10V, a higher subthreshold value is produced compared to the subthreshold value at lower drain-source voltages such as Vds = 1V. The switching transistor operates in the linear region at a low drain voltage value (Vgs - Vth > Vds, Vgs > Vth), and the driving transistor operates in the linear region at a high drain voltage value (Vgs - Vth<Vds、Vgs> It was found that the device operates in the saturation region at Vth. In this case, Vgs is the gate-source voltage, Vds is the drain-source voltage, and Vth is the threshold voltage.

[0040] The regions defined by the range of low-level currents from 1E-11 to high-level currents from 1E-7 amperes (A) were compared for each curve, and subthreshold gradient (SS) values ​​were obtained. Transistors with small subthreshold values ​​(SS) were found to be useful as switching transistors that quickly reach high-level drain current values ​​(Ids) for fast switching operation. In contrast, transistors with large subthreshold gradient values ​​(SS) are useful as driving transistors that slowly reach high-level drain current values ​​(Ids) for better control of the grayscale gate voltage over a wider gate voltage range between low-level (1E-11) and high-level (1E-7) drain current values.

[0041] In Figure 12, the current range was selected for illustrative purposes, but it can correspond to the current from the driver transistor that can pass through the OLED display to control not only the brightness of the OLED display but also the grayscale gate voltage for the driver transistor. A larger subthreshold gradient (SS) value is useful for better grayscale control. The drain-source current of 1E-11A, indicated by the horizontal dashed line in Figure 12, is an example of the current to turn off the TFT to obtain a black image in the OLED display, and 1E-7A is an example of the maximum current to enable maximum brightness in the OLED display. Other current values ​​can be used depending on the application and display. The intermediate current range between 1E-11 and 1E-7 can be selected to control a certain level of brightness in the OLED display using a certain level of gate voltage between the gate voltage for 1E-11 and the gate voltage for 1E-7 in the driver TFT. For example, the gate voltage can be divided into 256 "levels" used for controlling attributes such as brightness.

[0042] In Figure 12, region 1202 corresponds to TFT1000, region 1204 corresponds to TFT600, region 1206 corresponds to TFT500A, and region 1208 corresponds to TFT900. The width of the region (ΔV) indicates the ability to control the voltage within a desired current range. As can be seen in the comparison of the regions in Figure 12 with ΔV in Table 1, region 1206, corresponding to TFT500A, is the widest and therefore demonstrates sufficient control of the grayscale gate voltage for the driving transistor. This can be further expressed quantitatively when measuring the inverse slope of the curve in the region (e.g., subthreshold slope with units of V / decade) as shown below. The values ​​for each TFT are summarized below when the drain voltage is equal to 1V, and in parentheses when Vd is equal to 10V. TFT500A showed the best SS value for each voltage, indicating an increased ability to control voltage and current in the driving TFT, and therefore improved control of the displayed image. Therefore, transistors with high SS values, such as the TFT500A and the subsequent TFT600, function well as driver transistors in pixel circuits. It has been found that the electron mobility of the channel layer can be optimized to form a TFT with a predetermined SS value in coordination with the formation of connections between certain electrodes. In particular, although each of the transistors summarized in Table 1 has the same channel layer composition and dimensions, the TFT500A has the lowest electron mobility μ (cm2 / Vs). The low electron mobility from the TFT500A works well, and the low electron mobility allows for sufficient control over driver transistors with high subthreshold gradient (SS) values ​​compared to the TFT600, TFT1000, and TFT900.

[0043] In contrast, switching transistors with low SS values, such as the TFT1000 and the subsequent TFT900, work well as switching transistors in the GOA and pixel circuits. High electron mobility with a low SS value is suitable for switching TFTs. It has been found that using the same channel layer composition, it is possible to realize a switching transistor with a low SS value and high electron mobility (e.g., TFT1000) and an adjacent driving transistor with a high SS value and low electron mobility, located on the same substrate (e.g., TFT500A). By positioning In-Ga-Zn-Sn-O as the top layer on top of In-Zn-O (IZO) as the bottom channel layer and single-layer channel structure, similar results, as shown in Tables 2 and 3, were found when comparing TFTs with other channel compositions, such as dual-layer channel structures (IZO / IGZTO). Thus, TFTs (TFT500A, TFT600, TFT900, TFT1000) can exhibit similar results regardless of channel structure, showing the best subthreshold value and ΔV for better grayscale from TFT500A, and the lowest subthreshold value and ΔV for fast switching from TFT1000. TIFF2026122940000003.tif126170TIFF2026122940000004.tif115170

[0044] Figures 13A, 13B, 14A, and 14B show graphs of the output characteristics of transistors according to several embodiments. Figure 13A shows the curve for TFT900, Figure 13B shows the curve for TFT1000, Figure 14A shows the curve for TFT600, and Figure 14B shows the curve for TFT500A. To compare the performance of the TFTs as switching or driving transistors, the drain-source current (Ids) from the TFTs was monitored in 2.5V voltage steps with respect to the gate-source voltage (Vgs) from 0V to 15V, and in 0.5V voltage steps with respect to the drain-source voltage (Vgs) from 0V to 20V. The drain-source voltage (Vds) is represented on the horizontal axis, and the drain-source current (Ids) is represented on the vertical axis. The TFT1000 shown in Figure 13B functions well as a switching transistor for rapid switching operation with higher drain-source current (Ids) and lower subthreshold gradient (SS) values ​​compared to the TFT900, TFT600, and TFT500A shown in Figures 13A, 14A, and 14B. However, the TFT600 and TFT500A shown in Figures 14A and 14B function well as driving transistors for better control of the grayscale. This is because the drain-source current (Ids) does not show significant fluctuations with respect to changes in the drain-source voltage (Vds) in the saturation region, and moreover, the drain-source current saturates rapidly to a specified target current at lower drain-source voltages (Ids) compared to the TFT900 and TFT1000 shown in Figures 13A and 13B. Therefore, the saturation region of the TFT500A and TFT600 is wider than that of the TFT900 and TFT1000, which achieve sufficient output saturation. Furthermore, the reduced sensitivity of the drain-source current due to changes in the drain-source voltage in the saturation region allows for precise control of the drain-source current (Ids), making them suitable as driving TFTs for better OLED uniformity.In addition, the TFT500A shown in Figure 14B has a higher subthreshold gradient (SS) value compared to the TFT600 shown in Figure 14B, enabling better control of the grayscale as a driving transistor.

[0045] Figures 12-14B and Tables 1-3 do not show data from the TFT700 shown in Figure 7, but it was found that the TFT700 showed similar results to the TFT600, except that Vth adjustment with DC voltage was not used in the TFT700. Furthermore, Figures 12-14B and Tables 1-3 do not show data from the TFT800 shown in Figure 8, but the TFT800 showed similar results to the TFT500A, except that Vth adjustment with DC voltage was not used in the TFT800. In addition, Figures 12-14B and Tables 1-3 show transistors with metal oxide channels, but other channels such as LTPS single-layer channels are also considered. The LTPS transistor was found to have similar relative results to the MO channel structure.

[0046] In summary, transistors are provided herein that achieve a positive threshold voltage close to 0V (e.g., turn-on voltage), sufficient voltage / gray color control with a higher on-current, such as for switching TFTs, and a low subthreshold gradient, such as in driver TFTs for OLED displays, and a good output saturation curve with a gate-source voltage that is less dependent on drain-source voltage changes.

[0047] These and other advantages may be realized according to the specific embodiments and other variations described. It should be understood that the above description is illustrative but not intended to be limiting. Many other embodiments and modifications within the spirit and scope of these claims will be apparent to those skilled in the art upon reviewing the above description. Therefore, the scope of the invention shall be determined by reference to the appended claims, along with the entire scope of equivalents to which such claims are entitled. In the following claims, terms such as “first,” “second,” and “third,” etc., are used merely as labels and are not intended to impose numerical requirements on their subjects.

[0048] As used herein, the term "approximately" refers to a variation of + / - 10% from the nominal value. It should be understood that such variation may be included in any of the values ​​provided herein.

Claims

1. A device comprising a driving thin-film transistor (TFT), wherein the driving TFT is Drive channel and A drive source electrode electrically connected to the drive channel, A device comprising a drive top gate electrode positioned above the drive channel and electrically connected to the drive source electrode.

2. It further includes one or more switching TFTs, and each switching TFT is, Switching metal oxide (MO) channel, The device according to claim 1, further comprising a switching top gate electrode disposed above the switching MO channel.

3. The device according to claim 2, wherein at least one switching TFT comprises a switching bottom gate electrode electrically connected to the switching top gate electrode.

4. The device according to claim 3, wherein each of the one or more switching TFTs is operable for use in a pixel circuit or in a gate driver on array (GOA) circuit.

5. The device according to claim 1, wherein the drive TFT further comprises a drive bottom gate electrode, and a gate bias is applied to the drive bottom gate electrode.

6. A device comprising a driving thin-film transistor (TFT), wherein the driving TFT is The first channel and, A first bottom gate electrode located below the first channel and A first TFT comprising, The second channel and A second bottom gate electrode is located below the second channel and is electrically connected to the first bottom gate electrode of the first TFT. A device comprising a second TFT having

7. The device according to claim 6, wherein the first TFT comprises a first top gate electrode positioned above the first channel.

8. The device according to claim 6, further comprising one or more switching TFTs, each of which is a top gate electrode TFT, and the top gate electrode TFT does not have a bottom gate electrode.

9. It further includes one or more switching TFTs, and each switching TFT is, Switching bottom gate electrode and A switching metal oxide (MO) channel is positioned above the switching bottom gate electrode, The device according to claim 6, further comprising a switching top gate electrode positioned above the switching MO channel, wherein the switching top gate electrode is electrically connected to the switching bottom gate electrode.

10. The device according to claim 9, comprising a gate driver on-array (GOA) circuit.

11. The device according to claim 9, comprising a pixel circuit.

12. The device according to claim 6, further comprising a top gate insulating layer disposed on the first channel and extending over the second channel.

13. The device according to claim 6, further comprising a first top gate insulating layer disposed on the first channel and a second top gate insulating layer disposed on the second channel.

14. A device comprising a driving thin-film transistor (TFT), wherein the driving TFT is The first channel and, A first top gate electrode positioned above the first channel and A first TFT comprising, The second channel and A second top gate electrode is positioned above the second channel and electrically connected to the first top gate electrode of the first TFT. A device comprising a second TFT having

15. It further includes one or more switching TFTs, and each switching TFT is, Switching channel and The device according to claim 14, further comprising a switching top gate electrode disposed above the switching channel.

16. The device according to claim 15, further comprising one or more switching TFTs, each switching TFT comprising a switching bottom gate electrode located below the switching channel, and the switching top gate electrode being electrically connected to the switching bottom gate electrode.

17. The device according to claim 14, wherein at least one of the first channel and the second channel is a metal oxide comprising a layer containing at least one of indium, zinc, gallium, oxygen, aluminum, tin, In-Zn-O, In-Sn-O, In-Zn-Sn-O, In-Ga-O, In-Ga-Zn-O, In-Ga-Sn-O, In-Ga-Zn-Sn-O, or a combination thereof.

18. The device according to claim 14, wherein at least one of the first channel and the second channel is a single layer of low-temperature polysilicon (LTPS).

19. The device according to claim 14, wherein at least one of the first channel or the second channel, or both the first channel and the second channel, are each composed of a single layer.

20. The device according to claim 14, wherein at least one of the first channel or the second channel comprises two or more layers, each layer having a different electron mobility.

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