Semiconductor equipment

Abstract

To provide a semiconductor device with good electrical characteristics. To provide a semiconductor device with stable electrical characteristics To do so. 【Solution means】 The semiconductor device has a semiconductor layer, a first insulating layer, and a first conductive layer. The first insulating layer is provided on the semiconductor layer. The first conductive layer is provided on the first insulating layer The semiconductor layer has a first region that overlaps with the first conductive layer and the first insulating layer, a second region that does not overlap with the first conductive layer but overlaps with the first insulating layer, and a third region that does not overlap with both the first conductive layer and the first insulating layer. The semiconductor layer contains a metal oxide. The second region and The third region contains a first element. The first element is one or more elements selected from boron, phosphorus, aluminum, and magnesium. Also, the first element exists in a state of being bonded to oxygen. exists. The first element is one or more elements selected from boron, phosphorus, aluminum, and magnesium. And the first element exists in a state of being combined with oxygen. exists. exists.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device. One aspect of the present invention relates to a display device. The present invention relates to a method for manufacturing a semiconductor device or a display device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. As the technical field of one aspect of the present invention disclosed in this specification and the like, semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices , electronic devices, lighting devices, input devices, input / output devices, their driving methods, or their manufacturing methods can be cited as an example. A semiconductor device generally refers to all devices that can function by utilizing semiconductor characteristics. , electronic devices, lighting devices, input devices, input / output devices, their driving methods, or their manufacturing methods, can be cited as an example. A semiconductor device generally refers to all devices that can function by utilizing semiconductor characteristics.

Background Art

[0003] As a semiconductor material applicable to transistors, an oxide semiconductor using a metal oxide has attracted attention. For example, in Patent Document 1, a plurality of oxide semiconductor layers are stacked, and among the plurality of oxide semiconductor layers, the oxide semiconductor layer serving as a channel contains indium and gallium, and by making the ratio of indium larger than the ratio of gallium, a semiconductor device with increased field-effect mobility (sometimes simply referred to as mobility or μFE) is disclosed.

[0004] Since the metal oxide that can be used for the semiconductor layer can be formed by using a sputtering method or the like, it can be used for the semiconductor layer of a transistor that constitutes a large display device. Also,

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[0025] [Figure 1] [Figure 2] [Figure 3] [Figure 4] [Figure 5] [[ENDSince the [object] has a higher field-effect mobility than in the case of using amorphous silicon, a high-performance display device provided with a driving circuit can be realized.

[0005] Also, Patent Document 2 discloses a thin film transistor to which an oxide semiconductor film having a low resistance region containing at least one kind of aluminum, boron, gallium, indium, titanium, silicon, germanium, tin, and lead as a dopant is applied in a source region and a drain region.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0007] One aspect of the present invention aims to provide a semiconductor device with good electrical characteristics. Or, one aspect of the present invention aims to provide a semiconductor device with stable electrical characteristics. Or, one aspect of the present invention aims to provide a highly reliable semiconductor device. Or, one aspect of the present invention aims to provide a highly reliable display device.

[0008] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems can be extracted from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problems

[0009] One aspect of the present invention relates to a semiconductor device having a semiconductor layer, a first insulating layer, and a first conductive layer. The first insulating layer is provided on the semiconductor layer. The first conductive layer is provided on the first insulating layer. It is provided in the first region. The semiconductor layer has a first region that overlaps with the first conductive layer and the first insulating layer, and the first A second region that does not overlap with the conductive layer but overlaps with the first insulating layer, and the first conductive layer and the first insulating layer It has a third region that does not overlap with either of the marginal layers. The semiconductor layer contains a metal oxide. The first region and the third region contain the first element. The first element is boron, phosphorus, aluminum. It is one or more elements selected from um and magnesium. The first element is bonded with oxygen. It exists in that state.

[0010] Another aspect of the present invention is a semiconductor layer, a first insulating layer, a second insulating layer, and a first A semiconductor device having a conductive layer. The first insulating layer is provided on the semiconductor layer. The conductive layer is provided on the first insulating layer. The second insulating layer is a semiconductor layer, the first insulating layer, The semiconductor layer is provided on the first conductive layer and the first insulating layer. The first region does not overlap with the first conductive layer, but the second region overlaps with the first insulating layer, and the second It has a third region in contact with the insulating layer. The semiconductor layer contains a metal oxide. Second insulating layer The first insulating layer contains more hydrogen. The second and third regions contain the first element. Furthermore, the first element is selected from boron, phosphorus, aluminum, and magnesium. It consists of one or more elements. Furthermore, the first element exists in a state of being bonded with oxygen.

[0011] One aspect of the present invention comprises a semiconductor layer, a first insulating layer, a second insulating layer, and a first conductive layer. A semiconductor device having the following: The first insulating layer is provided on the semiconductor layer. The first insulating layer is provided on the first insulating layer. The second insulating layer is provided on the semiconductor layer, the first insulating layer, and the first It is provided on the conductive layer. The semiconductor layer is a first region that overlaps with the first conductive layer and the first insulating layer. A region that does not overlap with the first conductive layer, a second region that overlaps with the first insulating layer, and the second insulating layer It has a third region in contact with it. The semiconductor layer also contains a metal oxide. The second insulating layer is Selected from aluminum, titanium, tantalum, tungsten, chromium, or ruthenium. It contains one or more elements and nitrogen. The second and third regions contain the first element, and The first element is one or more selected from boron, phosphorus, aluminum, and magnesium. It is an element. Furthermore, the first element exists in a state of being bonded with oxygen.

[0012] Furthermore, in the above, the first insulating layer is a fourth region that overlaps with the first conductive layer and the first region. It is preferable to have a region and a fifth region that overlaps with the second region. In this case, the fifth region The region preferably contains the first element. In this case, in the fifth region, the first element is It is preferable that it exists in a state of being bound to oxygen.

[0013] Furthermore, in the above, the first insulating layer contains an oxide, and the second insulating layer contains a nitride. It is preferable.

[0014] Furthermore, in the above, the first insulating layer has a portion that protrudes from the side surface of the first conductive layer. In a plan view, the edge of the first conductive layer is located inward from the edge of the first insulating layer. This is preferable.

[0015] Furthermore, in the above, the second insulating layer is the upper surface and side surface of the first conductive layer, and the first insulating layer It is preferable that it is in contact with the top surface and side surfaces, as well as the top surface and side surfaces of the third region.

[0016] Furthermore, it is preferable to further include a second conductive layer and a third insulating layer. In this case, the third insulating layer is provided covering the second conductive layer, and the semiconductor layer is the third insulating layer. The second conductive layer is provided on the edge layer, and the semiconductor layer, the first insulating layer, and are connected via the third insulating layer. It is preferable that the material has a portion that overlaps with the first conductive layer.

[0017] Another aspect of the present invention is a method for manufacturing a semiconductor device, comprising a semiconductor containing a metal oxide. A first step of forming a body layer, and a first insulating film containing an oxide and a first conductive layer on the semiconductor layer A second step of forming a film, and etching the first conductive film and the first insulating film to form the first A conductive layer and a first insulating layer having a portion that protrudes from the side surface of the first conductive layer are formed. The third step involves forming a portion of the semiconductor layer that is not covered by the first insulating layer, and the first step A fourth step in which a conductive layer is used as a mask to supply the first element into the first insulating layer and the semiconductor layer. The process also includes a fifth step of supplying hydrogen to the portion of the semiconductor layer that is not covered by the first insulating layer. The first element mentioned above is boron, phosphorus, aluminum, or magnesium. It is preferable to do so.

[0018] Furthermore, in the fourth step described above, the first element is obtained by plasma ion doping or It is preferable to supply it using an on-injection method.

[0019] Furthermore, in the fifth step described above, contact the portion of the semiconductor layer that is not covered by the first insulating layer. Then, a second insulating layer containing hydrogen is formed by plasma CVD, followed by a heat treatment. It is preferable to supply hydrogen to the semiconductor layer in this way.

[0020] Another aspect of the present invention is a method for manufacturing a semiconductor device, comprising a semiconductor containing a metal oxide. A first step of forming a body layer, and a first insulating film containing an oxide and a first conductive layer on the semiconductor layer A second step of forming a film, and etching the first conductive film and the first insulating film to form the first A conductive layer and a first insulating layer having a portion that protrudes from the side surface of the first conductive layer are formed. The third step involves forming a portion of the semiconductor layer that is not covered by the first insulating layer, and the first step A fourth step in which a conductive layer is used as a mask to supply the first element into the first insulating layer and the semiconductor layer. Then, after forming the first layer in contact with the portion of the semiconductor layer not covered by the first insulating layer, The process includes a fifth step of heat treatment. The first element is boron, phosphorus, aluminum. It is aluminum or magnesium. Also, the first layer mentioned above is aluminum, titanium, One or more elements selected from tantalum, tungsten, chromium, or ruthenium, and nitrogen It is preferable to include the following.

[0021] Furthermore, in the fourth step described above, the first element is obtained by plasma ion doping or It is preferable to supply it using an on-injection method.

[0022] Furthermore, in the above, the heat treatment is performed in a nitrogen-containing atmosphere at a temperature of 200°C to 450°C. It is preferable to carry out the procedure at a temperature of °C or lower. [Effects of the Invention]

[0023] According to one aspect of the present invention, a semiconductor device with good electrical characteristics can be provided. We can provide semiconductor devices with stable performance. Or, we can provide highly reliable semiconductor devices. Alternatively, a highly reliable display device can be provided.

[0024] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not necessarily have to possess all of these effects. Furthermore, other effects may be considered. This information can be extracted from descriptions such as specifications, drawings, and claims. [Brief explanation of the drawing]

[0025] [Figure 1] Example configuration of a semiconductor device. [Figure 2] Example configuration of a semiconductor device. [Figure 3] A diagram illustrating the method for manufacturing semiconductor devices. [Figure 4] A diagram illustrating the method for manufacturing semiconductor devices. [Figure 5] A diagram illustrating the method for manufacturing semiconductor devices. [Figure 6] A diagram illustrating the method for manufacturing semiconductor devices. [Figure 7] A diagram illustrating the method for manufacturing semiconductor devices. [Figure 8] A diagram illustrating the method for manufacturing semiconductor devices. [Figure 9] Top view of the display device. [Figure 10] Cross-sectional view of a display device. [Figure 11] Cross-sectional view of a display device. [Figure 12] Cross-sectional view of a display device. [Figure 13] Cross-sectional view of a display device. [Figure 14] Block diagram and circuit diagram of a display device. [Figure 15] Circuit diagram and timing chart for the display device. [Figure 16] Example configuration of a display module. [Figure 17] Example of an electronic device configuration. [Figure 18] Example of an electronic device configuration. [Figure 19] Example of an electronic device configuration. [Figure 20] Example of an electronic device configuration. [Figure 21] Sheet resistance of metal oxide films. [Figure 22] Sheet resistance of metal oxide films. [Modes for carrying out the invention]

[0026] The embodiments will be described below with reference to the drawings. However, many embodiments are described. It can be implemented in different ways, without deviating from its purpose and scope. Those skilled in the art will readily understand that the form and details can be modified in various ways. Therefore, the present invention This shall not be interpreted as being limited to the contents described in the following embodiments.

[0027] Furthermore, in each figure described herein, the size of each component, the thickness of the layer, or the area This may be exaggerated for the sake of clarity.

[0028] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" used in this specification refer to the constituent elements. This is added to avoid confusion and does not limit the number.

[0029] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of constituent elements. The positional relationships are shown in the diagram for convenience, and also refer to the diagrams. The positional relationship of each element changes appropriately depending on the direction in which each element is depicted. Therefore, The vocabulary is not limited to the terms explained in detail, but can be appropriately rephrased depending on the situation.

[0030] Furthermore, in this specification, the source and drain functions of a transistor are different. When using polarity transistors, or when the direction of current changes during circuit operation, etc. These can be swapped. Therefore, the terms source and drain can be used interchangeably. It is assumed that this is possible.

[0031] In this specification, the channel length direction of a transistor refers to the source region and the drain region. This refers to one of the directions parallel to the straight line connecting two regions by the shortest distance. In other words, channel length. The direction is one of the directions in which current flows through the semiconductor layer when the transistor is ON. It corresponds to. Furthermore, the channel width direction refers to the direction perpendicular to the channel length direction. Note that, Depending on the structure and shape of the transistor, the channel length and channel width directions may be uniquely determined. It may not always be the case.

[0032] Furthermore, in this specification, etc., "electrically connected" means "having some kind of electrical effect." This includes cases where the connection is made via ". Here, "has some electrical effect The term "of" is not particularly limited as long as it enables the exchange of electrical signals between connected objects. For example, "things that have some kind of electrical effect" include electrodes and wiring, as well as transistors. Switching elements such as resistors, inductors, capacitors, and other various functions are available. This includes elements such as [specific components].

[0033] Furthermore, in this specification, the terms "membrane" and "layer" are interchangeable. It is possible to change them. For example, the terms "conductive layer" and "insulating layer" can be replaced with "conductive film" or In some cases, the term "insulating film" can be used interchangeably.

[0034] Furthermore, unless otherwise specified in this specification, off-current refers to the current when the transistor is turned off. This refers to the drain current when the device is in a state (also called a non-conductive state or an interrupted state). Unless otherwise specified, in an n-channel transistor, the voltage between the gate and source is V gs The threshold voltage V th Lower than (in p-channel transistors, V th Higher i) Refers to a state or condition.

[0035] In this specification, a display panel, which is one form of a display device, displays an image or the like on its display surface. It has the function of (powering). Therefore, the display panel is one form of an output device.

[0036] Furthermore, in this specification, the substrate of the display panel may be, for example, FPC (Flexible Printed Circuit). (inted Circuit) or TCP (Tape Carrier Packa A connector such as a ge is attached, or the circuit board has a COG (Chip On A display panel module or display module is a device on which an IC is mounted using a glass or similar method. It may be called a display panel, or simply a display board.

[0037] In this specification, a touch panel, which is one form of a display device, displays images, etc. on its display surface. The display function detects when a finger, stylus, or other object touches, presses, or comes near the display surface. It has the function of a touch sensor that detects things like touching. Therefore, touch panel This is one form of an input / output device.

[0038] A touch panel is, for example, a display panel (or display device) with a touch sensor. It can also be called a display panel (or display device) with a touch function. It can also be configured to have a panel and a touch sensor panel. Alternatively, the display panel The configuration can also include a touch sensor functioning either internally or on its surface.

[0039] Furthermore, in this specification, etc., a touch panel circuit board with connectors and ICs mounted on it is considered to be a touch panel circuit board. It may be called a touch panel module, display module, or simply a touch panel. be.

[0040] (Embodiment 1) This embodiment relates to a semiconductor device, a display device, and a method for manufacturing the same according to one aspect of the present invention. I will explain.

[0041] One aspect of the present invention is a semiconductor layer on which a channel is formed on a surface to be formed, and a gate on the semiconductor layer. A gate insulating layer (also called the first insulating layer) and a conductive layer that functions as the gate electrode on the gate insulating layer. It is a transistor having a semiconductor layer (also called the first conductive layer). The semiconductor layer is a semiconductor special It is preferable that the material be composed of a metal oxide exhibiting properties (hereinafter also referred to as an oxide semiconductor). .

[0042] The gate insulating layer is preferably provided so as to cover a portion of the upper surface of the semiconductor layer. The gate electrode is positioned such that its end is located inside the edge of the gate insulating layer. Preferably, the gate insulating layer is at least on the semiconductor layer, It is preferable that the electrode has a portion that protrudes outward from the end.

[0043] The semiconductor layer has a first region that overlaps with the gate electrode and the gate insulating layer, and a second region that overlaps with the gate insulating layer. A second region that does not overlap with the gate electrode, and a second region that overlaps with both the gate electrode and the gate insulating layer. It has a third region which is not a channel-forming region. The first region is a region which functions as a channel-forming region. The third region is a region with lower resistance than the first region, and is either a source region or a drain region. This is a region that functions as a region. The second region has lower resistance than the first region, and the third region It is preferable that the region has higher resistance than the region mentioned above.

[0044] The second region is the first region, which is a channel-forming region, where the carrier source included in the third region is the first region. It can function as a buffer area to prevent diffusion into the second region. By creating a region, the carrier concentration in the first region, which is the channel-forming region, can be kept extremely low. This can be done. Also, the second area is LDD (Lightly Doped Dr It may function as an ain) region.

[0045] Here, the second and third regions bond with oxygen in the metal oxide, and in the metal oxide It is preferable that it contains an element that can cause oxygen deficiency (also called the first element). Suitable elements include, for example, boron, phosphorus, aluminum, magnesium, and silicon. It can be used in the semiconductor layer. The element exists in a state bonded with oxygen. It is preferable to do so.

[0046] The elements in the second and third regions combine with oxygen in the metal oxide, thus forming a metal Oxygen vacancies occur in the oxide. These oxygen vacancies combine with hydrogen contained in the film. Therefore, as they serve as carrier sources, the second and third regions have lower resistance than the first region. This is the resulting state. Furthermore, it is preferable that the concentration of the element in question is higher in the third region than in the second region. This makes it possible to make the third region have lower resistance than the second region. .

[0047] Furthermore, the portion of the gate insulating layer that is in contact with the second region, that is, the portion superimposed on the gate electrode It is preferable that the above-mentioned first element is also included in the parts that are not present. Furthermore, among the gate insulating layer, The portion in contact with the channel-forming region, that is, the portion superimposed on the gate electrode, contains the first element. It is preferable that it is not added.

[0048] A heat treatment is performed with a gate insulating layer containing oxide in contact with the upper surface of the semiconductor layer. This allows oxygen released from the gate insulating layer to be supplied to the semiconductor layer. This allows for the replenishment of oxygen vacancies in the semiconductor layer, resulting in highly reliable transistors. It is possible.

[0049] On the other hand, when oxygen is supplied to the second region, the carrier density decreases and the electrical resistance increases. This can happen. However, in one aspect of the present invention, the second region of the gate insulating layer is in contact with The aforementioned first element is added to the part. An oxide film that can release oxygen upon heating. By adding the first element mentioned above, the amount of oxygen released can be reduced. This suppresses the supply of oxygen from the gate insulating layer to the second region, and the second region This region can maintain a low electrical resistance.

[0050] This configuration significantly reduces oxygen deficiency and carrier density. A channel-forming region, a source region and a drain region with extremely low electrical resistance, and between them, By incorporating an LDD region, it is possible to realize a semiconductor device with excellent electrical characteristics and high reliability. can.

[0051] Such transistors, for example, use the gate electrode as a mask, and the gate insulating layer and semiconductor After supplying the first element described above to the conductive layer, a heat treatment is performed. It can be manufactured.

[0052] At this time, the supply of the first element is by plasma ion doping or ion implantation. It is preferable to perform these methods because they allow for easier adjustment of the depth to which ions are added. This makes it easier to add ions to the region including the gate insulating layer and the semiconductor layer.

[0053] Furthermore, when adding the first element, the region on the gate insulating layer side of the semiconductor layer, or the semiconductor layer The concentration of the first element near the interface with the gate insulating layer is highest, and the ion supply strip It is preferable to set the number of items. This allows both the semiconductor layer and the gate insulating layer to be processed in a single step. An appropriate concentration of the first element can be added to the second region of the gate insulating layer. By forming a region with a high concentration of the first element in the vicinity, the diffusivity of oxygen in this region becomes effective. This effectively reduces the diffusion of oxygen from the gate insulating layer to the second region, more effectively suppressing it. This is possible. Furthermore, since no gate insulating layer is provided on the third region, By adding the first element at a high concentration to region 3, the resistance is increased, thus separating the low-resistance region from the soaring region. This makes it possible to lower the contact resistance with the suction electrode or drain electrode.

[0054] Furthermore, as mentioned above, if an element that readily bonds with oxygen is used as the first element, the first The elements exist in a state where they are bonded to oxygen in the semiconductor layer. That is, the first element is in the semiconductor layer By removing oxygen, an oxygen vacancy is created in the semiconductor layer, and this oxygen vacancy combines with hydrogen in the film. This generates carriers. Furthermore, the first element in the semiconductor layer is stable in an oxidized state. Because it exists, it does not decompose due to heat during the manufacturing process, and stably achieves a low resistance range. It is possible to achieve temperatures of 400°C or higher, 600°C or higher, or 800°C or higher during the manufacturing process. Even if it is affected, it can maintain a stable low-resistance range.

[0055] Furthermore, it is preferable to use an insulating film containing an oxide as the gate insulating layer. It is preferable that the insulating layer contains oxygen that is released by heating (also called excess oxygen). i. At this time, the first element in the gate insulating layer is bonded with the excess oxygen in the gate insulating layer. It exists in a certain state. The first element is added when excess oxygen combines with the first element and stabilizes. In the affected region, even with heating, almost no oxygen is released, or oxygen does not diffuse. This creates a pile-like state. As a result, oxygen is supplied from the gate insulating layer to the second region. By preventing increased resistance while supplying oxygen to the channel formation region (first region), This reduces oxygen deficiency. As a result, it produces transistors with good electrical characteristics and high reliability. It can be achieved.

[0056] The first element is one that combines with oxygen in the semiconductor layer and the gate insulating layer to stabilize it. It is preferable to use an element whose oxide can exist as a solid under standard conditions. This is preferable. Particularly preferred elements include noble gases, typical nonmetal elements other than hydrogen, and typical gold. It can be selected from group elements and transition metal elements. In particular, boron, phosphorus, aluminum It is preferable to use materials such as magnesium, silicon, etc.

[0057] By the way, supplying dopants to thin films or bulk silicon to make silicon n-type Techniques for converting to p-type or p-type are known. This technique involves either a donor or an acceptor. This method controls carrier density by substituting dopants at the sites of silicon atoms. Yes, for example, phosphorus and arsenic in silicon function as donors, thus imparting n-type conductivity. This is possible because boron and aluminum in silicon act as acceptors. Conductivity can be imparted to the mold. Thus, in silicon, depending on the type of dopant... This allows for control over the polarity of the conductive material.

[0058] On the other hand, in one aspect of the present invention, the first element is formed in the film by extracting oxygen from the metal oxide. It acts to create an oxygen deficiency, and this oxygen deficiency combines with hydrogen in the membrane, forming a carrier Therefore, the first element itself vibrates as a donor or acceptor in the metal oxide. It is not required to dance. For example, boron and aluminum, which are not used in silicon, are not used in accessories. Even elements that function as ions, like phosphorus, can impart n-type conductivity to metal oxides. It can be given. In this respect, the function required of the first element is that of silicon. This is completely different from the functions required of a Dopant.

[0059] Furthermore, it is preferable that the third region contains more hydrogen than the first and second regions. This makes it possible to make the third region even less resistant than the second region. Furthermore, even if the third region contains a large amount of hydrogen, the second region is established, thus the first region This effectively suppresses the diffusion of hydrogen into the region. The filament formation region has an extremely low carrier density, and the source and drain regions have extremely low resistance. This state allows for the creation of transistors with excellent electrical characteristics.

[0060] One method for supplying hydrogen to the third region is, for example, a hydrogen-containing film (also known as the second insulating layer). It is preferable to place the (referred to as) in contact with the third region and perform the heat treatment in that state. At that time, a first insulating layer is provided in contact with the upper surface of the second region, and the second region and the second insulating layer Because the two regions do not come into contact, the hydrogen concentration in the second region can be made lower than that in the third region. can.

[0061] Alternatively, using the gate electrode as a mask, ion doping or ion implantation, or hydrogen-containing Hydrogen may be supplied to the semiconductor layer by methods such as heat treatment under a specific atmosphere. Even if combined, since the first insulating layer is provided on the second region, the supply into the second region The concentration of hydrogen can be made lower than in the third region.

[0062] In other words, the second region is a region in which the concentration of the first element is lower than that of the third region, and Since it is a region with a small amount of oxygen deficiency and a low concentration of hydrogen, the second region This region has a lower carrier concentration and is considered a high-resistance region compared to the third region.

[0063] Alternatively, the third region is heat-treated while the first layer is covering the third region. It is preferable that the region is made low-resistance by applying this treatment.

[0064] The first layer consists of aluminum, titanium, tantalum, tungsten, chromium, and A film containing at least one metallic element such as thenium can be used. In particular, aluminum It is preferable that it contains at least one of um, titanium, tantalum, and tungsten. This includes nitrides containing at least one of these metallic elements, or at least one of these metallic elements. Oxides containing the above can be suitably used.

[0065] For example, nitrides such as aluminum nitride film, titanium aluminum nitride film, and titanium nitride film. Films, such as oxide films like aluminum titanium oxide films, can be suitably used. Metal films such as tungsten films and titanium films may also be used.

[0066] For example, when using an aluminum titanium nitride film, the composition formula is AlTiN x (x is greater than 0) (A real number less than or equal to 3), or a chemical formula of AlTi x N y (x is a real number greater than 0 and less than or equal to 2, It is more preferable to use a film that satisfies the condition y is a real number greater than 0 and less than or equal to 4.

[0067] Furthermore, a higher heat treatment temperature is preferable because it promotes the reduction of resistance in the third region. The heat treatment temperature should be determined considering factors such as the heat resistance of the gate electrode. For example, 150°C Above 500°C or below, preferably 200°C to 450°C, more preferably above 250°C The temperature can be 450°C or lower, and more preferably 300°C to 400°C. For example, by setting the heat treatment temperature to around 350°C, production equipment using large glass substrates can be used. This allows for the production of semiconductor devices with a high yield.

[0068] By performing a heat treatment with the first layer in contact with the third region, the third region Oxygen is drawn into the first layer, and many oxygen deficiencies can be formed in the third region. This allows for the formation of a third region with extremely low resistance. On the other hand, on the second region, Since an insulating layer 1 is provided and the first layer and the second region do not come into direct contact, oxygen does not directly come into contact with the first layer. It is not attracted by contact. As a result, a third region with significantly lower resistance than the second region is formed. It is possible.

[0069] The third region formed in this way has the characteristic of being less likely to become highly resistive in subsequent processing. For example, heat treatment in an oxygen-containing atmosphere, or film deposition treatment in an oxygen-containing atmosphere. Even if this is done, there is no risk of impairing the conductivity of the third region, so the electrical characteristics are good, and This enables the creation of highly reliable transistors.

[0070] Furthermore, if the first layer after heat treatment is conductive, the first layer after heat treatment It is preferable to remove it. On the other hand, if the first layer has insulating properties, it is preferable to leave it. This allows the first layer to function as a protective insulating film (second insulating layer).

[0071] In particular, the aluminum nitride film or titanium aluminum nitride film mentioned above has excellent insulating properties. Since it is a film, it is preferable to leave it intact.

[0072] Below, we will explain more specific examples with reference to the diagrams.

[0073] [Configuration Example 1] Figure 1(A) is a top view of transistor 100, and Figure 1(B) is shown in Figure 1(A). This corresponds to a cross-sectional view of the section along the dashed line A1-A2, and Figure 1(C) is shown in Figure 1(A). This corresponds to a cross-sectional view of the cross-section along the dashed line B1-B2. Note that in Figure 1(A), Some of the components of the transistor 100 (such as the protective insulating layer) are omitted in the illustration. The direction of the dashed line A1-A2 is in the channel length direction, and the direction of the single dashed line B1-B2 is in the channel width direction. This applies. Furthermore, the top view of the transistor will be the same as in Figure 1(A) in subsequent drawings. As shown, some of the components will be omitted in the diagram.

[0074] The transistor 100 is provided on the substrate 102 and has an insulating layer 103, a semiconductor layer 108, and an insulating layer 103. It has an edge layer 110, a metal oxide layer 114, a conductive layer 112, an insulating layer 116, an insulating layer 118, etc. The island-shaped semiconductor layer 108 is provided on the insulating layer 103. The insulating layer 110 is provided on the insulating layer 1 It is provided covering a portion of the upper surface of 03 and a portion of the upper surface of the semiconductor layer 108. 114 and the conductive layer 112 are stacked in this order on the insulating layer 110, and the semiconductor layer 108 It has a portion that overlaps with it. Also, in a plan view, the metal oxide layer 114 and the conductive layer 112 are It is provided so as to be located inside the edge of the insulating layer 110. The insulating layer 116 is conductive The top and sides of layer 112, the sides of metal oxide layer 114, the top and sides of insulating layer 110, and half It is provided covering the upper and side surfaces of the conductor layer 108 and the upper surface of the insulating layer 103. Layer 118 is provided covering the insulating layer 116.

[0075] A portion of the conductive layer 112 functions as a gate electrode. A portion of the insulating layer 110 functions as a gate insulating layer. It functions as a marginal layer. Transistor 100 has a gate electrode provided on semiconductor layer 108. This is a so-called top-gate type transistor.

[0076] Furthermore, as shown in Figures 1(A) and (B), the transistor 100 is connected to the insulating layer 118. It may have an electrical layer 120a and a conductive layer 120b. b functions as either a source electrode or a drain electrode. Conductive layer 120a and conductive layer 120b These are openings 141a or 1 in the insulating layer 118 and insulating layer 116, respectively. 41b is electrically connected to region 108N, which will be described later.

[0077] The semiconductor layer 108 preferably contains a metal oxide.

[0078] For example, semiconductor layer 108 is made of indium and M (where M is gallium, aluminum, and silicon). N, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel Germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium (One or more elements selected from luminous, tantalum, tungsten, or magnesium), It is preferable that it contains zinc. In particular, M is aluminum, gallium, yttrium, or It is preferable to use one or more types selected from tin.

[0079] In particular, an oxide containing indium, gallium, and zinc is used as the semiconductor layer 108. It is preferable.

[0080] The semiconductor layer 108 consists of layers with different compositions, layers with different crystallinity, or layers with different impurity concentrations. A laminated structure in which layers are stacked may also be used.

[0081] The conductive layer 112 and the metal oxide layer 114 are processed so that their upper surface shapes are roughly identical to each other. It is being done.

[0082] In this specification, "approximately matching top surface shape" means that there is a small difference between the stacked layers. This refers to the overlapping of parts of the outlines. For example, the upper layer and the lower layer may have the same mask pattern. , or including cases where part of it is processed with the same mask pattern. However, strictly speaking, ring The outlines do not overlap, the outline of the upper layer is located inside the outline of the lower layer, or the outline of the upper layer is inside the outline of the lower layer It may also be located outside the contour, in which case it is also said that "the top shape is roughly the same."

[0083] The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 is in the insulating layer 110. It functions as a barrier film that prevents the contained oxygen from diffusing to the conductive layer 112. The oxide layer 114 allows hydrogen and water contained in the conductive layer 112 to diffuse towards the insulating layer 110. It also functions as a barrier film to prevent this. The metal oxide layer 114 is, for example, at least the insulating layer 11 Materials that are less permeable to oxygen and hydrogen than 0 can be used.

[0084] The metal oxide layer 114 makes it easier for the conductive layer 112 to attract oxygen such as aluminum and copper. Even when using a metallic material, oxygen will diffuse from the insulating layer 110 to the conductive layer 112. This can prevent the conductive layer 112 from containing hydrogen. This prevents hydrogen from diffusing from the insulating layer 110 to the semiconductor layer 108. As a result, the carrier density in the channel formation region of the semiconductor layer 108 is made extremely low. It is possible.

[0085] As the metal oxide layer 114, an insulating material or a conductive material can be used. If the oxide layer 114 has insulating properties, it functions as part of the gate insulating layer. If the metal oxide layer 114 is conductive, it functions as part of the gate electrode.

[0086] As the metal oxide layer 114, an insulating material with a higher dielectric constant than silicon oxide is used. This is preferred. In particular, an aluminum oxide film, a hafnium oxide film, or a hafnium aluminum film is preferred. Using a film or similar material is preferable because it allows for a reduction in the driving voltage.

[0087] For example, the metal oxide layer 114 may be indium oxide or indium tin oxide (ITO). or conductive oxides such as silicon-containing indium tin oxide (ITSO) It can also be used. Conductive oxides containing indium are particularly preferred due to their high conductivity. .

[0088] As the metal oxide layer 114, an oxide material containing one or more of the same elements as the semiconductor layer 108 is used. It is preferable to use an oxide semiconductor material applicable to the semiconductor layer 108. Preferably, the metal oxide layer 114 is made using the same sputtering process as the semiconductor layer 108. By applying a metal oxide film formed using a ring target, the equipment can be standardized. Therefore, it is preferable.

[0089] Alternatively, both the semiconductor layer 108 and the metal oxide layer 114 may contain indium and gallium. When using metal oxide materials, the gallium composition (content) is higher than that of semiconductor layer 108. Using a suitable material is preferable because it can further enhance the blocking properties against oxygen. At this time, the semiconductor layer 108 contains a material with a higher indium composition than the metal oxide layer 114. By using this material, the field-effect mobility of transistor 100 can be increased.

[0090] Furthermore, the metal oxide layer 114 is preferably formed using a sputtering apparatus. When forming an oxide film using a sputtering apparatus, the film is formed in an atmosphere containing oxygen gas. This allows for the appropriate addition of oxygen to the insulating layer 110 and the semiconductor layer 108.

[0091] The semiconductor layer 108 overlaps with the conductive layer 112 via the insulating layer 110, forming a channel-forming region. It has. Furthermore, the semiconductor layer 108 has a pair of regions 108L that sandwich the channel formation region, It has a pair of regions 108N on its outside. Region 108L is part of the semiconductor layer 108, This region overlaps with the margin layer 110 but does not overlap with the conductive layer 112. Also, region 108N This is a region of the semiconductor layer 108 that does not overlap with either the conductive layer 112 or the insulating layer 110. This is the region that is in contact with the insulating layer 116.

[0092] Regions 108L and 108N are regions with lower resistance and higher carrier concentration than the channel-forming region. Regions with high degree of oxygen deficiency, regions with high oxygen deficiency density, regions with high impurity concentration, or n-type regions It can also be said that region 108N is a region with lower resistance than region 108L. Regions with high riac concentration, regions with high oxygen vacancy density, regions with high impurity concentration, or n-type It can also be called a domain.

[0093] Regions 108L and 108N are regions containing impurity elements (the first element). Examples of impurity elements include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, and Examples include luminium, magnesium, or noble gases. A representative example of a noble gas is... These include helium, neon, argon, krypton, and xenon. In particular, boron, Preferably, it contains phosphorus, magnesium, or aluminum. Also, it may contain two or fewer of these elements. It may include the above.

[0094] Region 108N may have a region where the concentration of the above-mentioned impurities is higher than that of region 108L. Furthermore, region 108N has a peak in impurity concentration at a deeper position than region 108L. It's okay to be there.

[0095] The insulating layer 103 and insulating layer 110 that are in contact with the channel formation region of the semiconductor layer 108 contain oxide It is preferable to use a film. For example, a silicon oxide film, a silicon oxide nitride film, or aluminum oxide. Oxide films such as nium films can be used. This allows for the fabrication of transistor 100. During the process, oxygen detached from the insulating layer 103 and insulating layer 110 is removed from the semiconductor layer 1 It can be supplied to the channel formation region of 08, reducing oxygen vacancies in the semiconductor layer 108. .

[0096] A portion of the edge of the insulating layer 110 is located on the semiconductor layer 108. The insulating layer 110 is a conductive A region that overlaps with the conductive layer 112 and functions as a gate insulating layer, and a region that does not overlap with the conductive layer 112. It has a portion (i.e., the portion that overlaps with region 108L).

[0097] The insulating layer 110 contains the aforementioned impurity elements in a region that does not overlap with the conductive layer 112. It has 10d. Region 110d is located at least near the interface with region 108L. Furthermore, as shown in Figures 1(B) and (C), region 110d is the channel of semiconductor layer 108. It is preferable that it is not provided in the portion that is in contact with the formation region.

[0098] Furthermore, in regions where the insulating layer 103 does not overlap with the conductive layer 112, the boundary between the insulating layer 110 and the insulating layer 110 is The region 103d containing the aforementioned impurity elements is located near the surface and near the interface with the insulating layer 116. Although not shown in the diagram, region 103d is near the interface with region 108N and region 108L. It may also be provided on the side. In this case, the portion that overlaps with region 108N and region 108L The impurity concentration will be lower than that of the portion in contact with the insulating layer 110 or the insulating layer 116.

[0099] Here, the impurity concentration in region 108L increases as it gets closer to the insulating layer 110. It is preferable to have such a concentration gradient. This allows for uniformity throughout the entire region 108L. Compared to the case where concentration is used, the total amount of impurity elements within the region 108L can be reduced, thus improving the manufacturing process. The amount of impurities that can diffuse into the channel-forming region due to the influence of moderate heat and other factors can be kept low. Cut.

[0100] Region 108N may also have a similar concentration gradient. Since the resistance is lower towards the top, the contact resistance with conductive layer 120a (or conductive layer 120b) is... It can be reduced more effectively.

[0101] Furthermore, the impurity concentration in region 110d increases as it gets closer to the semiconductor layer 108. It is preferable to have such a concentration gradient. Apply an oxide film that can release oxygen by heating. In the insulating layer 110, in the region 110d where the aforementioned impurity elements are added, other regions Compared to this, the release of oxygen can be suppressed. Therefore, the region 108L of the insulating layer 110 Region 110d, located near the interface, functions as a blocking layer against oxygen, and region 1 This effectively reduces the amount of oxygen supplied to the 0.8L tank.

[0102] As described later, impurity elements are added to regions 108L, 108N, and 110d. This process can be carried out using the conductive layer 112 as a mask. This allows region 108L, The regions 108N and 110d can be formed self-aligned. Also, at this time , since the insulating layer 110 is provided on the region 108L, the impurity concentration profile in the depth direction may be different between the region 108N and the region 108L.

[0103] In FIGS. 1(B), (C), etc., in order to exaggerate the portion with a high impurity concentration, a hatching pattern is shown as the region 110d or the region 103d in a part of the insulating layer 110 and the insulating layer 103. However, actually, the above impurity elements may be contained throughout the thickness direction of the insulating layer 110 and the insulating layer 103.

[0104] The regions 108N, 108L, and 110d each have an impurity concentration of 1×10 1 9 atoms / cm 3 or more and 1×10 23 atoms / cm 3 or less, preferably 5×10 19 atoms / cm 3 or more and 5×10 22 atoms / cm 3 or less, more preferably 1 ×10 20 atoms / cm 3 or more and 1×10 22 atoms / cm 3 or less, and it is preferable to include such regions. Also, when the region 108L has a portion with a higher impurity concentration than the region 110d of the insulating layer 110, the electrical resistance of the region 108L can be more effectively reduced to a low resistance, which is preferable. Also, it is more preferable that the region 108N has a portion with a higher impurity concentration than the region 108L.

[0105] The concentrations of impurities contained in regions 108L, 108N, and 110d are, for example, secondary Secondary Ion Mass Spectrometry (SIMS) (metry) and X-ray photoelectron spectroscopy (XPS) Analysis can be performed using analytical methods such as spectroscopy. If necessary, combine ion sputtering from the front or back side with XPS analysis. By doing so, the concentration distribution in the depth direction can be determined.

[0106] Furthermore, in regions 108L and 108N, impurity elements exist in an oxidized state. It is preferable that they be present. For example, boron, phosphorus, magnesium, aluminum as impurity elements. It is preferable to use easily oxidizable elements such as silicon. Since the elements can exist stably in an oxidized state by bonding with oxygen in semiconductor layer 108, High temperatures (e.g., 400°C or higher, 600°C or higher, or 800°C or higher) were applied during the process. Even in such cases, desorption is suppressed. Furthermore, impurity elements are acid in semiconductor layer 108. By removing oxygen, many oxygen deficiencies are created in regions 10⁸L and 10⁸N. Because oxygen deficiency and hydrogen in the membrane combine to become a carrier source, region 108L and The region 108N exhibits extremely low resistance.

[0107] Furthermore, when performing processes that involve high temperatures in later stages, the external area and region 108L and region 10 If a large amount of oxygen is supplied to regions 108L and 108N from the membrane near 8N, Resistance may increase. Therefore, when performing processes involving high temperatures, acid Processing is performed with the semiconductor layer 108 covered by an insulating layer 116 that has a high barrier to the element. preferable.

[0108] Furthermore, in region 110d, it is preferable that impurity elements exist in an oxidized state. Such easily oxidized elements combine with oxygen in the insulating layer 110 and remain in an oxidized state. Because it can exist stably, desorption is suppressed even when high temperatures are applied in subsequent processes. Furthermore, the insulating layer 110 contains oxygen (also called excess oxygen) that can be released by heating. In this case, the excess oxygen and the impurity element combine and stabilize, so from region 110d This can suppress the supply of oxygen to region 108L. Region 110d, which contains pure elements, is a state where oxygen does not easily diffuse, therefore region 110d This also prevents oxygen from being supplied to region 108L from above through region 110d. It is possible.

[0109] For example, when boron is used as an impurity element, the regions 10⁸L and 10⁸N and Boron contained in region 110d can exist in a state of being bonded with oxygen. This is because of the XPS component. This can be confirmed by the observation of spectral peaks attributable to the B2O3 bond during analysis. Furthermore, in XPS analysis, the spectral pea caused by the element boron existing in its elemental form... The peak is not observed, or is buried in the background noise below the lower limit of the measurement. The strength becomes extremely low.

[0110] The insulating layer 116 is provided in contact with region 108N of the semiconductor layer 108.

[0111] The insulating layer 116 functions as a hydrogen source for region 108N. For example, the insulating layer 116 is preferably a film that releases hydrogen upon heating. Such an insulating layer 116 By providing it in contact with region 108N and performing a heat treatment after the formation of the insulating layer 116, region 1 The resistance of O8N can be reduced by supplying it with hydrogen.

[0112] The insulating layer 116 is formed using a gas containing hydrogen as the deposition gas during film formation. It is preferable that the film is such that water does not form in the region 108N during the formation of the insulating layer 116. It can effectively supply the raw materials.

[0113] Examples of insulating layer 116 include silicon nitride, silicon nitride oxide, and silicon oxide nitride. Insulating films such as aluminum nitride and aluminum nitride oxide can be used.

[0114] Region 10⁸N is a state containing many oxygen vacancies due to the addition of impurity elements as described above. Therefore, in addition to the hydrogen contained in the semiconductor layer 108, further hydrogen is also obtained from the insulating layer 116. By supplying hydrogen, the carrier density can be further increased.

[0115] On the other hand, region 108L does not come into contact with the insulating layer 116 because the insulating layer 110 is present in between. Therefore, less hydrogen is supplied than in the 10⁸N region. Furthermore, the impurity concentration is also lower than in the 10⁸N region. Because the resistance is also low, region 108L can be made to have a higher resistance than region 108N.

[0116] Alternatively, an insulating film containing nitride may be used as the insulating layer 116 in contact with region 108N. This can be achieved. By providing an insulating layer 116 containing nitride in contact with region 108N, region 10 This has the effect of further enhancing the conductivity of 8N. Furthermore, the insulating layer 116 is in contact with region 108N. Performing heat treatment in this state is preferable because it promotes further reduction of resistance.

[0117] As nitrides applicable to the insulating layer 116, for example, nitrides of semiconductor materials such as silicon nitride and gallium nitride, or metal nitrides such as aluminum nitride are particularly preferably used. For example, silicon nitride has a blocking property against hydrogen and oxygen, and thus can prevent both the diffusion of hydrogen from the outside to the semiconductor layer and the desorption of oxygen from the semiconductor layer to the outside, realizing a highly reliable transistor. For example, silicon nitride has a blocking property against hydrogen and oxygen, and thus can prevent both the diffusion of hydrogen from the outside to the semiconductor layer and the desorption of oxygen from the semiconductor layer to the outside, realizing a highly reliable transistor. から半導体層への水素の拡散と、半導体層から外部への酸素の脱離の両方を防ぐことができる。 き、信頼性の高いトランジスタを実現できる。

[0118] When using a metal nitride, it is preferable to use a nitride of aluminum, titanium, tantalum, tungsten, chromium, or ruthenium. Particularly, it is particularly preferable to contain aluminum or titanium. When using a metal nitride, it is preferable to use a nitride of aluminum, titanium, tantalum, tungsten, chromium, or ruthenium. Particularly, it is particularly preferable to contain aluminum or titanium. For example, when using aluminum as a sputtering target and using a gas containing nitrogen as a film-forming gas, an aluminum nitride film formed by a reactive sputtering method can have extremely high insulation and extremely high blocking properties against hydrogen and oxygen by appropriately controlling the flow rate of nitrogen gas with respect to the total flow rate of the film-forming gas. い、成膜ガスとして窒素を含むガスを用いた反応スパッタリング法により形成した窒化ア ルミニウム膜は、成膜ガスの全流量に対する窒素ガスの流量を適切に制御することで、極 めて高い絶縁性と、水素や酸素に対する極めて高いブロッキング性とを兼ね備えた膜とす ることができる。そのため、このような金属窒化物を含む絶縁膜を、半導体層に接して設 けることで、半導体層を低抵抗化できるだけでなく、半導体層から外部へ酸素が拡散する こと、及び半導体層へ水素が拡散することを好適に防ぐことができる。

[0119] When using aluminum nitride as the metal nitride, it is preferable that the thickness of the insulating layer containing the aluminum nitride is 5 nm or more. Even such a thin film can achieve both high blocking properties against hydrogen and oxygen and the function of reducing the resistance of the semiconductor layer. When using aluminum nitride as the metal nitride, it is preferable that the thickness of the insulating layer containing the aluminum nitride is 5 nm or more. Even such a thin film can achieve both high blocking properties against hydrogen and oxygen and the function of reducing the resistance of the semiconductor layer. 素に対する高いブロッキング性と、半導体層の低抵抗化の機能とを両立できる。なお、当 The thickness of the insulating layer can be any thickness, but considering productivity, it is preferably 500 nm or less. It is preferable that the wavelength be 200 nm or less, and more preferably 50 nm or less.

[0120] When an aluminum nitride film is used for the insulating layer 116, the composition formula is AlN x (x is greater than 0) A film is used that satisfies the condition x is a real number less than or equal to 2, preferably a real number greater than 0.5 and less than or equal to 1.5. It is preferable to have this. This makes it possible to create a film with excellent insulating properties and excellent thermal conductivity. Therefore, the heat dissipation of the heat generated when driving transistor 100 can be improved. ru.

[0121] Alternatively, an aluminum titanium nitride film, a titanium nitride film, or the like can be used as the insulating layer 116. It is possible.

[0122] By providing such an insulating layer 116 in contact with region 108N, the insulating layer 116 is in contact with region 1 By aspirating oxygen from the 08N region, an oxygen deficiency can be formed within the 108N region. In this case, if a film containing a metal oxide is used for the insulating layer 116, the insulating layer 116 and region 108N Between them is a layer containing an oxide of a metal element (e.g., aluminum) included in the insulating layer 116. It may form.

[0123] Here, when a metal oxide film containing indium is used as the semiconductor layer 108, region 1 A region where indium oxide is deposited near the interface on the insulating layer 116 side of 08N, or indium In some cases, regions with high um concentrations may be formed. The presence of such regions is, for example, X X-ray Photoelectron Spectros (XPS) It may be possible to observe this using analytical methods such as (copy).

[0124] Thus, region 108N is a region that contains more oxygen deficiency compared to region 108L. Because this is possible, it is possible to create a region with lower resistance than region 108L. Furthermore, By using an insulating film containing a metal oxide as the edge layer 116, an insulating layer 116 of region 108N is formed. A region of highly conductive indium oxide precipitates near the interface on the side, further reducing resistance. It can be considered a domain.

[0125] The insulating layer 118 functions as a protective layer to protect the transistor 100. For example, inorganic insulating materials such as oxides or nitrides can be used. Specific examples include silicon nitride, silicon oxide nitride, silicon oxide nitride, and aluminum oxide. Aluminum oxide, aluminum nitride, aluminum nitride, hafnium oxide, aluminum hafnium Inorganic insulating materials such as nate can be used. Also, the insulating layer 118 can be used as a planarization layer. It can also be used. In that case, an organic resin material can be used as the insulating layer 118. .

[0126] Here, we show a case where the protective layer is a laminated structure consisting of insulating layer 116 and insulating layer 118. However, the insulating layer 118 does not need to be provided if it is not required. Also, the insulating layer 118 can be made in two or more layers. A laminated structure is also acceptable.

[0127] Here, regarding the semiconductor layer 108 and the oxygen vacancies that may be formed in the semiconductor layer 108... I will explain.

[0128] Oxygen vacancies formed in the channel formation region of semiconductor layer 108 affect transistor characteristics. This becomes a problem because it gives. For example, if an oxygen vacancy is formed in the semiconductor layer 108, the oxygen Hydrogen can bond to the defect to become a carrier source. A carrier source is generated in the channel formation region. When this occurs, fluctuations in the electrical characteristics of transistor 100, typically a shift in the threshold voltage, occur. Therefore, in the channel formation region, it is preferable that the oxygen deficiency is less. .

[0129] Therefore, in one aspect of the present invention, the insulating film near the channel formation region of the semiconductor layer 108, specifically, the insulating layer 110 located above the channel formation region and the insulating layer 103 located below have a configuration including an oxide film. By moving oxygen from the insulating layer 103 and the insulating layer 110 to the channel formation region due to heat during the manufacturing process, etc., it becomes possible to reduce the oxygen deficiency in the channel formation region. Specifically, the insulating layer 110 located above the channel formation region and the insulating layer 103 located below have a configuration including an oxide film. By moving oxygen from the insulating layer 103 and the insulating layer 110 to the channel formation region due to heat during the manufacturing process, etc., it becomes possible to reduce the oxygen deficiency in the channel formation region. Specifically, the insulating layer 110 located above the channel formation region and the insulating layer 103 located below have a configuration including an oxide film. By moving oxygen from the insulating layer 103 and the insulating layer 110 to the channel formation region due to heat during the manufacturing process, etc., it becomes possible to reduce the oxygen deficiency in the channel formation region. Specifically, the insulating layer 110 located above the channel formation region and the insulating layer 103 located below have a configuration including an oxide film. By moving oxygen from the insulating layer 103 and the insulating layer 110 to the channel formation region due to heat during the manufacturing process, etc., it becomes possible to reduce the oxygen deficiency in the channel formation region. Specifically, the insulating layer 110 located above the channel formation region and the insulating layer 103 located below have a configuration including an oxide film. By moving oxygen from the insulating layer 103 and the insulating layer 110 to the channel formation region due to heat during the manufacturing process, etc., it becomes possible to reduce the oxygen deficiency in the channel formation region.

[0130] Further, the semiconductor layer 108 preferably has a region where the atomic ratio of In to M is greater than 1. The higher the In content, the more the field-effect mobility of the transistor can be improved. Further, the semiconductor layer 108 preferably has a region where the atomic ratio of In to M is greater than 1. The higher the In content, the more the field-effect mobility of the transistor can be improved. Further, the semiconductor layer 108 preferably has a region where the atomic ratio of In to M is greater than 1. The higher the In content, the more the field-effect mobility of the transistor can be improved.

[0131] Here, in the case of a metal oxide containing In, Ga, and Zn, the bonding force between In and oxygen is weaker than the bonding force between Ga and oxygen. Therefore, when the In content is high, oxygen deficiency is likely to be formed in the metal oxide film. Also, when the metal element represented by M is used instead of Ga, there is a similar tendency. When there is a large amount of oxygen deficiency in the metal oxide film, the electrical characteristics of the transistor deteriorate and the reliability decreases. Here, in the case of a metal oxide containing In, Ga, and Zn, the bonding force between In and oxygen is weaker than the bonding force between Ga and oxygen. Therefore, when the In content is high, oxygen deficiency is likely to be formed in the metal oxide film. Also, when the metal element represented by M is used instead of Ga, there is a similar tendency. When there is a large amount of oxygen deficiency in the metal oxide film, the electrical characteristics of the transistor deteriorate and the reliability decreases. Here, in the case of a metal oxide containing In, Ga, and Zn, the bonding force between In and oxygen is weaker than the bonding force between Ga and oxygen. Therefore, when the In content is high, oxygen deficiency is likely to be formed in the metal oxide film. Also, when the metal element represented by M is used instead of Ga, there is a similar tendency. When there is a large amount of oxygen deficiency in the metal oxide film, the electrical characteristics of the transistor deteriorate and the reliability decreases. Here, in the case of a metal oxide containing In, Ga, and Zn, the bonding force between In and oxygen is weaker than the bonding force between Ga and oxygen. Therefore, when the In content is high, oxygen deficiency is likely to be formed in the metal oxide film. Also, when the metal element represented by M is used instead of Ga, there is a similar tendency. When there is a large amount of oxygen deficiency in the metal oxide film, the electrical characteristics of the transistor deteriorate and the reliability decreases. Here, in the case of a metal oxide containing In, Ga, and Zn, the bonding force between In and oxygen is weaker than the bonding force between Ga and oxygen. Therefore, when the In content is high, oxygen deficiency is likely to be formed in the metal oxide film. Also, when the metal element represented by M is used instead of Ga, there is a similar tendency. When there is a large amount of oxygen deficiency in the metal oxide film, the electrical characteristics of the transistor deteriorate and the reliability decreases.

[0132] However, in one aspect of the present invention, since an extremely large amount of oxygen can be supplied into the channel formation region of the semiconductor layer 108 containing a metal oxide, a metal oxide material with a high In content can be used. However, in one aspect of the present invention, since an extremely large amount of oxygen can be supplied into the channel formation region of the semiconductor layer 108 containing a metal oxide, a metal oxide material with a high In content can be used. This makes it possible to achieve extremely high field effect mobility and stable electrical characteristics. This makes it possible to create transistors that combine high reliability with superior performance.

[0133] For example, if the atomic ratio of In to M is 1.5 or more, or 2 or more, or 3 or more, Metal oxides with a coefficient of 3.5 or higher, or 4 or higher, can be suitably used.

[0134] In particular, the ratio of the number of In, M, and Zn atoms in semiconductor layer 108 is In:M:Zn=4:2 :3 or a similar ratio is preferable. Alternatively, the ratio of the number of atoms of In, M, and Zn is It is preferable that In:M:Zn = 5:1:6 or a similar ratio. Also, semiconductor layer 108 As for the composition, the ratio of the number of In, M, and Zn atoms in the semiconductor layer 108 may be made approximately equal. i. That is, the ratio of the number of atoms of In, M, and Zn is In:M:Zn=1:1:1 or It may also contain materials in the vicinity.

[0135] For example, a transistor with high field-effect mobility as described above can be used to generate a gate signal. By using it in the driver, it is possible to provide a display device with a narrow bezel (also called a narrow bezel). Furthermore, transistors with high field-effect mobility are used as source drivers (especially source drivers). This is used in a demultiplexer connected to the output terminal of the shift register that the driver has. This makes it possible to provide a display device with a small number of wires connected to it.

[0136] Furthermore, the semiconductor layer 108 has a region where the atomic ratio of In to M is greater than 1. However, if the crystallinity of semiconductor layer 108 is high, the field-effect mobility may be low. The crystallinity of layer 108 can be measured, for example, by X-ray diffraction (XRD). Analysis is performed using an ion, or by using a transmission electron microscope (TEM). This can be analyzed using an ion electron microscope. .

[0137] Here, the channel formation region of the semiconductor layer 108 has a low impurity concentration and a low defect level density. By reducing oxygen deficiency, the carrier density in the membrane can be lowered. In transistors that use such metal oxide films in the channel formation region of the semiconductor layer, the threshold It rarely exhibits electrical characteristics where the voltage value is negative (also known as normally-on). Furthermore, transistors using such metal oxide films exhibit the characteristic of having a remarkably low off-current. It is possible.

[0138] When a highly crystalline metal oxide film is used for the semiconductor layer 108, during processing of the semiconductor layer 108, Damage during the deposition of the insulating layer 110 can be suppressed, enabling the creation of highly reliable transistors. This can be achieved. On the other hand, by using a metal oxide film with relatively low crystallinity for the semiconductor layer 108, This improves air conductivity and enables the creation of transistors with high field-effect mobility.

[0139] The semiconductor layer 108 is a CAAC (c-axis aligned crystal) as described later. Metal oxide film having a stal (metal) structure, nc (nano crystal) structure Using a metal oxide film, or a metal oxide film containing a mixture of CAAC and nc structures. preferable.

[0140] Furthermore, the semiconductor layer 108 may have a stacked structure of two or more layers.

[0141] For example, a semiconductor layer 108 made by stacking two or more metal oxide films with different compositions can be used. Yes, it is possible. For example, when using In-M-Zn oxide, the number of atoms of In, M, and Zn The ratio is In:M:Zn=5:1:6, In:M:Zn=4:2:3, In:M:Zn=1 :1:1, In:M:Zn=2:2:1, In:M:Zn=1:3:4, In:M:Zn Among the films formed on a sputtering target with a ratio of 1:3:2, or in the vicinity thereof, It is preferable to use two or more stacked together.

[0142] Furthermore, a semiconductor layer 108 made by stacking two or more metal oxide films with different crystallinity properties can be used. Yes, it is possible. In that case, by using the same oxide target and changing the film deposition conditions, it is possible to create a film in the atmosphere. It is preferable that the material be formed continuously without touching it.

[0143] At this time, the semiconductor layer 108 is a metal oxide film having an nc structure and a CAAC structure It can be a layered structure of metal oxide films having an nc structure. A laminated structure of a material film and a metal oxide film having an nc structure may also be used. The function of a metal oxide or material structure that can be suitably used in a and semiconductor layer 108b Regarding the formation, see the CAC (Cloud-Aligned Composite) described later. The information provided can be used as a reference.

[0144] For example, the oxygen flow rate ratio during the formation of the first metal oxide film, which is formed earlier, is used for the second film, which is formed later. The oxygen flow rate ratio during deposition of the metal oxide film is made smaller than that of the first metal oxide film. During film formation, conditions are set so that no oxygen is flowed. This prevents acid from entering during the formation of the second metal oxide film. It can effectively supply the element. Also, the first metal oxide film is more efficient than the second metal oxide film. It is possible to create a film with low crystallinity and high electrical conductivity. On the other hand, the upper part By making the metal oxide film 2 a film with higher crystallinity than the first metal oxide film, semiconductor layer 1 This can suppress damage during the processing of 08 and during the deposition of the insulating layer 110.

[0145] More specifically, the oxygen flow rate ratio during the deposition of the first metal oxide film is set to 0% or more and less than 50%. Preferably 0% to 30%, more preferably 0% to 20%, and typically 10%. Furthermore, the oxygen flow rate ratio during the deposition of the second metal oxide film should be between 50% and 100%, which is preferable. More preferably 60% to 100%, more preferably 80% to 100%, and even more preferably More specifically, between 90% and 100%, typically 100%. Also, the first metal oxide film The conditions for deposition, such as pressure, temperature, and power, may be different for the first and second metal oxide films. By keeping all conditions the same except for the oxygen flow rate ratio, the time required for the film deposition process can be shortened. Therefore, it is preferable.

[0146] This configuration provides a transistor 100 with excellent electrical characteristics and high reliability. This can be achieved.

[0147] [Configuration Example 2] The following describes a transistor configuration example that differs in some aspects from the above Configuration Example 1. Note that in the following, explanations may be omitted for parts that overlap with the above configuration example 1. In the drawing shown below, parts having the same function as in the above example configuration 1 are shown with hatching. Sometimes, the turn number is the same, and no sign is assigned.

[0148] Figure 2(A) is a top view of transistor 100A, and Figure 2(B) is a top view of transistor 10 Figure 2(C) is a cross-sectional view of transistor 0A in the channel length direction, and Figure 2(C) shows the channel width of transistor 100A. This is a cross-sectional view in a specific direction.

[0149] The transistor 100A has a conductive layer 106 between the substrate 102 and the insulating layer 103. Therefore, it differs mainly from Configuration Example 1. The conductive layer 106 is the channel formation region of the semiconductor layer 108 and It has a region 108L and a region that overlaps with the conductive layer 112.

[0150] In transistor 100A, the conductive layer 106 is the first gate electrode (bottom gate electrode) The conductive layer 112 functions as a second gate electrode (also called a top gate electrode), and the conductive layer 112 is a second gate electrode (top gate electrode). It functions as a pole (also called a pole). In addition, a part of the insulating layer 103 is the first gate insulating layer In this manner, a portion of the insulating layer 110 functions as a second gate insulating layer.

[0151] The portion of the semiconductor layer 108 that overlaps with at least one of the conductive layer 112 and the conductive layer 106 , it functions as a channel formation region. For the sake of simplicity, the semiconductor layer 10 The portion that overlaps with the conductive layer 112 of 8 is sometimes called the channel-forming region, but in reality it is not conductive The portion that overlaps with the conductive layer 106 without overlapping with layer 112 (including regions 108L and 108N) Channels can also be formed in the (unclear) portion.

[0152] Furthermore, as shown in Figures 2(A) and (C), the conductive layer 106 is an insulating layer, and the metal oxide layer 114 is an insulating layer. Through the openings 142 provided in layer 110 and the insulating layer 103, electrical contact occurs between the conductive layer 112 and the insulating layer 103. They may be connected. This gives the conductive layer 106 and conductive layer 112 the same potential. It is possible to obtain it.

[0153] The conductive layer 106 is made of the same material as conductive layer 112, conductive layer 120a, or conductive layer 120b. This can be used. In particular, if a material containing copper is used for the conductive layer 106, the wiring resistance can be reduced. This is preferable. Furthermore, high melting point metals such as tungsten and molybdenum are used in the conductive layer 106. Using materials containing this component allows for processing at higher temperatures in subsequent steps.

[0154] Furthermore, as shown in Figures 2(A) and (C), in the channel width direction, the conductive layer 112 and It is preferable that the conductive layer 106 protrudes outward beyond the edge of the semiconductor layer 108. At that time, as shown in Figure 2(C), the entire channel width direction of the semiconductor layer 108 is covered by the insulating layer 11 The structure consists of 0 and an insulating layer 103, with conductive layers 112 and 106 covering it.

[0155] With this configuration, the semiconductor layer 108 is protected from the electric field generated by the pair of gate electrodes. And it can be electrically surrounded. In particular, the conductive layer 106 and the conductive layer 112 are the same It is preferable to apply an electric potential. This induces a channel in the semiconductor layer 108. Because the electric field can be effectively applied, the on-current of the 100A transistor can be increased. Yes, it is possible. Therefore, it becomes possible to miniaturize the 100A transistor.

[0156] Furthermore, the conductive layer 112 and the conductive layer 106 may not be connected. In this case, one pair A constant potential is applied to one of the gate electrodes, and a signal to drive transistor 100A is applied to the other. You may also apply a potential to one electrode. At this time, the potential applied to one electrode will cause transistor 100A to be on the other side. It is also possible to control the threshold voltage when driving with one of the electrodes.

[0157] The above is an explanation of Configuration Example 2.

[0158] [Example of manufacturing method] The following describes a method for manufacturing a semiconductor device according to one aspect of the present invention, with reference to the drawings. Here, we will explain using transistor 100A, which was exemplified in the above configuration example, as an example.

[0159] Furthermore, thin films (insulating films, semiconductor films, conductive films, etc.) that make up semiconductor devices are produced by sputtering. Chemical vapor deposition (CVD) method Vacuum deposition, pulsed laser deposition (PLD) tion) method, Atomic Layer Deposition (ALD) method It can be formed using methods such as the CVD method. CVD methods include plasma chemical vapor deposition (PE These include CVD (Plasma Enhanced CVD) and thermal CVD. One of the thermal CVD methods is metal-organic chemical vapor deposition (MOCVD). There is the IC CVD method.

[0160] Furthermore, thin films (insulating films, semiconductor films, conductive films, etc.) that make up semiconductor devices are spin-coated. Dip, spray coating, inkjet, dispensing, screen printing, offset Printing, Doctor Knife method, slit coating, roll coating, curtain coating, knife coating It can be formed by methods such as T.

[0161] Furthermore, when processing the thin films that make up semiconductor devices, photolithography and other methods are used. It can be processed using nanoimprint lithography, sandblasting, and lift-off. Thin films may be processed using methods such as the F method. Alternatively, a shielding mask such as a metal mask may be used. Island-like thin films may be directly formed by a film-forming method.

[0162] There are two main methods of photolithography. One is to process the image... A resist mask is formed on a thin film, and the thin film is processed by etching or the like, and the resist This is a method for removing the mask. Another method is to deposit a photosensitive thin film and then expose it to light. This method involves developing the film and then processing it into a desired shape.

[0163] In photolithography, the light used for exposure is, for example, the i-line (wavelength 365 nm). Using g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture thereof This can be done by using ultraviolet light, KrF laser light, or ArF laser light, etc. It is also possible to perform exposure using immersion lithography. Furthermore, the light used for exposure and Then, using extreme ultraviolet (EUV) light and X-rays... It is also possible to use an electron beam instead of light for exposure. Extreme ultraviolet Using light, X-rays, or electron beams is preferable because it allows for extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, the photomask is It is unnecessary.

[0164] Thin film etching methods include dry etching, wet etching, and sandblasting. Laws and other regulations can be used.

[0165] Figures 3 to 6 show the channel at each stage of the manufacturing process of transistor 100A. The cross-sections in the longitudinal direction and the channel width direction are shown side by side.

[0166] [Formation of conductive layer 106] A conductive film is formed on the substrate 102, and this is processed by etching to form the first gate electrode. A conductive layer 106 that functions as such is formed.

[0167] [Formation of insulating layer 103] Next, an insulating layer 103 is formed by covering the substrate 102 and the conductive layer 106 (Figure 3(A)). The insulating layer 103 is formed using methods such as PECVD, ALD, or sputtering. It is possible.

[0168] Even if a process is performed to supply oxygen to the insulating layer 103 after the insulating layer 103 has been formed, Good. For example, plasma treatment or heat treatment can be performed in an oxygen atmosphere. Alternatively, oxygen can be introduced into the insulating layer 103 by methods such as plasma ion doping or ion implantation. It may be supplied.

[0169] [Formation of semiconductor layer 108] Next, a metal oxide film is formed on the insulating layer 103, and this is processed to create island-shaped semi-semi A conductive layer 108 is formed (Figure 3(B)).

[0170] The metal oxide film is formed by a sputtering method using a metal oxide target. It is preferable.

[0171] Furthermore, when forming a metal oxide film, oxygen gas, inert gas (for example, helium gas, (Argon gas, xenon gas, etc.) may be mixed in. The higher the proportion of oxygen gas in the total film-forming gas (hereinafter also called the oxygen flow rate ratio), the more gold This can improve the crystallinity of the oxide film, enabling the realization of highly reliable transistors. The lower the oxygen flow rate ratio, the lower the crystallinity of the metal oxide film, and the higher the on-current. It can be used as a generator.

[0172] When the semiconductor layer 108 is in a stacked structure, the same sputtering target is used to achieve the same result Continuous film deposition in the film chamber is preferable because it allows for a good interface. Furthermore, the conditions for forming each metal oxide film were varied, including pressure, temperature, and power during film formation. While this is also acceptable, keeping all conditions except the oxygen flow rate ratio the same will shorten the time required for the film deposition process. This is preferable because it allows for the following: It is preferable to continuously deposit the film without exposure to the environment.

[0173] Metal oxide films include metal oxide films having a CAAC structure and metal oxide films having an nc structure. Alternatively, the film deposition conditions are set so that a metal oxide film is formed in which CAAC structure and nc structure are mixed. It is preferable to determine the film formation conditions under which the metal oxide film to be formed has a CAAC structure. The film deposition conditions for the nc structure depend on the composition of the sputtering target used. Because they differ, depending on the composition, the substrate temperature, oxygen flow rate ratio, pressure, power, etc., are adjusted accordingly. You just need to configure it.

[0174] Furthermore, the conditions for forming the metal oxide film are preferably such that the substrate temperature is between room temperature and 450°C. The substrate temperature is set to room temperature or higher and 300°C or lower, more preferably room temperature or higher and 200°C or lower, even more preferably Alternatively, the temperature should be above room temperature and below 140°C. For example, a large glass substrate or resin substrate can be placed on substrate 102. When using a lipid substrate, productivity increases if the substrate temperature is between room temperature and 140°C. Preferably, the substrate temperature is set to room temperature, or without intentional heating, and the metal oxide By forming a film, the crystallinity can be reduced.

[0175] Furthermore, before forming the metal oxide film, water, hydrogen, and organic matter adsorbed on the surface of the insulating layer 103 It is preferable to perform treatments to remove such substances and to supply oxygen into the insulating layer 103. For example, heat treatment can be performed at a temperature of 70°C to 200°C under a reduced pressure atmosphere. Alternatively, plasma treatment may be performed in an oxygen-containing atmosphere. Plasma treatment in an atmosphere containing nitrogen gas removes organic matter from the surface of the insulating layer 103. It can be suitably removed. After such treatment, the surface of the insulating layer 103 is exposed to the atmosphere. It is preferable to continuously form metal oxide films without interruption.

[0176] For processing metal oxide films, either wet etching or dry etching is used. Either one or both may be used. In this case, one of the insulating layers 103 that does not overlap with the semiconductor layer 108. The area may be etched and become thinner.

[0177] Furthermore, after the metal oxide film is formed, or after processing into the semiconductor layer 108, the metal oxide film or Heat treatment may be performed to remove hydrogen or water from the semiconductor layer 108. Typically, the temperature is between 150°C and the substrate's strain point, or between 250°C and 450°C. It can be below, or between 300°C and 450°C.

[0178] The heat treatment can be carried out in an atmosphere containing a noble gas or nitrogen. After heating with gas, it may be heated in an oxygen-containing atmosphere. Note that water may be present in the atmosphere during the above heating treatment. It is preferable that the product does not contain any raw materials, water, etc. The heat treatment is carried out using an electric furnace, RTA device, etc. This is possible. By using an RTA device, the heat treatment time can be shortened.

[0179] [Formation of insulating film 110f and metal oxide film 114f] Next, the insulating layer 103 and the semiconductor layer 108 are covered with an insulating film 110f and a metal oxide film 1 Forms 14f.

[0180] The insulating film 110f is a film that will later become the insulating layer 110. For example, the insulating film 110f is... For example, an oxide film such as a silicon oxide film or a silicon oxide nitride film is deposited using a plasma chemical vapor deposition system. It is preferable to form them using a PECVD apparatus (also called a plasma CVD apparatus). It may also be formed using the PECVD method with microwaves.

[0181] The metal oxide film 114f is a film that will later become the metal oxide layer 114. 4f is preferably formed by sputtering in an atmosphere containing oxygen, for example. This allows oxygen to be supplied to the insulating film 110f during the formation of the metal oxide film 114f. Cut.

[0182] The metal oxide film 114f is made of an oxide containing the same metal oxide as in the case of the semiconductor layer 108. When forming using a target-based sputtering method, the above method should be used. It is possible.

[0183] The metal oxide film 114f was formed using oxygen as the deposition gas and a reactive spalling process using a metal target. It may also be formed by the tarring method. When aluminum is used as the metal target, An aluminum oxide film can be formed.

[0184] When forming the metal oxide film 114f, the total flow rate of the deposition gas introduced into the deposition chamber of the deposition apparatus is The higher the ratio of oxygen flow rate (oxygen flow rate ratio), or the higher the oxygen partial pressure in the deposition chamber, the greater the insulating film 1 The amount of oxygen supplied to 10f can be increased. The oxygen flow rate ratio or oxygen partial pressure can be, for example, 50% to 100%, preferably 65% ​​to 100%, more preferably 80% or less The oxygen flow rate ratio should be 100% or less, more preferably 90% or more and 100% or less. It is preferable to set the oxygen partial pressure to 00% and bring it as close to 100% as possible.

[0185] In this way, a metal oxide film 114f is formed by sputtering in an oxygen-containing atmosphere. This allows oxygen to be supplied to the insulating film 110f during the formation of the metal oxide film 114f. At the same time, it is possible to prevent oxygen from detaching from the insulating film 110f. As a result, insulation A very large amount of oxygen can be trapped in the 110f membrane. And, by subsequent heat treatment... As a result, a large amount of oxygen is supplied to the channel formation region of the semiconductor layer 108, This reduces oxygen deficiency and enables the creation of highly reliable transistors.

[0186] Furthermore, by performing a heat treatment after the formation of the metal oxide film 114f, the insulating film 110f is removed. Oxygen may be supplied to the semiconductor layer 108. The heat treatment involves one or more of nitrogen, oxygen, and noble gases. This can be carried out at a temperature of 200°C to 400°C in an atmosphere containing [the specified substance].

[0187] Next, the metal oxide film 114f, the insulating film 110f, and a portion of the insulating layer 103 are etched. This creates an opening that reaches the conductive layer 106. 112 and the conductive layer 106 can be electrically connected through the opening.

[0188] [Formation of conductive film 112f] Next, a conductive film 112f, which will become the conductive layer 112, is formed on the metal oxide film 114f. Figure 3(C)). The conductive film 112f was formed using a metal or alloy sputtering target. It is preferable to deposit the film by sputtering.

[0189] [Formation of insulating layer 110, metal oxide layer 114, and conductive layer 112] Next, a resist mask 115 is formed on the conductive film 112f. After that, the resist mask In the region not covered by 115, an anisotropic etching method is used to film the conductive film 112f The metal oxide film 114f and the insulating film 110f are etched (Figure 4(A)).

[0190] Etching of the conductive film 112f, the metal oxide film 114f, and the insulating film 110f is performed on the same surface. Depending on the etching conditions, etching may be performed simultaneously, or different etching conditions or methods may be used. The etching may be performed in at least two separate steps. For example, the conductive film 112f and the metal The oxide film 114f is etched first, followed by the insulating film 110f under different etching conditions. Etching can reduce etching damage to the semiconductor layer 108. ru.

[0191] Here, the resist mask 115 is preferably formed on the region that will become the insulating layer 110. It's nice.

[0192] Next, using an isotropic etching method, the sides of the conductive film 112f and the metal oxide film 114f were etched. The surface is etched to recess the edge (also called side etching). This creates a flat surface. In a surface view, the conductive layer 112 has an edge that is located inside the edge of the insulating layer 110, and a metallic acid A composted layer 114 can be formed (Figure 4(B)).

[0193] Here, the etching of the conductive film 112f and the metal oxide film 114f is performed by the semiconductor layer 108 and It is preferable to select conditions or methods that minimize etching of the insulating layer 103. Here, during the side etching of the conductive film 112f and the metal oxide film 114f, You may perform the procedure with mask 115 removed, but leave the resist mask 115 in place. Therefore, the conductive layer 112 can be etched only on the sides without becoming a thin film. preferable.

[0194] In this case, the metal oxide film 114f is side-etched in the same way as the conductive film 112f. Although the method has been explained, it is also possible to side-etch only the conductive film 112f. The metal oxide layer 114, like the insulating layer 110, has regions that do not overlap with the conductive layer 112. This will result in the following configuration.

[0195] After the conductive layer 112 and the metal oxide layer 114 are formed, the resist mask 115 is removed.

[0196] [Supplying of impurity elements (formation of region 108L)] Next, using the conductive layer 112 as a mask, impurity elements are added to the insulating layer 110 and the semiconductor layer 108. The process involves supplying (adding or injecting) 140, and then region 108L, region 11 Region 0d and region 103d are formed (Figure 5(A)). At this time, the semiconductor layer 108 and the insulating layer In the region of 110 that overlaps with the conductive layer 112, the conductive layer 112 acts as a mask for impurities. Base 140 will not be supplied.

[0197] The supply of impurity element 140 is preferably by plasma ion doping or ion implantation. These methods can be used to obtain a depth-direction concentration profile, and to accelerate ions. It can be controlled with high precision by adjusting voltage and dose. Plasma ion doping By using this method, productivity can be increased. Also, ion implantation using mass separation can be used. By using this method, the purity of the supplied impurity elements can be increased.

[0198] In the supply process of impurity element 140, at the interface between the semiconductor layer 108 and the insulating layer 110, The portion of the semiconductor layer 108 near the interface, or the portion of the insulating layer 110 near the interface, It is preferable to control the processing conditions to achieve the highest possible concentration. The principle is to supply both the semiconductor layer 108 and the insulating layer 110 with an optimal concentration of impurity elements 140. It is possible.

[0199] The 140 impurity elements are hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, Examples include aluminum, magnesium, silicon, or noble gases. Typical examples include helium, neon, argon, krypton, and xenon. In particular, boron, phosphorus, aluminum, magnesium, or silicon are preferred. It's nice.

[0200] As the raw material gas for impurity element 140, a gas containing the above-mentioned impurity element can be used. When supplying boron, typical gases such as B2H6 gas and BF3 gas can be used. It can be done. Also, when supplying phosphorus, pH3 gas can typically be used. Alternatively, a mixed gas obtained by diluting these source gases with a noble gas may be used.

[0201] Other raw material gases include CH4, N2, NH3, AlH3, AlCl3, SiH4, Si2H6, F2, HF, H2, (C5H5)2Mg, and noble gases can be used. Furthermore, the ion source is not limited to gases; solids or liquids that have been heated and vaporized can also be used. good.

[0202] The addition of impurity element 140 affects the composition, density, and thickness of the insulating layer 110 and the semiconductor layer 108. By taking these factors into consideration and setting conditions such as acceleration voltage and dose amount, it can be controlled.

[0203] For example, when adding boron using ion implantation or plasma ion doping, The acceleration voltage is, for example, 5kV to 100kV, preferably 7kV to 70kV, Preferably, the voltage can be in the range of 10kV to 50kV. Also, the dose amount is, for example... ba 1 × 10 13 ions / cm 2 The above 1 x 10 17 ions / cm 2 The following is preferably 1 ×10 14 ions / cm 2 The above 5 x 10 16 ions / cm 2 More convenient 1 ×10 15 ions / cm 2 The above 3 x 10 16 ions / cm 2 The following range can.

[0204] Furthermore, when adding phosphorus using ion implantation or plasma ion doping, acceleration The voltage is, for example, 10kV to 100kV, preferably 30kV to 90kV. Preferably, the voltage can be in the range of 40kV to 80kV. Also, the dose amount is, for example, e.g. 1 x 10 13 ions / cm 2 The above 1 x 10 17 ions / cm2 The following, preferably 1 x 10 14 ions / cm 2 The above 5 x 10 16 ions / cm 2 The following is more 1 x 10 15 ions / cm 2 The above 3 x 10 16 ions / cm 2 The following range It is possible.

[0205] Furthermore, the method of supplying impurity element 140 is not limited to this, and for example, plasma treatment, Treatments utilizing heat diffusion through heating may also be used. In the case of plasma treatment, the added impurities By generating plasma in a gas atmosphere containing pure elements and performing plasma processing... Impurity elements can be added. The apparatus for generating the above plasma is a dry Etching equipment, ashing equipment, plasma CVD equipment, high-density plasma CVD equipment, etc. It can be used.

[0206] Here, impurity element 140 is added to region 108L via the insulating layer 110, Even in the region not covered by the insulating layer 110 (the region that will later become region 108N), impurity element 140 It is added. In this region, if the concentration of impurity element 140 is higher than in region 108L There is also a profile of the concentration gradient of impurity element 140 in the depth direction, in region 1. This may differ from 08L.

[0207] [Formation of insulating layer 116 and region 108N] Next, a process is performed to supply hydrogen to the exposed region of the semiconductor layer 108. By forming a hydrogen-containing insulating layer 116 in contact with the exposed region of the semiconductor layer 108, hydrogen It supplies (Figure 5(B)).

[0208] The insulating layer 116 is formed by a plasma CVD method using a hydrogen-containing film-forming gas. Preferably, a film-forming gas containing silane gas and ammonia gas is used to form silicone nitride. A film is formed. By using ammonia gas in addition to silane gas, a large amount of hydrogen is deposited in the film. It can also contain [something] during film formation. This will make it possible to supply hydrogen.

[0209] After the insulating layer 116 is formed, a heat treatment is performed to release hydrogen from the insulating layer 116. It is preferable to supply a portion of it to a portion of the semiconductor layer 108. The heat treatment involves nitrogen, oxygen, In an atmosphere containing one or more noble gases, at a temperature of 150°C to 450°C, preferably 200°C It is preferable to carry out the process at a temperature between ℃ and 400℃.

[0210] By supplying hydrogen in this way, an extremely low-resistance region 108N is created in the semiconductor layer 108. It can be formed. Region 108N is a region with a higher carrier concentration than region 108L. This can also be called a region with a high oxygen deficiency, a region with a high hydrogen concentration, or a region with a high impurity concentration. It is possible.

[0211] Alternatively, the insulating layer 116 and region 108N may be formed by the following method.

[0212] First, an insulating layer 116 is formed in contact with the exposed region of the semiconductor layer 108.

[0213] As the insulating layer 116, aluminum, titanium, tantalum, tungsten, chromium, and A film containing at least one metallic element such as ruthenium is formed. In particular, aluminum, Preferably, it contains at least one of tan, tantalum, and tungsten. In particular, Nitrides containing at least one of these metallic elements, or containing at least one of these metallic elements Oxides can be suitably used. As the insulating layer 116, an aluminum titanium nitride film, Nitride films such as titanium nitride films and aluminum nitride films, and acid films such as aluminum titanium oxide films. A phosphate film or the like can be suitably used.

[0214] Here, the insulating layer 116 is formed by sputtering using nitrogen gas or oxygen gas as the deposition gas. It is preferable to form it by the method. By controlling the flow rate of the film-forming gas, This makes it easier to control the film quality.

[0215] Next, a heat treatment is performed. The heat treatment is performed on the area of ​​the semiconductor layer 108 that is in contact with the insulating layer 116. The region becomes less resistive, and a low-resistance region 108N is formed in the semiconductor layer 108.

[0216] Heat treatment is preferably carried out in an inert gas atmosphere such as nitrogen or a noble gas. While a higher temperature is preferable, the heat resistance of the substrate 102, conductive layer 106, conductive layer 112, etc. The temperature can be set to a range of 120°C to 500°C, preferably 15°C. 0°C to 450°C, more preferably 200°C to 400°C, even more preferably 2 The temperature can be between 50°C and 400°C. For example, the heat treatment temperature can be set to around 350°C. By doing so, semiconductor devices can be produced with high yield using production equipment that utilizes large glass substrates. It is possible.

[0217] Note that since the insulating layer 116 is not removed here, the heat treatment can be performed after the insulating layer 116 has been formed. It can be performed at any stage. Furthermore, the above heat treatment can be combined with other heat treatments or processes involving heat. You may sleep.

[0218] During the heat treatment, oxygen in the semiconductor layer 108 is drawn out to the insulating layer 116, thus reducing acidity. Elementary defects are generated. These oxygen defects combine with hydrogen in the semiconductor layer 108. The carrier concentration increases, and the region 108N in contact with the insulating layer 116 becomes less resistive.

[0219] Alternatively, heat treatment can cause the metal elements contained in the insulating layer 116 to diffuse into the semiconductor layer 108. As a result, a portion of the semiconductor layer 108 may become alloyed, which can reduce its resistance.

[0220] Alternatively, nitrogen or hydrogen contained in the insulating layer 116, or nitrogen contained in the heat treatment atmosphere. As a result of the heat treatment, elements diffuse into the semiconductor layer 108, and the area in contact with the insulating layer 116 In some cases, the resistance of the 108N band may be reduced.

[0221] Due to these combined effects, the region 108N of the semiconductor layer 108, which has been made to have low resistance, is extremely This results in a stable, low-resistance region. The region 108N thus formed can be used, for example, in a later process. Even when oxygen is supplied, it has the characteristic of not easily becoming highly resistant.

[0222] In this case, an insulating layer 11 having insulating properties is used as the layer for forming region 108N. An example using 6 has been explained, but a conductive film is in contact with the region that becomes region 108N. Region 108N may be formed by forming [the specified part]. In this case, after the formation of region 108N The conductive film is oxidized or nitrided to make it insulating, thereby forming an insulating layer 116. Preferably, the film is removed after the formation of region 108N, and the insulating layer 116 is not provided. It may be considered a success.

[0223] As a result, region 108N can be formed.

[0224] Furthermore, by performing the heat treatment described above, regions 108L and 108N become more stable. This can result in a low-resistance state. For example, by performing a heat treatment at the above temperature, The impurity element 140 diffuses appropriately and becomes locally homogenized, creating an ideal concentration gradient of the impurity element. Regions 108L, 108N, and 110d having the above characteristics can be formed. If the temperature is too high (for example, above 500°C), impurity element 140 will be released from region 108L. It can diffuse into the channel formation region, potentially leading to a deterioration of the transistor's electrical characteristics and reliability. ru.

[0225] Furthermore, when supplying impurity elements 140 to regions 108L and 108N, semiconductor layer 1 In some cases, defects in 08 or the insulating layer 110 can be repaired by heat treatment.

[0226] Furthermore, the heat treatment introduces oxygen from the insulating layer 110 to the channel formation region of the semiconductor layer 108. It can be supplied. At this time, the protruding portion of the insulating layer 110 is near the interface with region 108L. Since a region 110d supplied with impurity element 140 is formed nearby, the insulating layer 110 The diffusion of oxygen released from into region 108L is suppressed. As a result, region 108 This effectively prevents L from becoming highly resistive. Furthermore, at this time, the insulating layer 11 Region 110d is formed in the area that overlaps with the channel formation region of semiconductor layer 108. Therefore, oxygen released from the insulating layer 110 is selectively supplied to the channel-forming region. It is possible.

[0227] [Formation of insulating layer 118] Next, an insulating layer 118 is formed on the insulating layer 116 (Figure 6(A)).

[0228] When forming the insulating layer 118 by plasma CVD, if the deposition temperature is too high, region 1 Depending on the impurities contained in 08N and region 108L, etc., the impurities may affect the semiconductor layer 108. There is a risk of diffusion to the surrounding area including the channel formation region. As a result, the channel formation region may be affected. This can lead to increased resistance, or an increase in the electrical resistance of region 10⁸N or region 10⁸L. There is a risk. The film deposition temperature for the insulating layer 116 or insulating layer 118 should be, for example, 150°C or higher. 400°C or lower, preferably 180°C to 360°C, more preferably 200°C or higher 25 It is preferable to keep the temperature below 0°C. By forming the insulating layer 118 at a low temperature, the channel length Even short transistors can be given good electrical characteristics.

[0229] Furthermore, heat treatment may be performed after the formation of the insulating layer 118.

[0230] [Formation of openings 141a and 141b] Next, a mask is formed on the insulating layer 118 by lithography at a desired position, and then the insulating layer By etching 118 and a portion of the insulating layer 116, an opening 1 reaches region 108N. 41a and the opening 141b are formed.

[0231] [Formation of conductive layer 120a and conductive layer 120b] Next, a conductive film is applied to the insulating layer 118 so as to cover the openings 141a and 141b. By forming a film and processing the conductive film into a desired shape, conductive layer 120a and conductive layer 120b are formed. It forms (Figure 6(B)).

[0232] By following the above steps, transistor 100A can be manufactured.

[0233] [Example of manufacturing method] The following describes a manufacturing method that differs in some respects from the manufacturing method example described above. We will omit explanations for parts that overlap with previous explanations and explain the parts that differ.

[0234] [Variation 1] First, a conductive layer 106, an insulating layer 103, and a semiconductor layer 108 are formed in the same manner as described above. Then, an insulating film 110f, a metal oxide film 114f, and a conductive film 112f are formed, and the conductive film 11 A resist mask 115 is formed on 2f.

[0235] Next, the metal oxide film 114f and the conductive film 112f are etched, and the metal oxide layer 11 4 and the conductive layer 112 are formed (Figure 7(A)).

[0236] At this time, the metal oxide layer 114 and the conductive layer 112 are more than the contour of the resist mask 115. The edges are processed so that they are located on the inside. For example, first the metal oxide film 114f and the conductive film 1 After etching with 12f using anisotropic etching, the cyanoacrylate is etched using isotropic etching. By etching, a metal oxide layer 114 and a conductive layer 112 are formed.

[0237] Next, using the resist mask 115, the insulating film 110f is etched anisotropically. This is done to form an insulating layer 110 (Figure 7(B)). This ensures that the outer layer is more insulating than the conductive layer 112. An insulating layer 110 having a portion protruding to the side can be formed. After that, resist mass Remove Ku115.

[0238] By this method, when etching the metal oxide film 114f and the conductive film 112f Since the semiconductor layer 108 is not exposed, these components are scattered onto the surface of the semiconductor layer 108. This prevents adhesion. Therefore, it enables the realization of highly reliable transistors. Cut.

[0239] The following steps can be carried out by referring to the above description.

[0240] [Variation 2] First, a conductive layer 106, an insulating layer 103, and a semiconductor layer 108 are formed in the same manner as described above. Then, an insulating film 110f, a metal oxide film 114f, and a conductive film 112f are formed. After that, A resist mask is formed on the conductive film 112f, and the conductive film 112f and the metal oxide film 114f are formed By etching, a metal oxide layer 114 and a conductive layer 112 are formed. The resist mask may have the same pattern as the resist mask 115 described above, but It is preferable to use a pattern that covers the region that will become the electrolytic layer 112. When using the same pattern as in 5, the metal oxide film 114f and conductive material are as in Modification 1. The film 112f is side-etched. Then, the resist mask is removed.

[0241] Next, the conductive layer 112 is used as a mask to connect the insulating film 110f and the semiconductor layer 108. Then impurity element 140 is added (Figure 8(A)). This creates a conductive layer in the semiconductor layer 108. In the portion that does not overlap with 112, a region 108L can be formed in which impurity elements are added. At the same time, the region 110d in which impurity elements are added to the insulating film 110f, and the insulating layer 1 A region 103d is formed in 03 where impurity elements are added.

[0242] Next, the top and side surfaces of the conductive layer 112 and the metal oxide layer 114 are covered with a resist mass. Forms a resist mask 115. The resist mask 115 is a pattern that covers the region that will become the insulating layer 110. It has the following. Subsequently, the insulating film 110f is etched so that it protrudes outward from the conductive layer 112. An insulating layer 110 having a portion thereof is formed, and a portion of the semiconductor layer 108 (region 108N and Expose the part that will become (Figure 8(B)).

[0243] At this stage, hydrogen may be added to a portion of the exposed semiconductor layer 108. For example, using the resist mask 115 as a mask, ion doping or ion Hydrogen may be added by methods such as injection. Alternatively, heating treatment may be performed in a hydrogen-containing atmosphere. It is also permissible to perform the treatment. If heat treatment is performed, the resist mask 115 may be altered. Because of this, it is preferable to remove it before heat treatment. The conductive layer 112 is exposed. By performing a heat treatment in a hydrogen-containing atmosphere in this state, the oxide on the surface of the conductive layer 112 is removed. Secondary effects such as the reduction and removal of certain substances can also be expected.

[0244] Next, using the same method as described above, the insulating layer 11 is brought into contact with the exposed portion of the semiconductor layer 108. Region 6 is formed, and then heat treatment is performed to form region 108N (Figure 8(C)).

[0245] By this method, when adding impurity element 140, region 1 of the semiconductor layer 108 The region that becomes 08L and the region that becomes 108N are both covered by the insulating film 110f. Therefore, the depth profile of these impurity concentrations should be made to be similar. This allows for improved controllability. Also, when etching the insulating film 110f, the conductive layer Since 112 and the metal oxide layer 114 are covered by the resist mask 115 and are not exposed, the conductive layer Some of the components of 112 or the metal oxide layer 114 adhere to the surface of the semiconductor layer 108. This can prevent it.

[0246] The following steps can be carried out by referring to the above description.

[0247] The above is a description of variations of the example manufacturing method.

[0248] [Components of semiconductor devices] Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0249] 〔substrate〕 There are no major restrictions on the material of the substrate 102, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, a single crystal made of silicon or silicon carbide. Semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI groups Plates, glass substrates, ceramic substrates, quartz substrates, sapphire substrates, etc., are used as substrate 102. It is also acceptable to have semiconductor elements mounted on these substrates as substrate 102. You may use it.

[0250] Furthermore, a flexible substrate is used as the substrate 102, and the transistor 10 is directly mounted on the flexible substrate. A 0 or similar layer may be formed. Alternatively, a release layer may be provided between the substrate 102 and the transistor 100 or similar layer. The delamination layer may be applied to the substrate 102 after the semiconductor device has been partially or completely completed thereon. It can be further separated and used for transfer to other substrates. Grade 0 can be transferred to substrates with poor heat resistance or flexible substrates.

[0251] [Insulating layer 103] The insulating layer 103 is deposited by sputtering, CVD, vapor deposition, or pulsed laser deposition (PLD). It can be formed using methods such as the ) method as appropriate. In addition, the insulating layer 103 can be, for example, an oxidation A material insulating film or a nitride insulating film can be formed as a single layer or in a multilayer structure. To improve the interface characteristics with 108, at least the semiconductor layer 108 in the insulating layer 103 The region in contact with the heating element is preferably formed with an oxide insulating film. It is preferable to use a membrane that releases oxygen.

[0252] For example, the insulating layer 103 can be silicon oxide, silicon oxide nitride, silicon nitride oxide, or silicon dioxide. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn oxide These can be used, and the structure can be provided in a single layer or in multiple layers.

[0253] Furthermore, on the side of the insulating layer 103 that is in contact with the semiconductor layer 108, there is a film other than an oxide film such as a silicon nitride film. When using this film, pretreatment such as oxygen plasma treatment is applied to the surface in contact with the semiconductor layer 108. It is preferable to perform this procedure to oxidize the surface or the vicinity of the surface.

[0254] [Conductive film] Conductive layers 112 and 106 function as gate electrodes, and source electrodes or A conductive layer 120a that functions as one of the rain electrodes and a conductive layer 120 that functions as the other Examples of materials in category b include chromium, copper, aluminum, gold, silver, zinc, molybdenum, tantalum, and titanium. , metallic elements selected from tungsten, manganese, nickel, iron, and cobalt, or the above Using an alloy containing the aforementioned metal elements, or an alloy combining the aforementioned metal elements, They can be formed.

[0255] Furthermore, conductive layers 112, 106, 120a, and 120b contain In -Sn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti -Sn oxides, In-Zn oxides, In-Sn-Si oxides, In-Ga-Zn oxides, etc. An oxide conductor or metal oxide film can also be applied.

[0256] Here, we will explain oxide conductors (OC). For example, an oxygen vacancy is formed in a metal oxide having semiconductor properties, and hydrogen is added to the oxygen vacancy. Then, a donor level is formed near the conduction band. As a result, the metal oxide has high conductivity. It becomes conductive. A metal oxide that has become conductive can be called an oxide conductor.

[0257] Furthermore, the conductive layer 112, etc., includes a conductive film containing the above oxide conductor (metal oxide) and a metal Alternatively, a laminated structure of conductive films containing an alloy may be used. This reduces the wiring resistance. At this time, the insulating film that functions as the gate insulating film It is preferable to apply a conductive film containing an oxide conductor to the side in contact with the edge layer.

[0258] Furthermore, conductive layer 112, conductive layer 106, conductive layer 120a, and conductive layer 120b contain the aforementioned gold Among the group elements, titanium, tungsten, tantalum, and molybdenum are selected in particular. It is preferable to have one or more of the following. In particular, it is preferable to use a tantalum nitride film. The tantalum nitride film is conductive and, with respect to copper, oxygen, or hydrogen, It has high barrier properties and releases little hydrogen from itself, so it comes into contact with the semiconductor layer 108. It can be suitably used as a conductive film or a conductive film in the vicinity of the semiconductor layer 108.

[0259] [Insulating layer 110] The insulating layer 110, which functions as a gate insulating film for transistors such as transistor 100, is manufactured by the PECVD method. It can be formed by sputtering or the like. The insulating layer 110 can be a silicon oxide film, or a nitrogen oxide film. Silicon oxide film, silicon nitride film, silicon nitride film, aluminum oxide film, hafni oxide yttrium film, zirconium oxide film, gallium oxide film, tantalum oxide film, One or more magnesium oxide films, lanthanum oxide films, cerium oxide films, and neodymium oxide films. An insulating layer can be used. The insulating layer 110 may be a two-layer laminated structure or a three-layer or more The above layered structure may also be used.

[0260] Furthermore, the insulating layer 110 in contact with the semiconductor layer 108 is preferably an oxide insulating film. It is more preferable to have a region containing an excess of oxygen compared to the stoichiometric composition. In other words, The insulating layer 110 is an insulating film that can release oxygen. For example, under an oxygen atmosphere An insulating layer 110 is formed, and the insulating layer 110 after film formation is subjected to a heat treatment in an oxygen atmosphere. Performing processes such as plasma treatment, or forming an oxide film on the insulating layer 110 under an oxygen atmosphere. Oxygen can also be supplied into the insulating layer 110 by forming a film or other means.

[0261] Furthermore, the insulating layer 110 has a higher dielectric constant compared to silicon oxide and silicon oxide nitride. Materials such as hafnium oxide can also be used. This increases the thickness of the insulating layer 110. Leakage current due to tunnel current can be suppressed. In particular, crystalline hafnium oxide is non It is preferable because it has a higher dielectric constant compared to crystalline hafnium oxide.

[0262] [Semiconductor layer] If the semiconductor layer 108 is In-M-Zn oxide, then to deposit the In-M-Zn oxide film... The sputtering target used must have an atomic ratio of In to M of 1 or more. Preferred. The atomic ratio of metal elements in such a sputtering target is In:M :Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2: 4.1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn= Examples include 5:1:8, In:M:Zn=6:1:6, and In:M:Zn=5:2:5. .

[0263] Furthermore, a target containing a polycrystalline oxide is used as the sputtering target. This is preferable because it facilitates the formation of a crystalline semiconductor layer 108. The atomic ratio of semiconductor layer 108 is the original number of metal elements contained in the sputtering target mentioned above. This includes variations of plus or minus 40% in the number of particles. For example, sputtering used for semiconductor layer 108. When the ring target composition is In:Ga:Zn=4:2:4.1 [atomic ratio], The composition of the semiconductor layer 108 is in the vicinity of In:Ga:Zn=4:2:3 [atomic ratio]. There are cases where this occurs.

[0264] Note that when the atomic ratio is stated as In:Ga:Zn=4:2:3 or close to it, In When we set the ratio to 4, this includes the case where Ga is between 1 and 3, and Zn is between 2 and 4. Furthermore, when stating that the atomic ratio is In:Ga:Zn = 5:1:6 or close to it, When n is set to 5, Ga is greater than 0.1 and less than or equal to 2, and Zn is between 5 and 7. This includes cases where the atomic ratio is In:Ga:Zn = 1:1:1 or close to it. When listing, if In is set to 1, Ga must be greater than 0.1 and less than or equal to 2, and Zn must be 0. This includes cases where the value is greater than 1 and less than or equal to 2.

[0265] Furthermore, the semiconductor layer 108 has an energy gap of 2 eV or more, preferably 2.5 eV or less. As shown above, by using metal oxides with a wider energy gap than silicon... This allows for a reduction in the transistor's off-current.

[0266] Furthermore, it is preferable that the semiconductor layer 108 has a non-single-crystal structure. A non-single-crystal structure is, for example, This includes the CAAC structure, polycrystalline structure, microcrystalline structure, or amorphous structure described later. Non-single crystal structure In construction, amorphous structures have the highest defect level density, while CAAC structures have the highest defect level density. low.

[0267] The following explains CAAC (c-axis aligned crystal). CAAC represents an example of a crystal structure.

[0268] A CAAC structure is a structure that has multiple nanocrystals (crystalline regions with a maximum diameter of less than 10 nm). It is one of the crystalline structures of thin films, in which each nanocrystal has its c-axis oriented in a specific direction, and its a-axis and The b-axis does not have orientation, and the nanocrystals are continuously connected to each other without forming grain boundaries. This crystal structure has the following characteristics. In particular, thin films with a CAAC structure have each nanocrystal The c-axis is oriented in the thickness direction of the thin film, the normal direction of the surface to be formed, or the normal direction of the surface of the thin film. It has the characteristic of being inexpensive.

[0269] CAAC-OS (Oxide Semiconductor) is a highly crystalline oxide semiconductor. It is a conductor. On the other hand, CAAC-OS does not allow for the identification of clear grain boundaries, It can be said that a decrease in electron mobility caused by grain boundaries is less likely to occur in oxide semiconductors. Crystallinity may decrease due to the inclusion of impurities or the formation of defects, therefore CAAC-OS It can also be described as an oxide semiconductor with few impurities or defects (such as oxygen vacancies). Therefore, CAAC- Oxide semiconductors containing OS have stable physical properties. Therefore, CAAC-OS is used. Oxide semiconductors are highly heat-resistant and reliable.

[0270] In crystallography, the three axes a, b, and c constitute the unit cell (crystal). Regarding the axis, it is common to take a unit cell with a specific axis as the c-axis. Especially in layered structures In crystals with a structure, the two axes parallel to the plane direction of the layer are defined as the a-axis and the b-axis, and the axis intersecting the layer is defined as the axis intersecting the layer. It is common to use the c-axis. A typical example of a crystal having such a layered structure is... There is graphite, which is classified as a hexagonal crystal system, and the a-axis and b-axis of its unit cell are parallel to the cleavage plane. The row is oriented, and the c-axis is perpendicular to the cleavage plane. For example, the layered structure of YbFe2O4 type crystal structure. InGaZnO4 crystals can be classified as hexagonal, and their unit cell a-axis and The b-axis is parallel to the plane direction of the layer, and the c-axis is perpendicular to the layer (i.e., the a-axis and b-axis).

[0271] Oxide semiconductor films with a microcrystalline structure (microcrystalline oxide semiconductor films) can be observed using TEM. In some cases, the crystalline portion cannot be clearly identified. The crystalline portion is between 1 nm and 100 nm in size, or between 1 nm and 10 nm in size. This is often the case. In particular, with microcrystals between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor film having a certain nanocrystal (nc) is called nc-OS (Nanocrystalline Oxide Semiconductor) film Furthermore, in nc-OS films, grain boundaries can be clearly observed, for example, in TEM observation images. It may not be possible.

[0272] nc-OS films are used in minute regions (for example, regions between 1 nm and 10 nm, especially regions between 1 nm and 10 nm). The atomic arrangement has periodicity in the region of 3 nm or less. In addition, the nc-OS film is different There is no regularity in the crystal orientation between the crystalline regions. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS films may be indistinguishable from amorphous oxide semiconductor films. There are cases where this occurs. For example, XRD using X-rays with a diameter larger than that of the crystalline region on an nc-OS film. When structural analysis is performed using the apparatus, the out-of-plane method analyzes the crystal planes. The indicated peak is not detected. Also, the probe diameter is larger than that of the crystalline region in the nc-OS film. Electron diffraction (also called limited-field electron diffraction) using electron beams (for example, 50 nm or longer). When this is done, a diffraction pattern resembling a halo pattern is observed. On the other hand, when applied to an nc-OS film... Furthermore, the probe diameter should be close to or smaller than the size of the crystal (for example, 1 nm to 30 nm). When electron diffraction (also called nanobeam electron diffraction) is performed using the electron beam shown below, a circle is drawn. A ring-shaped area of ​​high brightness was observed, and multiple spots were observed within that area. This may happen.

[0273] nc-OS films have a lower defect level density than amorphous oxide semiconductor films. However, nc-O The S film shows no regularity in crystal orientation between different crystalline regions. Therefore, the nc-OS film is Compared to CAAC-OS films, nc-OS films have a higher defect level density. Therefore, nc-OS films are CAAC- Compared to OS films, it may have a higher carrier density and higher electron mobility. Therefore, nc Transistors using OS films may exhibit high field-effect mobility.

[0274] Compared to CAAC-OS films, nc-OS films require a lower oxygen flow rate ratio during deposition. It can be formed by... Furthermore, compared to CAAC-OS films, nc-OS films... It can also be formed by lowering the substrate temperature. For example, the nc-OS film can be formed by lowering the substrate temperature. A state where the temperature is set to a relatively low temperature (for example, below 130°C), or a state where the substrate is not heated. However, because it can form thin films, it is suitable for use with large glass substrates or resin substrates. This can increase productivity.

[0275] An example of a metal oxide crystal structure is described below. Sputtering using a chromium target (In:Ga:Zn=4:2:4.1 [atomic ratio]) We will explain a metal oxide film deposited by the ring method as an example. Using the above target, Metal oxide formed by sputtering at a plate temperature of 100°C to 130°C. This refers to either an nc (nano crystal) structure or a CAAC structure. , or a structure in which these are mixed is likely to be formed. On the other hand, assuming the substrate temperature is room temperature (RT) Metal oxides formed by sputtering tend to adopt an nc crystal structure. The room temperature (RT) referred to here includes the temperature when the substrate is not intentionally heated.

[0276] [Composition of metal oxides] Hereinafter, CAC(C) that can be used in the transistor disclosed in one aspect of the present invention will be described. This document describes the configuration of a loud-Aligned Composite (Loud) OS.

[0277] Furthermore, in this specification, etc., CAAC (c-axis aligned crystal l) and when referring to CAC (Cloud-Aligned Composite) There is. Note that CAAC represents one example of a crystal structure, and CAC represents one of the functions or components of the material. This illustrates an example.

[0278] CAC-OS or CAC-metal oxide is a material in which some parts are conductive. It has both electrical and insulating properties in some parts of the material, and the material as a whole has semiconductor properties. Furthermore, CAC-OS or CAC-metal oxide is used to activate the transistor. When used in layers, the conductive function is the function of allowing electrons (or holes) that act as carriers to flow. In other words, the insulating function is the function of preventing the flow of electrons, which act as carriers. Conductive function and insulating function By making the functions of sex and other functions work complementaryly, a switching function (On / O) is created. The function of ff (fastening) can be imparted to CAC-OS or CAC-metal oxide. In CAC-OS or CAC-metal oxide, the respective functions are separated. By doing so, the functions of both can be maximized.

[0279] Furthermore, CAC-OS or CAC-metal oxide provides conductive and insulating properties. It has conductive regions. The conductive regions have the conductive function described above, and the insulating regions have the insulating function described above. It has the function of being conductive. Furthermore, within the material, the conductive region and the insulating region are separated by nanoparticles. In some cases, they are separated by a bell. Also, conductive regions and insulating regions are located within the material. It may be unevenly distributed. Also, the conductive region appears blurred around the edges and connected in a cloud-like manner when observed. There are cases where this can happen.

[0280] Furthermore, in CAC-OS or CAC-metal oxide, the conductive region and The insulating region is defined as 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. They may be dispersed in the material in sizes smaller than m.

[0281] Furthermore, CAC-OS or CAC-metal oxide have different band gaps. It is composed of components having [a certain characteristic]. For example, CAC-OS or CAC-metal ox The ide consists of a component with a wide gap due to the insulating region and a component with a wide gap due to the conductive region. It consists of a component having a narrow gap. In this configuration, when the carrier is flowing... In components with a narrow gap, the carrier mainly flows. The component with a gap acts complementaryly with the component with a wide gap, and the component with a narrow gap In conjunction with the components that are involved, carriers also flow to components with a wide gap. Therefore, the above CAC-OS or CAC-metal oxide in the channel formation region of the transistor When used in this way, a high current driving force, i.e., a large on-current, is required in the transistor's on state. Furthermore, high field-effect mobility can be obtained.

[0282] In other words, CAC-OS or CAC-metal oxide is a matrix composite Material (matrix composite), or metal matrix composite material (metal It can also be called a matrix composite.

[0283] The above is an explanation of the constituent elements.

[0284] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0285] (Embodiment 2) In this embodiment, an example of a display device having a transistor as illustrated in the previous embodiment is provided. I will explain about that.

[0286] [Example Configuration] Figure 9(A) shows a top view of the display device 700. The display device 700 is connected to the sealing material 712. It has a first substrate 701 and a second substrate 705 that are bonded together. In the region sealed by the second substrate 705 and the sealing material 712, the first substrate 701 A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 706 are provided above. It can be displayed. Furthermore, the pixel section 702 is provided with multiple display elements.

[0287] Furthermore, in the portion of the first substrate 701 that does not overlap with the second substrate 705, FPC716(FP FPC terminal section 7 to which C: Flexible printed circuit is connected. 08 is provided. FPC716 connects the FPC terminal 708 and the signal line 710. Through this, the pixel unit 702, the source driver circuit unit 704, and the gate driver circuit unit 706 Various signals are supplied to each of them.

[0288] Multiple gate driver circuits 706 may be provided. The path section 706 and the source driver circuit section 704 are each formed separately on a semiconductor substrate or the like. The IC chip may be in the form of a packaged IC chip. The IC chip is on the first substrate 70 It can be implemented on 1 or on FPC716.

[0289] The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 have A transistor, which is a semiconductor device according to one aspect of the present invention, can be applied to the transistor. ru.

[0290] Examples of display elements provided in the pixel section 702 include liquid crystal elements and light-emitting elements. Liquid crystal elements include transmissive liquid crystal elements, reflective liquid crystal elements, and semi-transmissive liquid crystal elements. It can be. Also, as a light-emitting element, it can be an LED (Light Emitting). Diode), OLED (Organic LED), QLED (Quantum-do Examples include self-luminous light-emitting elements such as LEDs and semiconductor lasers. Also, shutters - Method or optical interferometry MEMS (Micro Electro Mechanics) (Systems) Elements, microcapsule method, electrophoresis method, electrowet By using a display element that employs a lighting method or an electronic powder fluid (registered trademark) method, etc. It can also be done this way.

[0291] The display device 700A shown in Figure 9(B) replaces the first substrate 701 with a flexible resin A display device to which the lipid layer 743 is applied can be used as a flexible display. This is an example.

[0292] The display device 700A has a pixel section 702 that is not rectangular in shape, but has an arc-shaped corner. Furthermore, as shown in region P1 in Figure 9(B), the pixel portion 702 and the resin layer 743 The part has a notched portion. A pair of gate driver circuit sections 706 are located in the pixel section 70 It is provided on both sides of 2. The gate driver circuit section 706 is located at the corner of the pixel section 702. In this context, it is provided along an arc-shaped contour.

[0293] The resin layer 743 has a shape in which the portion where the FPC terminal portion 708 is provided protrudes. Furthermore, a portion of the resin layer 743, including the FPC terminal portion 708, is on the back side in area P2 in Figure 9(B). It can be folded back. By folding back a part of the resin layer 743, the FPC 716 can be folded back to form the pixel section 7 With the 02 placed on top of each other, the display device 700A can be mounted on electronic equipment. This allows for space-saving in electronic devices.

[0294] Furthermore, the IC717 is mounted on the FPC716, which is connected to the display device 700A. IC717 functions, for example, as a source driver circuit. In this case, the display device 7 The source driver circuit section 704 in 00A includes a protection circuit, a buffer circuit, and a demultiplier. The configuration may include at least one such circuit, such as a weed circuit.

[0295] The display device 700B shown in Figure 9(C) is suitable for use in electronic devices having a large screen. This is a display device capable of doing so. The display device 700B can be used, for example, in a television system, a monitor system. , personal computers (including laptops and desktops), tablet devices, It can be suitably used in digital signage and the like.

[0296] The display device 700B consists of multiple source driver ICs 721 and a pair of gate driver circuits. It has part 722.

[0297] Multiple source driver IC721s are each attached to the FPC723. Furthermore, multiple FPC723s have one terminal connected to the first substrate 701 and the other terminal connected to the printed circuit board Each is connected to board 724. By bending FPC723, the printed circuit board 7 By placing 24 on the back side of the pixel unit 702, it can be mounted on electronic devices, reducing the size of the electronic device. This allows for a more controlled pace.

[0298] On the other hand, the gate driver circuit section 722 is formed on the first substrate 701. This makes it possible to create electronic devices with even narrower bezels.

[0299] This configuration makes it possible to realize a large and high-resolution display device. For example, Surface size is 30 inches or more diagonally, 40 inches or more, 50 inches or more, or 60 inches or more diagonally. The above display device can be realized. Also, resolutions such as 4K2K or 8K4K can be achieved. This makes it possible to realize extremely high-resolution display devices.

[0300] [Example of cross-sectional configuration] The following describes configurations using liquid crystal elements and EL elements as display elements. This will be explained using Figures 10 to 13. Note that Figures 10 to 12 are based on Figure 9(A), respectively. Figure 13 is a cross-sectional view along the dashed line QR shown in Figure 9(B). This is a cross-sectional view of the dashed line ST in the 700A. Figures 10 and 11 show the display element and The first example uses a liquid crystal element, while Figures 12 and 13 show configurations using an electroluminescent (EL) element.

[0301] [Explanation of common parts of display devices] The display device shown in Figures 10 to 13 comprises a wiring section 711, a pixel section 702, and a saw It has a screwdriver circuit section 704 and an FPC terminal section 708. The routing wiring section 711 is , has a signal line 710. The pixel section 702 has a transistor 750 and a capacitive element 790. The source driver circuit section 704 has a transistor 752. In Figure 11, the capacitance This shows the case where element 790 is not present.

[0302] Transistors 750 and 752 are the transistors exemplified in Embodiment 1. It can be applied.

[0303] The transistor used in this embodiment is made of an oxide that has been purified to suppress the formation of oxygen vacancies. It has a semiconductor film. The transistor can reduce the off-current. Therefore, it can handle electrical signals such as image signals. The holding time for signal signals can be extended, and the writing interval for image signals, etc., can also be set to be longer. This reduces the frequency of fresh cycles, resulting in lower power consumption.

[0304] Furthermore, the transistor used in this embodiment is capable of obtaining a relatively high field-effect mobility. Therefore, high-speed operation is possible. For example, a transistor capable of such high-speed operation can be used in a display device. By using it in the pixel section, the switching transistor and the drive circuit used in the drive circuit are used. A transistor can be formed on the same substrate. That is, by using a silicon wafer, A configuration that does not apply a pre-formed drive circuit is also possible, thereby reducing the number of components in the display device. This is possible. Furthermore, by using transistors capable of high-speed driving in the pixel section, We can provide high-quality images.

[0305] The capacitive element 790 shown in Figures 10, 12, and 13 is a part of the transistor 750. The lower electrode is formed by processing the same film as the gate electrode of 1, and the same metal oxide as the semiconductor layer. It has an upper electrode formed by processing a material. The upper electrode is the saw of transistor 750 The resistance is reduced, similar to the drain region. Also, between the lower electrode and the upper electrode A portion of the insulating film, which functions as the first gate insulating layer of transistor 750, is provided therein. In other words, the capacitive element 790 has an insulating film that functions as a dielectric film sandwiched between a pair of electrodes. It has a stacked structure. In addition, the upper electrode has the source electrode and drain electrode of the transistor. Wiring obtained by processing the same film as the electrodes is connected.

[0306] Furthermore, planar insulating material is applied to transistors 750, 752, and 790. A border film 770 is provided.

[0307] The transistor 750 in the pixel section 702 and the source driver circuit section 704 Transistors with different structures than the 752 transistor may be used. For example, any one of them A top-gate transistor is applied to one side, and a bottom-gate transistor is applied to the other side. A configuration using the above gate driver circuit section 706 may also be used. This is the same as the IBA circuit section 704.

[0308] Signal line 710 is the same as the source and drain electrodes of transistors 750 and 752. It is formed of a conductive film. In this case, if a low-resistance material such as a material containing copper elements is used, This is preferable because it minimizes signal delays caused by line resistance, allowing for display on a large screen.

[0309] The FPC terminal section 708 includes wiring 760, part of which functions as a connecting electrode, and an anisotropic conductive film 78. It has 0 and FPC716. Wiring 760 is connected to FPC71 via an anisotropic conductive film 780. It is electrically connected to the terminals of 6. Here, wiring 760 is connected to transistor 750. It is formed of the same conductive film as the source electrode and drain electrode of 752.

[0310] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate or a plastic substrate. Flexible substrates such as buck substrates can be used. When using such a substrate, water or water between the first substrate 701 and the transistor 750, etc. It is preferable to provide an insulating layer that has barrier properties against the element.

[0311] Furthermore, on the second substrate 705 side, there is a light-shielding film 738, a colored film 736, and an insulating film in contact with these. A border film 734 and are provided.

[0312] [Example configuration of a display device using liquid crystal elements] The display device 700 shown in Figure 10 has a liquid crystal element 775 and a spacer 778. The sub-element 775 has a conductive layer 772, a conductive layer 774, and a liquid crystal layer 776 between them. The electrode layer 774 is provided on the second substrate 705 side and functions as a common electrode. The conductive layer 772 is electrically connected to the source electrode or drain electrode of the transistor 750. The conductive layer 772 is formed on the planar insulating film 770 and functions as a pixel electrode. ru.

[0313] The conductive layer 772 may be made of a material that is transparent to visible light or a material that is reflective to visible light. Yes, it is possible. Examples of translucent materials include oxide materials containing indium, zinc, tin, etc. It is recommended to use it. As reflective materials, for example, materials containing aluminum, silver, etc. can be used. That's good.

[0314] If a reflective material is used for the conductive layer 772, the display device 700 becomes a reflective liquid crystal display device. On the other hand, if a translucent material is used for the conductive layer 772, a transmissive liquid crystal display device is obtained. In the case of a transmissive liquid crystal display device, a polarizing plate is provided on the viewing side. On the other hand, in the case of a transmissive liquid crystal display device... A pair of polarizing plates are provided so as to sandwich the liquid crystal element.

[0315] The display device 700 shown in Figure 11 uses a transverse electric field method (for example, FFS mode) liquid crystal element 77 An example using 5 is shown. A common electrode is formed on the conductive layer 772 via an insulating layer 773. A conductive layer 774 is provided. Due to the electric field generated between the conductive layer 772 and the conductive layer 774, The orientation state of the liquid crystal layer 776 can be controlled.

[0316] In Figure 11, the laminated structure of conductive layer 774, insulating layer 773, and conductive layer 772 provides retention capacity. It can be configured in terms of quantity. Therefore, there is no need to provide a separate capacitive element, and the aperture ratio can be increased. It is possible.

[0317] Furthermore, although not shown in Figures 10 and 11, there is a configuration in which an alignment film is provided that is in contact with the liquid crystal layer 776. This may also be done. In addition, optical components (optical substrates) such as polarizing members, phase difference members, and anti-reflective members. In addition, light sources such as backlights and sidelights can be provided as appropriate.

[0318] The liquid crystal layer 776 contains thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, and polymer dispersion liquid. Crystal (PDLC: Polymer Dispersed Liquid Crystal) Polymer Network Liquid Crystal (PNLC) d Crystal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. When employing a transverse electric field method, a liquid crystal exhibiting a blue phase without an alignment layer may be used.

[0319] Furthermore, the liquid crystal element mode is TN (Twisted Nematic) mode. VA (Vertical Alignment) mode, IPS (In-Plane-S) witching) mode, FFS(Fringe Field Switching) mode, ASM (Axially Symmetric aligned Micro- cell) mode, OCB (Optically Compensated Biref ringence) mode, ECB (Electrically Controlled) You can use modes such as Birefringence mode and Guest Host mode. .

[0320] Furthermore, the liquid crystal layer 776 uses polymer-dispersed liquid crystals, polymer-network liquid crystals, etc. Scattering liquid crystal elements can also be used. In this case, black and white display can be achieved without providing the colored film 736. The configuration may be one in which the display is performed, or it may be one in which a colored film 736 is used to perform color display.

[0321] Furthermore, as a method for driving liquid crystal elements, color display is performed based on the time additive color mixing method, A split-screen display method (also known as a field-sequential drive method) may be applied. In addition, a configuration without a colored film 736 can be used. When a time-division display method is used, For example, it is necessary to provide subpixels that exhibit the respective colors R (red), G (green), and B (blue). Because it lacks certain features, it offers advantages such as improved pixel aperture ratio and increased resolution.

[0322] [Display devices using light-emitting elements] The display device 700 shown in Figure 12 has a light-emitting element 782. The light-emitting element 782 is a conductive layer It has 772, an EL layer 786, and a conductive film 788. The EL layer 786 is an organic compound, and It contains inorganic compounds such as quantum dots.

[0323] Examples of materials that can be used with organic compounds include fluorescent materials or phosphorescent materials. It can be made. Also, as a material that can be used for quantum dots, colloidal quantum dots Materials, alloy-type quantum dot materials, core-shell type quantum dot materials, core-type quantum dot materials, These are some examples.

[0324] The display device 700 shown in Figure 12 has a conductive layer 772 covering a portion of the planar insulating film 770. An insulating film 730 is provided. Here, the light-emitting element 782 has a light-transmitting conductive film 788, This is a top-emission type light-emitting element. The light-emitting element 782 emits light towards the conductive layer 772. The bottom emission structure that is ejected emits light, and light is emitted to both the conductive layer 772 side and the conductive film 788 side. It may also be a dual-emission structure.

[0325] Furthermore, the colored film 736 is provided in a position that overlaps with the light-emitting element 782, and the light-shielding film 738 is an insulating film. It is provided in a position overlapping with 730, in the routing wiring section 711, and in the source driver circuit section 704. Furthermore, the colored film 736 and the light-shielding film 738 are covered with an insulating film 734. The space between the light-emitting element 782 and the insulating film 734 is filled with a sealing film 732. 86 are formed in island-like patterns for each pixel or in striped patterns for each row of pixels, that is, by coloring. In some cases, the colored film 736 may not be provided.

[0326] Figure 13 shows a display device configuration that is suitably applicable to a flexible display. Figure 13 is a cross-sectional view of the display device 700A shown in Figure 9(B) along the dashed line ST. That is the case.

[0327] The display device 700A shown in Figure 13 replaces the first substrate 701 shown in Figure 12 with a support base The structure has a laminated configuration consisting of a plate 745, an adhesive layer 742, a resin layer 743, and an insulating layer 744. The transistor 750 and the capacitive element 790 are located on the insulating layer 744 provided on the resin layer 743. It is located at [location].

[0328] The support substrate 745 is a substrate containing organic resin, glass, etc., and is thin enough to be flexible. The resin layer 743 is a layer containing organic resins such as polyimide and acrylic. Insulating layer 744 This includes an inorganic insulating film such as silicon oxide, silicon oxide nitride, and silicon nitride. Resin layer 74 3 and the support substrate 745 are bonded together by an adhesive layer 742. The resin layer 743 is It is preferable that the substrate is thinner than the support substrate 745.

[0329] Furthermore, the display device 700A shown in Figure 13 has a protective layer 7 instead of the substrate 705 shown in Figure 12. It has 40. The protective layer 740 is bonded to the sealing film 732. For example, a glass substrate or a resin film can be used. Also, as the protective layer 740 Optical components such as polarizing plates and scattering plates, input devices such as touch sensor panels, or these A configuration in which two or more of these are stacked may also be applied.

[0330] Furthermore, the EL layer 786 of the light-emitting element 782 has islands on the insulating film 730 and the conductive layer 772. It is arranged in a certain manner. The EL layer 786 is made so that the light-emitting color differs for each sub-pixel. Therefore, color display can be achieved without using the colored film 736. Also, the light-emitting element 782 A protective layer 741 is provided to cover the light-emitting element 782. The protective layer 741 protects the light-emitting element 782 from water and other aggravating elements. It has the function of preventing the diffusion of pure substances. It is preferable to use an inorganic insulating film for the protective layer 741. It is also possible to create a laminated structure that includes one or more inorganic insulating films and one or more organic insulating films. preferable.

[0331] Furthermore, Figure 13 shows the foldable region P2. In region P2, the support substrate 7 45. In addition to the adhesive layer 742, there are portions where no inorganic insulating film such as an insulating layer 744 is provided. Furthermore, in region P2, a resin layer 746 is provided covering the wiring 760. The goal is to minimize the amount of inorganic insulating film in the bendable region P2, and to include conductive materials such as metals or alloys. By constructing a layer consisting only of layers containing organic material, cracks will occur when bent. This can prevent this from happening. Also, by not providing a support substrate 745 in region P2, it is possible to make it extremely small The radius of curvature allows a portion of the display device 700A to be bent.

[0332] [Example of a configuration in which an input device is provided to the display device] Furthermore, an input device may be provided in the display device shown in Figures 10 to 13. For example, touch sensors can be cited.

[0333] For example, sensor types include capacitive, resistive, surface acoustic wave, and infrared. Various methods can be used, such as formula, optical, and pressure-sensitive methods. Or, two or more of these can be used. They may be used in combination.

[0334] The touch panel configuration is a so-called in-cell type, where the input device is formed between a pair of circuit boards. A so-called on-cell type touch panel, in which the touch panel and input device are formed on the display device, Alternatively, there are so-called out-cell type touch panels that are attached to display devices.

[0335] The configuration examples illustrated in this embodiment, and the corresponding drawings, etc., are at least a part of them. This can be implemented by combining it with other configuration examples or drawings as appropriate.

[0336] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0337] (Embodiment 3) In this embodiment, Figure 14 shows a display device having a semiconductor device according to one aspect of the present invention. We will use this to provide an explanation.

[0338] The display device shown in Figure 14(A) comprises a pixel unit 502, a drive circuit unit 504, and a protection circuit 50 It has 6 and a terminal portion 507. Note that the protection circuit 506 may be omitted. .

[0339] Transistors in the pixel section 502 and the drive circuit section 504 are configured according to one aspect of the present invention. A transistor can be applied. Also, a transistor according to one aspect of the present invention can be used in the protection circuit 506. You may apply this.

[0340] The pixel section 502 is arranged in X rows and Y columns (where X and Y are independent natural numbers greater than or equal to 2). It has multiple pixel circuits 501 that drive a number of display elements.

[0341] The drive circuit section 504 outputs a scan signal to the scan lines GL_1 to GL_X. Source driver 504a, which supplies data signals to data lines DL_1 to DL_Y. It has a drive circuit such as 4b. The gate driver 504a has at least a shift register The configuration should include such features. Furthermore, the source driver 504b can, for example, handle multiple analog switches. It is constructed using components such as 'C'. Furthermore, it uses shift registers and other components to create the source driver 504b. It may be configured as follows:

[0342] The terminal section 507 inputs power, control signals, and image signals, etc., from an external circuit to the display device. This refers to the part that is equipped with terminals for that purpose.

[0343] The protection circuit 506, when a potential outside a certain range is applied to the wiring to which it is connected, This is a circuit that creates a conductive state between two wires. The protection circuit 506 shown in Figure 14(A) is For example, the scan line GL is the wiring between the gate driver 504a and the pixel circuit 501, or Various wirings such as data lines DL, which are the wirings between source driver 504b and pixel circuit 501 Connected.

[0344] Furthermore, the gate driver 504a and the source driver 504b are connected to the pixel section 502 and They may be provided on the same board, or the gate driver circuit or source driver circuit may be A separately formed substrate (for example, a drive circuit formed from a single-crystal semiconductor film or a polycrystalline semiconductor film) The road substrate is bonded using COG or TAB (Tape Automated Bonding). It may also be configured to be mounted on a circuit board.

[0345] Furthermore, the multiple pixel circuits 501 shown in Figure 14(A) are, for example, shown in Figures 14(B) and (C). The configuration shown can be as follows.

[0346] The pixel circuit 501 shown in Figure 14(B) consists of a liquid crystal element 570, a transistor 550, and It has a quantitative element 560 and a pixel circuit 501. The pixel circuit 501 also has data line DL_n and scan line GL_ m, potential supply line VL, etc. are connected.

[0347] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set according to the data being written to it. A common potential is set on one of the pairs of electrodes of the liquid crystal element 570 that each of the pixel circuits 501 possesses. (Common potential) may be applied. Also, a pair of liquid crystal elements 570 of the pixel circuit 501 in each row One of the electrodes may be given a different potential.

[0348] Furthermore, the pixel circuit 501 shown in Figure 14(C) consists of transistors 552 and 554, and a capacitance element It has a sub-element 562 and a light-emitting element 572. The pixel circuit 501 also has a data line DL_n The scan line GL_m, potential supply line VL_a, power supply line VL_b, etc., are connected to it.

[0349] Furthermore, a high power supply potential VDD is supplied to one of the potential supply lines VL_a and VL_b. On the other hand, a low power supply potential VSS is applied to the gate of transistor 554. Depending on the potential, the current flowing through the light-emitting element 572 is controlled, thereby controlling the light-emitting element 5 The luminescence is controlled from 72 onwards.

[0350] The configuration examples illustrated in this embodiment, and the corresponding drawings, etc., are at least a part of them. This can be implemented by combining it with other configuration examples or drawings as appropriate.

[0351] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0352] (Embodiment 4) Below, we have a pixel circuit equipped with memory for correcting the gradation displayed in the pixel, and this The display device will be described below. The transistor exemplified in Embodiment 1 is exemplified below. This can be applied to transistors used in pixel circuits.

[0353] [Circuit Configuration] Figure 15(A) shows the circuit diagram of the pixel circuit 400. The pixel circuit 400 is a transistor M 1. It has a transistor M2, a capacitor C1, and a circuit 401. Furthermore, the pixel circuit 400 includes: Wiring S1, S2, G1, and G2 are connected.

[0354] Transistor M1 has its gate connected to wiring G1, and one of its sources or drains connected to wiring S1. The other end is connected to one electrode of capacitance C1. Transistor M2 has a gate that is wired G2, one of the source and drain is connected to wiring S2, the other electrode is connected to capacitance C1, and rotation It connects to Route 401, respectively.

[0355] Circuit 401 is a circuit that includes at least one display element. Various elements can be used as the display element. While children can be used, typical examples include light-emitting elements such as organic EL elements and LED elements, and liquid crystals. Device, or MEMS (Micro Electro Mechanical System) EMS elements and the like can be applied.

[0356] The node connecting transistor M1 and capacitor C1 is node N1, and the node connecting transistor M2 and... Let node N2 be the node connecting to path 401.

[0357] The pixel circuit 400 maintains the potential of node N1 by turning off transistor M1. It can be maintained. Also, by turning off transistor M2, the power of node N2 can be controlled. It can maintain its position. Also, with transistor M2 in the OFF state, By writing a predetermined potential to node N1 via station M1, capacitive coupling via capacitor C1 is achieved. This allows the potential of node N2 to be changed in accordance with the potential displacement of node N1.

[0358] Here, in the embodiment, one or both of transistors M1 and M2 are The transistor using oxide semiconductors, as exemplified in 1, can be applied. Therefore, by using an extremely low off-current, the potentials of nodes N1 and N2 are maintained for a long period of time. This is possible. However, if the period for which the potential of each node is maintained is short (specifically, the frame When the frequency is 30Hz or higher, a transistor using a semiconductor such as silicon is used. You may also use "ta".

[0359] [Example of driving method] Next, an example of how the pixel circuit 400 operates will be explained using Figure 15(B). Figure 15 (B) is a timing chart related to the operation of the pixel circuit 400. Further explanation is not provided here. To simplify things, various resistors such as wiring resistance, parasitic capacitance of transistors and wiring, and The effects of transistor threshold voltage and other factors are not considered.

[0360] In the operation shown in Figure 15(B), one frame period is divided into period T1 and period T2. T1 is the period during which the potential is written to node N2, and during period T2, the potential is written to node N1. It is a period of time.

[0361] [Period T1] During period T1, a potential is applied to both wire G1 and wire G2 that turns the transistor ON. Also, the wiring S1 has a fixed potential V ref It supplies the first day to wiring S2. Potential V w To supply.

[0362] Node N1 receives a potential V from wiring S1 via transistor M1. ref It is given. Furthermore, node N2 has a first data potential V via transistor M2. w It is given. Therefore, capacitance C1 has a potential difference V w -V ref This state is maintained.

[0363] [Period T2] Next, during period T2, a potential is applied to wiring G1 to turn on transistor M1, and The wire G2 is given a potential that turns off transistor M2. Also, the wiring S1 is supplied with the second diode DATA potential V data It supplies a predetermined constant potential to the wiring S2, or a floating It may also be in a ling state.

[0364] Node N1 has a second data potential V via transistor M1. data It is given. At this time, due to capacitive coupling by capacitance C1, the second data potential V data Node N The potential of point 2 changes by a potential dV. That is, in circuit 401, the first data potential V w and electricity The potential with the potential dV added will be input. Note that in Figure 15(B), the potential dV is a positive value. Although it is shown to be a negative value, it may also be a negative value. That is, the second data potential V dat a The potential is V ref It can be even lower.

[0365] Here, the potential dV is roughly determined by the capacitance value of capacitor C1 and the capacitance value of circuit 401. If the capacitance value of capacitor C1 is sufficiently larger than the capacitance value of circuit 401, the potential dV is the second dV. DATA potential V data The potential will be close to that.

[0366] Thus, the pixel circuit 400 combines two types of data signals to form a display element. Since it is possible to generate the potential supplied to path 401, grayscale correction can be performed within the pixel circuit 400. It becomes possible to do so.

[0367] Furthermore, the pixel circuit 400 generates a potential that exceeds the maximum potential that can be supplied to wiring S1 and wiring S2. It also becomes possible to achieve this. For example, when using light-emitting elements, high dynamic range ( It can display HDR (High Dynamic Range) and other functions. Furthermore, when using liquid crystal elements, overdrying can be performed. It can implement features such as drive mechanisms.

[0368] [Examples of application] [Examples using liquid crystal elements] The pixel circuit 400LC shown in Figure 15(C) has circuit 401LC. It has a liquid crystal element LC and a capacitance C2.

[0369] In a liquid crystal element (LC), one electrode is the electrode of node N2 and capacitance C2, and the other electrode is Potential V com2 Connect to the wiring provided. Capacitor C2 is connected when the other electrode is at potential V com1 Connect to the provided wiring.

[0370] Capacity C2 functions as the retention capacity. Note that capacity C2 can be omitted if it is not needed. Cut.

[0371] The pixel circuit 400LC can supply a high voltage to the liquid crystal element LC, for example High-speed display is achieved through overdrive operation, and high-voltage liquid crystal materials are applied. It is possible to do things like this. Also, by supplying a correction signal to wiring S1 or wiring S2, The gradation can also be corrected according to the operating temperature and the degradation state of the liquid crystal elements (LC).

[0372] [Examples using light-emitting elements] The pixel circuit 400EL shown in Figure 15(D) has circuit 401EL. It has a light-emitting element EL, a transistor M3, and a capacitor C2.

[0373] Transistor M3 has a gate that connects to one electrode of node N2 and capacitance C2, and a source and a dot. One side of Rain has a potential of V H One is a wire that is given, and the other is one electrode of the light-emitting element EL, and They are connected. Capacitor C2 is connected when the other electrode is at potential V com Connect to the provided wiring. In the light-emitting element (EL), the other electrode is at potential V L Connect to the provided wiring.

[0374] Transistor M3 has the function of controlling the current supplied to the light-emitting element EL. Capacitor C2 This functions as a holding capacity. Capacity C2 can be omitted if it is not needed.

[0375] Note that this configuration shows the anode side of the light-emitting element EL connected to transistor M3. However, transistor M3 may be connected to the cathode side. In that case, the potential V H and potential V L The value can be changed as needed.

[0376] The pixel circuit 400EL generates light by applying a high potential to the gate of transistor M3. Because it can supply a large current to the sub-EL, it can enable features such as HDR display. It can be done. Also, by supplying a correction signal to wiring S1 or wiring S2, the transistor It can also correct for variations in the electrical characteristics of M3 and light-emitting elements (EL).

[0377] Note that the circuits are not limited to those exemplified in Figures 15(C) and (D), and may also include transistors, capacitors, etc. A configuration with the addition of this element is also acceptable.

[0378] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0379] (Embodiment 5) In this embodiment, a display module that can be manufactured using one aspect of the present invention is provided. I will explain.

[0380] The display module 6000 shown in Figure 16(A) consists of an upper cover 6001 and a lower cover 60 Between 02 and the display device 6006, frame 6009, and pre- It has a circuit board 6010 and a battery 6011.

[0381] For example, a display device manufactured using one aspect of the present invention may be used in the display device 6006. This is possible. The display device 6006 enables the realization of an extremely low-power display module. It is possible.

[0382] The upper cover 6001 and the lower cover 6002 are sized to fit the display device 6006. The shape and dimensions can be changed as needed.

[0383] The display device 6006 may also have the functionality of a touch panel.

[0384] Frame 6009 is determined by the protection function of the display device 6006 and the operation of the printed circuit board 6010. It may also have functions such as blocking electromagnetic waves generated, or functioning as a heat sink.

[0385] Printed circuit board 6010 is a power supply circuit and a signal for outputting video signals and clock signals. It includes a processing circuit, a battery control circuit, and the like.

[0386] Figure 16(B) is a schematic cross-sectional view of a display module 6000 equipped with an optical touch sensor. That is the case.

[0387] The display module 6000 includes a light-emitting section 6015 and a receiver provided on the printed circuit board 6010. It has a light-emitting section 6016. It is also surrounded by an upper cover 6001 and a lower cover 6002. The region has a pair of light guides (light guide 6017a, light guide 6017b).

[0388] The display device 6006 connects to the printed circuit board 6010 and the battery via the frame 6009. - It is installed overlapping with 6011. The display device 6006 and frame 6009 are connected to the light guide section 6 017a is fixed to the light guide section 6017b.

[0389] Light 6018 emitted from the light-emitting unit 6015 is directed by the light guide unit 6017a to the display device 600. It passes through the upper part of 6, through the light guide part 6017b, and reaches the light receiving part 6016. For example, a finger or a stand Touch operation is detected when light 6018 is blocked by an object to be detected, such as an illustration. It is possible.

[0390] Multiple light-emitting units 6015 are provided, for example, along two adjacent sides of the display device 6006. Multiple light-receiving units 6016 are provided at positions opposite to the light-emitting unit 6015. This allows for... Information about the location where the operation was performed can be obtained.

[0391] The light-emitting section 6015 can use a light source such as an LED element, and in particular, infrared light It is preferable to use a light source that emits light. The light receiving unit 6016 receives the light emitted by the light emitting unit 6015. A photoelectric element that converts light into an electrical signal can be used. Preferably, one that can receive infrared light. A photodiode can be used.

[0392] The light-emitting section 6015 and the light-emitting section 6015 are separated by the light-transmitting light-emitting section 6017a and light-transmitting section 6017b. The light receiving unit 6016 can be positioned below the display device 6006, and ambient light can be received by the light receiving unit 601 Reaching 6 can suppress the malfunction of the touch sensor. In particular, it absorbs visible light and infrared light. Using a resin that allows light to pass through can more effectively suppress malfunctions in touch sensors.

[0393] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0394] (Embodiment 6) This embodiment describes an example of an electronic device to which a display device according to one aspect of the present invention can be applied. I will reveal it.

[0395] The electronic device 6500 shown in Figure 17(A) is a portable device that can be used as a smartphone. It is a mobile information terminal.

[0396] The electronic device 6500 consists of a housing 6501, a display unit 6502, a power button 6503, and a button 6 It includes 504, speaker 6505, microphone 6506, camera 6507, and light source 6508, etc. The display unit 6502 is equipped with a touch panel function.

[0397] A display device according to one embodiment of the present invention can be applied to the display unit 6502.

[0398] Figure 17(B) is a schematic cross-sectional view of the housing 6501 including the end on the microphone 6506 side.

[0399] A light-transmitting protective member 6510 is provided on the display surface side of the housing 6501, and the housing 650 Within the space surrounded by 1 and protective member 6510, display panel 6511, optical member 6512, The touch sensor panel 6513, printed circuit board 6517, battery 6518, etc. are arranged. Yes, they are.

[0400] The protective member 6510 includes a display panel 6511, an optical member 6512, and a touch sensor panel. Nel 6513 is fixed by an adhesive layer (not shown).

[0401] Furthermore, in the area outside the display unit 6502, a portion of the display panel 6511 is folded back. It is done. Furthermore, the FPC6515 is connected to the folded portion. IC6516 is mounted on the 6515. Also, the FPC6515 is printed circuit board 6 It is connected to the terminal provided at 517.

[0402] A flexible display panel according to one aspect of the present invention is applied to the display panel 6511. This makes it possible to create extremely lightweight electronic devices. Also, the display panel 651 Because it is extremely thin, it allows for a reduction in the thickness of electronic devices while incorporating a large-capacity 6518 battery. It is also possible to fold back a portion of the display panel 6511 and place an FPC on the back of the pixel area. By positioning the connection point with 6515, it is possible to realize electronic devices with narrow bezels.

[0403] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0404] (Embodiment 7) In this embodiment, an electronic device equipped with a display device manufactured using one aspect of the present invention is provided. I will explain.

[0405] The electronic device described below is equipped with a display device according to one embodiment of the present invention in its display unit. Therefore, it is an electronic device that achieves high resolution. Also, high resolution and a large screen It can be made into an electronic device that is compatible with both systems.

[0406] The display unit of an electronic device according to one aspect of the present invention may display, for example, Full HD, 4K2K, 8K4 It can display video with resolutions of K, 16K, 8K, or higher.

[0407] Examples of electronic devices include television equipment, notebook personal computers, Equipped with relatively large screens such as monitors, digital signage, pachinko machines, and game machines. In addition to electronic devices, digital cameras, digital video cameras, digital photo frames, and portable devices are also available. Examples include mobile phones, portable game consoles, personal digital assistants, and audio playback devices.

[0408] An electronic device to which one aspect of the present invention is applied includes the interior or exterior walls of houses and buildings, the interior of automobiles, etc. It can be incorporated along the flat or curved surfaces of the fittings or exterior.

[0409] Figure 18(A) shows the appearance of the camera 8000 with the viewfinder 8100 attached. This is a diagram.

[0410] The camera 8000 consists of a housing 8001, a display unit 8002, operation buttons 8003, and a shutter. It has buttons 8004, etc. The camera 8000 also has a detachable lens 8006. It is attached.

[0411] The camera 8000 may have the lens 8006 and the housing integrated into a single unit.

[0412] Camera 8000 can be operated by pressing the shutter button 8004, or by using the touch panel function. Image capture can be performed by touching the display unit 8002.

[0413] The housing 8001 has a mount with electrodes, and in addition to the viewfinder 8100, it also has a strobe A power supply or other device can be connected to it.

[0414] The viewfinder 8100 has a housing 8101, a display unit 8102, buttons 8103, etc. .

[0415] The housing 8101 engages with the mount of the camera 8000 via a mount, and the camera 800 It is attached to the 0. The viewfinder 8100 receives images and other data from the camera 8000. This can be displayed on the display unit 8102.

[0416] Button 8103 functions as a power button, etc.

[0417] The display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100 are equipped with this A display device according to one embodiment of the invention can be applied. Note that a camera with a built-in viewfinder can also be used. It could also be 8000.

[0418] Figure 18(B) shows the external appearance of the head-mounted display 8200.

[0419] The head-mounted display 8200 consists of a mounting part 8201, lenses 8202, and a main body 82 03, it has a display unit 8204, a cable 8205, etc. Also, the mounting part 8201 has It has a built-in 8206 battery.

[0420] Cable 8205 supplies power from battery 8206 to main unit 8203. Unit 203 is equipped with a wireless receiver and can display the received video information on the display unit 8204. It can do that. Furthermore, the main unit 8203 is equipped with a camera that inputs information about the user's eyeball and eyelid movements. It can be used as a step.

[0421] Furthermore, the attachment part 8201 is positioned in a location that touches the user, and the flow follows the movement of the user's eyeballs. Multiple electrodes capable of detecting current are provided, and the device may also have a function to recognize line of sight. Furthermore, the device may have a function to monitor the user's pulse rate based on the current flowing through the electrode. Furthermore, the mounting section 8201 is equipped with various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor. It is also possible to have a function that displays the user's biometric information on the display unit 8204, and the user's head The display unit 8204 may also have a function to change the image displayed in accordance with the movement.

[0422] A display device according to one aspect of the present invention can be applied to the display unit 8204.

[0423] Figures 18(C),(D), and(E) show the external appearance of the head-mounted display 8300. Yes. The head-mounted display 8300 consists of a housing 8301, a display unit 8302, and It comprises a band-shaped fixing device 8304 and a pair of lenses 8305.

[0424] The user can view the display on the display unit 8302 through the lens 8305. Furthermore, by arranging the display unit 8302 in a curved shape, the user can experience a high level of realism. This is preferable. Also, another image displayed in a different area of ​​the display unit 8302 is displayed by the lens 8 By viewing through the 305, it is also possible to perform 3D displays using parallax. The configuration is not limited to having one display unit 8302, but can also have two display units 8302, allowing one of the users to... One display unit may be placed for each eye.

[0425] Furthermore, a display device according to one embodiment of the present invention can be applied to the display unit 8302. A display device having a semiconductor device in one embodiment has extremely high resolution, as shown in Figure 18(E). Even when magnified using the Uni lens 8305, the pixels are not visible to the user. It can display highly realistic images.

[0426] The electronic device shown in Figures 19(A) to 19(G) consists of a housing 9000, a display unit 9001, and Speaker 9003, operation key 9005 (including power switch or operation switch), connection terminal Child 9006, Sensor 9007 (force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, Light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power, radiation, (Including functions for measuring flow rate, humidity, gradient, vibration, odor, or infrared radiation), Microphone It has n9008, etc.

[0427] The electronic devices shown in Figures 19(A) to 19(G) have various functions. For example, various Functions to display various information (still images, videos, text images, etc.) on the display unit, touch panel function Features that display a calendar, date or time, and various software (programs). Functions that control processing, wireless communication functions, programs recorded on recording media, It may have functions such as reading and processing data. These are not the only functions that can be possessed. Electronic devices have multiple display units. It is also acceptable to equip electronic devices with cameras, etc., to take still images and videos and record them on a recording medium (external). Features include the ability to save images to the display unit or camera, and the ability to display captured images on the display unit. It's okay to do so.

[0428] Details of the electronic equipment shown in Figures 19(A) to 19(G) will be explained below.

[0429] Figure 19(A) is a perspective view showing the television equipment 9100. 100 is a large screen, for example, a display unit 9001 of 50 inches or larger, or 100 inches or larger. It is possible to incorporate it.

[0430] Figure 19(B) is a perspective view showing the personal digital assistant 9101. The personal digital assistant 9101 is For example, it can be used as a smartphone. Note that the mobile information terminal 9101 is a smartphone. A speaker 9003, connection terminal 9006, sensor 9007, etc. may be provided. Terminal 9101 can display text and image information on its multiple surfaces. Figure 19(B) The following shows an example displaying three icons 9050. Also, information 9 is shown by a dashed rectangle. 051 can also be displayed on other sides of the display unit 9001. An example of information 9051 is as follows: Notifications of incoming emails, social media messages, and phone calls; subject lines and senders of emails and social media messages. This includes name, date and time, battery level, antenna signal strength, etc. Alternatively, Information 90 You may also display an icon such as 9050 in the position where 51 is displayed.

[0431] Figure 19(C) is a perspective view showing the personal digital assistant 9102. The personal digital assistant 9102 is The display unit 9001 has the function of displaying information on three or more sides. Here, information 9052, This shows an example where information 9053 and information 9054 are displayed on different sides. For example, use The person has the portable information terminal 9102 stored in the breast pocket of their clothing, and the portable information terminal 910 Information 9053, displayed in a position visible from above 2, can also be viewed by the user. This allows you to check the display without taking the personal digital assistant 9102 out of your pocket, for example, to make a phone call. You can decide whether or not to accept it.

[0432] Figure 19(D) is a perspective view showing the wristwatch-type personal information terminal 9200. Personal information terminal 9200 can be used, for example, as a smartwatch. Also, the display unit 9001 The display surface is curved, allowing the display to follow the curved surface. Furthermore, the portable information terminal 9200 can communicate with, for example, a wireless headset. Therefore, hands-free calling is also possible. In addition, the mobile information terminal 9200 has a connection terminal Child 9006 enables mutual data transmission with other information terminals and also allows charging. Yes, it can. Furthermore, charging may be performed via wireless power supply.

[0433] Figures 19(E),(F), and(G) are perspective views showing a foldable portable information terminal 9201. Figure 19(E) shows the mobile information terminal 9201 in its unfolded state, and Figure 19(G) shows it folded. In this state, Figure 19(F) shows the transition from one of Figures 19(E) and 19(G) to the other. This is a perspective view of the device in its state. The 9201 personal digital assistant offers excellent portability when folded, and when unfolded... In this configuration, the seamless, wide display area provides excellent readability. (Portable Information Terminal 92) The display unit 9001 of 01 is connected by three housings 9000 via a hinge 9055. It is supported by. For example, the display unit 9001 is curved with a radius of curvature of 1 mm or more and 150 mm or less. It is possible to do so.

[0434] Figure 20(A) shows an example of a television system. The television system 7100 has a housing 7 The display unit 7500 is incorporated into 101. Here, the stand 7103 connects to the housing 7 This shows the configuration that supported 101.

[0435] The operation of the television device 7100 shown in Figure 20(A) is performed using the operating system provided on the housing 7101. This can be done via a switch or a separate remote control unit 7111. Alternatively, the display unit 75 A touch panel is applied to 00, and the television device 7100 is operated by touching it. Alternatively, the remote control unit 7111 may have a display in addition to the operation buttons.

[0436] The television equipment 7100 is a television broadcast receiver and for network connectivity. It may have a communication device.

[0437] Figure 20(B) shows the 7200 notebook personal computer. The 7200 computer consists of a case 7211, a keyboard 7212, and a pointing device. It has a 7213, an external connection port 7214, etc. The display unit 7500 is assembled in the housing 7211. It is included.

[0438] Figures 20(C) and (D) show digital signage. An example of a small sign is shown.

[0439] The digital signage 7300 shown in Figure 20(C) consists of a housing 7301, a display unit 7500, It also has a speaker 7303, etc. Furthermore, it has an LED lamp, operation keys (power switch, etc. It may include an operating switch, connection terminals, various sensors, a microphone, etc. Cut.

[0440] Figure 20(D) shows a digital signage 740 attached to a cylindrical column 7401. It is 0. The digital signage 7400 is a display unit installed along the curved surface of the column 7401. It has 7500.

[0441] The larger the display unit 7500, the more information can be provided at once, and the more human eyes... Because it is easily absorbed, it can, for example, enhance the effectiveness of advertising.

[0442] It is preferable to apply a touch panel to the display unit 7500 so that the user can operate it. This allows for use not only in advertising but also in route information, traffic information, and commercial facility information. It can also be used to provide information that users are seeking.

[0443] Also, as shown in Figures 20(C) and (D), the Digital Signage 7300 or Digita The Lusigne 7400 is connected to an information terminal 7311 such as a smartphone owned by the user. It is preferable that communication is possible via linear communication. For example, advertisements displayed on the display unit 7500. To display the information on the screen of the information terminal 7311, or to operate the information terminal 7311. This allows the display on the 7500 display unit to be switched.

[0444] Additionally, information terminals can be connected to the Digital Signage 7300 or Digital Signage 7400. It is also possible to run games using the 7311 as the control device (controller). This allows a large number of users to participate in and enjoy the game simultaneously.

[0445] A display device according to one embodiment of the present invention is applied to the display unit 7500 in Figures 20(A) to (D). It is possible.

[0446] Although the electronic device in this embodiment has a display unit, electronic devices that do not have a display unit can also be used. An embodiment of the present invention can also be applied.

[0447] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination. [Examples]

[0448] In this example, a sample (sample A1) in which impurity elements were added to a metal oxide film, and a metal A sample (Sample A2) was prepared by supplying hydrogen to an oxide film, and its sheet resistance was evaluated.

[0449] [Sample preparation] [Sample A1] Sample A1 has island-shaped metallic acid deposits on a first silicon oxide-nitride film formed on a glass substrate. Having an oxide film, an ion dove is applied to the metal oxide film through a second silicon oxide-nitride film. This is a sample to which boron has been added by the Ping method. The second silicon oxidnitride film also contains boron. After the addition of the metal oxide film, it is removed, and the metal oxide film is covered with a new third silicon oxide nitride film. An opening reaching the oxide film was formed, and terminals were provided.

[0450] In sample A1, an In-Ga-Zn oxide with a thickness of approximately 40 nm was used for the metal oxide film. Furthermore, the conditions for adding boron were near the interface between the metal oxide film and the second silicon oxidnitride film. The conditions that resulted in the highest concentration were chosen.

[0451] [Sample A2] Sample A2 is a first silicon oxidizride film formed on a glass substrate, with island-like metallic acid Having an oxide film, in contact with the metal oxide film, a silicon nitride film containing hydrogen, and a fourth oxidation This is a sample that has been subjected to heat treatment after a silicon nitride film has been deposited. Furthermore, the fourth oxidative nitridation... After forming the silicon film, an opening was created that reached the metal oxide film, and terminals were provided.

[0452] In sample A2, the metal oxide film was formed under the same conditions as in sample A1. The silicon nitride film was Plasma C using a mixed gas of SiH4 gas, N2 gas, and NH3 gas as the film deposition gas. The film was deposited using the VD method. Heat treatment was performed under a nitrogen atmosphere at 350°C for 1 hour.

[0453] [Seat resistance] Figure 21 shows the results of measuring the sheet resistance of the prepared samples A1 and A2.

[0454] As shown in Figure 21, the sheet resistance of sample A1 is approximately 380 Ω / □, and sample A2 is approximately The resistance is 240Ω / □, and it can be confirmed that both have been reduced in resistance. Without performing any processing, the sheet resistance of a metal oxide film with a sufficiently reduced carrier concentration can be measured. The detection limit of the device is exceeded (for example, 5 MΩ / □ or higher).

[0455] Furthermore, sample A2, which was supplied with hydrogen, had lower resistance compared to sample A1, which had impurity elements added. Yes. From this, it can be seen that by adding impurity elements to the metal oxide film and further supplying hydrogen... This suggests that the carrier density is further increased and the resistance is lowered compared to samples A1 and A2. It can be done.

[0456] From the above results, in a transistor according to one aspect of the present invention, the channel formation region (first In the second region bordering the first region, a metal oxide with added impurity elements is used, which is relatively high The LDD region is defined as a resistant region, and in the third region further outside of it, water is added after impurity elements are added. By supplying the element, it is possible to create an extremely low-resistance source or drain region. I found out. [Examples]

[0457] In this example, an aluminum nitride film was formed in contact with the metal oxide film to reduce resistance. A sample (sample B1) was prepared, and its sheet resistance was evaluated.

[0458] [Sample preparation] [Sample B1] Sample B1 is a first silicon oxidizride film formed on a glass substrate, with island-like metallic acid Having an oxide film, an aluminum nitride film is formed in contact with the metal oxide film, and then the first process is performed. This is a sample that has undergone heat treatment. In addition, an aluminum oxide film was applied after the first heat treatment, and After forming the silicon oxidoxide-nitride film (2) and then performing a second heat treatment, the metal oxide film is formed. An opening was formed to reach the terminals.

[0459] In sample B1, the metal oxide film was formed under the same conditions as sample A1, which was illustrated in Example 1. Aluminum oxide films are formed using an aluminum target, with N2 gas and Arga gas as the deposition gases. Formed by reactive sputtering using a mixed gas. First heat treatment and second The heat treatment was carried out under conditions of 350°C for 1 hour in a nitrogen atmosphere.

[0460] [Seat resistance] The sheet resistance was measured for sample A1 as illustrated in Example 1 and the prepared sample B1. The results are shown in Figure 22.

[0461] As shown in Figure 22, the sheet resistance of sample A1 is approximately 380 Ω / □, and sample B1 is approximately The resistance is 270Ω / □, and it can be confirmed that both have been reduced in resistance. Without performing any processing, the sheet resistance of a metal oxide film with a sufficiently reduced carrier concentration can be measured. The detection limit of the device is exceeded (for example, 5 MΩ / □ or higher).

[0462] Furthermore, sample B1, in which an aluminum nitride film was formed in contact with a metal oxide film, contained impurity elements. It exhibits lower resistance compared to sample A1 with added elements. This suggests that impurity elements are added to the metal oxide film. By adding it and then forming a film that easily attracts oxygen, such as an aluminum nitride film, in contact with it... This indicates that the carrier density is further increased and the resistance is reduced compared to samples A1 and B1. To be tempted.

[0463] From the above results, in a transistor according to one aspect of the present invention, the channel formation region (first In the second region bordering the first region, a metal oxide with added impurity elements is used, which is relatively high A resistive LDD region is created, and on the third region outside of it, a film that easily attracts oxygen is formed. By creating a film, it is possible to create an extremely low-resistance source or drain region. I found out. [Explanation of Symbols]

[0464] 100, 100A: Transistor, 102: Substrate, 103: Insulating layer, 103d: Region, 1 06: Conductive layer, 108, 108a, b: Semiconductor layer, 108L, 108N: Region, 110: Insulating layer, 110d: region, 110f: insulating film, 112: conductive layer, 112f: conductive film, 11 4: Metal oxide layer, 114f: Metal oxide film, 115: Resist mask, 116, 118 : insulating layer, 120a, b: conductive layer, 140: impurity element, 141a, b, 142: opening

Claims

[Claim 1] It comprises a semiconductor layer, a first insulating layer, and a first conductive layer. The first insulating layer is provided on the semiconductor layer, The first conductive layer is provided on the first insulating layer, The semiconductor layer has a first region that overlaps with the first conductive layer and the first insulating layer, a second region that does not overlap with the first conductive layer but overlaps with the first insulating layer, and a third region that does not overlap with either the first conductive layer or the first insulating layer. The semiconductor layer includes a metal oxide, The second region and the third region contain the first element, The first element is one or more elements selected from boron, phosphorus, aluminum, and magnesium. The first element exists in a state bonded with oxygen. Semiconductor equipment.

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