Semiconductor testing equipment

Abstract

In semiconductor devices with multiple transistors connected together, the potential of the terminals changes during testing. [Solution] The semiconductor element 117 is tested by performing a first, second, and third operation. The first operation applies an off voltage to the signal part gs of transistor 117s and the signal part gm of transistor 117m, and closes switch circuits 124c and 124d. The second operation applies an on voltage to the signal part gs of transistor 117s and an off voltage to the signal part gm of transistor 117m. Switch circuit 124c is opened and switch circuit 124d is closed to supply a test current Id to transistor 117s. The third operation applies an off voltage to the signal part gs of transistor 117s and an on voltage to the signal part gm of transistor 117m. Switch circuit 124c is closed and switch circuit 124d is opened to supply a test current Id to transistor 117m.

Description

Technical Field

[0001] The present invention relates to an electric element test apparatus for performing a power cycle test on semiconductor elements such as SiC, IGBT, MOS-FET, Gan-FET, bipolar transistors, etc., a test method for electric elements, and the like.

[0002] Provided are a semiconductor element test apparatus and a test method for a semiconductor element that can efficiently reproduce stress close to a failure mode in the usage environment of the semiconductor element and can evaluate a power semiconductor element, etc. with high reliability.

Background Art

[0003] The life of a power semiconductor element includes a life due to a thermal fatigue phenomenon caused by heat generation of the power semiconductor element itself and a life due to a thermal fatigue phenomenon caused by a temperature change in the external environment of the power semiconductor element. Further, there is a life due to voltage fatigue caused by an applied voltage to the gate insulating film of the power semiconductor element, etc.

[0004] Generally, in the life test of a power semiconductor element, the semiconductor element is repeatedly energized and turned off. For example, a test is performed by setting an applied voltage and current to the emitter terminal (source terminal), collector terminal (drain terminal), etc. of the transistor of the semiconductor element, and applying a periodic on / off signal (operation / non-operation signal) to the gate terminal.

[0005] The current applied to the semiconductor element during the test is as large as several hundred amperes, and low-resistance wiring is required to avoid heat generation and voltage drop. Since the test current is large, it is necessary to connect the connection part between the semiconductor element and the wiring with low resistance.

[0006] Many semiconductor elements to be tested are connected in multiple stages. When the semiconductor element is a transistor, etc., the inter-channel voltage varies greatly depending on the test conditions, etc. If the test signal applied to the semiconductor element is not appropriate, the semiconductor element may be destroyed by the test signal applied to it.

[0007] There are many types of tests for semiconductor components, and the wiring connections must be modified to match the type of test. Modifying wiring connections is time-consuming and prone to connection failures and errors. [Prior art documents] [Patent Documents]

[0008] [Patent Document 1] Japanese Patent Publication No. 2014-138488 [Overview of the project] [Problems that the invention aims to solve]

[0009] The semiconductor component 117 consists of a first transistor 117m and a second transistor 117s connected in series. A diode for measuring the transistor temperature is formed in at least one of the transistors, the first transistor 117m and the second transistor 117s. The diode is formed simultaneously with the transistor formation process.

[0010] When a current Id flows through the first transistor 117m and the second transistor 117s, the inter-channel voltage Vcem of the first transistor 117m changes according to the magnitude of the current Id. The terminal voltage of the semiconductor component is the sum of the inter-channel voltages Vces of the first transistor 117m and the second transistor 117s.

[0011] If the diode is also formed during the transistor formation process, and the diode has common parts with the transistor's gate insulating film, then the potentials of the diode's anode and cathode terminals will change as the transistor's inter-channel voltage Vce changes.

[0012] In conventional semiconductor device testing equipment, the potential of the constant current flowing through the diode and the potential of the on / off signal applied to the semiconductor device component 117 were fixed at predetermined values ​​relative to a reference potential. Therefore, a problem arose where a change in the current Id flowing through transistor 117 caused a change in the inter-channel voltage between transistors 117m and 117s, resulting in an excessively high terminal voltage of the diode and causing dielectric breakdown of the diode. [Means for solving the problem]

[0013] The semiconductor device testing apparatus of the present invention includes a constant current circuit that generates a constant current for monitoring the temperature of the semiconductor device component to be tested, and a gate driver circuit that generates a signal to turn a transistor on and off.

[0014] The semiconductor device consists of a first transistor 117m and a second transistor 117s connected in series. The first power supply voltage of the first gate driver circuit that generates a signal to turn the first transistor 117m on and off, the second power supply voltage of the second gate driver circuit that generates a signal to turn the second transistor 117s on and off, and the third power supply voltage of the constant current circuit that generates a constant current are each configured to be electrically isolated or floating from the other power supply voltages. The semiconductor device testing apparatus of the present invention relates to a testing apparatus for a semiconductor device in which a first transistor and a second transistor, etc., are connected.

[0015] The first transistor has a first gate terminal, a first terminal, and a second terminal, and the second transistor has a second gate terminal, a third terminal, and a fourth terminal, and the second terminal of the first transistor is connected to the third terminal of the second transistor, and there is a diode formed or arranged near at least one of the transistors, the first transistor and the second transistor.

[0016] Furthermore, the device comprises a first voltage generation circuit for a gate signal generation circuit applied to the first gate terminal of the first transistor, a second voltage generation circuit for a gate signal generation circuit applied to the second gate terminal of the second transistor, and a third voltage generation circuit for a constant current generation circuit that generates a constant current to be applied to a diode.

[0017] The first voltage generating circuit and the second voltage generating circuit are electrically isolated from each other, and the third voltage generating circuit is electrically isolated from at least the first voltage generating circuit or the second voltage generating circuit. Furthermore, the semiconductor device testing apparatus of the present invention relates to a testing apparatus for semiconductor devices in which a first transistor and a second transistor, etc., are connected.

[0018] The first transistor has a first gate terminal, a first terminal, and a second terminal, and the second transistor has a second gate terminal, a third terminal, and a fourth terminal, and the second terminal of the first transistor is connected to the third terminal of the second transistor.

[0019] The device comprises a first voltage generation circuit of a gate signal generation circuit that is applied to the first gate terminal of a first transistor, a second voltage generation circuit of a gate signal generation circuit that is applied to the second gate terminal of a second transistor, and a third voltage generation circuit of a voltage detection circuit that measures or detects at least one of the voltages between the first and second terminals of the first transistor and the voltage between the third and fourth terminals of the second transistor.

[0020] The first voltage generating circuit and the second voltage generating circuit are electrically isolated from each other, and the third voltage generating circuit is electrically isolated from at least the first voltage generating circuit or the second voltage generating circuit.

[0021] Furthermore, the semiconductor device testing apparatus of the present invention includes a current detection circuit for measuring or detecting the current flowing through at least one of the first gate terminal and the second gate terminal. Also, the gate signal generation circuit generates a first signal for turning on the transistor, a second signal for turning off the transistor, and the second signal.

[0022] Moreover, it includes a first switch circuit for short - circuiting between the first terminal and the second terminal of the first transistor, and a second switch circuit for short - circuiting between the third terminal and the fourth terminal of the second transistor.

[0023] Also, a first connection fitting is electrically connected to the first terminal of the first transistor, and a second connection fitting is electrically connected to the fourth terminal of the second transistor.

[0024] The test method of the semiconductor device of the present invention relates to a semiconductor device in which a first transistor has a first gate terminal, a first terminal, and a second terminal, a second transistor has a second gate terminal, a third terminal, and a fourth terminal, has a diode formed or arranged near at least one of the first transistor and the second transistor, and the second terminal of the first transistor and the third terminal of the second transistor are connected.

[0025] It is configured such that a second gate signal for turning on or off the second transistor can be applied between the fourth terminal and the second gate terminal of the second transistor, and a first gate signal for turning on or off the first transistor can be applied between the second terminal and the first gate terminal of the first transistor. The first gate signal is based on the potential of the third terminal of the second transistor and measures or detects the voltage across the terminals of the diode.

[0026] The test method of the semiconductor device of the present invention relates to a semiconductor device in which a first transistor has a first gate terminal, a first terminal, and a second terminal, a second transistor has a second gate terminal, a third terminal, and a fourth terminal, and the second terminal of the first transistor and the third terminal of the second transistor are connected.

[0027] The second transistor is configured to be able to have a second gate signal applied between its fourth terminal and second gate terminal to turn the second transistor on or off, and the first transistor is configured to be able to have a first gate signal applied between its second terminal and first gate terminal to turn the first transistor on or off, with the first gate signal being based on the potential of the third terminal of the second transistor, and measuring or detecting at least one of the voltages between the first terminal and second terminal of the first transistor and the voltage between the third terminal and fourth terminal of the second transistor.

[0028] Furthermore, the semiconductor device testing method of the present invention comprises a first switch circuit and a second switch circuit, wherein the first terminal of the first transistor is connected to the first switch circuit, and the second terminal of the second transistor is connected to the second switch circuit.

[0029] Furthermore, in the semiconductor device testing method of the present invention, a first connecting fitting is electrically connected to the first terminal of the first transistor, and a second connecting fitting is electrically connected to the fourth terminal of the second transistor. [Effects of the Invention]

[0030] The first power supply voltage of the first gate driver circuit that generates a signal to turn the first transistor 117m on and off, and the second power supply voltage of the second gate driver circuit that generates a signal to turn the second transistor 117s on and off, are configured to be isolated (floating) from other power supply voltages. The signal potential at the gate terminals of transistors 117m and 117s will not become excessively high, but will remain within the predetermined signal or terminal potential.

[0031] A partition wall 214 is provided to separate the area (space) within the semiconductor device test apparatus where the semiconductor device component 117 is placed from the area where the circuit board is placed for generating the test current for the semiconductor device component 117, generating the control signal, and acquiring the test results.

[0032] The connection work for each test item (connection wiring 211) is unnecessary, and no workspace is required for changing wiring connections, allowing for a smaller semiconductor device testing apparatus. Furthermore, the floating power supply voltage can be easily set by changing the connection of the connection plug 205 to control the signal potential, etc. [Brief explanation of the drawing]

[0033] [Figure 1] This is an explanatory diagram of an electrical element testing apparatus in the first embodiment of the present invention. [Figure 2] This is a block diagram of an electrical element testing apparatus according to the first embodiment of the present invention. [Figure 3] This is an explanatory diagram of an electrical element testing apparatus in the first embodiment of the present invention. [Figure 4] This is an explanatory diagram of the power supply system of the electrical element testing apparatus in the first embodiment of the present invention. [Figure 5] This is an explanatory diagram of the power supply system of the electrical element testing apparatus in the first embodiment of the present invention. [Figure 6] This is an explanatory diagram of the power supply system of the electrical element testing apparatus in the first embodiment of the present invention. [Figure 7] This is an explanatory diagram of the power supply system of the electrical element testing apparatus in the first embodiment of the present invention. [Figure 8] This is an explanatory diagram of the test method for electrical elements of the present invention. [Figure 9] This is a block diagram of an electrical element testing apparatus according to a second embodiment of the present invention. [Figure 10] This is a block diagram of an electrical element testing apparatus according to a second embodiment of the present invention. [Figure 11] This is an explanatory diagram of an electrical element testing apparatus according to a third embodiment of the present invention. [Figure 12] This is a block diagram of an electrical element testing apparatus according to a third embodiment of the present invention. [Figure 13] This is an explanatory diagram of the power supply system of an electrical element testing apparatus in a third embodiment of the present invention. [Figure 14]This is an explanatory diagram of the power supply system of an electrical element testing apparatus in a third embodiment of the present invention. [Figure 15] This is a timing chart diagram of the test method for electrical elements in a third embodiment of the present invention. [Figure 16] This is an explanatory diagram of an electrical element testing apparatus according to a fourth embodiment of the present invention. [Figure 17] This is an explanatory diagram of an electrical element testing apparatus according to a fifth embodiment of the present invention. [Figure 18] Timing chart of the test method for electrical elements in the first embodiment of the present invention [Figure 19] This is a timing chart diagram of the test method for an electrical element in the first embodiment of the present invention. [Figure 20] This is a timing chart diagram of the test method for an electrical element in the first embodiment of the present invention. [Figure 21] This is a timing chart diagram of the test method for electrical elements in a second embodiment of the present invention. [Figure 22] This is an explanatory diagram of the electrical element testing apparatus of the present invention. [Figure 23] This is an explanatory diagram of an electrical element testing apparatus in the first embodiment of the present invention. [Figure 24] This is an explanatory diagram of the electrical element testing apparatus of the present invention. [Figure 25] This is an explanatory diagram of the connection section of the electrical element testing apparatus of the present invention. [Figure 26] This is an explanatory diagram of the connection section of the electrical element testing apparatus of the present invention. [Figure 27] This is an explanatory diagram of the connection section of the electrical element testing apparatus of the present invention. [Figure 28] This is an explanatory diagram of the circuit board layout for the electrical element testing apparatus of the present invention. [Figure 29] This is an explanatory diagram of the circuit board of the electrical element testing apparatus of the present invention. [Figure 30] This is an explanatory diagram of the circuit board of the electrical element testing apparatus of the present invention. [Figure 31] This is a diagram illustrating semiconductor device components. [Figure 32] This is a diagram illustrating semiconductor device components. [Figure 33] This is a diagram illustrating electrical components. [Modes for carrying out the invention]

[0034] The following describes a semiconductor device testing apparatus and semiconductor device testing method according to embodiments of the present invention, with reference to the attached drawings. In the embodiments described in this specification, IGBTs are used as an example among power semiconductor devices. The present invention is not limited to IGBTs and can be applied to various power semiconductor devices such as SiC, MOSFETs, JFETs, and transistors. Furthermore, the present invention is not limited to transistors but can also be applied to two-terminal devices such as diodes. It can also be applied to other semiconductor devices such as thyristors and triacs. Furthermore, it goes without saying that the present invention is not limited to power semiconductor devices, but can also be applied to low-power semiconductor devices and small-signal control semiconductor devices.

[0035] Furthermore, this invention involves testing elements or components by applying current or voltage. Therefore, the test subjects are not limited to semiconductor elements. Needless to say, it can also be applied to resistive elements, crystal oscillators, thermistors, positors, ZNRs, phototransistors, photodiodes, speakers, motors, mechanical relays, and the like.

[0036] In the drawings illustrating embodiments for carrying out the invention, elements having the same function are denoted by the same reference numeral, and their descriptions may be omitted. Furthermore, embodiments of the present invention can be combined in part or in whole from each embodiment.

[0037] Figure 22 is a diagram of the electrical element testing apparatus of the present invention. The electrical element testing apparatus has a chiller (cooling / heating device) 136, a heating / cooling plate 134, and a circulating water pipe 135 that circulates water between the heating / cooling plate 134 and the chiller 136. It also has a control rack 131, a power supply unit 132, and a control circuit 133. A semiconductor element component 117 such as a transistor or an electronic element component 117, which is to be tested, is loaded onto the heating / cooling plate 134.

[0038] As an example of the electrical component 117, a transistor 117 will be primarily used as an example. Therefore, in this specification, the electrical component 117 will be primarily referred to as a transistor 117.

[0039] The test conditions are set by changing the constant current Id, gate signal Vsg, and inter-channel voltage Vce so that the temperature information Tj and Tc of the transistor 117 under test reach predetermined values.

[0040] Tj is temperature information obtained primarily from diodes or other devices that measure the temperature of transistor 117, while Tc is temperature information obtained from a thermocouple or similar device that measures the package temperature of transistor 117.

[0041] If the temperature information Tj or Tc changes, it is determined that transistor 117 has deteriorated or its characteristics have changed, and the test of transistor 117 is stopped, the control method is changed, or the test conditions are changed.

[0042] In this explanation, the current flowing through or applied to transistor 117 during testing will be described as a constant current Id, but the present invention is not limited to this. It goes without saying that Id may be a current that changes with a predetermined period or time. Furthermore, the signal applied to transistor 117 during testing is not limited to a current, but may also be a voltage.

[0043] Changes in temperature information Tj and other parameters determine or detect changes in the characteristics of transistor 117. Furthermore, the characteristics, reliability, and lifespan of transistor 117 are evaluated based on the time it takes for the voltage Vce to reach a predetermined voltage, the time until transistor 117 fails, etc.

[0044] In the test method for the semiconductor element component 117 of the present invention, external conditions or test conditions are changed in accordance with the degradation or characteristic change of the transistor 117. For example, if the transistor 117 generates heat, the water temperature of the chiller 136 is lowered. Reducing the current flowing through the transistor 117 prevents the degradation and characteristic change of the transistor 117 from progressing, and as a result, the lifespan of the transistor 117 is extended. Therefore, the lifespan and reliability characteristics of the transistor 117 under predetermined set conditions can be quantitatively measured and judged.

[0045] The temperature of the transistor 117 is maintained at a specified or predetermined value by heating or cooling the circulating water in the chiller 136. Furthermore, the temperature of the transistor and other components is periodically changed, cooled, or heated in accordance with the test conditions. The temperature information Tj of the test transistor is also measured, and the chiller 136 is controlled to maintain the measured temperature information Tj at a constant value. In the following explanation, the temperature information Tj will be described using an example.

[0046] The chiller 136 is configured to maintain a constant temperature for equipment and other devices by circulating water or a heat transfer medium while controlling its temperature. While primarily used for cooling, it can also heat. It is configured to allow for various temperature control applications.

[0047] The control rack 131 includes a power supply unit 132 that supplies test current and test voltage to the transistor 117, and a control circuit 133 that controls the transistor 117 or sets test conditions.

[0048] The control circuit 133 includes a controller circuit board 111, a gate signal control circuit board 112, a device control circuit board 209, a switch circuit board 201, a motherboard 207, and the like. The power supply unit 132 includes a power supply circuit 121, a switch circuit 122, a switch circuit board 201, and the like.

[0049] The control circuit 133 receives temperature information Tj from the transistor 117 and controls the chiller 136 based on the temperature information Tj. Alternatively, it controls the chiller 136 to bring the temperature information Tj to a predetermined value.

[0050] In this specification, the circulating water is used, but it is not limited to water. It may also be ethylene glycol, glycerin, Freon, etc., or forced air cooling may be used. The chiller 136 supplies the liquid in the circulating water pipe 135 to the heating and cooling plate 134 of the test unit, controlling the temperature within a range, for example, from -1°C to +100°C. The heating and cooling plate 134 has a sufficiently large heat capacity.

[0051] In the above embodiment, a heating and cooling plate 134 was used, but the heating plate and the cooling plate may be separate components, and heating and cooling may be performed using heat sources and cold sources other than the heating and cooling plate.

[0052] Figure 2 is a configuration diagram or block diagram of a semiconductor device testing apparatus (for example, a power cycle testing apparatus for testing power transistors) in a first embodiment of the present invention. Figure 1 is an equivalent circuit diagram or explanatory diagram of a semiconductor device testing apparatus in a first embodiment of the present invention.

[0053] In this invention, an N-channel transistor is used as an example of the semiconductor element component 117, but the invention is not limited to this. For example, it goes without saying that the invention can also be applied to a P-channel transistor. Furthermore, it goes without saying that the invention can be applied to electrical components other than the semiconductor elements shown in Figures 33(a) to 33(i), such as resistors (Figure 33(i)), capacitors, coils, relays, and crystal oscillators (Figure 33(k)).

[0054] The power supply circuit 121 outputs a high-current constant current Id for testing the transistor 117. The power supply circuit 121 supplies power (current, voltage) to the semiconductor element components 117, etc., in synchronization with the control signal from the controller circuit board 111 (controller 111), and uses the supplied power to drive the semiconductor element components 117, etc., with a set constant current or constant voltage. The power supply circuit 121 can also set the maximum output voltage value and maximum current value.

[0055] The switch circuit 122 (SWa) turns the constant current supply from the power supply circuit 121 on (supplies) or off (cuts off). The switch circuit 122 is set or controlled to be on (outputs constant current) or off (cuts off constant current) based on a signal from the controller circuit board 111 (controller 111). Normally, the switch circuit 122 is turned on before the start of testing and is kept on at all times during testing of semiconductor components.

[0056] Figure 2 illustrates one power supply circuit 121. However, the power supply circuit 121 is not limited to one unit. For example, the semiconductor device testing apparatus of the present invention may have two or more power supply circuits 121. The more power supply circuits 121 there are, the more diverse the waveforms of current Id, voltage waveforms, and current waveforms that can be generated. In the embodiments of the present invention, the power supply circuit is described as 121, but the power supply circuit 121 is not limited to one that outputs a constant current.

[0057] For example, the power supply circuit 121 may be configured to allow setting of maximum voltage and maximum current. An example is to configure it to output a predetermined constant current at the set maximum voltage, etc., under certain conditions. Furthermore, when outputting a constant current, it may be configured to allow setting the output terminal voltage to a predetermined maximum voltage.

[0058] In the semiconductor device testing apparatus of the present invention, it goes without saying that the power supply circuit 121 may not be a device that outputs only a constant current, but may be a power supply device that can output or set voltage and current.

[0059] In the embodiment shown in Figure 2, the power supply circuit 121 is described as generating a current Id. However, a constant current Id can also be achieved by adjusting the applied voltage according to the on-resistance state of the transistor 117. Therefore, it goes without saying that the semiconductor device testing apparatus of the present invention is not limited to the power supply circuit 121 that outputs current, but may also be configured with a voltage-outputting power supply.

[0060] A constant current Id can also be achieved by controlling the voltage value of the gate voltage of transistor 117. In this specification, it is described that a predetermined current is applied to transistor 117 by controlling the power supply circuit 121. However, this is not the only way, and it goes without saying that the voltage at the gate terminal g of transistor 117 and the voltage at the collector terminal c of transistor 117 may also be adjusted or controlled.

[0061] In the embodiment of the first semiconductor device test method of the present invention, for the sake of simplicity of explanation, it is assumed that the constant current Id is generated by the power supply circuit 121. The current Id that flows through the transistor 117 is supplied by operating the power supply circuit 121. The power supply circuit 121 is turned on / off by a signal from the controller circuit board 111 (controller 111). The device control circuit board 209 is timing-controlled by the controller circuit board 111 (controller 111).

[0062] Figure 30 is an explanatory diagram of the device control circuit board 209. A connector 213 is located on one side of the device control circuit board 209. The connector 213 is used for electrical connection with the motherboard 207.

[0063] On the other side of the device control circuit board 209, selector switches 312 and 313 are arranged. Also, as shown in Figure 29, selector switch 311 is arranged on the switch circuit board 201.

[0064] The selection switches 311 and 312 are setting switches that indicate the address (number) of the device control circuit board 209. The address (number) of the device control circuit board 209 is set by the selection switch 312. The selection switches 311 and 312 are 4-bit manual setting switches.

[0065] The electrical element testing apparatus of the present invention can test multiple electrical elements simultaneously or sequentially. A switch circuit 124 is arranged corresponding to each electrical element. Therefore, it is necessary to set an address (number) on the switch circuit board 201. In Figure 29, the address (number) is set on the switch circuit board 201 using a selection switch 311. In Figure 30, the address (number) is set using a device control circuit board 209.

[0066] The selection switches 311 and 312 allow addresses (numbers) to be set on the device control circuit board 209 and the switch circuit board 201, and these can be linked to the electrical elements to be tested.

[0067] Connector 315 is a connector for connecting thermocouple 314. Various types of thermocouples can be used for thermocouple 314, such as T-type thermocouples, J-type thermocouples, E-type thermocouples, K-type thermocouples, etc.

[0068] The thermocouple 314 is attached to the package of the electrical component 117. Temperature information Tc can be obtained using the thermocouple 314. For long-term reliability testing, it is preferable to use the temperature information Tc. In this specification, temperature information Tj is assumed to be obtained by measuring the temperature of diode D, and temperature information Tc is assumed to be obtained by measuring the package temperature.

[0069] In this invention, the thermocouple 314 can accommodate T-type, J-type, E-type, K-type, and other types of thermocouples, as the device control circuit board 209 contains an electromotive force-temperature conversion table for each type of thermocouple. The conversion table to be used is selected by a selection switch 313. Therefore, the switch on the selection switch 313 is set according to the type of thermocouple 314 connected to the connector 315. The above address (number) settings also apply to the selection switch 311 on the switch circuit board 201.

[0070] In the following embodiment, as an example of a semiconductor device component 117 shown in Figures 31(a) and 31(b), a semiconductor device component 117 in which transistors 117m and 117s are integrated into a single package will be described. Transistors 117s and 117m are connected in series.

[0071] However, the same applies even if, as shown in Figures 31(c) and 31(d), the electrode terminals 226c2 of transistor 117s and 226c1 of transistor 117m are electrically connected by wiring material or the like to form a single semiconductor element component 117.

[0072] The semiconductor device test apparatus or test method described herein is applicable to all of Figures 31(a), 31(b), 31(c), and 31(d). Furthermore, it goes without saying that it is also applicable to configurations consisting of either transistor 117s or just one of the transistors 117s. It also goes without saying that the test method and test apparatus of the present invention can be applied to the semiconductor device component 117 in Figure 32.

[0073] In Figure 31, the semiconductor element component 117 has terminals P, O, and N to which a large current is applied or output. A diode Dm is incorporated near transistor 117m, and a diode Ds is incorporated near transistor 117s.

[0074] Diodes Ds and Dm are formed simultaneously with the formation process of transistor 117. Diodes Ds and Dm are used as temperature-sensitive diodes. For example, the semiconductor layer of the diodes uses the same layer layers as transistor 117 (transistor 117m, transistor 117s). Insulating layers and other layers also use the same layer layers.

[0075] In this invention, for the sake of ease of explanation or understanding, the diode will be described as an element that monitors the temperature of transistor 117 during testing. The diode will be used as a temperature-sensing element.

[0076] The temperature-sensing element is not limited to a diode. Any element or component capable of detecting the temperature of transistor 117 may be used. For example, a thermistor, positor, thermocouple, etc., may be used.

[0077] In these cases as well, as explained in Figures 1, 4, 5, 6, 7, 11, 13, and 14, an isolated DC-DC converter circuit 138 is used to isolate and float the voltages, and a constant current Ic is generated using these voltages.

[0078] It goes without saying that the diode may not only be built into the transistor 117, but may also be placed on the surface of the transistor 117, or placed in its vicinity. Furthermore, the diode may have a structure or arrangement such as diode Di (diode Dis, diode Dim) as shown in Figure 32. In addition, the diodes in Figures 31 and 32 may be parasitic diodes. The following explanation will use Figure 31 as an example, but it goes without saying that this can also be applied to the electrical elements in Figures 32 and 33.

[0079] As shown in Figures 31(a) and 31(b), the semiconductor element component 117 has a P electrode terminal (electrode terminal 226a), an O electrode terminal (electrode terminal 226c), and an N electrode terminal (electrode terminal 226b). Connection wiring 211 is connected to electrode terminal 226. Although not shown, screw holes are formed in the electrode terminals.

[0080] Transistor 117m has an emitter terminal em and a gate terminal gm, and the collector terminal cm of transistor 117m is common with the emitter terminal es of transistor 117s. Diode Dm is connected to the cathode terminal km and the anode terminal am. The emitter terminal em of transistor 117m is connected to the N electrode terminal 226b.

[0081] Transistor 117s has an emitter terminal es and a gate terminal gs, and its collector terminal is connected to the P electrode terminal. Diode Ds has a cathode terminal ks and an anode terminal as. The collector terminal cs of transistor 117s is connected to the P electrode terminal 226a.

[0082] The collector terminal cm of transistor 117m and the emitter terminal es of transistor 117s are electrically connected, and the emitter terminal es of transistor 117s is electrically connected to the O electrode terminal 226c.

[0083] The voltage generated between the N electrode terminal 226b and the O electrode terminal 226c of semiconductor component 117 is the channel voltage Vcem of transistor 117m. The voltage generated between the P electrode terminal 226a and the O electrode terminal 226c of semiconductor component 117 is the channel voltage Vces of transistor 117s.

[0084] Connector 202m is connected to the terminals of transistor 117m (emitter terminal em, gate terminal gm, cathode terminal km, anode terminal am). Connector 202s is connected to the terminals of transistor 117s (emitter terminal em, gate terminal gm, cathode terminal km, anode terminal am). Fork plug 205e is connected to the P electrode terminal (electrode terminal 226a), fork plug 205h is connected to the O electrode terminal (electrode terminal 226c), and fork plug 205c is connected to the N electrode terminal (electrode terminal 226b).

[0085] In the embodiments of the present invention, the fork plug 205 and the conductor plate 204 are electrically connected by contact, but the invention is not limited to this. Any configuration that allows the electrically connected state to be changed between a connected state and a disconnected state by mechanical operation is acceptable. Furthermore, any configuration that can stably maintain the connected state is acceptable.

[0086] For example, instead of the fork plug 205, a rotary connector, rotary joint, high-current connector, etc. may be used. Instead of the conductor plate 204, a rotary connector, rotary joint, high-current connector, or a cylindrical conductor rod, a square conductor rod, a comb-shaped conductor plate, etc. may be used.

[0087] In this specification and in the drawings, the conductor plate 204 is described, but it is not limited to a plate and may be rod-shaped. Any shape is acceptable as long as it can be joined to a structure such as a fork plug 205. For example, it may be a structure such as a socket or connector. Alternatively, the conductor plate 204 may be shaped like a fork plug, and the fork plug 205 and the fork plug may be connected.

[0088] The fork plug 205 is described as being inserted into a component or structure that separates a space, such as a partition wall 214, but it is not limited to this. For example, the fork plug 205c may be connected to the conductor plate 204b, and the fork plug 205c may be inserted from the partition wall 214 to make an electrical connection with the emitter terminal e of the transistor 117.

[0089] A predetermined constant current Ic for temperature monitoring is applied to at least one of diodes Dm and Ds. The equivalent resistance of the diodes changes with temperature, and the application of the predetermined constant current changes the terminal voltage of diode D (oxide Dm, diode Ds). Temperature information Tj is obtained from this terminal voltage Vi.

[0090] As shown in Figure 1, a short circuit 137m is formed between the gate terminal gm and emitter terminal em of transistor 117m. A short circuit 137s is formed between the gate terminal gs and emitter terminal es of transistor 117s. Short circuit 137 is, for example, a switching transistor. Note that short circuit 137 is not limited to elements such as transistors. For example, it may be mechanically short-circuited with a connector or shorting pin.

[0091] When the short circuit 137 (short circuit 137m, short circuit 137s) is turned on, the emitter terminal and gate terminal of transistor 117m or transistor 117s are short-circuited. By short-circuiting the emitter terminal and gate terminal of transistor 117m and transistor 117s, transistors 117m and 117s become diode-connected. Note that the short circuit 137 may be placed or configured within the sample connection circuit 203.

[0092] The sample connection circuit 203 includes a gate driver circuit 113, a gate signal control circuit 112, a voltage detection circuit 129 for measuring the terminal voltage of diode D, a constant current generation circuit for applying to the diode, a current detection circuit 128 for detecting the current flowing through the gate terminal, a voltage selection circuit 302, and the like.

[0093] In Figure 1, the temperature of the semiconductor component 117 under test is measured by applying a constant current to the diode and measuring the terminal voltage of the diode D. However, this is not the only method. Instead of a diode, a parasitic diode additionally formed during the formation of the transistor 117 may be used to measure the temperature. Other methods such as a thermocouple 314 or a temperature sensor may also be used. The means for measuring the temperature may be built into the semiconductor component 117 or attached closely to the semiconductor component 117.

[0094] As shown in Figure 24, the sample connection circuit 203 is positioned near the transistor 117 (semiconductor component 117) to shorten the length of the signal wiring 222 that connects to the transistor 117. "Nearby" means approximately 50 mm or less.

[0095] Figure 2 is a configuration diagram of a semiconductor device testing apparatus in a first embodiment of the present invention. Figure 1 is an equivalent circuit diagram or explanatory diagram of a semiconductor device testing apparatus in a first embodiment of the present invention.

[0096] The semiconductor device testing apparatus of the present invention includes an isolated DC-DC converter circuit 138m and an isolated DC-DC converter circuit 138s as isolated DC-DC converter circuits 138.

[0097] The isolated DC-DC converter circuit 138m generates two voltages (Vpm1 voltage referenced to Vmm1 potential and Vpm2 voltage referenced to Vmm2 potential) from the input voltage (circuit voltage Vc voltage). GND, Vmm1 voltage, and Vmm2 voltage are isolated.

[0098] The isolated DC-DC converter circuit 138s generates two voltages (Vps1 voltage referenced to Vms1 potential and Vps2 voltage referenced to Vms2 potential) from the input voltage (Vc voltage). GND, Vms1 voltage, and Vms2 voltage are isolated.

[0099] The Vmm1, Vmm2, Vms1, and Vms2 voltages are reference voltages, and a ground voltage may also be considered. However, this ground voltage is isolated from each voltage. However, the Vmm1 and Vmm2 voltages may not be isolated from the time of voltage generation and may be at a common potential. The Vms1 and Vms2 voltages may not be isolated from the time of voltage generation and may be at a common potential.

[0100] Although not shown in the diagram as an isolated DC-DC converter circuit, an isolated DC-DC converter circuit generating Vt1 and Vt2 voltages may be provided as needed. Vt1 and Vt2 voltages are isolated from the Vc voltage. Vt1 voltage is set to a negative potential relative to Vmm1 voltage. Vt2 voltage is set to a negative potential relative to Vms1 voltage.

[0101] The Vt1 voltage may be generated based on the Vmm1 voltage or the Vmm2 voltage. The Vt2 voltage may be generated based on the Vms1 voltage or the Vms2 voltage.

[0102] The Vt1 and Vmm1 voltages are configured to be selectively applied to the gate terminal gm of transistor 117m. The Vt2 and Vms1 voltages are configured to be selectively applied to the gate terminal gs of transistor 117s(Qs). The voltage selection circuit 302 uses an analog switch or the like.

[0103] The potential difference between the Vmm1 voltage and the Vpm1 voltage of the isolated DC-DC converter circuit 138m is set to be the on-voltage Vg applied to the gate terminal gm of transistor 117m(Qm). The isolated DC-DC converter circuit 138m is configured so that the on-voltage Vg can be varied.

[0104] The potential difference between the Vms1 voltage and the Vps1 voltage of the isolated DC-DC converter circuit 138s is set to be the on-voltage Vg applied to the gate terminal g of transistor 117s(Qs). The isolated DC-DC converter circuit 138s is configured so that the on-voltage Vg can be varied.

[0105] Blocks A, B, and C of the isolated DC-DC converter circuit 138m shown in Figures 1 and 11 are isolated. Similarly, blocks A, D, and E of the isolated DC-DC converter circuit 138s are isolated.

[0106] Power is transferred between blocks A and B, A and C, A and D, and A and E using coils or similar devices for isolation purposes. Furthermore, control signals between each block are transmitted and received using phototransistors or similar devices for isolation.

[0107] The circuit ground (GND), Vc voltage, Vpm1 voltage, Vmm1 voltage, Vpm2 voltage, and Vmm2 voltage are isolated from each other. In other words, each voltage is floating relative to the others. Floating means being independent of other voltages or potentials. The word "float" means "to float (on the surface of water or in the air)." Floating means that the potentials are independent, but the expression "to float" is also used.

[0108] When the ground is common, a long loop can form through the common connection, potentially becoming a noise path (ground loop). By using a floating circuit, the loop is broken, reducing noise caused by the ground loop. Furthermore, the signal potential can be freely set.

[0109] As shown in Figure 31, when multiple semiconductor elements (transistors) are connected in a multi-stage configuration, the potential of the gate terminal of each transistor fluctuates due to the inter-channel voltage of the other transistors. Furthermore, if the semiconductor element 117 is a high-power element such as a power transistor, a large current flows through it during testing. This large current generates excessive surge voltages and transient currents.

[0110] Surge voltages and transient currents can apply significant noise to the gate terminals of transistors, causing them to break down. This invention generates and uses the signal potential applied to the gate terminals in a floating state. Therefore, it is less susceptible to noise and allows for reliable testing of semiconductor device components 117.

[0111] The voltage generated in the isolated DC-DC converter circuit 138 is assumed to be floating. Let Vm1 be the potential difference between the Vmm1 voltage and the Vpm1 voltage, and let Vm2 be the potential difference between the Vmm2 voltage and the Vpm2 voltage.

[0112] For example, if you connect the Vmm1 voltage to the circuit ground (GND) and short-circuit the Vpm1 voltage with the Vmm2 voltage, the Vpm2 voltage will be the voltage obtained by adding the Vm1 voltage to the circuit ground (GND). In other words, by setting the potential with other voltages, the floating potential is determined. The potential level can be changed, moved, and set in accordance with the potential of other voltages.

[0113] The semiconductor device testing apparatus of the present invention is configured such that the circuit ground (GND) is isolated from other power supply voltages. Furthermore, it is configured to allow for the connection or linking of these isolated power supply voltages. For example, the Vmm1 voltage and the Vmm2 voltage can be connected to achieve the same potential. The Vms1 voltage and the Vms2 voltage can also be connected to achieve the same potential.

[0114] The sample connection circuit 203m1 includes a gate driver circuit 113m that generates a gate signal waveform applied to the gate terminal gm of transistor 117m(Qm), a variable resistor circuit 125m that adjusts or sets the rising and falling waveforms of the gate signal, a short circuit 137m, a voltage selection circuit 302m, and the like.

[0115] The sample connection circuit 203m2 includes a constant current setting circuit 130m that generates a constant current Icm applied to the diode Dm of transistor 117m, and a voltage detection circuit 129m that measures or detects the terminal voltage of diode Dm.

[0116] The sample connection circuit 203s1 includes a gate driver circuit 113s that generates a gate signal waveform applied to the gate terminal gs of transistor 117s, a variable resistor circuit 125s that adjusts or sets the rising and falling waveforms of the gate signal, a short circuit 137s, a voltage selection circuit 302s, and the like.

[0117] The sample connection circuit 203s2 includes a constant current setting circuit 130s that generates a constant current Ics applied to the diode Ds of the transistor 117s, and a voltage detection circuit 129s that measures or detects the terminal voltage of the diode Ds. Unless otherwise specified, the following explanation will assume that the N electrode terminal of semiconductor component 117 is at the reference potential (AGND, 0(V)).

[0118] When the N electrode terminal of semiconductor component 117 is taken as the reference potential, the potential of the emitter terminal es of transistor 117s becomes the channel voltage Vcem of transistor 117m. In other words, it becomes the potential of the O electrode terminal of semiconductor component 117.

[0119] The potential of the P electrode terminal of semiconductor component 117 is the sum of the inter-channel voltage Vcem of transistor 117m and the inter-channel voltage Vces of transistor 117s. The potential of the O electrode terminal and the P electrode terminal fluctuates depending on the magnitude of the current Id flowing through transistors 117m and 117s, and the on / off state of transistors 117m and 117s. In particular, the potential fluctuation of the emitter terminal es of transistor 117s is large.

[0120] It is preferable that Vms1, which is the potential of the emitter terminal es of transistor 117s, be configured to change in accordance with fluctuations in the inter-channel voltage Vcem of transistor 117m.

[0121] In this invention, the potential Vmm1 of the emitter terminal em of transistor 117m is configured to float relative to Vms1, the potential of the emitter terminal es of transistor 117s. Therefore, when the inter-channel voltage Vcem of transistor 117m fluctuates, the Vces voltage also fluctuates in the same direction and at the same potential.

[0122] If the diode Dm of transistor 117m uses the same or similar semiconductor layer as transistor 117m, the potential of the cathode terminal km of diode Dm may be the same as or near the potential of the emitter terminal em of transistor 117m. Therefore, it is preferable to use the potential of the emitter terminal em of transistor 117m as the reference for the power supply potential of diode Dm.

[0123] If the diode Ds of transistor 117s uses the same or similar semiconductor layer as transistor 117s, the potential of the cathode terminal ks of diode Ds may be at or near the potential of the emitter terminal es of transistor 117s. Therefore, it is preferable to use the potential of the emitter terminal es of transistor 117s as the reference for the power supply potential of diode Ds.

[0124] In this invention, the Vc voltage, Vms1 voltage / Vps1 voltage, and Vms2 voltage / Vps2 voltage of the isolated DC-DC converter circuit 138s are isolated. The Vc voltage, Vmm1 voltage / Vpm1 voltage, and Vmm2 voltage / Vpm2 voltage of the isolated DC-DC converter circuit 138m are isolated. Each voltage is configured to be connected to any other voltage.

[0125] Figure 4 is an explanatory diagram illustrating the wiring of the power supply system of the semiconductor device testing apparatus of the present invention. The N electrode terminal of transistor 117 is connected to AGND. AGND is, for example, the ground potential.

[0126] The emitter terminal em of transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. Also, the emitter terminal em is connected to the Vmm2 terminal. The emitter terminal es of transistor 117s is connected to the Vms1 terminal. Also, the emitter terminal es is connected to the Vms2 terminal.

[0127] The potential at the emitter terminal es of transistor 117s is the sum of the potential at the N electrode terminal and the inter-channel voltage Vcem of transistor 117m. Therefore, the potential at the emitter terminal es of transistor 117s changes depending on the on / off state of transistor 117m and the magnitude of the constant current Id.

[0128] The gate signal Vsg applied to the gate terminal gm of transistor 117m is referenced to the potential of the emitter terminal em. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117m, then when the Vg voltage is applied from the AGND potential of the N electrode terminal, transistor 117m will be in the ON state.

[0129] In Figure 18(a), the 0(V) potential is defined as the voltage that turns off transistor 117m. The Vt1 voltage is a voltage with a negative polarity compared to the 0(V) potential. The negative Vt1 voltage is applied, using the Vmm1 voltage as a reference. Note that in Figure 18(a) and other diagrams, the Vt1 voltage is illustrated as the Vt voltage.

[0130] The current Icm flowing through diode Dm is generated using the Vmm2 and Vpm2 voltages as power sources. Since the Vmm2 voltage is shared with the Vmm1 voltage, the voltage at the terminals of diode Dm is within the range of Vmm1 and Vpm2, and is a voltage relative to AGND.

[0131] The gate signal Vsg applied to the gate terminal gs of transistor 117s is referenced to the potential of the emitter terminal es. The potential of the emitter terminal es is the sum of the AGND potential of the N electrode terminal and the channel voltage Vcem of transistor 117m.

[0132] As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117s, then the voltage at which transistor 117s turns on is based on the voltage obtained by adding the channel voltage Vcem of transistor 117m to the AGND potential of the N electrode terminal. When the Vg voltage is applied, transistor 117s turns on.

[0133] The Vms1 voltage is isolated from the Vmm1 voltage and is in a floating state. Therefore, even if the inter-channel voltage Vcem of transistor 117m fluctuates, the emitter terminal es potential of transistor 117s fluctuates in accordance with the fluctuation of the inter-channel voltage Vcem of transistor 117m. The Vms1 voltage generates the Vps1 voltage with reference to the emitter terminal es potential.

[0134] The gate signal Vsg applied to the gate terminal g of transistor 117s is referenced to the potential of the emitter terminal es. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117s, then when the voltage Vg is applied from the potential of the emitter terminal es, transistor 117s turns on.

[0135] The Vt2 voltage is a voltage with a negative polarity compared to the 0(V) potential. The negative Vt2 voltage is applied using the Vms1 voltage as a reference. Note that in Figure 18(a), etc., the Vt2 voltage is illustrated as the Vt voltage.

[0136] The current Ics flowing through diode Ds is generated using the Vms2 and Vps2 voltages as power sources. Since the Vms2 voltage is shared with the Vms1 voltage, the voltage at the terminals of diode Ds is within the range of Vms1 and Vps2.

[0137] The Vms1 voltage is isolated from the Vmm1 voltage and is in a floating state. Furthermore, the Vms1 voltage is connected to the collector terminal cm of transistor 117m. Therefore, even if the inter-channel voltage Vcem of transistor 117m fluctuates, the voltages that turn on (Vg) and turn off (0(V)) transistor 117s remain unchanged. Thus, transistor 117s can be effectively controlled on and off.

[0138] Figure 5 is an explanatory diagram illustrating the wiring of the power supply system of the semiconductor device testing apparatus of the present invention. In the wiring shown in Figure 5, the N electrode terminal of transistor 117 is connected to AGND. AGND is, for example, the ground potential.

[0139] The emitter terminal em of transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. The emitter terminal es of transistor 117s is connected to the Vms1 terminal. The Vmm2 and Vms2 terminals are isolated from other power supply terminals and are in a floating state.

[0140] The current Icm flowing through diode Dm generates voltages Vmm² and Vpm² using a power source. The voltage at the terminals of diode Dm is basically within the range of Vmm² and Vpm².

[0141] The current Ics flowing through diode Ds is generated using the Vms2 and Vps2 voltages as the power source. The voltage at the terminals of diode Ds is basically within the range of Vms2 and Vps2.

[0142] The potential of the Vmm2 terminal is maintained at a potential relative to AGND, and the potential of the Vms2 terminal is maintained at a potential relative to the potential of the emitter terminal es of transistor 117s.

[0143] The gate signal Vsg applied to the gate terminal gm of transistor 117m is referenced to the potential of the emitter terminal em. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117m, then when the Vg voltage is applied from the AGND potential of the N electrode terminal, transistor 117m will be in the ON state.

[0144] As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117s, then the voltage at which transistor 117s turns on is based on the voltage obtained by adding the channel voltage Vcem of transistor 117m to the AGND potential of the N electrode terminal. When the Vg voltage is applied, transistor 117s turns on.

[0145] The Vms1 voltage is connected to the emitter terminal es, isolated from other voltages such as the Vmm1 voltage, and is in a floating state. Therefore, even if the inter-channel voltage Vcem of transistor 117m fluctuates, the emitter terminal es potential of transistor 117s fluctuates in accordance with the fluctuation of the inter-channel voltage Vcem of transistor 117m. The Vms1 voltage generates the Vps1 voltage with reference to the emitter terminal es potential.

[0146] The gate signal Vsg applied to the gate terminal g of transistor 117s is referenced to the potential of the emitter terminal es. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117s, then when the voltage Vg is applied from the potential of the emitter terminal es, transistor 117s turns on. Other details are explained in Figure 4, so they will be omitted here. Figure 6 is an explanatory diagram illustrating the wiring of the power supply system of the semiconductor device testing apparatus of the present invention. In the wiring shown in Figure 6, the N electrode terminal of transistor 117 is connected to AGND.

[0147] The emitter terminal em of transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. Also, the Vmm2 terminal and the Vms2 terminal are connected. The emitter terminal es of transistor 117s is connected to the Vms1 terminal. The Vmm1 terminal and the Vmm2 terminal are not connected.

[0148] The current Icm flowing through diode Dm generates voltages Vmm2 and Vpm2 using a power supply. The voltage at the terminals of diode Dm is basically within the range of Vmm2 and Vpm2. The current Ics flowing through diode Ds generates voltages Vms2 and Vps2 using a power supply. The voltage at the terminals of diode Ds is basically within the range of Vms2 and Vps2. Since the Vmm2 and Vms2 voltages are common, the potentials of diode Dm and diode Ds operate within a common potential range.

[0149] In Figure 6, the switch circuit 123 is placed in the power supply connection wiring. The switch circuit 123 can switch between connecting the Vms2 voltage and the Vpm2 voltage, or connecting the Vms2 voltage and the Vmm2 voltage. The semiconductor device components 117 to be tested are diverse. Therefore, it is necessary to match the potential of the voltage signal applied to the semiconductor device components 117.

[0150] In this invention, a wide variety of tests can be handled by arranging or providing the switch circuit 123 as shown in Figure 6. Needless to say, the above points can also be applied to the connections of power supply systems as shown in Figures 4, 5, 7, 13, and 14.

[0151] Note that the switch circuit 123 is not limited to the embodiment shown in Figure 6. For example, it may be configured to select the Vmm1 and Vpm1 voltages and connect them to other potentials (for example, connected to the Vmm1 voltage). As described above, the present invention is characterized by being configured to change the connection state of the potential generated by an isolated DC-DC converter circuit, etc. Examples of switch circuits 123 include analog switches, relay circuits, and magnetic switches. Figure 7 is an explanatory diagram illustrating the wiring of the power supply system of the semiconductor device testing apparatus of the present invention. In the wiring shown in Figure 7, the N electrode terminal of transistor 117 is connected to AGND.

[0152] The emitter terminal em of transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. The Vmm1 terminal is connected to the Vmm2 terminal, and the Vmm1 terminal is connected to the Vms1 terminal. The emitter terminal es of transistor 117s is connected to the Vms1 terminal.

[0153] The Vmm2 terminal and the Vms2 terminal are connected. The current Icm flowing through diode Dm generates the Vmm2 voltage and Vpm2 voltage using these as the power source. The voltage at the terminals of diode Dm is basically within the range of Vmm2 and Vpm2.

[0154] The current Ics flowing through diode Ds is generated using the Vmm2 and Vps2 voltages as power sources. The voltage at the terminals of diode Ds is basically within the range of Vmm2 and Vps2. Since the Vmm2 and Vps2 voltages are common, the potentials of diode Dm and diode Ds operate within a common potential range. Other details are explained in Figures 4, 5, or 6, etc., so they will be omitted here.

[0155] Needless to say, the above embodiments can be combined with other embodiments. Furthermore, the arrangement, connection positions, and connection voltages of switch circuits 123, etc., can be changed as needed. When the potential of the Vmm1 voltage changes, the potential of the Vpm1 voltage also shifts. When the potential of the Vmm2 voltage changes, the potential of the Vpm2 voltage also shifts. When the potential of the Vms1 voltage changes, the potential of the Vps1 voltage also shifts accordingly. When the potential of the Vms2 voltage changes, the potential of the Vps2 voltage also shifts accordingly.

[0156] The Vmm1 and Vms1 voltages are floating. Therefore, when the inter-channel voltage Vcem of transistor 117m changes, Vms1 changes in conjunction with the change in Vcem.

[0157] The gate signal (on / off signal) applied to the gate terminal gm of transistor 117m is output with reference to the Vmm1 voltage. The gate signal (on / off signal) applied to the gate terminal gs of transistor 117s is output with reference to the Vms1 voltage.

[0158] When the current Id flowing through transistor 117m changes, and the voltage applied to the gate terminal gm of transistor 117m changes, even if the inter-channel voltage Vcem of transistor 117m changes, the Vms1 voltage changes in conjunction with the Vcem voltage because of the following mechanism.

[0159] Even if the inter-channel voltage Vce of transistor 117m changes, the Vms1 voltage is floating, and the gate signal of transistor 117s is generated based on the Vms1 voltage, so transistor 117s can be controlled on and off without any problems.

[0160] Diode Ds is floating relative to the Vmm1 and Vms1 voltages. Therefore, even if the Vmm1 voltage changes, or if the inter-channel voltage Vcem of transistor 117m changes, it will not be damaged, and the temperature of transistor 117s can be measured or its temperature range determined normally.

[0161] In Figures 8(d) and 15(d), when switch circuit 124d is turned on, the O electrode terminal becomes V2 potential (AGND). Also, in Figures 8(e) and 15(e), when switch circuit 124c is turned on, the O terminal becomes V1 potential.

[0162] As described above, in the test method of the present invention, the potential of the electrode terminals (P electrode terminal, O electrode terminal, N electrode terminal) of the semiconductor element component 117 changes depending on the test conditions or test state. In addition, the potential of the emitter terminal es of the transistor 117s changes depending on the test conditions or test state.

[0163] In the semiconductor device of the present invention, the power supply connection method described in Figures 4, 5, 6, and 7, or the power supply connection method described in Figures 13 and 14, can be easily implemented, and the test conditions shown in Figures 8 and 15 can be easily realized.

[0164] In this invention, the power supply wiring configuration shown in Figures 4, 5, 6, 7, 13, and 14 can be automatically changed or selected using electromagnetic switches, relay circuits, switch transistors, etc. Alternatively, it may be changed or selected by changing the soldering. Since each voltage is isolated from the others, electrical short circuits do not occur, and wiring changes are easy.

[0165] As shown in Figure 1, the emitter terminal em of transistor 117m is grounded to AGND. The gate terminal gm of transistor 117m is connected to the gate driver circuit 113m. In addition, a short circuit 137m is connected between the gate terminal gm and the emitter terminal em of transistor 117m.

[0166] The short circuit 137 can be composed of a transistor, an analog switch, a mechanical switch circuit, a relay circuit, a photoswitch, etc. The short circuit 137 may also be replaced with a mechanical short-circuit connector.

[0167] When the short circuit 137m is turned on, the emitter terminal em and gate terminal gm of transistor 117m are electrically short-circuited, and transistor 117m becomes diode-connected. When the short circuit 137s is turned on, the emitter terminal es and gate terminal gs of transistor 117s are electrically short-circuited, and transistor 117s becomes diode-connected.

[0168] The gate driver circuit 113 (gate driver circuit 113m, gate driver circuit 113s) incorporates a light-emitting diode Dt and a photodiode Dr, and applies the gate signal Vsg (gate signal Vsgm, gate signal Vsgs) to the photodiode Dr while isolating it. The output of the photodiode Dr is connected to the amplifier Amp, and the output of the amplifier Amp is applied to the driver dr to output the gate signal sg.

[0169] The gate signal Vsgm input to the gate driver circuit 113m is referenced to the circuit ground (GND). The gate signal output from the gate driver circuit 113m is generated using the Vmm1 voltage and Vpm1 voltage.

[0170] As shown in Figure 18(a), a 0 voltage (off voltage) and a Vg voltage (on voltage) are output. In the case of transistor 117m, 0 in Figure 18(a) is the Vmm1 voltage, which turns off transistor 117m. The Vpm1 voltage is the Vg voltage that turns on transistor 117m.

[0171] The Vt1 voltage is a negative voltage relative to the 0(V) potential. The voltage selection circuit 302m selects either 0(V) or the Vt1 voltage and applies it to the gate terminal gm as the Vt voltage. The voltage selection circuit 302m selects between the Vt1 voltage and the signal output by the gate driver circuit 113m.

[0172] Note that in Figure 18(a), the Vt1 voltage is written as Vt. This is to avoid making the diagram too complex and to make it easier to understand. The same applies to the Vt2 voltage.

[0173] The Vt voltage is generated in the isolated DC-DC converter circuit, and the Vt voltage (Vt1, Vt2) is configured to be variable down to -5V, with the off-voltage (0V) of transistor 117 (transistor 117s, transistor 117m) as the upper limit.

[0174] In the case of transistor 117s, 0 in Figure 18(a) is the Vms1 voltage, which turns off transistor 117s. The Vps1 voltage is the Vg voltage that turns on transistor 117s.

[0175] The Vt2 voltage is a negative voltage. The voltage selection circuit 302s selects either 0(V) or the Vt2 voltage and applies it to the gate terminal gs as the Vt voltage. The voltage selection circuit 302s selects between the Vt2 voltage and the signal output by the gate driver circuit 113s.

[0176] A variable resistor circuit 125m is connected to the output of gate driver circuit 113m. A variable resistor circuit 125s is connected to the output of gate driver circuit 113s.

[0177] The values ​​of the variable resistor circuit 125 (variable resistor circuit 125m, variable resistor circuit 125s) are configured to be set to a predetermined value or in steps between 0 (Ω) and 500 (Ω). The values ​​of the variable resistor circuit 125 may also be set by control signals from the controller circuit board 111 (controller 111) while observing the waveform of the gate terminal g (gate terminal gm, gate terminal gs).

[0178] A resistor R (not shown) may be placed in the short circuit 137 (short circuit 137m, short circuit 137s). By adjusting the value of resistor R, the slope angle of the rising and falling voltage waveforms of the gate signal Vsg, or the stability of the gate signal, can be adjusted or set.

[0179] When the value of the variable resistor circuit 125 is large, the rise / fall waveform slope of the gate signal Vsg of transistor 117 (transistor 117m, transistor 117s) applied to the gate terminals (gate terminal gm, gate terminal gs) of transistor 117 becomes gentler.

[0180] On the other hand, if the resistance value of the variable resistor circuit 125 is small, the slope of the rising / falling waveform of the gate signal Vsg becomes steep. By changing the value of the variable resistor circuit 125 or setting it to a predetermined value, the ON signal waveform of transistor 117 can be adjusted.

[0181] As shown in Figures 19 and 20, the gate driver circuit 113 can set the slope of the rising edge (rising edge time Tr) and the slope of the falling edge (falling edge time Td) of the gate signal Vsg waveform applied to the gate terminal g (gate terminal gm) of transistor 117. By adjusting the rising edge time Tr and the falling edge time Td separately, the on-time of transistor 117 can be arbitrarily adjusted.

[0182] The resistance values ​​of variable resistor circuit 125 and variable resistor circuit 126 are set by the controller circuit board 111 (controller 111). The set resistance values ​​are not limited to constant values. The slope of the rising waveform (rising time Tr) and the falling waveform (falling time Td) of the gate driver circuit 113 may be changed.

[0183] The resistance value at the rising edge and the resistance value at the falling edge of the gate signal Vsg may be varied. Alternatively, the resistance value may be controlled in real time. By controlling the variable resistor circuit 125 in real time, the on-time of transistor 117 is stabilized.

[0184] When the resistance value of the variable resistor circuit 125 is decreased at the rising edge of the gate signal Vsg, the waveform of the on-voltage Vg applied to the gate terminal g of transistor 117 becomes steeper, and transistor 117 turns on quickly. When the resistance value of the variable resistor circuit 125 is increased at the rising edge of the gate signal Vsg, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes gentler, and transistor 117 turns on more gradually.

[0185] When the resistance value of the variable resistor circuit 125 is decreased during the falling edge of the gate signal Vsg, the signal waveform that changes from the on-voltage to the off-voltage applied to the gate terminal of transistor 117 becomes steeper, causing transistor 117 to turn off quickly. When the resistance value of the variable resistor circuit 125 is increased during the falling edge of the gate signal Vsg, the waveform of the on-voltage Vg applied to the gate terminal g of transistor 117 becomes gentler, causing transistor 117 to turn off more gradually.

[0186] As described above, the value of the variable resistor circuit 125 connected to the gate terminal of transistor 117, or the rise time / fall time of the gate driver circuit 113, can be controlled, adjusted, or set. Therefore, as a function of the gate driver circuit 113, the inrush current Is and surge voltage Vs generated in the transistor 117 under test can be changed or their magnitudes can be altered.

[0187] It goes without saying that the operation of transistor 117 can not only control the on-voltage of the gate terminal of transistor 117, but also change or set the value of the constant current Id or voltage Vm supplied to transistor 117 by the power supply circuit 121.

[0188] The gate signal period time tcycle, on time ton, or off time tooff of the gate signal output by the gate driver circuit 113 shown in Figure 18 is controlled by the gate signal control circuit 112, and the gate signal is applied to the gate terminal of transistor 117. The gate signal control circuit 112 is controlled by the controller circuit board 111 (controller 111).

[0189] The resistance value of the variable resistor circuit 125 in the gate driver circuit 113 is variable, but it is not limited to this. For example, the variable resistor circuit 125 may be an external resistor, and the resistor may be connected to the gate terminal of transistor 117 using a connector (not shown), etc. The value of the connected resistor is determined by observing the waveform at the gate terminal of transistor 117 and the waveform of the channel current Id.

[0190] A current detection circuit 128 (current detection circuit 128m, current detection circuit 128s) that measures the voltage across the terminals of the variable resistor circuit 125 (variable resistor circuit 125m, variable resistor circuit 125s) is arranged or connected to the variable resistor circuit 125.

[0191] Tests often reveal that transistor 117 (transistor 117m, transistor 117s) deteriorates due to leakage in the gate insulating film of transistor 117. When leakage occurs in the gate insulating film, leakage current flows between the gate terminal g and emitter terminal e of transistor 117, and between the gate terminal g and collector terminal c of transistor 117. This leakage current flows through the variable resistor circuit 125. Therefore, by measuring the terminal voltage of the variable resistor circuit 125, the leakage current can be detected or its magnitude can be measured.

[0192] Leakage current is measured when the gate signal Vsg is Vg (on voltage) and when the gate signal Vsg is 0 (V) or Vt voltage (off voltage). The degradation state of transistor 117 is quantitatively determined by whether the leakage current is greater than a predetermined current value, or whether the terminal voltage of the variable resistor circuit 125 is greater than a predetermined voltage, and a decision is made whether to continue or stop the test.

[0193] The current detection circuit 128 operates at the timings shown in Figure 18(i). In Figure 18(i), Si indicates a switch (not shown) that activates the current detection circuit 128. Switch Si is turned on at a high level to measure the voltages at both terminals of the variable resistor circuit 125 (variable resistor circuit 125m, variable resistor circuit 125s), thereby measuring the voltage Ve (voltages Vem, voltages Ves).

[0194] Switch Si is ON (H level) during at least one of the periods when a constant current Id flows through transistor 117 (operating period) or when a constant current Id does not flow through it (non-operating period).

[0195] As shown in Figures 18(b), (c), and (i), the period when the constant current Id is not flowing is tcs, which is the period before the constant current Id flows through transistor 117, and tcm, which is the period after the constant current Id flows. The period when the constant current Id is flowing is tcc. Switch Si is turned on during at least one of the periods tcs, tcm, and tcc, and the voltage Ve across the variable resistor circuit 125 is measured.

[0196] The resistance of the variable resistor circuit 125 is configured to be changeable according to the characteristics of the transistor 117. Furthermore, the resistance value can be changed or set according to changes in the characteristics of the transistor 117 during testing. It is also preferable to change the resistance value when a constant current Id flows through the transistor 117 (tcc) and when it does not (tcs, tcm). Additionally, it is preferable to change the resistance value in accordance with the magnitude of the constant current Id.

[0197] The leakage current can be calculated by dividing the terminal voltage of the variable resistor circuit 125 by the variable resistance value. Note that the variable resistor circuit 125 may also be a resistor circuit consisting of fixed resistance values. By understanding the leakage current, the degradation state and characteristics of transistor 117 can be measured or acquired.

[0198] The durations of TCC, TCS, and TCM are configured to be variable. Furthermore, the start and end timings of TCC, TCS, and TCM can be moved.

[0199] The terminal voltage Vem of the variable resistor circuit 125m is input to the current detection circuit 128m. The current detection circuit 128m consists of block A and block B, where block A is the Vc voltage and block B is the Vmm1 voltage and Vpm1 voltage. Block A and block B are isolated from each other. In the current detection circuit 128m, the Vem voltage is converted to a voltage referenced to the circuit ground (GND). The Vem voltage is then sent to the device control circuit board 209m.

[0200] The terminal voltage Ves of the variable resistor circuit 125s is input to the current detection circuit 128s. The current detection circuit 128s consists of block A and block B, where block A is the Vc voltage and block B is the Vms1 voltage and Vps1 voltage. Block A and block B are isolated from each other. In the current detection circuit 128s, the Ves voltage is converted to a voltage referenced to the circuit ground (GND). The Ves voltage is sent to the device control circuit board 209s.

[0201] The potential of the variable resistor circuit 125m, which detects leakage current, operates between the Vmm1 voltage and the Vpm1 voltage. The Vmm1 voltage is connected to AGND. Therefore, the terminal potential of the variable resistor circuit 125m can be measured stably.

[0202] The potential of the variable resistor circuit 125s, which detects leakage current, operates between the Vms1 voltage and the Vps1 voltage. The Vms1 voltage is the voltage at the emitter terminal es of transistor 117s.

[0203] The Vmm1 voltage and Vms1 voltage are not electrically connected and are in a floating state. The Vms1 voltage shifts in conjunction with the magnitude of the inter-channel voltage Vcem of transistor 117m. Therefore, even if the potential of the emitter terminal es of transistor 117s changes, the terminal potential of the variable resistor circuit 125s can be measured stably.

[0204] In the embodiment shown in Figure 1, a voltage Ve is generated by the current flowing through the gate terminal g of transistor 117 in the variable resistor circuit 125, and the value and change of this voltage are measured. However, the invention is not limited to this. For example, it goes without saying that the current flowing through the gate terminal g of transistor 117 may be measured directly. It also goes without saying that the current value to be measured or acquired may be amplified and acquired.

[0205] The potential of the gate terminal gm of transistor 117m and the potential of the gate terminal gs of transistor 117s will shift when the inter-channel voltage Vcem of transistor 117m and the emitter terminal em voltage of transistor 117m change.

[0206] The current detection circuit 128 is isolated from voltage block A of the circuit power supply and from voltage detection block B or voltage detection block D. Block B is the power supply for voltages Vmm1 and Vpm1, and block D is the power supply for voltages Vms1 and Vps1. Therefore, even if the potentials of the gate terminals gm and gs shift, it does not affect the measurement of voltage Ve (voltages Vem and Ves).

[0207] The output of the constant current setting circuit 130 (constant current setting circuit 130m, constant current setting circuit 130s) connects to the operational amplifier circuit 116 (operational amplifier circuit 116m, operational amplifier circuit 116s) (buffer amplifier circuit), transistor T (transistor Tm, transistor Ts), and variable resistor circuit 126 (variable resistor circuit 126m, variable resistor circuit 126s), which together constitute a constant current circuit. The constant current circuit generates a constant current that flows through the diode D (diode Dm, diode Ds). Note that the constant current circuit is not limited to the circuit configuration shown in Figure 1. Any configuration that allows current to be applied to diode D is acceptable.

[0208] The output of the constant current setting circuit 130 (constant current setting circuit 130m, constant current setting circuit 130s) is input to the operational amplifier circuit 116 (buffer amplifier). The output of the operational amplifier circuit 116 is connected to the gate terminal of the transistor, and the emitter terminal of the transistor is connected to the variable resistor circuit 126.

[0209] Voltage block A and voltage detection block B of the circuit power supply for current detection circuit 128m, and voltage block A and voltage detection block D of the circuit power supply for current detection circuit 128s are isolated from each other. Voltage block A and voltage detection block C of the circuit power supply for voltage detection circuit 129m, and voltage detection block E of the circuit power supply for voltage detection circuit 129s are isolated from each other.

[0210] Therefore, even if the potentials of the gate terminals gm and gs shift, it does not affect the measurement of voltage Ve (voltages Vem and Ves). It also does not affect the measurement of voltage Vi (voltages Vim and Vis).

[0211] The constant current setting circuit 130 sets a predetermined voltage. The variable resistor circuit 126 sets its resistance value in accordance with the magnitude of the constant current flowing through the diode. The variable resistor circuits 126m and 126s are configured to allow their resistance values ​​to be set and changed independently.

[0212] In the embodiment shown in Figure 1, the constant current circuit is configured to change the current value using a variable resistor circuit 126. However, the invention is not limited to this configuration, and the variable resistor circuit 126 may be a fixed resistor circuit.

[0213] The voltage Vc (voltage Vcm, voltage Vcs) is set by the device control circuit board 209. The voltage Vc (voltage Vcm, voltage Vcs) generates current Ics flowing through diode Ds and current Icm flowing through diode Dm.

[0214] A constant current Ic (constant current Ics, constant current Icm) flows through diode D (diode Ds, diode Dm), generating a terminal voltage Vi (terminal voltage Vis, terminal voltage Vim).

[0215] The voltage detection circuit 129 (voltage detection circuit 129m, voltage detection circuit 129s) consists of an A block and a C block or an E block. Block A of voltage detection circuit 129m operates with the voltage Vc of the circuit power supply. Block C of voltage detection circuit 129m operates with voltages Vmm2 and Vpm2. Block A of voltage detection circuit 129s operates with the voltage Vc of the circuit power supply.

[0216] Block E of the voltage detection circuit 129s contains voltages Vms2 and Vps2. Block A of the voltage detection circuit 129 is isolated from block D or block E.

[0217] Therefore, even if the potential of diode D (diode Dm, diode Ds) fluctuates, the potential of voltage Vim or voltage Vis is converted to voltage Vi (Vim, Vis) referenced to the circuit ground of block A of the circuit power supply and transmitted to the device control circuit board 209.

[0218] By isolating the voltage Vc of the circuit power supply from the power supply of the constant current circuit (block C, block D), the potential of diode D can be floated. Therefore, even if the inter-channel voltage Vcem of transistor 117m changes, no overvoltage will be applied to diode Ds.

[0219] The current detection circuit 128 has a differential amplifier (subtractor) circuit. The voltage Ve (voltage Vem, voltage Ves) input to the current detection circuit 128 is converted by the differential amplifier (subtractor) circuit, etc., into a voltage Ve (voltage Vem, voltage Ves) referenced to the circuit ground.

[0220] The voltage detection circuit 129 has a differential amplifier (subtractor) circuit. The voltage Vi (voltages Vim, voltages Vis) input to the voltage detection circuit 129 is converted by the differential amplifier (subtractor) circuit, etc., into a voltage Vi (voltages Vim, voltages Vis) referenced to the circuit ground.

[0221] As described above, the current detection circuit 128 and the voltage detection circuit 129 are isolated from the circuit power supply voltage (floating with respect to the circuit power supply voltage), and the current detection circuit 128 and the voltage detection circuit 129 have a differential amplifier (subtractor) circuit, which acquires the voltage (Ve, Vi). Therefore, the voltage (Ve, Vi) can be measured stably and accurately. In addition, the diode D (Ds, Dm) and transistor 117 (transistor 117m, transistor 117s) will not be damaged. Furthermore, there is no noise generation during testing, and the test conditions are stable.

[0222] One terminal of the short circuit 137m is connected to the emitter terminal em of transistor 117m, and the other terminal is connected to the gate terminal gm of transistor 117m. One terminal of the short circuit 137s is connected to the emitter terminal es of transistor 117s, and the other terminal is connected to the gate terminal gs of transistor 117s.

[0223] The emitter terminal es of transistor 117s is the voltage obtained by adding the emitter terminal em of transistor 117m to the inter-channel voltage Vcem of transistor 117m. The inter-channel voltage Vcem changes depending on the on / off state of transistor 117m and the magnitude of the current Id flowing between channels. The gate terminal gs of transistor 117s is isolated from the circuit power supply Vc, and the current detection circuit 128 is also isolated from the circuit power supply voltage Vc. The potential of the gate terminal gs of transistor 117s is floating relative to the emitter terminal em of transistor 117m.

[0224] Even if the current Id flowing through transistor 117m fluctuates, even if the potential of the emitter terminal em of transistor 117m fluctuates, even if the potential of the gate terminal gm of transistor 117m fluctuates, the terminal potentials of diode Ds, diode Dm, and the gate terminal gs of transistor 117s will be following the terminal potential of the emitter terminal em of transistor 117m and will change in accordance with the potential fluctuations.

[0225] The Vi voltage (Vis, Vim) and Ve voltage (Ves, Vem) are measured or acquired using a differential amplifier (subtractor) circuit. Therefore, no overvoltage is applied to transistor 117 or diode D, and the Vi voltage (Vis, Vim) and Ve voltage (Ves, Vem) can be acquired stably.

[0226] The differential amplifier (subtractor) circuit is not limited to analog circuits using operational amplifier circuits, etc. For example, it goes without saying that the configuration may also involve converting the terminal voltage of diode D and the terminal voltage of variable resistor circuit 125 from analog to digital and obtaining the Vi voltage (Vis, Vim) and Ve voltage (Ves, Vem) through digital circuit processing, etc. The same applies to operational amplifier circuit 116 (operational amplifier circuit 116m, operational amplifier circuit 116s) and its surrounding circuitry.

[0227] The terminals of transistor 117m are connected to the connection pins 206 of connector 202m, and the terminals of transistor 117s are connected to the connection pins 206 of connector 202s. Connector 202 is configured to be easily attached to and detached from the terminals of transistor 117.

[0228] In Figure 2, the sample connection circuit 203 (sample connection circuit 203s1, sample connection circuit 203s2, sample connection circuit 203m1, sample connection circuit 203m2) contains or includes a gate driver circuit 113, a variable resistor circuit 125, a variable resistor circuit 126, a constant current setting circuit 130, a current detection circuit 128, a voltage detection circuit 129, and a voltage selection circuit 302.

[0229] As shown in Figure 24, the sample connection circuit 203 is positioned separately from the device control circuit board 209 so that it can be placed close to the transistor 117 to be tested.

[0230] It is preferable to provide one sample connection circuit 203 for each transistor 117, or each transistor 117m, or each transistor 117s, to be tested. However, it is not limited to this, and one sample connection circuit 203 including multiple signal circuits may be provided for multiple transistors 117, etc.

[0231] As shown in Figure 2, the sample connection circuit 203 is connected to the transistor 117 at the connection pin 206 of the connector 202. The gate driver circuit 113 and the gate terminals g (gate terminal gm, gate terminal gs) of the transistor 117 (transistor 117m, transistor 117s) are positioned so that the distance between them is 30 mm or less.

[0232] If the distance between the gate driver circuit 113 and the gate terminal g of transistor 117 is long, noise and other interference will be superimposed on the gate terminal g, causing transistor 117 to malfunction and directly leading to its destruction.

[0233] As shown in Figure 2, the sample connection circuits 203s (sample connection circuit 203s1, sample connection circuit 203s2) are connected to the device control circuit board 209s via connector 208s. Voltage Vis, voltage Vcs, gate signal Vsgs, and voltage Ves are transmitted and received by the device control circuit board 209s.

[0234] The sample connection circuit 203m (sample connection circuit 203m1, sample connection circuit 203m2) is connected to the device control circuit board 209m via connector 208m. Voltage Vim, voltage Vcm, gate signal Vsgm, and voltage Vem are transmitted and received by the device control circuit board 209m.

[0235] The controller circuit board 111 (controller 111) controls the device control circuit board 209 (device control circuit board 209s, device control circuit board 209m), the sample connection circuit 203s (sample connection circuit 203s1, sample connection circuit 203s2), and the short circuit 137 (short circuit 137m, short circuit 137s), and transmits and receives various data and voltages as needed.

[0236] As shown in Figure 24, the device control circuit board 209 is located in chamber B of the housing 210 of the semiconductor device test apparatus. The housing 210 is a frame or main body of the semiconductor device test apparatus, incorporating the power supply unit 132, drive circuit, and heating / cooling plate 134. The sample connection circuit 203 is placed in chamber C of the semiconductor device test apparatus housing 210 in order to be positioned close to the transistor 117 to be tested.

[0237] The sample connection circuits 203 (sample connection circuits 203m1, 203m2, 203s1, and 203s2) are connected to a connector 208 located on the side of the housing 210. The wiring connected to the connection pin 206 of the connector 208 is connected to the device control circuit board 209 in chamber B.

[0238] The enclosure 210 is not limited to a box shape; for example, it could be a room. The image shows the power supply circuit 121 being placed inside the room. The partition walls 214 and 215 could be the walls of the room.

[0239] As shown in Figure 24, the semiconductor component 117 (transistor, etc.) to be tested is placed in chamber C. The transistor 117, etc., is placed and fixed in close contact with the heating and cooling plate 134. Partition walls 215 and 214 are equipped with electrostatic shielding or electrostatic shielding mesh, and thus function as electrostatic shields.

[0240] In this invention, the housing 210 is divided into multiple regions such as chamber A, chamber B, and chamber C. Dry air (a dry gas, a gas with a low dew point temperature) is injected into chamber C. Air pressure is applied to chamber C, and the air injected into chamber C is discharged through an opening 216 or the like. The partitions (partitions 214 and 215) serve the functions of separating each room (room A, room B, and room C) and preventing outside air from flowing in.

[0241] In particular, since condensation may occur in chamber C during low-temperature testing, dry air is introduced into chamber C. The dry air that flows into chamber C is discharged to other chambers through opening 216. However, if the opening of opening 216 is large, a large amount of dry air will be required. Therefore, it is preferable that the opening 216 be sized to allow the fork plug 205, which serves as a connecting member, to be inserted just in time.

[0242] The sample connection circuit 203 is connected to the device control circuit board 209 by the connection pins 206 of the connector 208. Each sample connection circuit 203 is individually positioned to correspond to each transistor 117 to be tested, and the sample connection circuits 203 are configured to be easily detachable by connectors or the like.

[0243] Connectors 202 and 208 are not limited to connectors; any device that can electrically connect or disconnect wiring may be used. For example, soldering is one such example.

[0244] As shown in Figures 22 and 24, the transistor 117 to be tested is positioned and fixed in close contact with the heating / cooling plate 134. Thermal conductive grease and heat dissipation silicone oil compound are applied between the transistor 117 and the heating / cooling plate 134.

[0245] A detachable connector 202 is connected to the terminals of transistor 117 (emitter terminal e, gate terminal g, and collector terminal c). A signal wire 222 is connected to the connector 202, and the signal wire 222 is connected to the sample connection circuit 203.

[0246] The signal wiring 222 between the sample connection circuit 203 and the connector 202 should be made as short as possible. If the signal wiring 222 is long, noise will be superimposed on it, causing the transistor 117 to malfunction. For example, if noise is superimposed on the gate terminal g of transistor 117, transistor 117 may turn on and be destroyed. The signal wiring 222 should be twisted wire or use shielded wiring such as coaxial cable.

[0247] As shown in Figure 24, the connector 208 is located on the side of the housing 210, and the connector 208 is connected to the device control circuit board 209 located in chamber B by signal wiring 235. Control signals or output signals from the gate driver circuit 113, gate signal control circuit 112, variable resistor circuit 125, operational amplifier circuit 116, etc. are input and output from the device control circuit board 209.

[0248] In the embodiments shown in Figure 2, the symbol for a switch circuit 124 is used. Any element can be used as a switch circuit as long as it has a small resistance when closed (on) (on resistance). Examples include mechanical relays, transistors, phototransistors, photodiode switches, etc.

[0249] Figure 3 is a partial equivalent circuit diagram of Figure 2 of the semiconductor device testing apparatus in the first embodiment of the present invention. In this embodiment shown in Figure 3, the switch circuit 124 uses a power MOSFET 124. Power MOSFETs have a small voltage (Vsd) between channels.

[0250] Note that a switch circuit other than a power MOSFET may be used for switch circuit 124. It goes without saying that switch circuits 122 and 124 may be power transistors or the like, not just power MOSFETs. Other examples include electromagnetic relays and electromagnetic switches. When the switch circuit 122 (switch SWa) is turned on, the constant current Id output by the power supply circuit 121 is supplied to the test circuit.

[0251] The switch circuit 124 is formed on the switch circuit board 201 as shown in Figure 23. The switch circuit 124b is located on the switch circuit board 201b. Conductor plates 204c and 204d are attached to the switch circuit board 201b. The fork plug 205e is inserted through the opening 216 of the partition wall 214. The fork plug 205d is electrically connected to the conductor plate 204c. The fork plug 205d is electrically connected to the conductor plate 204d.

[0252] The switch circuit 124d is located on the switch circuit board 201d. Conductor plates 204a and 204b are attached to the switch circuit board 201d. The fork plug 205b is electrically connected to the conductor plate 204b.

[0253] The switch circuit 124c is located on the switch circuit board 201c. Conductor plates 204e and 204f are mounted on the switch circuit board 201c. The fork plug 205a is electrically connected to the conductor plate 204e.

[0254] In Figure 2, etc., when the switch circuit 124a is turned on, the output of the power supply circuit 121 is short-circuited, and the current Id output by the power supply circuit 121 flows to Im' ground. When the switch circuit 124a is turned on, the charge between the terminals of the semiconductor element component 117 being tested (P electrode terminal - N electrode terminal) and the charge of the power supply circuit 121 are discharged. The generation of surge voltage, transient current, etc. is suppressed.

[0255] When switch circuit 124a is turned on, the output of power supply circuit 121 is short-circuited, and the charge in power supply circuit 121 is discharged. When switch circuits 124c and 124d are turned on simultaneously, the output of power supply circuit 121 is also short-circuited, and the charge in power supply circuit 121 is discharged. In this configuration or method, switch circuit 124a is unnecessary.

[0256] Furthermore, it is also effective to stagger the timing at which switch circuits 124c and 124d are turned on. For example, switch circuit 124c turns on before switch circuit 124d, causing a short circuit between the channels of transistor 117s. Then, switch circuit 124d turns on, causing a short circuit between the channels of transistor 117m. Alternatively, switch circuit 124d turns on before switch circuit 124c, causing a short circuit between the channels of transistor 117m. Then, switch circuit 124c turns on, causing a short circuit between the channels of transistor 117s. By causing the short circuits to occur sequentially, the generation of surge voltages and other issues in the semiconductor element component 117 is further suppressed. When the switch circuit 124b is turned on, the current Id output by the power supply circuit 121 can be supplied to the transistor 117 as the test current Id. The fork plug 205 is inserted through the opening 216 in the bulkhead 214 and electrically connected to the switch circuit board 201.

[0257] As shown in Figure 23, the switch circuit 124 is mounted on the switch circuit board 201. The switch circuit 124 is connected to the conductive plate 204 (metal plate, conductive plate).

[0258] The conductor plate 204 is, for example, a copper plate with a thickness of 5 mm and a width of 50 mm. Its length is the width of the circuit board plus the width required to connect the fork plug 205. However, the conductor plate 204 is not limited to a plate shape. Any shape is acceptable as long as the fork plug 205 and the conductor plate 204 can be electrically connected. For example, the conductor plate 204 may be rod-shaped or spherical.

[0259] FIG. 27 illustrates the fork plug 205 and the connection (contact) state between the fork plug 205 and the conductor plate 204. FIG. 27(b) is a cross-sectional view taken along line AA' of FIG. 27(a). Two conductor plates 204 are attached to the switch circuit board 201. The switch circuit board 201 has a full-surface ground layer (not shown), and the full-surface ground layer and the conductor plate 204 are thermally connected. The heat of the conductor plate 204 is dissipated through the full-surface ground layer. The conductor plate 204 and the switch circuit board 201 are screwed together.

[0260] A connection bolt 219 is attached to the fork plug 205. A connection wiring 211 is attached to the connection bolt 219. The fork plug 205 and the connection wiring 211 are detachable by the connection bolt 219.

[0261] FIG. 27 is a configuration diagram of the fork plug 205. FIG. 27(a) shows a state where the conductor plate 204 attached to the switch circuit board 201 and the fork plug 205 are coupled. FIG. 27(b) shows the coupling state of the conductor plate 204 and the fork plug 205 when the cross-section along line AA' of FIG. 27(a) is viewed from the arrow direction.

[0262] As shown in FIG. 27(b), an electrical connection is achieved by mechanically (mechanically) connecting or fitting the fork plug 205 and the conductor plate 204. When the U-shaped portion of the fork plug 205 is inserted into the conductor plate 204, the U-shaped portion slightly expands, and the fork plug 205 and the conductor plate 204 are well joined. Also, pressure may be applied to the connection portion using a leaf spring or the like. By being well joined or fitted, the electrical resistance of the connection portion becomes extremely small, and even when a large current flows through the connection portion, heat generation or voltage drop does not occur. The surface of the contact portion 220 is preferably polished and smoothed.

[0263] A connecting bolt 219 is attached to the fork plug 205. A connecting wire 211 is connected to the connecting bolt 219. A cross-section at AA' in Figure 27(a) is shown in Figure 27(b). The conductor plate 204 and the fork plug 205 are in contact at contact portions 220a and 220b formed on the fork plug 205. The surface of the contact portion 220 is nickel-plated as a base coat and silver-plated on the surface. The contact portion 220 is made of phosphor bronze and nickel alloy. Note that the connecting bolt 219 is not limited to a bolt; any type of bolt that can electrically connect the fork plug 205 and the wire is acceptable. The surface of the conductor plate 204 is silver-plated at least in the portion that comes into contact with the fork plug 205.

[0264] The fork plug 205 is made of a metal such as aluminum. Its surface is nickel-plated and then silver-plated. The fork plug 205 has a threaded groove, allowing the connecting wire 211 to be attached to it using a connecting bolt 219. The surface of the contact portion 220 is silver-plated. The insertion force of the fork plug 205 into the conductor plate 204 is configured to be between 40 and 60 N.

[0265] Platinum, gold, silver, tungsten, copper, nickel, or alloys combining these materials can be used as the contact portion 220. It is also preferable to use silver oxide contact materials (Ag+ZnO, Ag+SnO2, Ag+SnO2In2O3, Ag+, Ag+SnO2Sn2Bi2O7). Figure 23 is an explanatory diagram showing the connection status of the fork plug 205, the switch circuit board 201, and the conductor plate 204.

[0266] The switch circuit 124 is connected to two conductive plates. As shown in Figure 23, if the switch circuit 124 is a MOS transistor, the drain terminal and source terminal are connected to different conductive plates 204. If the switch circuit 124 is a bipolar transistor, the collector terminal and emitter terminal are connected to different conductive plates 204. When the switch circuit 124 is turned on (conductive), the two conductive plates 204 are electrically connected. An IGBT can also be used as the switch circuit 124. Figure 24 is a diagram showing the configuration of the semiconductor device testing apparatus of the present invention. A circulating water pipe 135 is incorporated into the heating and cooling plate 134.

[0267] A connector 202 is connected to the terminals of transistor 117, and a signal wire 222 connected to the connector 202 is connected to the sample connection circuit 203. The signal wire 235 of the sample connection circuit 203 is connected to the device control circuit board 209 via a connector 208.

[0268] As shown in Figures 23 and 24, the fork plug 205 and the conductor plate 204 are brought into contact by inserting the fork plug 205 through the opening 216 of the partition wall 214. Upon contact, the U-shaped portion of the fork plug 205 is spread open by the conductor plate 204, resulting in a strong electrical and mechanical contact.

[0269] Figure 24 shows the arrangement of each component of the semiconductor device testing apparatus of the present invention. The housing 210 of the semiconductor device testing apparatus is separated into three parts (chamber C, chamber A, and chamber B). The upper part of the housing is chamber C, and the lower part of the housing is separated into chambers A and B. The power supply unit 132 is located in chamber A. Chambers A and B are separated by a partition wall 215.

[0270] Each chamber is shielded. The power supply 132, switch circuit board 201, and transistor 117 generate significant noise through repeated operation and deoperation. Since this noise can cause the circuit board and other components to malfunction, shielding is used to prevent such malfunctions. Shielding is achieved by placing conductive plates, metal plates, or metal films around each chamber.

[0271] Chamber C contains the heating and cooling plate 134, circulating water pipe 135, etc., as shown in Figure 24, and the transistor 117 to be tested is placed on the heating and cooling plate 134.

[0272] A partition wall 214 is formed between chamber C and chambers A and B. A water leak sensor (not shown) is positioned around the heating and cooling plate 134 in chamber C. The system is configured to activate the water leak sensor if circulating water (cooling medium) or the like leaks, stopping the semiconductor device testing equipment or issuing an alarm.

[0273] Furthermore, drainage grooves are formed around the heating and cooling plate, so that if circulating water (cooling medium) leaks from the heating and cooling plate, it flows into the drainage grooves and is discharged outside the semiconductor device testing apparatus. As described above, the partition wall 214 is configured to prevent circulating water (cooling medium) from leaking into the lower chambers A and B even if the circulating water pipe 135 is damaged.

[0274] A partition wall 215 is formed between Room A, where the power supply unit 132 is located, and Room B, where the drive circuit system is located. Electrostatic shielding plates are placed on partition walls 214 and 215 to shield noise from the power supply unit 132, preventing the noise from being applied to the drive circuit system in Room B.

[0275] In this embodiment of the present invention, the fork plug 205 is inserted from chamber C and connected to the conductor plate 204 in chamber B. Pushing the fork plug 205 in from the top to the bottom is easy.

[0276] However, the present invention is not limited thereto. For example, a conductive plate 204 may be placed in chamber C, and a fork plug 205 may be inserted from chamber B to make an electrical connection.

[0277] As shown in FIG. 24, the fork plug 205 is inserted from chamber C into chamber B to electrically connect the fork plug 205 and the conductor plate 204. The transistor 117 is fixed to the heating and cooling plate 134, and the switch circuit board 201 is fixed at the position of the mother board 207.

[0278] By selecting the opening 216 into which the fork plug 205 is inserted, the switch circuit board 201 that can be easily controlled is selected, and the test method and test conditions can be changed. Therefore, according to the present invention, by using the fork plug 205, the transistor 117 that can be easily tested and the drive circuit are connected, and changes such as the test method can be implemented in a short time.

[0279] Examples of the partition walls 214 and 215 include wall-like structures, plate-like structures, film-like objects, mesh-like objects, wire mesh-like objects, etc. As an example, phenolic resin (phenolic resin, phenol-formaldehyde resin, carbolic acid resin) is exemplified. By using a metal object or a conductive object as the partition wall and grounding a stored item or the like to a predetermined potential or earth ground, the effect of electrostatic shielding is exerted. Note that the partition wall may be any object as long as it separates the first part and the second part of the semiconductor element test device.

[0280] As shown in FIG. 28, a connector 213 is attached to the mother board 207. The controller circuit board 111, the device control circuit board 209, and the switch circuit board 201 are attached to the connector of the mother board 207. The switch circuit board 201 prepared according to the number of transistors 117 to be tested can be easily realized by changing the number of switch circuit boards 201 attached to the mother board 207. A conductor plate 204 is attached to the switch circuit board 201. The conductor plate 204 and the fork plug 205 are connected.

[0281] A selector switch 312 is located on the device control circuit board 209, and a selector switch 311 is located on the switch circuit board 201, with the circuit board addresses (numbers) assigned to them. The controller board 111 reads the addresses (numbers) of selector switches 311 and 312 and associates them with the electrical component 177 to be tested.

[0282] As shown in Figure 29, the fork plugs 205 are connected to sections A and B of the conductor plate 204. The moving plate 204 is longer than the switch circuit board 201. Therefore, the fork plugs 205 can be easily connected to sections A and B of the conductor plate 205. As shown in Figure 29, a selector switch 311 is placed on the switch circuit board 201, and a selector switch 312 is placed on the device control circuit board.

[0283] The address (number) set by the selection switch 311 on the switch circuit board 201 and the address (number) set by the selection switch 312 on the device control circuit board are sent to the controller board 111 via the signal lines of the connector 213 and the motherboard 207.

[0284] The electrical element testing apparatus of the present invention can test multiple electrical elements simultaneously or sequentially. A device control circuit board 209 and a switch circuit 124 are arranged corresponding to each electrical element. An address (number) is set on the switch circuit board 201 by a selection switch 311, and the address (number) is set on the device control circuit board 209.

[0285] By setting addresses (numbers) on the device control circuit board 209 and the switch circuit board 201 using the selection switches 311 and 312, the controller 111 can be associated with the electrical element to be tested.

[0286] Connector 315 is a connector for connecting thermocouple 314. Various types of thermocouples can be used for thermocouple 314, such as T-type, J-type, E-type, and K-type thermocouples. The type of thermocouple 314 being used is set by the selection switch 313. The controller reads the data (type of thermocouple) set by the selection switch 313, refers to the electromotive force-temperature table corresponding to the type of thermocouple, and determines the temperature of the electrical component 117 being tested.

[0287] The thermocouple 314 is attached to the package of the electrical component 117. The thermocouple 314 allows for the acquisition of temperature information Tc. It also has a function to determine whether the thermocouple 314 is attached based on the magnitude of the voltage generated at the connector 315 and the presence or absence of voltage.

[0288] The controller circuit 111 has the function of reading the addresses (numbers) of the selection switches 312 and 311, and determining or detecting the number, location, and presence or absence of connections of the electrical components 117 that are being tested or are currently being tested.

[0289] Figure 28 shows four switch circuit boards 201, but is not limited to these. Multiple switch circuit boards 201 may be required depending on the number of transistors 117 to be tested. The switch circuit boards 201 are connected to the connector 213 on the motherboard 207.

[0290] Although not shown in Figure 28, significant noise is generated when the switch circuit 124 on the switch circuit board 201 is switched on and off. To counteract this, a metal plate is placed between the switch circuit boards 201 and the switch circuit board 201, and the metal plate is grounded. The metal plate is electrically connected to the circuit ground (GND) or earth ground (AGND).

[0291] The motherboard 207 receives temperature information Tj, temperature information Tc, voltage Vi, control signals for the variable resistor circuit 125, and control signals for the constant current setting circuit 130. Power and ground wiring for each circuit are also formed and supplied to each circuit board via connector 213. The temperature information Tj is information about the temperature of transistor 171, which is calculated from the terminal voltage Vi of the temperature-sensing diode D. The conductor plate 204 is positioned so as to protrude from the switch circuit board 201. The fork plug 205 is connected to this protruding portion.

[0292] Figures 23 and 24 are diagrams that show a more physical configuration of the block diagram of the semiconductor device testing apparatus of the present invention shown in Figure 3. As shown in Figure 23, a conductor plate 204i and a conductor plate 204j are attached to the switch circuit board 201a. A switch circuit 124a is arranged between the conductor plate 204i and the conductor plate 204j.

[0293] When the switch circuit 124a is turned on, it short-circuits the terminals of the power supply circuit 121 of the power supply unit 132, discharging the charge from the power supply circuit 121. Therefore, when the switch circuit 124a is turned on, no test current is supplied to the semiconductor element component 171.

[0294] Fork plug 205i is connected to conductor plate 204i. Fork plug 205j is connected to conductor plate 204j. Power wiring 212 is connected to fork plug 205i, and power wiring 212 is connected to power supply unit 132. Power wiring 212 is connected to fork plug 205j, and power wiring 212 is connected to power supply unit 132.

[0295] As explained in Figure 1, the gate terminal gm, emitter terminal em, and O electrode terminal of transistor 117m, and the emitter terminal es, gate terminal gs, and P electrode terminal of transistor 117s are electrically isolated and configured to be floating by the circuit configuration of the semiconductor device testing apparatus of the present invention. Therefore, the potential of each terminal is determined by the determination of the potential of the N electrode terminal, etc. Furthermore, when the potential of the N electrode terminal, etc. changes, the potentials of the gate terminal gm, emitter terminal em, and O electrode terminal of transistor 117m, and the emitter terminal es, gate terminal gs, and P electrode terminal of transistor 117s shift. Therefore, the potential of each terminal of transistor 117 is maintained at a normal potential or shifted to a normal potential or a predetermined potential.

[0296] The function of maintaining or shifting the potential of each terminal of transistor 117 to a normal potential is particularly effective in configurations where transistors 117m and 117s are stacked in multiple stages, as shown in the semiconductor element component 117 in Figure 1.

[0297] In particular, the potential of the gate signal Vsgs input to the gate terminal gs of transistor 117s needs to be generated with reference to the potential of the O electrode terminal. For example, in the present invention, the gate driver circuit 113s is isolated from the input signal. Therefore, even if the potential of the O electrode terminal fluctuates, a predetermined signal level of the gate signal sgs can be input to the gate terminal gs of transistor 117s.

[0298] As shown in Figures 23 and 24, the electrode terminal 226a (N electrode terminal) of transistor 117 and the fork plug 205c are connected by a connecting wire 211c. The electrode terminal 226c (O electrode terminal) of transistor 117 and the fork plug 205h are connected by a connecting wire 211b. The electrode terminal 226a (P electrode terminal) of transistor 117 and the fork plug 205e are connected by a connecting wire 211a.

[0299] The fork plug 205c is inserted through the opening 216 of the partition wall 214. The fork plug 205c inserted through the opening 216 is mated (caught) with the conductor plate 204b of the switch circuit board 201d. The fork plug 205b is connected to the conductor plate 204b, which is at the ground potential (AGND) of the power supply unit 132.

[0300] The fork plug 205h is inserted through the opening 216 of the partition wall 214. The fork plug 205h inserted through the opening 216 is mated (caught) with the conductor plate 204f of the switch circuit board 201c. The fork plug 205g is connected to the conductor plate 204f, and the fork plug 205g is connected to the fork plug 205f which is mated with the conductor plate 204a of the switch circuit board 201d.

[0301] The potential of the O electrode terminal of transistor 117 is determined when the switch circuit 124d on the switch circuit board 201d is turned on, and the potential of the conductor plate 204f is determined by the fork plug 205g. The potential of the O electrode terminal determines the potential of the emitter terminal es of transistor 117s. The emitter terminal es of transistor 117s is connected to the sample connection circuit 203s1.

[0302] In the circuit configuration of sample connection circuit 203s1, the transistor is in a floating state. Therefore, the gate signal sgs applied to the gate terminal gs of transistor 117s is the amplitude value of the signal referenced to the potential of the emitter terminal es, and thus transistor 117s is well controlled on and off. Even if the potential of the O electrode terminal fluctuates, the gate signal sgs of transistor 117s will be the amplitude value of the signal referenced to the potential of the emitter terminal es.

[0303] The fork plug 205a is connected to the power output terminal of the power supply unit 132. The potential of the O electrode terminal of transistor 117 is determined by the current Id output by the power supply unit 132 when the switch circuit 124c on the switch circuit board 201c is turned on.

[0304] The potential of the emitter terminal es of transistor 117s is determined by the potential of the O electrode terminal. The emitter terminal es of transistor 117s is connected to sample connection circuit 203s1. Also, the terminal of diode Ds is connected to sample connection circuit 203s2.

[0305] In the circuit configurations of sample connection circuits 203s1 and 203s2, the transistors are in a floating state. Therefore, the gate signal sgs applied to the gate terminal gs of transistor 117s is the amplitude value of the signal referenced to the potential of the emitter terminal es, so transistor 117s is well controlled on and off. Also, the potential levels of the terminals of diode Ds (cathode terminal ks, anode terminal as) are basically set by the potential of the O electrode terminal.

[0306] Even if the potential of the O electrode terminal fluctuates, the gate signal sgs of transistor 117s will have an amplitude value based on the potential of the emitter terminal es. Furthermore, the potential levels of the diode Ds terminals (cathode terminal ks, anode terminal as) will remain stable.

[0307] The fork plug 205e is inserted through the opening 216 of the bulkhead 214. The fork plug 205e inserted through the opening 216 is mated (caught) with the conductor plate 204d of the switch circuit board 201b. A fork plug 205d is connected to the conductor plate 204c, and the output voltage of the power supply unit 132 is applied to it.

[0308] The potential of the P electrode terminal of transistor 117 is determined when the switch circuit 124b on the switch circuit board 201b is turned on, and the potential of the conductor plate 204d is determined by the fork plug 205e. The potential of the P electrode terminal determines the potential of the collector terminal cs of transistor 117s. In addition, the potential of the emitter terminal es is determined by the signal level applied to the gate terminal gs of transistor 117s.

[0309] Transistor 117s is connected to sample connection circuits 203s1 and 203s2. The circuit configuration of sample connection circuits 203s1 and 203s2 is in a floating state. Transistor 117m is connected to sample connection circuits 203m1 and 203m2. The circuit configuration of sample connection circuits 203m1 and 203m2 is in a floating state.

[0310] The gate signal sgs applied to the gate terminal gs of transistor 117s is the amplitude value of the signal with reference to the potential of the emitter terminal es. The gate signal sgm applied to the gate terminal gm of transistor 117m is the amplitude value of the signal with reference to the potential of the emitter terminal em.

[0311] The potential state of fork plugs 205e, 205h, and 205c fluctuates depending on the operating state of the power supply unit 132 and the on / off state of the switch circuit 124 on the switch circuit board 201.

[0312] In the semiconductor device testing apparatus and testing method of the present invention, the circuit configuration of the sample connection circuit 203 is configured to allow for isolation and floating states. The potential states of the fork plugs 205e, 205h, and 205c can be controlled well even if the operating state of the power supply unit 132 or the on / off state of the switch circuit 124 on the switch circuit board 201 fluctuates.

[0313] Furthermore, the Vi voltage (Vis voltage, Vim voltage) and Ve (Vem voltage, Ves voltage) can be reliably acquired or measured. In addition, the Vc voltage (Vcs voltage, Vcm voltage) can be set to a predetermined value, and a specified constant current can be stably applied to the diode D (diode Ds, diode Dm). Moreover, the leakage current at the gate terminal, measured by the terminal voltage of the variable resistor circuit 125, is stable and unaffected by potential fluctuations in the gate signal line.

[0314] Fork plugs 205e, 205h, and 205c are provided on each transistor 117 being tested and are connected to the conductor board 204 of the switch circuit board 201. The switch circuit board 201 to which it is connected varies depending on the test conditions, test content, etc., and may need to be changed. This change is easily made by changing the fork plug 205 inserted into the opening 216 of the partition wall 214.

[0315] The potential of each terminal of the transistor 117 is determined by the connection of the conductor plate 204 and the fork plug 205 and the operation of the power supply 132. In this invention, since the circuit configuration of the sample connection circuit 203 is configured to be in an insulated state and a floating state, even if a potential fluctuation occurs by changing the connection of the fork plug 205, the terminal potential of the transistor 117 will shift by the amount of the potential fluctuation, and the test state will not change.

[0316] As shown in Figures 2 and 23, a switch circuit 124b is placed between the conductor plates 204d and 204c of the switch circuit board 201b, short-circuiting the space between the conductor plates 204d and 204c. By short-circuiting, the current Id output by the power supply circuit 121 is supplied to the transistor 117 as a test current Id.

[0317] A switch circuit 124a is positioned between conductor plates 204i and 204j on the switch circuit board 201a. When the switch circuit 124a is turned on, it short-circuits the conductor plates 204i and 204j. This short-circuit causes the current Id output by the power supply circuit 121 to flow to ground as a discharge current Im', short-circuiting the channels of transistor 117 (between the P electrode terminal and the N electrode terminal). Because the channels are short-circuited, no overvoltage or overcurrent is applied to transistor 117.

[0318] A switch circuit 124c is positioned between conductor plates 204e and 204f on the switch circuit board 201a. A switch circuit 124d is positioned between conductor plates 204ea and 204b on the switch circuit board 201d.

[0319] When switch circuits 124c and 124d are turned on, the current Id output by the power supply circuit 121 flows to ground as a discharge current Im, and the channels of transistor 117 (P electrode terminal - N electrode terminal) are short-circuited. Because the channels are short-circuited, no surge voltage or transient current is applied to transistor 117.

[0320] As shown in Figure 24, the fork plug 205c is inserted through the opening 216 of the partition wall 214 provided between chamber C and chamber B, and the conductor plate 204b and the fork plug 205c are connected.

[0321] The fork plug 205h is inserted through the opening 216 of the partition wall 214 located between chamber C and chamber B, connecting the conductor plate 204f and the fork plug 205f. The fork plug 205e is inserted through the opening 216 of the partition wall 214 located between chamber C and chamber B, connecting the conductor plate 204d and the fork plug 205e.

[0322] Chamber C contains the transistor 117 to be tested and the heating / cooling plate 134, while Chamber B contains the drive circuit and other components for testing the transistor 117 (see Figure 28, etc.). Chambers C and B are separated by a partition wall 214, so even if refrigerant leaks from the heating / cooling plate 134, it will not leak into Chamber B. A leak sensor (not shown) is placed around the heating / cooling plate 134. In addition, a groove is formed to discharge any leaked refrigerant outside the test apparatus.

[0323] The partition wall 214 is equipped with an electromagnetic shielding plate, an electrostatic shielding plate, or an electromagnetic shielding mesh, an electrostatic shielding mesh, etc., to prevent the drive circuit system of chamber B from malfunctioning due to noise generated from the transistor 117.

[0324] Because the current flowing through the transistor 117 being tested is large, several hundred amperes, the connecting wires 211 used are also thick. As a result, the connecting wires 211 lack flexibility and are rigid, making it difficult to change their connections.

[0325] In the semiconductor device testing apparatus of the present invention, the switch circuit board 201 can be connected via a fork plug 205 inserted from chamber C. Therefore, changing the connection to the switch circuit board 201 used depending on the test conditions of the transistor 117 does not require changing the wiring of the connection wiring 211, and only the position of the opening 216 into which the fork plug 205 is inserted needs to be changed. Furthermore, the switch circuit board 201 only requires changing the position of the connector 213 that connects to the motherboard 207.

[0326] Even if there are multiple transistors 117 being tested, the application is still satisfactory even if there is only one switch circuit board 201a. This is because the output current Id of the power supply circuit 121 can be passed to the ground line as Im'.

[0327] The switch circuit board 201b requires the same number of transistors 117 to be tested. For example, if there are 12 transistors 117 to be tested, it is preferable to prepare 12 switch circuit boards 201b. It is also cost-effective to make the switch circuit boards 201 identical in specifications.

[0328] Multiple transistors and other components are mounted on the switch circuit board 201 to form the switch circuit 124. The more switch circuits 124 there are, the smaller the impedance that short-circuits the two conductor boards 204.

[0329] Figures 25 and 26 illustrate the state in which the fork plug 205 is inserted into the opening 216 of the bulkhead 214. Figure 25 is a view from the front of the bulkhead 214, and Figure 26 is a view from the back of the bulkhead 214. In Figures 25 and 26, the switch circuit board 201 and other components have been omitted to avoid complexity in the diagrams. The fork plug 205 is inserted through the opening 216 and electrically connected to the conductor plate 204.

[0330] In each drawing, such as Figure 23, one switch circuit 124 is shown on the switch circuit board 201. However, in reality, multiple switch circuits 124 are arranged between the conductor plates 204.

[0331] For example, Figure 24 shows a switch circuit board 201d with two switch circuits 124d (switch circuit 124d, switch circuit 124). The diagram illustrates a state in which multiple switch circuits 124d are arranged on the switch circuit board 201.

[0332] By arranging multiple switch circuits 124, the conductor plates 204 (for example, between conductor plate 204c and conductor plate 204e) can be short-circuited with low resistance. If each switch circuit 124 is composed of a transistor, an ON voltage is applied simultaneously to the gate terminals of multiple transistors, turning on the switch circuit 124.

[0333] The heat generated by the switch circuit 124 is dissipated to the conductor plate 204. Additionally, a heat sink is attached to the switch circuit 124. The ground terminal of the switch circuit 124 is connected to the ground of the switch circuit board 201, and heat is also dissipated through the copper foil of the ground.

[0334] Figures 8 and 15 are explanatory diagrams of the semiconductor device testing apparatus and the testing method or testing state of semiconductor device components according to the present invention. The present invention performs testing of semiconductor device components 117 using either the state or method shown in Figures 8 and 15. Alternatively, the semiconductor device components 117 can be tested by sequentially performing either the state or method shown in Figures 8 and 15, or by performing them randomly.

[0335] Figures 8 and 15 illustrate the operation or control of the semiconductor element component 117. In actual testing, the constant current Id flowing through the semiconductor element component 117 (transistor 117) or the voltage applied to the P electrode terminal is set or varied.

[0336] In Figures 8 and 15, the on-voltage or off-voltage is set or applied as shown in Figure 18(a). However, the Vt voltage applied during the tn2 and tn1 periods is set according to the semiconductor component 117 being tested. The control of other signals is performed as shown in Figure 18.

[0337] Figure 8(a) is an explanatory diagram of a method (state) in which the terminals of transistor 117 (P electrode terminal - N electrode terminal) are short-circuited to discharge the charge and prevent surge voltage and transient current from flowing through transistor 117.

[0338] An off voltage, the gate signal Vsgm, is applied to the gate terminal gm of transistor 117m, turning transistor 117m off. An off voltage, the gate signal Vsgs, is applied to the gate terminal gs of transistor 117s, turning transistor 117s off. Short circuits 137s and 137m are turned off (open). Switch circuits 124c and 124d are turned on (closed).

[0339] In the above state, transistors 117m and 117s are inactive, the terminals of transistor 117 (P electrode terminal - N electrode terminal) are short-circuited, and a short-circuit current Im flows through switch circuits 124c and 124d. Therefore, the charge between the terminals of transistor 117 (the charge between the terminals of power supply 132) is discharged.

[0340] As explained in Figure 2, it goes without saying that it is also possible to turn on switch circuit 124a and allow current Im' to flow without turning on switch circuits 124c and 124d. Furthermore, it goes without saying that it is also possible to turn on switch circuits 124c, 124d, and 124a and allow currents Im and Im' to flow. A resistor may be placed in the path through which current Im or current Im' flows to control the state in which currents Im and Im' flow.

[0341] Figure 8(b) shows the state in which the short circuit 137s is turned on to put transistor 117s into a diode connection state, and transistor 117m is turned on to flow a constant current Id through semiconductor component 117 and test the semiconductor component 117.

[0342] An on-voltage or off-voltage is periodically or intermittently applied as a gate signal Vsgm to the gate terminal gm of transistor 117m, thereby controlling transistor 117m to be in an on state or an off state.

[0343] The short circuit 137s connected between the gate terminal gs and emitter terminal es of transistor 117s is turned on, and transistor 117s is put into a diode-connected state. Switch circuits 124c and 124d are turned off (open).

[0344] A constant current Id flows between the P electrode terminal and the N electrode terminal of the semiconductor element component 117. The transistor 117m is controlled on / off by a gate signal Vsgm applied to the gate terminal gm of the transistor 117m, and the semiconductor element component 117 is tested.

[0345] Figure 8(c) shows the state in which transistor 117m is connected to a diode, transistor 117s is turned on, and a constant current Id is passed through semiconductor component 117 to test the semiconductor component 117.

[0346] The gate terminal g of transistor 117s is periodically or intermittently subjected to an on-voltage or off-voltage as a gate signal Vsgs, thereby controlling transistor 117s to be in an on-state or off-state.

[0347] The short circuit 137m connected between the gate terminal gm and emitter terminal em of transistor 117m is turned on, and transistor 117m is put into a diode state. Switch circuits 124c and 124d are turned off (open). A constant current Id flows between the P electrode terminal and N electrode terminal of semiconductor component 117.

[0348] The semiconductor component 117 is tested by controlling the on / off state of the transistor 117s using the gate signal Vsgs applied to the gate terminal g of the transistor 117s.

[0349] Figure 8(d) shows the transistor 117s being turned on and the transistor 117m being turned off. The gate terminal gs of transistor 117s is periodically or intermittently subjected to an on-voltage or off-voltage as the gate signal Vsgs. Transistor 117m is controlled to be in the off state.

[0350] The short circuit 137 connected between the gate terminal g and emitter terminal e of transistors 117m and 117s is turned off (open). Switch circuit 124c is turned off, and switch circuit 124d is turned on (closed).

[0351] A current Id flows from the P electrode terminal to the channel of the transistor 117s in the semiconductor element component 117, and this current Id flows through the switch circuit 124d. The transistor 117s is turned on and off by the gate signal Vsgs applied to the gate terminal g of the transistor 117s, and the semiconductor element component 117 is tested.

[0352] In the embodiments shown in Figures 8(d) and 15(d), even if an on-voltage is applied to the gate terminal gm of transistor 117m, if the terminal voltage of the switch circuit 124d is lower than the channel voltage Vcem of transistor 117m, the tests shown in Figures 8(d) and 15(d) can be performed equivalently even if transistor 117m is turned on. Performing the test with transistor 117m turned on, as shown in Figures 8(d) and 15(d), is also an effective test for semiconductor component 117.

[0353] Figure 8(e) shows transistor 117m being turned on and transistor 117s being turned off. The gate terminal gm of transistor 117m is periodically or intermittently subjected to an on-voltage or off-voltage as the gate signal Vsgm. Transistor 117s is controlled to be in the off state.

[0354] The short circuit 137 connected between the gate terminal g and emitter terminal e of transistors 117m and 117s is turned off (open). Switch circuit 124d is turned off (open), and switch circuit 124d is turned on (closed).

[0355] A current Id flows from the P electrode terminal to the switch circuit 124c in the semiconductor element component 117, and a current Id also flows between the channels of the transistor 117m. The transistor 117m is switched on and off by a gate signal Vsgm applied to the gate terminal gm of the transistor 117m, and the semiconductor element component 117 is tested.

[0356] In the embodiments shown in Figures 8(e) and 15(e), even if an on-voltage is applied to the gate terminal g of transistor 117s, if the terminal voltage of the switch circuit 124c is lower than the channel voltage Vces of transistor 117s, the tests shown in Figures 8(e) and 15(e) can be performed equivalently even if transistor 117s is turned on.

[0357] In Figures 8(e) and 15(e), testing with transistor 117s turned on also allows surge voltage and transient current to flow through semiconductor component 117, enabling more stringent testing and proving effective as a test for semiconductor component 117.

[0358] Figure 8(f) shows the state in which a gate signal is applied to the gate terminals g (gate terminal gm, gate terminal gs) of transistors 117m and 117s, and a constant current Id is passed through the semiconductor device 117 to test the semiconductor device 117.

[0359] An on-voltage or off-voltage is periodically or intermittently applied to the gate terminal gs of transistor 117s and the gate terminal gm of transistor 117m. Transistors 117s and 117m are controlled to be either on or off.

[0360] The short circuit 137 connected between the gate terminal g and emitter terminal e of transistors 117m and 117s is turned off. Switch circuits 124c and 124d are turned off (open). A constant current Id flows between the P electrode terminal and the N electrode terminal of semiconductor component 117.

[0361] By controlling transistors 117m and 117s so that they do not turn on simultaneously, or so that they turn on for only a short period of time, surge voltages and transient currents flow through the semiconductor component 117, allowing for more stringent testing.

[0362] The semiconductor component 117 is tested by selecting or combining the tests shown in Figures 8(a) to 8(f) above. Examples of combinations include performing the tests in Figures 8(a) to 8(f) in order, or performing the tests in Figures 8(a) to 8(f) randomly.

[0363] The following describes the test method for the semiconductor device of the present invention. As explained in Figure 1, a constant current Ic (Ics, Icm) for measuring temperature is supplied to the diode D (diode Ds, diode Dm) of the transistor 117. Furthermore, when acquiring temperature information Tc using thermocouple 314, circuits such as those for supplying a constant current Ic, and their operation, are not required.

[0364] The voltage detection circuit 129 acquires or measures the voltage across the terminals of diode D. The voltage detection circuit 129 has a differential amplifier (subtractor) circuit. The voltage Vi (voltages Vim, voltages Vis) input to the voltage detection circuit 129 is converted by the differential amplifier (subtractor) circuit, etc., into a voltage Vi (voltages Vim, voltages Vis) referenced to the circuit ground.

[0365] The current detection circuit 128 has a differential amplifier (subtractor) circuit. The voltage Ve (voltage Vem, voltage Ves) input to the current detection circuit 128 is converted by the differential amplifier (subtractor) circuit, etc., into a voltage Ve (voltage Vem, voltage Ves) referenced to the circuit ground.

[0366] As described above, the current detection circuit 128 and the voltage detection circuit 129 are isolated from the circuit power supply voltage (floating with respect to the circuit power supply voltage), and the current detection circuit 128 and the voltage detection circuit 129 each have a differential amplifier (subtractor) circuit, which acquires the voltage (Ve, Vi).

[0367] Therefore, voltages (Ve, Vi) can be measured stably and accurately. Furthermore, the diodes D (Ds, Dm) and transistors 117 (transistor 117m, transistor 117s) will not be damaged. Additionally, there is no noise generation during testing, and the test conditions remain stable.

[0368] The terminal voltage Vi of diode D is buffered and output. The terminal voltage Vi is applied to a temperature measurement circuit (not shown) on the device control circuit board 209. The temperature measurement circuit (not shown) obtains temperature information Tj from the terminal voltage Vi and transfers it to the controller circuit board. The temperature information Tj is output from the connector 213 of the device control circuit board 209 to the motherboard 207 and sent to the controller circuit board 111 (see Figure 28).

[0369] The gate driver circuit 113 outputs a gate signal Vsg (Vsgs, Vsgm) that turns on the gate of transistor 117 at a set frequency and a set on-voltage time. As an example, as shown in Figure 18(a), the on / off period of transistor 117 is tcycle, the on time is ton, and the off time is tooff.

[0370] In this specification and in the drawings, a semiconductor element component 117 is illustrated as an example of a transistor 117s and a transistor 117m connected in series. Figure 18 also illustrates the operation of transistor 117m or transistor 117s, and the operation of diode Ds or diode Dm.

[0371] During the tn2 period before transistor 117 is turned on, the Vt voltage is set to a negative value than the off voltage. Similarly, during the tn1 period after transistor 117 is turned off, the Vt voltage is set to a negative value than the off voltage. The Vt voltage is a voltage lower than 0(V) and higher than -4(V). Therefore, Vt is a voltage that is greater than or equal to -4(V) and lower than 0(V). Note that if transistor 117 is SiC, the off-voltage is set to Vt voltage, and if it is an IGBT, the off-voltage is set to 0 (V).

[0372] As described above, the semiconductor device testing apparatus of the present invention is configured so that the off-voltage supplied to the transistor 117 can be changed depending on the type of transistor 117 being tested.

[0373] Specifically, as shown in Figures 1 and 11, the off-voltage is configured to be selectable between 0 (V) and Vt voltage using a voltage selection circuit 302 (voltage selection circuit 302m, voltage selection circuit 302s). Voltage selection is performed by the controller circuit board 111 or the device control circuit board 209.

[0374] When the Vt voltage is applied, the temperature of transistor 117 is measured by setting St1 (St2) to a high level. A constant current Ic is passed through diode Di during the period when the Vt voltage is applied. Also, a constant current Ic is passed through St1 (St2) during the period when it is at a high level.

[0375] By applying the Vt voltage to the gate terminal of transistor 117, the off state of transistor 117 is stabilized, enabling stable measurement of temperature information Tj. Furthermore, noise is less likely to be introduced during the measurement of temperature information Tj, improving the measurement accuracy of Tj. Additionally, the fall rate time of the gate signal Vsg is increased, shortening the uncertainty time between the on / off state of transistor 117.

[0376] By applying the Vt voltage to the gate terminal of transistor 117, the leakage current of transistor 117 is reduced, improving the measurement accuracy of the Vi voltage and stabilizing the measurement.

[0377] The gate signal Vgs is set to the Vt voltage during the time intervals of tn1 and tn2. For example, the time intervals of tn1 and tn2 are between 0.2ms and 2ms. Transistor 117 is turned off at 0(V).

[0378] Therefore, three voltages, Vg, 0(V), and Vt, are applied to the gate terminal g of transistor 117. During the period when Vt is applied, current is passed through the transistor's diode Di to measure the temperature information Tj.

[0379] In Figure 18, as an example, Vg is set as the on-voltage and 0(V) or Vt as the off-voltage. As shown in Figure 18(a), a negative voltage may be applied before the on-voltage Vg is applied, and after changing from the on-voltage to the off-voltage, it may be set to 0(V). As shown in Figure 18(a), the period for applying the Vt voltage may be eliminated, and a 0(V) voltage may be applied. In this invention, the values ​​or control of the on-voltage and off-voltage are set appropriately according to each case.

[0380] The transistor 117 is switched on and off based on the ON signal voltage Vsg shown in Figure 18(a). The gate driver circuit 113 is controlled by the device control circuit board 209. The power supply circuit 121 outputs a constant current Id, which is supplied as Id to the transistor 117.

[0381] The Vsg signal voltage output from the gate driver circuit 113 causes transistor 117 to switch on and off, and a current Id flows between the channels of transistor 117 while transistor 117 is on.

[0382] The gate driver circuit 113 has a variable resistor circuit 125 at its output. The value of the variable resistor circuit 125 is configured to be set to a predetermined value or in steps between 0 (Ω) and 500 (Ω). The value of the variable resistor circuit 125 may be set by a control signal from the controller circuit board 111 (controller 111) while observing the waveform at the gate terminal g.

[0383] A resistor R (not shown) may be placed between the gate terminal g and the emitter terminal e or collector terminal c of transistor 117 (transistor 117s, transistor 117m). By adjusting the value of resistor R, the slope angle of the rising and falling voltage waveforms of the gate signal can be adjusted.

[0384] When the value of the variable resistor circuit 125 is large, the slope of the rising / falling waveform of the gate signal of transistor 117 applied to the gate terminal of transistor 117 becomes gentler.

[0385] On the other hand, if the resistance value of the variable resistor circuit 125 is small, the slope of the rising / falling waveform of the gate signal becomes steeper. By changing the value of the variable resistor circuit 125 or setting it to a predetermined value, the on-time of the transistor 117 (transistor 117m, transistor 117s) can be adjusted.

[0386] The gate driver circuit 113 can set the slope of the rising waveform (rising time Tr) and the slope of the falling waveform (falling time Td) for the gate voltage applied to the gate terminal g of transistor 117. By adjusting the rising time Tr and the falling time Td separately, the on-time of transistor 117 (transistor 117m, transistor 117s) can be arbitrarily adjusted.

[0387] The resistance value of the variable resistor circuit 125 is set by the controller circuit board 111 (controller 111). The setting is not limited to a constant value. The slope of the rising waveform (rising time Tr) and the falling waveform (falling time Td) of the gate driver circuit 113 may be changed. The resistance value at the rising and falling of the gate signal may also be changed. Furthermore, the resistance value may be controlled in real time. By controlling the variable resistor circuit 125, the on-time of the transistor 117 (transistor 117m, transistor 117s) is stabilized.

[0388] If the resistance value at the rising edge of the gate signal is reduced, the waveform of the on-voltage applied to the gate terminal g of transistor 117 (transistor 117m, transistor 117s) becomes steeper, and transistor 117 (transistor 117m, transistor 117s) turns on quickly. If the resistance value at the rising edge of the gate signal is increased, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes gentler, and transistor 117 turns on more slowly.

[0389] If the resistance value at the falling edge of the gate signal is reduced, the waveform of the on-voltage applied to the gate terminal g of transistor 117 (transistor 117m, transistor 117s) becomes steeper, and transistor 117 turns off quickly. If the resistance value at the falling edge of the gate signal is increased, the waveform of the on-voltage applied to the gate terminal g of transistor 117 becomes gentler, and transistor 117 turns off more gradually.

[0390] As described above, the value of the variable resistor circuit 125 connected to the gate terminal of transistor 117 (transistor 117m, transistor 117s), or the rise time / fall time of the gate driver circuit 113 can be controlled, adjusted, or set.

[0391] Therefore, the gate driver circuit 113 can change or modify the inrush current Is and surge voltage Vs generated in the transistors 117 (transistors 117m and 117s).

[0392] It goes without saying that the operation of transistor 117 (transistor 117m, transistor 117s) not only controls the on-voltage of the gate terminal g of transistor 117 (transistor 117m, transistor 117s), but also changes or sets the value of the constant current Id or voltage Vm supplied to transistor 117 (transistor 117m, transistor 117s) by the power supply circuit 121. The variable resistor circuit 125 on the output side of the gate driver circuit 113 is controlled by the controller circuit board 111.

[0393] The gate signal Vsg output by the gate driver circuit 113 shown in Figure 18 has its period time tcycle, on time ton, or off time toff controlled by the gate signal control circuit 112, and the gate signal is applied to the gate terminal of transistor 117. The gate signal control circuit 112 is controlled by the controller circuit board 111 (controller 111).

[0394] In Figure 1, the resistance value of the variable resistor circuit 125 of the gate driver circuit 113 is shown as variable, but this is not the only option. For example, the variable resistor circuit 125 could be an external resistor, and the resistor could be connected to the gate terminal g of transistor 117 (transistor 117m, transistor 117s) via a connector (not shown).

[0395] The value of the connected resistor is set by observing the waveform of the gate terminal g of transistor 117 (transistor 117m, transistor 117s) and the waveform of the channel current Id.

[0396] In Figures 1 and 11, a constant current circuit consisting of a constant current setting circuit 130, etc., is connected to the cathode terminal k (cathode terminal ks, cathode terminal km) and anode terminal a (anode terminal as, anode terminal am) of diode D (diode Ds, diode Dm) of transistor 117. The constant current circuit flows a predetermined constant current Ic (constant current Ics, constant current Icm). The constant current Ic is used to monitor the temperature of transistor 117 (transistor 117s, transistor 117m).

[0397] For the purposes of this specification, IGBTs are used as examples, so the terminals of transistor 117 (transistor 117m, transistor 117s) are the gate terminal g, the collector terminal c, and the emitter terminal e. In the case of a MOS transistor 117, the terminals of transistor 117 (transistor 117m, transistor 117s) are the gate terminal g, the drain terminal d, and the source terminal s.

[0398] Diode D may also be a diode on another semiconductor chip mounted on the semiconductor chip on which transistor 117 (transistor 117m, transistor 117s) is formed.

[0399] Diode D may utilize a diode (parasitic diode) that is formed incidentally during the formation of transistor 117. The parasitic diode is formed incidentally due to the layer structure of transistor 117. Structurally, diode D is formed near the channel portion of transistor 117.

[0400] Diode D can be any element that does not operate when transistor 117 is operating. For example, it is not limited to a diode; a transistor can also be used in diode connection.

[0401] This method is not limited to semiconductors such as diodes; it can also use devices such as resistors. By applying a constant current Ic to a resistor or other device, the terminal voltage of the resistor is measured. This voltage is then measured as voltage Vi.

[0402] As described above, the element used to acquire temperature can be a semiconductor device such as a diode D, or a resistor, or any other device. In other words, any device that can acquire a voltage value by passing an electric current through it, or a device that can acquire a current value by applying a voltage, can be used.

[0403] The resistance of diode D changes due to the heat generated by transistor 117. When a constant current Ic is passed through diode D, the voltage across the terminals of diode D changes in proportion to the change in its resistance. By monitoring or measuring the voltage across the terminals, the temperature of transistor 117, the change in temperature, and the degradation state of transistor 117 can be determined. In order to monitor the temperature of transistor 117 from the voltage of diode D, it is necessary to obtain the temperature coefficient beforehand.

[0404] The temperature coefficient is determined by setting transistor 117 to a predetermined temperature in a constant temperature bath, passing a constant current Ic through diode D, and measuring the terminal voltage of diode D. By changing the predetermined temperature and measuring the terminal voltage of diode D, the terminal voltage of the diode as a function of temperature can be obtained. Therefore, the temperature coefficient K of transistor 117 can be determined from the terminal voltage of diode D as a function of temperature.

[0405] The temperature coefficient K may vary between different production lots of transistor 117, but generally it exhibits a constant value across production lots. Therefore, by sampling a transistor 117 from each production lot and determining its temperature coefficient K, this value can be used for other transistors 117.

[0406] To obtain the temperature coefficient K accurately, the temperature coefficient K of each transistor 117 should be measured and tested individually, even within the same lot. The measurement of the temperature coefficient K is not limited to the use of a constant temperature chamber. For example, the temperature coefficient K can be obtained by changing the temperature of the water flowing through the heatsink on which the transistor 117 is mounted.

[0407] During testing, a test current Id is intermittently applied to transistor 117. Immediately after the test current Id is turned off, or after a predetermined short period of time has elapsed since then, a constant current Ic for temperature measurement is applied.

[0408] To prevent transistor 117 from overheating due to the constant current Ic, or to ensure that the constant current Ic has no effect, the constant current Ic is set to a value that is sufficiently smaller than the constant current Id flowing through the channel of transistor 117. The constant current Id is set to a current that does not generate enough heat to affect temperature measurement.

[0409] Specifically, the constant current Ic is set to 1 / 1000 or less of the current Id that flows through transistor 117 during testing. Preferably, the current Ic that flows through transistor 117 is 1 × 10⁻⁶ of the current Id. 6 1 or more 1 x 10 4 Set it to 1 or less. The constant current Ic should be between 0.1mA and 100mA.

[0410] The channel current Id is varied, and the voltage across diode D is measured to determine the temperature coefficient K. The determined temperature coefficient K is stored in a temperature measurement circuit (not shown) or a controller circuit board 111.

[0411] When measuring temperature, if diode D is formed on the same chip as transistor 117, the saturation voltage may change due to the gate signal Vsg. It is preferable that the gate signal Vsg be zero (0) voltage or negative voltage.

[0412] As shown in Figure 22, based on the temperature information Tj, the controller circuit board 111 (controller 111) controls the chiller 136. The chiller 136 adjusts the temperature of the circulating water (circulating solution) and adjusts the temperature of the heating and cooling plate 134.

[0413] In the embodiments described above, the temperature coefficient K was determined in advance, but the semiconductor testing method of the present invention is not limited to this. The temperature information Tj of transistor 117 is determined from the temperature coefficient and the diode terminal voltage, etc. The transistor 117 is positioned in close contact with the heating / cooling plate 134, and the temperature of the heating / cooling plate 134 is configured to be approximately the same as that of the transistor 117.

[0414] The controller circuit board 111 (controller 111) controls the chiller 136 to set the temperature of the heating and cooling plate 134 to a predetermined temperature, applies a constant current Ic to the transistor 117, and measures the terminal voltage of the diode D.

[0415] The temperature coefficient K is determined from the measurement results. The temperature of the heating / cooling plate 134 is set to multiple temperatures, and the temperature coefficient K is determined at each temperature to improve the accuracy of the temperature coefficient value.

[0416] The temperature coefficient K is determined by heating the transistor 117 to a predetermined temperature using the heating and cooling plate 134, passing a constant current Ic through the diode D, and measuring the terminal voltage. By changing the predetermined temperature and measuring the terminal voltage of the diode D, the terminal voltage of the diode D as a function of temperature can be obtained. Therefore, the temperature coefficient K of the transistor 117 can be determined from the terminal voltage of the diode D as a function of temperature. The temperature measurement circuit (not shown) obtains the temperature information Tj of the transistor 117 being tested from the stored temperature coefficient K and voltage Vi.

[0417] The requested temperature information Tj is sent to the controller circuit board 111 (controller 111). When the temperature information Tj exceeds a predetermined set value, the controller circuit board 111 (controller 111) determines that the transistor 117 is in a predetermined stress state or a degraded state, and takes action such as changing the test control or stopping the test.

[0418] In testing, the main area where transistors degrade is often the junction within transistor 117. The semiconductor itself does not degrade; rather, the junction (bonding, die bond, etc.) of transistor 117 deteriorates, increasing the resistance of the junction. This increased resistance leads to a higher channel voltage Vce, causing heat generation and raising the temperature of transistor 117.

[0419] When semiconductor component 117 (transistor 117) deteriorates, it is often due to deterioration of the gate oxide film (insulating film) of transistor 117. When gate oxide film deterioration occurs, a short circuit occurs in the oxide film (insulating film), and the inter-channel voltage Vce decreases. Alternatively, transistor 117 turns off, no current flows through transistor 117, and the inter-channel voltage Vce rises to the maximum value of the power supply voltage.

[0420] The temperature information Tj initially fluctuates between the lowest temperature T1 and the highest temperature T2. When the test stresses transistor 117, the inter-channel Vce voltage of transistor 117 changes, and the temperature information Tj usually increases. Therefore, as shown in Figure 19(c), the lowest temperature rises above temperature T1, and the highest temperature approaches the temperature information Tm(Tjmax). In the semiconductor testing method of the present invention, the test is terminated under one of the following conditions. • If the temperature information Tj falls outside the specified range. • If the channel voltage Vce falls outside the specified voltage range. • When the thermal resistance falls outside the specified range.

[0421] In Figure 18(d), St2 is a timing signal that causes current Ic to flow through diode D (diode Ds, diode Dm). When St2 is at a high level, current flows through diode D of transistor 117. The voltage detection circuit 129 acquires the terminal voltage of diode D, and the temperature measurement circuit (not shown) converts the terminal voltage into temperature information Tj. The temperature information Tj is sent to the controller circuit board 111 (controller 111), and the controller circuit board 111 (controller 111) performs a test of transistor 117 (semiconductor element component 117) according to the temperature information Tj.

[0422] Current Id is the current flowing through transistor 117 under test, and is the current output by power supply circuit 121. St1 and St2 are the time for which the measurement current is passed through the temperature measuring diode, or the time for temperature measurement.

[0423] Figure 18(e)Ssa shows the on / off signals of switch circuit 124a or switch circuit 124c and switch circuit 124d, and Figure 18(f)Sab shows the on / off signal of switch circuit 124b. Alternatively, switch circuit 124a may be removed, and switch circuits 124c and 124d may be turned on simultaneously. Von is the voltage that turns on the switch circuit 124, and 0(V) is the voltage that turns off (opens) the switch circuit 124.

[0424] In Figure 18(g), Vce is the inter-channel voltage of transistor 117 (transistor 117m, transistor 117s), and the temperature information Tj shows the measured temperature change of transistor 117 (transistor 117m, transistor 117s).

[0425] As shown in Figure 18(a), a gate signal Vsg is applied from the gate driver circuit 113 to the gate terminal g of transistor 117. The gate signal Vsg has a period time tcycle and an on-time ton. The period time tcycle and on-time ton can be set to arbitrary values ​​by the gate signal control circuit 112. The on-voltage Vg can also be set to an arbitrary voltage.

[0426] Figure 18(i)Si is a timing signal for measuring the current flowing through the variable resistor circuit 125. When Si is at a high level, the current flowing through the variable resistor circuit 125 (gate leakage current) is measured. Figure 18(c)St1 is the timing signal for passing current Ic through diode D (diode Ds, diode Dm) in the embodiment shown in Figure 1.

[0427] Figure 18(d) shows that when St2 is at a high level, current flows through the diode Ds or Dm of transistor 117. This is the case when a constant current Ic is applied to a device (diode) independent of transistor 117 to obtain temperature information Tj.

[0428] For ease of understanding, the measured temperature information Tj is explained as changing between T1 and T2, as shown in Figure 18(h). The temperature information Tj increases when current is applied to transistor 117 and decreases when the current is stopped. Furthermore, the temperature information Tj changes in accordance with changes in the characteristics of transistor 117.

[0429] Figure 18(f)Ssa shows the timing of the on / off control signal for switch circuit 124a. When Ssa is Von, switch circuit 124a closes (turns on). When it is 0, switch circuit 124a opens (turns off), and the application of current or voltage is interrupted.

[0430] Figure 18(e)Ssb shows the timing of the on / off control signal for the switch circuit Ssb. When Ssb is Von, the switch circuit Ssb closes (turns on). When it is 0, the switch circuit Ssb opens (turns off).

[0431] In Figure 18(g), Vce is the channel voltage of transistor 117 (voltage between the emitter and collector terminals). For ease of understanding, although not shown in the diagram, surge voltages and surge currents are generated when transistor 117 is switched on and off, and the Vce waveform changes in a complex manner over time due to changes in the on-resistance of transistor 117.

[0432] Three voltages, Vg, 0(V), and Vt, are applied to the gate terminal g of transistor 117. During the period when Vt is applied, current is passed through the transistor's diode D to measure the temperature information Tj. When a constant current Ic is applied to diode D, the switch circuit Ssa is turned off to control the current from the power supply circuit 121 so that it is not applied to transistor 117.

[0433] By passing a constant current Ic through diode D, the terminal voltage of diode D is obtained, and the operational amplifier circuit 116 outputs a voltage Vi corresponding to the terminal voltage. The voltage Vi is input to a temperature measurement circuit (not shown), and the temperature measurement circuit (not shown) obtains temperature information Tj corresponding to the temperature of transistor 117.

[0434] The temperature information Tj is transferred to the controller circuit board 111 (controller 111), and the controller circuit board 111 (controller 111) controls the test of the transistor 117 (semiconductor element component 117) based on the temperature information Tj, such as continuing, stopping, or changing the test conditions of the transistor 117.

[0435] Switch circuit 124 b The transistor 117 turns on after a delay of tm2 hours, following the Vsg signal becoming Vg. The tm2 hour can be changed and set by the controller circuit board 111 (controller 111).

[0436] Switch circuit 124a turns on tb2 hours before switch circuit 124b turns on. Switch circuit 124a remains on for tb1 hours after switch circuit 124b turns on. tb2 and tb1 hours can be independently changed and configured. In particular, the setting of tb1 is important. The time of tb1 should be set or changed appropriately by observing the waveform of the Vce voltage of transistor 117.

[0437] The switch circuit 124b turns off tm1 hours before the Vsg signal of transistor 117 becomes Vt. The tm1 time is configured to be changeable by the controller circuit board 111 (controller 111).

[0438] Switch circuit 124a turns on ta2 hours before switch circuit 124b turns off. Switch circuit 124a remains on until ta1 hours after switch circuit 124b turns off. ta2 hours and ta1 hours can be independently changed. In particular, the setting of ta1 is important. The time of ta1 should be set or changed appropriately by observing or measuring the waveform of the Vce voltage of transistor 117.

[0439] When the switch circuit Ssb is turned on, the output terminal of the power supply circuit 121 is short-circuited to ground (earth line), and the charge is discharged. As the charge is discharged, the terminal voltage of the power supply circuit 121 becomes 0 (V) (ground voltage). In addition, the current Id output by the power supply circuit 121 is discharged to ground as current Im. Therefore, current Id is not applied to transistor 117, and the collector voltage of transistor 117 does not rise.

[0440] The tb2 time is set by observing or measuring the time when the output voltage of the power supply circuit 121 is 0(V) or near 0(V), or when the output voltage of the power supply circuit 121 is lower than the collector voltage of the transistor 117.

[0441] At the time when the above voltage relationship reaches a predetermined value (after tb2 has elapsed), the switch circuit 124b is turned on, and the current Id from the power supply circuit 121 is applied. However, at this time, since the switch circuit 124a is on, the current Id from the power supply circuit 121 flows to ground (earth line) as current Im through the switch circuit 124a. Therefore, no constant current Id flows through transistor 117. After switch circuit 124b is turned on, and after tb1 time has elapsed, switch circuit 124a is turned off, and the test current Id is supplied to transistor 117.

[0442] As described above, by operating the switch circuits 124a and 124b, no surge voltage Vs or inrush current Is is applied to transistor 117. Alternatively, the surge voltage Vs or inrush current Is is suppressed, allowing for proper testing of transistor 117.

[0443] When the test current Id to transistor 117 is stopped, switch circuit 124a is turned on before switch circuit 124b is turned off ta2. Through switch circuit Ssa, the constant current Id output by power supply circuit 121 flows to ground as current Im or Im' and is not supplied to transistor 117.

[0444] The ta2 time is set by observing the time when the output voltage of the power supply circuit 121 is 0(V) or near 0(V), or when the output voltage of the power supply circuit 121 is lower than the collector voltage of the transistor 117.

[0445] Switch circuit 124b is turned off when the above voltage relationship reaches a predetermined value (after ta2 has elapsed). After switch circuit 124b is turned off, switch circuit 124a is turned off after ta1 time has elapsed.

[0446] As described above, by operating or controlling the switch circuits 124a and 124b in this manner, no surge voltage Vs or inrush current Is is applied to the transistor 117. Alternatively, the surge voltage Vs or inrush current Is is suppressed, allowing for proper testing of the transistor 117.

[0447] When a constant current Id is supplied to transistor 117, the temperature information Tj increases. When the constant current Id to transistor 117 stops, the temperature information Tj decreases. The temperature information Tj fluctuates between T1 and T2. If the characteristics of transistor 117 change due to the test, the temperature information Tj will gradually increase. To apply a constant current Id to transistor 117, the power supply circuit 121 is activated to apply current Id to transistor 117.

[0448] The resistance value of the variable resistor circuit 125 in the gate driver circuit 113 can also be set. By increasing the resistance value, the rising / falling waveform of the gate signal Vsg can be changed as shown by the dotted or dashed lines in Figure 19(a).

[0449] By changing or setting the gate signal Vsg, the current Id flowing through transistor 117 can also be changed as shown by the dotted or dashed lines in Figure 19(b). By changing the rising and falling waveforms of the current Id, surge voltage or inrush current can be adjusted or suppressed.

[0450] As shown in Figure 19(c), the temperature information Tj changes from a solid line to a dotted line, and then from a dotted line to a dashed line, as the characteristics of transistor 117 change during the test. The test is stopped when the temperature information Tj reaches the level of Tm. Alternatively, the test is stopped when the rate of change of the temperature information Tj reaches a predetermined value. The test conditions are also changed.

[0451] As shown in Figure 20, when the switch circuit Ssa (switch circuit 124a) is in the off state, the St1 signal is set to H and the temperature information Tj is measured. The St1 signal is set to H level when the gate signal is Vt. During the tn2 period, the St1 signal is set to H level during the tc2 period and the temperature information Tj is measured. During the tn1 period, the temperature information Tj is measured during the tc1 period.

[0452] The temperature information Tj measured during period tc2 is the temperature information Tj at the time when transistor 117 has cooled down. The temperature information Tj measured during period tc1 is the temperature information Tj immediately after the current Id to transistor 117 is stopped. The decision to stop the test, change conditions, or modify the control system will be based on the temperature information Tj measured during period tc2 and the temperature information Tj measured during period tc1.

[0453] If the temperature information Tj measured during period tc1 has a larger rate of change compared to the temperature information Tj measured during period tc2, or if there is a large difference in the absolute value between the temperature information Tj measured during period tc1 and the temperature information Tj measured during period tc2, the test will be controlled and modified in accordance with the measured temperature information Tj.

[0454] Furthermore, if the temperature information Tj measured during the tc2 period differs from the standard value and a predetermined value, the system determines whether there is a problem with the connection status of transistor 117 or the test equipment, and makes a decision such as "do not start the test." During the tc2 or tc1 period, Vi is measured multiple times, and the temperature information Tj for Vi is determined.

[0455] To facilitate the explanation, the operation and configuration shown in Figure 8(b) will be used as an example. Figure 8(b) shows an example where the transistor 117s is connected in diode mode, and the test is performed by applying the gate signal Vsgm to the gate terminal gm of transistor 117m. Furthermore, the temperature of semiconductor component 117 will be explained assuming that it is controlled by the diode Dm. The gate signal is applied to the gate terminal of transistor 117, which is being tested with period tcycle, on time ton, and off time toff.

[0456] The gate terminal gm of transistor 117m is controlled by applying an off voltage (0(V)) and an on voltage (Vg). However, during the tn2 period before transistor 117m is turned on, the Vt voltage may be negative to the off voltage. Also, during the tn1 period after transistor 117m is turned off, the Vt voltage may be negative to the off voltage. The Vt voltage is a voltage lower than 0(V) and higher than -4(V). Therefore, Vt is a voltage that is greater than or equal to -4(V) and lower than 0(V).

[0457] Furthermore, if transistor 117m is SiC, the off-voltage is set to the Vt voltage, and if it is an IGBT, the off-voltage is set to 0 (V). As described above, the semiconductor device testing apparatus of the present invention is configured so that the off-voltage supplied to transistor 117m can be changed according to the type of transistor 117 being tested. The Vt voltage is set by setting the Vmm1 voltage of the gate driver circuit 113m.

[0458] Furthermore, if the transistor being controlled on / off is transistor 117s, the Vt voltage is set or adjusted by configuring the Vms1 voltage of the gate driver circuit 113s. Diode Dm is connected to its cathode terminal km and anode terminal am. Temperature information Tj is measured for diode Dm at the timing shown in Figure 18(d)St2.

[0459] In the embodiment shown in Figure 1, the diode Dm is separated from the path through which the constant current Id flows. Even when the current Id is flowing through the transistor 117m, the constant current Icm can still flow through the diode. Therefore, the time for measuring the temperature information Tj can be flexibly set. As shown in Figure 18(d), the positions of tcs and tcm can be freely set.

[0460] In Figure 18(d), St2 is a timing signal that controls the current Icm flowing through diode Dm. When St2 is at a high level, a constant current Icm flows through diode Dm of transistor 117m. The voltage detection circuit 129m acquires the terminal voltage Vim across diode Dm, and the temperature measurement circuit (not shown) converts the terminal voltage Vim into temperature information Tj.

[0461] The temperature information Tj is sent to the controller circuit board 111 (controller 111), and the controller circuit board 111 (controller 111) performs, stops, or changes the control of the transistor 117 according to the temperature information Tj. The temperature information Tj is sent to the controller circuit board 111 (controller 111), and the controller circuit board 111 (controller 111) performs the test of the transistor 117 based on the temperature information Tj.

[0462] The above embodiments were explained using the semiconductor element component 117 shown in Figure 31 as an example. In the semiconductor element component 117 of Figure 31, the terminals of the diode D (diode Ds, diode Dm) are formed independently of the transistor 117m or transistor 117s. The semiconductor device testing apparatus and semiconductor device testing method of the present invention can also be applied to semiconductor device components 117, etc., shown in Figure 32.

[0463] In Figures 32(a) and 32(b), the semiconductor element component 117 has a diode Dim formed or placed between the emitter terminal em and collector terminal cm of transistor 117m for measuring temperature. Additionally, a diode Dis formed or placed between the emitter terminal es and collector terminal cs of transistor 117s for measuring temperature.

[0464] The semiconductor component 117 in Figures 32(a) and 32(b) is similar to the semiconductor component 117 in Figure 31 in that it contains transistors 117m and 117s in a single package. Transistors 117s and 117m are connected in series.

[0465] In Figures 32(a) and 32(b), an example of a semiconductor component 117 is shown, in which a transistor 117m and a transistor 117s are integrated into a single package. The transistors 117s and 117m are connected in series.

[0466] Figures 32(c) and 32(d) show an example in which the electrode terminals 226c2 of transistor 117s and the electrode terminals 226c1 of transistor 117m are electrically connected with wiring material to form a single semiconductor element component 117.

[0467] The semiconductor device test apparatus or test method described herein is applicable to all of Figures 32(a), 32(b), 32(c), and 32(d). It goes without saying that it is also applicable to configurations consisting of either transistor 117s or just one of the transistors 117s.

[0468] In Figure 32, the semiconductor element component 117 has electrode terminals (P electrode terminal, O electrode terminal, N electrode terminal) to which a large current is applied or output. Transistor 117m incorporates a diode Dim. Transistor 117s incorporates a diode Dis. Diodes Di (diode Dim, diode Dis) are formed simultaneously with the formation process of transistor 117.

[0469] For example, the semiconductor layer of diode Di uses the same layer layers as transistor 117 (transistor 117m, transistor 117s). Similarly, the insulating layer and other components also use the same layer layers.

[0470] As shown in Figures 32(a) and 32(b), the semiconductor element component 117 has a P electrode terminal (electrode terminal 226a), an O electrode terminal (electrode terminal 226c), and an N electrode terminal (electrode terminal 226b). The emitter terminal em of transistor 117m is connected to the N electrode terminal, the collector terminal es of transistor 117s is connected to the P electrode terminal, and the collector terminal of transistor 117m is connected to the O electrode terminal.

[0471] Transistor 117m has an emitter terminal em, a gate terminal gm, and a collector terminal cm. The collector terminal cm of transistor 117m is common with the emitter terminal es of transistor 117s. The cathode terminal of diode Dim is connected to the collector terminal cm of transistor 117m, and the anode terminal is connected to the emitter terminal em of transistor 117m.

[0472] Transistor 117s has an emitter terminal es, a gate terminal gs, and a collector terminal cs. Transistor 117m has an emitter terminal em, a gate terminal gm, and a collector terminal cm.

[0473] The voltage generated between the N electrode terminal 226b and the O electrode terminal 226c of semiconductor component 117 is the inter-channel voltage Vcem of transistor 117m, and the voltage generated between the P electrode terminal 226a and the O electrode terminal 226c of semiconductor component 117 is the inter-channel voltage Vces of transistor 117s.

[0474] As shown in Figures 11 and 12, connector 202m is connected to the terminals (terminals em, gm, and cm) of transistor 117m. Connector 202s is connected to the terminals (terminals es, gs, and cs) of transistor 117s.

[0475] As shown in Figure 11, fork plug 205e is connected to the P electrode terminal (electrode terminal 226a), fork plug 205h is connected to the O electrode terminal (electrode terminal 226c), and fork plug 205c is connected to the N electrode terminal (electrode terminal 226b).

[0476] A predetermined constant current is applied to at least one of diodes Dim and Dis. The equivalent resistance of the diodes changes with temperature, and the terminal voltage of diode Di changes when the predetermined constant current is applied. Temperature information Tj is obtained from this terminal voltage Vi.

[0477] As shown in Figure 11, a short circuit 137m is formed between the gate terminal gm and the emitter terminal em of transistor 117m. A short circuit 137s is formed between the gate terminal gs and the emitter terminal es of transistor 117s.

[0478] The difference between the configuration in Figure 11 and the configuration in Figure 1 is that in Figure 11, a constant current circuit is configured to supply a constant current Icm to the diode Dim of transistor 117m, and the terminal voltage of diode Dim is measured by the voltage between the collector terminal cm and the emitter terminal em of transistor 117m. Also, in Figure 11, a constant current circuit is configured to supply a constant current Ics to the diode Dis of transistor 117s, and the terminal voltage of diode Dis is measured by the voltage between the collector terminal cs and the emitter terminal es of transistor 117s.

[0479] When a constant current is supplied to diode Di, transistor 117 is turned off. The constant current Icm supplied to diode Dim is supplied as a current drawn in from transistor Tm. The constant current Ics supplied to diode Dis is supplied as a current drawn in from transistor Ts.

[0480] The terminal voltage of diode Dim is measured or acquired by a voltage detection circuit 129m connected to the collector terminal cm and emitter terminal em of transistor 117m. The terminal voltage of diode Dis is measured or acquired by a voltage detection circuit 129s connected to the collector terminal cs and emitter terminal es of transistor 117s.

[0481] The emitter terminal voltage es of transistor 117s is the voltage obtained by adding the channel voltage Vcem of transistor 117m to the voltage at the N electrode terminal. When the channel voltage Vcem of transistor 117m changes, the emitter terminal voltage es of transistor 117s also changes, and the anode voltage of diode Dis also changes. Similarly, when the N electrode terminal voltage changes, the anode voltage of diode Dim also changes.

[0482] In the configuration of the present invention shown in Figure 11, similar to Figure 1, the current detection circuit 128, voltage detection circuit 129, constant current setting circuit 130, etc., are isolated from the circuit voltage Vc and configured in a floating state. Therefore, the terminal voltage of diode Dis can be measured or acquired without any problems even if the emitter terminal em voltage of transistor 117m fluctuates or shifts. The same applies to the terminal voltage of variable resistor circuit 125.

[0483] The isolated DC-DC converter circuit 138 is described as generating various voltages from the circuit voltage Vc, but it is not limited to this. It goes without saying that other voltages may be generated from multiple voltages, including the circuit voltage Vc.

[0484] The other configurations are the same as in Figure 1, so their explanation is omitted. Also, the driving method in Figure 4 can be applied to the configuration of transistor 117 in Figure 32, so its explanation is omitted.

[0485] Figure 12 is a configuration diagram corresponding to Figure 2 in the first embodiment of the present invention. Figures 9 and 2 are similar except for the configuration and terminals of the transistor 171 in Figure 9, so their explanation is omitted.

[0486] The semiconductor component 117 in Figure 32, like the semiconductor component 117 in Figure 31, has its N electrode terminal connected to AGND. AGND is, for example, the ground potential.

[0487] The emitter terminal em of transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. Also, the emitter terminal em is connected to the Vmm2 terminal. The emitter terminal es of transistor 117s is connected to the Vms1 terminal. Also, the emitter terminal es is connected to the Vms2 terminal. The potential at the emitter terminal es of transistor 117s is the voltage obtained by adding the channel voltage Vcem of transistor 117m to the potential at the N electrode terminal.

[0488] The gate signal Vsg applied to the gate terminal gm of transistor 117m is referenced to the potential of the emitter terminal em. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117m, then when the Vg voltage is applied from the AGND potential of the N electrode terminal, transistor 117m will be in the ON state.

[0489] In Figure 18(a), the 0(V) potential is defined as the voltage that turns off transistor 117m. The Vt1 voltage is a voltage with a negative polarity compared to the 0(V) potential. The negative Vt1 voltage is applied, using the Vmm1 voltage as a reference. Note that in Figure 18(a) and other diagrams, the Vt1 voltage is illustrated as the Vt voltage.

[0490] A diode Dim is connected between the collector terminal cm and the emitter terminal em of transistor 117m. A voltage detection circuit 129m is placed between the collector terminal cm and the emitter terminal em.

[0491] A diode Dis is connected between the collector terminal cs and the emitter terminal es of transistor 117s. A voltage detection circuit 129s is placed between the collector terminal cs and the emitter terminal es. Figure 13 is an explanatory diagram illustrating the wiring of the power supply system of a semiconductor device testing apparatus in a second embodiment of the present invention. The N electrode terminal of transistor 117 is connected to AGND. AGND is, for example, the ground potential.

[0492] The emitter terminal em of transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. In addition, the emitter terminal em is connected to the Vpm2 terminal. The emitter terminal es of transistor 117s is connected to the Vms1 terminal. Additionally, the emitter terminal es is connected to the Vps2 terminal.

[0493] As shown in Figure 13, by changing the connected power supply voltage, semiconductor element components 117 with altered or different terminal voltage polarities can be flexibly tested.

[0494] Furthermore, as shown in Figure 13, the present invention includes a changeover switch circuit 127 (changeover switch circuit 127s, changeover switch circuit 127m), etc., and provides a circuit that swaps the wiring between symbols a and b. This allows for easy testing of semiconductor element components 117 with different polarities of diode D.

[0495] Similarly, the gate terminal g and emitter terminal e of transistors 117m and 117s are configured to be swapped using a switch circuit 127. This is useful when changing the logic of the on-voltage and off-voltage of transistor 117. Needless to say, the above points can also be applied to other embodiments.

[0496] Diode Dim supplies a constant current Icm to transistor 117m during periods when the constant current Id is not flowing through it. The constant current Icm flows from the emitter terminal em to the collector terminal cm of transistor 117m. Therefore, the power supply voltage is set with Vpm2 as the positive side and Vmm2 as the negative side.

[0497] Diode Dis supplies a constant current Ics to transistor 117s during periods when no constant current Id is flowing through it. The constant current Ics flows from the emitter terminal es to the collector terminal cs of transistor 117s. Therefore, the power supply voltage is set with Vps2 as the positive side and Vms2 as the negative side.

[0498] The potential at the emitter terminal es of transistor 117s is the sum of the potential at the N electrode terminal and the inter-channel voltage Vcem of transistor 117m. Therefore, the potential at the emitter terminal es of transistor 117s changes depending on the on / off state of transistor 117m and the magnitude of the constant current Id.

[0499] The gate signal Vsg applied to the gate terminal gm of transistor 117m is referenced to the potential of the emitter terminal em. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117m, then when the Vg voltage is applied from the AGND potential of the N electrode terminal, transistor 117m will be in the ON state.

[0500] In Figure 18(a), the 0(V) potential is defined as the voltage that turns off transistor 117m. The Vt1 voltage is a voltage with a negative polarity compared to the 0(V) potential. The negative Vt1 voltage is applied, using the Vmm1 voltage as a reference. Note that in Figure 18(a) and other diagrams, the Vt1 voltage is illustrated as the Vt voltage.

[0501] The current Icm flowing through diode Dim is generated using the Vmm2 and Vpm2 voltages as power sources. Since the Vpm2 voltage is shared with the Vmm1 voltage, the voltage at the terminal of diode Dm is within the range of Vmm2 and Vpm2, and is a voltage relative to AGND.

[0502] The gate signal Vsg applied to the gate terminal gs of transistor 117s is referenced to the potential of the emitter terminal es. The potential of the emitter terminal es is the sum of the AGND potential of the N electrode terminal and the channel voltage Vcem of transistor 117m.

[0503] As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117s, then the voltage at which transistor 117s turns on is based on the voltage obtained by adding the channel voltage Vcem of transistor 117m to the AGND potential of the N electrode terminal. When the Vg voltage is applied, transistor 117s turns on.

[0504] The Vms1 voltage is isolated from the Vmm1 voltage and is in a floating state. Therefore, even if the inter-channel voltage Vcem of transistor 117m fluctuates, the emitter terminal es potential of transistor 117s fluctuates in accordance with the fluctuation of the inter-channel voltage Vcem of transistor 117m. The Vms1 voltage generates the Vps1 voltage with reference to the emitter terminal es potential.

[0505] The gate signal Vsg applied to the gate terminal g of transistor 117s is referenced to the potential of the emitter terminal es. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117s, then when the voltage Vg is applied from the potential of the emitter terminal es, transistor 117s turns on.

[0506] The Vt2 voltage is a voltage with a negative polarity compared to the 0(V) potential. The negative Vt2 voltage is applied using the Vms1 voltage as a reference. Note that in Figure 18(a), etc., the Vt2 voltage is illustrated as the Vt voltage.

[0507] The current Ics flowing through diode Dis generates the Vms2 and Vps2 voltages using a power source. The Vps2 voltage is shared with the Vms1 voltage. The voltage at the terminal of diode Dis is within the range of Vms2 and Vps2.

[0508] The Vms1 voltage is isolated from the Vmm1 voltage and is in a floating state. Furthermore, the Vms1 voltage is connected to the collector terminal cm of transistor 117m. Therefore, even if the inter-channel voltage Vcem of transistor 117m fluctuates, the voltages that turn on (Vg) and turn off (0(V)) transistor 117s remain unchanged. Thus, transistor 117s can be effectively controlled on and off.

[0509] In Figure 13, the switch circuit 123 is placed in the power supply connection wiring. The switch circuit 123 can switch between connecting the Vms1 voltage and the Vps2 voltage, or connecting the Vms1 voltage and the Vps2 voltage. The semiconductor device components 117 to be tested are diverse. Therefore, it is necessary to match the potential of the voltage signal applied to the semiconductor device components 117. In this invention, a wide variety of tests can be handled by arranging or providing the switch circuit 123 as shown in Figures 6 and 13. As described above, the present invention is characterized by being configured to allow the connection state of the potential generated by an isolated DC-DC converter circuit, etc., to be changed.

[0510] Figure 14 is an explanatory diagram illustrating the wiring of the power supply system of a semiconductor device testing apparatus in a second embodiment of the present invention. In the wiring shown in Figure 14, the N electrode terminal of transistor 117 is connected to AGND. AGND is, for example, the ground potential. The emitter terminal em of transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal.

[0511] The emitter terminal es of transistor 117s is connected to the Vms1 terminal. The Vmm2 and Vms2 terminals are isolated from other power supply terminals and are in a floating state.

[0512] The current Icm flowing through diode Dm generates voltages Vmm² and Vpm² using a power source. The voltage at the terminals of diode Dm is basically within the range of Vmm² and Vpm².

[0513] The current Ics flowing through diode Ds is generated using the Vms2 and Vps2 voltages as the power source. The voltage at the terminals of diode Ds is basically within the range of Vms2 and Vps2.

[0514] The potential of the Vmm2 terminal is maintained at a potential relative to AGND, and the potential of the Vms2 terminal is maintained at a potential relative to the potential of the emitter terminal es of transistor 117s.

[0515] The gate signal Vsg applied to the gate terminal gm of transistor 117m is referenced to the potential of the emitter terminal em. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117m, then when the Vg voltage is applied from the AGND potential of the N electrode terminal, transistor 117m will be in the ON state.

[0516] As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117s, then the voltage at which transistor 117s turns on is based on the voltage obtained by adding the channel voltage Vcem of transistor 117m to the AGND potential of the N electrode terminal. When the Vg voltage is applied, transistor 117s turns on.

[0517] The Vms1 voltage is connected to the emitter terminal es, isolated from other voltages such as the Vmm1 voltage, and is in a floating state. Therefore, even if the inter-channel voltage Vcem of transistor 117m fluctuates, the emitter terminal es potential of transistor 117s fluctuates in accordance with the fluctuation of the inter-channel voltage Vcem of transistor 117m. The Vms1 voltage generates the Vps1 voltage with reference to the emitter terminal es potential.

[0518] The gate signal Vsg applied to the gate terminal g of transistor 117s is referenced to the potential of the emitter terminal es. As shown in Figure 18(a), if Vg is the voltage that turns on transistor 117s, then when the voltage Vg is applied from the potential of the emitter terminal es, transistor 117s turns on. Other details are explained in Figure 13, so they will be omitted here. The following describes the test method for the semiconductor device component 117 explained in Figure 32, with reference to Figure 18.

[0519] The temperature-sensitive diodes Dim, which measures the temperature of transistor 117m, and Dis, which measures the temperature of transistor 117s, are supplied with a constant current Ic (Icm, Ics) when the test current Id is not flowing through transistor 117. Therefore, the timing for supplying the constant current Ic is St1 in Figure 18(c).

[0520] The resistance of diode D changes due to the heat generated by transistor 117. When a constant current Ic (Ics, Icm) is passed through diode Di (Dis, Dim), the voltage across the terminals of diode Di changes in proportion to the change in its resistance. By monitoring or measuring the voltage across the terminals, the temperature of transistor 117, or the change in temperature, can be determined.

[0521] To obtain the temperature coefficient K accurately, the temperature coefficient K of each transistor 117 should be measured and tested individually, even within the same lot. The measurement of the temperature coefficient K is not limited to the use of a constant temperature chamber. For example, the temperature coefficient K can be obtained by changing the temperature of the water flowing through the heatsink on which the transistor 117 is mounted.

[0522] During testing, a test current Id is intermittently applied to transistor 117. Immediately after the test current Id is turned off, or after a predetermined short period of time has elapsed since then, a constant current Ic for temperature measurement is applied.

[0523] To prevent transistor 117 from overheating due to the constant current Ic, or to ensure that the constant current Ic has no effect, the constant current Ic is set to a value that is sufficiently smaller than the constant current Id flowing through the channel of transistor 117. The constant current Id is set to a current that does not generate enough heat to affect temperature measurement.

[0524] When measuring temperature, if the diode Di is formed on the same chip as the transistor 117, the gate signal Vsg may change the saturation voltage Vn. It is preferable that the gate signal Vsg be zero (0) voltage or a negative voltage.

[0525] During testing of transistor 117, the constant current Ic is applied to diode Di when the channel current Id is not flowing. In other words, when transistor 117 is not turned on, the constant current Ic is applied and the terminal voltage of diode Di is measured.

[0526] The operational amplifier circuit (buffer circuit) 116 outputs the terminal voltage Vi (terminal c - terminal e) of the diode Di. Note that the operational amplifier circuit 116 is not limited to being composed of operational amplifier circuit elements. Any circuit with high input impedance and low output impedance will suffice. The temperature measurement circuit (not shown) obtains the temperature information Tj of the transistor 117 being tested from the stored temperature coefficient K and voltage Vi.

[0527] The requested temperature information Tj is sent to the controller circuit board 111 (controller 111). When the temperature information Tj exceeds a predetermined set value, the controller circuit board 111 (controller 111) determines that the transistor 117 is in a predetermined stress state or a degraded state, and takes action such as changing the test control or stopping the test.

[0528] The temperature information Tj initially fluctuates between the lowest temperature T1 and the highest temperature T2. When the test stresses transistor 117, the Vce voltage of transistor 117 changes, and the temperature information Tj usually increases. Therefore, as shown in Figure 19(c), the lowest temperature rises above temperature T1, and the highest temperature approaches the temperature information Tm(Tjmax).

[0529] Figure 18(c) shows that St1 is a timing signal that causes a current Ic (Ics, Icm) to flow through the diode Di. When St1 is at a high level, current flows through the diode Di of transistor 117. The voltage detection circuit 129 acquires the terminal voltage of diode Di, and the temperature measurement circuit (not shown) converts the terminal voltage into temperature information Tj. The temperature information Tj is sent to the controller circuit board 111 (controller 111), and the controller circuit board 111 (controller 111) performs a test of transistor 117 (semiconductor element component 117) according to the temperature information Tj.

[0530] Id is the current flowing through the transistor 117 being tested, and is the current output by the power supply circuit 121. St1 is the time for which the measurement current is passed through the temperature measuring diode Di, or the time for measuring the temperature.

[0531] Figure 18(e)Ssa shows the on / off signal for switch circuit 124a, and Figure 18(f)Ssb shows the on / off signal for switch circuit 124b. Alternatively, switch circuit 124a may be removed, and switch circuits 124c and 124d may be turned on simultaneously. Von is the voltage that turns on the switch circuit 124, and 0(V) is the voltage that turns off (opens) the switch circuit 124.

[0532] Figure 18(g) shows the inter-channel voltage of transistor 117 (transistor 117m, transistor 117s) as Vce, and the temperature information Tj shows the measured temperature change of transistor 117 (transistor 117m, transistor 117s).

[0533] As shown in Figure 18(a), a gate signal Vsg is applied from the gate driver circuit 113 to the gate terminal g of transistor 117. The gate signal Vsg has a period time tcycle and an on-time ton. The period time tcycle and on-time ton can be set to arbitrary values ​​by the gate signal control circuit 112. The on-voltage Vg can also be set to an arbitrary voltage.

[0534] Figure 18(i)Si is a timing signal for measuring the current flowing through the variable resistor circuit 125. When Si is at a high level, the current flowing through the variable resistor circuit 125 (gate leakage current) is measured. Figure 18(c)St1 is the timing signal for applying current Ic to diode Di (diode Dis, diode Dim).

[0535] For ease of understanding, the measured temperature information Tj is explained as changing between T1 and T2, as shown in Figure 18(h). The temperature information Tj increases when current is applied to transistor 117 and decreases when the current is stopped. Furthermore, the temperature information Tj changes in accordance with changes in the characteristics of transistor 117.

[0536] Figure 18(f)Ssa shows the timing of the on / off control signal for switch circuit 124a. When Ssa is Von, switch circuit 124a closes (turns on). When it is 0(V), switch circuit 124a opens (turns off), and the application of current or voltage is interrupted.

[0537] Figure 18(e)Ssb shows the timing of the on / off control signal for switch circuit 124b. When Ssb is Von, switch circuit 124b closes (turns on). When it is 0 (V), switch circuit 124b opens (turns off).

[0538] In Figure 18(g), Vce is the channel voltage of transistor 117 (voltage between the emitter and collector terminals). For ease of understanding, although not shown in the diagram, surge voltages and surge currents are generated when transistor 117 is switched on and off, and the Vce waveform changes in a complex manner over time due to changes in the on-resistance of transistor 117.

[0539] In this specification and its drawings, for the sake of clarity and ease of explanation, it is assumed that when transistor 117 is ON, the voltage is Vn, and when the transistor is OFF, the voltage is 0 (V).

[0540] To facilitate the explanation, the operation and configuration shown in Figure 15(b) will be used as an example. Figure 15(b) shows an example where the transistor 117s is connected in diode mode, and the test is performed by applying the gate signal Vsgm to the gate terminal gm of transistor 117m. Furthermore, the temperature of semiconductor component 117 will be explained assuming that it is controlled by the diode Dim. The gate signal sg is applied to the gate terminal of transistor 117, which is being tested with period tcycle, on time ton, and off time tooff.

[0541] The gate terminal gm of transistor 117m is controlled by applying an off voltage (0(V)) and an on voltage (Vg). However, during the tn2 period before transistor 117m is turned on, the Vt voltage may be negative to the off voltage. Also, during the tn1 period after transistor 117m is turned off, the Vt voltage may be negative to the off voltage.

[0542] Diode Dim is connected to the emitter terminal em and collector terminal cm of transistor 117m. Temperature information Tj is measured by diode Dim at the timing shown in Figure 18(c)St1.

[0543] In Figure 18(c), St1 is a timing signal that controls the current Icm flowing through the diode Dim. When St1 is at a high level, a constant current Icm flows through the diode Dim of transistor 117m. The voltage detection circuit 129m acquires the terminal voltage Vim of diode Dim, and the temperature measurement circuit (not shown) converts the terminal voltage Vim into temperature information Tj.

[0544] The temperature information Tj is sent to the controller circuit board 111 (controller 111), and the controller circuit board 111 (controller 111) performs, stops, or changes the control of the transistor 117 according to the temperature information Tj.

[0545] The temperature information Tj is sent to the controller circuit board 111 (controller 111), and the controller circuit board 111 (controller 111) performs a test of the transistor 117 based on the temperature information Tj.

[0546] As shown in Figure 11, fork plug 205e is connected to the P electrode terminal (electrode terminal 226a), fork plug 205h is connected to the O electrode terminal (electrode terminal 226c), and fork plug 205c is connected to the N electrode terminal (electrode terminal 226b).

[0547] A predetermined constant current is applied to at least one of diodes Dim and Dis. The equivalent resistance of the diodes changes with temperature, and the terminal voltage of diode Di changes when the predetermined constant current is applied. Temperature information Tj is obtained from this terminal voltage Vi.

[0548] As shown in Figure 11, a short circuit 137m is formed between the gate terminal gm and the emitter terminal em of transistor 117m. A short circuit 137s is formed between the gate terminal gs and the emitter terminal es of transistor 117s.

[0549] In the configurations shown in Figure 11 and Figure 1, a constant current circuit is configured in Figure 11 to supply a constant current Icm to the diode Dim of transistor 117m, and the terminal voltage of diode Dim is measured by the voltage between the collector terminal cm and the emitter terminal em of transistor 117m. Similarly, a constant current circuit is configured in Figure 11 to supply a constant current Ics to the diode Dis of transistor 117s, and the terminal voltage of diode Dis is measured by the voltage between the collector terminal cs and the emitter terminal es of transistor 117s.

[0550] When a constant current is supplied to diode Di, transistor 117 is turned off. The constant current Icm supplied to diode Dim is supplied as a current drawn in from transistor Tm. The constant current Ics supplied to diode Dis is supplied as a current drawn in from transistor Ts.

[0551] The terminal voltage of diode Dim is measured or acquired by a voltage detection circuit 129m connected to the collector terminal cm and emitter terminal em of transistor 117m. The terminal voltage of diode Dis is measured or acquired by a voltage detection circuit 129s connected to the collector terminal cs and emitter terminal es of transistor 117s.

[0552] The emitter terminal voltage es of transistor 117s is the voltage obtained by adding the channel voltage Vcem of transistor 117m to the voltage at the N electrode terminal. When the channel voltage Vcem of transistor 117m changes, the emitter terminal voltage es of transistor 117s also changes, and the anode voltage of diode Dis also changes. Similarly, when the N electrode terminal voltage changes, the anode voltage of diode Dim also changes.

[0553] In the configuration of the present invention shown in Figure 11, similar to Figure 1, the current detection circuit 128, voltage detection circuit 129, constant current setting circuit 130, etc., are isolated from the circuit voltage Vc and configured in a floating state. Therefore, the terminal voltage of diode Dis can be measured or acquired without any problems even if the emitter terminal em voltage of transistor 117m fluctuates or shifts. The same applies to the terminal voltage of variable resistor circuit 125.

[0554] It goes without saying that the present invention can be modified in various ways without departing from its essence. It goes without saying that the matters and contents described herein and in the drawings can be combined with each other.

[0555] Figure 32 shows a semiconductor element component 117 in which a diode Di is formed between at least one of the channels of transistor 117m or transistor 117s.

[0556] In some cases, as shown in Figure 31, a diode D(Ds, Dm) may not be formed as semiconductor element component 117, or as shown in Figure 32, a diode Di(Dis, Dim) may not be formed between channels. In such cases, it is necessary to obtain the temperature information Tj of the semiconductor element component 117 without using diodes.

[0557] For example, in Figure 32, if there is no diode Di, an on-voltage is applied to the gate terminal gs of transistor 117s, and the change in the inter-channel voltage of transistor 117s is measured to obtain temperature information Tj (temperature information Tj is obtained from the change in inter-channel voltage Vce). Alternatively, an on-voltage is applied to the gate terminal gm of transistor 117m, and the change in the inter-channel voltage of transistor 117m is measured to obtain temperature information Tj (temperature information Tj is obtained from the change in inter-channel voltage Vce). In these cases, since there is no diode, it goes without saying that a constant current Ic generation circuit is unnecessary.

[0558] In Figure 11, no constant current is applied between the channels of transistor 117 (transistor 117s, transistor 117m), but the voltage detection circuit 129 measures the terminal voltage Vi (Vis, Vim) to obtain temperature information Tj.

[0559] Figure 10 is an explanatory diagram of a semiconductor device testing apparatus in another embodiment of the present invention. Figure 9 is a test circuit module for testing semiconductor device components 117. The test circuit module is designated as 301. The test circuit module 301 is connected to parts A, B, and C in Figure 10. The test circuit module 301 is prepared corresponding to each semiconductor device component 117.

[0560] It goes without saying that the transistor 171 of the test circuit module 301 may be configured not only as shown in Figure 31, but also as shown in Figure 32, or in any other configuration.

[0561] The test circuit module 301 is connected to three switch circuit boards 201 (switch circuit board 201b, switch circuit board 201c, and switch circuit board 201d). As shown in Figure 10, switch circuit board 201b is prepared to correspond to the semiconductor element component 117 to be tested. In Figure 10, switch circuit 124ba is placed in test circuit module 301a, switch circuit 124bb is placed in test circuit module 301b, and switch circuit 124bc is placed in test circuit module 301c.

[0562] A switch circuit 124d is mounted on the switch circuit board 201b. Conductor plates 204d and 204c are attached to the switch circuit board 201b. Conductor plate 204d is electrically connected to a fork plug 205e inserted through the opening 216 of the partition wall 214. The fork plug 205d is electrically connected to the conductor plate 204c. The fork plug 205e is connected to the P electrode terminal of the semiconductor element component 117. The fork plug 205h, connected to the O electrode terminal, is inserted through the opening 216 of the partition wall 214 and is electrically connected to the conductor plates 204f and 204a.

[0563] A fork plug 205c is connected to the N electrode terminal of transistor 117. The fork plug 205c is inserted through the opening 216 of the partition wall 214 and electrically connected to the conductor plate 204b, which is connected to section B of the test circuit module 301.

[0564] The switch circuit board 201c has the switch circuit 124c mounted on it. Conductor plates 204e and 204f are attached to the switch circuit board 201c. Conductor plate 204e is electrically connected to the fork plug 205a. Fork plugs 205d and 205a are connected to section A of the test circuit module 301.

[0565] A switch circuit 124d is mounted on the switch circuit board 201d. Conductor plates 204a and 204b are attached to the switch circuit board 201d. Conductor plate 204b is electrically connected to the fork plug 205b.

[0566] Connector 202m is connected to transistor 117m, and connector 202s is connected to transistor 117s. The test circuit module 301 contains a short circuit 137, a sample connection circuit 203, and a device control circuit board 209.

[0567] The test circuit module 301 shown in Figure 9 is arranged in sections A and B of Figure 10. The embodiment shown in Figure 10 is an embodiment in which three semiconductor element components 117 are tested simultaneously. The test circuit module 301 is controlled by a single controller circuit board 111. In Figure 10, the switch circuit 124a has the function of short-circuiting the N electrode terminal and the P electrode terminal of the semiconductor element component 117, as explained in Figure 2.

[0568] In each test circuit module 301, the semiconductor element component 117 is connected to the switch circuit board 201 located in chamber B by three fork plugs 205 (fork plug 205e, fork plug 205h, and fork plug 205c). In Figure 10, multiple semiconductor device components 117 to be tested are connected in parallel to the power supply circuit 121.

[0569] Figure 21 is an explanatory diagram of the operation of the semiconductor testing apparatus of the present invention shown in Figure 10. As an example, the semiconductor element component 117 of the test circuit module 301 is described as operating as shown in Figure 8(b). As shown in Figure 21, the signal Vsgm is applied sequentially to the test circuit modules 301a, 301b, 301c, and 301d, and the transistor 117 and other components are tested. In Figure 8(b), transistor 117s is connected by a diode, and the gate signal Vsgm is applied to the gate terminal gm of transistor 117m.

[0570] In Figure 10, a gate signal Vsgm is applied to the gate terminal gm of transistors 117m in test circuit module 301a, 301b, and 301c with a tcycle period and ton time. Before and after ton, Ssa (switch circuit 124a) is turned on to short-circuit the P and N electrode terminals of transistor 117 and discharge the charge. Furthermore, at the timing shown in Figure 18(d), a constant current Icm is applied to the diode Dm, and temperature information Tj is acquired. The above matters and test methods are explained using Figures 18, 19, and 20, etc., so further explanation is omitted.

[0571] The semiconductor element component 117 shown in Figure 32 is also configured in the test circuit module 301 as shown in Figure 16, and the semiconductor element test apparatus is configured in parts A, B, and C as shown in Figure 10. The test method is the same as in Figure 21, so the explanation is omitted. In the embodiments of the present invention, transistor 117 has been described using an IGBT as an example, but is not limited thereto.

[0572] For example, it goes without saying that an N-channel JFET (Figure 33(a)), a P-channel JFET (Figure 33(b)), an N-channel MOSFET (Figure 33(c)), a P-channel MOSFET (Figure 33(d)), an N-channel bipolar FET (Figure 33(e)), or a P-channel bipolar FET (Figure 33(f)) may also be used.

[0573] Furthermore, the device is not limited to three-terminal devices, but may also be a two-terminal element such as a diode as shown in Figure 33(g). In the case of a two-terminal element, a gate signal Vsg is not required. It goes without saying that the semiconductor device testing apparatus and semiconductor device testing method of the present invention can be applied by testing with a constant current Id flowing through the power supply circuit 121.

[0574] Furthermore, it goes without saying that the semiconductor device testing apparatus and semiconductor device testing method of the present invention can be applied not only to transistors and diodes, but also to semiconductor devices such as thyristors shown in Figure 33(h) and triacs shown in Figure 33(i), as well as varistors, diacs, and modules in which transistors, diodes, resistors, etc., are mixed or integrated.

[0575] Figure 17 shows an embodiment for testing a semiconductor element component 117 consisting of transistors 117m and 117s connected in two stages. Semiconductor element components 117a and 117b are connected in series.

[0576] As shown in Figure 17, the configuration of Figure 17 consists of block b and block a. Since block b and block a are similar to or the same as those described in this specification and in Figures 1, 2, 23, 24, etc., their explanation will be omitted.

[0577] In the embodiment shown in Figure 17, the semiconductor element component 117b in block b can be tested by turning on the switch circuit 124e. The semiconductor element component 117b in block a can be tested by turning on the switch circuit 124f.

[0578] The power supply wiring is explained in Figures 4, 5, 6, and 7, so it will be omitted here, but as an example, the emitter terminal em of transistor 117m of semiconductor component 117a is connected to the Vmm2 (Vmm2a) voltage and the Vmm1 (Vmm1a) voltage. The emitter terminal es of transistor 117s of semiconductor component 117a is connected to the Vms2 (Vms2a) voltage and the Vms1 (Vms1a) voltage.

[0579] Furthermore, the emitter terminal em of transistor 117m of semiconductor component 117b is connected to the Vmm2 (Vmm2b) voltage and the Vmm1 (Vmm1b) voltage. The emitter terminal es of transistor 117s of semiconductor component 117b is connected to the Vms2 (Vms2b) voltage and the Vms1 (Vms1b) voltage.

[0580] Vmm1a, Vmm2a, Vms1a, Vms2a, Vmm1b, Vmm2b, Vms1b, and Vms2 are generated in an isolated DC-DC converter circuit. Therefore, Vmm1a, Vmm2a, Vms1a, Vms2a, Vmm1b, Vmm2b, Vms1b, and Vms2 are isolated from each other and in a floating state.

[0581] As shown in Figures 31 and 32, the semiconductor element component 117 is exemplified by a configuration in which transistors 117s and 117m are connected in series. However, the test apparatus for the semiconductor element component 117 of the present invention is not limited to this.

[0582] For example, in Figure 31 or Figure 32, a semiconductor element component 117 having only one of either transistor 117s or transistor 117m is also within the scope of the present invention. For example, in Figure 31, an example is a configuration having only transistor 117m and diode Dm, in which the power supply circuit of the gate driver circuit 113 of transistor 117m and the power supply circuit of the constant current circuit that applies a constant current to diode Dm are electrically isolated or floated.

[0583] Although the present invention has been specifically described above based on embodiments, it goes without saying that the present invention is not limited thereto and can be modified in various ways without departing from its essence. It goes without saying that the matters and contents described in this specification and the drawings can be combined with each other. [Industrial applicability]

[0584] In this invention, the first power supply voltage of the first gate driver circuit that generates a signal to turn the first transistor 117m on and off, and the second power supply voltage of the second gate driver circuit that generates a signal to turn the second transistor 117s on and off, are configured to be isolated (floating) from each other's power supply voltages. The signal potentials at the gate terminals of transistors 117m and 117s will not become excessively high voltages, but will remain at predetermined signal or terminal potentials.

[0585] Furthermore, we can provide a semiconductor device testing apparatus and semiconductor testing method that allows for easy connection changes depending on the test content of semiconductor devices such as transistors and the number of semiconductor devices being tested simultaneously, and that effectively addresses noise generated during testing. [Explanation of symbols]

[0586] 111 Controller circuit board (controller) 112 Gate signal control circuit 113 Gate driver circuit 115 Temperature measurement circuit (not shown) 116 Operational Amplifier Circuit (Buffer Amplifier) 117 Power Transistors 121 Power supply circuit 122 Switch Circuit 123 Switch Circuit 124 Switch Circuit 125 Variable Resistor Circuit 126 Variable Resistor Circuit 127 Changeover switch circuit 128 Current detection circuit 129 Voltage detection circuit 130 Constant Current Setting Circuit 131 Control Rack 132 Power supply 133 Control Circuit 134 Heating and Cooling Plate 135 Circulating water pipe 136 Chiller 137 Short Circuit 138 Isolated DC-DC Converter Circuit 201 Switch Circuit Board 202 Connector 203 Sample Connection Circuit 204 Conductor Plate 205 Fork Plug 206 connection pins 207 Motherboard 208 connector 209 Device control circuit board 210 cabinets 211 Connection Wiring 212 Power wiring 213 Connector 214 Bulkhead 215 Bulkhead 216 Opening 217 Bulkhead 219 connecting bolts 220 Contact area 221 Fixing screws 222 Signal Wiring 225 Contact point 226 element terminals 235 Signal Wiring 301 Test Circuit Module 302 Voltage Selection Circuit 311 Selector switch 312 Selector switch 313 Selector switch 314 Thermocouple 315 connector

Claims

1. A power semiconductor element test apparatus for testing a semiconductor element component having a first transistor connected to a first element terminal, a third element terminal, and a first gate terminal, a second transistor connected to a second element terminal, the third element terminal, and a second gate terminal, a first diode connected to the first element terminal and the third element terminal, and a second diode connected to the third element terminal and the second element terminal, A power supply circuit having a first output terminal and a second output terminal that supplies a test current to the semiconductor element component, A first driver circuit having a first voltage terminal, a second voltage terminal, and a terminal connected to the first gate terminal, A second driver circuit having a third voltage terminal, a fourth voltage terminal, and a terminal connected to the second gate terminal, A first constant current circuit having a fifth voltage terminal for applying a fifth voltage and a ninth voltage terminal for applying a ninth voltage, A second constant current circuit having a sixth voltage terminal for applying a sixth voltage and a tenth voltage terminal for applying a tenth voltage, The device comprises a voltage generating circuit that generates a second voltage based on the first voltage of the first voltage terminal, a fourth voltage based on the third voltage of the third voltage terminal, a fifth voltage, a ninth voltage based on the fifth voltage, a sixth voltage, and a tenth voltage based on the sixth voltage. The first voltage, the second voltage, the third voltage, the fourth voltage, the fifth voltage, the ninth voltage, the sixth voltage, and the tenth voltage are generated using the circuit reference voltage and the circuit voltage. The second element terminal and the first output terminal are connected. The first element terminal and the second output terminal are connected, The second voltage is applied to the second voltage terminal. The fourth voltage is applied to the fourth voltage terminal. The first voltage terminal and the fifth voltage terminal are set to a common potential. The third voltage terminal and the sixth voltage terminal are set to a common potential. The first driver circuit applies a first off signal or a first on signal to the first gate terminal. The second driver circuit applies a second off signal or a second on signal to the second gate terminal. The first constant current circuit generates a first constant current using the fifth voltage and the ninth voltage, and supplies the first constant current to the first diode. The second constant current circuit generates a second constant current using the sixth voltage and the tenth voltage, and supplies the second constant current to the second diode. The circuit reference voltage and the circuit voltage are isolated from the first voltage, the third voltage, the second voltage, the fourth voltage, the fifth voltage, the ninth voltage, the sixth voltage, and the tenth voltage. The first voltage and the third voltage are isolated from each other. The second voltage and the fourth voltage are isolated from each other. The fifth voltage and the sixth voltage are isolated from each other. The ninth voltage and the tenth voltage are isolated from each other. The first voltage terminal and the first element terminal are connected, A power semiconductor device test apparatus characterized in that the third voltage terminal and the third element terminal are connected.

2. A power semiconductor element test apparatus for testing a semiconductor element component having a first transistor connected to a first element terminal, a third element terminal, and a first gate terminal, a second transistor connected to a second element terminal, the third element terminal, and a second gate terminal, a first diode connected to the first element terminal and the third element terminal, and a second diode connected to the third element terminal and the second element terminal, A power supply circuit having a first output terminal and a second output terminal that supplies a test current to the semiconductor element component, A first driver circuit having a first voltage terminal, a second voltage terminal, a seventh voltage terminal, and a terminal connected to the first gate terminal, A second driver circuit having a third voltage terminal, a fourth voltage terminal, an eighth voltage terminal, and a terminal connected to the second gate terminal, A first constant current circuit having a fifth voltage terminal for applying a fifth voltage and a ninth voltage terminal for applying a ninth voltage, A second constant current circuit having a sixth voltage terminal for applying a sixth voltage and a tenth voltage terminal for applying a tenth voltage, The device comprises a voltage generating circuit that generates a second voltage based on the first voltage of the first voltage terminal, a seventh voltage based on the first voltage of the first voltage terminal, a fourth voltage based on the third voltage of the third voltage terminal, an eighth voltage based on the third voltage of the third voltage terminal, a fifth voltage, a ninth voltage based on the fifth voltage, a sixth voltage, and a tenth voltage based on the sixth voltage. The first voltage, the second voltage, the third voltage, the fourth voltage, the seventh voltage, the eighth voltage, the fifth voltage, the ninth voltage, the sixth voltage, and the tenth voltage are generated using the circuit reference voltage and the circuit voltage. The second element terminal and the first output terminal are connected. The first element terminal and the second output terminal are connected, The second voltage is applied to the second voltage terminal. The fourth voltage is applied to the fourth voltage terminal. The seventh voltage is applied to the seventh voltage terminal. The eighth voltage is applied to the eighth voltage terminal. The first driver circuit applies a first off signal or a first on signal to the first gate terminal. The second driver circuit applies a second off signal or a second on signal to the second gate terminal. The first constant current circuit generates a first constant current using the fifth voltage and the ninth voltage, and supplies the first constant current to the first diode. The second constant current circuit generates a second constant current using the sixth voltage and the tenth voltage, and supplies the second constant current to the second diode. The circuit reference voltage and the circuit voltage are isolated from the first voltage, the third voltage, the second voltage, the fourth voltage, the seventh voltage, the eighth voltage, the fifth voltage, the ninth voltage, the sixth voltage, and the tenth voltage. The first voltage and the third voltage are isolated from each other. The second voltage and the fourth voltage are isolated from each other. The seventh voltage and the eighth voltage are isolated from each other. The fifth voltage and the sixth voltage are isolated from each other. The ninth voltage and the tenth voltage are isolated from each other. The first voltage terminal and the first element terminal are connected, A power semiconductor device test apparatus characterized in that the third voltage terminal and the third element terminal are connected.

3. A power semiconductor element test apparatus for testing a semiconductor element component having a first transistor connected to a first element terminal, a third element terminal, and a first gate terminal, a second transistor connected to a second element terminal, the third element terminal, and the second gate terminal, a first diode connected to a fourth element terminal and a fifth element terminal, and a second diode connected to a sixth element terminal and a seventh element terminal, A power supply circuit having a first output terminal and a second output terminal that supplies a test current to the semiconductor element component, A first driver circuit having a first voltage terminal, a second voltage terminal, and a terminal connected to the first gate terminal, A second driver circuit having a third voltage terminal, a fourth voltage terminal, and a terminal connected to the second gate terminal, A first constant current circuit having a fifth voltage terminal for applying a fifth voltage and a ninth voltage terminal for applying a ninth voltage, A second constant current circuit having a sixth voltage terminal for applying a sixth voltage and a tenth voltage terminal for applying a tenth voltage, The device comprises a voltage generating circuit that generates a second voltage based on the first voltage of the first voltage terminal, a fourth voltage based on the third voltage of the third voltage terminal, a fifth voltage, a ninth voltage based on the fifth voltage, a sixth voltage, and a tenth voltage based on the sixth voltage. The first voltage, the second voltage, the third voltage, the fourth voltage, the seventh voltage, the eighth voltage, the fifth voltage, the ninth voltage, the sixth voltage, and the tenth voltage are generated using the circuit reference voltage and the circuit voltage. The second element terminal and the first output terminal are connected. The first element terminal and the second output terminal are connected, The second voltage is applied to the second voltage terminal. The fourth voltage is applied to the fourth voltage terminal. The first voltage terminal and the fifth voltage terminal are set to a common potential. The third voltage terminal and the sixth voltage terminal are set to a common potential. The first driver circuit applies a first off signal or a first on signal to the first gate terminal. The second driver circuit applies a second off signal or a second on signal to the second gate terminal. The first constant current circuit generates a first constant current using the fifth voltage and the ninth voltage, and supplies the first constant current to the first diode. The second constant current circuit generates a second constant current using the sixth voltage and the tenth voltage, and supplies the second constant current to the second diode. The circuit reference voltage and the circuit voltage are isolated from the first voltage, the third voltage, the second voltage, the fourth voltage, the fifth voltage, the ninth voltage, the sixth voltage, and the tenth voltage. The first voltage and the third voltage are isolated from each other. The second voltage and the fourth voltage are isolated from each other. The fifth voltage and the sixth voltage are isolated from each other. The ninth voltage and the tenth voltage are isolated from each other. The first voltage terminal and the first element terminal are connected, A power semiconductor device test apparatus characterized in that the third voltage terminal and the third element terminal are connected.

4. A power semiconductor element test apparatus for testing a semiconductor element component having a first transistor connected to a first element terminal, a third element terminal, and a first gate terminal, a second transistor connected to a second element terminal, the third element terminal, and a second gate terminal, a first diode connected to a fourth element terminal and a fifth element terminal, and a second diode connected to a sixth element terminal and a seventh element terminal, A power supply circuit having a first output terminal and a second output terminal that supplies a test current to the semiconductor element component, A first driver circuit having a first voltage terminal, a second voltage terminal, a seventh voltage terminal, and a terminal connected to the first gate terminal, A second driver circuit having a third voltage terminal, a fourth voltage terminal, an eighth voltage terminal, and a terminal connected to the second gate terminal, A first constant current circuit having a fifth voltage terminal for applying a fifth voltage and a ninth voltage terminal for applying a ninth voltage, A second constant current circuit having a sixth voltage terminal for applying a sixth voltage and a tenth voltage terminal for applying a tenth voltage, The device comprises a voltage generating circuit that generates a second voltage based on the first voltage of the first voltage terminal, a seventh voltage based on the first voltage of the first voltage terminal, a fourth voltage based on the third voltage of the third voltage terminal, an eighth voltage based on the third voltage of the third voltage terminal, a fifth voltage, a ninth voltage based on the fifth voltage, a sixth voltage, and a tenth voltage based on the sixth voltage. The first voltage, the second voltage, the third voltage, the fourth voltage, the seventh voltage, the eighth voltage, the fifth voltage, the ninth voltage, the sixth voltage, and the tenth voltage are generated using the circuit reference voltage and the circuit voltage. The second element terminal and the first output terminal are connected. The first element terminal and the second output terminal are connected, The second voltage is applied to the second voltage terminal. The fourth voltage is applied to the fourth voltage terminal. The seventh voltage is applied to the seventh voltage terminal. The eighth voltage is applied to the eighth voltage terminal. The first driver circuit applies a first off signal or a first on signal to the first gate terminal. The second driver circuit applies a second off signal or a second on signal to the second gate terminal. The first constant current circuit generates a first constant current using the fifth voltage and the ninth voltage, and supplies the first constant current to the first diode. The second constant current circuit generates a second constant current using the sixth voltage and the tenth voltage, and supplies the second constant current to the second diode. The circuit reference voltage and the circuit voltage are isolated from the first voltage, the third voltage, the second voltage, the fourth voltage, the seventh voltage, the eighth voltage, the fifth voltage, the ninth voltage, the sixth voltage, and the tenth voltage. The first voltage and the third voltage are isolated from each other. The second voltage and the fourth voltage are isolated from each other. The seventh voltage and the eighth voltage are isolated from each other. The fifth voltage and the sixth voltage are isolated from each other. The ninth voltage and the tenth voltage are isolated from each other. The first voltage terminal and the first element terminal are connected, A power semiconductor device test apparatus characterized in that the third voltage terminal and the third element terminal are connected.

5. It further comprises a current detection circuit, A resistor circuit is connected to at least one of the first gate terminal and the second gate terminal. The power semiconductor device testing apparatus according to claim 1, 2, 3, or 4, characterized in that the current detection circuit measures the terminal voltage of the resistor circuit.

6. The power semiconductor element test apparatus according to claim 1, 2, 3, or 4, further comprising a first wiring for connecting the first element terminal and the first voltage terminal, and a second wiring for connecting the third element terminal and the third voltage terminal.

7. The device further comprises a switch circuit board on which a first switch circuit and a conductor plate are arranged, and connecting members. The switch circuit board is connected between the second element terminal and the first output terminal. The connecting member is connected to the second element terminal, The first switch circuit is connected to the conductor plate, The power semiconductor device testing apparatus according to claim 1, 2, 3, or 4, characterized in that the connecting member is fitted and connected to the conductor plate.

8. It further comprises a first switch circuit and a second switch circuit, The second switch circuit is connected to the first output terminal and the second output terminal, The first switch circuit is connected to the second element terminal and the first output terminal. When the second switch circuit is turned on, the first output terminal and the second output terminal are short-circuited. The power semiconductor element test apparatus according to claim 1, 2, 3, or 4, characterized in that the test current is supplied to the semiconductor element component when the first switch circuit is turned on.

9. It further comprises a heating and cooling plate and a water leak sensor. The semiconductor element component is placed on the heating and cooling plate. The water leak sensor is positioned around the heating and cooling plate. The power semiconductor device testing apparatus according to claim 1, 2, 3, or 4, characterized in that the operation of the water leak sensor stops the power semiconductor device testing apparatus or issues an alarm.

10. The power semiconductor device testing apparatus has a first chamber and a second chamber. The semiconductor element component is placed in the first chamber. The power supply circuit is located in the second chamber. The power semiconductor device testing apparatus according to claim 1, claim 2, claim 3, or claim 4, characterized in that dry air is injected into the first chamber.

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