Semiconductor module
The semiconductor module addresses the challenge of housing multiple semiconductor chips in a TO package by using an insulating substrate configuration, improving efficiency and reducing complexity in three-level inverters for energy storage and motor drives.
Patent Information
- Application Number
- JP2025022084
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-02-14
- Publication Date
- 2026-08-26
AI Technical Summary
Existing three-level inverters, particularly I-type inverters, face challenges in accommodating multiple semiconductor chips within a Transistor Outline (TO) package due to complex circuit configurations, limiting their application in energy storage systems, uninterruptible power systems, and motor drives.
A semiconductor module composed of multiple semiconductor chips, at least one of which is provided on a lead frame via an insulating substrate, allowing them to be housed within a TO package.
Enables the arrangement of multiple semiconductor chips within a TO package, enhancing efficiency and reducing complexity, thereby improving performance in energy storage systems, uninterruptible power systems, and motor drives.
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Figure 2026136531000001_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to packages of power semiconductors, and particularly to three-level power conversion devices.
Background Art
[0002] Three-level inverters are the mainstream for three-phase inverters used in energy storage systems (ESS), uninterruptible power systems (UPS), and motor drives to achieve high efficiency. There are two types of three-level inverters: I-type and T-type. The I-type can apply low-voltage withstand elements compared to the T-type, so it has cost advantages. However, it requires many elements and the circuit configuration becomes complex. Therefore, multiple elements constituting the I-type are combined into one (Patent Documents 1 to 3). However, none of Patent Documents 1 to 3 assume operation in a TO (Transistor Outline) package. The TO package was developed as a package for transistors and is widely used mainly for discrete devices. It is used to protect semiconductor chips with resin and facilitate mounting on printed circuit boards and the like.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Patent Document 2
Patent Document 3
Summary of the Invention
Problems to be Solved by the Invention
[0004] The objective is to provide a semiconductor module that can accommodate multiple semiconductor chips within a TO package. [Means for solving the problem]
[0005] The semiconductor module according to the present invention is characterized by being composed of a plurality of semiconductor chips, at least one of which is provided on a lead frame via an insulating substrate. [Effects of the Invention]
[0006] According to the present invention, it is possible to provide a semiconductor module in which multiple semiconductor chips can be arranged within a TO package. [Brief explanation of the drawing]
[0007] [Figure 1] Circuit diagram of power conversion device 1 according to the present invention [Figure 2A] Circuit diagram of semiconductor module 100 according to Embodiment 1 of the present invention [Figure 2B] Plan view showing the configuration of semiconductor module 100 according to Embodiment 1 of the present invention [Figure 2C] Cross-sectional view of semiconductor module 100 in Figure 2B, when cut from a to a'. [Figure 2D] Cross-sectional view of semiconductor module 100 in Figure 2B, when cut from a to a'. [Figure 3A] Circuit diagram of semiconductor module 200 according to Embodiment 2 of the present invention [Figure 3B] Plan view showing the configuration of semiconductor module 200 according to Embodiment 2 of the present invention [Figure 4A] Circuit diagram of semiconductor module 300 according to Embodiment 3 of the present invention [Figure 4B] Plan view showing the configuration of semiconductor module 300 according to Embodiment 3 of the present invention. [Figure 5] Plan view showing the configuration of a semiconductor module according to modified example 1-1 of Embodiment 1 of the present invention. [Figure 6]Plan view showing the configuration of the semiconductor module according to Modified Example 1-2 of Embodiment 1 of the present invention [Figure 7] Plan view showing the configuration of the semiconductor module according to Modified Example 2-1 of Embodiment 2 of the present invention [Figure 8] Plan view showing the configuration of the semiconductor module according to Modified Example 2-2 of Embodiment 2 of the present invention [Figure 9] Plan view showing the configuration of the semiconductor module according to Modified Example 3 of Embodiment 3 of the present invention [Figure 10A] Circuit diagram of the semiconductor module 400 according to the power conversion device 1 [Figure 10B] Plan view showing the configuration of the semiconductor module 400 according to the power conversion device 1 [Figure 11A] Circuit diagram of the semiconductor module 500 according to the power conversion device 1 [Figure 11B] Plan view showing the configuration of the semiconductor module 500 according to the power conversion device 1 [Figure 12A] Circuit diagram showing Combination 1 of the semiconductor modules constituting the power conversion device 1 [Figure 12B] Schematic diagram of the semiconductor module corresponding to FIG. 12A [Figure 13A] Circuit diagram showing Combination 2 of the semiconductor modules constituting the power conversion device 1 [Figure 13B] Schematic diagram of the semiconductor module corresponding to FIG. 13A [Figure 14A] Circuit diagram showing Combination 3 of the semiconductor modules constituting the power conversion device 1 [Figure 14B] Schematic diagram of the semiconductor module corresponding to FIG. 14A [Figure 15A] Circuit diagram showing Combination 4 of the semiconductor modules constituting the power conversion device 1<..The following descriptions of embodiments for carrying out the present invention will be made with reference to the drawings, but the following embodiments are not intended to limit the invention as defined in the claims. Furthermore, not all combinations of features described in the embodiments are necessarily essential to the solution of the invention.
[0009] In this specification, the terms "same" or "equal" may include cases where there are errors due to manufacturing variations, etc. Such errors are, for example, within 10%.
[0010] In this specification, one side of the lead frame parallel to its thickness direction is referred to as "upper," and the other side as "lower." The directions of "upper" and "lower" are not limited to the direction of gravity or the direction when the semiconductor module is mounted on a substrate or the like.
[0011] In this specification, various types of switches and diodes may be listed, but in the circuit diagrams, for the sake of simplicity, the general electrical symbols for IGBTs and semiconductor diodes will be used for switches and diodes, respectively.
[0012] While the materials of the components that make up a semiconductor module are sometimes listed, components with the same name, regardless of their designation, may be made of similar materials or have the same shape.
[0013] [Power converter] Figure 1 shows a circuit diagram of the power conversion device 1 according to the present invention. S1 to S4 are switches. D1 to D6 are diodes. T1 to T4 are terminals for connecting to an external circuit. Switch S m (where m is any natural number less than or equal to 3) and switch S m+1The high-potential terminals of switches S1 to S4 are connected to each other. Diodes D1 to D4 are connected in antiparallel to each of switches S1 to S4. That is, the low-potential terminals of switches S1 to S4 are connected to the anode terminals of diodes D1 to D4, and the high-potential terminals of switches S1 to S4 are connected to the cathode terminals of diodes D1 to D4. The connection point between switches S2 and S3 is connected to terminal T4. The high-potential terminal of switch S1 is connected to terminal T1, and the low-potential terminal of switch S4 is connected to terminal T3. Diodes D5 and D6 are connected in series between the connection point between switches S1 and S2 and the connection point between switches S3 and S4, and the connection point between diodes D5 and D6 is connected to terminal T2. Furthermore, the cathode of diode D5 is connected to the connection point between switch S1 and switch S2, the anode of diode D6 is connected to the connection point between switch S3 and switch S4, and the anode of diode D5 and the cathode of diode D6 are connected to the connection point between diode D5 and diode D6.
[0014] A three-level inverter like the one described above, characterized by having four switches connected in series, is called an I-type.
[0015] The operation of this circuit is explained below. A constant voltage is applied between terminals T1 and T2, and between terminals T2 and T3 by an external circuit. For example, a voltage of 600V is applied to each. In this case, 1200V is applied between terminals T1 and T3. Terminal T3 is, for example, grounded. By turning on switches S1 and S2, and turning off switches S3 and S4, the potential of terminal T4 becomes approximately the same as the potential of terminal T1, at 1200V. In reality, the potentials of terminals T4 and T1 will differ due to voltage drops through resistors such as switches and diodes, but since this voltage drop is negligible compared to the 600V applied between the terminals, the potential of terminal T4 will be approximately the same as the potential of terminal T1. The same expression will be used below for the same reason. By turning on switches S2 and S3, and turning off switches S1 and S4, the potential of terminal T4 becomes approximately the same as the potential of terminal T2, at 600V. By turning on switches S3 and S4 and turning off switches S1 and S2, the potential at terminal T4 becomes approximately the same as the potential at terminal T3, which is 0V. In other words, by periodically switching switches S1 to S4 on and off, the constant voltage applied between terminals T1 and T2 and between terminals T2 and T3 can be output as an AC voltage from terminal T4.
[0016] Switches S1-S4 and diodes D1-D6 may be vertical semiconductor chips.
[0017] The materials for diodes D1 to D6 may be silicon. However, they are not limited to silicon and may be wide-bandgap semiconductors. For example, they may be SiC, GaN, diamond, AlN, or ZnO. Furthermore, diodes D1 to D6 may have similar performance, but in order to minimize circuit losses, it is desirable that the forward voltage of diodes D5 and D6 is smaller than that of diodes D1 to D4, and that the reverse recovery loss of diodes D1 to D4 is smaller than that of diodes D5 and D6. The reason is that the reverse recovery loss of diodes D1 to D4 increases the turn-on loss of switches S1 to S4, and the conduction time also depends on the on / off period of switches S1 to S4. Therefore, the impact of reverse recovery loss on the overall inverter loss is greater than that of conduction loss due to forward voltage. On the other hand, diodes D5 and D6 do not affect the on / off period of switches S1 to S4, and the conduction loss due to forward voltage has a greater impact on the overall inverter loss than the reverse recovery loss.
[0018] The material of switches S1 to S4 may be silicon. Furthermore, it is not limited to silicon; it may also be a wide-bandgap semiconductor. Additionally, each switch S1 to S4 may be an IGBT, or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
[0019] The combinations of switches and diodes, namely switch S1 and diode D1, switch S2 and diode D2, switch S3 and diode D3, and switch S4 and diode D4, may each be an integrated semiconductor chip, such as an RC (Reverse Conducting)-IGBT or a MOSFET.
[0020] [Embodiment 1] Figures 2A, 2B, 2C, and 2D show the configuration of the semiconductor module 100 according to Embodiment 1. Figure 2A is a circuit diagram of the semiconductor module 100, Figure 2B is a plan view, and Figures 2C and 2D are cross-sectional views of the semiconductor module 100 taken along the line a-a' shown in Figure 2B. For convenience, only the outer shape of the resin 112 is shown with dashed lines in Figures 2B, 2C, and 2D. As shown in Figure 2A, the semiconductor module 100 is composed of the switch S1, diode D1, and diode D5 shown in Figure 1. As shown in Figure 2B, the semiconductor module 100 has an insulating substrate 105, a diode 108, and a switch 109 on a lead frame 101. The insulating substrate 105 has a wiring layer 106 on one side. A diode 107 is also provided on the wiring layer 106. Diode 107 has an anode pad 107' on the side facing away from the lead frame 101. Similarly, diode 108 and switch 109 also have an anode pad 108' and an emitter pad 109' on the sides facing away from the lead frame 101, respectively. In this embodiment, there is a wiring 111a connecting the first lead 104 and the emitter pad 109', a wiring 111b connecting the emitter pad 109' and the anode pad 108', a wiring 111c connecting the anode pad 108' and the wiring layer 106, and a wiring 111d connecting the anode pad 107' and the second lead 102. Switch 109 is also equipped with a gate pad 110. This gate pad 110 is connected to the third lead 103 with a wiring 111e. In Embodiment 1, switch S1, diode D1, and diode D5 correspond to switch 109, diode 108, and diode 107, respectively.
[0021] The lead frame 101, the first lead 104, the second lead 102, and the third lead 103 are each spaced apart and have extended portions, which are parallel to each other. Furthermore, the sides of the extended portions of the first lead 104, the second lead 102, and the third lead 103 that are perpendicular to the direction of extension face one side of the lead frame. The lead and lead frame have a similar positional relationship in other embodiments.
[0022] Diodes 107, 108, 109, 105, and 111a-111e on the lead frame 101 are covered by resin 112, but portions of the lead frame 101 and leads 102-104 protrude from the resin 112 in the same direction.
[0023] The lead frame 101, the first lead 104, the second lead 102, the third lead 103, the wiring layer 106, the anode pads 107', 108', the emitter pad 109', and the gate pad 110 are made of a conductive material, which may be, for example, aluminum, iron, cobalt, nickel, copper, or alloys containing these materials.
[0024] Wires 111a to 111e may be wire-bonded or made of sheet metal. The number of wires 111a to 111e is not limited to those shown in the drawings and can be changed as appropriate. Wires 111a to 111e are made of a conductive material, which may be, for example, aluminum, copper, gold, or alloys containing these materials.
[0025] The insulating substrate 105 may be made of an insulator such as ceramic or resin. Furthermore, on the insulating substrate 105, a conductive layer similar to the wiring layer 106 may be provided on the other side facing the opposite direction from the side on which the wiring layer 106 is located.
[0026] Diodes 107 and 108 may have similar performance, but to minimize circuit losses, it is desirable that the forward voltage of diode 107 is smaller than that of diode 108, and the reverse recovery loss of diode 108 is smaller than that of diode 107.
[0027] As shown in Figure 2C, the lead frame 101 and diode 108, and the wiring layer 106 and diode 107 are joined (bonded) via the joining member 113.
[0028] Although not specifically shown in the diagram here, the lead frame 101 and the switch 109 are similarly joined via the joining member 113.
[0029] The joining member 113 may be, for example, lead, tin, silver, or an alloy containing these materials.
[0030] Furthermore, the lead frame 101 and the insulating substrate 105 are joined together via a bonding member 114.
[0031] The joining member 114 may be an insulating material such as epoxy resin or silicone resin, and a material with high thermal conductivity is preferred. By selecting a material with high thermal conductivity, the heat generated by the diode 107 can be efficiently released to the lead frame 101.
[0032] The configuration in Figure 2D differs from that shown in Figure 2C. The insulating substrate 105 is composed of an insulating layer 105a and a conductive layer 105b, with the conductive layer 105a provided between the insulating layer 105a and the bonding member 114. The conductive layer 105a, like the wiring layer 106, may be made of, for example, aluminum, iron, cobalt, nickel, copper, or an alloy containing these materials. Providing the conductive layer 105a makes it easier to transfer the heat generated by the diode 107 to the lead frame 101.
[0033] In this case, the joining member 114 may be an insulating material such as epoxy resin or silicone resin, and may be lead, tin, silver, or an alloy containing them, with a material having high thermal conductivity being preferred. By selecting a material with high thermal conductivity, the heat generated by the diode 107 can be efficiently released to the lead frame 101.
[0034] With the above configuration, a semiconductor module consisting of switch S1, diode D1, and diode D5 can be housed in a TO package. For the sake of simplicity, the diagrams and descriptions are omitted, but in other embodiments as well, the semiconductor chip, insulating substrate, wiring, and a portion of the lead frame and leads that constitute the semiconductor module are similarly covered with resin 112. In other embodiments, the lead frames and switches, and the lead frames and diodes are similarly joined together by a conductive material. Furthermore, the lead frames and insulating substrates are similarly joined together by a conductive or insulating material.
[0035] [Embodiment 2] Figures 3A and 3B show the configuration of a semiconductor module 200 according to Embodiment 2, where Figure 3A is a circuit diagram of the semiconductor module 200 and Figure 3B is a plan view. As shown in Figure 3A, the semiconductor module 200 is composed of the switch S3, diode D3, and diode D6 in Figure 1. As shown in Figure 3B, the semiconductor module 200 is provided with an insulating substrate 205, a diode 208, and a switch 209 on a lead frame 201. The insulating substrate 205 has a wiring layer 206 on one side. A diode 207 is also provided on the wiring layer 206. The diode 207 has an anode pad 207' on the side facing the lead frame 201 and the side facing the opposite direction. Similarly, the diode 208 and switch 209 also have an anode pad 208' and an emitter pad 209' on the side facing the lead frame 201 and the side facing the opposite direction, respectively. In this embodiment, the circuit includes wiring 211a connecting the first lead 204 to the emitter pad 209', wiring 211b connecting the emitter pad 209' to the anode pad 208', wiring 211c connecting the anode pad 208' to the anode pad 207', and wiring 211d connecting the wiring layer 206 to the second lead 202. The switch 209 is equipped with a gate pad 210. The circuit includes wiring 211e connecting this gate pad 210 to the third lead 203. Note that in Embodiment 2, the switch S3, diode D3, and diode D6 correspond to the switch 209, diode 208, and diode 207, respectively.
[0036] Diodes 207 and 208 may have similar performance, but to minimize circuit losses, it is desirable that the forward voltage of diode 207 is smaller than that of diode 208, and the reverse recovery loss of diode 208 is smaller than that of diode 207.
[0037] This configuration allows a semiconductor module consisting of switch S3, diode D3, and diode D6 to be housed within a TO package.
[0038] [Embodiment 3] Figures 4A and 4B show the configuration of a semiconductor module 300 according to Embodiment 3, where Figure 4A is a circuit diagram of the semiconductor module 300 and Figure 4B is a plan view. As shown in Figure 4A, the semiconductor module 300 is composed of the switch S4, diode D4, and diode D6 in Figure 1. As shown in Figure 4B, the semiconductor module 300 is provided with an insulating substrate 305, a diode 308, and a switch 309 on a lead frame 301. The insulating substrate 305 has a wiring layer 306 on one side. A diode 307 is also provided on the wiring layer 306. The diode 307 has an anode pad 307' on the side facing the lead frame 301 and the side facing the opposite direction. Similarly, the diode 308 and switch 309 also have an anode pad 308' and an emitter pad 309' on the side facing the lead frame 301 and the side facing the opposite direction, respectively. In this embodiment, the wiring includes a wiring 311a connecting the first lead 304 to the emitter pad 309', a wiring 311b connecting the emitter pad 309' to the anode pad 308', a wiring 311c connecting the lead frame 301 to the anode pad 307', and a wiring 311d connecting the wiring layer 306 to the second lead 302. The switch 309 is equipped with a gate pad 310. The wiring includes a wiring 311e connecting this gate pad 310 to the third lead 303. Note that in Embodiment 3, the switch S4, diode D4, and diode D6 correspond to the switch 309, diode 308, and diode 307, respectively.
[0039] Diodes 307 and 308 may have similar performance, but to minimize circuit losses, it is desirable that the forward voltage of diode 307 is smaller than that of diode 308, and the reverse recovery loss of diode 308 is smaller than that of diode 307.
[0040] This configuration allows a semiconductor module consisting of switch S4, diode D4, and diode D6 to be housed within a TO package.
[0041] The present invention is not limited to the configuration of the embodiments described above and can be modified as appropriate. For example, switches 109, 209, and 309 can be replaced with RC-IGBTs or MOSFETs, as mentioned above. It is also possible to change the position of the gate pads on the switches and, consequently, the position of the leads.
[0042] [Example 1-1] Figure 5 shows a modified example 1-1 of Embodiment 1. An insulating substrate 105 and a switch 109 are provided on the lead frame 101. The insulating substrate 105 has a wiring layer 106 on one side. A diode 107 is also provided on the wiring layer 106. The diode 107 has an anode pad 107' on the side facing away from the lead frame 101. Similarly, the diode switch 109 also has an emitter pad 109' on the side facing away from the lead frame 101. In this modified example, there is a wiring 111a connecting the first lead 104 and the emitter pad 109', a wiring 111b connecting the emitter pad 109' and the wiring layer 106, and a wiring 111d connecting the anode pad 107' and the second lead 102. A gate pad 110 is mounted on the switch 109. There is a wiring 111e connecting this gate pad 110 and the third lead 103.
[0043] In the modified example 1-1, the switch 109 is limited to either an RC-IGBT or a MOSFET.
[0044] By having the switch 109 also perform the function of the diode 108 in Embodiment 1, the number of semiconductor chips in the semiconductor module can be reduced, making it possible to fit it into a smaller TO package than in Embodiment 1.
[0045] [Variation 1-2] Figure 6 shows a modified example 1-2 of Embodiment 1. This differs from Modification 1-1 in that the first lead 104 is positioned between the second lead 102 and the third lead 103, and the gate pad 110 mounted on the switch 109 is positioned in the opposite direction to the diode 107. This configuration prevents the wiring 111b from coming into close proximity with the wiring 111e even if the wiring 111b is extended from the emitter pad 109' in any direction on the wiring layer 106. Therefore, improved reliability can be expected. In addition, compared to Modification 1-1, the insulating substrate 105 can be made into a simpler shape, simplifying the manufacturing process.
[0046] In modified example 1-2, the switch 109 is limited to either an RC-IGBT or a MOSFET.
[0047] [Modification 2-1] Figure 7 shows a modified example 2-1 of Embodiment 2. An insulating substrate 205 and a switch 209 are provided on the lead frame 201. The insulating substrate 205 is provided with a wiring layer 206 and a wiring layer 214, which are arranged separately from each other, and a diode 207 is placed on one of the wiring layers 206. The diode 207 is provided with an anode pad 207' on the side facing away from the lead frame 201. Similarly, the switch 209 is also provided with an emitter pad 209' on the side facing away from the lead frame 201. In this modified example, there is a wiring 211a connecting the first lead 204 and the emitter pad 209', a wiring 211b connecting the emitter pad 209' and the wiring layer 214, a wiring 211c connecting the wiring layer 214 and the anode pad 207', and a wiring 211d connecting the wiring layer 206 and the second lead 202. The switch 209 is equipped with a gate pad 210. It also has a wiring 211e that connects this gate pad 210 to the third lead 203.
[0048] In modified example 2-1, the switch 209 is limited to either an RC-IGBT or a MOSFET.
[0049] [Modification 2-2] Figure 8 shows a modified example 2-2 of Embodiment 2. An insulating substrate 205 and a switch 209 are provided on the lead frame 201. The insulating substrate 205 has a wiring layer 206 on one side. A diode 207 is also arranged on the wiring layer 206. The diode 207 has an anode pad 207' on the side facing away from the lead frame 201. Similarly, the switch 209 also has an emitter pad 209' on the side facing away from the lead frame 201. In this modified example, there is a wiring 211a connecting the first lead 204 and the emitter pad 209', a wiring 211b connecting the emitter pad 209' and the anode pad 207', and a wiring 211d connecting the wiring layer 206 and the second lead 202. The first lead 204 is positioned between the second lead 202 and the third lead 203, and the gate pad 210 mounted on the switch 209 is positioned in the opposite direction to the diode 207.
[0050] By positioning the gate pad 210 mounted on the switch 209 in the opposite direction to the diode 207, it is possible to prevent the wiring 211b from coming into close proximity with the wiring 211e. Therefore, improved reliability can be expected. In addition, the emitter pad 209' and the anode pad 207' can be directly connected by the wiring 211b. As a result, it becomes unnecessary to provide the wiring layer 214 of the modified example 2-1, and it becomes possible to fit the device into a smaller TO package than Embodiment 2 and Modified Example 2-1. Furthermore, the number of components can be reduced, which lowers manufacturing costs.
[0051] In modified example 2-2, the switch 209 is limited to either an RC-IGBT or a MOSFET.
[0052] [Difference 3] Figure 9 shows a modified example 3 of Embodiment 3. An insulating substrate 305 and a switch 309 are provided on a lead frame 301. The insulating substrate 305 has a wiring layer 306 on one side. A diode 307 is also provided on the wiring layer 306. The diode 307 has an anode pad 307' on the side facing away from the lead frame 301. Similarly, the switch 309 also has an emitter pad 309' on the side facing away from the lead frame 301. In this modified example, there is a wiring 311a connecting the first lead 304 and the emitter pad 309', a wiring 311c connecting the lead frame 301 and the anode pad 307', and a wiring 311d connecting the wiring layer 306 and the second lead 302. A gate pad 310 is mounted on the switch 309. There is a wiring 311e connecting this gate pad 310 and the third lead 303.
[0053] In modified example 3, the switch 309 is limited to either an RC-IGBT or a MOSFET.
[0054] By having the switch 309 also perform the function of the diode 308 in Embodiment 1, the number of semiconductor chips in the semiconductor module can be reduced, making it possible to fit it into a smaller TO package than in Embodiment 1.
[0055] Figures 10A and 10B show the configuration of a semiconductor module 400 that can be incorporated into the power converter 1 shown in Figure 1. Figure 10A is a circuit diagram of the semiconductor module 400, and Figure 10B is a plan view. As shown in Figure 10A, the semiconductor module 400 is composed of the switch S2, diode D2, and diode D5 shown in Figure 1. As shown in Figure 10B, the semiconductor module 400 is equipped with diodes 407, 408, and a switch 409 on a lead frame 401. Diode 407 has an anode pad 407' on the side facing the lead frame 401 and the side facing the opposite direction. Similarly, diode 408 and switch 409 are also provided with an anode pad 408' and an emitter pad 409' on the side facing the lead frame 401 and the side facing the opposite direction, respectively. The circuit includes wiring 411a connecting the first lead 404 to the emitter pad 409', wiring 411b connecting the emitter pad 409' to the anode pad 408', and wiring 411d connecting the anode pad 407' to the second lead 402. The switch 409 is equipped with a gate pad 410. The circuit includes wiring 411e connecting this gate pad 410 to the third lead 403. Here, switch S2, diode D2, and diode D5 correspond to switch 409, diode 408, and diode 407, respectively.
[0056] Figures 11A and 11B show the configuration of a semiconductor module 500 that can be incorporated into the power converter 1 shown in Figure 1. Figure 11A is a circuit diagram of the semiconductor module 500, and Figure 11B is a plan view. As shown in Figure 11A, the semiconductor module 500 is the switch S in Figure 1. n (n is any natural number less than or equal to 4) and diode D nIt is composed of the following. As shown in Figure 11B, the semiconductor module 500 has a diode 508 and a switch 509 on a lead frame 501, and the diode 508 has an anode pad 508' on the side facing the lead frame 501 and on the side facing the opposite direction. Similarly, the switch 509 also has a 509' facing the opposite direction from the lead frame 501. It has wiring 511a connecting the second lead 502 and the emitter pad 509', and wiring 511d connecting the anode pad 508' and the second lead 502. The switch 509 is equipped with a gate pad 510. It has wiring 511e connecting this gate pad 510 and the third lead 503. Here, switch S n , diode D n These correspond to switch 509 and diode 508, respectively.
[0057] [Combination 1] Figures 12A and 12B show a combination of semiconductor modules used to fabricate the power converter 1 shown in Figure 1. Figure 12A is a circuit diagram, and Figure 12B is a schematic diagram of the semiconductor modules that make up the circuit. The power converter 1 can be fabricated by mounting one semiconductor module 100, one semiconductor module 200, and two semiconductor modules 500 on a printed circuit board or the like.
[0058] [Combination 2] Figures 13A and 13B show combinations of semiconductor modules 2 for fabricating the power converter 1 shown in Figure 1. Figure 13A is a circuit diagram, and Figure 13B is a schematic diagram of the semiconductor modules that make up the circuit. The power converter 1 can be fabricated by mounting one semiconductor module 100, one semiconductor module 300, and two semiconductor modules 500 on a printed circuit board or the like.
[0059] [Combination 3] Figures 14A and 14B show combinations of semiconductor modules 3 for fabricating the power converter 1 shown in Figure 1. Figure 14A is a circuit diagram, and Figure 14B is a schematic diagram of the semiconductor modules that make up the circuit. The power converter 1 can be fabricated by mounting one semiconductor module 400, one semiconductor module 200, and two semiconductor modules 500 on a printed circuit board or the like.
[0060] [Combination 4] Figures 15A and 15B show combinations of semiconductor modules 4 used to fabricate the power converter 1 shown in Figure 1. Figure 15A is a circuit diagram, and Figure 15B is a schematic diagram of the semiconductor modules that make up the circuit. The power converter 1 can be fabricated by mounting one semiconductor module 400, one semiconductor module 300, and two semiconductor modules 500 on a printed circuit board or the like.
[0061] The semiconductor modules 100 to 300 used in combinations 1 to 4 can be appropriately changed to the modified examples 1-1, 1-2, 2-1, 2-2, and 3. Furthermore, the present invention is not limited to the above embodiments, modifications, combinations, etc., and any changes or improvements that can be made by those skilled in the art based on the idea of the present invention are also within the technical scope of the present invention. [Explanation of Symbols]
[0062] 1: Power converter T1~T4: Terminals D1~D6, 107, 108, 207, 208, 307, 308, 407, 408, 508: Diodes S1~S4, 109, 209, 309, 409, 509: Switch 107', 108', 207', 208', 307', 308', 407', 408', 508': Anode pads 109', 209', 309', 409', 509': Emitter pad 100, 200, 300, 400, 500: Semiconductor modules 101, 201, 301, 401, 501: Lead frame 102, 202, 302, 402, 502: Second lead 103, 203, 303, 403, 503: Third lead 104, 204, 304, 404: First lead 105, 205, 305: Insulating substrate 105a: Insulating layer 105b: Conductive layer 106, 206, 306, 214: Wiring layer 110, 210, 310, 410, 510: Gate pads 111a, 111b, 111c, 111d, 111e, 211a, 211b, 211c, 211d, 211e, 311a, 311b, 311c, 311d, 311e, 411a, 411b, 411d, 411e, 511a, 511d, 511e: Wiring 112: Resin 113, 114: Joining members
Claims
1. One lead frame and multiple leads, Multiple semiconductor chips arranged on the lead frame, The lead frame comprises an insulating substrate having a wiring layer, The plurality of semiconductor chips comprises at least a first semiconductor chip and a second semiconductor chip, The first semiconductor chip and the second semiconductor chip each have a first main electrode and a second main electrode on their respective first and second main surfaces, respectively. The first main surface of the insulating substrate faces the lead frame, and the second main surface of the insulating substrate has the wiring layer. The first main electrode of the first semiconductor chip is electrically connected to the lead frame via a conductive material. The first main electrode of the second semiconductor chip is electrically connected to the wiring layer of the insulating substrate via a conductive material. The first semiconductor chip comprises a first wiring that electrically connects the second main electrode of the first semiconductor chip to the first lead among the plurality of leads. Semiconductor module.
2. The plurality of leads are arranged along a first direction which is parallel to one side of the lead frame. The plurality of leads extend in a direction perpendicular to the first direction, The first semiconductor chip and the second semiconductor chip are arranged in the first direction. The semiconductor module according to claim 1.
3. The second semiconductor chip comprises a second wiring that electrically connects the second main electrode of the second semiconductor chip to the second lead of the plurality of leads. The semiconductor module according to claim 1.
4. The third semiconductor chip comprises a first main electrode and a second main electrode on a first main surface and a second main electrode on a second main surface, respectively. The first main electrode of the third semiconductor chip is electrically connected to the lead frame via a conductive material. The semiconductor module according to claim 3.
5. The third semiconductor chip comprises a third wiring that electrically connects the second main electrode of the third semiconductor chip and the second main electrode of the first semiconductor chip. The semiconductor module according to claim 4.
6. The wiring includes a second wiring that electrically connects the wiring layer and the second leads of the plurality of leads. The semiconductor module according to claim 1.
7. The third semiconductor chip comprises a first main electrode and a second main electrode on a first main surface and a second main electrode on a second main surface, respectively. The first main electrode of the third semiconductor chip is electrically connected to the lead frame via a conductive material. The semiconductor module according to claim 6.
8. The third semiconductor chip comprises a third wiring that electrically connects the second main electrode of the third semiconductor chip and the second main electrode of the first semiconductor chip. The semiconductor module according to claim 7.
9. The third semiconductor chip comprises a first main electrode and a second main electrode on a first main surface and a second main electrode on a second main surface, respectively. The first main electrode of the third semiconductor chip is electrically connected to the lead frame via a conductive material. The semiconductor module according to claim 1.
10. The first semiconductor chip described above has a transistor, The control electrode of the transistor is arranged on the second main surface of the first semiconductor chip. The system includes a second wiring that electrically connects the control electrode and the third lead of the plurality of leads. The semiconductor module according to claim 1.
11. The control electrode is located on the second main surface of the first semiconductor chip, on the side of the second semiconductor chip. The semiconductor module according to claim 10.
12. The system comprises a sealing resin covering the plurality of semiconductor chips and the wiring, The plurality of leads protrude from the sealing resin in a second direction perpendicular to the first direction. The semiconductor module according to claim 1.
13. The second semiconductor chip and the third semiconductor chip are diodes. The semiconductor module according to claim 9.
14. The first semiconductor chip is an IGBT. The semiconductor module according to claim 1.
15. The first semiconductor chip is a MOSFET. The semiconductor module according to claim 1.
16. The forward voltage of the second semiconductor chip is smaller than that of the third semiconductor chip. The reverse recovery loss of the third semiconductor chip is smaller than that of the second semiconductor chip. The semiconductor module according to claim 13.
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