Semiconductor device and method for manufacturing a semiconductor device

Abstract

A semiconductor device is provided, comprising: a sealing layer having a semiconductor chip and an electrode pillar disposed on the side surface of the semiconductor chip via a resin; and a first redistribution layer provided on the first surface of the sealing layer, wherein the first redistribution layer is provided on the first surface of the semiconductor chip facing the first surface of the sealing layer and includes a first conductive portion that electrically connects a first terminal portion exposed on the first surface of the sealing layer and one end surface of the electrode pillar exposed on the first surface of the sealing layer.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

Background Art

[0002] Patent Document 1 describes a technique of "extracting an electrode on the semiconductor substrate side without the need for through-wiring technology in an image sensor that requires extracting an electrode on the side opposite to the substrate". Patent Document 2 describes a technique of "a package for an image sensor or a large-power LSI having a glass substrate or a high heat dissipation substrate on one surface and extracting an external electrode from the opposite surface". Patent Document 3 describes a technique of "aggregating processes that require facilities close to the previous process into parts offline when manufacturing a chip size two-sided connection package that can be freely combined with other packages of the same configuration vertically and horizontally". Patent Document 4 describes a technique for "providing a semiconductor package capable of miniaturization in a memory package in which a plurality of semiconductor memory chips are electrically connected by TSVs". [Prior Art Documents] [Patent Documents] [Patent Document 1] Japanese Unexamined Patent Application Publication No. 2009-70882 [Patent Document 2] Japanese Patent No. 5690466 [Patent Document 3] Japanese Patent No. 5820911 [Patent Document 4] Japanese Unexamined Patent Application Publication No. 2020-68264

Summary of the Invention

Problems to be Solved by the Invention

[0003] There is a demand for a semiconductor package such as a gas sensor including an optical element that is thin, has many terminals, is low-cost and enables two-sided terminal connection.

Means for Solving the Problems

[0004] In a first embodiment of the present invention, a semiconductor device is provided comprising: a sealing layer having a semiconductor chip and an electrode pillar disposed via a resin facing the side surface of the semiconductor chip; and a first redistribution layer provided on a first surface of the sealing layer, wherein the first redistribution layer is provided on the first surface of the semiconductor chip facing the first surface of the sealing layer and includes a first conductive portion that electrically connects a first terminal portion exposed on the first surface of the sealing layer and one end surface of the electrode pillar exposed on the first surface of the sealing layer.

[0005] In the semiconductor device, the first terminal portion may have a bump. The first terminal portion and the first conductive portion of the semiconductor chip may be electrically connected via the bump.

[0006] Any of the semiconductor devices may further include a ball terminal provided on the electrode pillar exposed on the side of the first redistribution layer opposite to the sealing layer side or on the first surface of the sealing layer, and electrically connected to the conductive portion.

[0007] In any of the semiconductor devices, the thickness of the first redistribution layer may be 0.3 mm or less.

[0008] Any of the semiconductor devices may further include a second redistribution layer provided on the second surface of the sealing layer opposite to the first surface, which is electrically connected to a second terminal portion including a second conductive portion provided on the second surface of the semiconductor chip opposite to the first surface.

[0009] In any of the semiconductor devices, a current path may be formed between the first conductive portion and the second conductive portion via the semiconductor chip.

[0010] In any of the semiconductor devices, a portion of the side surface of the electrode pillar may be exposed from the side surface of the sealing layer.

[0011] In any of the semiconductor devices, the first redistribution layer may include a transparent region in at least a portion of the region facing the semiconductor chip, which is made of a transparent material that transmits light from outside the first redistribution layer to the semiconductor chip, or transmits light emitted from the semiconductor chip to the outside of the first redistribution layer.

[0012] Any of the semiconductor devices may include a plurality of electrode pillars disposed within the sealing layer. At least two of the plurality of electrode pillars may be electrically connected.

[0013] In any of the semiconductor devices, the semiconductor chip may have a semiconductor stack portion on the first surface facing the first redistribution layer that realizes the functions provided by the semiconductor chip. The surface of the first redistribution layer opposite to the surface facing the first surface of the sealing layer may be the mounting surface of the semiconductor device.

[0014] Any of the semiconductor devices, or semiconductor chips, may have a semiconductor stack portion on a second surface opposite to the first surface facing the first redistribution layer that realizes the functions provided by the semiconductor chip. The surface of the first redistribution layer opposite to the surface facing the first surface of the sealing layer may be the mounting surface of the semiconductor device.

[0015] In any of the semiconductor devices, the sealing layer may include a plurality of semiconductor chips.

[0016] In any of the semiconductor devices, the plurality of semiconductor chips may be stacked in the thickness direction of the sealing layer.

[0017] In any of the aforementioned semiconductor devices, the semiconductor chip may include an optical element.

[0018] Any of the semiconductor devices may have a conductive structure located opposite the side surface of the semiconductor chip and exposed on the side surface of the sealing layer.

[0019] In any of the semiconductor devices, the conductive structure may divide the sealing portion that seals the semiconductor chip in the sealing layer into two regions at least one of the first cross-section of the sealing layer intersecting with the first surface of the semiconductor chip or the surface on the first redistribution layer side.

[0020] In the conductive structure of any of the semiconductor devices, the thickness of one portion facing the side surface of the semiconductor chip may be less than the thickness of another portion exposed on the side surface of the sealing layer.

[0021] In any of the semiconductor devices, the sealing layer may further have a conductive structure comprising: a first portion facing the side surface of the semiconductor chip and extending in a direction along the side surface of the semiconductor chip; a second portion extending from one end of the first portion in a direction away from the side surface of the semiconductor chip; and a third portion extending from the other end of the first portion in a direction away from the side surface of the semiconductor chip.

[0022] In any of the semiconductor devices, a portion of the second portion and a portion of the third portion are exposed on the side surface of the sealing layer, and the thickness of the portion of the second portion and the portion of the third portion is thinner than that of the first portion.

[0023] A second aspect of the present invention provides a method for manufacturing a semiconductor device, comprising the steps of: forming a sealing layer by sealing one surface of a temporary support substrate with a resin while arranging a semiconductor chip and an electrode pillar at intervals on one surface of the temporary support substrate; peeling the temporary support substrate from the first surface of the sealing layer, and then forming a first redistribution layer on the first surface of the sealing layer that electrically connects a first terminal portion provided on the first surface of the semiconductor chip exposed on the first surface of the sealing layer with one end surface of the electrode pillar exposed on the first surface of the reconfigured substrate; scraping the resin from the second surface of the sealing layer opposite to the first surface until the other end surface of the electrode pillar is exposed; and forming a second redistribution layer on the second surface of the sealing layer where the other end surface of the electrode pillar is exposed, which electrically connects to the other end surface of the electrode pillar.

[0024] In a third aspect of the present invention, there are steps of forming a first rewiring layer on one surface of a temporary support substrate, forming electrode pillars electrically connected to the first rewiring layer on a surface of the first rewiring layer opposite to the surface on the temporary support substrate side, arranging semiconductor chips electrically connected to the electrode pillars via the first rewiring layer at intervals from the electrode pillars on the surface of the first rewiring layer opposite to the surface on the temporary support substrate side, sealing the surface of the first rewiring layer opposite to the surface on the temporary support substrate side, the other end surface of the electrode pillar opposite to the one end surface on the first rewiring layer side, and the surface of the semiconductor chip opposite to the surface on the first rewiring layer side with resin in a state where the electrode pillars and the semiconductor chips are arranged at intervals, shaving the resin until the other end surface of the electrode pillar is exposed, and forming a second rewiring layer electrically connected to the electrode pillars on the surface of the resin opposite to the surface on the first rewiring layer side, the other end surface of the electrode pillar, and the surface of the semiconductor chip opposite to the surface on the first rewiring layer side after peeling the temporary support substrate from the first rewiring layer. A method for manufacturing a semiconductor device is provided.

[0025] Note that the above summary of the invention does not enumerate all the features of the present invention. Also, sub - combinations of these feature groups can also be inventions.

Brief Description of the Drawings

[0026] [Figure 1] An example of a cross - sectional view of a semiconductor device 500 according to an embodiment is shown. [Figure 2A] An example of a plan view of the semiconductor device 500 of FIG. 1 with the substrate 60 and the ball terminals 62 removed, viewed from the surface 510a side of the encapsulation layer 510. [Figure 2B] An example of a plan view of the semiconductor device 500 of FIG. 1 viewed from the surface 510b side of the encapsulation layer 510. [Figure 3] An example of a cross - sectional view of a semiconductor device 500 according to an embodiment is shown. [Figure 4A]This is an example of a plan view of the semiconductor device 500 shown in Figure 3, with the substrate 60 and ball terminals 62 removed, as seen from the side of the sealing layer 510 surface 510a. [Figure 4B] Figure 3 is an example of a plan view of the semiconductor device 500 as seen from the side of the sealing layer 510 surface 510b. [Figure 5] An example of a plan view of the semiconductor device 500 is shown. [Figure 6] An example of a cross-sectional view of the semiconductor device 500 according to the embodiment is shown. [Figure 7] An example of a plan view of the semiconductor device 500 shown in Figure 6 is presented. [Figure 8] An example of a cross-sectional view of the semiconductor device 500 according to the embodiment is shown. [Figure 9] An example of a cross-sectional view of the semiconductor device 500 according to the embodiment is shown. [Figure 10] An example of a cross-sectional view of the semiconductor device 500 according to the embodiment is shown. [Figure 11] An example of a cross-sectional view of the semiconductor device 500 according to the embodiment is shown. [Figure 12A] An example of a manufacturing method for semiconductor device 500 is shown. [Figure 12B] Figure 12A shows an example of a manufacturing method for the semiconductor device 500. [Figure 12C] Figure 12B shows an example of a manufacturing method for the semiconductor device 500. [Figure 13A] An example of a manufacturing method for semiconductor device 500 is shown. [Figure 13B] Figure 13A shows an example of a manufacturing method for the semiconductor device 500. [Modes for carrying out the invention]

[0027] The present invention will be described below through embodiments of the invention, but these embodiments are not intended to limit the invention as defined in the claims. Furthermore, not all combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0028] Figure 1 shows an example of a cross-sectional view of a semiconductor device 500 according to an embodiment. The semiconductor device 500 is a semiconductor device used as a gas sensor or the like, including an optical element. The semiconductor device 500 comprises a sealing layer 510, redistribution layers 530, 540, a substrate 60, and a ball terminal 62 connecting the substrate 60 and the sealing layer 510.

[0029] The encapsulation layer 510 is a layer that functions as a substrate by molding the semiconductor chip 520 with the encapsulation portion 522. The encapsulation portion 522 may be an encapsulation resin. The encapsulation layer 510 may be a reconfigurable substrate. The encapsulation layer 510 includes a surface 510a facing the redistribution layer 530 and a surface 510b opposite to surface 510a, which faces the redistribution layer 540. The encapsulation layer 510 also includes the semiconductor chip 520, the encapsulation portion 522, the bumps 528, and the electrode pillars 550.

[0030] The semiconductor chip 520 functions as a gas sensor, for example. For instance, the semiconductor chip 520 is an NDIR (Non-Dispersive Infrared) gas sensor. An NDIR gas sensor utilizes the property that the target gas molecules absorb infrared light of a specific wavelength. An NDIR gas sensor is equipped with a light-emitting element that emits infrared light and a light-receiving element that receives the infrared light emitted from the light-emitting element. If the concentration of the target gas molecules is high, the infrared light emitted from the light-emitting element is absorbed by the gas and does not easily reach the light-receiving element. An NDIR gas sensor can detect the concentration of the target gas by measuring the transmittance of infrared light from the light-emitting element to the light-receiving element. For example, an NDIR gas sensor is used to detect the concentration of carbon dioxide (CO2), methane (CH4), etc. Therefore, the semiconductor chip 520 may include optical elements such as the light-emitting element and light-receiving element of an NDIR gas sensor.

[0031] Furthermore, when the semiconductor chip 520 implements an NDIR type gas sensor, the semiconductor chip 520 may include an optical filter (not shown) that selectively transmits electromagnetic waves in a desired wavelength range to an optical element (especially a photodetector). The material constituting the optical filter may be a material that transmits electromagnetic waves in a predetermined wavelength range, such as Si, SiO2, sapphire (Al2O3), Ge, ZnS, ZnSe, CaF2, or BaF2. The optical filter may also include a thin film component provided by vapor deposition or the like. The thin film material may include Si, SiO2, sapphire (Al2O3), Ge, ZnS, TiO2, MgF2, ZrO2, or Ta2O5.

[0032] Another example of an optical gas sensor is the photoacoustic gas sensor, which uses photoacoustic spectroscopy to detect acoustic signals generated when gas molecules absorb light of a specific wavelength. In a photoacoustic gas sensor, laser light is pulsed onto a light-emitting element, and the sound waves generated by the thermal expansion of the gas that absorbs the laser light are measured by a MEMS (Micro-Electro-Mechanical System) microphone. Photoacoustic gas sensors are also used to detect the concentration of carbon dioxide (CO2) or methane (CH4), etc. The optical element included in the semiconductor chip 520 may be the light-emitting element of a photoacoustic gas sensor. The gas sensor implemented in the semiconductor chip 520 may be such a photoacoustic gas sensor, or it may be another type of gas sensor. The semiconductor chip 520 may include an optical element for a gas sensor using such an optical method.

[0033] The semiconductor chip 520 is provided on surface 510a of the encapsulation layer 510, and one surface of the semiconductor chip 520, or a terminal portion electrically connected to the semiconductor chip, is exposed on surface 510a of the encapsulation layer 510. This allows the semiconductor chip 520 to be connected to a conductive portion in the redistribution layer 530, and to be connected to the electrode pillar 550 by the conductive portion in the redistribution layer 530. The semiconductor chip 520 includes a surface 520a facing the redistribution layer 530 and a surface 520b opposite to surface 520a. The semiconductor chip 520 is connected to the redistribution layer on two surfaces 520a and 520b. By connecting one surface 520a of the semiconductor chip 520 directly to the substrate 60 and the other surface 520b to the substrate 60 via the electrode pillar 550, a current path can be provided within the semiconductor chip 520 through which current flows. By forming a system in which current flows uniformly through the semiconductor chip 520, current concentration within the semiconductor chip 520 can be prevented, resulting in the effect of suppressing localized heat generation in the semiconductor chip 520.

[0034] In the semiconductor device 500 of this embodiment, the semiconductor chip 520 may have a semiconductor stacked portion on the surface 520a facing the redistribution layer 530 that realizes the functions provided by the semiconductor chip 520. In other words, the semiconductor chip 520, which is an optical sensor, has a semiconductor stacked portion as an optical sensor on the surface 520a.

[0035] The sealing portion 522 is a sealing resin for sealing the semiconductor chip 520 and the electrode pillar 550 to form a sealing layer 510. The sealing portion 522 is, for example, an epoxy resin.

[0036] Terminal 524 is a terminal provided on the surface 520a of the semiconductor chip 520. Terminal 524 may be a collective term for multiple terminals on the surface 520a of the semiconductor chip 520 on the side where the redistribution layer 530 is provided. For example, terminal 524 may be provided so as to be embedded in the semiconductor chip 520, and at least a part of terminal 524 may be provided so as to be exposed from the semiconductor chip 520. The material of the terminal portion may be different from or the same as the metal forming the conductive portion of the redistribution layer 530.

[0037] Terminal 526 is a terminal provided on the surface 520b of the semiconductor chip 520. Terminal 526 is a terminal that provides electrical contact with the semiconductor chip 520 on the surface 520b of the semiconductor chip 520, and like terminal 524, it may be provided so as to be embedded in the semiconductor chip 520, and at least a part of terminal 526 may be provided so as to be exposed from the semiconductor chip 520. Terminal 526 may be a terminal that collectively refers to a plurality of terminals on the surface 520b of the semiconductor chip 520 on the side where the redistribution layer 540 is provided. When the redistribution layer 540 is directly connected to the semiconductor chip 520, the area where the connection surface of the semiconductor chip 520 to the redistribution layer 540 and the redistribution layer 540 are in contact may constitute the terminal portion. Terminal 526 is an example of a "second terminal portion".

[0038] Bump 528 electrically connects terminal 524 and rewiring layer 530. Terminal 524 and bump 528 together constitute a "terminal section". The terminal section is an example of a "first terminal section".

[0039] The redistribution layer 530 includes a conductive portion that electrically connects the bump 528 to the end face 550a of the electrode pillar 550 exposed on the surface 510a of the sealing layer 510. Specifically, the conductive portion has a contact that is electrically connected to the terminal 524 via the bump 528 and a contact that is electrically connected to the end face 550a of the electrode pillar 550, and these contacts are electrically connected. The sealing layer 510 may have a structure in which the bump 528 is omitted, and the conductive portion may be directly connected to the terminal 524. The redistribution layer 530 includes a surface 530b facing the sealing layer 510 and a surface 530a facing surface 530b. Surface 530b may refer to a surface that is flush with surface 510a. The redistribution layer 530 includes insulating layers 532, 534 and the conductive portion. The conductive portion includes a conductive pattern layer 536, a connecting portion 538, and a metal layer 539. The conductive pattern layer 536, the connecting portion 538, and the metal layer 539 are examples of the "first conductive portion".

[0040] The semiconductor device 500 includes a ball terminal 62 provided on the surface 530b of the redistribution layer 530 facing the sealing layer 510 and on the opposite surface 530a, which is electrically connected to the redistribution layer 530. In this case, the surface 530a opposite to the surface 530b of the redistribution layer 530 facing the sealing layer 510 surface 510a may be the mounting surface on which the semiconductor device 500 is mounted on the substrate 60 by the ball terminal 62.

[0041] The insulating layers 532 and 534 constitute a part of the redistribution layer 530 and protect the conductive pattern layer 536, etc. Since the semiconductor chip 520 is a semiconductor chip that includes optical elements, the insulating layers 532 and 534 are made of a light-transmitting resin. Therefore, the redistribution layer 530 includes a transparent region in at least a part of the area facing the semiconductor chip 520, which is made of a transparent material that transmits light from outside the redistribution layer 530 to the semiconductor chip 520, or transmits light emitted from the semiconductor chip 520 to the outside of the redistribution layer 530.

[0042] The insulating layers 532 and 534 are provided, for example, with phenolic resin. For example, when an NDIR type gas sensor is used as the semiconductor chip 520, transparent phenolic resin may be used, but the resin used for the insulating layers 532 and 534 of the redistribution layer 530 is not limited to transparent phenolic resin. The material of the insulating layers 532 and 534 may be selected, for example, based on the transmittance of electromagnetic waves in the wavelength or frequency band targeted by the semiconductor chip 520 including the optical element. For example, when the semiconductor chip 520 is equipped with an NDIR type gas sensor, the insulating layers 532 and 534 may be provided with a resin that is transparent to infrared light having a specific wavelength from 780 nanometers to 100 micrometers. Thus, in the semiconductor chip 520, a transparent region, which is made of a transparent material that allows light from outside the redistribution layer 530 to pass through to the semiconductor chip 520, or light emitted from the semiconductor chip 520 to pass through to the outside of the redistribution layer 530, may be selected based on the transparency of electromagnetic waves in the wavelength or frequency band targeted by the semiconductor chip 520, including the optical element.

[0043] Furthermore, the materials for the insulating layers 532 and 534 may be selected considering factors such as heat resistance, moisture resistance, mechanical strength, and gas barrier properties, depending on the environment in which the semiconductor chip 520 is used. Taking these factors into consideration, a encapsulant made of a material different from transparent phenolic resin may be used as the material for the insulating layers 532 and 534.

[0044] The transparent region may be provided in a manner other than providing a transparent region made of a transparent material in at least a portion of the region facing the semiconductor chip 520. For example, a transparent region may be provided on the surface of the semiconductor chip 520 by providing an exposed region that is not covered by the redistribution layer 530 including the insulating layers 532 and 534. Figure 6, described later, shows an example in which a transparent region is provided on the surface of the semiconductor chip 520 by providing a region that is not covered by the redistribution layer 530 including the insulating layers 532 and 534.

[0045] The conductive pattern layer 536 is a metal pattern that extends from the semiconductor chip 520 to the outside of the semiconductor chip 520 within the redistribution layer 530, and transmits voltage, current, and power. Therefore, the redistribution layer 530 including the conductive pattern layer 536 has a so-called fan-out structure. The conductive pattern layer 536 is, for example, a conductive pattern layer made of a metal including copper. The conductive pattern layer 536 is, for example, formed by electroless plating of copper or the like after placing a seed layer 590 of nickel (Ni) and / or copper (Cu).

[0046] The connecting portion 538 is a metal layer for connecting the bump 528 and the conductive pattern layer 536. The connecting portion 538 may be integrally formed with the conductive pattern layer 536 in a single process. If the bump 528 is omitted, the terminal 524 may be provided so as to be flush with the surface 520a of the semiconductor chip 520, and the conductive pattern layer 536 and the connecting portion 538 may be directly connected to the terminal 524.

[0047] The metal layer 539 is a metal layer for connecting the electrode pillar 550 and the ball terminal 62. The metal layer 539 is formed by electroless plating of a metal that has good solder wettability and is chemically stable, such as nickel (Ni) or gold (Au), as an example.

[0048] The redistribution layer 540 is provided on the surface 520b of the sealing layer 510 opposite to surface 520a. The redistribution layer 540 includes a conductive portion that electrically connects to a terminal 526 provided on the surface 520b of the semiconductor chip 520 opposite to surface 520a. The redistribution layer 540 includes a surface 540a facing the sealing layer 510 and a surface 540b facing surface 540a. Surface 540a may refer to a surface that is flush with surface 510b. The redistribution layer 540 includes insulating layers 542, 544 and a conductive portion. The conductive portion includes a conductive pattern layer 546, a connection portion 548, and a metal layer 549. The conductive pattern layer 546, the connection portion 548, and the metal layer 549 are examples of the "second conductive portion".

[0049] The insulating layers 542 and 544 constitute a part of the redistribution layer 540 and protect the conductive pattern layer 546, etc. For example, the insulating layers 542 and 544 are made of phenolic resin. The material of the insulating layers 542 and 544 may be the same as the material of the insulating layers 532 and 534. When the semiconductor chip 520 includes optical elements, the design determines which of the surfaces 520a and 520b of the semiconductor chip 520 will be the semiconductor laminate that realizes the functions provided by the semiconductor chip 520. Therefore, at least on the semiconductor laminate side of the semiconductor chip 520, either the insulating layers 532 and 534 or the insulating layers 542 and 544 may be made of a light-transmitting resin. In this case, the insulating layer of the redistribution layer provided on the surface of the semiconductor chip 520 that does not include optical elements may be made of a different material, for example, a non-light-transmitting resin.

[0050] The conductive pattern layer 546 is a metal pattern that extends from the semiconductor chip 520 to the outside of the semiconductor chip 520 within the redistribution layer 540, and transmits voltage, current, and power. Therefore, the redistribution layer 540, including the conductive pattern layer 546, also has a fan-out structure, similar to the redistribution layer 530. The conductive pattern layer 546 is a conductive pattern layer provided with a metal including copper, similar to the conductive pattern layer 546.

[0051] The connecting portion 548 is a metal layer for connecting the terminal 526 and the conductive pattern layer 546. The connecting portion 548 may be integrally formed with the conductive pattern layer 546 in a single process.

[0052] The metal layer 549 is a metal layer for connecting the electrode pillar 550 and the conductive pattern layer 546. When the electrode pillar 550 is not connected to an external structure, it may be provided in the same configuration as the conductive pattern layer 546, and may be provided together with the conductive pattern layer 546 in a single process.

[0053] The redistribution layers 530 and 540 of this embodiment have a configuration that includes a cured insulating resin as the insulating layer 532, 534, 542, and 544, and do not include a substrate such as a photosensitive glass substrate. In particular, in the chip-first configuration described later, the resin is applied to the layer. Therefore, unlike the configuration in a sensor using an optical element where a light-transmitting substrate such as a glass substrate is used to protect the sensor surface, the thickness of the redistribution layer 530 can be made significantly thinner.

[0054] The thickness of the redistribution layer 530 can be 0.3 mm or less. Furthermore, the thickness of the redistribution layer 530 may be 0.16 mm or less. This thickness is thinner than, for example, the thickness of the mold used in semiconductor packages known as QFN (Quad Flat Non-leaded) packages. In this way, the sealing layer 510 does not use electrical connections by bonding wires or the like, but uses the redistribution layer 530 for connection. This makes it possible to reduce the thickness of the insulating layers 532 and 534. Furthermore, it is possible to shorten the signal path and improve signal quality.

[0055] For example, when the semiconductor device 500 is used as a gas sensor, it may be exposed to heat due to operation or environmental factors during use. The semiconductor chip 520 and the redistribution layer 530 that make up the semiconductor device 500 may have different coefficients of thermal expansion. In this case, thermal stress may be generated due to the thermal expansion and / or contraction of the components. Furthermore, when the semiconductor device 500 is used for a long period of time, fatigue may accumulate at the joints between materials, causing deflection and / or distortion of the components, which may generate stress. In addition, deterioration due to moisture absorption and gas penetration in the operating environment may occur, causing the components to change their mechanical properties. In such cases, stress concentration may occur inside the semiconductor device 500. If the redistribution layer 530 can be made thin, it becomes easier to make the entire redistribution layer 530 with a more uniform film thickness, and it tends to be more flexible than when the insulating layer is made thicker. This alleviates such stress concentration in the semiconductor device 500. This also suppresses the occurrence of fluctuations in the characteristics of the sensor. Furthermore, the use of a thin redistribution layer 530 is advantageous for miniaturizing packages that use semiconductor devices 500.

[0056] The thickness of the redistribution layer 540 may be set in the same way as the redistribution layer 530. Therefore, the thickness of the redistribution layer 540 can be set to 0.3 mm or less. Furthermore, the thickness of the redistribution layer 540 may be set to 0.16 mm or less. This makes it possible to reduce the thickness of the insulating layers 532 and 534. Therefore, the redistribution layer 540 can also contribute to the mitigation of stress concentration in the sealing layer 510 and the miniaturization of the package using the semiconductor device 500.

[0057] In the metal layers 539 and 549 of this embodiment, connection to the external structure of the sealing layer 510 can be implemented by terminals provided on both sides of the sealing layer 510. This increases the integration density of the sealing layer 510 and, consequently, the entire semiconductor package using the semiconductor device 500, enabling miniaturization of the entire package.

[0058] The electrode pillar 550 is positioned opposite the side surface of the semiconductor chip 520, via the sealing portion 522. The electrode pillar 550 has an end face 550a exposed from the sealing layer 510 and an end face 550b opposite to the end face 550a on the surface 510a of the sealing layer 510. The electrode pillar 550 has a hard metal pillar structure and is positioned to sandwich the semiconductor chip 520 via the sealing portion 522. By sandwiching the semiconductor chip 520 with such a hard metal electrode pillar 550, chip cracking of the semiconductor chip 520 is prevented, and the strength of the package is increased. The electrode pillar 550 may be provided as a post electrode without drilling the sealing portion 522, but it may also be provided as a so-called through-mold via (TMV) as an electrode that penetrates the sealing portion 522. The electrode pillar 550 may be used as an electrode pillar to supply power to the semiconductor chip 520 for the operation of the semiconductor chip 520, or as an electrode pillar 550 to provide a conductive path for transmitting signals read from the semiconductor chip 520 to the outside of the semiconductor chip 520. The electrode pillar 550 includes, for example, a metal such as copper. In this case, the electrode pillar 550 may be manufactured by electrolytic copper plating. Furthermore, as will be described later with reference to Figure 8, the electrode pillar 550 may be provided in a structure in which a portion is exposed from the sealing layer 510. The electrode pillar 550 may also function as a path for conducting heat generated when the semiconductor chip 520 is operating to the outside, and in particular, when the electrode pillar 550 is in a structure that is exposed to the outside of the sealing layer 510, it functions as a structure that efficiently promotes heat dissipation. In addition, the electrode pillar 550 may be exposed on both the first surface 520a and the second surface 520b of the semiconductor chip 520. This makes it possible to provide heat dissipation paths on both sides of the semiconductor device 500, specifically on the side 520a and the side 520b.

[0059] When configuring the semiconductor chip 520 as a package for mounting a gas sensor including an optical sensor, a ceramic package can be considered, taking into account its excellent thermal conductivity and mechanical strength. The electrode pillar 550 can also provide an excellent path for heat dissipation, and when used in conjunction with the ceramic package, a highly reliable sensor can be provided even in high-temperature and / or high-temperature environments in which the gas sensor may be used.

[0060] In the figure, multiple electrode pillars 550 are arranged within the sealing layer 510. Thus, the semiconductor device 500 may include multiple electrode pillars 550 arranged within the sealing layer 510. In this case, at least two of the multiple electrode pillars may be electrically connected. Furthermore, this may set the multiple electrode pillars to the same potential.

[0061] In this embodiment and in another embodiment, the semiconductor chip 520 has a semiconductor stack that realizes the functions provided by the semiconductor chip 520 on the surface 520b opposite to the surface 520a facing the redistribution layer 530. In this case, the surface 530a opposite to the surface 530b facing the surface 510a of the sealing layer 510 of the redistribution layer 530 may be the mounting surface of the semiconductor device 500 on the substrate 60.

[0062] Surface 510a of the encapsulation layer 510 is an example of the "first surface" of the encapsulation layer 510, and surface 510b is an example of the "second surface" of the encapsulation layer 510. Surface 520a of the semiconductor chip 520 is an example of the "first surface" of the semiconductor chip 520, and surface 520b is an example of the "first surface" of the semiconductor chip 520.

[0063] Redistribution layer 530 is an example of a "first redistribution layer." On the other hand, redistribution layer 540 is an example of a "second redistribution layer."

[0064] Figure 2A is an example of a plan view of the semiconductor device 500 from Figure 1, with the substrate 60 and ball terminals 62 removed, as seen from the side of the sealing layer 510 510a.

[0065] The electrode pillars 550 are provided so that terminals protrude from both sides of the semiconductor chip 520. In the semiconductor device 500 of this embodiment, redistribution layers 530 and 540 are provided on both sides of the sealing layer 510, respectively.

[0066] The redistribution layer 530 electrically connects the semiconductor chip 520 to the electrode pillars 550B and 550C, and the metal layer 539 is exposed at the locations of the electrode pillars 550B and 550C. On the other hand, no metal layer is provided at the locations of the electrode pillars 550A and 550D, and the end faces of the electrode pillars 550A and 550D are left exposed.

[0067] Figure 2B is an example of a plan view of the semiconductor device 500 in Figure 1, viewed from the side of the sealing layer 510, 510b. The redistribution layers 530 and 540 each electrically connect the semiconductor chip 520 and the electrode pillar 550.

[0068] The redistribution layer 540 electrically connects the semiconductor chip 520 to the electrode pillars 550B and 550C, with the metal layer 549 exposed at the locations of the electrode pillars 550B and 550C. On the other hand, no metal layer is provided at the locations of the electrode pillars 550A and 550D, leaving the electrode pillars 550A and 550D exposed. In this embodiment, the electrical connection relationship between the semiconductor chip 520 and the electrode pillars 550A, 550B, 550C, and 550D is reversed on surfaces 510a and 510b of the sealing layer 510. The electrical connection relationship between the semiconductor chip 520 and the electrode pillars 550 is not limited to what is shown in the figure, and some of the electrode pillars 550 may be connected to the conductive portions of the redistribution layers 530 and 540. Furthermore, some of the metal layers 549 constituting either of the redistribution layers 530 or 540 may not be connected to the electrode pillars 550 (any of electrode pillars 550A, 550B, 550C, or 550D). Figure 1 is an example of an A-A' cross-sectional view taken along the A-A' cutting line shown in Figures 2A and 2B.

[0069] Figure 3 shows an example of a cross-sectional view of the semiconductor device 500 according to this embodiment. Below, we will mainly focus on the differences between this embodiment and the semiconductor device 500 of the embodiments shown in Figures 1, 2A, and 2B. The semiconductor device 500 of this embodiment includes a sealing layer 510, a redistribution layer 530, and a redistribution layer 540.

[0070] Figure 4A is an example of a plan view of the semiconductor device 500 from Figure 3, with the substrate 60 and ball terminals 62 removed, as seen from the side of the sealing layer 510 510a.

[0071] In this embodiment, electrode pillars are not provided in the locations corresponding to the conductive pattern layers 536G and 536H, and only conductive pattern layers are provided. On the other hand, two electrode pillars 550E and 550F are provided.

[0072] The semiconductor chip 520 may be electrically connected to the outside of the encapsulation layer 510 (for example, to the substrate 60) via conductive pattern layers 536G and 536H.

[0073] Figure 4B is an example of a plan view of the semiconductor device 500 in Figure 3, viewed from the side of the sealing layer 510, surface 510b. In Figure 4A, where the conductive pattern layers 536G and 536H were provided, nothing is provided when viewed from the side of Figure 4B. Figure 3 is an example of a B-B' cross-sectional view taken along the B-B' cutting line shown in Figures 4A and 4B.

[0074] Figure 5 shows an example of a plan view of the semiconductor device 500. Figure 5 is an example of a plan view of the semiconductor device 500 with the substrate 60 and ball terminals 62 removed, viewed from the side of the sealing layer 510 510a.

[0075] In Figure 5, the combinations of electrode pillars 550A and 550C, and electrode pillars 550B and 550D are set to the same potential. This is an example where, in the case where at least two of the multiple electrode pillars are set to the same potential, electrode pillar 550 is set to a different potential than in the examples in Figures 2A and 2B. As already explained, electrode pillar 550 functions not only as an electrical connection path but also as a heat conduction path. Therefore, an example of using electrode pillars 550 at the same potential is to provide multiple electrode pillars 550 at the ground potential to promote heat dissipation from multiple grounding paths.

[0076] Figure 6 shows an example of a cross-sectional view of a semiconductor device 500 according to an embodiment. The semiconductor device 500 comprises a sealing layer 510 and a redistribution layer 530. The following description will mainly focus on the differences from the semiconductor device 500 of the embodiments in Figures 1, 2A, and 2B. In this embodiment, the sealing layer 510 includes a semiconductor chip 520, a sealing portion 522, and a conductive structure 560.

[0077] The conductive structure 560 is not electrically connected to the semiconductor chip 520, but is a conductive structure connected to an external conductive trace or the like. For example, the conductive structure 560 may have the same composition as the electrode pillar 550. Therefore, the conductive structure 560 may be provided by electroplating of a metal such as copper.

[0078] The conductive structure 560 is a conductive structure through which a current of varying magnitude flows, depending on the condition of the externally connected circuit. As an example, the semiconductor chip 520 is provided with a magnetic sensor that functions as a current sensor, and detects a magnetic field that varies according to the magnitude of the current flowing through the conductive structure 560. The magnetic sensor may include a Hall element or a magnetoresistive element. The magnetoresistive element may be a semiconductor magnetoresistive (SMR), anisotropic magnetoresistive (AMR), giant magnetoresistive (GMR), tunnel magnetoresistive (TMR), etc.

[0079] The conductive structure 560 may be located opposite the side surface of the semiconductor chip 520 and may be exposed on the side surface of the sealing layer 510. With such a configuration, the conductive structure 560 can be connected to an external conductive trace or the like.

[0080] Figure 6 shows a cross-section intersecting the surface 520a of the semiconductor chip 520. In this cross-section, the conductive structure 560 divides the sealing portion 522 of the sealing layer 510 into two regions. In other words, the cross-section shown in Figure 6 is an example of the "first cross-section" of the sealing layer 510. In the cross-section of Figure 6, on the side of the sealing layer 510 where the redistribution layer 530 is not provided, the conductive structure 560 divides the sealing portion 522 of the sealing layer 510 into two regions.

[0081] Furthermore, in the conductive structure 560, the thickness of the portion exposed on the side surface of the sealing layer 510 may be thinner than the thickness of the portion facing the side surface of the semiconductor chip 520. This makes it easier to dic the semiconductor device 500, as will be described later.

[0082] As shown in the figure, the conductive structure 560 has a portion in which its thickness is reduced in the area adjacent to the side surface of the sealing layer 510. These structures will be described in more detail with reference to Figure 7.

[0083] Figure 7 shows an example of a plan view of the semiconductor device 500 shown in Figure 6. In the figure, a plan view of the semiconductor device 500 as seen from the redistribution layer 530 side is shown. Figure 6 is an example of a C-C' cross-sectional view taken along the C-C' cutting line shown in Figure 7.

[0084] The conductive structure 560 is shown in the figure as having a U-shape and extending to be exposed on one side of the semiconductor device 500. The conductive structure 560 includes a first portion 562, a second portion 564, and a third portion 566 that extend to form a U-shape. As shown in the figure, the conductive structure 560 divides the sealing portion 522 of the sealing layer 510 into two regions on the surface facing the redistribution layer 530. Thus, the conductive structure 560 may divide the sealing portion 522 of the sealing layer 520 into two regions at least one of the cross-section of the sealing layer 520 intersecting the surface 520a of the semiconductor chip 520 or on the surface facing the redistribution layer 530.

[0085] The conductive structure 560 causes the magnetic field generated in the semiconductor chip 520 to fluctuate by passing an electric current through it in a U-shape. The semiconductor chip 520 in this embodiment includes a magnetic sensor that detects the magnitude of the current flowing through the conductive structure 560 by detecting the magnetic field that fluctuates due to the electric current flowing through the conductive structure 560.

[0086] The first portion 562, when viewed from the redistribution layer 530 side, faces the side surface of the semiconductor chip 520 and extends in a direction along the side surface of the semiconductor chip 520. The first portion 562 corresponds to the portion shown in Figure 6 as having no change in thickness, however, a part of the first portion 562 may also have a change in thickness as it extends to the second portion 564 and the third portion 566.

[0087] The second portion 564 extends away from the side of the semiconductor chip 520 from one end of the first portion when viewed from the redistribution layer 530 side. The third portion 566 extends away from the side of the semiconductor chip 520 from the other end of the first portion when viewed from the redistribution layer 530 side.

[0088] As shown in Figure 6, the second portion 564 and the third portion 566 have thinner portions in the areas further away from the side surface of the semiconductor chip 520 and closer to the side surface of the encapsulation layer 510, compared to the portions adjacent to the first portion. Parts of the second portion 564 and the third portion 566 are exposed on the side surface of the encapsulation layer 510. The parts of the second portion 564 and the third portion 566 that are exposed on the side surface of the encapsulation layer 510 are thinner than the portions of the second portion 564 and the third portion 566 that are connected to the first portion 562. This reduces the length of metal parts of the conductive structure 560 that need to be cut and / or polished when dicing the encapsulation layer 510, making it easier to dic the encapsulation layer 510. This also reduces damage to the blades of the dicing apparatus.

[0089] In the semiconductor device 500 of this embodiment, the electrode pillars 550A and 550B are connected to each other via a conductive pattern layer 546. As a result, the electrode pillars 550A and 550B are set to the same potential. The electrode pillars 550A and 550B may also be used for external connections.

[0090] Figure 8 shows an example of a cross-sectional view of the semiconductor device 500 according to this embodiment. In the following description, we will mainly focus on the differences between this embodiment and the semiconductor device 500 of the embodiments shown in Figures 1, 2A, and 2B.

[0091] In the embodiment shown in Figure 8, at least a portion of the side surface 552 of the electrode pillar 550 is exposed from the side surface of the sealing layer 510. This allows for electrical connection from the side surface of the electrode pillar 550. For example, it may be electrically connected to other structures from the side surface of the sealing layer 510 by soldering. Thus, with the electrode pillar 550 of this embodiment, the solder joint is exposed to the side surface of the sealing layer 510, making it possible to inspect the joint based on its appearance, and the heat dissipation effect is increased because the electrode pillar 550 is exposed to the outside. This also increases the degree of freedom for electrical connection of the sealing layer 510.

[0092] Figure 9 shows an example of a schematic side view of a semiconductor device 500 according to an embodiment. The semiconductor device 500 according to the embodiment in Figure 9 includes both the structure of the semiconductor device 500 according to Figure 1 and the structure of the semiconductor device 500 according to Figure 8 in the stretching direction of the sealing layer 510.

[0093] As shown in the figure, the sealing layer 510 includes a plurality of semiconductor chips 520A and 520B. In this embodiment, the plurality of semiconductor chips 520A and 520B are provided along the stretching direction of the sealing layer 510. Semiconductor chip 520A corresponds to the semiconductor chip 520 provided in the semiconductor device 500 according to the embodiment of Figure 8. Therefore, in the figure, an electrode pillar 550 with an exposed side surface 552 is shown. On the other hand, semiconductor chip 520B corresponds to the semiconductor chip 520 provided in the semiconductor device 500 according to the embodiment of Figure 1.

[0094] Figure 10 shows an example of a schematic side view of a semiconductor device 500 according to an embodiment. The semiconductor device 500 includes semiconductor chips 520, 570, electrode pillars 550, and bumps 574.

[0095] The semiconductor device 500 according to this embodiment also has a structure in which the encapsulation layer 510 includes a plurality of semiconductor chips 520, 570. However, the semiconductor chips 520, 570 are stacked in the thickness direction of the encapsulation layer 510, which differs from the structure in Figure 9 in which the plurality of semiconductor chips are included in the stretching direction of the encapsulation layer 510. The semiconductor chips 520, 570 may be stacked via bumps, or they may be stacked directly without bumps.

[0096] When multiple semiconductor chips are provided as in the sealing layer 510 in Figures 9 and 10, for example, semiconductor chip 520 functions as a semiconductor chip on which an optical sensor is provided, and semiconductor chip 570 functions as a signal processing chip that processes signals based on the magnitude of the current detected by the optical sensor. As another example, semiconductor chips 520 and 570 may implement different types of sensors, for example, semiconductor chip 520 may implement a magnetic sensor and semiconductor chip 570 may implement an optical sensor. Since semiconductor chips 520 and 570 are interconnected via bumps 574, semiconductor chips 520 and 570 can be implemented to perform processing using the signals output by each other. In addition, semiconductor chip 570 has terminals 572 for electrical connection to electrode pillars 550. Terminals 572 may function similarly to terminals 524, 526, etc. of semiconductor chip 520.

[0097] Figure 11 shows an example of a cross-sectional view of the semiconductor device 500. In this embodiment, the differences from the semiconductor device 500 of the embodiment shown in Figure 6 will be mainly explained.

[0098] The semiconductor chip 520, as in the embodiments described with reference to Figures 1 and 6, has a surface 520b on the surface 510b of the encapsulation layer 510, which is the light incident surface of the semiconductor chip 520 that is exposed from the encapsulation layer 510. The semiconductor chip 520 also has a surface 520a on the surface 510a opposite to surface 520b, which is the surface 510a of the encapsulation layer 510 that is exposed from the encapsulation layer 510.

[0099] In this embodiment, the semiconductor chip 520 is provided with terminals 526 having contacts on the surface 520b of the semiconductor chip 520. The terminals 526, as in the embodiment described with reference to Figure 1, are terminals that provide electrical contacts with the semiconductor chip 520 on the surface 520b of the semiconductor chip 520, and like terminals 524 and 526, may be provided so as to be embedded in the semiconductor chip 520, and at least a portion of terminals 524 and 526 may be provided so as to be exposed from the semiconductor chip 520. On the other hand, the surface 520a of the semiconductor chip 520 is covered with a redistribution layer 530.

[0100] The electrode pillar 550, as in the embodiments described with reference to Figures 1 and 6, has an end face 550a exposed from the sealing layer 510 and an end face 550b opposite to the end face 550a on the surface 510a of the sealing layer 510. The semiconductor chip 520 has a pad 527 electrically connected to the end face 550b of the electrode pillar 550. The pad 527, like the terminals 524 and 526, is a terminal that provides an electrical contact with the semiconductor chip 520 on the surface 520a of the semiconductor chip 520, and like the terminals 524 and 526, may be provided so as to be embedded in the semiconductor chip 520, and at least a portion of the pad 527 may be provided so as to be exposed from the semiconductor chip 520.

[0101] In this embodiment as well, the redistribution layer 530 includes insulating layers 532 and 534, a conductive pattern layer 536 provided inside the insulating layer 534, and a connection portion 538 that electrically connects the pad 524 and the conductive pattern layer 536. The connection portion 538 is provided in a through hole provided in the insulating layer 532 by a seed layer and electroplating or the like. The insulating layer 532 covers the area of ​​the surface 520a of the semiconductor chip 520 other than the area of ​​the through hole where the connection portion 538 is provided. The insulating layer 534 is a layer provided after the conductive pattern layer 536 is provided as a protective layer for the conductive pattern layer 536, and the manufacturing processes for these will be described in detail later with reference to Figures 12A to 12C, etc.

[0102] In this embodiment, a ball terminal 62 may be provided on the terminal 526 and the end face 550b of the electrode pillar 550. In this embodiment, the semiconductor chip 520 is connected to the outside via the terminal 526 and the ball terminal 62 on the surface 520a of the semiconductor chip 520. On the other hand, the semiconductor chip 520 is connected to the outside via the ball terminal 62, the electrode pillar 550, the conductive pattern layer 536 in the redistribution layer 530, the connection part 538, and the pad 527 on the surface 520b of the semiconductor chip 520.

[0103] In the semiconductor device 500 of the embodiment shown in Figure 6, the light incident surface for the semiconductor chip 520 is described as the surface of the semiconductor chip 520 that is not covered by the redistribution layer 530 including the insulating layers 532 and 534, and in which a transparent region is provided. Here, the light incident surface of the semiconductor chip 520 may be surface 520a or surface 520b of the semiconductor chip 520.

[0104] In the semiconductor chip 520 of this embodiment, surface 520b is the light incident surface of the semiconductor chip 520. The light incident surface of the semiconductor chip 520 may be formed as an optically transparent region by providing an area on surface 520b that is opposite to surface 520a on which the redistribution layer 530 is provided, and not covering the semiconductor chip 520 with the redistribution layer, thereby exposing the semiconductor chip 520.

[0105] In this case, terminal 526 does not need to be directly connected to the redistribution layer. Thus, in the semiconductor device 500 of Figure 11, a redistribution layer 530 is provided so as to cover one surface 520a of the semiconductor chip 520, and a transparent area not covered by the redistribution layer is provided on the other surface 520b.

[0106] In this embodiment, in the semiconductor device 500, the surface on which the ball terminal 62 is provided on the terminal 526 and the surface corresponding to the light incident surface of the semiconductor chip 520 both correspond to surface 520b of the semiconductor chip 520. Furthermore, in the semiconductor device 500, the surface of the electrode pillar 550 on which the ball terminal 62 is provided is also the end surface 550b, which corresponds to the same directional surface in the semiconductor device 500.

[0107] Figure 12A shows an example of a manufacturing method for the semiconductor device 500. The manufacturing method for the semiconductor device 500 in this embodiment comprises steps S202 to S226. In Figures 12A to 12C, the semiconductor chip 520 is placed before the redistribution layer. This type of manufacturing method is an example of a manufacturing method called chip-first.

[0108] First, in the manufacturing method of the semiconductor device 500, a substrate 80 is placed and an adhesive layer 82 is attached. Furthermore, a semiconductor chip 520 and an electrode pillar 550 are mounted on the adhesive layer 82 (S202). The adhesive layer 82 may be made of an adhesive such as a water-soluble adhesive. The semiconductor chip 520 and the electrode pillar 550 are arranged on one surface of the substrate 80 with gaps between them. As an example, the substrate 80 is made of silicon (Si).

[0109] Next, with the semiconductor chip 520 and electrode pillar 550 arranged at intervals, a sealing portion 522 is provided on the surface of the substrate 80 on which the semiconductor chip 520 and electrode pillar 550 are arranged. This molds and seals the semiconductor chip 520 and electrode pillar 550 with the sealing portion 522 (S204). This gives rise to a reconstructed substrate, which is a sealing layer 510. In other words, the reconstructed substrate corresponds to the sealing layer 510 formed in the chip-first manufacturing method.

[0110] Furthermore, the substrate 80 and adhesive layer 82 are peeled off from the sealing layer 510 (S206). Thus, the substrate 80 is a substrate that is peeled off after the semiconductor chip 520 is molded and sealed by the sealing portion 522, and serves as a sacrificial layer to temporarily support the semiconductor chip 520 and electrode pillar 550. Therefore, the substrate 80 is an example of a "temporary support substrate". The sealing layer 510 is then manufactured.

[0111] Next, a redistribution layer 530 is formed on the sealing layer 510. First, an insulating layer 532 is formed on the sealing layer 510 (S208). The insulating layer 532 is provided, for example, with phenolic resin.

[0112] Figure 12B shows an example of a manufacturing method for the semiconductor device 500, continuing from Figure 12A. A metal seed layer 590 for the conductive pattern layer 536 is installed (S210). The metal seed layer 590 may be provided by sputtering. Examples of metals to be sputtered include titanium (titanium) or copper (Cu).

[0113] Next, a resist is applied to the insulating layer 532, and then electroplating is performed to form a metal layer for the conductive pattern layer 536 (S212). The electroplating performed in S212 may, for example, be electrolytic copper plating.

[0114] Furthermore, a conductive pattern layer 536 is formed by immersion in an etching solution (S214). The etching solution may be one in which the oxidizing agent and complexing agent are appropriately selected, taking into consideration the materials of the mask and the conductive pattern layer 536.

[0115] Next, an insulating layer 534 is formed to protect the conductive pattern layer 536 (S216). As a result, the redistribution layer 530 is formed. Therefore, on the surface of the sealing layer 510 on which the semiconductor chip 520 and electrode pillar 550 are arranged, after peeling the substrate 80 from the sealing layer 510, a redistribution layer 530 can be formed that electrically connects the terminal 524 provided on the surface 520a of the semiconductor chip 520 exposed on the surface 510a of the sealing layer 510 with one end face (end face 550a) of the electrode pillar 550 exposed from the surface 510a of the sealing layer 510.

[0116] Figure 12C shows an example of a manufacturing method for the semiconductor device 500, continuing from Figure 12B.

[0117] Following S216, the sealing portion 522 is back-ground (BG) until the end face 550b of the electrode pillar 550 is exposed (S218). This step corresponds to grinding the sealing portion 522 until the end face 550b of the electrode pillar 550 is exposed from the surface 510b opposite to the surface 510a of the sealing layer 510.

[0118] An insulating layer 542 is formed (S220). The insulating layer 542 may be made of phenol. In this case, an insulating layer 544 and a conductive pattern layer 546 may be provided, similar to the surface 510a of the sealing layer 510. This provides the redistribution layer 540.

[0119] Next, a metal layer 592 for arranging the ball terminal 90 is placed (S222). The metal layer 592 may be made of a metal that has good solder wettability and high chemical stability, such as nickel (Ni) or gold (Au).

[0120] Ball terminals 90 are mounted on the metal layer 592 (S224). Dicing with the ball terminals 90 mounted is performed to separate each semiconductor device 500 into individual pieces (S226). This allows the semiconductor device 500 to be manufactured.

[0121] Figure 13A shows an example of a manufacturing method for the semiconductor device 500. The manufacturing method for the semiconductor device 500 in this embodiment comprises steps S302 to S318. In the semiconductor device 500, the semiconductor chip 520 and electrode pillars 550 are provided after the redistribution layer 530 is provided. Since the semiconductor chip 520 is provided after the redistribution layer 530, the manufacturing method for the semiconductor device 500 in this embodiment is an example of a manufacturing method called chip last.

[0122] In the manufacturing method of the semiconductor device 500 of this embodiment, first an adhesive layer 82 is provided on the substrate 80. Next, an insulating layer 534 with a conductive pattern layer 536 and an insulating layer 532 with a connecting portion 538 containing a conductor and a metal layer 539 are formed (S302). This forms a redistribution layer 530 on one surface of the substrate 80.

[0123] Next, electrode pillars 550 are formed on the metal layer 539 (S304). This forms electrode pillars 550 that are electrically connected to the redistribution layer 530 on the opposite side 530b (corresponding to the side 510a of the sealing layer 510) of the redistribution layer 530 from the substrate 80 side 530a.

[0124] Furthermore, die bonding of the semiconductor chip 520 with bumps 528 is performed on the connection portion 538 (S306). As a result, the semiconductor chip 520 is placed on the surface 530b of the redistribution layer 530 opposite to the substrate 80 side surface 530a (corresponding to the surface 510a of the sealing layer 510), with a gap between it and the electrode pillars 550, and is electrically connected to the electrode pillars 550 via the redistribution layer 530. Thus, in this embodiment, the sealing layer 510 is constructed by placing the semiconductor chip 520 after the redistribution layer 530 has been provided.

[0125] Next, the semiconductor chip 520 and electrode pillar 550 are molded and sealed by the sealing portion 522 (S308). This seals the surface 530b of the first redistribution layer 530 opposite to the substrate 80 side surface 530a, the other end surface 550b of the electrode pillar 550 opposite to the redistribution layer 530 side surface 550a, and the surface 520b of the semiconductor chip 520 opposite to the redistribution layer 530 side surface 520a with the electrode pillar 550 and the semiconductor chip 520 with a gap between them. In this embodiment as well, a sealing layer 510 with the same redistribution layer 530 arranged as after S216 is formed on the substrate 80 and the adhesive layer 82.

[0126] Figure 13B shows an example of a manufacturing method for the semiconductor device 500, continuing from Figure 13A.

[0127] Following S308, the sealing portion 522 is back-ground (BG) until the end face 550b of the electrode pillar 550 is exposed (S310). This removes resin until the other end face 550b of the electrode pillar 550 is exposed.

[0128] Next, the sealing layer 510 is peeled off from the substrate 80 and the adhesive layer 82 (S312). The sealing layer 510 formed in S312 is the same as the sealing layer 510 after S218. In this embodiment, the method for manufacturing the semiconductor device 500 that is carried out thereafter can be the same as that from S220 onwards.

[0129] In this embodiment, the sealing layer 510 is peeled from the substrate 80 and adhesive layer 82 after backgrinding, in which the end face 550b of the electrode pillar 550 is exposed. However, the timing of peeling the substrate 80 and adhesive layer 82 is not limited to after S310. For example, the process of peeling the substrate 80 and adhesive layer 82 may be performed between S308 and S310. In this case, the sealing layer 510 and redistribution layer 530 obtained after peeling the substrate 80 and adhesive layer 82 are the same as those obtained after S216. Thus, the substrate 80 and adhesive layer 82 may be peeled from the sealing layer 510 at any timing at which the structure of the sealing layer 510 can be stabilized even without temporary support from the substrate 80.

[0130] Next, an insulating layer 542 is formed on the sealing layer 510 and the redistribution layer 530, and a metal layer 592 for arranging the ball terminal 90 is arranged (S314). The insulating layer 542 may be made of phenol. In this case as well, an insulating layer 544 and a conductive pattern layer 546 may be provided, similar to the surface 510a of the sealing layer 510. This provides the redistribution layer 540. Therefore, on the surface 510a of the sealing layer 510 on which the semiconductor chip 520 and electrode pillar 550 are arranged, after peeling the substrate 80 from the sealing layer 510, a redistribution layer 540 can be formed on the surface 522b of the sealing portion 522 opposite to the surface 522a on the redistribution layer 530 side of the sealing portion 522, the end face 550b of the electrode pillar 550, and the surface 520b of the semiconductor chip opposite to the surface 520a on the redistribution layer 530 side of the semiconductor chip, electrically connecting the connection portion 548 and the electrode pillar 550. Here, the metal layer 592 for arranging the ball terminal 90 may be made of a metal that has good solder wettability and high chemical stability, such as nickel (Ni) or gold (Au).

[0131] Ball terminals 90 are mounted on the metal layer 592 (S316). Dicing with the ball terminals 90 mounted is performed to separate each semiconductor device 500 into individual pieces (S318). This allows the semiconductor device 500 to be manufactured.

[0132] As described above, the semiconductor device 500 can be manufactured using either the chip-first or chip-last manufacturing method. This makes it possible to provide a semiconductor device 500 with thin redistribution layers 530 and 540 and compatible with double-sided terminal packages.

[0133] This makes it possible to alleviate stress concentration in the semiconductor device 500 and reduce the overall structure of the semiconductor package. Furthermore, because it is compatible with double-sided terminal packages, it improves the design flexibility regarding the electrical connections of the package and provides an advantageous semiconductor device 500 that can efficiently dissipate heat from the electrode pillars 550.

[0134] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications or improvements can be made to the above embodiments. It will be clear from the claims that such modified or improved forms may also be included in the technical scope of the present invention.

[0135] It should be noted that the execution order of operations, procedures, steps, and stages in the apparatus, systems, programs, and methods shown in the claims, specifications, and drawings is not explicitly stated as "before," "prior to," etc., and that these can be implemented in any order unless the output of a previous process is used in a later process. Even if the operation flow in the claims, specifications, and drawings is described using phrases such as "first," "next," etc. for convenience, it does not mean that it is essential to perform the operations in that order. [Explanation of Symbols]

[0136] 60 circuit boards 62,90 Ball terminals 80 circuit boards 82 Adhesive layer 500 Semiconductor Equipment 510 Sealing layer 510a,510b plane 520 semiconductor chips 520a,520b plane 522 Sealing section 522a,522b plane 524, 526, 572 terminals 527 pads 528 Bump 530,540 redistribution layer 530a,530b plane 532, 534, 542, 544 Insulating layer 536,546 conductive pattern layers 538,548 Connection part 539,549 metal layer 540a,540b plane 550 Electrode Pillar 550a,550b end face 552 Side view 560 Conductive Structure 562 Part 1 564 Part 2 566 Part 3 570 semiconductor chips 574 Bump 590 seed layer 592 Metal layer

Claims

1. A sealing layer having a semiconductor chip and an electrode pillar disposed opposite the side surface of the semiconductor chip via a resin, The sealing layer comprises a first redistribution layer provided on the first surface of the sealing layer, The first redistribution layer is provided on the first surface of the semiconductor chip facing the first surface of the sealing layer, and includes a first conductive portion that electrically connects a first terminal portion exposed on the first surface of the sealing layer and one end surface of the electrode pillar exposed on the first surface of the sealing layer. Semiconductor equipment.

2. The first terminal portion has a bump, The semiconductor device according to claim 1, wherein the first terminal portion and the first conductive portion of the semiconductor chip are electrically connected via the bump.

3. The semiconductor device according to claim 1, further comprising a ball terminal provided on the electrode pillar exposed on the surface of the first redistribution layer opposite to the surface facing the sealing layer or on the first surface of the sealing layer, and electrically connected to the first conductive portion.

4. The semiconductor device according to claim 1, wherein the thickness of the first redistribution layer is 0.3 mm or less.

5. The semiconductor device according to claim 1, further comprising a second redistribution layer, which includes a second conductive portion provided on the second surface of the sealing layer opposite to the first surface and electrically connected to a second terminal portion provided on the second surface of the semiconductor chip opposite to the first surface.

6. A current path is formed between the first conductive portion and the second conductive portion via the semiconductor chip. The semiconductor device according to claim 5.

7. The semiconductor device according to claim 5, wherein a portion of the side surface of the electrode pillar is exposed from the side surface of the sealing layer.

8. The semiconductor device according to claim 1, wherein the first redistribution layer includes a transparent region in at least a portion of the region facing the semiconductor chip, which is made of a transparent material that transmits light from outside the first redistribution layer to the semiconductor chip, or transmits light emitted from the semiconductor chip to the outside of the first redistribution layer.

9. The sealing layer comprises a plurality of electrode pillars, At least two of the aforementioned plurality of electrode pillars are electrically connected. The semiconductor device according to claim 1.

10. The semiconductor chip has a semiconductor stack portion on the first surface facing the first redistribution layer that realizes the functions provided by the semiconductor chip, The semiconductor device according to claim 5, wherein the surface of the first redistribution layer opposite to the surface facing the first surface of the sealing layer is the mounting surface of the semiconductor device.

11. The semiconductor chip has a semiconductor stack portion that realizes the functions provided by the semiconductor chip on a second surface opposite to the first surface facing the first redistribution layer, The semiconductor device according to claim 5, wherein the surface of the first redistribution layer opposite to the surface facing the first surface of the sealing layer is the mounting surface of the semiconductor device.

12. The semiconductor device according to claim 1, wherein the sealing layer includes a plurality of semiconductor chips.

13. The semiconductor device according to claim 12, wherein the plurality of semiconductor chips are stacked in the thickness direction of the sealing layer.

14. The semiconductor device according to claim 8, wherein the semiconductor chip includes an optical element.

15. The sealing layer is located at a position facing the side surface of the semiconductor chip and has a conductive structure exposed on the side surface of the sealing layer. The semiconductor device according to claim 5.

16. The conductive structure divides the sealing portion that seals the semiconductor chip in the sealing layer into two regions at least one of the first cross-section of the sealing layer intersecting with the first surface of the semiconductor chip or the surface on the first redistribution layer side. The semiconductor device according to claim 15.

17. In the conductive structure, the thickness of one portion facing the side surface of the semiconductor chip is less than the thickness of the other portion exposed on the side surface of the sealing layer. The semiconductor device according to claim 15 or 16.

18. The semiconductor device according to claim 5, wherein the sealing layer further comprises a conductive structure having a first portion facing the side surface of the semiconductor chip and extending in a direction along the side surface of the semiconductor chip, a second portion extending from one end of the first portion in a direction away from the side surface of the semiconductor chip, and a third portion extending from the other end of the first portion in a direction away from the side surface of the semiconductor chip.

19. The semiconductor device according to claim 18, wherein a portion of the second portion and a portion of the third portion are exposed on the side surface of the sealing layer, and the thickness of the portion of the second portion and the portion of the third portion is thinner than that of the first portion.

20. The steps include forming a sealing layer by sealing one surface of the temporary support substrate with resin while arranging semiconductor chips and electrode pillars at intervals on one surface of the temporary support substrate, After removing the temporary support substrate from the first surface of the sealing layer, on the first surface of the sealing layer, The steps include forming a first redistribution layer that electrically connects a first terminal portion provided on the first surface of the semiconductor chip exposed on the first surface of the sealing layer with one end surface of the electrode pillar exposed from the first surface of the sealing layer, The step of scraping the resin until the other end face of the electrode pillar is exposed from the second surface of the sealing layer opposite to the first surface, A step of forming a second rewiring layer that is electrically connected to the other end face of the electrode pillar on the second surface of the sealing layer where the other end face of the electrode pillar is exposed. A method for manufacturing a semiconductor device, comprising:

21. The steps include forming a first redistribution layer on one surface of the temporary support substrate, The steps include forming an electrode pillar electrically connected to the first rewiring layer on the side of the first rewiring layer opposite to the side facing the temporary support substrate, The steps include: placing a semiconductor chip on the surface of the first redistribution layer opposite to the surface on the temporary support substrate side, at a distance from the electrode pillar, and electrically connected to the electrode pillar via the first redistribution layer; With the electrode pillar and the semiconductor chip positioned with a gap between them, the surface of the first redistribution layer opposite to the surface on the temporary support substrate, the other end surface of the electrode pillar opposite to the end surface on the first redistribution layer side, and the surface of the semiconductor chip opposite to the surface on the first redistribution layer side are sealed with resin. The step of grinding the resin until the other end face of the electrode pillar is exposed, After peeling the temporary support substrate from the first redistribution layer, the second redistribution layer is formed on the surface of the resin opposite to the surface facing the first redistribution layer, on the other end surface of the electrode pillar, and on the surface of the semiconductor chip opposite to the surface facing the first redistribution layer, and the second redistribution layer is formed to be electrically connected to the electrode pillar. A method for manufacturing a semiconductor device, comprising:

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