Thin-film capacitor and electronic circuit board equipped therewith

Abstract

In a thin-film capacitor having a structure in which a conductive polymer is filled into a roughened region of a metal foil, short circuits between the conductive polymer and the metal foil are prevented. [Solution] The thin-film capacitor 100 comprises a metal foil 10 having a non-roughened region 14 and a roughened region 13 surrounded by the non-roughened region 14, a dielectric film 15 covering the surface of the metal foil 10 located in the roughened region 13, a conductive polymer 21 filled in the roughened region 13 via the dielectric film 15, an upper electrode 24 connected to the conductive polymer 21, and a lower electrode 32 connected to the metal foil 10. In plan view, the roughened region 13 includes an end region 13B extending along the non-roughened region 14 and a central region 13A surrounded by the end region 13B. The depth Db in the end region 13B of the roughened region 13 is deeper than the depth Da in the central region 13A of the roughened region 13.

Description

Technical Field

[0001] The present disclosure relates to a thin film capacitor and an electronic circuit board including the same.

Background Art

[0002] Patent Document 1 discloses a thin film capacitor using a metal foil whose surface is partially roughened. The surface of the metal foil located in the roughened region is covered with a dielectric film. The roughened region is filled with a conductive polymer through the dielectric film.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] But when the conductive polymer overflows from the roughened region, there is a risk that the conductive polymer and the metal foil will be short-circuited. In addition, when an external force is applied to the thin film capacitor, there is also a problem that damage is likely to occur at the boundary between the roughened region and the non-roughened region.

[0005] The present disclosure describes an improved thin film capacitor having a structure in which a roughened region of a metal foil is filled with a conductive polymer.

Means for Solving the Problems

[0006] A thin-film capacitor according to one aspect of the present disclosure comprises a metal foil having a non-roughened region and a roughened region surrounded by the non-roughened region; a dielectric film covering the surface of the metal foil located in the roughened region; a conductive polymer filled in the roughened region via the dielectric film; an upper electrode connected to the conductive polymer; and a first lower electrode connected to the metal foil. In plan view, the roughened region includes an end region extending along the non-roughened region and a central region surrounded by the end region. The depth in the end region of the roughened region is greater than the depth in the central region of the roughened region.

[0007] A thin-film capacitor according to another aspect of the present disclosure comprises a metal foil having a non-roughened region and a roughened region surrounded by the non-roughened region; a dielectric film covering the surface of the metal foil located in the roughened region; a conductive polymer filled in the roughened region via the dielectric film; an upper electrode connected to the conductive polymer; and a lower electrode connected to the metal foil. The boundary between the roughened region and the non-roughened region has a tapered shape in cross-section such that the width of the roughened region in the planar direction narrows in the depth direction. [Effects of the Invention]

[0008] According to one aspect of this disclosure, a thin-film capacitor makes it possible to prevent short circuits between the conductive polymer and the metal foil.

[0009] According to other aspects of this disclosure, thin-film capacitors make it possible to suppress damage at the boundary between roughened and non-roughened regions. [Brief explanation of the drawing]

[0010] [Figure 1A] Figure 1A is a schematic plan view illustrating the structure of a thin-film capacitor 100 according to one embodiment of the present disclosure. [Figure 1B] Figure 1B is a schematic cross-sectional view along line AA shown in Figure 1A. [Figure 2] Figure 2 is a schematic enlarged view illustrating the structure of the roughened region 13 of the metal foil 10. [Figure 3]Figure 3 is a schematic plan view illustrating the structure of the roughened region 13 of the metal foil 10. [Figure 4A-4I] Figures 4A to 4I are schematic process diagrams illustrating the method for forming the roughened region 13. [Figure 5] Figure 5 is a schematic cross-sectional view showing an electronic circuit board having a configuration in which a thin-film capacitor 100 is embedded in a multilayer substrate 400. [Figure 6] Figure 6 is a schematic cross-sectional view showing an electronic circuit board having a configuration in which a thin-film capacitor 100 is mounted on the surface of a multilayer substrate 600. [Figure 7] Figure 7 is a schematic cross-sectional view illustrating the structure of the thin-film capacitor 101 according to the first modification. [Figure 8] Figure 8 is a schematic plan view illustrating the structure of the thin-film capacitor 102 according to the second modification. [Figure 9A] Figure 9A is a schematic plan view illustrating the structure of the thin-film capacitor 103 according to the third modification. [Figure 9B] Figure 9B is a schematic cross-sectional view along line AA shown in Figure 9A. [Figure 10A] Figure 10A is a schematic plan view illustrating the structure of the thin-film capacitor 104 according to the fourth modification. [Figure 10B] This is a schematic cross-sectional view along line AA shown in Figure 10A. [Figure 11A] Figure 11A is a schematic plan view illustrating the structure of the thin-film capacitor 105 according to the fifth modification. [Figure 11B] Figure 11B is a schematic cross-sectional view along line AA shown in Figure 11A. [Figure 12] Figure 12 is a table showing the results of the example. [Modes for carrying out the invention]

[0011] The embodiments of this disclosure will be described in detail below with reference to the attached drawings.

[0012] FIG. 1A is a schematic plan view for explaining the structure of the thin film capacitor 100 according to an embodiment of the present disclosure. FIG. 1B is a schematic cross-sectional view taken along line A-A shown in FIG. 1A.

[0013] As shown in FIGS. 1A and 1B, the thin film capacitor 100 according to this embodiment includes a metal foil 10 made of Al (aluminum) or the like, a conductive polymer 21 filled in a roughened region 13 exposed on the upper surface 11 of the metal foil 10, a carbon film 22 in contact with the conductive polymer 21, an upper electrode 24 connected to the carbon film 22 via a seed layer 23, and a lower electrode 32 connected to the upper surface 11 of the metal foil 10 via a seed layer 31. The upper electrode 24 and the lower electrode 32 are separated by insulating resin layers 41 and 42.

[0014] The metal foil 10 is a foil-shaped base material with the Z direction as the thickness direction and the XY direction as the plane direction. It is not essential to use Al as the material of the metal foil 10, and Ti (titanium), Ta (tantalum), Zr (zirconium), Hf (hafnium), Nb (niobium), Cr (chromium), etc. can be used, but it is preferable to use Al from the viewpoints of easily forming a dense roughened structure and easy availability. The metal foil 10 has a roughened region 13 with a roughened surface and a non-roughened region 14 that is not roughened. The roughened region 13 constitutes a part of the upper surface 11 of the metal foil 10. The remaining part of the upper surface 11 of the metal foil 10 and the entire lower surface 12 of the metal foil 10 are constituted by the non-roughened region 14.

[0015] FIG. 2 is a schematic enlarged view for explaining the structure of the roughened region 13 of the metal foil 10.

[0016] As shown in FIG. 2, the roughened region 13 of the metal foil 10 has a porous structure, whereby the surface area of the metal foil 10 is greatly enlarged in the roughened region 13. The surface of the metal foil 10 located in the roughened region 13 is covered with a dielectric film 15. The dielectric film 15 may be an oxide film such as Al2O3 obtained by oxidizing the metal foil 10, or an insulating material such as HfOx formed by using the ALD method, CVD method, mist CVD method, etc.

[0017] The roughened region 13 is filled with a conductive polymer 21 via a dielectric film 15. The conductive polymer 21 is connected to the upper electrode 24 via a carbon film 22 and a seed layer 23. Meanwhile, the metal foil 10 is connected to the lower electrode 32 via a seed layer 31. This constitutes a capacitor with the dielectric film 15 acting as a capacitive insulating film. In the example shown in Figure 1A, the upper electrode 24 and the lower electrode 32 are aligned in the X direction.

[0018] Figure 3 is a schematic plan view illustrating the structure of the roughened region 13 of the metal foil 10.

[0019] As shown in Figure 3, the roughened region 13 of the metal foil 10 is surrounded by the unroughened region 14 in a plan view from the Z direction, which is the thickness direction, and includes an annular end region 13B extending along the unroughened region 14 and a central region 13A surrounded by the end region 13B. In the example shown in Figure 3, the planar shape of the roughened region 13 is approximately rectangular, and therefore the end region 13B has four corner portions 13C. More specifically, the boundary between the roughened region 13 and the unroughened region 14 includes boundaries 131 and 132 extending in the X direction in a plan view, and boundaries 133 and 134 extending in the Y direction in a plan view, and corner portions 13C are formed at the positions where boundaries 131 and 133 end, where boundaries 131 and 134 end, where boundaries 132 and 133 end, and where boundaries 132 and 134 end.

[0020] In the thin-film capacitor 100 according to this embodiment, as shown in Figure 1B, the depth Db in the Z direction at the edge region 13B of the roughened region 13 is deeper than the depth Da in the Z direction at the central region 13A of the roughened region 13. This makes it less likely for the conductive polymer 21 filling the roughened region 13 to overflow beyond the roughened region 13, thus reducing the likelihood of a short circuit between the overflowed conductive polymer 21 and the lower electrode 32. Furthermore, the boundaries 131-134 between the roughened region 13 and the non-roughened region 14 have a tapered shape in cross-section such that the width of the roughened region 13 in the planar direction narrows in the depth direction. For example, in the XZ cross-section shown in Figure 1B, the boundaries 133 and 134 have a tapered shape, so that the width of the roughened region 13 in the X direction narrows as it deepens in the Z direction. If the boundary 131-134 between the roughened region 13 and the non-roughened region 14 has such a tapered shape, the mechanical strength of the metal foil 10 is improved, so even if an external force such as bending stress is applied to the thin-film capacitor 100, damage to the metal foil 10 at the boundary 131-134 becomes less likely.

[0021] Figures 4A to 4I are schematic process diagrams illustrating the method for forming the roughened region 13.

[0022] First, with the metal foil 10 fixed to the substrate 51 via the adhesive layer 52 (Figure 4A), a photosensitive resist 53 is applied to the upper surface 11 of the metal foil 10 (Figure 4B). Next, the resist 53 is exposed via the mask 54 (Figure 4C), and then developed to expose the upper surface 11 of the metal foil 10 in the area overlapping the mask 54 (Figure 4D). Next, a buffer layer 55 made of alumina or the like is formed on the exposed upper surface 11 of the metal foil 10 (Figure 4E), and then the resist 53 is removed (Figure 4F). Next, a photosensitive resist 56 is applied again to the upper surface 11 of the metal foil 10, and exposure and development are performed to expose the buffer layer 55 and the upper surface 11 of the metal foil 10 surrounding it (Figure 4G). Etching is performed in this state to form a roughened region 13 on the metal foil 10 (Figure 4H). In this process, the metal foil 10 surrounding the buffer layer 55 is roughened first during the period until the buffer layer 55 is removed by etching, so the etching progresses deeper in the edge region 13B than in the central region 13A. As a result, the edge region 13B is deeper than the central region 13A. Furthermore, by adjusting the etching conditions, the boundary between the roughened region 13 and the non-roughened region 14 can be made tapered. After etching is complete, the processing of the metal foil 10 is completed by removing the resist 56 (Figure 4I).

[0023] Thus, since the central part of the area where the roughened region 13 is to be formed is covered with a buffer layer 55 before the roughened region 13 is formed on the metal foil 10 by etching, etching of the central region 13A of the roughened region 13 is slowed down. As a result, the etching depth of the edge region 13B of the roughened region 13 becomes deeper than that of the central region 13A.

[0024] After processing the metal foil 10 is complete, the thin-film capacitor 100 according to this embodiment is completed by performing the following steps in this order: formation of the dielectric film 15, formation of the insulating resin layer 41, filling of the roughened region 13 with conductive polymer 21, formation of the carbon film 22, formation of seed layers 23 and 31, formation of the upper electrode 24 and lower electrode 32, and formation of the insulating resin layer 42.

[0025] As described above, the thin-film capacitor 100 according to this embodiment has a shape in which the roughened region 13 of the metal foil 10 deepens at the edge region 13B, making it less likely for the conductive polymer 21 to overflow from the roughened region 13. This makes it possible to prevent a short circuit between the conductive polymer 21 and the lower electrode 32 due to overflow of the conductive polymer 21. Moreover, since the boundary between the roughened region 13 and the non-roughened region 14 is tapered, the mechanical strength of the boundary between the roughened region 13 and the non-roughened region 14, which are prone to damage, is increased. As a result, even if external forces such as bending stress are applied to the thin-film capacitor 100, it becomes less likely for the metal foil 10 to be damaged.

[0026] The thin-film capacitor 100 according to this embodiment may be embedded in the multilayer substrate 400 as shown in Figure 5, or mounted on the surface of the multilayer substrate 600 as shown in Figure 6.

[0027] The electronic circuit board shown in Figure 5 has a configuration in which a semiconductor IC 500 is mounted on a multilayer substrate 400. The multilayer substrate 400 is a multilayer substrate that includes a plurality of insulating layers, including insulating layers 401 to 404, and a plurality of wiring patterns, including wiring patterns 411 and 412. The number of insulating layers is not particularly limited. In the example shown in Figure 5, a thin-film capacitor 100 is embedded between insulating layer 402 and insulating layer 403. The surface of the multilayer substrate 400 is provided with a plurality of land patterns, including land patterns 441 and 442. The semiconductor IC 500 has a plurality of pad electrodes, including pad electrodes 501 and 502. Pad electrodes 501 and 502 are, for example, power terminals on one side and ground terminals on the other. Pad electrode 501 and land pattern 441 are connected via solder 511, and pad electrode 502 and land pattern 442 are connected via solder 512. The land pattern 441 is connected to the upper electrode 24 of the thin-film capacitor 100 via via conductor 421, wiring pattern 411, and via conductor 431. Meanwhile, the land pattern 442 is connected to another lower electrode 32 of the thin-film capacitor 100 via via conductor 422, wiring pattern 412, and via conductor 432. As a result, the thin-film capacitor 100 functions as a decoupling capacitor for the semiconductor IC 500.

[0028] The electronic circuit board shown in Figure 6 has a configuration in which a semiconductor IC 700 is mounted on a multilayer substrate 600. The multilayer substrate 600 is a multilayer substrate that includes multiple insulating layers, including insulating layers 601 and 602, and multiple wiring patterns, including wiring patterns 611 and 612. The number of insulating layers is not particularly limited. In the example shown in Figure 6, a thin-film capacitor 100 is surface-mounted on the surface 600a of the multilayer substrate 600. Multiple land patterns, including land patterns 641 to 644, are provided on the surface 600a of the multilayer substrate 600. The semiconductor IC 700 has multiple pad electrodes, including pad electrodes 701 and 702. For example, one of the pad electrodes 701 and 702 is a power terminal and the other is a ground terminal. Pad electrode 701 and land pattern 641 are connected via solder 711, and pad electrode 702 and land pattern 642 are connected via solder 712. The land pattern 641 is connected to the upper electrode 24 of the thin-film capacitor 100 via via conductor 621, wiring pattern 611, via conductor 631, land pattern 643, and solder 713. On the other hand, the land pattern 642 is connected to the lower electrode 32 of the thin-film capacitor 100 via via conductor 622, wiring pattern 612, via conductor 632, land pattern 644, and solder 714. As a result, the thin-film capacitor 100 functions as a decoupling capacitor for the semiconductor IC 700.

[0029] Figure 7 is a schematic cross-sectional view illustrating the structure of the thin-film capacitor 101 according to the first modification.

[0030] The thin-film capacitor 101 according to the first modification shown in Figure 7 differs from the thin-film capacitor 100 according to the above embodiment in that the bottom surface of the roughened region 13 is curved so that the depth of the roughened region 13 gradually increases from the central region 13A to the edge region 13B. Since the other basic configurations are the same as those of the thin-film capacitor 100 according to the above embodiment, the same reference numerals are used for the same elements, and redundant explanations are omitted. As illustrated by the thin-film capacitor 101 according to the first modification, the bottom surface of the roughened region 13 may be curved.

[0031] Figure 8 is a schematic plan view illustrating the structure of the thin-film capacitor 102 according to the second modification, and, similar to Figure 3, shows the structure of the roughened region 13 of the metal foil 10.

[0032] The thin-film capacitor 102 according to the second modification shown in Figure 8 differs from the thin-film capacitor 100 according to the above embodiment in that the end region 13B of the roughened region 13 includes a non-corner region 13B1 extending along the boundary 131-134 and a corner region 13B2 located near the corner portion 13C, and the depth in the corner region 13B2 is deeper than the depth in the non-corner region 13B1. Since the other basic configurations are the same as those of the thin-film capacitor 100 according to the above embodiment, the same reference numerals are used for the same elements and redundant explanations are omitted. As illustrated by the thin-film capacitor 102 according to the second modification, making the depth in the corner region 13B2 deeper than the depth in the non-corner region 13B1 makes it possible to prevent short-circuit failures in the corner region 13B2 where conductive polymer 21 is prone to overflow. The depth of the roughened region 13 in the corner region 13B2 can be adjusted by the radius of curvature of the corner portion 13C. Furthermore, the non-corner region 13B7 shown in Figure 8 is the region of the non-corner region 13B1 that is adjacent to the lower electrode 32 in a plan view.

[0033] Figure 9A is a schematic plan view illustrating the structure of the thin-film capacitor 103 according to the third modification, and, similar to Figure 3, shows the structure of the roughened region 13 of the metal foil 10. Figure 9B is a schematic cross-sectional view along line AA shown in Figure 9A.

[0034] The thin-film capacitor 103 according to the third modification shown in Figures 9A and 9B differs from the thin-film capacitor 100 according to the above embodiment in that the end region 13B of the roughened region 13 includes an end region 13B4 adjacent to the lower electrode 32 in a plan view and an end region 13B3 not adjacent to the lower electrode 32 in a plan view, and the depth Dd4 in the end region 13B4 is deeper than the depth Db3 in the end region 13B3. Since the other basic configurations are the same as the thin-film capacitor 100 according to the above embodiment, the same reference numerals are used for the same elements and redundant explanations are omitted. As illustrated by the thin-film capacitor 103 according to the third modification, if the depth of the roughened region 13 in the end region 13B4 adjacent to the lower electrode 32 is increased, it becomes possible to more effectively prevent short circuits between the conductive polymer 21 and the lower electrode 32.

[0035] Figure 10A is a schematic plan view illustrating the structure of the thin-film capacitor 104 according to the fourth modification, and, similar to Figure 3, shows the structure of the roughened region 13 of the metal foil 10. Figure 10B is a schematic cross-sectional view along line AA shown in Figure 10A.

[0036] The thin-film capacitor 104 according to the fourth modification shown in Figures 10A and 10B differs from the thin-film capacitor 100 according to the above embodiment in that the end region 13B of the roughened region 13 includes an end region 13B6 adjacent to the lower electrode 32 in a plan view and an end region 13B5 not adjacent to the lower electrode 32 in a plan view, and the width W6 of the end region 13B6 in the X direction is wider than the width W5 of the end region 13B5 in the X or Y direction. Since the other basic configurations are the same as those of the thin-film capacitor 100 according to the above embodiment, the same reference numerals are used for the same elements and redundant explanations are omitted. As illustrated by the thin-film capacitor 104 according to the fourth modification, selectively widening the width of the end region 13B5 adjacent to the lower electrode 32 makes it possible to more effectively prevent short circuits between the conductive polymer 21 and the lower electrode 32.

[0037] Figure 11A is a schematic plan view illustrating the structure of the thin-film capacitor 105 according to the fifth modification. Figure 11B is a schematic cross-sectional view along line AA shown in Figure 11A.

[0038] The thin-film capacitor 105 according to the fifth modification shown in Figures 11A and 11B differs from the thin-film capacitor 100 according to the above embodiment in that it has multiple lower electrodes 32. Since the other basic configurations are the same as those of the thin-film capacitor 100 according to the above embodiment, the same reference numerals are used for the same elements, and redundant explanations are omitted. In the example shown in Figure 11A, five lower electrodes 32 are provided, and each lower electrode 32 is surrounded by the upper electrode 24 via insulating resin layers 41 and 42. As illustrated by the thin-film capacitor 105 according to the fifth modification, it is possible to reduce ESR and ESL by providing multiple lower electrodes 32.

[0039] While embodiments of the technology described herein have been explained above, it goes without saying that the technology described herein is not limited to the embodiments described above, and various modifications are possible without departing from its spirit, and these modifications are also included within the scope of the technology described herein.

[0040] The technology relating to this disclosure includes, but is not limited to, the following configuration examples.

[0041] A thin-film capacitor according to one aspect of this disclosure comprises a metal foil having a non-roughened region and a roughened region surrounded by the non-roughened region; a dielectric film covering the surface of the metal foil located in the roughened region; a conductive polymer filled in the roughened region via the dielectric film; an upper electrode connected to the conductive polymer; and a first lower electrode connected to the metal foil. In a plan view, the roughened region includes an end region extending along the non-roughened region and a central region surrounded by the end region. The depth in the end region of the roughened region is greater than the depth in the central region of the roughened region. This makes it less likely for the conductive polymer to overflow from the roughened region.

[0042] In the thin-film capacitor described above, the boundary between the roughened region and the non-roughened region includes a first boundary extending in a first direction in a plan view and a second boundary extending in a second direction different from the first direction in a plan view, and the end region includes a non-corner region extending along the first boundary and a corner region located near the corner where the first boundary and the second boundary terminate, and the depth of the corner region of the roughened region may be greater than the depth of the non-corner region of the roughened region. This makes it less likely for the conductive polymer to overflow from the corner region.

[0043] In the thin-film capacitor described above, the end region includes a first end region adjacent to the first lower electrode in a plan view, and a second end region not adjacent to the first lower electrode in a plan view. The depth of the first end region of the roughened region may be greater than the depth of the second end region of the roughened region. This makes short-circuit defects between the conductive polymer and the lower electrode less likely to occur.

[0044] The thin-film capacitor described above further comprises a second lower electrode connected to a metal foil, wherein the first lower electrode may be surrounded by an upper electrode via an insulating resin layer in a plan view, and the second lower electrode may be surrounded by an upper electrode via an insulating resin layer in a plan view. This makes it possible to reduce ESR and ESL.

[0045] In the thin-film capacitor described above, the boundary between the roughened region and the non-roughened region may have a tapered shape in cross-section such that the width of the roughened region in the planar direction narrows in the depth direction. This increases the mechanical strength of the metal foil.

[0046] A thin-film capacitor according to another aspect of the present disclosure comprises a metal foil having a non-roughened region and a roughened region surrounded by the non-roughened region; a dielectric film covering the surface of the metal foil located in the roughened region; a conductive polymer filled in the roughened region via the dielectric film; an upper electrode connected to the conductive polymer; and a lower electrode connected to the metal foil. The boundary between the roughened region and the non-roughened region has a tapered shape in cross-section such that the width of the roughened region in the planar direction narrows in the depth direction. This makes it possible to suppress damage at the boundary portion between the roughened region and the non-roughened region.

[0047] An electronic circuit board according to one aspect of this disclosure comprises a substrate having a wiring pattern, a semiconductor IC mounted on or embedded in the substrate, and the thin-film capacitor described above. The upper and lower electrodes of the thin-film capacitor are connected to the semiconductor IC via the wiring pattern. In this configuration, the thin-film capacitor functions as a decoupling capacitor for the semiconductor IC. [Examples]

[0048] Samples A1-A6 and B1 were fabricated, having the same configuration as the thin-film capacitor 102 shown in Figure 8, but with different shapes of roughened regions 13. The ratio of the depth of the end regions 13B (non-corner regions 13B7, non-corner regions 13B1, and corner regions 13B2) to the depth of the central region 13A, the radius of curvature of the corner portion 13C, and the presence or absence of taper at the boundaries 131-134 for each sample A1-A6 and B1 are shown in the table in Figure 12. Here, "depth of central region 13A" is the average depth within a radius of 50 μm from the center in the XY plane direction of the roughened region 13. "Depth of non-corner region 13B7" is the maximum depth in the non-corner region 13B7. "Depth of non-corner region 13B1" is the average depth in the non-corner region 13B1 along the boundaries 131, 132, and 134. "Depth of corner region 13B2" refers to the maximum depth in corner region 13B2.

[0049] As shown in Figure 12, in samples A1 to A6, the end region 13B is deeper than the central region 13A in all cases, whereas in sample B1, there is no significant difference between the depth of the central region 13A and the depth of the end region 13B.

[0050] As shown in Figure 12, samples A1 to A6 had a higher yield compared to sample B1. In particular, samples A1 to A3, which had a greater depth in the corner region 13B2, had an even higher yield. Furthermore, in samples A1 to A5, which had tapered boundaries 131 to 134, no cracks occurred even when bending tests were performed. [Explanation of Symbols]

[0051] 10 Metal foil 11 Top side 12 Bottom side 13 Roughened area 13A Central area 13B, 13B3~13B6 end area 13B1, 13B7 Non-corner areas 13B2 Corner Area 13C Corner 14 Non-roughened area 15 Dielectric film 21 Conductive polymers 22 Carbon film 23 Seed Layer 24 Upper electrode 31 Seed Layer 32 Lower electrode 41,42 Insulating resin layer 51 Base material 52 Adhesive layer 53 Resist 54 masks 55 Buffer Layer 56 Resist 100~105 Thin-film capacitor 131~134 Boundary 400 multilayer board 401-404 Insulating layer 411,412 Wiring Patterns 421, 422, 431, 432 via conductors 441,442 Land Pattern 500 Semiconductor ICs 501, 502 Pad electrodes 511,512 Solder 600 multilayer board 600a surface 601, 602 Insulating layer 611,612 Wiring Pattern 621, 622, 631, 632 via conductors 641-644 Land Pattern 700 Semiconductor ICs 701, 702 Pad electrodes 711~714 Solder

Claims

1. A metal foil having a non-roughened region and a roughened region surrounded by the non-roughened region, A dielectric film covering the surface of the metal foil located in the roughened region, The conductive polymer filled in the roughened region via the dielectric film, The upper electrode connected to the conductive polymer, A first lower electrode connected to the metal foil, Equipped with, The roughened region, in plan view, includes an end region extending along the non-roughened region and a central region enclosed by the end region. The depth in the edge region of the roughened area is deeper than the depth in the central region of the roughened area. Thin-film capacitor.

2. The boundary between the roughened region and the non-roughened region includes a first boundary extending in a first direction in a plan view and a second boundary extending in a second direction different from the first direction in a plan view. The end region includes a non-corner region extending along the first boundary and a corner region located near the corner where the first boundary and the second boundary terminate. The depth of the corner region of the roughened area is greater than the depth of the non-corner region of the roughened area. The thin-film capacitor according to claim 1.

3. The end region includes a first end region adjacent to the first lower electrode in a plan view, and a second end region not adjacent to the first lower electrode in a plan view. The depth of the first end region of the roughened area is deeper than the depth of the second end region of the roughened area. The thin-film capacitor according to claim 1.

4. The system further comprises a second lower electrode connected to the metal foil, The first lower electrode is surrounded by the upper electrode via an insulating resin layer in a plan view. The second lower electrode is surrounded by the upper electrode via the insulating resin layer in a plan view. The thin-film capacitor according to claim 1.

5. The boundary between the roughened region and the non-roughened region has a tapered shape in cross-section such that the width of the roughened region in the planar direction narrows in the depth direction. The thin-film capacitor according to claim 1.

6. A metal foil having a non-roughened region and a roughened region surrounded by the non-roughened region, A dielectric film covering the surface of the metal foil located in the roughened region, The conductive polymer filled in the roughened region via the dielectric film, The upper electrode connected to the conductive polymer, The lower electrode connected to the metal foil, Equipped with, The boundary between the roughened region and the non-roughened region has a tapered shape in cross-section such that the width of the roughened region in the planar direction narrows in the depth direction. Thin-film capacitor.

7. A circuit board having a wiring pattern, The substrate comprises a semiconductor IC mounted on or embedded in the substrate and a thin-film capacitor according to any one of claims 1 to 6, The upper and lower electrodes of the thin-film capacitor are connected to the semiconductor IC via the wiring pattern. Electronic circuit board.

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