Reticle front surface potential control using clamp bar connections.

Abstract

The electrostatic reticle clamp includes a dielectric body, an electrode configured to impart a charge to a first surface of the body to electrostatically clamp the reticle to a second surface of the dielectric body, a plurality of burls provided on the second surface of the dielectric body and configured to contact the reticle, a conductive coating provided on the surface of a subset of the burls, a power source, and a controller configured to supply a voltage from the power source to the conductive coating.

Description

[Technical Field]

[0001] [CROSS REFERENCE TO RELATED APPLICATIONS] This application claims the benefit of priority to U.S. Application No. 63 / 445,262, filed February 13, 2023, which is incorporated herein by reference in its entirety.

[0002] [Technical field] The present invention relates to a system and method for reducing particle formation on a reticle. [Background technology]

[0003] In many types of lithography, particle formation can cause significant defects and lead to reduced yield. Defect rates are often measured as particles added per reticle pass (PRP), which is typically measured as the number of particles added on the reticle per 10,000 wafers.

[0004] For example, in EUV lithography, during the generation of an EUV pulse, the EUV beam exposes the reticle. There are actually two sources of electrons emitting in the reticle mini-environment (RME): 1) electrons due to the photoelectric effect (ejected from the reticle) and 2) electrons due to photoionization in the volume. As electrons are ejected from the reticle, the front surface of the reticle becomes positively charged (not all electrons return to the reticle). The cumulative effect of all the electrons, in addition to the EUV plasma, creates negatively charged particles in the RME, which are attracted to the positively charged front surface of the reticle, causing an increase in PRP.

[0005] To improve yield, the PRP needs to be continually reduced. Summary of the Invention

[0006] The present invention provides the ability to control the backside and frontside potentials of a reticle clamped using an electrostatic reticle clamp. By controlling the frontside potential, PRP can be reduced.

[0007] In one embodiment, the electrostatic reticle clamp includes a dielectric body, an electrode configured to impart a charge to a first surface of the body to electrostatically clamp the reticle to a second surface of the dielectric body, a plurality of burls disposed on the second surface of the dielectric body and configured to contact the reticle, a conductive coating disposed on the surface of a subset of the burls, a power source, and a controller configured to supply a voltage from the power source to the conductive coating.

[0008] In one embodiment, the controller and power supply are configured to apply a positive voltage to the conductive coating, which applies a positive potential to the backside of the reticle mounted on the burl, reducing the amount of electrons emitted into the reticle mini-environment during the generation of the EUV pulse.

[0009] In one embodiment, the controller and power supply are configured to apply a positive voltage to the conductive coating to impart a positive charge to the front surface of the reticle, and in one embodiment, the controller and power supply are configured to apply a negative voltage to the conductive coating to impart a negative charge to the back surface of the reticle mounted on the burl to repel particles from the front surface of the reticle between EUV pulses.

[0010] In one embodiment, the controller and power supply are configured to apply a negative voltage to the conductive coating to impart a negative charge to the front surface of the reticle, hi one embodiment, the conductive coating comprises a coating of chromium (Cr) or titanium nitride (TiN).

[0011] In one embodiment, the electrostatic reticle clamp further comprises a plurality of high voltage and ground connections on the clamp ears, the ears being coated with a conductive clamp ear coating that is connected to a ground pin on at least one of the clamp ears. In one embodiment, the electrostatic reticle clamp further comprises one or more caps disposed over the ears, the one or more caps being electrically connected to the conductive clamp ear coating.

[0012] In some embodiments, the conductive coating crosses over a raised structure separating the clamping ears and the burls, the raised structure providing a leak seal for connecting the burls. In some embodiments, the ground connection on one ear is modified to supply a voltage to the conductive coating, while the ground pin on the other ear remains connected to ground. In some embodiments, at least one electrode is connected to ground. In some embodiments, the conductive coating provides a conductive path from a power source to the surface of a subset of the burls.

[0013] In one embodiment, a method of forming an electrostatic reticle clamp includes providing a dielectric body having a plurality of burls on a first surface of the dielectric body, applying a conductive coating to the first surface of the dielectric body, and retaining the coating on a subset of the burls and on the conductive pathways to pattern the conductive coating on the first surface of the body and enable application of an electric potential to the subset of the burls through the conductive pathways.

[0014] In some embodiments, the patterning comprises a lithographic patterning process to provide a conductive path from at least one clamp ear on a peripheral portion of the clamp to a subset of the burls. In some embodiments, the method further comprises providing at least one glass body on the second surface of the dielectric body and two electrodes between the dielectric body and the at least one glass body. [Brief explanation of the drawings]

[0015] [Figure 1] 1 depicts a schematic representation of a lithographic apparatus according to an embodiment;

[0016] [Figure 2] 1 illustrates a schematic representation of an embodiment of a lithographic cell or cluster according to an embodiment;

[0017] [Figure 3] 2 is a schematic diagram of a lithographic projection apparatus similar to FIG. 1 according to an embodiment;

[0018] [Figure 4] 1 shows a more detailed schematic diagram of a lithographic projection apparatus;

[0019] [Figure 5] 1 shows a schematic representation of a reticle clamp.

[0020] [Figure 6] 1A and 1B are schematic cross-sectional views of an exploded view of a reticle clamp;

[0021] [Figure 7] 10A and 10B illustrate the clamping function of the reticle clamp.

[0022] [Figure 8] 10A and 10B show schematic diagrams of charged particle effects and reticle bias when the exposure beam is on.

[0023] [Figure 9] 10A and 10B show schematic diagrams of charged particle effects and reticle bias when the exposure beam is on.

[0024] [Figure 10] 10A and 10B show schematic diagrams of charged particle effects and reticle biasing when the exposure beam is off.

[0025] [Figure 11]1 illustrates a schematic diagram of an embodiment of an electrostatic reticle clamp.

[0026] [Figure 12] 10 illustrates a schematic diagram of an embodiment for implementing a reticle front surface potential.

[0027] [Figure 13] 13A-13B show a schematic representation of one embodiment that allows for varnish potential control.

[0028] [Figure 14] 14A-14B show a schematic representation of one embodiment that allows for varnish potential control.

[0029] [Figure 15] 10A and 10B illustrate an embodiment of a crowbar configuration. DETAILED DESCRIPTION OF THE INVENTION

[0030] Generally, a mask or reticle can be a transparent block of material covered with a pattern defined by a different opaque material. Various masks are fed into a lithography apparatus and used to form layers of a semiconductor device. The pattern defined on a particular mask or reticle corresponds to the features to be fabricated in one or more layers of the semiconductor device. Often, multiple masks or reticles are automatically fed into the lithography apparatus during production and used to form corresponding layers of the semiconductor device. Clamps within the lithography apparatus (e.g., electrostatic reticle clamps) are used to securely hold the mask or reticle in place during processing. These clamps can become contaminated with material particles transferred from the reticle, causing performance degradation over time and requiring periodic cleaning to restore performance.

[0031] Cleaning these clamps can require the lithography tool and manufacturing process to be shut down. This cleaning can take several hours to complete, expose the environment within the lithography tool to ambient conditions, introduce other contaminants into the system, and / or have other disadvantages. Additionally, there are flushing processes that circulate ultra-clean dry air (XCDA) through the chamber to remove particles, but these also require several hours and do not completely and effectively clean these particles, as particles may still remain on the front surface of the reticle, affecting the performance of the PRP.

[0032] In contrast to conventional approaches, the present system and method provides a system in which particles are repelled (bounced) from the front surface of the reticle, thus preventing them from adhering to the front surface. The present system and method reuses the grounded pins in the electrostatic reticle clamp to serve as a potential connection for the front surface of the reticle. A strip of conductive coating (e.g., Cr, TiN) can be wired from the clamp ear to a small section of the clamp burl. This connection can drive a slightly positive voltage, e.g., 5-10 V. The reticle can include a conductive coating that electrically connects the back surface of the clamp to the front surface. When the back surface of the reticle contacts the electrically connected clamp burl, a voltage can be applied from the ground pin through the conductive coating on the clamp to the conductive coating on the reticle. This causes the front surface of the reticle to have a positive charge, which repels particles.

[0033] While specific reference may be made in this document to the manufacture of integrated circuits (ICs), it should be understood that the description herein has many other possible applications. For example, it may be used in the manufacture of integrated optical systems, magnetic domain memory induction and detection patterns, liquid crystal display panels, thin film magnetic heads, etc. Those skilled in the art will understand that, in the context of such alternative applications, any use of the terms "reticle," "wafer," or "die" herein should be considered interchangeable with the more general terms "mask," "substrate," and "target portion," respectively. Furthermore, any use of the terms "reticle" or "mask" herein may be considered synonymous with the more general term "patterning device."

[0034] By way of introduction, before transferring a pattern from a reticle, such as a mask, to the substrate, the substrate may undergo various processes, such as priming, resist coating, and a soft bake. After exposure, the substrate may undergo other processes ("post-exposure processing"), such as a post-exposure bake (PEB), development, a hard bake, and measurement and / or other inspection of the transferred pattern. These series of processes are used as a basis for creating individual layers of a device (e.g., an IC). The substrate may then undergo various processes to finish the individual layers of the device, such as etching, ion implantation (doping), metallization, oxidation, chemical-mechanical polishing, etc. If multiple layers are required for a device, these processes, or variations thereof, are repeated for each layer. Eventually, devices will be present on each target portion of the substrate. These devices are separated from one another by techniques such as dicing or sawing, and the individual devices may be mounted on a carrier or connected to pins.

[0035] The fabrication of devices, such as semiconductor devices, typically involves processing a substrate (e.g., a semiconductor wafer) using multiple manufacturing processes to form various features and multiple layers of the device. Such layers and features are typically fabricated and processed using deposition, lithography, etching, chemical-mechanical polishing, ion implantation, and / or other processes. Multiple devices may be fabricated on multiple dies on the substrate and then separated into individual devices. This device fabrication process may be considered a patterning process. A patterning process includes a patterning step, such as optical lithography and / or nanoimprint lithography, using a reticle in a lithography tool to transfer the pattern on the reticle to the substrate, and typically, but optionally, includes one or more associated pattern processing steps, such as developing the resist in a developer tool, baking the substrate using a bake tool, and etching with the pattern using an etcher. One or more metrology processes are typically included in the patterning process.

[0036] Lithography is a process in the manufacture of devices such as integrated circuits, in which patterns formed on a substrate define the functional elements of devices such as microprocessors, memory chips, etc. Similar lithography techniques are also used in the formation of flat panel displays, microelectromechanical systems (MEMS), and other devices.

[0037] As semiconductor manufacturing processes improve, the dimensions of functional elements continue to shrink, while the number of functional elements, such as transistors, per device has steadily increased for decades, in line with a trend commonly referred to as "Moore's Law." In the current state of the art, device layers are fabricated using lithographic projection apparatus that project a design layout onto a substrate using illumination from a deep ultraviolet illumination source, resulting in individual functional elements with dimensions well below 100 nm, i.e., less than half the wavelength of the radiation from the illumination source (e.g., a 193 nm illumination source).

[0038] This process, in which features with dimensions smaller than the classical resolution limit of the lithographic projection tool are printed, is commonly referred to as low-k1 lithography and follows the resolution formula CD = k1 × λ / NA, where λ is the wavelength of the radiation used (currently, most commonly 248 nm or 193 nm), NA is the numerical aperture of the projection optics of the lithographic projection tool, CD is the "critical dimension" (typically the smallest feature size to be printed), and k1 is an empirical resolution factor. Generally, the smaller k1, the more difficult it becomes to reproduce on the substrate a pattern resembling the shape and dimensions planned by the designer to achieve a particular electrical function and performance. To overcome these difficulties, sophisticated fine-tuning processes are applied to the lithographic projection tool, the design layout, or the reticle. These include, for example, but are not limited to, optimization of NA and optical coherence settings, customized illumination schemes, use of phase-shifting reticles, optical proximity correction (OPC, also known as "optical process correction") in the design layout, overlay metrology, or other methods commonly defined as "resolution enhancement techniques" (RET).

[0039] The term "projection optics" as used herein should be interpreted broadly to encompass various types of optics, including, for example, refractive optics, reflective optics, apertures, catadioptric optics, etc. The term "projection optics" may include components that operate according to any of these design types to collectively or individually direct, shape, or control a projection beam of radiation. The term "projection optics" may include any optical element in a lithographic projection apparatus, regardless of where the optical element is located in the optical path of the lithographic projection apparatus. The projection optics may include optical elements for shaping, conditioning, and / or projecting radiation from a radiation source before the radiation passes through a reticle, and / or may include optical elements for shaping, conditioning, and / or projecting radiation after the radiation has passed through a reticle. The projection optics generally excludes the radiation source and the reticle.

[0040] 1 schematically illustrates an embodiment of a lithographic apparatus LA that may be included in and / or associated with the present systems and / or methods. The apparatus comprises an illumination system (illuminator) IL configured to condition a radiation beam B (e.g., UV radiation, DUV radiation, or EUV radiation), a support structure (e.g., mask table) MT constructed to support a reticle (e.g., mask) MA and connected to a first positioner PM configured to accurately position the reticle according to certain parameters, a substrate table (e.g., wafer table) WT (e.g., WTa, WTb, or both) configured to hold a substrate (e.g., a resist-coated wafer) W and coupled to a second positioner PW configured to accurately position the substrate according to certain parameters, and a projection system (e.g., a refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by the reticle MA onto a target portion C (e.g., comprising one or more dies, often referred to as a field) of the substrate W. The projection system is supported on a reference frame (RF). As depicted, the apparatus is of a transmissive type (e.g. employing a transmissive mask) or alternatively, the apparatus may be of a reflective type (e.g. employing a programmable mirror array of a type as described above, or employing a reflective mask).

[0041] The illuminator IL receives a beam of radiation from the radiation source SO. The radiation source and the lithographic apparatus may be separate entities, for example when the radiation source is an excimer laser. In such cases, the radiation source is not considered to be part of the lithographic apparatus, and the radiation beam is passed from the radiation source SO to the illuminator IL with the aid of a beam delivery system BD, for example comprising suitable directing mirrors and / or beam expanders. In other cases, the radiation source may be an integral part of the apparatus, for example when the radiation source is a mercury lamp. The radiation source SO and the illuminator IL, together with the beam delivery system BD if required, may be referred to as a radiation system.

[0042] The illuminator IL may modify the intensity distribution of the beam. The illuminator may be configured to limit the radial extent of the radiation beam so that the intensity distribution is non-zero within an annular region in a pupil plane of the illuminator IL. Additionally or alternatively, the illuminator IL may be operable to limit the distribution of the beam in the pupil plane so that the intensity distribution is non-zero within a number of equally spaced sectors in the pupil plane. The intensity distribution of the radiation beam in the pupil plane of the illuminator IL may be referred to as an illumination mode.

[0043] The illuminator IL may include an adjuster AD configured to adjust the (angular / spatial) intensity distribution of the beam. Typically, at least the outer and / or inner radial extent (commonly referred to as σ-outer and σ-inner, respectively) of the intensity distribution in a pupil plane of the illuminator can be adjusted. The illuminator IL may be operable to change the angular distribution of the beam. For example, the illuminator may be operable to change the number and angular extent of non-zero sectors of the intensity distribution in the pupil plane. By adjusting the intensity distribution of the beam in the pupil plane of the illuminator, different illumination modes may be realized. For example, by limiting the radial and angular extent of the intensity distribution in the pupil plane of the illuminator IL, the intensity distribution may have a multipole distribution, e.g., a dipole, quadrupole, or hexapole distribution. A desired illumination mode may be obtained, for example, by inserting an optical system providing that illumination mode into the illuminator IL or by using a spatial light modulator.

[0044] The illuminator IL may be operable to change the polarization of the beam using the adjuster AD or to adjust the polarization. The polarization state of the radiation beam across a pupil plane of the illuminator IL may be referred to as the polarization mode. The use of different polarization modes may enable the realization of higher contrast in the image formed on the substrate W. The radiation beam may be unpolarized. Alternatively, the illuminator may be configured to linearly polarize the radiation beam. The polarization direction of the radiation beam may vary across the pupil plane of the illuminator IL. The polarization direction of the radiation may be different in different regions of the pupil plane of the illuminator IL. The polarization state of the radiation may be selected depending on the illumination mode. In a multipole illumination mode, the polarization of each pole of the radiation beam may be approximately orthogonal to the position vector of that pole in the pupil plane of the illuminator IL. For example, in a dipole illumination mode, the radiation may be linearly polarized in a direction substantially orthogonal to the bisector of two opposing sectors of the dipole. The radiation beam may be polarized in one of two different orthogonal directions, which may be referred to as the X and Y polarization states. In the case of a quadrupole illumination mode, the radiation in each pole sector may be linearly polarized in a direction substantially orthogonal to the bisector of that sector. This polarization mode may be referred to as XY polarization. Similarly, in the case of a hexapole illumination mode, the radiation in each pole sector may be linearly polarized in a direction substantially orthogonal to the bisector of that sector. This polarization mode may be referred to as TE polarization.

[0045] In addition, the illuminator IL will typically comprise various other components, such as an integrator IN and a condenser CO. The illumination system may include various types of optical elements, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical elements, or any combination thereof, for directing, shaping or controlling radiation. Accordingly, the illuminator provides a conditioned radiation beam B having a desired uniformity and intensity distribution in its cross-section.

[0046] The support structure MT supports the reticle in a manner that depends on the orientation of the reticle, the design of the lithographic apparatus, and other conditions, such as whether or not the reticle is held in a vacuum environment. The support structure may hold the reticle using mechanical, vacuum, electrostatic or other clamping techniques. The support structure may be, for example, a frame or a table, which may be fixed or movable as required. The support structure may ensure that the reticle is at a desired position, for example with respect to the projection system.

[0047] The term "reticle", as used herein, should be interpreted broadly as referring to any device that can be used to impart a pattern onto a target portion of a substrate. In an embodiment, the reticle is any device that can be used to impart a radiation beam with a pattern in its cross-section to generate a pattern in the target portion of the substrate. It should be noted that the pattern imparted to the radiation beam may not exactly correspond to the desired pattern in the target portion of the substrate if, for example, the pattern includes phase-shifting features or so-called assist features. Generally, the pattern imparted to the radiation beam will correspond to a particular functional layer in a device being created in the target portion of the device, such as an integrated circuit.

[0048] A patterning device may be transmissive or reflective. Examples of patterning devices include reticles or masks, programmable mirror arrays, and programmable LCD panels. Reticles or masks are well known in lithography, and include mask types such as binary, alternating phase-shift, and attenuated phase-shift, as well as various hybrid mask types. An example of a programmable mirror array employs a matrix arrangement of small mirrors, each of which can be individually tilted so as to reflect an incoming radiation beam in different directions. The tilted mirrors impart a pattern to the radiation beam, which is reflected by the mirror matrix.

[0049] The term "projection system" as used herein should be interpreted broadly as encompassing any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, that are suitable for the exposure radiation used and other factors, such as the use of an immersion liquid or a vacuum. The term "projection lens" as used herein may be considered as synonymous with the more general term "projection system".

[0050] The projection system PS has an optical transfer function that may be non-uniform, which may affect the pattern imaged onto the substrate W. For unpolarized radiation, such effects can be reasonably well described by two scalar maps that describe the transmission (apodization) and relative phase (aberrations) of radiation exiting the projection system PS as a function of position in its pupil plane. These scalar maps may be referred to as the transmission map and the relative phase map, and may be expressed as linear combinations of a complete set of basis functions. A convenient set are the Zernike polynomials, which form a set of orthogonal polynomials defined on the unit circle. Determining each scalar map may involve determining the coefficients of such an expansion. Because the Zernike polynomials are orthogonal on the unit circle, the Zernike coefficients can be determined by calculating the dot product of the measured scalar map with each Zernike polynomial in turn, and dividing this by the square of the norm of that Zernike polynomial.

[0051] The transmission map and relative phase map are field- and system-dependent. That is, in general, each projection system PS will have a different Zernike expansion for each field point (i.e., for each spatial location in its image plane). The relative phase in the pupil plane of the projection system PS may be determined, for example, by projecting radiation from a point source in the object plane of the projection system PS (i.e., the plane of the reticle MA) through the projection system PS and measuring the wavefront (i.e., the locus of points with the same phase) using a shearing interferometer. Because shearing interferometers are common-path interferometers, they have the advantage of not requiring a secondary reference beam to measure the wavefront. The shearing interferometer may comprise a diffraction grating, e.g., a two-dimensional grid, in the image plane of the projection system (i.e., on the substrate table WTa or WTb), and a detector positioned to detect an interference pattern in a plane conjugate to the pupil plane of the projection system PS. The interference pattern is related to the derivative of the phase of the radiation with respect to coordinates in the pupil plane in the shearing direction. The detector may comprise an array of sensing elements, such as a charge-coupled device (CCD).

[0052] Because the projection system PS of a lithographic apparatus may not produce visible fringes, the accuracy of the wavefront determination can be improved using phase-stepping techniques, such as moving a diffraction grating. The steps can be performed in the plane of the diffraction grating or in a direction perpendicular to the scan direction of the measurement. The step range can be one period of the grating, and at least three (uniformly distributed) phase steps can be used. Thus, for example, three scan measurements can be performed in the y direction, each at a different position in the x direction. This stepping of the diffraction grating effectively converts phase changes into intensity changes, allowing the determination of phase information. The grating can also be stepped in a direction perpendicular to the diffraction grating (z direction) to calibrate the detector.

[0053] The diffraction grating may be scanned sequentially in two orthogonal directions, which may coincide with the axes (x and y) of the coordinate system of the projection system PS or may be at an angle, such as 45 degrees, to these axes. The scan may be performed over an integer multiple of the grating period, for example over one period of the grating. The scan averages the phase change in one direction and allows the reconstruction of the phase change in the other direction. This allows the wavefront to be determined as a function of both directions.

[0054] The transmission (apodization) at the pupil plane of the projection system PS may be determined by projecting radiation through the projection system PS, for example from a point source in the object plane of the projection system PS (i.e., in the plane of the reticle MA), and measuring the intensity of the radiation in a plane conjugate to the pupil plane of the projection system PS using a detector. The same detector may be used as is used to measure the wavefront and determine aberrations.

[0055] The projection system PS may include multiple optical elements (e.g., lenses) and may further include an adjustment mechanism configured to adjust one or more optical elements to correct aberrations (phase variations across the pupil plane across the field). To achieve this, the adjustment mechanism may be operable to manipulate one or more optical elements (e.g., lenses) in the projection system PS in one or more different ways. The projection system may have a coordinate system whose optical axis extends in the z-direction. The adjustment mechanism may be operable to perform any combination of displacing one or more optical elements, tilting one or more optical elements, and / or deforming one or more optical elements. The displacement of the optical elements may be in any direction (x, y, z, or a combination thereof). Tilting of an optical element is typically performed by rotating it about an axis in the x- and / or y-direction out of a plane perpendicular to the optical axis, although rotation about the z-axis may be used for non-rotationally symmetric aspherical optical elements. The deformation of the optical elements may include low-frequency shaping (e.g., astigmatism) and / or high-frequency shaping (e.g., freeform aspheres). Deforming the optical element may be performed, for example, by exerting a force on one or more sides of the optical element using one or more actuators and / or by heating one or more selected regions of the optical element using one or more heating elements. In general, it may not be possible to adjust the projection system PS to correct for apodization (transmittance variation across the pupil plane). A transmittance map of the projection system PS may be used when designing a reticle (e.g., mask) MA for the lithographic apparatus LA. Using computational lithography techniques, the reticle MA may be designed to at least partially correct for apodization.

[0056] The lithographic apparatus may be of a type having two or more stages (dual stage, or e.g. two or more substrate tables WTa, WTb, two or more reticle tables, a substrate table WTa and a substrate-less table WTb below the projection system dedicated to, e.g. supporting measurement and / or cleaning). Such a "multi-stage" machine may use the additional tables in parallel, or may perform preparatory steps on one or more tables while one or more others are used for exposure. For example, alignment measurements using alignment sensors AS and / or level (height, tilt, etc.) measurements using level sensors LS may be performed.

[0057] The lithographic apparatus may be of a type wherein at least a portion of the substrate is covered by a liquid having a relatively high refractive index, e.g., water, so as to fill a space between the projection system and the substrate. Immersion liquids may also be applied to other spaces in the lithographic apparatus, for example, between the reticle and the projection system. Immersion techniques are well known in the art for increasing the numerical aperture of projection systems. The term "immersion," as used herein, does not imply that a structure such as the substrate must be submerged in liquid, but rather simply that a liquid is located between the projection system and the substrate during exposure.

[0058] During operation of the lithographic apparatus, a radiation beam is conditioned and provided by an illumination system IL. The radiation beam B is incident on a reticle (e.g., mask) MA, which is held on a support structure (e.g., mask table) MT. After passing the reticle MA, the radiation beam B passes through a projection system PS, which focuses the beam onto a target portion C of a substrate W. With the aid of a second positioner PW and a position sensor IF (e.g., an interferometer device, a linear encoder, a 2D encoder, or a capacitive sensor), the substrate table WT can be precisely moved, for example to position different target portions C in the path of the radiation beam B. Similarly, a first positioner PM and further position sensors (not explicitly shown in FIG. 1 ) can accurately position the reticle MA with respect to the path of the radiation beam B, for example after mechanical retrieval from a mask library or during a scan. In general, movement of the support structure MT may be realized with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning), which form part of the first positioner PM. Similarly, movement of the substrate table WT may be realized using a long-stroke module and a short-stroke module, which form part of the second positioner PW. In the case of a stepper (as opposed to a scanner), the support structure MT may be connected to a short-stroke actuator only, or may be fixed. The reticle MA and the substrate W may be aligned using reticle alignment marks M1, M2 and substrate alignment marks P1, P2. The substrate alignment marks as illustrated occupy dedicated target portions, but may also be located in spaces between the target portions (these are referred to as scribe-lane alignment marks). Similarly, in situations in which more than one die is provided on the reticle MA, the reticle alignment marks may be located between the dies.

[0059] The depicted apparatus may be used in at least one of the following modes: 1. In step mode, the support structure MT and the substrate table WT are kept essentially stationary and a pattern imparted to the radiation beam is projected onto a target portion C at a time (i.e. a single static exposure). The substrate table WT is then shifted in the X and / or Y direction so that a different target portion C can be exposed. In step mode, the maximum size of the exposure field limits the size of the target portion C imaged in a single static exposure. 2. In scan mode, the support structure MT and the substrate table WT are scanned synchronously while a pattern imparted to the radiation beam is projected onto the target portion C (i.e. a single dynamic exposure). The velocity and direction of the substrate table WT relative to the support structure MT may be determined by the (de-)magnification and image reversal characteristics of the projection system PS. In scan mode, the maximum size of the exposure field limits the width of the target portion in a single dynamic exposure (non-scan direction), whereas the length of the scanning motion determines the height of the target portion (scan direction). 3. In another mode, the support structure MT is kept essentially stationary holding a programmable reticle thereon, and the substrate table WT is moved or scanned while a pattern imparted to the radiation beam is projected onto a target portion C. In this mode, a pulsed radiation source is typically employed, and the programmable reticle is updated as required after each movement of the substrate table WT, or in between successive pulses of radiation during a scan. This mode of operation is readily applicable to maskless lithography using programmable reticles, such as programmable mirror arrays of the type referred to above. Combinations and variations on the above modes or entirely different modes may also be employed.

[0060] The substrate may be processed, before or after exposure, in, for example, a track (a tool that typically applies a layer of resist to a substrate and develops the exposed resist) or a metrology or inspection tool. Where applicable, the disclosure herein may be applied to such and other substrate processing tools. Furthermore, a substrate may be processed multiple times, for example to produce a multi-layer IC, and thus the term substrate as used herein may refer to a substrate already including multiple processed layers.

[0061] As used herein, the terms "radiation" and "beam" encompass all types of electromagnetic radiation, including ultraviolet (UV) or deep ultraviolet (DUV) radiation (e.g., having a wavelength of 365, 248, 193, 157, or 126 nm), extreme ultraviolet (EUV) radiation (e.g., having a wavelength in the range of 5-20 nm), and particle beams such as ion beams and electron beams.

[0062] Various patterns provided on or by a reticle may have different process windows, i.e., a space of processing variables within which the patterns will be produced. Examples of pattern specifications related to potential systematic defects include checks for necking, line pullback, thinning, critical dimension (CD), edge placement, overlap, resist top loss, resist undercut, and / or bridging. The process window of a pattern on a reticle or region thereof may be obtained by merging (e.g., overlapping) the process windows of each individual pattern. The process window boundary of a group of patterns comprises the process window boundaries of several individual patterns. In other words, these individual patterns limit the process window of the group of patterns. These patterns are sometimes referred to as "hot spots" or "process window limiting patterns (PWLPs)," which are used interchangeably herein. It is possible and economical to focus on hot spots when controlling portions of the patterning process. If the hot spots are free of defects, it is likely that other patterns are also free of defects.

[0063] As shown in FIG. 2, the lithography apparatus LA may form part of a lithography cell LC, also known as a lithocell or cluster, which also includes apparatus for performing pre-exposure and post-exposure processes on substrates. Typically, these include one or more spin coaters SC for depositing one or more resist layers, one or more developers for developing exposed resist, one or more chill plates CH, and / or one or more bake plates BK. A substrate handler, or robot RO, picks up one or more substrates from input / output ports I / O1 and I / O2, moves them between different process tools, and delivers them to the loading bay LB of the lithography apparatus. These devices, often collectively referred to as a track, are under the control of a track control unit TCU, which is itself controlled by a supervisory control system SCS, which also controls the lithography apparatus via a lithography control unit LACU. Thus, the various devices can be operated to maximize throughput and processing efficiency.

[0064] To ensure that substrates exposed by a lithographic apparatus are accurately and consistently exposed, and / or to monitor portions of a patterning process (e.g., a device manufacturing process) that includes at least one pattern transfer step (e.g., an optical lithography step), it is desirable to inspect substrates or other objects to measure or determine one or more characteristics, such as alignment, overlay (e.g., between structures on an upper layer or between structures on the same layer that are separately provided on the same layer, e.g., by a double patterning process), linewidth, critical dimension (CD), focus offset, material properties, etc. For example, contamination on a reticle clamping membrane (e.g., as described herein) may adversely affect overlay because clamping a reticle on such contamination will distort the reticle. Therefore, a manufacturing facility in which a lithocell LC is located typically also includes a metrology system that measures some or all of a substrate W ( FIG. 1 ) processed in the lithocell or other objects within the lithocell. The metrology system may be part of the lithographic apparatus LA, such as an alignment sensor AS ( FIG. 1 ).

[0065] The one or more measured parameters may include, for example, alignment, overlay between successive layers formed in or on the patterned substrate, critical dimension (CD) (e.g., critical linewidth) of features formed in or on the patterned substrate, focus or focus error of the optical lithography process, dose or dose error of the optical lithography process, optical aberrations of the optical lithography process, etc. The measurements may be performed on targets on the product substrate itself and / or on dedicated metrology targets provided on the substrate. Measurements may be performed after resist development but before etching, after etching, after deposition, and / or at other times.

[0066] There are various techniques for measuring structures formed in patterning processes, including the use of scanning electron microscopes, image-based metrology tools, and / or various specialized tools. As described above, a fast, non-invasive type of specialized metrology tool directs a beam of radiation at a target on the surface of a substrate and measures the properties of the scattered (diffracted / reflected) beam. By evaluating one or more properties of the radiation scattered by the substrate, one or more properties of the substrate can be determined. This may be referred to as diffraction-based metrology. One application of this diffraction-based metrology is measuring the asymmetry of features within a target. This can be used, for example, as a measure of overlay, although other applications are known. For example, asymmetry can be measured by comparing opposite portions of a diffraction spectrum (e.g., comparing the −1st and +1st orders of the diffraction spectrum of a periodic grating). This can be performed as described above, for example, in U.S. Patent Application Publication No. 2006 / 0066855, which is incorporated herein by reference in its entirety. Another application of diffraction-based metrology is measuring feature width (CD) within a target.

[0067] Thus, during a device manufacturing process (e.g., a patterning process, a lithography process, etc.), various types of measurements may be performed on a substrate or other object during or after the process. The measurements may determine whether a particular substrate is defective, establish the alignment of a process or an apparatus used in the process (e.g., the alignment of two layers on a substrate or the alignment of a reticle relative to a substrate), measure the performance of the process and apparatus, or for other purposes. Examples of measurements include optical imaging (e.g., optical microscopes), non-imaging optical measurements (e.g., diffraction-based measurements such as ASML YieldStar metrology tools, ASMLSMASH metrology systems), mechanical measurements (e.g., stylus-based profiling, atomic force microscopes (AFMs)), and / or non-optical imaging (e.g., scanning electron microscopes (SEMs)). The SMASH (SMart Alignment Sensor Hybrid) system employs a self-referencing interferometer that generates two overlapping, relatively rotated images of an alignment marker, detects the intensity in the pupil plane where the Fourier transforms of the images interfere, and extracts position information from the phase difference between the diffraction orders of the two images, which appears as a change in intensity of the interfered orders, as described in U.S. Pat. No. 6,961,116, which is incorporated herein by reference in its entirety.

[0068] The metrology results may be provided directly or indirectly to the supervisory control system SCS. If an error is detected, adjustments may be made to the exposure of subsequent substrates (particularly if inspection can be performed immediately and one or more other substrates in the batch have not yet been exposed) and / or to subsequent exposures of exposed substrates. Also, already exposed substrates may be stripped and reworked to improve yield, or may be discarded, thereby avoiding further processing of substrates that are known to be defective. If only some target portions of a substrate are defective, further exposures may be performed only on those target portions that meet specification.

[0069] Within a metrology system, a metrology device is used to determine one or more properties of the substrate, and in particular to determine how one or more properties vary between different substrates or between different layers of the same substrate. As mentioned above, the metrology device may be integrated into the lithographic apparatus LA or lithocell LC, or may be a stand-alone device.

[0070] To enable metrology, one or more targets can be provided on the substrate. In some embodiments, the target is specially designed and may comprise a periodic structure. In some embodiments, the target is part of a device pattern, for example, a periodic structure of a device pattern. In some embodiments, the device pattern is a periodic structure of a memory device (e.g., a bipolar transistor (BPT), bit line contact (BLC), etc. structure).

[0071] In one embodiment, a target on a substrate may comprise one or more 1D periodic structures (e.g., gratings) that are printed such that, after development, periodic structure features are formed of hard resist lines. In one embodiment, a target may comprise one or more 2D periodic structures (e.g., gratings) that are printed such that, after development, one or more periodic structures are formed of hard resist pillars or vias in the resist. The bars, pillars, or vias may be etched into the substrate (e.g., one or more layers on the substrate).

[0072] In one embodiment, one of the parameters of interest in the patterning process is overlay. Overlay can be measured using dark-field scatterometry, in which the zeroth diffraction order (corresponding to specular reflection) is blocked and only higher diffraction orders are considered. Examples of dark-field metrology can be found in PCT Patent Application Publications WO 2009 / 078708 and WO 2009 / 106279, which are incorporated by reference in their entireties. Further developments of this technology are described in U.S. Patent Application Publications US 2011 / 0027704, US 2011 / 0043791, and US 2012 / 0242970, which are incorporated by reference in their entireties. Diffraction-based overlay, using dark-field detection of diffraction orders, enables overlay measurements on smaller targets. These targets may be smaller than the illumination spot and may be surrounded by the structure of the device product on the substrate. In one embodiment, multiple targets can be measured in a single radiation capture.

[0073] As lithography nodes continue to shrink, increasingly complex wafer designs may be implemented. Various tools and / or techniques may be used by designers to ensure that complex designs are accurately transferred to the physical wafer. These tools and techniques may include mask optimization, source-mask optimization (SMO), OPC, design for control, and / or other tools and / or techniques. For example, a source-mask optimization process is described in U.S. Pat. No. 9,588,438, titled "Optimization Flow for Source, Mask, and Projection Optics," which is incorporated by reference in its entirety.

[0074] The systems and / or methods of the present disclosure may be used as stand-alone tools and / or techniques, or may be used in conjunction with semiconductor manufacturing processes to assist in the accurate transfer of complex designs onto physical wafers.

[0075] Figure 3 schematically shows an exemplary lithographic projection apparatus LA, which may be similar and / or identical to the apparatus shown in Figure 1 and which may be used in combination with the techniques described herein. The apparatus includes an illumination system IL configured to condition a beam of radiation B. In this example, the illumination system also includes a radiation source SO. The apparatus includes a first object table (e.g., reticle table) MT comprising a reticle holder for holding a reticle MA (e.g., a patterning device), which is connected to a first positioning device for precisely positioning the reticle with respect to an object PS. The apparatus includes a second object table (substrate table) WT comprising a substrate holder for holding a substrate W (e.g., a resist-coated silicon wafer), which is connected to a second positioning device for precisely positioning the substrate with respect to the object PS. The apparatus includes a projection system ("lens") PS (e.g., a refractive, reflective, or catadioptric system) that images an irradiated portion of the reticle MA onto a target portion C (e.g., comprising one or more dies) on the substrate W.

[0076] As depicted, the apparatus LA is of a transmissive type (i.e. has a transmissive reticle), but in general it may be of a reflective type (e.g. have a reflective reticle), for example. The apparatus may also use other types of reticles than a classical mask, such as a programmable mirror array or an LCD matrix.

[0077] A source SO (e.g., a mercury lamp, excimer laser, or LPP (laser-produced plasma) EUV source) generates a radiation beam. This beam is fed into an illumination system (illuminator) IL, either directly or after having traversed conditioning means, such as a beam expander. The illuminator IL may comprise conditioning means for setting the outer and / or inner radial extent (commonly referred to as σ-outer and σ-inner, respectively) of the beam's intensity distribution. In addition, it will typically comprise various other components, such as an integrator and a condenser. In this way, the beam B incident on the reticle MA has a desired uniformity and intensity distribution in its cross-section.

[0078] It should be noted with regard to Figure 3 that the source SO may be within the housing of the lithographic projection apparatus (as is often the case when the source SO is a mercury lamp, for example), but the source SO may also be remote from the lithographic projection apparatus and the radiation beam it generates may be directed into the apparatus (e.g. with the aid of suitable directing mirrors), the latter scenario being often the case when the source SO is an excimer laser (e.g. based on a KrF, ArF, or F2 laser).

[0079] Beam B subsequently intercepts reticle MA, which is held on reticle table MT. After passing through reticle MA, beam B passes through lens PL, which focuses beam B onto a target portion C of substrate W. With the aid of the second positioning means (and interferometric measurement means), the substrate table WT can be precisely moved, for example to position a different target portion C in the beam path. Similarly, the first positioning means can be used to precisely position reticle MA with respect to the path of beam B, for example after mechanical retrieval of reticle MA from a reticle library, or during a scan. Generally, movement of object table MT, WT is realized with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning), which are not explicitly shown. However, in the case of a stepper (as opposed to a step-and-scan tool) the reticle table MT may be connected to a short-stroke actuator, or may be fixed.

[0080] As mentioned above, the LA can be used in two different modes. In step mode, the reticle table MT is kept essentially stationary and the entire reticle image is projected onto the target portion C in one movement (i.e., a single "flash"). The substrate table WT is then shifted in the x and / or y directions so that a different target portion C is irradiated with the beam. In scan mode, essentially the same scenario applies, except that a specific target portion C is not exposed in a single "flash". Instead, the reticle table MT is movable in a given direction (the so-called "scan direction", e.g., the y direction) with a speed v, such that the projection beam B is scanned over the reticle image. Simultaneously, the substrate table WT is simultaneously moved in the same or opposite direction at a speed V = Mv, where M is the magnification factor of the lens PL (typically, M = 1 / 4 or 1 / 5). In this way, a relatively large target portion C can be exposed, without having to compromise on resolution.

[0081] 4 shows the lithographic apparatus LA in more detail, including a source collector module SO, an illumination system IL, and a projection system PS. An EUV radiation-emitting plasma 210 may be formed by a plasma source. EUV radiation may be produced by a gas or vapor, such as Xe gas, Li vapor, or Sn vapor, in which the radiation-emitting plasma 210 is generated and emits radiation in the EUV range of the electromagnetic spectrum. In an embodiment, a plasma of excited tin (Sn) is provided to generate EUV radiation.

[0082] Radiation emitted from the radiation-emitting plasma 210 passes from the source chamber 211 to the collector chamber 212. The collector chamber 212 may include a radiation collector CO. Radiation that passes through the radiation collector CO may be focused to a virtual source point IF. The virtual source point IF is commonly referred to as an intermediate focus, and the source collector module SO is positioned such that the virtual source point IF is located at or near an opening 221 in the enclosing structure 220. The virtual source point IF is an image of the radiation-emitting plasma 210.

[0083] The radiation then passes through an illumination system IL, which may include a faceted field mirror device 22 and a faceted pupil mirror device 24, arranged to provide a desired angular distribution of the unpatterned beam 21 at the reticle MA and a desired uniformity of the radiation intensity at the reticle MA. When the unpatterned beam 21 reflects off the reticle MA, which is held on a support structure MT, a patterned beam 26 is formed, and the patterned beam 26 is imaged by the projection system PS via reflective elements 28, 30 onto a substrate W, which is held on a substrate table WT.

[0084] Typically, there may be more elements in the illumination system IL and the projection system PS than shown. Furthermore, there may be more mirrors than shown in the drawings, for example, 1 to 6 additional reflective elements may be present in the projection system PS than shown in Figure 4. Alternatively, the source collector module SO may be part of an LPP radiation system.

[0085] As shown in Figure 3, in an embodiment, the lithographic apparatus LA comprises an illumination system IL and a projection system PS. The illumination system IL is configured to emit a radiation beam B. The projection system PS is separated from a substrate table WT by an intervening space. The projection system PS is configured to project a pattern imparted to the radiation beam B onto a substrate W. This pattern is intended for the radiation beam B to be EUV radiation.

[0086] The intervening space between the projection system PS and the substrate table WT can be at least partially evacuated, and may be bounded by a solid surface at the location of the projection system PS through which the radiation used is directed towards the substrate table WT.

[0087] FIG. 5 shows a schematic diagram of a reticle clamp. The clamp is an electrostatic clamp. The reticle clamp CL has four high-voltage electrodes HVE, which are arranged vertically relative to one another and each extend horizontally along the length of the clamp CL. The interior of the clamp CL includes multiple crowbars BU protruding from the surface of the clamp CL. The crowbars BU are arranged in a grid pattern spanning the entire surface of the clamp CL. The crowbars BU are used to hold the reticle MA against the clamp CL. The crowbars BU grip the reticle MA using electrostatic charge. The charge can then be removed to release the reticle MA from the crowbars BU. The crowbars BU are used to ensure that the reticle MA only contacts a small surface area of ​​the clamp CL, thereby minimizing contamination of the reticle MA. Additionally, the clamp CL has a first ear EAR1 and a second ear EAR2 on either side. The first ear EAR1 includes a first connection CON1 that can be used to drive a subset of the crowbars BU to a specific voltage. The second ear EAR2 comprises a second connection CON2 that can be used to drive another subset of the burrs BU to a particular voltage. The reason why only a subset of the burrs BU are used will be explained in more detail below.

[0088] As an example, in one embodiment, there may be approximately 2000 burls BU on the surface of the clamp CL. However, in other embodiments, there may be anywhere between 500 and 5000 burls. Additionally, although the burls BU are shown as circular in FIG. 5, the burls BU may be any shape that provides firm contact with the reticle MA, such as square, triangular, oval, etc.

[0089] FIG. 6 shows a schematic exploded cross-sectional view of the reticle clamp CL. The clamp CL includes a thin glass sheet GBU, which is a dielectric body, and a burl BU. Beneath the thin glass sheet GBU are a number of thin high-voltage electrodes HVE (four such electrodes are shown in the illustrated embodiment). Beneath these is a glass plate GLA. The final layer is a glass plate GCC with grooves. When the glass plate GCC is mated to the glass plate GLA, the grooves form closed cooling channels CC, cooling the clamp CL. Cooling fluid is pumped through the cooling channels CC to reduce the temperature of the reticle MA. All of the glass and electrode layers are bonded or fused together to form the clamp CL.

[0090] Figure 7 illustrates the clamping function of the reticle clamp. A controller CONT controls the clamping function of the reticle clamp. The controller CONT may be a CPU, microprocessor, control unit, hardware, software, or other control device for controlling the clamp function. The clamp CL is connected to a power source PS. The power source PS may be a wall outlet, a battery, a fuel cell, or any other power source suitable for use with the clamp CL. When the switch is closed, current flows through the circuit shown in Figure 7. The clamp CL has a high-voltage electrode HVE, which becomes charged by the current. As a result, the right high-voltage electrode HVE generates a positive charge, while the left high-voltage electrode HVE becomes negatively charged. The reticle MA consists of an imaging pattern PATT (to be exposed on a substrate W) on its front surface, a reticle substrate SUB, and a conductive backside coating COAT. When the switch is closed, the reticle MA becomes charged via the coating COAT and is attracted to the charged clamp CL. The left half of the coating COAT becomes negatively charged and is attracted to the positively charged left high-voltage electrode HVE. The right half of the coating COAT is positively charged and is attracted to the negatively charged right high-voltage electrode HVE. This attraction force holds the reticle MA to the crowbar BU by the clamp CL. Thus, the charge from the high-voltage electrode HVE holds the reticle MA to the clamp CL.

[0091] On the other hand, when the switch is open, the clamp CL contains no charge, and the reticle MA is no longer attracted to the clamp CL. In one embodiment, the conductive backside coating COAT is made of chromium nitride (CrN) or tantalum boride (TaB). However, any conductive material that can attract or repel the high-voltage electrode HVE can be used. Additionally, the high-voltage electrode HVE applies a voltage of 3000 V to attract or clamp the reticle MA. However, the present invention is not limited thereto, and in other non-limiting examples, the high-voltage electrode HVE can apply a voltage in the range of 1000 V to 5000 V. Furthermore, while two high-voltage electrodes HVE are shown, the present invention is not limited thereto. For example, each of FIGS. 5, 6, 13, and 14 has four high-voltage electrodes HVE. In various non-limiting examples, there can be any number of high-voltage electrodes HVE, from two to eight.

[0092] 8-10 illustrate the charged particle effect and reticle biasing. When beam B (e.g., an EUV lithography beam) exposes reticle MA, secondary electrons (represented by the symbol "e-") are emitted from the surface of reticle MA into space below, as shown in FIG. 8. This is due to the photoelectric effect of plasma beam B. When used for exposure, plasma beam B will emit many electrons. However, by biasing the front surface of reticle MA with a positive charge, fewer electrons are emitted into the reticle mini-environment (RME). By maintaining a net positive potential on the front surface of the reticle, fewer electrons are emitted during the pulse. A positively charged reticle MA will emit fewer electrons into space.

[0093] Figure 9 shows the effect of beam exposure. Particles P in the space below the reticle MA where secondary electrons reside may carry a predominantly negative charge. As a result, particle P is attracted to the positively charged front surface of the reticle MA. Because of the opposite charges, an electrostatic attractive force F elacts on the particle P and pushes it towards the reticle MA. As a result, during beam exposure, the particle P may adhere (stick) to the front surface of the reticle MA. If this occurs, when the reticle MA is exposed, an inaccurate pattern will be transferred onto the substrate W from the area where the particle P is present, leading to an increased defect rate.

[0094] Figure 10 shows how the reticle is biased. Between exposure pulses of the beam, the front surface of the reticle MA is biased with a negative charge. As a result, negatively charged particles P are repelled (pushed back) away from the negatively charged surface of the reticle MA. The electrostatic attractive force F el The beam pushes particles P towards a reticle masking (REMA) blade BL. The blade BL is used to shield parts of the reticle MA that should not be exposed in the current pass, but in this case also acts as a particle collector. By biasing the front surface of the reticle MA between beam pulses, particles P are pushed back from the reticle MA, reducing the defect rate.

[0095] The front surface of the reticle MA may be biased with a positive charge when the plasma beam is on to reduce the number of electrons emitted from the plasma beam and to repel contaminant particles. When the plasma beam is off, the front surface of the reticle is biased with a negative charge to repel electrons from the reticle MA. As the plasma beam pulses frequently switch from on to off and back on, the bias on the front surface of the reticle also constantly changes from positive to negative and back to positive.

[0096] The electrostatic reticle clamp 11 is shown in FIG. 11. The electrostatic reticle clamp 11 includes a support structure MT having elements of a clamp CL (see FIG. 6 for details). A plurality of burls 70 (e.g., conical protrusions) on a support surface 42 of the support structure MT face the unpatterned backside 41 of the reticle MA. When the reticle MA is clamped to the support structure MT, the unpatterned side 41 contacts the tips of the burls 70. It is not necessary for each of the burls to contact the unpatterned side 41. In general, one or more tips of the burls 70 may contact the unpatterned side 41 of the reticle MA. Meanwhile, the patterned front side 40 is on the other side of the reticle MA, and the exposure beam is incident on the patterned side 40.

[0097] The non-patterned surface 41 is electrically connected to a voltage source 61 via a plurality of burls 70. The electrical connection between the voltage source 61 and the plurality of burls 70 may comprise: the support surface 42 of the support structure electrically connected to the voltage source 61; the plurality of burls 70 electrically connected to the support surface 42 of the support structure MT; and the plurality of burls 70 electrically connected to the non-patterned surface 41 of the reticle MA. It is not necessary for each of the plurality of burls to be electrically connected to the non-support surface 41. In general, one or more of the plurality of burls 70 may be electrically connected to the non-patterned surface 41.

[0098] Additionally, the patterned surface 40 and the non-patterned surface 41 are electrically connected. The electrical connection between the patterned surface 40 and the non-patterned surface 41 may be made via paths that are integrated into the reticle MA itself. Alternatively, the electrical connection between the patterned surface 40 and the non-patterned surface 41 may be made via external paths, such as wiring, as shown in FIG.

[0099] At least one of a resistor 62, a diode, and a switch may be present between the voltage source 61 and the plurality of crowbars 70. The voltage source 61 and the resistor 62 are part of a voltage system 60 of the electrostatic reticle clamp 11. Additionally or alternatively, at least one of a resistor 63, a diode, and a switch may be present between the non-patterned surface and the patterned surface. Further details of these components are provided below.

[0100] During each pulse of EUV radiation, a very large current may be drawn from the voltage source 61. The magnitude of this current may be large enough to damage components such as the voltage source 61. Also, when a very large current is supplied to the reticle MA, the reticle MA may heat up. This may cause deformation of the reticle MA, which may result in errors in the pattern projected from the reticle MA onto the substrate W. To mitigate this, the patterning surface 40 may be connected to the voltage source 61 via at least one of resistors 62, 63, a diode, or a switch.

[0101] If resistors 62, 63 are provided in the path between voltage source 61 and patterning surface 40, the amount of current drawn from voltage source 61 during a pulse of EUV radiation is limited by the additional resistance in the circuit. The resistance value of resistors 62, 63 (or the effective resistance of the combination of resistors) may be greater than 1 kΩ, and preferably greater than 10 kΩ. Desirably, the resistance value is less than 100 kΩ. In this way, an RC characteristic of about 1 μs can be achieved for the circuit. Desirably, the RC characteristic is less than about 10 μs.

[0102] Alternatively, a switch may be provided between voltage source 61 and patterning surface 40. Electrostatic reticle clamp 11 may be configured such that the switch is open while an EUV radiation pulse is being generated and closed while an EUV radiation pulse is not being generated. That is, a bias voltage may be supplied to patterning surface 40 when the EUV radiation pulse is off, but no bias voltage may be supplied to patterning surface 40 when the EUV pulse is on. In this way, no current may be drawn from reticle MA when a pulse of EUV radiation is being generated, which means that a current surge from voltage source 61 to patterning surface 40 is prevented when an EUV pulse is being generated.

[0103] To enable this functionality, the switch may be operable at the same frequency as the frequency of the EUV pulses. For example, the switch may be operable at a frequency greater than 49 kHz, preferably greater than 59 kHz, and more preferably greater than 99 kHz. For example, the switch may be operable at 100 kHz. The switch may be configured to be controlled by a signal from another component within the lithographic apparatus LA that corresponds to turning the EUV pulses on and off. That is, the opening and closing of the switch may be synchronized with the switching on and off of the EUV radiation pulses.

[0104] This illustrates the situation where the bias voltage is cycled between negative and positive. If a positive bias voltage is applied to the patterned surface 40 while the pulse of EUV radiation is on, fewer photoelectrons will be emitted from the patterned surface 40. The bias on the patterned surface 40 is then switched to negative immediately after the pulse of EUV radiation is turned off. Thus, even a voltage bias system in which a positive bias voltage is applied to the patterned surface 40 while the pulse of EUV radiation is on will have the effect of overall reducing the amount of photoelectrons emitted for a particular EUV pulse.

[0105] The above-described embodiments have described applying a negative bias voltage to the patterned surface 40, such that negatively charged contaminant particles are repelled from the patterned surface 40. However, there may be situations where contaminant particles in the reticle environment are positively charged. In this case, a positive bias voltage may be applied to the patterned surface 40, such that the positively charged contaminant particles are repelled by the positively charged patterned surface 40.

[0106] To further reduce the number of contaminant particles attracted to the patterned surface 40 during EUV lithography, the pressure within the reticle environment can be further increased. Increasing the pressure will aid in extracting contaminant particles P generated within the reticle environment. As a result, fewer contaminant particles will become negatively charged, mitigating the problem of negatively charged particles being attracted to the patterned surface 40 when the patterned surface 40 becomes positively charged during a pulse of EUV radiation.

[0107] FIG. 12 schematically illustrates one embodiment for implementing a reticle front surface potential. The clamp CL includes a first ear EAR1 and a second ear EAR2, each having a first connection CON1 and a second connection CON2, respectively, for controlling the reticle front surface potential. Previously, both connections CON1 and CON2 were grounded. However, in this case, one of the grounded pins can be reused to function as the reticle front surface potential. As a result, the first connection CON1 is used to drive the reticle front surface potential (either positive or negative, depending on the exposure sequence), and the second connection CON2 is used as the ground connection. The first connection CON1 can be connected to a burl potential coating BPC or a conductive coating and wired to a subset of the burls (see FIG. 15). When a subset of the burls is coated with the burl potential coating BPC, each burl in the subset of burls ceases to provide a clamping function. Coating the burls with the coating BPC disables the clamping effect of these burls. Meanwhile, a subset of the burls are driven to a slight potential by the burl potential coating BPC to provide reticle bias as described in Figures 8-10.

[0108] The subset of burls may be, for example, by way of non-limiting example, in the range of approximately 20 burls and may comprise a burl potential coating BPC. Thus, of the approximately 2000 burls (as an example), only 20 burls (as an example) may be used for reticle front surface potential control. As a result, these burls may be driven to a slightly negative voltage. These burls are connected to each other through the conductive reticle back surface coating. By driving the burls to a negative voltage, the front surface 40 of the reticle MA may have a negative potential. Therefore, the front surface 40 of the reticle MA may function as a particle repelling mechanism, reducing the defect rate of the front surface 40 of the reticle. Additionally, the burls may also be driven to a positive potential.

[0109] In the above example, it is clear that because only 20 of the 2000 burls are connected to the bur potential coating BPC, a relatively small number (or subset) of burls are required to vent the reticle front surface potential. Most of the burls (1980 burls in this example) continue to be used to clamp the reticle MA. The conductively coated burls are no longer used for clamping, but rather are used solely for reticle biasing. While 20 burls cease to provide clamping functionality, this does not affect the clamping of the reticle MA. The remaining 1980 burls still have sufficient clamping capacity to hold the reticle MA without any performance impact. By using a subset of 20 burls for reticle front surface potential control and the remaining 1980 burls for clamping, the clamp CL can simultaneously perform both voltage biasing and clamping. In other words, the clamp CL can hold the reticle MA while reducing the number of particles that adhere to the reticle MA.

[0110] In the above example, using only 20 burls as a subset of the burls is sufficient to provide adequate reticle biasing to reduce the number of particles adhering to the reticle MA. Using a greater number of burls may allow for greater reticle biasing, but would adversely affect the clamping ability of the clamp CL. If all burls were used for reticle biasing, the reticle MA would not be able to be attached to the clamp CL. As a result, there is a trade-off between providing clamping and providing reticle biasing. For a clamp CL having 2000 burls, it has been found optimal to reuse 20 burls for reticle biasing. In other embodiments, the number of burls used for reticle biasing can be as low as six and as high as 100.

[0111] Bar potential coating BPC is electrically conductive and transfers the electrical potential at the connection to the connected bar. When a slightly positive voltage is applied to the connection, the bar potential coating BPC connection also applies this slightly positive voltage to the connected bar. Bar potential coating BPC can be constructed of chromium (Cr) or titanium nitride (TiN).

[0112] Furthermore, the slightly negative voltage can be between 5 and 10 V, but is not limited to this range. The slightly positive voltage can range from any voltage greater than 0 V up to 20 V. Also, there is no interference between the clamping by the high voltage electrode HVE (3000 V) and the slight voltage (5 to 10 V) by the bar potential coating BPC. This slight voltage is so small that it does not affect the clamping of the reticle MA.

[0113] Additionally, the connection from the backside 41 to the front side 40 of the reticle should be managed by the reticle design modification itself, such as a conductive coating connecting the backside 41 to the front side 40 of the reticle. With this modification, the front side 40 of the reticle can be controlled to a calibrated potential (either positive or negative depending on the exposure sequence), which acts as a means to prevent particle deposition on the reticle FS, thereby reducing the defect rate of the front side 40 of the reticle.

[0114] 13A-13B schematically illustrate an embodiment that allows for crowbar potential control. FIG. 13A shows a clamp CL having multiple electrodes HVE and ELE. The high-voltage electrodes HVE are arranged vertically relative to one another and each extend horizontally, as described in FIG. 7. Each of the four high-voltage electrodes HVE is used to clamp the reticle MA to a corresponding respective portion of the clamp CL using a crowbar BU.

[0115] Furthermore, the electrodes ELE are disposed inside the clamp around the high voltage electrode HVE. The upper electrode ELE is disposed above the upper high voltage electrode HVE, and the lower electrode ELE is disposed below the lower high voltage electrode HVE. The ears of the clamp have a UNICAP surface UNI.

[0116] FIG. 13B is a detailed view of the ear of FIG. 13A, showing just below the UNICAP surface UNI. A clamp ear coating CEC is coated on the ear. A connection CON is shown in the center of the ear. The connection CON is connected to the bar potential coating BPC to transfer the electrical potential. The bar potential coating BPC is also shown in FIG. 13A. The bar potential coating BPC1, which connects the connection CON to the bar potential coating BPC, crosses over the clamp dam that separates the ear and the bar. The clamp dam is a leaky seal.

[0117] In this embodiment, the connection CON is driven to a Var potential, which may be a slightly positive or negative voltage, or ground. The electrode ELE, the clamp ear coating CEC, and the UNICAP surface UNI are also set to Var potential. A small number of Var connected to the Var potential coating BPC are also set to Var potential.

[0118] 14A-14B show a schematic diagram of an embodiment that allows for Var potential control and true ground. FIG. 14A is similar to FIG. 13A, except that ear portion EAR1 is connected to true ground, while ear portion EAR2 is still connected to Var potential. FIG. 14B shows ear portion EAR2 directly below the UNICAP surface UNI in more detail. In this embodiment, the Var with the Var potential coating BPC is set to Var potential. However, the electrode ELE, the clamp ear coating CEC, and the UNICAP surface are all tied to ground.

[0119] By allowing for crowbar potential control and true ground, several advantages exist. This embodiment allows for greater pin flexibility and control. Additionally, the crowbar potential can be separated from the ground. As a result, the crowbar and the lugs can be controlled independently.

[0120] FIG. 15 shows a schematic diagram of one embodiment of a burl configuration. FIG. 15 shows a cross section of a burl used for reticle front side biasing. The burls BU are supported on a top plate TP. The burls BU are coated with a burl potential coating BPC. The burl potential coating BPC may be a titanium nitride (TiN) coating that covers both the top and side surfaces of the burl BU. The burl potential coating BPC biases selected burls BU to provide reticle front side biasing. A positive charge is provided when the plasma beam is on, and a negative charge is provided when the plasma beam is off. This results in a reduced defect rate.

[0121] This specification describes an electrostatic reticle clamp CL, which can be seen in FIG. 6, which includes a dielectric body GBU, an electrode HVE configured to apply a charge to a first surface of the dielectric body GBU facing the electrode HVE to electrostatically clamp a reticle MA (see FIG. 7) to a second surface of the dielectric body GBU from which a plurality of burls BU protrude, a plurality of burls BU provided on the second surface of the dielectric body GBU and configured to contact the reticle MA, a conductive coating BPC provided on the surface of a subset of the burls BU and shown in FIG. 15, a power supply PS shown in FIG. 7, and a controller CONT configured to supply a voltage from the power supply PS to the conductive coating BPU.

[0122] The controller CONT and the power supply PS of the electrostatic reticle clamp CL are configured to apply a positive voltage to the conductive coating BPC (see FIGS. 12-15). As a result, the positive voltage imparts a positive charge to the back surface 41 of the reticle MA, which has a conductive back surface coating COAT (see FIG. 7) and is mounted on the baffle BU, reducing the number of electrons (denoted by e- in FIGS. 8-9) emitted into the reticle miniature environment during the generation of the EUV pulse B. The positive voltage is applied when the EUV beam B is on to minimize the number of electrons emitted into the RME. This EUV beam B on state is shown in FIGS. 8-9. When the back surface 41 of the reticle MA receives a positive charge, that charge reaches the front surface 40 of the reticle MA. As a result, the controller CONT and the power supply PS of the electrostatic reticle clamp CL are configured to apply a positive voltage to the conductive coating BPC (see FIGS. 12-15) to impart a positive charge to the front surface 40 of the reticle MA, which has the imaged pattern PATT.

[0123] The controller CONT and power supply PS (FIG. 7) are configured to apply a negative voltage to the conductive coating BPC (FIGS. 12-15) to impart a negative charge to the back surface 41, which has the conductive back surface coating COAT (shown in FIG. 7), of the reticle MA mounted on the burl BU, and to repel particles P from the front surface 40 of the reticle MA between EUV pulses. The negative voltage is applied when the EUV beam B is off to repel negatively charged particles P from the front surface 40 of the reticle MA, which is also negatively charged. This embodiment is shown in FIG. 10. When the back surface 41 of the reticle MA receives a negative charge, that charge reaches the front surface 40 of the reticle MA. As a result, the controller CONT and power supply PS of the electrostatic reticle clamp CL are configured to apply a negative voltage to the conductive coating BPC (see FIGS. 12-15) to impart a negative charge to the front surface 40 of the reticle MA, which has the imaged pattern PATT.

[0124] As shown in FIGS. 12-15, the conductive coating BPC (also called the bar potential coating) comprises a coating made of chromium (Cr). Alternatively, the conductive coating BPC can be made of titanium nitride (TiN). Furthermore, as shown in FIG. 12, the reticle clamp CL comprises a plurality of high-voltage and ground connections CON1 and CON2 on the ears EAR1 and EAR2 of the clamp CL, which are coated with a conductive clamp ear coating CEC (see FIGS. 13B and 14B), which is connected to a ground pin provided on at least one of the clamp ears EAR1 and EAR2. One or more caps UNI (see FIGS. 13A and 14A) are provided above the ears EAR1 and EAR2 (see FIGS. 12-14), which are electrically connected to the conductive clamp ear coating CEC.

[0125] The conductive coating BPC1 (shown in FIG. 13B) crosses over the raised structure separating the clamp ear EAR and the burl BU, which provides a leak seal for connecting the burl. The raised structure insulates the clamp ear EAR from the burl BU. As shown in FIG. 12, the ground connection CON1 on one ear EAR1 is modified to supply voltage to the conductive coating BPC. The conductive coating BPC is connected to the connection CON1. ​​As a result, any voltage supplied to the connection CON1 reaches the conductive coating BPC. Additionally, the ground pin CON2 on the other ear EAR2 remains connected to ground. This configuration also applies to FIGS. 14A-14B. As shown in FIGS. 8A, 13A, and 14A, at least one electrode HVE is connected to ground. The conductive coating BPC provides a conductive path from the power source PS (FIG. 7) to the surface of a subset of the burl BU. The conductive path of the conductive coating BPC can be seen in FIGS. 12-14.

[0126] A method for forming the electrostatic clamp CL (FIG. 6) will be described. First, a dielectric body GBU having a plurality of burls BU on a first surface is prepared. Second, a conductive coating BPC (FIG. 15) is applied to the first surface of the dielectric body GBU. Third, the conductive coating BPC is patterned on the first surface of the dielectric body GBU by holding the conductive coating BPC on a subset of the burls BU, and the conductive path formed by the conductive coating BPC allows a potential to be applied to the subset of the burls BU through the conductive path (see FIGS. 12 to 14).

[0127] The patterning includes a lithographic patterning process to provide conductive paths formed by the conductive coating BPC from at least one clamp ear EAR at the peripheral portion of the clamp to a subset of the burls BU, as seen in Figures 12 to 14. As seen in Figure 6, there is at least one glass body GLA on the second surface of the dielectric body GBU and two electrodes HVE between the dielectric body GBU and the at least one glass body GLA.

[0128] The potential on the front surface of the reticle can be adjusted / controlled using a connection to the back surface of the reticle, as disclosed in EP22195470.4, which is incorporated herein by reference.

[0129] Various embodiments of the present system and method are disclosed in the following list of numbered clauses: (Item 1) A dielectric body; an electrode configured to impart a charge to a first surface of the body to electrostatically clamp a reticle to a second surface of the dielectric body; a plurality of burls disposed on the second surface of the dielectric body and configured to contact the reticle; a conductive coating disposed on a surface of a subset of the burls; Power supply and a controller configured to supply a voltage from the power source to the conductive coating. Electrostatic reticle clamp. (Item 2) The controller and the power supply are configured to apply a positive voltage to the conductive coating to impart a positive charge to the backside of a reticle mounted on the burl, thereby reducing the amount of electrons emitted into a reticle miniature environment during an EUV pulse. Item 1. An electrostatic reticle clamp according to item 1. (Item 3) The controller and the power supply are configured to apply a positive voltage to the conductive coating to impart a positive charge to the front surface of the reticle. Item 2. Electrostatic reticle clamp (Item 4) The controller and the power supply are configured to apply a negative voltage to the conductive coating to impart a negative charge to the back surface of a reticle mounted on the burl, and to repel particles from the front surface of the reticle between EUV pulses. 4. An electrostatic reticle clamp according to any one of the preceding paragraphs. (Item 5) The controller and the power supply are configured to apply a negative voltage to the conductive coating to impart a negative charge to the front surface of the reticle. 4. An electrostatic reticle clamp according to any one of the preceding paragraphs. (Item 6) The conductive coating comprises a coating of chromium (Cr) or titanium nitride (TiN), 4. An electrostatic reticle clamp according to any one of the preceding paragraphs. (Item 7) The clamp further includes a plurality of high voltage connections and a ground connection provided on the clamp ears, the ears being coated with a conductive clamp ear coating, and the conductive clamp ear coating is connected to a ground pin provided on at least one of the clamp ears. Item 1. An electrostatic reticle clamp according to item 1. (Item 8) Further comprising one or more caps provided above the ear portion, the one or more caps being electrically connected to the conductive clamp ear coating; Item 8. The electrostatic reticle clamp according to item 7. (Item 9) The conductive coating crosses over a raised structure separating the clamp ear portion and the burl, and the raised structure has a leak seal for connecting the burl. 4. An electrostatic reticle clamp according to any one of the preceding paragraphs. (Item 10) The ground connection provided on one of the ears is changed to supply voltage to the conductive coating, and the ground pin provided on the other ear remains connected to ground. Electrostatic reticle clamp as described in Section 7. (Item 11) The at least one electrode is connected to ground. Item 11. An electrostatic reticle clamp according to item 10. (Item 12) The conductive coating provides a conductive path from the power source to the surface of the subset of burls. 4. An electrostatic reticle clamp according to any one of the preceding paragraphs. (Item 13) Providing a dielectric body having a plurality of burls on a first surface of the dielectric body; applying a conductive coating to the first surface of the dielectric body; patterning the conductive coating on the first surface of the body by retaining a coating on the subset of burls and on conductive pathways, and allowing an electrical potential to be applied to the subset of burls through the conductive pathways. A method for manufacturing an electrostatic reticle clamp. (Item 14) The patterning step includes a lithographic patterning process for providing a conductive path from at least one clamp ear at a peripheral portion of the clamp to a subset of the burls; Item 14. The method according to item 13. (Item 15) At least one glass body on the second surface of the dielectric body, and two electrodes between the dielectric body and the at least one glass body, further provided. Item 14. The method according to item 13.

[0130] The concepts disclosed herein may be associated with any general-purpose imaging system for imaging subwavelength features and may be particularly useful in emerging imaging technologies capable of producing ever-shorter wavelengths. Emerging technologies already in use include EUV (extreme ultraviolet) lithography, 193 nm wavelengths using ArF lasers, and even DUV lithography, which can produce 157 nm wavelengths using fluorine lasers. Furthermore, EUV lithography can produce wavelengths within this range by using a synchrotron to generate photons in the 20-5 nm range or by bombarding materials (either solids or plasmas) with high-energy electrons.

[0131] While the concepts disclosed herein may be used in wafer fabrication on substrates such as silicon wafers, it will be understood that the disclosed concepts may be used in any type of fabrication system, such as systems used for fabrication on substrates other than silicon wafers. Furthermore, combinations and subcombinations of the disclosed elements may constitute separate embodiments. For example, an inspection system and associated software may constitute separate embodiments, and / or their functionality may be used together in the same embodiment.

[0132] The above description is intended to be illustrative and not limiting. Thus, it will be apparent to one skilled in the art that modifications may be made as described without departing from the scope of the claims set forth below.

Claims

1. a dielectric body; an electrode configured to apply a charge to a first surface of the body to electrostatically clamp a reticle to a second surface of the dielectric body; a plurality of burls disposed on the second surface of the dielectric body and configured to contact the reticle; a conductive coating disposed on a surface of a subset of the burls; Power supply and a controller configured to supply a voltage from the power source to the conductive coating. Electrostatic reticle clamp.

2. the controller and the power supply are configured to apply a positive voltage to the conductive coating to impart a positive charge to the backside of a reticle mounted on the burl to reduce the amount of electrons emitted into a reticle mini-environment during an EUV pulse; 10. The electrostatic reticle clamp of claim 1.

3. the controller and the power supply are configured to apply a positive voltage to the conductive coating to impart a positive charge to the front surface of the reticle; 3. The electrostatic reticle clamp of claim 2.

4. the controller and the power supply are configured to apply a negative voltage to the conductive coating to impart a negative charge to a backside of a reticle mounted on the burl to repel particles from a front side of the reticle between EUV pulses; 4. The electrostatic reticle clamp of claim 1.

5. the controller and the power supply are configured to apply a negative voltage to the conductive coating to impart a negative charge to the front surface of the reticle; 5. The electrostatic reticle clamp of claim 1.

6. the conductive coating comprises a coating of chromium (Cr) or titanium nitride (TiN); 6. The electrostatic reticle clamp of claim 1.

7. a plurality of high voltage and ground connections provided on the clamp ears, the ears being coated with a conductive clamp ear coating, the conductive clamp ear coating being connected to a ground pin provided on at least one of the clamp ears; 10. The electrostatic reticle clamp of claim 1.

8. and one or more caps disposed over the ear portions, the one or more caps being electrically connected to the conductive clamp ear coating.

8. The electrostatic reticle clamp of claim 7.

9. the conductive coating crosses over a raised structure separating the clamp ear and the burl, the raised structure comprising a leak seal for connecting the burl; 9. The electrostatic reticle clamp of claim 1.

10. the ground connection on one of the ears is changed to supply a voltage to the conductive coating, and the ground pin on the other ear remains connected to ground.

8. The electrostatic reticle clamp of claim 7.

11. The at least one electrode is connected to ground.

11. The electrostatic reticle clamp of claim 10.

12. the conductive coating provides a conductive path from the power source to the surface of the subset of burls.

12. The electrostatic reticle clamp of claim 1.

13. providing a dielectric body having a plurality of burls on a first surface of the dielectric body; applying a conductive coating to the first surface of the dielectric body; and patterning the conductive coating on the first surface of the body by retaining a coating on the subset of burls and on conductive pathways, thereby enabling application of an electrical potential to the subset of burls through the conductive pathways. A method for manufacturing an electrostatic reticle clamp.

14. the patterning comprises a lithographic patterning process to provide a conductive path from at least one clamp ear at a peripheral portion of the clamp to a subset of the burls. The method of claim 13.

15. Further providing at least one glass body on the second surface of the dielectric body, and two electrodes between the dielectric body and the at least one glass body. The method of claim 13.

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