Process for reducing the boron concentration in a semiconductor layer

Abstract

The present disclosure provides a process for reducing the boron concentration in a semiconductor layer (12) of a semiconductor-on-insulator substrate (1), comprising: at least one thermal treatment cycle, each cycle including thermally oxidizing the semiconductor layer (12) to form an oxide layer (120) on the semiconductor layer (12), wherein boron atoms from the semiconductor layer (12) diffuse into the oxide layer (120) such that boron segregation causes the semiconductor layer (12) to be boron deficient at its interface with the oxide layer (120); removing the oxide layer (120); Including, thermally oxidizing includes increasing the temperature above a target thermal oxidation temperature in an inert atmosphere and then decreasing the temperature to the target thermal oxidation temperature to create a temperature gradient within the substrate to induce a higher rate of formation of the oxide layer (120) at the center of the semiconductor layer than at the edges; Regarding the process.

Description

[Technical Field]

[0001] The present disclosure relates to a process for reducing the boron concentration in a semiconductor layer, and further to a process for making a semiconductor-on-insulator substrate in which the process for reducing the boron concentration can be performed to remedy contamination of the semiconductor layer with boron.

[0002] Photonic applications use semiconductor-on-insulator substrates, which comprise, from the back surface to the front surface of the substrate, a carrier substrate, an electrically insulating layer, and a single-crystal semiconductor layer, called the active layer.

[0003] Photonic devices such as lasers, modulators, waveguides or multiplexers may advantageously be at least partially formed in the active layer of a semiconductor-on-insulator substrate.

[0004] However, these applications are highly sensitive to the presence of boron in the active layer: for example, in the case of waveguides, the presence of boron in the active layer causes absorption of photons, which results in attenuation of the electromagnetic waves traveling in the active layer.

[0005] Therefore, there is a need to reduce the boron content in the active layer.

[0006] In some cases, the boron concentration in the active layer may originate from the very material of said layer.

[0007] In particular, semiconductor-on-insulator substrates may be formed by Smart Cut™, which typically involves forming weakened zones in a donor substrate to define semiconductor layers intended to form active layers, bonding the donor substrate to a carrier substrate via an electrically insulating layer, and separating the donor substrate along the weakened zones to transfer the semiconductor layers to the carrier substrate and the electrically insulating layer.

[0008] A first solution therefore consists in reducing the boron content of the donor substrate on which the active layer is created. For this purpose, a P-doped semiconductor substrate is generally used. 15 at / cm 3 An N-doped donor substrate may be chosen that has a lower boron content than donor substrates conventionally used in the microelectronics industry that have a boron content above 0.1.

[0009] However, even if the boron content of the donor substrate is minimized, there is still external contamination that is difficult to avoid, particularly related to the atmosphere that the semiconductor-on-insulator substrate is subjected to during its fabrication, and further related to the equipment used in the fabrication process.

[0010] Thus, for example, after transferring a semiconductor layer from a donor substrate to a carrier substrate, a rapid thermal process (RTA, an acronym for the term "rapid thermal annealing") is typically performed, which aims to smooth the surface of the transferred semiconductor layer. During this thermal process, the edge of the semiconductor-on-insulator substrate is surrounded by an annular protective tool (known as an "edge guard ring"), which aims to homogenize the temperature within the substrate. Such a tool is typically made of polycrystalline silicon with a high boron content to increase its mechanical strength. Under the influence of the thermal process and the temperature of the ambient gas, the boron in the tool reacts and contaminates the edge of the substrate surrounded by the tool.

[0011] Tests have been conducted using holding tools with lower boron contents, but despite these measures, the boron content of the active layer of the semiconductor-on-insulator substrate remains higher than the desired maximum content.

[0012] One object of the present disclosure is to further reduce the boron concentration in the active layer of a semiconductor-on-insulator substrate, particularly for photonic applications.

[0013] To this end, a process for reducing the boron concentration in a semiconductor layer of a semiconductor-on-insulator substrate is provided, comprising the steps of: at least one thermal treatment cycle, each cycle including thermally oxidizing the semiconductor layer to form an oxide layer on the semiconductor layer, wherein boron atoms from the semiconductor layer diffuse into the oxide layer such that boron segregation creates a boron concentration deficiency in the semiconductor layer at its interface with the oxide layer; removing the oxide layer; Including, thermally oxidizing includes increasing the temperature above a target thermal oxidation temperature in an inert atmosphere and then decreasing the temperature to the target thermal oxidation temperature to create a temperature gradient within the substrate to induce a higher rate of formation of an oxide layer at the center than at the edge of the semiconductor layer; A process is provided.

[0014] Therefore, due to the segregation phenomenon, the boron content of the semiconductor layer can be reduced in one or more thermal treatment cycles. This process can therefore compensate for boron contamination that may occur during the fabrication of semiconductor-on-insulator substrates. In addition, performing thermal oxidation in two stages makes it possible to obtain an oxide layer with a more uniform thickness profile, and the oxide growth rate achieved is higher at the center of the substrate than at the edge.

[0015] According to one embodiment of the process, the at least one heat treatment cycle comprises thermal oxidation followed by annealing in an inert atmosphere for a time suitable to homogenize the boron concentration in the semiconductor layer and / or increase the diffusion of boron atoms towards the sacrificial oxide layer / semiconductor layer interface.

[0016] According to one embodiment of the process, the annealing is performed at a temperature between 800°C and 1200°C.

[0017] According to one embodiment of the process, the annealing time is between a few seconds and a few hours, for example between 2 seconds and 20 hours.

[0018] According to one embodiment of the process, the thermal oxidation is carried out at a temperature between 800° C. and 1200° C. in an oxidizing atmosphere.

[0019] According to one embodiment of the process, thermal oxidation is performed under controlled conditions to form an oxide layer having a greater thickness at the center of the semiconductor layer than at the edges of the semiconductor layer.

[0020] According to one embodiment of the process, the semiconductor layer has a thickness of 0.01 to 1 μm.

[0021] According to one embodiment of the process, in each processing cycle, the thermal oxidation and annealing are performed in the same furnace.

[0022] According to one embodiment, the process includes at least a first processing cycle and a second processing cycle.

[0023] According to one embodiment, the process includes, between the first and second treatment cycles, the removal of an oxide layer formed during the first heat treatment cycle.

[0024] According to one embodiment, a second treatment cycle is performed immediately after the first treatment cycle, and the oxide layer formed during the first and second treatment cycles is removed after the second treatment.

[0025] According to one embodiment, the semiconductor layer is 15 at / cm 3 The initial boron concentration is equal to or greater than 1000 ppm.

[0026] According to one embodiment, the semiconductor layer has a thickness of 5×10 14 at / cm 3 With the following final boron content:

[0027] According to one embodiment, the removal of the oxide layer is performed by selective chemical etching.

[0028] The present disclosure further provides a process for making a semiconductor-on-insulator substrate, comprising: forming a weakened zone by implanting ionic species into the donor substrate to define a semiconductor layer; bonding the donor substrate to a carrier substrate via an electrically insulating layer; separating the donor substrate along the weakened zone to transfer the semiconductor layer to a carrier substrate to form a semiconductor-on-insulator substrate; performing a proposed process to reduce the boron concentration in the semiconductor layer; The present invention relates to a process including:

[0029] According to one embodiment, the fabrication process includes at least one rapid thermal processing step for smoothing the surface of the semiconductor layer after transferring the semiconductor layer to a carrier substrate, each rapid thermal processing step being performed before a process for reducing the boron concentration of the semiconductor layer is performed.

[0030] The present disclosure further relates to a process for fabricating a photonic device, comprising fabricating a semiconductor-on-insulator substrate according to a fabrication process in accordance with the present disclosure and forming a passive photonic component in the semiconductor layer having a reduced boron concentration.

[0031] Other features and advantages will become apparent from the following detailed description when taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0032] [Figure 1] 1A-1C are cross-sectional views that schematically illustrate the formation of a weakened zone by implanting ion species into a donor substrate; [Figure 2] 1A-1C are cross-sectional views illustrating the formation of an electrically insulating layer on a carrier substrate; [Figure 3] 3 is a cross-sectional view illustrating the bonding of the donor substrate of FIG. 1 to the carrier substrate of FIG. 2; [Figure 4]2A-2C show schematic cross-sectional views of a semiconductor-on-insulator substrate obtained after separation of the donor substrate along the weakened zone. [Figure 5] 5 is a cross-sectional view schematically illustrating thermal oxidation of an active layer of the semiconductor-on-insulator substrate of FIG. 4. FIG. [Figure 6] 6 is a cross-sectional view schematically illustrating the semiconductor substrate of FIG. 5 after removal of the oxide layer. [Figure 7a] 1A-1D show diagrammatically the step of implanting species into a semiconductor substrate; [Figure 7b] FIG. 1 shows a schematic diagram of an embodiment including a thermal oxidation step. [Figure 8] 1 is a graph showing boron concentration curves as a function of depth in a semiconductor-on-insulator substrate after a standard fabrication process (I) including a planarizing rapid thermal treatment; a fabrication process (II) based on a boron-depleted donor substrate and the use of an annular tool to protect the substrate during the planarizing rapid thermal treatment designed to minimize boron contamination; and a process (III) performed under the same conditions as process (II) followed by a proposed process to reduce the boron concentration. Detailed Description of the Embodiments

[0033] For greater clarity in the drawings, the various layers are not necessarily shown to scale.

[0034] 1 to 4 show the Smart-Cut™ process for producing a semiconductor-on-insulator substrate in a manner known from the prior art, comprising at least the following steps: implanting ionic species into a first semiconductor substrate 10, called donor substrate, so as to form a weakened zone 11 as shown in FIG. 1, said weakened zone defining the layer 12 to be transferred; forming, as shown in FIG. 2, on a second semiconductor substrate 20, called receiver substrate, an electrically insulating layer 21, obtained in particular by oxidation of the surface portion of the substrate 20; 3 and 4 show the Smart-Cut™ process, which successively comprises the steps of bonding layer 12 of a donor substrate 10 to a receiver substrate 20 via an electrically insulating layer 21, followed by transferring by separating the donor substrate 10 along the weakened zones 11. A semiconductor-on-insulator substrate 1 is thus obtained (see FIG. 4).

[0035] The substrate 1 is advantageously configured for photonic applications, so that the thickness of the transfer layer 12 is preferentially between 100 and 600 nm and the thickness of the electrical insulating layer is preferentially between 200 nm and 3000 nm.

[0036] According to one alternative, an electrically insulating layer 21 may be formed on the donor substrate 10 before the implantation step.

[0037] The present disclosure relates to a process aimed at reducing the boron concentration in the semiconductor layer 12 of a substrate.

[0038] In a typical embodiment, the process includes a thermal treatment cycle after the transferring step. This thermal treatment cycle includes a step of thermally oxidizing the semiconductor layer 12 to form a sacrificial oxide layer 120 on the semiconductor layer. This thermal oxidation step is shown in FIG. 5. During the oxidation, a segregation phenomenon occurs, during which boron atoms migrate from the semiconductor layer to the sacrificial oxide layer 120, thus reducing the boron concentration in the semiconductor layer 12. The thermal treatment cycle further includes a thermal treatment step, which is performed either after the oxidation step or simultaneously with the oxidation step. This thermal treatment step allows for a redistribution of boron atoms in the semiconductor layer 12. Finally, referring to FIG. 6, the sacrificial oxide layer 120 is removed to expose the semiconductor layer 12.

[0039] The thermal oxidation may be carried out at a temperature of 800°C to 1200°C in an oxidizing atmosphere.

[0040] Advantageously, the process is carried out under conditions that allow a significant reduction in the boron content of the semiconductor substrate, as is already known. In particular, an N-doped substrate with a reduced boron content may be used as the donor substrate. It is also possible to use an annular protective tool with a low boron content.

[0041] According to an embodiment, the process can include several thermal treatment cycles, in particular two, which allows for better diffusion of boron at the interface between the semiconductor layer 12 and the sacrificial oxide layer 120. It is then possible to perform the thermal treatment cycles immediately one after the other by removing the oxide layer 120 after the last thermal treatment cycle or by removing the oxide layer 120 formed after each thermal treatment cycle. Removing the oxide layer 120 after the last thermal treatment cycle has the advantage that the substrate does not have to be removed from the furnace between the various thermal treatment cycles, thus facilitating industrialization of the process.

[0042] To further improve the diffusion of boron at the interface between the semiconductor layer 12 and the sacrificial oxide layer 120, the heat treatment step may be an annealing in an inert atmosphere. Such an annealing may advantageously be carried out at a temperature suitable for homogenizing the boron concentration in the semiconductor layer 12 and / or for increasing the diffusion of boron atoms towards the sacrificial oxide 120 / semiconductor layer 12 interface. Such an annealing may advantageously be carried out at a temperature between 800°C and 1200°C and may last from a few seconds to several hours or tens of hours.

[0043] To minimize the time and material resources required to perform the proposed process, the heat treatment cycle and heat treatment steps can be performed in the same furnace, so only a single furnace is needed to perform the process and there is no need to remove the substrate from the furnace before the step of removing the oxide layer 120.

[0044] The inventors have noted that after the implantation step of the Smart-Cut™ process, the uniformity of the implantation depth of the seeds decreases. This non-uniformity in implantation depth manifests itself as a non-uniformity in the thickness of the active layer, typically exhibiting a concave or convex profile, which adversely affects the quality of components subsequently formed in the active layer. FIG. 7a illustrates such a concave profile. According to one embodiment, shown in FIG. 7b, thermal oxidation is performed under controlled conditions to form an oxide layer that is thicker at the center of the semiconductor layer 12 than at its edges. This oxidation step therefore consumes more material from the semiconductor layer 12 at the center than at its edges, thereby at least partially compensating for the thickness non-uniformity due to the implantation step in the process of fabricating a semiconductor-on-insulator substrate.

[0045] To achieve such an oxide layer 120 with a greater thickness at the center than at the edge, thermal oxidation can be performed in two steps. First, the temperature is increased above a target thermal oxidation temperature in an inert atmosphere, and then decreased to this target temperature. An oxidizing atmosphere is introduced during this second decrease step. This allows the substrate to cool faster at the edge than at its center, resulting in a higher oxide growth rate at the center than at the edge of the substrate. Thus, the oxide layer is formed with a thickness profile that is more suitable for improving the uniformity of the semiconductor layer 12 after deoxidation than if the oxide layer were formed simply by increasing the target oxidation temperature. If the oxide layer were formed simply by increasing the target oxidation temperature, the thickness profile of the formed oxide layer would be similar to the initial thickness profile of the transferred semiconductor layer 12.

[0046] The semiconductor layer is 10 15 at / cm 3 The initial boron concentration may be greater than 5×10. Specifically, P-doped substrates commonly used in the fabrication of semiconductor-on-insulator substrates have a boron content of this order. After using this process, the semiconductor layer may have an initial boron concentration of 5×10. 14 at / cm 3 Advantageously, the boron content is reduced to:

[0047] According to one embodiment, the removal of the oxide layer 120 is carried out by a selective chemical etch that is particularly suited to the production of semiconductor-on-insulator substrates. This may in particular be a hydrofluoric acid etch. Alternatively, it may be a dry reactive ion etch, which at the same time has a good degree of anisotropy, allowing etching of the substrate mainly in the thickness direction of the substrate, without causing serious damage to the substrate.

[0048] The present disclosure further provides a process for making a semiconductor-on-insulator substrate, comprising: forming a weakened zone 11 by implanting ionic species into the donor substrate 10 to define a semiconductor layer 12; Bonding the donor substrate 10 to a carrier substrate 20 via an electrically insulating layer 21; Separating the donor substrate along the weakened zones 11 to transfer the semiconductor layer 12 to a carrier substrate 20 so as to form a semiconductor-on-insulator substrate 1; performing the boron concentration reduction process described above; The present invention relates to a process including:

[0049] One or more rapid thermal processing (RTA) steps may be performed before carrying out the process to reduce the boron concentration so as to smooth the surface of the semiconductor layer 12 .

[0050] Figure 8 shows boron concentration curves as a function of depth in a semiconductor-on-insulator substrate after a standard fabrication process (I) including a smoothing rapid thermal treatment; a fabrication process (II) based on a boron-reduced donor substrate and the use of an annular tool to protect the substrate during the smoothing rapid thermal treatment designed to minimize boron contamination; and a fabrication process (III) performed under the same conditions as process (II) but with a proposed process to reduce the boron concentration. It can be seen that the proposed fabrication process significantly reduces the boron content in the upper layer of the resulting semiconductor substrate. This upper semiconductor layer corresponds to a depth of less than 0.5 micrometers. In particular, the reduction in boron content is significant, especially above a thickness of approximately 0.1 micrometers (the peak at a depth of 0 to 0.04 micrometers is a measurement artifact). Meanwhile, a boron content peak is observed at a depth of approximately 0.5 micrometers, which corresponds to the depth of the electrically insulating layer.

[0051] Finally, the present disclosure further relates to a process for fabricating a photonic device, comprising fabricating a semiconductor-on-insulator substrate according to the process described above and forming passive photonic components in the semiconductor layer 12. The resulting passive photonic components thus have a reduced boron concentration. The passive photonic components may be, for example, but not limited to, waveguides, modulators, or multiplexers.

Claims

1. A process for reducing the boron concentration in a semiconductor layer (12) of a semiconductor-on-insulator substrate (1), comprising: at least one heat treatment cycle, each cycle comprising thermally oxidizing the semiconductor layer (12) to form an oxide layer (120) on the semiconductor layer (12), wherein boron atoms from the semiconductor layer (12) diffuse into the oxide layer (120) such that boron segregation causes a boron deficiency in the semiconductor layer (12) at its interface with the oxide layer (120); removing said oxide layer (120); Including, the thermal oxidation includes increasing the temperature above a target thermal oxidation temperature in an inert atmosphere and then decreasing the temperature to the target thermal oxidation temperature to create a temperature gradient within the substrate to induce a higher formation rate of the oxide layer (120) at the center than at the edges of the semiconductor layer. process.

2. 2. The process of claim 1, wherein the at least one heat treatment cycle includes, after the thermal oxidation, annealing in an inert atmosphere for a time suitable to homogenize the boron concentration in the semiconductor layer (12) and / or increase the diffusion of boron atoms toward the sacrificial oxide layer (120) / semiconductor layer (12) interface.

3. The process of claim 2, wherein the annealing is performed at a temperature of 800°C to 1200°C.

4. The process of any one of claims 1 to 3, wherein the thermal oxidizing is carried out at a temperature of 800°C to 1200°C under an oxidizing atmosphere.

5. The process according to any one of claims 1 to 4, wherein the semiconductor layer (12) has a thickness of 0.01 to 1 μm.

6. The process of any one of claims 2 to 5, wherein in each processing cycle, the thermal oxidation and the annealing are performed in the same furnace.

7. The process of any one of claims 1 to 6, comprising at least a first treatment cycle and a second treatment cycle.

8. The process of claim 7, further comprising, between the first and second treatment cycles, removing the oxide layer (120) formed during the first heat treatment cycle.

9. 8. The process of claim 7, wherein the second treatment cycle occurs immediately after the first treatment cycle, and the oxide layer (120) formed during the first and second treatment cycles is removed after the second treatment.

10. The semiconductor layer (12) is 10 １５ at / cm ３ 10. The process of claim 1, wherein the initial boron concentration is greater than or equal to 1000 ppm.

11. The semiconductor layer (12) is 5×10 １４ at / cm ３ 11. The process of claim 10 having a final boron content of:

12. The process of any one of claims 1 to 11, wherein the removal of the oxide layer (120) is performed by selective chemical etching.

13. A process for fabricating a semiconductor-on-insulator substrate (1), comprising: forming a weakened zone (11) by implanting ionic species into a donor substrate (10) to define a semiconductor layer (12); bonding the donor substrate (10) to a carrier substrate (20) via an electrically insulating layer (21); separating the donor substrate (10) along the weakened zones (11) to transfer the semiconductor layer (12) to the carrier substrate (20) so as to form the semiconductor-on-insulator substrate (1); Implementing a process for reducing the boron concentration of the semiconductor layer (12) according to any one of claims 1 to 12; A process involving:

14. 14. The process of claim 13, further comprising at least one rapid thermal processing step for smoothing the surface of the semiconductor layer (12) after transferring the semiconductor layer (12) to the carrier substrate (20), each rapid thermal processing step being performed before the process for reducing the boron concentration of the semiconductor layer (12) is performed.

15. 15. A process for fabricating a photonic device, comprising fabricating a semiconductor-on-insulator substrate according to the process of claim 13 or claim 14, and forming passive photonic components in the semiconductor layer (12) having a reduced boron concentration.

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