Mitigation of saddle-shaped deformation of substrates using film deposition and edge ion implantation

Abstract

The disclosed systems and techniques are directed to correcting out-of-plane deformation (OPD) of a substrate. The technique includes using optical inspection data to obtain a profile of the out-of-plane deformation of the substrate and using the obtained profile to identify one or more parameters that characterize saddle stress in the substrate. The technique further includes calculating one or more characteristics of a stress compensation layer (SCL) for the substrate using the determined one or more parameters and depositing the SCL on the substrate. The technique further includes applying a stress relaxation beam to multiple edge regions of the SCL, and settings of the stress relaxation beam are determined using the determined one or more parameters.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE This disclosure relates to semiconductor manufacturing, including wafer manufacturing. [Background technology]

[0002] Modern semiconductor devices, such as processing circuits, memory devices, photodetectors, solar cells, and light-emitting semiconductor devices, are often fabricated on silicon wafers (or other suitable substrates). The wafers may undergo numerous processing steps, such as physical vapor deposition, chemical vapor deposition, etching, photomasking, polishing, and / or various other processes. In a continuing effort to reduce the cost of semiconductor devices, multilayer stacks of die, insulating films, patterned and / or doped semiconductor films, and / or other features are often deposited on a single wafer, resulting in high-aspect-ratio devices used, for example, in 3D flash memory devices and other applications. The deposition, patterning, etching, polishing, etc. of the multilayer stacks often imposes significant stresses on the underlying wafer. Such stresses result in both out-of-plane and in-plane distortion of features supported by the wafer. These distortions can lead to misalignment of the deposited features, significantly reducing the quality of the fabricated devices. [Brief explanation of the drawings]

[0003] The present disclosure will become more fully understood from the following detailed description and accompanying drawings of various embodiments of the disclosure.

[0004] [Figure 1] 1A-E illustrate a schematic representation of a backside deposited film stress compensation process using additional ion implantation, according to at least one embodiment. [Figure 2] FIG. 2 shows an example of a Zernike polynomial decomposition, in arbitrary units, of the actual deformation of one of the wafers (top left) into a parabolic curvature deformation (top right), a saddle-shaped deformation (bottom left), and a residual deformation (bottom right), according to at least one embodiment. [Figure 3]FIG. 3 illustrates stress and strain relief in one exemplary wafer using the process disclosed in connection with FIGS. 1A-E, according to at least one embodiment. [Figure 4] FIG. 4 illustrates one exemplary profile of a Gaussian ion beam that may be used to relieve stress and deformation in a wafer, according to at least one embodiment. [Figure 5] FIG. 5 illustrates an exemplary silicon wafer having a silicon nitride film deposited thereon having a saddle-shaped deformation, according to at least one embodiment. [Figure 6] FIG. 6 is a flow diagram illustrating an exemplary process for mitigating saddle deformation of a wafer, according to at least one embodiment. [Figure 7] Figure 7A illustrates an exemplary wafer saddle stress, according to at least one embodiment. Figure 7B illustrates a schematic selection of a target stress compensation film based on the amplitude of the saddle portion of the wafer stress, according to at least one embodiment. Figure 7C illustrates the stress present in a wafer after a stress compensation film is deposited on the wafer, according to at least one embodiment. Figure 7D illustrates the relaxation of wafer stress caused by edge ion implantation into the stress compensation film. [Figure 8A-C] 8A-C illustrate exemplary ion implants that can be used for ion implants performed to mitigate saddle-shaped wafer deformation, according to at least one embodiment. FIG. 8A illustrates an arc implant in which a uniform ion implant dose is applied within a constant, equal-width edge area of ​​a stress compensation film, according to at least one embodiment. FIG. 8B illustrates a crescent-edge implant in which a uniform ion implant dose is applied within an edge area of ​​varying thickness (depending on the azimuth angle), according to at least one embodiment. FIG. 8C illustrates a slope-edge implant in which a non-uniform ion implant dose is applied within the edge area, according to at least one embodiment. [Figure 8D] FIG. 8D illustrates an exemplary custom-shaped ion implant that can be used for ion implantation performed for mitigation of saddle-shaped wafer deformation, according to at least one embodiment. [Figure 9]9A-C show some examples of implant-assist features that can be used to relieve residual stress, according to at least one embodiment. [Figure 10A] FIG. 10A schematically illustrates the response of an example wafer to the dose maps of FIGS. 9A and 9C, according to at least one embodiment. [Figure 10B] FIG. 10B schematically illustrates an example wafer response to the dose maps of FIGS. 9A and 9C, according to at least one embodiment. [Figure 11] Figure 11A illustrates a schematic diagram of an ion implantation system capable of performing ion implantation into a stress compensation layer, according to at least one embodiment. Figure 11B illustrates the delivery of ions to a wafer at an arbitrary angle of incidence by the ion implantation system of Figure 11A, according to at least one embodiment. [Figure 12] FIG. 12 illustrates a block diagram of an exemplary computer system capable of supporting the processes of the present disclosure, according to at least one embodiment. Summary of the Invention

[0005] In one embodiment, a method for correcting out-of-plane deformation of a substrate is disclosed, the method including using optical inspection data to obtain a profile of the out-of-plane deformation of the substrate. The method further includes using the obtained profile to identify one or more parameters that characterize saddle stress in the substrate. The method further includes calculating one or more characteristics of a stress compensation layer (SCL) for the substrate using the identified one or more parameters. The method further includes depositing the SCL on the substrate and applying a stress relaxation beam to multiple edge regions of the SCL, where settings of the stress relaxation beam are determined using the identified one or more parameters.

[0006] In another embodiment, a system is disclosed that includes a memory and a processing device communicatively coupled to the memory, the processing device for acquiring a profile of out-of-plane deformation of a substrate using optical inspection data. The processing device further uses the acquired profile to identify one or more parameters that characterize a saddle stress in the substrate. The processing device further calculates one or more characteristics of a stress compensation layer (SCL) for the substrate using the identified one or more parameters. The processing device further applies a stress relaxation beam to a plurality of edge regions of the SCL, and settings of the stress relaxation beam are determined using the identified one or more parameters.

[0007] In another embodiment, a semiconductor manufacturing system is disclosed that includes one or more processing chambers for processing a substrate and a computing device. The computing device uses optical inspection data to acquire a profile of out-of-plane deformation of the substrate and identifies one or more parameters characterizing a saddle stress in the substrate using the acquired profile. The computing device further calculates one or more characteristics of a stress compensation layer (SCL) for the substrate using the identified one or more parameters, and applies a stress relaxation beam to multiple edge regions of the SCL, where settings of the stress relaxation beam are determined using the identified one or more parameters.

[0008] In yet another embodiment, a non-transitory computer-readable memory is disclosed that stores instructions that, when executed by a processing device, cause the processing device to perform a process including using the acquired profile to identify one or more parameters characterizing saddle stress in the substrate, the process further including calculating one or more characteristics of a stress compensation layer (SCL) for the substrate using the identified one or more parameters, the process further including applying a stress relaxation beam to a plurality of edge regions of the SCL, wherein settings for the stress relaxation beam are determined using the identified one or more parameters, and settings for an ion implantation are determined using the identified one or more parameters. DETAILED DESCRIPTION OF THE INVENTION

[0009] Existing technologies include many methods for addressing wafer deformation. For example, a deformed (warped) wafer with various films and features deposited on one side (referred to herein as the front, top, or main side) can be coated on the other side (referred to herein as the back or bottom side) with a film that imposes compressive or tensile stress on the wafer. Such backside-deposited deformation-compensating films, also referred to herein as stress-compensating layers, typically impart a uniform (or global) stress across the wafer and are unable to compensate for local stress adjustment and / or anisotropic stress. Additional compensation can be achieved by implanting ions into the stress-compensating layer, e.g., using an ion beam bombarding the stress-compensating layer, to adjust the stress of the stress-compensating layer, thereby further mitigating the deformation of the underlying wafer.

[0010] As used herein, "wafer" refers to any substrate or any material surface formed on a substrate on which film processing is performed during a manufacturing process. For example, wafer surfaces on which processing can be performed include materials such as silicon, silicon oxide, silicon nitride, strained silicon, silicon-on-insulator, carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Wafers include, but are not limited to, semiconductor wafers. In some cases, wafers can include plastic substrates. Wafers may be exposed to pre-treatment processes to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, electron beam (e-beam) cure, and / or bake the substrate surface. In addition to film processing directly on the surface of the wafer itself, any of the disclosed film processing steps may also be performed on underlying layers formed on the wafer, as disclosed in more detail below. The term "wafer surface" is intended to include such underlying layers as the context indicates. Thus, for example, if a film / layer or partial film / layer is being deposited on a wafer surface, the exposed surface of the newly deposited film / layer becomes the wafer surface. In some embodiments, the wafer has a thickness in the range of 0.25 mm to 1.5 mm, or in the range of 0.5 mm to 1.25 mm, or in the range of 0.75 mm to 1.0 mm, or greater. In some embodiments, the wafer has a diameter of about 10 cm, 20 cm, 30 cm, or greater.

[0011] Deposition of the stress compensation layer by ion implantation provides uniform and isotropic stress It can be very efficient to correct TIFF2026508134000002.tif4170. On the other hand, Location on TIFF2026508134000003.tif6170 TIFF2026508134000004.tif4170, Anisotropic stress Relieving stresses that vary in one direction, e.g., TIFF2026508134000006.tif5170 compressed along the orthogonal direction This can cause tensile stress along the wafer, resulting in the formation of a saddle-shaped wafer, such as that shown in FIG. 5. Such saddle-shaped features can arise, for example, in stacks of materials with directional patterning, such as the patterning of word lines in flash memory devices. Correcting such anisotropic saddle-shaped deformation in wafers remains a challenging task.

[0012] Aspects and embodiments of the present disclosure address these and other challenges in current semiconductor manufacturing technology by providing systems and techniques that can mitigate non-uniform and / or anisotropic stress and deformation in wafers. In some embodiments, methods for mitigating saddle deformation involve determining the principal axes (directions) and magnitudes of saddle deformation, e.g., TIFF2026508134000008.tif6170 and identifying the properties of a stress-compensating film (layer) that can cause the stress in the wafer to have a distinct sign (e.g., stress that is positive or negative across the wafer). This changes the deformation of the wafer from a saddle-shaped to a cylindrical deformation. The method can further include depositing a film with the identified properties and then alleviating high-stress regions of the wafer by ion implantation into the edges of such regions of the film. Residual high-order (ripple) deformation can then be addressed by further ion implantation into areas of the film.

[0013] In one embodiment, the vertical profile of the wafer deformation is measured using optical metrology techniques. TIFF2026508134000009.tif5170 is created. For example, profile The interference of TIFF2026508134000010.tif5170 can be obtained using optical interferometry measurements. The wafer profile can then be calculated through several parameters that qualitatively and quantitatively characterize the geometry of the wafer deformation. TIFF2026508134000011.tif5170. In some embodiments, a set of Zernike (or a similar set) polynomials may be used to represent the wafer profile, TIFF2026508134000012.tif11170 where, TIFF2026508134000013.tif3170 is the radial coordinate in the (mean) plane of the wafer, TIFF2026508134000014.tif5170 is a polar coordinate. Continuous coefficients TIFF2026508134000015.tif5170... is the corresponding Zernike polynomial TIFF2026508134000016.tif5170... (Here, the Noll notation for Zernike polynomials is used.) The first three coefficients are the weights of the uniform shift ( TIFF2026508134000017.tif5170 Coefficients associated with the polynomial TIFF2026508134000018.tif4170), TIFF2026508134000019.tif4170 No deformation corresponding to rotation around axis TIFF2026508134000020.tif3170 slope ( TIFF2026508134000021.tif5170 Coefficients associated with the polynomial TIFF2026508134000022.tif4170), and can be eliminated by realigning the coordinate axes. TIFF2026508134000023.tif3170 No deformation corresponding to rotation around axis TIFF2026508134000024.tif3170 slope ( TIFF2026508134000025.tif5170 Coefficients added to polynomials TIFF2026508134000026.tif5170), so it is less important. TIFF2026508134000027.tif4170 is Associated with TIFF2026508134000028.tif5170, characterizes isotropic parabolic deformations ("curvature"). TIFF2026508134000029.tif5170 and the 6th The coefficients of TIFF2026508134000030.tif5170 are TIFF2026508134000031.tif6170 Polynomial and TIFF2026508134000032.tif6170Associated with polynomials, characterizing saddle deformations. TIFF2026508134000033.tif5170 Coefficients are diagonal TIFF2026508134000034.tif4170 along the top ( TIFF2026508134000035.tif5170) or below ( TIFF2026508134000036.tif5170) curved and diagonal TIFF2026508134000037.tif4170 along the bottom ( TIFF2026508134000038.tif5170) or above ( It features a saddle-shaped curve (TIFF2026508134000039.tif5170). TIFF2026508134000040.tif5170 coefficients are TIFF2026508134000041.tif3170 Up along the axis ( TIFF2026508134000042.tif5170) or below ( TIFF2026508134000043.tif5170) curved, TIFF2026508134000044.tif4170 Down along the axis ( TIFF2026508134000045.tif5170) or above ( TIFF2026508134000046.tif5170) characterizes the saddle-shaped curve. Higher coefficient TIFF2026508134000047.tif5170, TIFF2026508134000048.tif5170, etc., show deformation of the wafer along the radial, azimuthal, or both directions. TIFF2026508134000049.tif5170 characterizes the progressively faster fluctuations and collectively residual deformations 2 represents one actual deformation of a wafer, according to at least one embodiment. Parabolic curve transformation of TIFF2026508134000051.tif5170 (upper left) in any unit. TIFF2026508134000052.tif5170 (top right), saddle deformation TIFF2026508134000053.tif5170 (bottom left), and residual deformation TIFF2026508134000054.tif5170 (bottom right) shows an example of Zernike polynomial decomposition 200.

[0014] In some embodiments, the thickness of the stress compensation film TIFF2026508134000055.tif4170 selection of parabolic curvature coefficients 1A-E schematically illustrate a backside deposited film stress compensation process using additional ion implantation, according to at least one embodiment. FIG. 1A depicts a wafer 102 having deformations, including a parabolic curvature deformation (negative coefficient TIFF2026508134000057.tif5170) and other deformations, such as saddle-shaped deformations and residual deformations (neither of which are shown in FIGS. 1A-1E for brevity and clarity). Wafer 102 has a front side 104 and a back side 106. Front side 104 may have any number of features (e.g., deposition and / or etch patterns), dies, photomasks, and / or any other structures deposited or etched thereon. In some embodiments, back side 106 may be free of deposited / etched features / structures. In some embodiments, back side 106 may also have one or more deposited / etched features / structures. FIG. 1B illustrates a schematic deposition of a stress compensation layer on the back side of wafer 102. In some embodiments, stress compensation layer 108 may include one or more films of different materials. The individual films may have thicknesses ranging from 10 nm to 200 nm, or from 20 nm to 180 nm, or from 30 nm to 160 nm, or from 40 nm to 140 nm, or greater. The total thickness of the stress compensation layer may be up to several microns or greater. In some embodiments, the stress compensation layer 108 is deposited at a temperature ranging from 100° C. to 500° C. or higher.

[0015] The material (type) of the stress compensation layer 108 is determined by the coefficient You can select based on the sign of TIFF2026508134000058.tif4170. For example, negative curvature In the case of TIFF2026508134000059.tif5170, the stress compensation layer 108 can be selected to have a tensile stress (as illustrated in Figures 1A-E). In the case of a silicon wafer, such a film can be a silicon nitride (Si3N4) film. Conversely, a positive curvature For example, the stress compensation layer 108 may be selected to have a tensile stress (not shown in FIGS. 1A-E). The stress compensation layer 108 may be deposited using any suitable deposition technique, including physical vapor deposition (e.g., sputtering), chemical vapor deposition (e.g., plasma-assisted deposition), epitaxy, and / or exfoliation. Deposition may be performed at room temperature or at a temperature different from room temperature (e.g., elevated temperature). In some embodiments, the thickness of the stress compensation layer 108 may be 0.015 μm or less. The thickness-dependent parabolic curvature correction can be chosen to overcorrect the deformation to some extent, as shown, for example, in Figure 1C, where negative parabolic curvature becomes positive parabolic curvature. TIFF2026508134000062.tif5170 shows that the wafer is deformed. From TIFF2026508134000063.tif5170 TIFF2026508134000064.tif5170 changes to: TIFF2026508134000065.tif5170

[0016] The overcompensation is selected in conjunction with the implant species, energy, and dose to ensure maximum compensation from the stress compensation. The overcompensation allows the combined structure of the wafer 102 and the stress compensation layer 108 to further control the stress (and thus the deformation of the wafer). TIFF2026508134000066.tif5170). As shown in FIG. 1D, an ion beam implanter 110 can generate an ion beam 112 that bombards the stress-compensating layer 108 and deposits ions therein. The ion beam 112 can carry silicon ions, phosphorus ions, argon ions, neon ions, xenon ions, and / or krypton ions, among others. In some embodiments, the energy and type of ions in the ion beam 112 can be selected to confine the implanted ions to the volume of the stress-compensating layer 108 without allowing the ions to reach the wafer 102. Ions present in the stress-compensating layer 108 create substitutional defects therein. Additionally, the ions leave a trail of vacancy defects along their propagation paths within the stress-compensating layer 108. The substitutional defects and / or vacancies can modify (e.g., reduce) the stress in the stress-compensating layer 108 and reduce the degree of stress overcompensation caused by film deposition. This planarizes the combination of wafer 102 and stress compensation layer 108.

[0017] Specifically, although the stress-relief beam used to modify the stress in the stress-compensating layer 108 is referred to throughout this disclosure as an ion beam (e.g., ion beam 112), the stress-relief beam can include other material particles (e.g., electrons), electromagnetic waves (e.g., UV light, visible light, infrared light, etc.), and / or suitable combinations thereof. The stress-relief beam impinges on the stress-compensating layer 108 and alters the bond network of the stress-compensating layer 108. For example, a low-energy stress-relief beam can interact with surface atoms of the stress-compensating layer 108, e.g., remove some of the surface atoms, effectively etching the surface region of the stress-compensating layer 108. The effectiveness of such etching can be controlled by the selection of ion species / radicals / ambient gas. In another example, a high-energy stress-relief beam can deposit ions within the stress-compensating layer 108. The ions and / or photons can break bonds in the bond network (or crystal lattice) of the stress-compensating layer 108, forming vacancies therein, which can further cause annealing through localized heating, UV curing, and / or other effects.

[0018] In some embodiments, a small area of ​​the wafer TIFF2026508134000067.tif5170 Number of ions deposited per TIFF2026508134000068.tif5170 shows the saddle deformation, the residual deformation, and the parabolic curvature deformation overcompensated by the deposition of the stress compensation layer 108. Corrected deformations that may include parts of TIFF2026508134000069.tif5170 The desired local density of ions can be determined using simulations (performed as described in more detail below) based on the local values ​​of TIFF2026508134000070.tif5170. TIFF2026508134000071.tif5170 shows the scanning speed of the ion beam 112. In some embodiments, the ion beam 112 has a profile that can be approximated by a Gaussian function, e.g., an ion flux TIFF2026508134000073.tif5170. TIFF2026508134000074.tif3170 and TIFF2026508134000075.tif4170 is in Cartesian coordinates, TIFF2026508134000076.tif5170 is the maximum ion flux at the center of the beam, TIFF2026508134000077.tif3170 and TIFF2026508134000078.tif4170 are, respectively, TIFF2026508134000079.tif3170Axis and TIFF2026508134000080.tif4170 is the characteristic spread of the beam along the axis. Correspondingly, the distance from the center of the beam path is The point located at TIFF2026508134000081.tif4170 receives an ion dose containing the following number of ions: TIFF2026508134000082.tif13170 Correspondingly, the scanning speed By lowering the ion beam size, various areas of the stress compensation layer 108 can receive more ions, and vice versa. Additionally, the ion beam 112 may be configured such that various points of the stress compensation layer 108 receive different factors that can be averaged to the target dose. TIFF2026508134000084.tif5170 to receive multiple ion doses with different offsets TIFF2026508134000085.tif4170, each of which may be scanned from the center of the ion beam 112 to an area Different distances to TIFF2026508134000086.tif5170 In TIFF2026508134000087.tif4170, the ion beam implantation device 110 After n passes in TIFF2026508134000088.tif4170, the total ion dose received by this area is: As shown in FIG. 1E, implanted layer 114 formed as part of stress compensation layer 108 provides significant deformation relief for wafer 102, particularly the saddle-shaped and residual portions thereof.

[0019] 3 illustrates stress and strain relaxation 300 in one exemplary wafer using the process disclosed in connection with FIGS. 1A-E, according to at least one embodiment. As shown in FIG. 3, the maximum negative strain A 30 cm silicon wafer 102 having a tensile stress compensation layer 108 is first prepared using a silicon nitride tensile stress compensation layer 108. The stress in the stress compensation layer 108 is then reduced by forming an implanted layer 114 using an ion beam, and the final maximum deformation is TIFF2026508134000092.tif5170 Figure 4 shows one example profile 400 of a Gaussian ion beam 112 that may be used to relieve stress and deformation in a wafer, according to at least one embodiment.

[0020] The techniques for mitigating strain and deformation shown in Figures 1-3 are based on the stress tensor components TIFF2026508134000093.tif4170 and The present invention can also be applied to wafers with complex deformations, such as wafers with different signs, causing the wafer to have a saddle-shaped deformation. Figure 5 shows an example wafer 500 (e.g., a silicon wafer with a silicon nitride film deposited thereon) with a saddle-shaped deformation, according to at least one embodiment. As can be seen in Figure 502 of TIFF2026508134000095.tif3170, the stress components TIFF2026508134000096.tif4170 may be lower at the wafer (top layer) than at the film deposited on the backside of the wafer (bottom layer). As shown in Figure 504 of TIFF2026508134000097.tif4170, the stress components TIFF2026508134000098.tif4170 may be higher in the wafer than in the film. In some embodiments, the stress state in the wafer can be represented by a position-dependent stress tensor, which can be approximated by the following equation: This structure of the stress tensor is usually a good approximation because the wafer is typically in pure bending and is independent of the shear stresses represented by the off-diagonal terms of the stress tensor. Correction for the saddle shape requires special treatment in the dose map calculation and optimization to ensure that no additional residual terms are introduced into the wafer as a result.

[0021] 6 is a flow diagram illustrating an exemplary process 600 for mitigating saddle deformation of a wafer, according to at least one embodiment. Process 600 can be performed using a semiconductor manufacturing system including one or more processing chambers, such as one or more deposition chambers, one or more plasma chambers, one or more etching chambers, one or more polishing chambers, one or more film removal chambers, one or more beam irradiation chambers, and / or one or more optical inspection chambers. The processing chambers can be connected to one or more transfer chambers, which can include one or more robots for handling wafers, e.g., transferring wafers into and out of the processing chambers. The transfer chambers can further be connected to a load lock chamber (front-end interface), which can be coupled to one or more Front Opening Unified Pod (FOUP) carriers that hold bare wafers, processed wafers, and / or partially processed wafers. The steps performed by the semiconductor manufacturing system, including any, some, or all steps of process 600, can be performed in response to instructions issued by a suitable computing device having a memory for storing processing logic and instructions.

[0022] In block 610, the process 600 calculates the shape of the wafer, e.g., the displacement of the surface (e.g., top surface) of the wafer, in several in-plane coordinates (e.g., polar coordinates TIFF2026508134000100.tif5170, Cartesian coordinates TIFF2026508134000101.tif5170, or any other suitable coordinates). At block 620, the process 600 decomposes the determined shape into an appropriate set of polynomials, e.g., Zernike polynomials, and calculates a set of polynomial expansion coefficients. TIFF2026508134000102.tif6170, where each coefficient in the set characterizes the abundance of a particular element geometry in the wafer deformation.

[0023] In block 630, the coefficient Using deformations represented via TIFF2026508134000103.tif6170, the stress tensor The saddle-shaped part of TIFF2026508134000104.tif4170 can be determined. TIFF2026508134000105.tif5170 refers to the part of the stress tensor proportional to the phase It is specified by TIFF2026508134000106.tif3170. Without loss of generality, for brevity, Assume TIFF2026508134000107.tif4170 (this can be achieved by a simple rotation of the coordinate system).

[0024] Process 600 is Based on the deformation represented by TIFF2026508134000108.tif6170, the edge of the wafer Wafer hoop stress in TIFF2026508134000109.tif4170 Amplitude of TIFF2026508134000110.tif5170 TIFF2026508134000111.tif4170. Such determination may be made based on elastic properties (e.g., Young's modulus, Poisson's ratio, etc.) of the wafer. FIG. 7A illustrates an exemplary wafer saddle stress distribution, according to at least one embodiment. TIFF2026508134000112.tif5170 shows the amplitude of the saddle-shaped part of the stress. TIFF2026508134000113.tif4170 can be used to identify the properties (e.g., material and thickness) of the target stress compensation film to be deposited on the wafer in block 640 of Figure 6. The film can be chosen so that the stress tensor in the new wafer+film structure has a well-defined sign (e.g., TIFF2026508134000114.tif5170). This is advantageous because, while ion implantation can reduce the amount of stress in a film, it can be more difficult to reverse the sign of tension in a film using ions. Figure 7B illustrates a graph of the determined amplitude, according to at least one embodiment. 1 shows a schematic selection of a target stress compensation film based on TIFF2026508134000115.tif4170. In some embodiments, the film thickness is such that a uniform (or nearly uniform) stress 6, the process 600 may include depositing a film of a selected material and thickness on the wafer. FIG. 7C illustrates the stresses present in the wafer after the stress-compensating film has been deposited on the wafer, according to at least one embodiment. As shown in FIG. 7C, the stresses imparted by the film The uniform downward shift by TIFF2026508134000117.tif4170 allows the wafer to be positioned at a location of low stress (e.g., angle θ in this example). TIFF2026508134000118.tif5170 and TIFF2026508134000119.tif5170) and areas of high stress (for example, in this example, the angle TIFF2026508134000120.tif5170 and TIFF2026508134000121.tif5170).

[0025] The wafer with the film deposited thereon having the stress shown in FIG. 7C TIFF2026508134000122.tif4170 and TIFF2026508134000123.tif5170 (and / or other choices of coordinate system and corresponding phase and for TIFF2026508134000124.tif3170 TIFF2026508134000125.tif5170), which is herein defined as a cylindrical polynomial with a (maximum uniform) shift equal to: Called TIFF2026508134000126.tif5170: TIFF2026508134000127.tif10170 first term TIFF2026508134000128.tif5170 corresponds to the stress of the wafer itself (see Figure 7A), and the second term TIFF2026508134000129.tif5170 corresponds to an appropriately chosen membrane-induced uniform stress (see Figure 7B).

[0026] In block 660 of FIG. 6, for example, the amplitude determined in block 640 Based on TIFF2026508134000130.tif4170, the dose for the edge ion implant can be calculated. The edge ion implant performed on the stress compensation film relieves stress in the film, and consequently in the wafer, as shown in Figure 7D. Specifically, the edge ion implant significantly reduces the magnitude of the hoop stress, which can be expressed as follows: TIFF2026508134000131.tif6170Here, the residual hoop stress TIFF2026508134000132.tif4170 is a small value.

[0027] 8A-D illustrate exemplary ion implants that can be used for ion implantation performed to mitigate saddle-shaped wafer deformation, according to at least one embodiment. FIG. 8A illustrates an arc implant 802 in which a uniform ion implant dose is applied within a constant, equal-width edge area of ​​the stress compensation film, according to at least one embodiment. For example, a constant density TIFF2026508134000133.tif4170 ions (defined as the product of the flux of ions delivered by an ion beam and the beam exposure time, for example) TIFF2026508134000134.tif4170 and angle It can be deposited in the segment TIFF2026508134000135.tif5170: TIFF2026508134000136.tif6170 where, TIFF2026508134000137.tif5170 is a Heaviside step function. In some embodiments, the angle TIFF2026508134000138.tif5170 is TIFF2026508134000139.tif4170 or approx. TIFF2026508134000140.tif4170 degrees. In some embodiments, the angle TIFF2026508134000141.tif5170 is Is it smaller than TIFF2026508134000142.tif4170 (for example, TIFF2026508134000143.tif4170, and TIFF2026508134000144.tif4170, etc.) or Larger than TIFF2026508134000145.tif4170 (e.g., TIFF2026508134000146.tif4170, and TIFF2026508134000147.tif4170). In some embodiments, the width of the edge injection is TIFF2026508134000148.tif4170 mm or less. In some embodiments, the width of the edge implant can be less than 1 mm or greater than 10 mm. In some embodiments, the width of the edge implant can be 10% or less of the diameter of the wafer, or some other percentage of the diameter (e.g., 5%, 20%, etc.).

[0028] Figure 8B shows the angle TIFF2026508134000149.tif5170) shows a crescent edge implant 804 in which a uniform ion implant dose is applied within the edge area of ​​varying thickness, for example: TIFF2026508134000150.tif6170 Thickness TIFF2026508134000151.tif5170 TIFF2026508134000152.tif5170 is the largest, and the line TIFF2026508134000153.tif5170 and 8B (e.g., dashed boundary 805 shown in dashed line), for example, as follows: TIFF2026508134000155.tif5170

[0029] 8C illustrates a sloped edge implant 806 in which a non-uniform ion implant dose is applied within the edge area, according to at least one embodiment. In some embodiments, the ion implant density varies with radial distance within the implant area. TIFF2026508134000156.tif3170 can vary linearly (or according to some non-linear dependency), e.g. TIFF2026508134000157.tif4170 and In TIFF2026508134000158.tif5170, it is as follows: TIFF2026508134000159.tif9170 (zero elsewhere). In this example, the ion implantation density is TIFF2026508134000160.tif4170 From TIFF2026508134000161.tif4170 TIFF2026508134000162.tif4170 TIFF2026508134000163.tif4170. In some embodiments, the ion implantation density varies (e.g., increases) with the vertical distance from the center of the wafer ( TIFF2026508134000164.tif5170), for example: TIFF2026508134000165.tif11170

[0030] In some embodiments, (azimuth angle TIFF2026508134000166.tif5170) non-uniform ion implantation dose, e.g. TIFF2026508134000167.tif5170 can be applied to the membrane as a piecewise linear function: TIFF2026508134000168.tif23170

[0031] In some embodiments, (azimuth angle A smoothly varying ion implantation dose (per TIFF2026508134000169.tif5170) can be applied to the film non-uniformly, for example, according to the following piecewise linear function: TIFF2026508134000170.tif14170

[0032] Ion implantation doses according to many other functions can be used, for example, functions that vary smoothly with both radial distance and azimuthal angle.

[0033] 8D illustrates a custom-shaped ion implant according to at least one embodiment. For example, the custom-shaped implant can include any of the implants referenced in conjunction with FIGS. 8A-C (or similar implants). In one non-limiting example, the custom-shaped implant can include a crescent-shaped implant 808 and one or more longitudinal implants, e.g., implant 810. The crescent-shaped implant 808 and the longitudinal implant 810 can have different ion implant densities, e.g., the crescent-shaped implant 808 can have a higher ion implant density compared to the longitudinal implant 810. The longitudinal implant 810 can be used to prevent (or reduce) the formation of ripples and / or other bulk deformations that may be caused by edge implants.

[0034] In block 670 of FIG. 6, ion implantation is performed, e.g., using one of the ion implantation doses illustrated in FIGS. 8A-D (or any other similar doses), as illustrated in the following disclosure in conjunction with FIGS. 11A-B. Following ion implantation into the film, process 600 can proceed to a new measurement of the wafer's topography in block 680 to assess post-implantation residual stress remaining in the wafer. For several reasons, the post-implantation wafer may still exhibit a certain amount of stress and deformation. In particular, edge implantation can relieve stress around the wafer's periphery (hoop stress), but some residual stress (also referred to herein as higher-order stress) may still remain in the bulk of the wafer, causing fluctuations (ripples) in the wafer's profile. In addition, the thickness of stress-compensating films typically has a non-uniform radial profile near the edge, gradually thinning as the film approaches the wafer's edge, e.g., approximately 300 nm at a distance of 7-10 mm from the edge, compared to approximately 150 nm at the edge (as an illustrative example). Such radial non-uniformity can further increase the amount of ripple.

[0035] Referring again to FIG. 6 , to reduce ripples and other residual deformations and stresses in the wafer, process 600 can select one of additional implant assist features at block 690. FIGS. 9A-C illustrate some examples of implant assist features that can be used to relieve residual stress, according to at least one embodiment. FIG. 9A schematically illustrates an exemplary “oval” dose map 900, with light regions 904 indicating areas of the wafer 902 that receive ions (or receive a higher dose of ions) and dark regions 906 of the wafer 902 that do not receive ions (or receive a lower dose of ions). Similarly, FIG. 9B schematically illustrates an exemplary “hourglass” dose map 910. FIG. 9C schematically illustrates an exemplary “butterfly” dose map 920.

[0036] 6 may include various implant-assist features 910-930 (as well as numerous other features). In one non-limiting exemplary embodiment, each implant-assist feature is selected from a mask that identifies an area that will receive ion implantation. TIFF2026508134000171.tif6170 (where index j lists the various masks defined). In some embodiments, the mask TIFF2026508134000172.tif6170 can be two-component, for example, point If TIFF2026508134000173.tif5170 belongs to one of the bright regions 904 intended to receive ions, TIFF2026508134000174.tif5170, and the point If TIFF2026508134000175.tif5170 belongs to one of the dark regions 906 that are not intended to receive ions, TIFF2026508134000176.tif5170. Residual stress measured in the wafer (or inferred from measurements of residual deformation of the wafer) in step 680 TIFF2026508134000177.tif5170 can be compared with the available mask by calculating a set of overlap coefficients (or any other suitable similarity value) that represent the similarity between the residual stresses and the mask of each implant-assisted feature (the minus sign is used when the residual stresses are negative, as shown, for example, in FIG. 7D ): TIFF2026508134000178.tif9170 where the integral (or the corresponding discrete two-dimensional sum) is over the area of ​​the circle. The implant-assist feature with the highest overlap (or one of several) can be selected for application to the stress compensation film on the wafer. The ion beam density is then adjusted to You can select based on the size of TIFF2026508134000180.tif5170, for example: TIFF2026508134000181.tif5170, calculated using Monte Carlo simulation, or selected by other suitable techniques. TIFF2026508134000182.tif5170 is It can be a continuous function of TIFF2026508134000183.tif4170.

[0037] In block 695, selected implant assist features can be applied to the stress compensation film, for example, as disclosed below in connection with Figures 11A-B. As indicated by the dashed arrows in Figure 6, blocks 680-695 of process 600 can be repeated iteratively until the stress or deformation of the wafer is reduced to below the target tolerance.

[0038] FIG. 10A schematically illustrates an exemplary wafer response 1000 to an “elliptical” dose map 900 that may be used in the process 600 of FIG. 6 , according to at least one embodiment. The response 1000 is calculated for an undeformed reference wafer with a reference film deposited thereon. The wafer deformation after ion implantation is shown in a two-dimensional (2D) heat map 1002 and a three-dimensional (3D) map 1004. 2D heat maps 1006, 1008 and 3D maps 1008, 1010 illustrate the decomposition of the wafer deformation into a quadratic portion (2D map 1006 and 3D map 1008) including parabolic and saddle-shaped deformations, and a residual portion (2D map 1010 and 3D map 1012). FIG. 10B schematically illustrates an exemplary wafer response 1001 to a “butterfly” dose map 920 that may be used in the process 600 of FIG. 6 , according to at least one embodiment.

[0039] FIG. 11A schematically illustrates an ion implantation system 1100 capable of performing ion implantation into the stress compensation layer, according to at least one embodiment. The ion implantation system 1100 may be or may include the ion beam implanter 110 of FIG. 1. Specifically, although the stress-relief beam used to modify the stress in the stress compensation layer 108 is referred to in some embodiments as an ion beam (e.g., ion beam 112), the stress-relief beam may include other material particles (e.g., electrons), electromagnetic waves (e.g., UV light, visible light, infrared light, etc.), and / or suitable combinations thereof. The ion implantation system 1100 may include an ion source 1102 for generating the ion beam 1104. The ion source 1102 may include a chamber (e.g., a plasma chamber) for generating ions. The ion source 1102 may be powered by a power supply 1106 and may include an extraction electrode assembly (not shown). The ion implantation system 1100 may include a mass spectrometer 1108 and a collimating and focusing column 1110. The collimating and focusing column 1110 may direct the ion beam 112 toward the wafer 102. The wafer 102 may be supported by a support stage 1112. In some embodiments, the support stage 1112 and wafer 102 may remain stationary while the ion beam 112 scans the wafer 102, but components of the ion implantation system 1100 may be repositioned relative to the wafer 102. In some embodiments, the ion implantation system 1100 may be stationary, but the support stage 1112 may reposition the wafer 102. The scanning by the ion beam 112 may occur along multiple directions according to any suitable predetermined pattern, for example, TIFF2026508134000184.tif3170 Along the axis and TIFF2026508134000185.tif4170 Along the axis, for example, TIFF2026508134000186.tif3170 axis, back and forth, in a spiral pattern, etc. In various embodiments, the ion beam 112 can be scanned at a frequency of a few Hz, tens of Hz, hundreds of Hz, thousands of Hz, or greater.

[0040] Operation of the ion implantation system 1100 can be controlled by a controller 1114, which can include any suitable computing device having a processor, such as a central processing unit (CPU), field programmable gate array (FPGA), and / or application specific integrated circuit (ASIC), microcontroller, or other processing device, and memory devices, such as random access memory (RAM), read-only memory (ROM), and / or flash memory, or any combination thereof. The controller 1114 can control the operation of the power supply 1106, the support stage 1112, and / or various other components and modules of the ion implantation system 1100. The controller 1114 can include an ion beam simulation module 1116 that can perform simulations to determine target intensities of the ion beam 112 used to mitigate various wafer deformations. In some embodiments, the support stage 1112 can be tilted, for example, in one or two spatial directions relative to the wafer 102 to vary the angle of incidence of the ion beam 112 with respect to the wafer 102. In some embodiments, instead of tilting the wafer 102, the controller 1114 can tilt the ion implantation system 1100 relative to the wafer 102. In some embodiments, for example, as shown in Figure 11B, the support stage 1112 can impart tilt in one or two spatial directions relative to the wafer 102, for example, to change the angle of incidence of the ion beam 112 relative to the wafer 102. In some embodiments, instead of tilting the wafer 102, the controller 1114 can tilt the ion implantation system 1100 relative to the wafer 102.

[0041] FIG. 12 illustrates a block diagram of an exemplary computer system 1200 capable of supporting operations of the present disclosure, according to at least one embodiment. In various examples, exemplary computer system 1200 may be or include controller 1114 of FIG. 11. Computer system 1200 may be connected to other computer systems in a local area network (LAN), an intranet, an extranet, and / or the Internet. Computer system 1200 may operate in a server capacity in a client-server network environment. Computer system 1200 may be a personal computer (PC), a set-top box (STB), a server, a network router, switch, or bridge, or any device capable of executing a set of instructions (sequential or otherwise) that specify operations to be performed by the device. Furthermore, while only a single exemplary computer system is illustrated, the term “computer” should also be understood to include any collection of computers that, individually or collectively, execute an instruction set (or sets of instructions) to perform any method or methods described herein.

[0042] The exemplary computer system 1200 may include a processing device 1202 (also referred to as a processor or CPU), a main memory 1204 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM), etc.), a static memory 1206 (e.g., flash memory, static random access memory (SRAM), etc.), and a secondary memory (e.g., a data storage device 1218), which may communicate with each other via a bus 1230.

[0043] The processing device 1202 represents one or more general-purpose processing devices, such as a microprocessor or central processing unit. The processing device 1202 may include processing logic 1226. The processing device 1202 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. The processing device 1202 may also be one or more special-purpose processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), or a network processor. According to one or more aspects of the present disclosure, the processing device 1202 may be configured to execute instructions implementing the exemplary process 600 for mitigating saddle deformation of a wafer.

[0044] The exemplary computer system 1200 may further include a network interface device 1208 that may be communicatively coupled to a network 1220. The exemplary computer system 1200 may further include a video display 1210 (e.g., a liquid crystal display (LCD), touch screen, or cathode ray tube (CRT)), an alphanumeric input device 1212 (e.g., a keyboard), a cursor control device 1214 (e.g., a mouse), and an audio signal generating device 1216 (e.g., a speaker).

[0045] The data storage device 1218 may include a computer-readable storage medium (or more specifically, a non-transitory computer-readable storage medium) 1224 having stored thereon one or more sets of executable instructions 1222. According to one or more aspects of the present disclosure, the executable instructions 1222 may include executable instructions that implement the example process 600 for mitigating saddle deformation of a wafer.

[0046] The executable instructions 1222 may also reside, completely or at least partially, within main memory 1204 and / or processing device 1202 during execution by exemplary computer system 1200, with main memory 1204 and processing device 1202 also constituting computer-readable storage media. The executable instructions 1222 may also be transmitted or received over a network via network interface device 1208.

[0047] Although computer-readable storage medium 1224 is shown in Figure 12 as a single medium, the term "computer-readable storage medium" should be interpreted to include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) that store one or more sets of operating instructions. The term "computer-readable storage medium" should also be interpreted to include any medium that can store or encode a set of instructions that are executed by a machine, causing the machine to perform any one or more of the methodologies described herein. Accordingly, the term "computer-readable storage medium" should be interpreted to include, but is not limited to, solid-state memory and optical and magnetic media.

[0048] Some portions of the foregoing detailed descriptions are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their invention to others skilled in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of steps leading to a desired result. These steps are steps requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.

[0049] It should be noted, however, that all of these and similar terms should be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. As will become apparent from the following description, unless otherwise specified, throughout this description, descriptions utilizing terms such as "identifying," "determining," "storing," "adjusting," "causing," "returning," "comparing," "creating," "stopping," "loading," "copying," "throwing," "replacing," or "performing" should be understood to refer to the operations and processes of a computer system or similar electronic computing device. Such a computer system or similar electronic computing device manipulates and converts data represented as physical (electronic) quantities in the computer system's registers and memory into other data represented as physical (electrical) quantities in the computer system's memory or registers or such other information storage, transmission, or display device.

[0050]

[0010] Embodiments of the present disclosure also relate to apparatus for performing the methods described herein. This apparatus may be specially constructed for the required purposes, or it may be a general-purpose computer system selectively programmed by a computer program stored in the computer system. Such a computer program may be stored on a computer-readable storage medium, such as any type of disk including, but not limited to, optical disks, CD-ROMs, and magneto-optical disks, read-only memory (ROM), random-access memory (RAM), EPROM, EEPROM, magnetic disk storage media, optical storage media, flash memory devices, other types of machine-accessible storage media, or any type of medium suitable for storing electronic instructions, each coupled to a computer system bus.

[0051] The methods and displays presented herein are not inherently related to any particular computer or other apparatus. Various general-purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct more specialized apparatus to perform the required method steps. The required structure for a variety of such systems will be apparent as set forth in the description below. Additionally, the scope of the present disclosure is not limited to any particular programming language. It will be understood that a variety of programming languages ​​can be used to implement the teachings of the present disclosure.

[0052] It should be understood that the above description is intended to be illustrative, not limiting. Many other example embodiments will be apparent to those skilled in the art upon reading and understanding the above description. While particular examples have been described in the present disclosure, it will be recognized that the systems and methods of the present disclosure are not limited to the examples described herein, but can be practiced with modification within the scope of the claims. Accordingly, the specification and drawings are to be regarded in an illustrative, rather than limiting sense. The scope of the present disclosure should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. 1. A method for correcting out-of-plane deformation of a substrate, comprising: obtaining a profile of the out-of-plane deformation of the substrate using optical inspection data; and using the acquired profile to identify one or more parameters characterizing the saddle stress of the substrate; calculating one or more characteristics of a stress compensation layer (SCL) for the substrate using the one or more determined parameters; and depositing the SCL onto the substrate; applying a stress relaxation beam to a plurality of edge regions of the SCL, wherein a configuration of the stress relaxation beam is determined using the one or more identified parameters; A method comprising:

2. The method of claim 1 , wherein the one or more characteristics of the SCL are calculated such that stress in the substrate has the same sign across an area of ​​the substrate.

3. The method of claim 1 , wherein each of the plurality of edge regions of the SCL has a width that is less than or equal to 30% of a diameter of the substrate.

4. The method of claim 1 , wherein the stress relaxation beam applies a spatially uniform dose of ions to the edge regions of the SCL.

5. The method of claim 1 , wherein the stress relaxation beam applies a radially varying dose of ions to the edge regions of the substrate.

6. The method of claim 1 , wherein the stress relaxation beam applies an azimuthally varying dose of ions to the edge regions of the SCL.

7. The one or more features of the SCL are: the material of the SCL, or The thickness of the SCL The method of claim 1 , comprising one or more of:

8. The stress relaxation beam is configured as follows: the type of particles in the stress relaxation beam; the energy of the particles of the relaxation beam, or the angle of incidence of the particles of the stress relaxation beam on the SCL; The method of claim 1 , comprising one or more of:

9. obtaining an updated profile of the out-of-plane deformation of the substrate in response to the stress relaxation beam being applied to the plurality of edge regions of the SCL; identifying residual stresses in the substrate based on the updated profile; and selecting a target stress relaxation beam pattern from a plurality of stored stress relaxation beam patterns based on the residual stress; applying additional stress relaxation beams to regions of the SCL identified by the target stress relaxation beam pattern; The method of claim 1 further comprising:

10. 10. The method of claim 9, wherein selecting the stress relaxation beam pattern comprises calculating a similarity between the residual stress in the substrate and each of at least a subset of the stored plurality of stress relaxation beam patterns.

11. The method of claim 1 , wherein the substrate includes a front side and a back side, the front side including one or more fabricated features, and the SCL is deposited on the back side of the substrate.

12. Memory and a processing device communicatively coupled to the memory; a processing device for processing a signal from the processing device; Using the optical inspection data to obtain a profile of the out-of-plane deformation of the substrate; using the obtained profile to identify one or more parameters characterizing the saddle stress of the substrate; calculating one or more characteristics of a stress compensation layer (SCL) for the substrate using the one or more determined parameters; depositing the SCL onto the substrate; applying a stress relaxation beam having a configuration determined using the identified one or more parameters to a plurality of edge regions of the SCL; system.

13. The system of claim 12 , wherein the one or more characteristics of the SCL are calculated such that stress in the substrate has the same sign across an area of ​​the substrate.

14. The system of claim 12 , wherein each of the plurality of edge regions of the SCL has a width that is less than or equal to 30% of a diameter of the substrate.

15. The stress relief beam a spatially uniform dose of ions to the edge regions of the SCL; a radially varying dose of ions to the edge regions of the substrate; or azimuthally varying doses of ions to the edge regions of the SCL; The system of claim 12 , wherein the system applies at least one of:

16. The one or more features of the SCL are: the material of the SCL, or The thickness of the SCL The system of claim 12, comprising one or more of:

17. The stress relaxation beam is configured as follows: the type of particles in the stress relaxation beam; the energy of the particles of the relaxation beam, or the angle of incidence of the particles of the stress relaxation beam on the SCL; The system of claim 12, comprising one or more of:

18. the processing device further comprising: obtaining an updated profile of the out-of-plane deformation of the substrate in response to the stress relaxation beam being applied to the plurality of edge regions of the SCL; Identifying residual stresses in the substrate based on the updated profile; selecting a target stress relaxation beam pattern from a plurality of stored stress relaxation beam patterns based on the residual stress; applying additional stress relaxation beams to regions of the SCL identified by the target stress relaxation beam pattern; The system of claim 12.

19. 20. The system of claim 18, wherein to select the stress relaxation beam pattern, the processing device calculates a similarity between the residual stress in the substrate and each of at least a subset of the stored plurality of stress relaxation beam patterns.

20. 1. A semiconductor manufacturing system, comprising: one or more processing chambers for processing substrates; 1. A computing device, comprising: using the optical inspection data to obtain a profile of out-of-plane deformation of the substrate; using the obtained profile to identify one or more parameters characterizing the saddle stress of the substrate; calculating one or more characteristics of a stress compensation layer (SCL) for the substrate using the one or more determined parameters; depositing the SCL onto the substrate; a computing device that applies a stress relaxation beam having settings determined using the one or more identified parameters to a plurality of edge regions of the SCL; and A system comprising:

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