Display panel and method for manufacturing a display panel
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-02
- Publication Date
- 2026-03-13
AI Technical Summary
The formation of cavities in the lower-side region of the shelter structure during OLED manufacturing using photolithography technology leads to stress accumulation, resulting in cracks and display defects such as dark spots and black spots due to water vapor intrusion.
The display panel design includes a base substrate with a drive layer, an anode layer, a light-emitting layer, a cathode layer, and a sealing layer, featuring a pixel definition unit with a downwardly concave slope and controlled dimensions to reduce the overlap and connection of sealing film layers, thereby minimizing cavity formation and display defects.
The design reduces the occurrence of display defects by minimizing the overlap and connection of sealing film layers, enhancing the manufacturing process and improving the panel's bending and curvature capabilities.
Smart Images

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