Crystal oscillator and method for manufacturing the same

Abstract

A method for manufacturing multiple crystal oscillators includes the steps of: providing a first wafer containing a piezoelectric crystal; forming a first patterned metal layer having a plurality of lower electrodes on a first surface of the first wafer; providing a second wafer; forming a second patterned metal layer having a plurality of connection pads on a first surface of the second wafer; defining a plurality of first cavities within the second wafer below the first surface of the second wafer; joining the first and second wafers to form a bonded structure by directly joining the first and second patterned metal layers by metal bonding; thinning the first wafer from the second surface opposite the first surface of the first wafer; patterning the thinned first wafer to define a plurality of first suspension portions; and dicing the bonded structure into multiple crystal oscillators.

Description

Technical Field

[0001] (Related Applications) This application claims priority to U.S. Provisional Patent Application No. 63 / 454,962, filed on March 28, 2023, entitled "Quartz Device and Manufacturing Method thereof", and U.S. Provisional Patent Application No. 63 / 470,177, filed on June 01, 2023, entitled "Quartz Device and Manufacturing Method thereof", and these provisional applications are incorporated herein by reference.

[0002] This disclosure relates to crystal oscillators and methods of manufacturing the same. In particular, some embodiments of this disclosure relate to crystal oscillators and methods for manufacturing a plurality of crystal oscillators.

Background Art

[0003] Piezoelectric oscillators are widely used as frequency and time reference sources in small portable electronic devices such as mobile phones because of their small size and light weight. Piezoelectric oscillators, for example, in the case of 5G technology, may play a role in providing a high-end reference clock signal and receiving a transmission signal.

[0004] In order to further increase the output frequency of a piezoelectric oscillator, it is necessary to further reduce the thickness of the vibrating element used in the piezoelectric oscillator. However, when the vibrating element is thinned, the rigidity of the vibrating portion decreases, and handling and mounting of the vibrating element may become difficult in the manufacture of the piezoelectric vibrator.

Summary of the Invention

[0005] The present disclosure provides a method for manufacturing a plurality of crystal oscillators. The method includes the step of providing a first wafer containing a piezoelectric crystal (including step (a)). The method includes the step of forming a first patterned metal layer on a first surface of the first wafer, the first patterned metal layer comprising a plurality of lower electrodes (step (b)). The method includes the step of providing a second wafer (step (c)). The method includes the step of forming a second patterned metal layer on a first surface of the second wafer, the second patterned metal layer comprising a plurality of connection pads (step (d)). The method includes the step of defining a plurality of first cavities in the second wafer beneath the first surface of the second wafer (step (e)). The method includes the step of joining the first wafer and the second wafer to form a bonded structure by directly joining the first patterned metal layer and the second patterned metal layer by a metal bond (step (f)). The method includes the step of thinning the first wafer from a second surface opposite to a first surface of the first wafer (step (g)). The method includes the step (h) of patterning a thinned first wafer to define a plurality of first suspended portions. The method also includes the step (i) of dicing the bonded structure into a plurality of crystal oscillators.

[0006] In one embodiment, the method further includes, after step (g), a step (step (j)) of forming a third patterned metal layer on the exposed surface of the thinned first wafer.

[0007] In one embodiment, the method further includes the step of forming a first via that penetrates a first wafer (step (k1)).

[0008] In one embodiment, the method further includes the step of forming a second via that penetrates a second wafer (step (k2)).

[0009] In one embodiment, step (f) includes joining each of the lower electrodes to each of the connecting pads of the connecting pad by direct metal bonding.

[0010] In one embodiment, the first patterned metal layer further comprises a plurality of first dummy pads, and the second patterned metal layer further comprises a plurality of second dummy pads, and step (f) includes bonding each of the first dummy pads to each of the second dummy pads of the second dummy pads directly by metal bonding.

[0011] In one embodiment, step (e) includes defining a plurality of first cavities, each having a depth in the range of 0.1 μm to 10 μm.

[0012] In one embodiment, step (e) includes etching a second wafer from a first surface to define a plurality of first cavities.

[0013] In one embodiment, step (h) includes defining a through hole that penetrates at least one of the first suspension portions.

[0014] In one embodiment, step (h) includes patterning a thinned first wafer to define a plurality of second suspension portions.

[0015] In one embodiment, the first wafer includes a quartz crystal.

[0016] This disclosure provides a crystal oscillator. The crystal oscillator comprises a piezoelectric crystal plate, a first patterned metal layer, a substrate, a second patterned metal layer, a third patterned metal layer, and a direct metal junction interface. The piezoelectric crystal plate comprises an anchoring portion and a first suspension portion connected to the anchoring portion. The first patterned metal layer is disposed on a first surface of the crystal plate. The first patterned metal layer comprises a first lower electrode overlapping the first suspension portion. The substrate has a first cavity beneath the first surface of the substrate. The first suspension portion overlaps the first cavity. The second patterned metal layer is disposed on the first surface of the substrate. The second patterned metal layer comprises a connecting pad. The third patterned metal layer is disposed on a second surface opposite to the first surface of the crystal plate. The third patterned metal layer comprises a first upper electrode overlapping the first suspension portion. The direct metal bonding interface extends between the first patterned metal layer and the second patterned metal layer.

[0017] In one embodiment, the first lower electrode comprises an excitation portion that overlaps with the first suspension portion, a pad portion that overlaps with the fixed portion, and a connecting portion that is continuously connected to both the excitation portion and the pad portion.

[0018] In one embodiment, the direct metal bonding interface extends between the connecting pad and the pad portion of the first lower electrode.

[0019] In one embodiment, the crystal oscillator further comprises a first via that penetrates the crystal plate and is electrically connected to a first upper electrode.

[0020] In one embodiment, the crystal oscillator further comprises a second via that penetrates the substrate and is electrically connected to a connection pad.

[0021] In one embodiment, the first patterned metal layer further comprises at least one first dummy pad, and the second patterned metal layer further comprises at least one second dummy pad, with a direct metal bonding interface extending between the first dummy pad and the second dummy pad.

[0022] In one embodiment, the first suspension portion has a substantially rectangular shape.

[0023] In one embodiment, the length of the first suspension portion is in the range of 100 μm to 1000 μm.

[0024] In another embodiment, the length of the first suspension portion is in the range of 10 μm to 500 μm.

[0025] In one embodiment, the depth of the first cavity is in the range of 0.1 μm to 10 μm.

[0026] In one embodiment, the crystal plate has a through hole that penetrates the first suspension portion.

[0027] In one embodiment, the crystal plate further includes a second suspension portion extending from the fixed portion.

[0028] In one embodiment, the substrate has a second cavity under the first surface of the substrate, and the second suspension portion overlaps with the second cavity.

[0029] In one embodiment, the crystal oscillator further includes a cap overlapping both the first suspension portion and the second suspension portion.

[0030] In one embodiment, the second suspension portion overlaps with the first cavity.

[0031] In one embodiment, the first patterned metal layer further includes a second lower electrode overlapping with the second suspension portion, and the third patterned metal layer further includes a second upper electrode overlapping with the second suspension portion.

[0032] In one embodiment, the first upper electrode is electrically coupled to the second lower electrode, and the second upper electrode is electrically coupled to the first lower electrode.

[0033] In one embodiment, the first upper electrode is electrically coupled to the second upper electrode, and the first lower electrode is electrically coupled to the second lower electrode.

[0034] In one embodiment, the first upper electrode and the first lower electrode are electrically coupled to a first functional circuit, and the second upper electrode and the second lower electrode are electrically coupled to a second functional circuit.

[0035] In one embodiment, the crystal oscillator is a strip resonator. [Brief explanation of the drawing]

[0036] [Figure 1] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 2] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 3] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 4] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 5] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 6] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 7] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 8] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 9] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 10A] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 10B]This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 11A] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 11B] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 12A] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 12B] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 13] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 14A] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 14B] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 14C] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 15] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 16] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 17] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 18] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 19] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 20] This is a schematic diagram showing an intermediate step in the manufacturing of multiple crystal oscillators according to one embodiment of the present disclosure. [Figure 21A] This is a schematic diagram showing one embodiment of the crystal oscillator according to the present disclosure. [Figure 21B] This is a schematic diagram showing one embodiment of the crystal oscillator according to the present disclosure. [Figure 21C] This is a schematic diagram showing one embodiment of the crystal oscillator according to the present disclosure. [Figure 22] This is a schematic diagram showing one embodiment of the crystal oscillator according to the present disclosure. [Figure 23] This is a schematic diagram showing one embodiment of the crystal oscillator according to the present disclosure. [Figure 24A] This is a schematic diagram showing one embodiment of the crystal oscillator according to the present disclosure. [Figure 24B] This is a schematic diagram showing one embodiment of the crystal oscillator according to the present disclosure. [Figure 24C] This is a schematic diagram showing one embodiment of the crystal oscillator according to the present disclosure. [Figure 25A] This is a schematic diagram showing an embodiment of the crystal oscillator according to this disclosure. [Figure 25B] This is a schematic diagram showing an embodiment of the crystal oscillator according to this disclosure. [Figure 25C] This is a schematic diagram showing an embodiment of the crystal oscillator according to this disclosure. [Modes for carrying out the invention]

[0037] The terms used in the following descriptions are intended to be interpreted in their broadest reasonable form, even when used in conjunction with the detailed description of a particular embodiment of the Art. Certain terms may be further emphasized below, but any technical terms intended to be interpreted in any limited form are specifically defined in the sections of this detailed description. Components and implementations of structures or devices according to this disclosure may be shown in the following drawings and embodiments. However, the sizes and shapes shown in the drawings of structures or devices do not limit the features of this disclosure.

[0038] As used in this application, the term “above” can mean either directly or indirectly, in conjunction with an intervening element or layer. Spatially relative terms such as “below,” “downward,” “bottom,” “above,” and “top” may be used herein to facilitate explanation in describing the relationship between one element or feature and another, as shown in the figures. Spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the drawings. For example, if the device in the drawing is turned upside down, an element described as being “below” or “downward” another element or feature will be oriented “above” the other element or feature. Thus, the exemplary term “below” can encompass both up and down orientations. The device may be oriented in a different orientation (it may be rotated 90° or in other orientations), and the spatially relative descriptors used herein may be interpreted accordingly.

[0039] Figures 1 to 9, 10A to 10B, 11A to 11B, 12A to 12B, 13, and 14A to 14C are schematic diagrams showing intermediate steps in the manufacture of multiple crystal oscillators according to one embodiment of the present disclosure.

[0040] As shown in Figure 1, a first wafer 10 is provided (step (a)). The first wafer 10 comprises a piezoelectric crystal. In some embodiments, the first wafer 10 includes quartz. For example, an AT-cut quartz wafer may be provided. However, the disclosure may be applied to various piezoelectric crystal wafers, such as BT-cut or other types of crystalline wafers. In some embodiments, the first wafer 10 may be a wafer having a diameter of 2 inches or more. In this embodiment, the thickness of the first wafer 10 may be about 200 μm. However, the disclosure is not limited thereto. The first surface 10S1 of the first wafer 10 may be polished, and the first wafer 10 may be thoroughly cleaned and dried.

[0041] Figures 1 to 4 are enlarged views of region A of the first wafer 10. Although only region A is shown in the figures, the manufacturing process described herein may also be a wafer-level process and may be applied simultaneously to other regions of the first wafer 10, so that multiple crystal oscillators may be manufactured simultaneously by the process described herein.

[0042] As shown in Figure 2, through holes H1 and H3 are defined in the first wafer 10. The through holes H1 and H3 penetrate the first wafer 10 and extend from the first surface 10S1 of the first wafer 10 to the second surface 10S2 of the first wafer 10 opposite to the first surface 10S1. That is, the through holes H1 and H3 are defined by the inner sidewalls of the first wafer 10. In some embodiments, the through holes H1 and H3 may be cylindrical holes or the like. The cross-sectional shape of the through holes H1 and H3 may be rectangular, square, or the like, and the top view of the through holes H1 and H3 may be circular, elliptical, or the like. However, the disclosure is not limited thereto. The shape of the through holes H1 and H3 may be formed into any suitable shape. In one embodiment, the through holes H1 and H3 may each have a radius of about 0.03 mm, but are not limited thereto. In some embodiments, through-holes H1 and H3 may be formed using a laser. In some embodiments, through-holes H1 and H3 may be formed using photolithography and etching processes.

[0043] As shown in Figure 3, a first via V1 and a third via V3 are formed (step (k1)). The first via V1 and the third via V3 may penetrate the first wafer 10. A conductive material is filled into the through holes H1 and H3 to form the first via V1 and the third via V3. In some embodiments, copper is used to fill the through holes H1 and H3 by electrochemical plating (ECP). However, embodiments of the present disclosure are not limited thereto. The first via V1 and the third via V3 may be formed using any suitable conductive material and process. For example, a conductive adhesive may be applied into the through holes H1 and H3. In some embodiments, the first surface 10S1 and / or the second surface 10S2 of the first wafer 10 may be polished after the formation of the first via V1 and the third via V3. In embodiments shown in Figures 1 to 14C, the first via V1 and the third via V3 may be formed before the first wafer 10 and the second wafer 20 are joined.

[0044] As shown in Figure 4, a first patterned metal layer 120L is formed on the first surface 10S1 of the first wafer 10 (step (b)). The first patterned metal layer 120L may comprise a plurality of lower electrodes 122, each lower electrode 122 further comprising an excitation portion 122a, a pad portion 122c, and a connecting portion 122b continuously connected to both the excitation portion 122a and the pad portion 122c. In some embodiments, the first patterned metal layer 120L may further comprise a plurality of first dummy pads 124, such as the first dummy pads 124a, 124b, 124c, 124d shown in Figure 4. In some embodiments, the first patterned metal layer 120L may further comprise a plurality of connecting pads 125.

[0045] In one embodiment, a metal film in which gold (Au) is laminated on a chromium (Cr) substrate is formed on the first surface 10S1 of the first wafer 10 by sputtering or vapor deposition. In one embodiment, the thickness of the gold layer may be about 100 nm, and the thickness of the chromium layer may be about 5 nm. Subsequently, a first mask that defines the pattern of the first patterned metal layer 120L may be formed on the metal film, and the patterning of the metal film may be performed, for example, by removing the portion of the metal film exposed by the first mask using a suitable solution such as aqua regia. The first dummy pads 124a, 124b, 124c, 124d and the connecting pad 125 may be patterned using the same mask as the lower electrode 122. In some embodiments, the first patterned metal layer 120L may be formed using a first via V1 and / or a third via V3 as alignment marks.

[0046] As shown in Figure 5, a second wafer 20 is provided (step (c)). The second wafer 20 may contain any suitable material such as silicon, silicon oxide, quartz, or ceramic, for example, low-temperature co-fired ceramic (LTCC), or the second wafer 20 may be a printed circuit board. In this embodiment, the second wafer 20 may be a quartz wafer. In some embodiments, the second wafer 20 may be a wafer having a diameter of 2 inches or more. In this embodiment, the thickness of the second wafer 20 may be about 400 μm. However, the disclosure is not limited thereto. The first surface 20S1 of the second wafer 20 may be polished, and the second wafer 20 may be thoroughly cleaned and dried.

[0047] Figures 5 to 9 are enlarged views of region B of the second wafer 20. Although only region B is shown in the figures, the manufacturing process described herein may be a wafer-level process and may be applied simultaneously to other regions of the second wafer 20, so that multiple crystal oscillators may be manufactured simultaneously by the process described herein.

[0048] As shown in Figure 6, through-holes H2 and H4 are defined in the second wafer 20. The through-holes H2 and H4 penetrate the second wafer 20 and extend from the first surface 20S1 of the second wafer 20 to the second surface 20S2 of the second wafer 20 opposite to the first surface 20S1. That is, the through-holes H2 and H4 are defined by the inner sidewalls of the second wafer 20. In some embodiments, the through-holes H2 and H4 may be cylindrical holes, etc., as discussed above with respect to the through-holes H1 and H3. However, the disclosure is not limited thereto. The through-holes H2 and H4 may be formed in any suitable shape. In one embodiment, the through-holes H2 and H4 may each have a radius of about 0.03 mm, but are not limited thereto. The through-holes H2 and H4 may be formed using a laser. In some embodiments, the through-holes H2 and H4 may be formed using photolithography and etching processes.

[0049] As shown in Figure 7, a second via V2 and a fourth via V4 are formed (step (k2)). The second via V2 and the fourth via V4 may penetrate the second wafer 20. The second via V2 and the fourth via V4 are formed by filling the through holes H2 and H4 with a conductive material. In some embodiments, copper is used to fill the through holes H2 and H4 by electrochemical plating (ECP). However, embodiments of the present disclosure are not limited thereto. The second via V2 and the fourth via V4 can be formed using any suitable conductive material and process. For example, a conductive adhesive may be applied to the through holes H2 and H4. In some embodiments, the first surface 20S1 and / or the second surface 20S2 of the second wafer 20 may be polished after the formation of the second via V2 and the fourth via V4. In embodiments shown in Figures 1 to 14C, the second via V2 and the fourth via V4 may be formed before joining the first wafer 10 and the second wafer 20.

[0050] As shown in Figure 8, a second patterned metal layer 140L is formed on the first surface 20S1 of the second wafer 20 (step (d)). The second patterned metal layer 140L may include a plurality of connection pads 142. In some embodiments, the second patterned metal layer 140L may further include a plurality of second dummy pads 144, such as the second dummy pads 144a, 144b, 144c, 144d shown in Figure 8. In some embodiments, the second patterned metal layer 140L may further include a plurality of connection pads 145. The second patterned metal layer 140L may have the same composition as the first patterned metal layer 120L and may be formed using the same method as described above with reference to Figure 4. Specifically, a metal film is formed on the first surface 20S1 of the second wafer 20 by sputtering, deposition, or the like. Subsequently, a second mask defining the pattern of the second patterned metal layer 140L may be formed on the metal film, and the patterning of the metal film may be performed by removing the portion of the metal film exposed by the second mask using a suitable solution, such as aqua regia. The second dummy pads 144a, 144b, 144c, 144d and the connecting pad 145 may be patterned using the same mask as the connecting pad 142. In some embodiments, the second patterned metal layer 140L may be formed using a second via V2 and / or a fourth via V4 as alignment marks.

[0051] As shown in Figure 9, a plurality of first cavities C1 are defined in the second wafer 20 (step (e)), where the first cavities C1 are cavities beneath (recessed) the first surface 20S1 of the second wafer 20. In some embodiments, the plurality of first cavities C1 are defined such that each of the first cavities C1 has a depth in the range of 0.1 μm to 10 μm. In some embodiments, the plurality of first cavities C1 may be defined by etching the second wafer 20 from the first surface 20S1. For example, a suitable solution such as a mixed solution of hydrofluoric acid and ammonium fluoride is used to etch the first surface 20S1 of the second wafer 20, which has been exposed by photoresist, to a desired depth.

[0052] Figure 10A is a perspective view of the bonded structure 30, and Figure 10B is a cross-sectional view of the bonded structure 30 along the line A-A' in Figure 10A. Specifically, Figures 10A, 11A, 12A, and 13 show enlarged views of regions of the bonded structure 30 corresponding to region A of the first wafer 10 and region B of the second wafer 20. The manufacturing process discussed herein may be a wafer-level process and may be applied simultaneously to other regions of the bonded structure 30 so that multiple crystal oscillators can be manufactured at the same time.

[0053] As shown in Figures 10A and 10B, the first wafer 10 and the second wafer 20 are joined by direct metal bonding of the first patterned metal layer 120L and the second patterned metal layer 140L to form a bonded structure 30 (step (f)). A wafer-level intermetallic direct bonding process may be performed. The first patterned metal layer 120L and the second patterned metal layer 140L may be joined by thermocompression bonding, eutectic bonding, or reactive bonding. For example, the first patterned metal layer 120L and the second patterned metal layer 140L may be joined by a thermal compression bonding process such as diffusion bonding. In one embodiment, both the first patterned metal layer 120L and the second patterned metal layer 140L are cleaned by conventional cleaning techniques such as dry etching and plasma surface treatment. In one embodiment, during the thermal process, external pressure is applied to the stacked first wafer 10, the first patterned metal layer 120L, the second patterned metal layer 140L, and the second wafer 20. In some embodiments, the first patterned metal layer 120L is in contact with the second patterned metal layer 140L, and atoms on the surfaces of the first patterned metal layer 120L and the second patterned metal layer 140L may interdiffuse so that a metallic bond can be formed at a metallic bonding interface MI extending between the first patterned metal layer 120L and the second patterned metal layer 140L.

[0054] Referring to Figures 10A and 14A, in some embodiments, joining the first patterned metal layer 120L and the second patterned metal layer 140L involves joining the lower electrode 122 of the first patterned metal layer 120L (e.g., the pad portion 122c of the lower electrode 122) to the respective connecting pads 142 of the second patterned metal layer 140L by direct metal bonding. In some embodiments, joining the first patterned metal layer 120L and the second patterned metal layer 140L involves joining each of the first dummy pads 124 of the first patterned metal layer 120 to the respective second dummy pads 144 of the second patterned metal layer 140L by direct metal bonding. For example, the first dummy pad 124a is joined to the second dummy pad 144a, the first dummy pad 124b to the second dummy pad 144b, the first dummy pad 124c to the second dummy pad 144c, and the first dummy pad 124d to the second dummy pad 144d by direct metal bonding.

[0055] Figure 11A is a perspective view of the bonded structure 30, and Figure 11B is a cross-sectional view of the bonded structure 30 along the line A-A' in Figure 11A. As shown in Figures 11A and 11B, the first wafer 10 is thinned from the second surface 10S2 of the first wafer 10 (step (g)). The first wafer 10 may be thinned by any suitable method such as grinding, wet etching, plasma etching and / or polishing. In one embodiment, the bonded structure 30 is immersed in an etching solution for a predetermined time. In some embodiments, both the first wafer 10 and the second wafer 20 may be thinned. In some embodiments, the thinned first wafer 10' may have a thickness T1 of about 10 μm to 100 μm, for example, about 35 μm. However, the disclosure is not limited thereto, and the thinned first wafer may be thinner or thicker, for example, depending on the desired characteristics of the oscillator.

[0056] Figure 12A is a perspective view of the bonded structure 30, and Figure 12B is a cross-sectional view of the bonded structure 30 along the line A-A' in Figure 12A. As shown in Figures 12A and 12B, after thinning the first wafer 10, a third patterned metal layer 150L is formed on the exposed surface 10S2' of the thinned first wafer 10' (step (j)). The third patterned metal layer 150L may comprise a plurality of upper electrodes 152, each upper electrode 152 further comprising an excitation portion 152a, a pad portion 152c, and a connecting portion 152b continuously connected to both the excitation portion 152a and the pad portion 152c. In some embodiments, the third patterned metal layer 150L may further comprise a plurality of connecting pads 155. The third patterned metal layer 150L may have the same composition as the first patterned metal layer 120L and may be formed using the same method as described above with reference to Figure 4. In some embodiments, the thickness of the third patterned metal layer 150L may be measured and fine-tuned to achieve a predetermined frequency. In one embodiment, the third patterned metal layer 150L may have a thickness of about 0.3 μm. However, the disclosure is not limited thereto.

[0057] As shown in Figure 13, the thinned first wafer 10' may be patterned to define a plurality of first suspension portions 114 (step (h)). In this embodiment, the first trench TR1 penetrating the thinned first wafer 10' may be formed, for example, by photolithography and etching processes. In the embodiment shown in Figure 13, the first trench TR1 is formed in a right-angled "U" shape in top view, and each of the first trench TR1 defines a first suspension portion 114 having a substantially rectangular shape. In some embodiments, the etching solution applied to the thinned first wafer 10' during the etching process may flow through the first trench TR1 into the first cavity C1. The etching solution "stagnant" in the first cavity C1 may be discharged through the gap between adjacent dummy pads.

[0058] As shown in Figure 14A, the bonded structure 30 is fragmented into a plurality of crystal oscillators, including the crystal oscillator 100A (step (i)). A laser cutting process or other suitable process may be performed on the bonded structure 30. In some embodiments, the bonded structure 30 may be cut with a cutting width of about 16 μm to 20 μm.

[0059] Figure 14A is a perspective view of the crystal oscillator 100A, Figure 14B is a cross-sectional view of the crystal oscillator 100A along the line B-B' in Figure 14A, and Figure 14C is a cross-sectional view of the crystal oscillator 100A along the line C-C' in Figure 14A. Referring to Figures 14A to 14C, the crystal oscillator 100A is provided. The crystal oscillator 100A comprises a piezoelectric crystal plate 110, a first patterned metal layer 120, a substrate 130, a second patterned metal layer 140, and a third patterned metal layer 150.

[0060] In some embodiments, the crystal plate 110 includes quartz. For example, the crystal plate 110 may be an AT-cut quartz plate, and thickness-sliding vibrations may be excited as the main vibration. However, the present disclosure may be applied to various piezoelectric crystal plates, such as BT-cut or other types of crystal plates. In this embodiment, the thickness of the crystal plate 110 may be about 10 μm to about 100 μm.

[0061] As shown in Figures 14A to 14C, the piezoelectric crystal plate 110 may comprise a fixed portion 112 and a first suspension portion 114. The first suspension portion 114 is an "overhang" of the piezoelectric crystal plate 110 that extends from and connects to the rest of the piezoelectric crystal plate 110 (fixed portion 112). As described above, the first suspension portion 114 and the fixed portion 112 are integrally formed such that the first suspension portion 114 is seamlessly connected to the fixed portion 112. The first suspension portion 114 substantially defines the vibration region of the crystal oscillator 100A in which vibration (e.g., thickness-slide vibration) energy is confined. In this embodiment, the first suspension portion 114 has a substantially rectangular shape. The first suspension portion 114 may substantially constitute a crystal strip for the crystal oscillator 100A, and the crystal oscillator 100A may be a strip resonator. In some embodiments, the first suspension portion 114 may have a length L in the range of 100 μm to 1000 μm. In some embodiments, the first suspension portion 114 may have a length L in the range of 10 μm to 500 μm. For example, a first suspension portion 114 with a length L of approximately 300 μm may be provided. A first suspension portion 114 with a length L of less than 300 μm may also be achieved. These values ​​are merely examples and are not intended to be limiting. In the embodiments shown in Figures 14A to 14C, the first suspension portion 114 is surrounded by a fixed portion 112.

[0062] The first patterned metal layer 120 is placed on the first surface 110S1 of the crystal plate 110. The first patterned metal layer 120 may contain any suitable metal material and may have a multilayer structure. The first patterned metal layer 120 may have the same composition and thickness as the first patterned metal layer 120L. The first patterned metal layer 120 includes a first lower electrode 122. The first lower electrode 122 overlaps with the first suspension portion 114 and may drive the first suspension portion 114. Specifically, the first lower electrode 122 may include an excitation portion 122a, a pad portion 122c, and a connecting portion 122b. The excitation portion 122a is positioned to overlap with the first suspension portion 114 of the crystal plate 110. The pad portion 122c is positioned to overlap with the fixed portion 112 of the crystal plate 110. Since the connecting portion 122b is continuously connected to both the excitation portion 122a and the pad portion 122c, the excitation portion 122a of the first suspension portion 114 is electrically connected to the pad portion 122c of the fixed portion 112 by the connecting portion 122b. In the embodiments shown in Figures 14A to 14C, the excitation portion 122a of the first lower electrode 122 may have a rectangular shape. However, the disclosure is not limited thereto.

[0063] The third patterned metal layer 150 is positioned on the second surface 110S2 of the crystal plate 110 opposite to the first surface 110S1 of the crystal plate 110. The third patterned metal layer 150 may contain any suitable metallic material and may have a multilayer structure. The third patterned metal layer 150 may have the same composition and thickness as the third patterned metal layer 150L. The third patterned metal layer 150 includes a first upper electrode 152. The first upper electrode 152 overlaps with the first suspension portion 114 and can drive the first suspension portion 114. Specifically, the first upper electrode 152 may include an excitation portion 152a, a pad portion 152c, and a connecting portion 152b. The excitation portion 152a is positioned to overlap with the first suspension portion 114 of the crystal plate 110. The pad portion 152c is positioned to overlap with the fixed portion 112 of the crystal plate 110. Since the connecting portion 152b is continuously connected to both the excitation portion 152a and the pad portion 152c, the excitation portion 152a of the first suspension portion 114 is electrically connected to the pad portion 152c of the fixed portion 112 by the connecting portion 152b. In the embodiments shown in Figures 14A to 14C, the excitation portion 152a of the first upper electrode 152 may have a rectangular shape. However, the disclosure is not limited to these.

[0064] The substrate 130 may contain any suitable material such as silicon, silicon oxide, quartz, or ceramic, for example, low-temperature co-fired ceramic (LTCC). In this embodiment, the substrate 130 may contain quartz. As shown in Figures 14A to 14C, the substrate 130 has a first cavity C1 beneath the first surface 130S1 of the substrate 130. The first suspension portion 114 overlaps the first cavity C1. In some embodiments, the depth D of the first cavity C1 is calculated by the depth to which the first cavity C1 is recessed from the first surface 130S1 of the substrate 130, and is in the range of 0.1 μm to 10 μm. The first cavity C1 may be formed to a depth sufficient to reduce the probability that the first suspension portion 114 adheres to the substrate 130 during a manufacturing process such as an etching step that defines the first suspension portion 114.

[0065] The second patterned metal layer 140 is placed on the first surface 130S1 of the substrate 130. The second patterned metal layer 140 may contain any suitable metal material and may have a multilayer structure. The second patterned metal layer 140 may have the same composition and thickness as the second patterned metal layer 140L. The second patterned metal layer 140 may include a connecting pad 142. In this embodiment, the connecting pad 142 is positioned corresponding to the pad portion 122c of the first lower electrode 122.

[0066] The crystal oscillator 100A includes a direct metal-metal junction interface MI extending between a first patterned metal layer 120 and a second patterned metal layer 140. Specifically, the first patterned metal layer 120 is in contact with the second patterned metal layer 140 to form the direct metal-metal junction interface MI. The direct metal-metal junction interface MI may be formed by an intermetallic direct bonding process during the manufacture of the crystal oscillator 100A, as described above. For example, a wafer-level intermetallic direct bonding process may be performed on the first and second patterned metal layers to form the direct metal-metal junction interface MI. In some embodiments, atoms on the surfaces of the first patterned metal layer 120 and the second patterned metal layer 140 may interdiffuse so that a metal junction can be formed at the direct metal-metal junction interface MI. The direct metal-metal junction interface MI may extend between the pad portion 122c of the first lower electrode 122 and the connecting pad 142. As a result, the pad portion 122c of the first lower electrode 122 is fixed in direct contact with the connecting pad 142, and the first lower electrode 122 is electrically connected to the connecting pad 142.

[0067] In some embodiments, the first patterned metal layer 120 may further comprise at least one first dummy pad 124, such as the first dummy pads 124a, 124b, 124c, 124d shown in Figures 14A to 14C. The upper surfaces of the first dummy pads 124a, 124b, 124c, 124d may be substantially the same height as the upper surface of the first lower electrode 122. In some embodiments, the second patterned metal layer 140 may further comprise at least one second dummy pad 144, such as the second dummy pads 144a, 144b, 144c, 144d shown in Figures 14A to 14C. The upper surfaces of the second dummy pads 144a, 144b, 144c, 144d may be substantially the same height as the upper surface of the connecting pad 142. As shown in Figures 14A to 14C, the direct metal bonding interface MI may also extend between the first dummy pad 124a and each of the second dummy pads 144a, between the first dummy pad 124b and each of the second dummy pads 144b, between the first dummy pad 124c and each of the second dummy pads 144c, and between the first dummy pad 124d and each of the second dummy pads 144d.

[0068] In the embodiments shown in Figures 14A to 14C, the first dummy pads 124a, 124b, 124c, and 124d collectively surround the lower electrode 122 with gaps between at least adjacent first dummy pads (for example, between the first dummy pad 124c and the first dummy pad 124d, or between the first dummy pad 124b and the first dummy pad 124c), and the second dummy pads 144a, 144b, 144c, and 144d collectively surround the first cavity C1 with gaps between at least adjacent second dummy pads (for example, between the second dummy pad 144c and the second dummy pad 144d, or between the second dummy pad 144b and the second dummy pad 144c). The width of one of the gaps (for example, the width W of the gap between the second dummy pad 144b and the second dummy pad 144c) may be greater than 60 μm, so that, as described above, the etching solution that "stagnated" in the first cavity C1 during the manufacture of the crystal oscillator 100A may be discharged through the gap between adjacent dummy pads.

[0069] In the embodiments shown in Figures 14A to 14C, the crystal oscillator 100A further comprises a first via V1 that penetrates the crystal plate 110 and is electrically connected to the first upper electrode 152. The first patterned metal layer 120 may further comprise a connection pad 125 that is electrically connected to the first via V1. As shown in Figures 14A to 14C, the second patterned metal layer 140 may further comprise a connection pad 145 positioned corresponding to the connection pad 125, and a direct metal bonding interface MI may extend between the connection pads 125 and 145, thereby fixing and electrically connecting the connection pad 125 to the connection pad 145. As shown in Figures 14A to 14C, the crystal oscillator 100A may further comprise a fourth via V4 that penetrates the substrate 130 and is electrically connected to the connection pad 145. In this way, the first upper electrode 152 can be electrically connected to the fourth via V4 via the first via V1 and the connecting pads 125 and 145.

[0070] In the embodiments shown in Figures 14A to 14C, the crystal oscillator 100A further comprises a second via V2 that penetrates the substrate 130 and is electrically connected to a connection pad 142. Thus, the first lower electrode 122 can be electrically connected to the second via V2 via the connection pad 142. This allows the crystal oscillator 100A to be mounted on a circuit board and electrically connected to a circuit, for example, via the second via V2 and the fourth via V4.

[0071] By the method disclosed herein, the crystal oscillator 100A may be manufactured using thinner and / or shorter strips, thus achieving higher frequencies and / or higher vibration resistance. In some embodiments, the crystal oscillator 100A may have a fundamental frequency greater than 50 MHz. Generally, crystal oscillators are manufactured, for example, by mounting individual vibrating elements onto their respective substrates via conductive adhesives. However, the manufacturing process can suffer from handling difficulties, particularly when the thickness of the vibrating elements is reduced. By the method disclosed herein, the manufacturing cost of crystal oscillators can be reduced and / or the manufacturing yield can be improved. Figures 15 to 20 are schematic diagrams showing intermediate stages in the manufacture of multiple crystal oscillators according to one embodiment of the present disclosure. The manufacturing process shown in Figures 15 to 20 may be substantially similar to the process shown in Figures 1 to 14C, and similar reference numerals indicate similar elements.

[0072] As shown in Figure 15, a first wafer 10 is provided (step (a)), and a first patterned metal layer 120L is formed on the first surface 10S1 of the first wafer 10 (step (b)).

[0073] As shown in Figure 16, a second wafer 20 is provided (step (c)), and a second patterned metal layer 140L is formed on the first surface 20S1 of the second wafer 20 (step (d)). Next, a plurality of first cavities C1 are formed within the second wafer 20 (step (e)).

[0074] As shown in Figure 17, the first wafer 10 and the second wafer 20 are joined by direct metal bonding of the first patterned metal layer 120L and the second patterned metal layer 140L to form a bonded structure 30 (step (f)). Next, the first wafer 10 is thinned from the second surface 10S2 of the first wafer 10 (step (g)).

[0075] As shown in Figure 18, after thinning the first wafer 10, a third patterned metal layer 150L is formed on the exposed surface 10S2' of the thinned first wafer 10' (step (j)).

[0076] As shown in Figure 19, the thinned first wafer 10' is patterned to define a plurality of first suspension portions 114 (step (h)). A first trench TR1 similar to that described above with respect to Figure 13 may be formed. In this embodiment, second trenches TR2a and TR2b penetrating the thinned first wafer 10' may be formed by the same or separate photolithography and etching processes. The connecting pad 142 of the second patterned metal layer 140L is exposed by the second trench TR2a, and the connecting pad 145 of the second patterned metal layer 140L is exposed by the second trench TR2b.

[0077] As shown in Figure 20, conductive adhesive 157 is applied to and filled at least a portion of the second trench TR2a, and the joint structure is diced to form multiple crystal oscillators, including crystal oscillator 100B (step (i)).

[0078] Referring to Figures 15 to 20, the crystal oscillator 100B may be substantially the same as the crystal oscillator 100A described above with respect to Figures 14A to 14C, with similar reference numerals indicating similar elements. However, in this embodiment, the crystal oscillator 100B may not include through vias (e.g., vias V1, V2, V3, and V4 shown in Figures 14A to 14C), and the lower electrode 122 may be electrically connected to the connection pad 155 of the third patterned metal layer 150L via a conductive adhesive 157, possibly via a connection pad 142.

[0079] Figures 21A to 21C are schematic diagrams showing one embodiment of the crystal oscillator according to the present disclosure. Specifically, Figure 21A is a perspective view of the crystal oscillator 100C, Figure 21B is a cross-sectional view of the crystal oscillator 100C along the line B-B' in Figure 21A, and Figure 21C is a cross-sectional view of the crystal oscillator 100C along the line C-C' in Figure 21A.

[0080] Referring to Figures 21A to 21C, the crystal oscillator 100C may be substantially the same as the crystal oscillator 100A described above with respect to Figures 14A to 14C, with the same reference numerals indicating the same elements, but differing in that the crystal plate 110' has a through-hole TH1 that penetrates the first suspension portion 114'. The top view of the through-hole TH1 may be rectangular. However, the disclosure is not limited to these. Such a configuration may further increase the Q value of the crystal oscillator 100C, for example, by about 2 to 3 times.

[0081] The crystal oscillator 100C may be formed by a process similar to that described above with respect to Figures 1 to 14C and / or Figures 15 to 20, wherein the step of patterning a thinned first wafer 10' (step (h)) may further include the step of defining a through-hole TH1 that penetrates at least one of the first suspension portions 114'.

[0082] Figure 22 is a schematic diagram showing one embodiment of the crystal oscillator according to this disclosure.

[0083] Referring to Figure 22, a crystal oscillator 100D is provided. The crystal oscillator 100D may be substantially the same as the crystal oscillator 100A described above with respect to Figures 14A to 14C, and the same reference numerals indicate the same elements, except that the crystal plate 110 further comprises a second suspension portion 116 extending from the fixed portion 112. In this embodiment, the second suspension portion 116 overlaps the first cavity C1. As shown in Figure 22, the crystal oscillator 100D may further comprise a cap 160 that overlaps both the first suspension portion 114 and the second suspension portion 116.

[0084] The first patterned metal layer 120 may further include a second lower electrode 126 that overlaps with the second suspension portion 116, and the third patterned metal layer 150 may further include a second upper electrode 156 that overlaps with the second suspension portion 116. In this embodiment, the first upper electrode 152 is electrically coupled to the second lower electrode 126, and the second upper electrode 156 is electrically coupled to the first lower electrode 122. With this arrangement, the crystal oscillator 100D may achieve improved vibration resistance and / or reduced temperature drift.

[0085] The crystal oscillator 100D may be formed by a process similar to that described above with respect to Figures 1 to 14C and / or Figures 15 to 20, and the patterning of a thinned first wafer 10' (step (h)) may further include patterning the thinned first wafer 10' to define a plurality of second suspension portions 116.

[0086] Figure 23 is a schematic diagram showing one embodiment of the crystal oscillator according to this disclosure.

[0087] Referring to Figure 23, a crystal oscillator 100E is provided. The crystal oscillator 100E may be substantially the same as the crystal oscillator 100D described above with respect to Figure 22, and the same reference numbers indicate similar elements, but differ in that a first upper electrode 152 and a first lower electrode 122 are electrically coupled to a first functional circuit CR1, and a second upper electrode 156 and a second lower electrode 126 are electrically coupled to a second functional circuit CR2. In one embodiment, the second functional circuit CR2 may be a sensor circuit configured to derive data such as temperature data, gas data, and inertial data from the vibration of a second suspension portion 116, and the first functional circuit CR1 is configured to be supplied and function by referencing the data. However, the disclosure is not limited to these.

[0088] Figures 24A to 24C are schematic diagrams showing one embodiment of the crystal oscillator according to the present disclosure. Figure 24A is a perspective view of the crystal oscillator 100F, Figure 24B is a transmission view of the crystal oscillator 100F, and Figure 24C is a cross-sectional view of the crystal oscillator 100F along the line D-D' in Figure 24B.

[0089] Referring to Figures 24A to 24C, a crystal oscillator 100F is provided. The crystal oscillator 100F may be substantially the same as the crystal oscillator 100A described above with respect to Figures 14A to 14C, and the same reference numerals indicate the same elements. In this embodiment, the crystal plate 110 further comprises a second suspension portion 116 extending from the fixed portion 112. In this embodiment, the fixed portion 112 is the portion to which the crystal plate 110 is fixed to the substrate 130 by metal bonding between the connection pads 125a, 125b and each connection pad 145a, 145b, and between the lower electrodes 122, 126 and each connection pad 142a, 142b, and the first suspension portion 114 and the second suspension portion 116 are crystal strips extending from the fixed portion 112. The crystal oscillator further comprises a cap 160 overlapping both the first suspension portion 114 and the second suspension portion 116.

[0090] As shown in Figures 24A to 24C, the substrate 130 has a second cavity C2 beneath the first surface 130S1 of the substrate 130. The second suspension portion 116 overlaps with the second cavity C2, and the first suspension portion 114 overlaps with the first cavity C1.

[0091] The first patterned metal layer 120 may further include a second lower electrode 126 that overlaps with the second suspension portion 116. The third patterned metal layer 150 may further include a second upper electrode 156 that overlaps with the second suspension portion 116.

[0092] Figures 25A to 25C are schematic diagrams showing embodiments of the crystal oscillator according to this disclosure.

[0093] Referring to Figure 25A, a crystal oscillator 100G is provided. The crystal oscillator 100G may be substantially the same as the crystal oscillator 100F described above with respect to Figures 24A to 24C, and the same reference numerals indicate the same elements. In this embodiment, the first upper electrode 152 is electrically coupled to the second upper electrode 156, and the first lower electrode 122 is electrically coupled to the second lower electrode 126. With this arrangement, the crystal oscillator 100G may have improved vibration resistance, for example, by shortening the length of the first suspension portion 114 and / or the second suspension portion 116.

[0094] Referring to Figure 25B, a crystal oscillator 100H is provided. The crystal oscillator 100H may be substantially the same as the crystal oscillator 100F described above with respect to Figures 24A to 24C, and the same reference numerals indicate the same elements. In this embodiment, the first upper electrode 152 is electrically coupled to the second lower electrode 126, and the second upper electrode 156 is electrically coupled to the first lower electrode 122. With such an arrangement, the crystal oscillator 100F may achieve improved vibration resistance and / or reduced temperature drift.

[0095] Referring to Figure 25C, a crystal oscillator 100I is provided. The crystal oscillator 100I may be substantially the same as the crystal oscillator 100F described with respect to Figures 24A to 24C, and the same reference numerals indicate the same elements. In this embodiment, the first upper electrode 152 and the first lower electrode 122 are electrically coupled to the first functional circuit CR1, and the second upper electrode 156 and the second lower electrode 126 are electrically coupled to the second functional circuit CR2. In one embodiment, the second functional circuit CR2 may be a sensor circuit configured to derive data such as temperature data, gas data, and inertial data from the vibration of the second suspension portion 116, and the first functional circuit CR1 is configured to be supplied and function by referencing the data. However, the disclosure is not limited to these.

[0096] The foregoing description of the embodiments is provided so that those skilled in the art may construct and use the subject matter. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the novel principles and subject matter disclosed herein may be applied to other embodiments without the use of innovative ease. The claimed subject matter described in the claims is not intended to be limited to the embodiments shown herein, but should be given the broadest scope that conforms to the principles and novel features disclosed herein. Further embodiments are intended to be within the spirit and true scope of the disclosed subject matter. Accordingly, the present invention is also intended to encompass modifications and variations that fall within the scope of the appended claims and their equivalents.

Claims

1. A method for manufacturing multiple crystal oscillators, (a) the step of providing a first wafer containing a piezoelectric crystal, (b) A step of forming a first patterned metal layer on a first surface of the first wafer, wherein the first patterned metal layer comprises a plurality of lower electrodes, (c) the step of providing a second wafer, (d) A step of forming a second patterned metal layer on the first surface of the second wafer, wherein the second patterned metal layer comprises a plurality of connecting pads, (e) defining a plurality of first cavities within the second wafer below the first surface of the second wafer, (f) The step of joining the first wafer and the second wafer by directly joining the first patterned metal layer and the second patterned metal layer by metal bonding to form a bonded structure, (g) The step of thinning the first wafer from the second surface opposite to the first surface of the first wafer, (h) The step of patterning the thinned first wafer to define a plurality of first suspension portions, (i) The step of dicing the junction structure into a plurality of crystal oscillators, Methods that include...

2. The method according to claim 1, further comprising the step of forming a third patterned metal layer on the exposed surface of the thinned first wafer after step (g).

3. (k1) The method according to claim 1, further comprising the step of forming a first via that penetrates the first wafer.

4. (k2) The method according to claim 1, further comprising the step of forming a second via that penetrates the second wafer.

5. The method according to claim 1, wherein step (f) is to join each of the lower electrodes to each of the connecting pads of the connecting pad by direct metal bonding.

6. The method according to claim 1, wherein the first patterned metal layer further comprises a plurality of first dummy pads, and the second patterned metal layer further comprises a plurality of second dummy pads, and step (f) comprises bonding each of the first dummy pads to each of the second dummy pads of the second dummy pads directly by metal bonding.

7. The method according to claim 1, step (e) comprising defining the plurality of first cavities such that each has a depth in the range of 0.1 μm to 10 μm.

8. The method according to claim 1, step (e) comprising etching the second wafer from the first surface to define the plurality of first cavities.

9. The method according to claim 1, wherein step (h) includes defining a through hole that penetrates at least one of the first suspension portions.

10. The method according to claim 1, wherein step (h) includes patterning the thinned first wafer to define a plurality of second suspension portions.

11. The method according to claim 1, wherein the first wafer includes a quartz crystal.

12. It is a crystal oscillator, A piezoelectric crystal plate comprising a fixed portion and a first suspension portion connected to the fixed portion, A first patterned metal layer disposed on the first surface of the crystal plate, the first patterned metal layer comprising a first lower electrode that overlaps with the first suspension portion, A substrate having a first cavity beneath a first surface of the substrate, the first suspension portion overlapping the first cavity, A second patterned metal layer disposed on the first surface of the substrate, the second patterned metal layer comprising a connecting pad, A third patterned metal layer disposed on a second surface of the crystal plate opposite to the first surface, the third patterned metal layer comprising a first upper electrode overlapping the first suspension portion, A direct metal bonding interface extending between the first patterned metal layer and the second patterned metal layer, A crystal oscillator equipped with the following features.

13. The crystal oscillator according to claim 12, wherein the first lower electrode comprises an excitation portion overlapping with the first suspension portion, a pad portion overlapping with the fixed portion, and a connecting portion continuously connected to both the excitation portion and the pad portion.

14. The crystal oscillator according to claim 13, wherein the direct metal bonding interface extends between the connecting pad and the pad portion of the first lower electrode.

15. The crystal oscillator according to claim 12, further comprising a first via that penetrates the crystal plate and is electrically connected to the first upper electrode.

16. The crystal oscillator according to claim 12, further comprising a second via that penetrates the substrate and is electrically connected to the connection pad.

17. The crystal oscillator according to claim 12, wherein the first patterned metal layer further comprises at least one first dummy pad, the second patterned metal layer further comprises at least one second dummy pad, and the direct metal bonding interface extends between the first dummy pad and the second dummy pad.

18. The crystal oscillator according to claim 12, wherein the first suspension portion has a substantially rectangular shape.

19. The crystal oscillator according to claim 12, wherein the length of the first suspension portion is in the range of 10 μm to 500 μm.

20. The crystal oscillator according to claim 12, wherein the depth of the first cavity is in the range of 0.1 μm to 10 μm.

21. The crystal oscillator according to claim 12, wherein the crystal plate has a through hole that penetrates the first suspension portion.

22. The crystal oscillator according to claim 12, wherein the crystal plate further comprises a second suspension portion extending from the fixed portion.

23. The crystal oscillator according to claim 22, wherein the substrate has a second cavity beneath the first surface of the substrate, and the second suspension portion overlaps the second cavity.

24. The crystal oscillator according to claim 22, further comprising a cap that overlaps both the first suspension portion and the second suspension portion.

25. The crystal oscillator according to claim 22, wherein the second suspension portion overlaps with the first cavity.

26. The crystal oscillator according to claim 22, wherein the first patterned metal layer further comprises a second lower electrode overlapping the second suspension portion, and the third patterned metal layer further comprises a second upper electrode overlapping the second suspension portion.

27. The crystal oscillator according to claim 26, wherein the first upper electrode is electrically coupled to the second lower electrode, and the second upper electrode is electrically coupled to the first lower electrode.

28. The crystal oscillator according to claim 26, wherein the first upper electrode is electrically coupled to the second upper electrode, and the first lower electrode is electrically coupled to the second lower electrode.

29. The crystal oscillator according to claim 26, wherein the first upper electrode and the first lower electrode are electrically coupled to a first functional circuit, and the second upper electrode and the second lower electrode are electrically coupled to a second functional circuit.

30. The crystal oscillator according to claim 12, wherein the crystal oscillator is a strip resonator.

Images